USBDEV Simulation Results

Wednesday October 02 2024 15:31:08 UTC

GitHub Revision: 1cb1c3d135

Branch: os_regression_2024_10_02

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 110153111371602750214979040795005912991145924440069071731765206333111748946968

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke usbdev_smoke 1.930s 267.645us 50 50 100.00
V1 csr_hw_reset usbdev_csr_hw_reset 1.020s 119.348us 5 5 100.00
V1 csr_rw usbdev_csr_rw 23.227s 19 20 95.00
V1 csr_bit_bash usbdev_csr_bit_bash 8.720s 1.820ms 5 5 100.00
V1 csr_aliasing usbdev_csr_aliasing 3.320s 401.563us 5 5 100.00
V1 csr_mem_rw_with_rand_reset usbdev_csr_mem_rw_with_rand_reset 23.889s 19 20 95.00
V1 regwen_csr_and_corresponding_lockable_csr usbdev_csr_rw 23.227s 19 20 95.00
usbdev_csr_aliasing 3.320s 401.563us 5 5 100.00
V1 mem_walk usbdev_mem_walk 3.640s 176.784us 5 5 100.00
V1 mem_partial_access usbdev_mem_partial_access 2.170s 175.165us 5 5 100.00
V1 TOTAL 113 115 98.26
V2 in_trans usbdev_in_trans 1.890s 248.932us 50 50 100.00
V2 data_toggle_clear usbdev_data_toggle_clear 2.860s 489.466us 50 50 100.00
V2 phy_pins_sense usbdev_phy_pins_sense 1.350s 129.902us 50 50 100.00
V2 av_buffer usbdev_av_buffer 1.690s 236.600us 50 50 100.00
V2 rx_fifo usbdev_pkt_buffer 1.193m 22.693ms 50 50 100.00
V2 phy_config_tx_osc_test_mode usbdev_phy_config_tx_osc_test_mode 1.970s 302.923us 1 1 100.00
V2 phy_config_eop_single_bit_handling usbdev_phy_config_eop_single_bit_handling 1.560s 196.648us 1 1 100.00
V2 phy_config_pinflip usbdev_phy_config_pinflip 1.910s 243.675us 50 50 100.00
V2 phy_config_rand_bus_type usbdev_phy_config_rand_bus_type 1.740s 237.629us 5 5 100.00
V2 phy_config_rx_dp_dn usbdev_phy_config_rx_dp_dn 1.660s 314.027us 1 1 100.00
V2 phy_config_tx_use_d_se0 usbdev_phy_config_tx_use_d_se0 1.240s 217.779us 1 1 100.00
V2 phy_config_usb_ref_disable usbdev_phy_config_usb_ref_disable 1.530s 159.827us 50 50 100.00
V2 max_length_out_transaction usbdev_max_length_out_transaction 1.840s 263.419us 50 50 100.00
usbdev_stream_len_max 6.230s 1.396ms 50 50 100.00
V2 max_length_in_transaction usbdev_max_length_in_transaction 1.930s 254.805us 50 50 100.00
V2 min_length_out_transaction usbdev_min_length_out_transaction 1.570s 219.797us 50 50 100.00
V2 min_length_in_transaction usbdev_min_length_in_transaction 1.620s 172.013us 50 50 100.00
V2 random_length_out_transaction usbdev_random_length_out_transaction 1.660s 183.267us 50 50 100.00
V2 random_length_in_transaction usbdev_random_length_in_transaction 1.730s 238.187us 50 50 100.00
V2 out_stall usbdev_out_stall 1.730s 246.434us 50 50 100.00
V2 in_stall usbdev_in_stall 1.550s 204.462us 50 50 100.00
V2 out_iso usbdev_out_iso 1.690s 217.543us 50 50 100.00
V2 in_iso usbdev_in_iso 2.240s 236.904us 50 50 100.00
V2 pkt_received usbdev_pkt_received 1.750s 252.924us 50 50 100.00
V2 pkt_sent usbdev_pkt_sent 1.830s 230.423us 50 50 100.00
V2 disconnected usbdev_disconnected 1.580s 185.178us 50 50 100.00
V2 host_lost usbdev_host_lost 14.630s 4.167ms 1 1 100.00
V2 link_reset usbdev_link_reset 1.570s 235.136us 1 1 100.00
V2 link_suspend usbdev_link_suspend 23.300s 8.422ms 50 50 100.00
V2 link_resume usbdev_link_resume 1.118m 27.860ms 50 50 100.00
V2 av_empty usbdev_av_empty 1.640s 185.718us 5 5 100.00
V2 rx_full usbdev_rx_full 2.330s 340.731us 50 50 100.00
V2 av_overflow usbdev_av_overflow 1.360s 139.927us 5 5 100.00
V2 link_in_err usbdev_link_in_err 1.770s 288.030us 50 50 100.00
V2 rx_crc_err usbdev_rx_crc_err 1.670s 263.334us 50 50 100.00
V2 rx_pid_err usbdev_rx_pid_err 1.820s 251.155us 5 5 100.00
V2 rx_bitstuff_err usbdev_bitstuff_err 1.530s 204.311us 50 50 100.00
V2 link_out_err usbdev_link_out_err 2.370s 500.393us 1 1 100.00
V2 enable usbdev_enable 1.260s 92.194us 50 50 100.00
V2 resume_link_active usbdev_resume_link_active 31.440s 20.159ms 20 20 100.00
V2 device_address usbdev_device_address 1.712m 51.417ms 50 50 100.00
V2 invalid_data1_data0_toggle_test usbdev_invalid_data1_data0_toggle_test 2.640s 485.102us 1 1 100.00
V2 setup_stage usbdev_setup_stage 1.600s 217.244us 50 50 100.00
V2 endpoint_access usbdev_endpoint_access 4.160s 939.938us 50 50 100.00
V2 disable_endpoint usbdev_disable_endpoint 4.490s 1.049ms 50 50 100.00
V2 endpoint_types usbdev_endpoint_types 45.647s 186 200 93.00
V2 out_trans_nak usbdev_out_trans_nak 1.700s 213.629us 50 50 100.00
V2 setup_trans_ignored usbdev_setup_trans_ignored 1.590s 183.647us 50 50 100.00
V2 nak_trans usbdev_nak_trans 1.730s 221.341us 50 50 100.00
V2 stall_trans usbdev_stall_trans 1.620s 189.825us 50 50 100.00
V2 setup_priority_over_stall_response usbdev_setup_priority_over_stall_response 1.630s 243.565us 5 5 100.00
V2 stall_priority_over_nak usbdev_stall_priority_over_nak 1.620s 202.090us 50 50 100.00
V2 pending_in_trans usbdev_pending_in_trans 1.640s 201.702us 50 50 100.00
V2 streaming_test usbdev_streaming_out 1.701m 3.911ms 50 50 100.00
V2 max_clock_error_untracked usbdev_freq_hiclk 3.198m 101.218ms 5 5 100.00
usbdev_freq_loclk 3.559m 116.119ms 5 5 100.00
V2 max_clock_error_tracking usbdev_freq_hiclk_max 3.672m 119.222ms 5 5 100.00
usbdev_freq_loclk_max 3.456m 100.042ms 5 5 100.00
V2 max_phase_error usbdev_freq_phase 3.570m 100.117ms 5 5 100.00
V2 min_inter_pkt_delay usbdev_min_inter_pkt_delay 2.091m 4.362ms 50 50 100.00
V2 max_inter_pkt_delay usbdev_max_inter_pkt_delay 1.459m 3.314ms 50 50 100.00
V2 device_timeout_missing_host_handshake usbdev_timeout_missing_host_handshake 1.010m 7.045ms 50 50 100.00
V2 device_timeout usbdev_device_timeout 51.400s 5.719ms 50 50 100.00
V2 packet_buffer usbdev_pkt_buffer 1.193m 22.693ms 50 50 100.00
V2 nak_to_out_trans_when_avbuffer_empty_rxfifo_full usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full 2.180s 515.487us 1 1 100.00
V2 aon_wake_resume usbdev_aon_wake_resume 57.620s 31.118ms 50 50 100.00
V2 aon_wake_reset usbdev_aon_wake_reset 38.280s 20.598ms 50 50 100.00
V2 aon_wake_disconnect usbdev_aon_wake_disconnect 23.480s 11.226ms 50 50 100.00
V2 invalid_sync usbdev_invalid_sync 2.574m 5.685ms 50 50 100.00
V2 spurious_pids_ignored usbdev_spurious_pids_ignored 1.474m 3.328ms 50 50 100.00
V2 low_speed_traffic usbdev_low_speed_traffic 2.463m 5.362ms 50 50 100.00
V2 rand_bus_resets usbdev_rand_bus_resets 1.754m 4.330ms 10 10 100.00
V2 rand_disconnects usbdev_rand_bus_disconnects 2.803m 10.257ms 10 10 100.00
V2 rand_suspends usbdev_rand_suspends 3.330m 10.366ms 10 10 100.00
V2 max_usb_traffic usbdev_max_non_iso_usb_traffic 1.828m 3.932ms 25 25 100.00
usbdev_max_usb_traffic 1.563m 3.054ms 15 15 100.00
V2 stress_usb_traffic usbdev_stress_usb_traffic 6.011m 16.525ms 10 10 100.00
V2 in_packet_retraction usbdev_iso_retraction 2.773m 13.210ms 50 50 100.00
V2 data_toggle_restore usbdev_data_toggle_restore 6.040s 1.306ms 50 50 100.00
V2 setup_priority usbdev_setup_priority 2.810s 467.256us 5 5 100.00
V2 fifo_resets usbdev_fifo_rst 4.130s 541.442us 50 50 100.00
V2 tx_rx_disruption usbdev_tx_rx_disruption 50.476s 467 500 93.40
V2 fifo_levels usbdev_fifo_levels 52.755s 147 160 91.88
V2 intr_test usbdev_intr_test 26.068s 46 50 92.00
V2 alert_test usbdev_alert_test 1.190s 75.418us 50 50 100.00
V2 tl_d_oob_addr_access usbdev_tl_errors 24.250s 19 20 95.00
V2 tl_d_illegal_access usbdev_tl_errors 24.250s 19 20 95.00
V2 tl_d_outstanding_access usbdev_csr_hw_reset 1.020s 119.348us 5 5 100.00
usbdev_csr_rw 23.227s 19 20 95.00
usbdev_csr_aliasing 3.320s 401.563us 5 5 100.00
usbdev_same_csr_outstanding 23.557s 19 20 95.00
V2 tl_d_partial_access usbdev_csr_hw_reset 1.020s 119.348us 5 5 100.00
usbdev_csr_rw 23.227s 19 20 95.00
usbdev_csr_aliasing 3.320s 401.563us 5 5 100.00
usbdev_same_csr_outstanding 23.557s 19 20 95.00
V2 TOTAL 3698 3764 98.25
V2S tl_intg_err usbdev_sec_cm 2.470s 556.083us 5 5 100.00
usbdev_tl_intg_err 6.300s 2.388ms 20 20 100.00
V2S sec_cm_bus_integrity usbdev_tl_intg_err 6.300s 2.388ms 20 20 100.00
V2S TOTAL 25 25 100.00
V3 dpi_config_host usbdev_dpi_config_host 49.880s 5.116ms 1 1 100.00
V3 TOTAL 1 1 100.00
Unmapped tests usbdev_stress_all_with_rand_reset 1.110s 71.917us 0 10 0.00
usbdev_stress_all 0.910s 0 50 0.00
TOTAL 3837 3965 96.77

Testplan Progress

Items Total Written Passing Progress
N.A. 2 2 0 0.00
V1 8 8 6 75.00
V2 86 86 80 93.02
V2S 2 2 2 100.00
V3 1 1 1 100.00

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
97.41 98.23 96.03 97.44 94.92 98.42 98.21 98.64

Failure Buckets

Past Results