| T1265 |
/workspace/coverage/cover_reg_top/7.xbar_smoke_large_delays.1882147215 |
|
|
Dec 27 01:41:19 PM PST 23 |
Dec 27 01:42:35 PM PST 23 |
6784618151 ps |
| T1266 |
/workspace/coverage/cover_reg_top/42.xbar_access_same_device.798169278 |
|
|
Dec 27 01:44:45 PM PST 23 |
Dec 27 01:45:10 PM PST 23 |
223066986 ps |
| T1267 |
/workspace/coverage/cover_reg_top/48.xbar_access_same_device_slow_rsp.1633326936 |
|
|
Dec 27 01:45:36 PM PST 23 |
Dec 27 02:15:21 PM PST 23 |
110419354053 ps |
| T1268 |
/workspace/coverage/cover_reg_top/52.xbar_smoke_large_delays.1204042161 |
|
|
Dec 27 01:45:39 PM PST 23 |
Dec 27 01:46:59 PM PST 23 |
7389756100 ps |
| T1269 |
/workspace/coverage/cover_reg_top/99.xbar_random_zero_delays.1514947196 |
|
|
Dec 27 01:49:56 PM PST 23 |
Dec 27 01:50:14 PM PST 23 |
138480581 ps |
| T260 |
/workspace/coverage/cover_reg_top/24.chip_tl_errors.1455798121 |
|
|
Dec 27 01:43:20 PM PST 23 |
Dec 27 01:46:22 PM PST 23 |
3333632250 ps |
| T1270 |
/workspace/coverage/cover_reg_top/16.chip_same_csr_outstanding.1375455326 |
|
|
Dec 27 01:42:50 PM PST 23 |
Dec 27 02:33:22 PM PST 23 |
33049502110 ps |
| T1271 |
/workspace/coverage/cover_reg_top/2.chip_csr_aliasing.1851582315 |
|
|
Dec 27 01:40:37 PM PST 23 |
Dec 27 04:15:27 PM PST 23 |
62060847050 ps |
| T1272 |
/workspace/coverage/cover_reg_top/16.xbar_random_large_delays.1060499034 |
|
|
Dec 27 01:42:11 PM PST 23 |
Dec 27 01:55:17 PM PST 23 |
70339073899 ps |
| T1273 |
/workspace/coverage/cover_reg_top/7.xbar_smoke_zero_delays.2942012157 |
|
|
Dec 27 01:41:44 PM PST 23 |
Dec 27 01:41:51 PM PST 23 |
39481549 ps |
| T1274 |
/workspace/coverage/cover_reg_top/7.xbar_smoke.1934038428 |
|
|
Dec 27 01:41:21 PM PST 23 |
Dec 27 01:41:27 PM PST 23 |
44514901 ps |
| T1275 |
/workspace/coverage/cover_reg_top/90.xbar_smoke_slow_rsp.1125952946 |
|
|
Dec 27 01:50:08 PM PST 23 |
Dec 27 01:51:45 PM PST 23 |
5514112848 ps |
| T1276 |
/workspace/coverage/cover_reg_top/54.xbar_same_source.2967594125 |
|
|
Dec 27 01:46:11 PM PST 23 |
Dec 27 01:46:25 PM PST 23 |
385874187 ps |
| T1277 |
/workspace/coverage/cover_reg_top/58.xbar_stress_all_with_reset_error.3423642510 |
|
|
Dec 27 01:47:31 PM PST 23 |
Dec 27 01:56:37 PM PST 23 |
12847098474 ps |
| T1278 |
/workspace/coverage/cover_reg_top/12.xbar_access_same_device_slow_rsp.3019541511 |
|
|
Dec 27 01:41:42 PM PST 23 |
Dec 27 01:57:36 PM PST 23 |
53441283548 ps |
| T1279 |
/workspace/coverage/cover_reg_top/21.xbar_random_slow_rsp.4289183944 |
|
|
Dec 27 01:42:54 PM PST 23 |
Dec 27 01:47:39 PM PST 23 |
16676830617 ps |
| T1280 |
/workspace/coverage/cover_reg_top/44.xbar_unmapped_addr.99091193 |
|
|
Dec 27 01:44:47 PM PST 23 |
Dec 27 01:45:03 PM PST 23 |
370110676 ps |
| T1281 |
/workspace/coverage/cover_reg_top/93.xbar_smoke_zero_delays.1574940747 |
|
|
Dec 27 01:49:32 PM PST 23 |
Dec 27 01:49:40 PM PST 23 |
53499676 ps |
| T1282 |
/workspace/coverage/cover_reg_top/82.xbar_random.3079279341 |
|
|
Dec 27 01:48:31 PM PST 23 |
Dec 27 01:49:12 PM PST 23 |
526880407 ps |
| T1283 |
/workspace/coverage/cover_reg_top/93.xbar_random.1168021954 |
|
|
Dec 27 01:51:52 PM PST 23 |
Dec 27 01:52:01 PM PST 23 |
175241913 ps |
| T1284 |
/workspace/coverage/cover_reg_top/10.xbar_stress_all_with_rand_reset.612909822 |
|
|
Dec 27 01:41:56 PM PST 23 |
Dec 27 01:44:01 PM PST 23 |
330124066 ps |
| T1285 |
/workspace/coverage/cover_reg_top/21.xbar_error_random.3077022660 |
|
|
Dec 27 01:42:57 PM PST 23 |
Dec 27 01:43:47 PM PST 23 |
1584724722 ps |
| T1286 |
/workspace/coverage/cover_reg_top/39.xbar_stress_all_with_rand_reset.141445608 |
|
|
Dec 27 01:44:36 PM PST 23 |
Dec 27 01:51:42 PM PST 23 |
2723986952 ps |
| T1287 |
/workspace/coverage/cover_reg_top/90.xbar_error_random.2849284902 |
|
|
Dec 27 01:49:19 PM PST 23 |
Dec 27 01:50:14 PM PST 23 |
609454888 ps |
| T1288 |
/workspace/coverage/cover_reg_top/32.xbar_random_zero_delays.2700081055 |
|
|
Dec 27 01:44:02 PM PST 23 |
Dec 27 01:44:48 PM PST 23 |
551385114 ps |
| T1289 |
/workspace/coverage/cover_reg_top/35.xbar_stress_all_with_reset_error.4099549000 |
|
|
Dec 27 01:44:49 PM PST 23 |
Dec 27 01:45:29 PM PST 23 |
198723062 ps |
| T1290 |
/workspace/coverage/cover_reg_top/40.xbar_error_random.1084462214 |
|
|
Dec 27 01:45:00 PM PST 23 |
Dec 27 01:45:24 PM PST 23 |
537924893 ps |
| T1291 |
/workspace/coverage/cover_reg_top/20.xbar_smoke.835450866 |
|
|
Dec 27 01:42:49 PM PST 23 |
Dec 27 01:42:56 PM PST 23 |
43441957 ps |
| T1292 |
/workspace/coverage/cover_reg_top/78.xbar_random_large_delays.2109220660 |
|
|
Dec 27 01:47:50 PM PST 23 |
Dec 27 02:06:51 PM PST 23 |
105250071642 ps |
| T1293 |
/workspace/coverage/cover_reg_top/2.xbar_unmapped_addr.2800153648 |
|
|
Dec 27 01:40:35 PM PST 23 |
Dec 27 01:40:42 PM PST 23 |
66073765 ps |
| T1294 |
/workspace/coverage/cover_reg_top/41.xbar_error_random.478922865 |
|
|
Dec 27 01:44:42 PM PST 23 |
Dec 27 01:46:26 PM PST 23 |
2628687136 ps |
| T1295 |
/workspace/coverage/cover_reg_top/42.xbar_random_slow_rsp.3483639072 |
|
|
Dec 27 01:44:48 PM PST 23 |
Dec 27 02:01:19 PM PST 23 |
57688763342 ps |
| T1296 |
/workspace/coverage/cover_reg_top/30.xbar_random_large_delays.2170836160 |
|
|
Dec 27 01:43:35 PM PST 23 |
Dec 27 01:54:45 PM PST 23 |
63159812885 ps |
| T1297 |
/workspace/coverage/cover_reg_top/80.xbar_random_slow_rsp.2173001740 |
|
|
Dec 27 01:48:54 PM PST 23 |
Dec 27 02:04:07 PM PST 23 |
56490553103 ps |
| T1298 |
/workspace/coverage/cover_reg_top/43.xbar_stress_all.735909058 |
|
|
Dec 27 01:44:46 PM PST 23 |
Dec 27 01:48:58 PM PST 23 |
3200955455 ps |
| T1299 |
/workspace/coverage/cover_reg_top/41.xbar_stress_all_with_rand_reset.3122806794 |
|
|
Dec 27 01:45:00 PM PST 23 |
Dec 27 01:49:13 PM PST 23 |
974667465 ps |
| T1300 |
/workspace/coverage/cover_reg_top/91.xbar_access_same_device.3121762250 |
|
|
Dec 27 01:49:10 PM PST 23 |
Dec 27 01:49:43 PM PST 23 |
375390868 ps |
| T1301 |
/workspace/coverage/cover_reg_top/99.xbar_smoke_large_delays.587053758 |
|
|
Dec 27 01:49:38 PM PST 23 |
Dec 27 01:51:41 PM PST 23 |
10296587798 ps |
| T1302 |
/workspace/coverage/cover_reg_top/12.xbar_access_same_device.1701285150 |
|
|
Dec 27 01:42:15 PM PST 23 |
Dec 27 01:44:00 PM PST 23 |
2709506766 ps |
| T1303 |
/workspace/coverage/cover_reg_top/90.xbar_unmapped_addr.4010903658 |
|
|
Dec 27 01:49:16 PM PST 23 |
Dec 27 01:49:48 PM PST 23 |
216225187 ps |
| T1304 |
/workspace/coverage/cover_reg_top/85.xbar_same_source.1354688049 |
|
|
Dec 27 01:49:12 PM PST 23 |
Dec 27 01:49:36 PM PST 23 |
300395241 ps |
| T26 |
/workspace/coverage/cover_reg_top/4.chip_csr_hw_reset.357164320 |
|
|
Dec 27 01:40:28 PM PST 23 |
Dec 27 01:47:22 PM PST 23 |
6125555584 ps |
| T263 |
/workspace/coverage/cover_reg_top/4.chip_tl_errors.153624847 |
|
|
Dec 27 01:40:25 PM PST 23 |
Dec 27 01:44:38 PM PST 23 |
4002217904 ps |
| T1305 |
/workspace/coverage/cover_reg_top/47.xbar_unmapped_addr.2886717185 |
|
|
Dec 27 01:45:30 PM PST 23 |
Dec 27 01:45:40 PM PST 23 |
52492527 ps |
| T1306 |
/workspace/coverage/cover_reg_top/16.xbar_error_and_unmapped_addr.2523611390 |
|
|
Dec 27 01:42:12 PM PST 23 |
Dec 27 01:42:31 PM PST 23 |
433382833 ps |
| T1307 |
/workspace/coverage/cover_reg_top/83.xbar_unmapped_addr.1450263933 |
|
|
Dec 27 01:49:10 PM PST 23 |
Dec 27 01:49:56 PM PST 23 |
1066997157 ps |
| T1308 |
/workspace/coverage/cover_reg_top/35.xbar_random_zero_delays.1177011193 |
|
|
Dec 27 01:44:47 PM PST 23 |
Dec 27 01:45:20 PM PST 23 |
345190340 ps |
| T1309 |
/workspace/coverage/cover_reg_top/60.xbar_random_zero_delays.677523042 |
|
|
Dec 27 01:46:56 PM PST 23 |
Dec 27 01:47:28 PM PST 23 |
278142203 ps |
| T1310 |
/workspace/coverage/cover_reg_top/82.xbar_stress_all_with_error.4135941463 |
|
|
Dec 27 01:48:53 PM PST 23 |
Dec 27 01:51:08 PM PST 23 |
4535182737 ps |
| T1311 |
/workspace/coverage/cover_reg_top/43.xbar_stress_all_with_reset_error.2422192828 |
|
|
Dec 27 01:44:42 PM PST 23 |
Dec 27 01:50:30 PM PST 23 |
4793257207 ps |
| T1312 |
/workspace/coverage/cover_reg_top/79.xbar_stress_all.2543261546 |
|
|
Dec 27 01:48:32 PM PST 23 |
Dec 27 01:52:20 PM PST 23 |
3103968775 ps |
| T1313 |
/workspace/coverage/cover_reg_top/52.xbar_error_random.3133722446 |
|
|
Dec 27 01:45:47 PM PST 23 |
Dec 27 01:46:07 PM PST 23 |
194456410 ps |
| T1314 |
/workspace/coverage/cover_reg_top/24.xbar_same_source.4218567581 |
|
|
Dec 27 01:43:03 PM PST 23 |
Dec 27 01:43:33 PM PST 23 |
996533381 ps |
| T1315 |
/workspace/coverage/cover_reg_top/20.xbar_random_zero_delays.1827556732 |
|
|
Dec 27 01:42:39 PM PST 23 |
Dec 27 01:43:06 PM PST 23 |
308710796 ps |
| T1316 |
/workspace/coverage/cover_reg_top/77.xbar_stress_all_with_reset_error.3576757824 |
|
|
Dec 27 01:47:50 PM PST 23 |
Dec 27 01:50:22 PM PST 23 |
507103598 ps |
| T1317 |
/workspace/coverage/cover_reg_top/34.xbar_access_same_device.596087312 |
|
|
Dec 27 01:44:34 PM PST 23 |
Dec 27 01:44:54 PM PST 23 |
273163773 ps |
| T1318 |
/workspace/coverage/cover_reg_top/31.xbar_stress_all_with_error.1874572343 |
|
|
Dec 27 01:43:34 PM PST 23 |
Dec 27 01:46:23 PM PST 23 |
2316308094 ps |
| T1319 |
/workspace/coverage/cover_reg_top/72.xbar_error_random.2093192421 |
|
|
Dec 27 01:47:31 PM PST 23 |
Dec 27 01:48:14 PM PST 23 |
570711206 ps |
| T1320 |
/workspace/coverage/cover_reg_top/8.chip_same_csr_outstanding.3903190184 |
|
|
Dec 27 01:42:14 PM PST 23 |
Dec 27 02:05:59 PM PST 23 |
15012814330 ps |
| T1321 |
/workspace/coverage/cover_reg_top/0.xbar_error_and_unmapped_addr.2107804414 |
|
|
Dec 27 01:40:37 PM PST 23 |
Dec 27 01:40:52 PM PST 23 |
315795273 ps |
| T1322 |
/workspace/coverage/cover_reg_top/88.xbar_smoke.245951790 |
|
|
Dec 27 01:49:30 PM PST 23 |
Dec 27 01:49:39 PM PST 23 |
125127273 ps |
| T1323 |
/workspace/coverage/cover_reg_top/3.xbar_smoke.1697278051 |
|
|
Dec 27 01:40:26 PM PST 23 |
Dec 27 01:40:34 PM PST 23 |
52226195 ps |
| T1324 |
/workspace/coverage/cover_reg_top/90.xbar_stress_all_with_reset_error.224315677 |
|
|
Dec 27 01:49:34 PM PST 23 |
Dec 27 02:00:33 PM PST 23 |
6615062633 ps |
| T1325 |
/workspace/coverage/cover_reg_top/19.xbar_random_large_delays.219233054 |
|
|
Dec 27 01:42:54 PM PST 23 |
Dec 27 02:01:14 PM PST 23 |
106947424065 ps |
| T1326 |
/workspace/coverage/cover_reg_top/91.xbar_same_source.1952021428 |
|
|
Dec 27 01:49:13 PM PST 23 |
Dec 27 01:49:37 PM PST 23 |
295317698 ps |
| T1327 |
/workspace/coverage/cover_reg_top/26.xbar_random_slow_rsp.172737583 |
|
|
Dec 27 01:43:10 PM PST 23 |
Dec 27 01:52:59 PM PST 23 |
33391102819 ps |
| T1328 |
/workspace/coverage/cover_reg_top/24.xbar_smoke_zero_delays.3472733812 |
|
|
Dec 27 01:43:21 PM PST 23 |
Dec 27 01:43:28 PM PST 23 |
40479923 ps |
| T23 |
/workspace/coverage/cover_reg_top/2.chip_csr_hw_reset.2247459588 |
|
|
Dec 27 01:40:27 PM PST 23 |
Dec 27 01:46:57 PM PST 23 |
6772845690 ps |
| T1329 |
/workspace/coverage/cover_reg_top/97.xbar_random_zero_delays.1489987533 |
|
|
Dec 27 01:49:33 PM PST 23 |
Dec 27 01:49:47 PM PST 23 |
122055817 ps |
| T1330 |
/workspace/coverage/cover_reg_top/70.xbar_access_same_device_slow_rsp.729911189 |
|
|
Dec 27 01:47:27 PM PST 23 |
Dec 27 02:29:18 PM PST 23 |
143700478957 ps |
| T1331 |
/workspace/coverage/cover_reg_top/17.xbar_smoke_zero_delays.1854930428 |
|
|
Dec 27 01:42:54 PM PST 23 |
Dec 27 01:43:01 PM PST 23 |
39670085 ps |
| T1332 |
/workspace/coverage/cover_reg_top/96.xbar_smoke.2860405571 |
|
|
Dec 27 01:49:30 PM PST 23 |
Dec 27 01:49:41 PM PST 23 |
201471881 ps |
| T1333 |
/workspace/coverage/cover_reg_top/18.xbar_error_random.1421542483 |
|
|
Dec 27 01:42:58 PM PST 23 |
Dec 27 01:43:07 PM PST 23 |
160349628 ps |
| T1334 |
/workspace/coverage/cover_reg_top/89.xbar_same_source.3023228745 |
|
|
Dec 27 01:49:35 PM PST 23 |
Dec 27 01:50:06 PM PST 23 |
354140055 ps |
| T1335 |
/workspace/coverage/cover_reg_top/25.xbar_error_random.2119983973 |
|
|
Dec 27 01:43:04 PM PST 23 |
Dec 27 01:43:54 PM PST 23 |
590533970 ps |
| T1336 |
/workspace/coverage/cover_reg_top/89.xbar_access_same_device_slow_rsp.3143272278 |
|
|
Dec 27 01:49:58 PM PST 23 |
Dec 27 02:25:23 PM PST 23 |
125818878253 ps |
| T1337 |
/workspace/coverage/cover_reg_top/18.xbar_same_source.419982392 |
|
|
Dec 27 01:43:23 PM PST 23 |
Dec 27 01:43:48 PM PST 23 |
340637305 ps |
| T1338 |
/workspace/coverage/cover_reg_top/71.xbar_error_random.869154592 |
|
|
Dec 27 01:47:34 PM PST 23 |
Dec 27 01:48:28 PM PST 23 |
1404704317 ps |
| T1339 |
/workspace/coverage/cover_reg_top/59.xbar_random.3470404455 |
|
|
Dec 27 01:47:27 PM PST 23 |
Dec 27 01:48:07 PM PST 23 |
459833446 ps |
| T1340 |
/workspace/coverage/cover_reg_top/98.xbar_error_and_unmapped_addr.2855464093 |
|
|
Dec 27 01:49:40 PM PST 23 |
Dec 27 01:50:02 PM PST 23 |
201424882 ps |
| T1341 |
/workspace/coverage/cover_reg_top/60.xbar_error_and_unmapped_addr.3435602464 |
|
|
Dec 27 01:46:57 PM PST 23 |
Dec 27 01:47:35 PM PST 23 |
352673967 ps |
| T1342 |
/workspace/coverage/cover_reg_top/28.xbar_smoke.4205144914 |
|
|
Dec 27 01:43:03 PM PST 23 |
Dec 27 01:43:13 PM PST 23 |
192516486 ps |
| T1343 |
/workspace/coverage/cover_reg_top/71.xbar_access_same_device_slow_rsp.1323599514 |
|
|
Dec 27 01:47:40 PM PST 23 |
Dec 27 02:02:05 PM PST 23 |
50321083552 ps |
| T1344 |
/workspace/coverage/cover_reg_top/87.xbar_stress_all_with_rand_reset.1264062769 |
|
|
Dec 27 01:49:13 PM PST 23 |
Dec 27 01:57:01 PM PST 23 |
6070424488 ps |
| T1345 |
/workspace/coverage/cover_reg_top/56.xbar_random_slow_rsp.3883891597 |
|
|
Dec 27 01:47:30 PM PST 23 |
Dec 27 01:56:16 PM PST 23 |
31246892686 ps |
| T1346 |
/workspace/coverage/cover_reg_top/45.xbar_random.1611473107 |
|
|
Dec 27 01:45:22 PM PST 23 |
Dec 27 01:46:24 PM PST 23 |
1915303069 ps |
| T1347 |
/workspace/coverage/cover_reg_top/84.xbar_stress_all_with_reset_error.3647112695 |
|
|
Dec 27 01:48:42 PM PST 23 |
Dec 27 01:52:53 PM PST 23 |
899705293 ps |
| T1348 |
/workspace/coverage/cover_reg_top/63.xbar_error_random.438831128 |
|
|
Dec 27 01:46:37 PM PST 23 |
Dec 27 01:47:04 PM PST 23 |
328514399 ps |
| T1349 |
/workspace/coverage/cover_reg_top/1.xbar_error_random.989425614 |
|
|
Dec 27 01:40:32 PM PST 23 |
Dec 27 01:41:04 PM PST 23 |
357108902 ps |
| T1350 |
/workspace/coverage/cover_reg_top/75.xbar_random_zero_delays.1288220802 |
|
|
Dec 27 01:47:31 PM PST 23 |
Dec 27 01:47:46 PM PST 23 |
76551213 ps |
| T1351 |
/workspace/coverage/cover_reg_top/60.xbar_access_same_device.1089670578 |
|
|
Dec 27 01:46:56 PM PST 23 |
Dec 27 01:48:22 PM PST 23 |
1179723817 ps |
| T1352 |
/workspace/coverage/cover_reg_top/13.chip_csr_rw.2288014126 |
|
|
Dec 27 01:42:49 PM PST 23 |
Dec 27 01:55:27 PM PST 23 |
6359291872 ps |
| T1353 |
/workspace/coverage/cover_reg_top/36.xbar_random_zero_delays.2047911676 |
|
|
Dec 27 01:45:20 PM PST 23 |
Dec 27 01:46:04 PM PST 23 |
518272195 ps |
| T1354 |
/workspace/coverage/cover_reg_top/73.xbar_stress_all_with_rand_reset.2114865269 |
|
|
Dec 27 01:47:35 PM PST 23 |
Dec 27 01:53:03 PM PST 23 |
2089804028 ps |
| T262 |
/workspace/coverage/cover_reg_top/1.chip_tl_errors.4157034069 |
|
|
Dec 27 01:40:39 PM PST 23 |
Dec 27 01:44:01 PM PST 23 |
3789737677 ps |
| T1355 |
/workspace/coverage/cover_reg_top/30.xbar_stress_all_with_reset_error.683040342 |
|
|
Dec 27 01:43:34 PM PST 23 |
Dec 27 01:50:59 PM PST 23 |
9088757487 ps |
| T1356 |
/workspace/coverage/cover_reg_top/92.xbar_same_source.1974280045 |
|
|
Dec 27 01:49:31 PM PST 23 |
Dec 27 01:50:17 PM PST 23 |
1447027100 ps |
| T1357 |
/workspace/coverage/cover_reg_top/33.xbar_error_and_unmapped_addr.480951483 |
|
|
Dec 27 01:44:29 PM PST 23 |
Dec 27 01:44:35 PM PST 23 |
51074148 ps |
| T1358 |
/workspace/coverage/cover_reg_top/78.xbar_stress_all_with_reset_error.714969758 |
|
|
Dec 27 01:48:14 PM PST 23 |
Dec 27 01:48:30 PM PST 23 |
55635641 ps |
| T1359 |
/workspace/coverage/cover_reg_top/82.xbar_smoke.3078413074 |
|
|
Dec 27 01:49:42 PM PST 23 |
Dec 27 01:49:51 PM PST 23 |
50121652 ps |
| T1360 |
/workspace/coverage/cover_reg_top/48.xbar_random_large_delays.906502535 |
|
|
Dec 27 01:45:30 PM PST 23 |
Dec 27 02:02:25 PM PST 23 |
97624442021 ps |
| T1361 |
/workspace/coverage/cover_reg_top/16.xbar_random_slow_rsp.2346651793 |
|
|
Dec 27 01:42:15 PM PST 23 |
Dec 27 01:50:27 PM PST 23 |
28850293870 ps |
| T1362 |
/workspace/coverage/cover_reg_top/3.xbar_stress_all_with_error.3868390308 |
|
|
Dec 27 01:40:23 PM PST 23 |
Dec 27 01:45:54 PM PST 23 |
8538505691 ps |
| T1363 |
/workspace/coverage/cover_reg_top/65.xbar_error_and_unmapped_addr.3410435659 |
|
|
Dec 27 01:47:04 PM PST 23 |
Dec 27 01:47:57 PM PST 23 |
1384694696 ps |
| T1364 |
/workspace/coverage/cover_reg_top/4.chip_csr_bit_bash.2726680220 |
|
|
Dec 27 01:40:31 PM PST 23 |
Dec 27 03:15:18 PM PST 23 |
63198223472 ps |
| T1365 |
/workspace/coverage/cover_reg_top/37.xbar_same_source.2835768682 |
|
|
Dec 27 01:45:27 PM PST 23 |
Dec 27 01:46:01 PM PST 23 |
458208246 ps |
| T1366 |
/workspace/coverage/cover_reg_top/39.xbar_access_same_device_slow_rsp.836310319 |
|
|
Dec 27 01:44:55 PM PST 23 |
Dec 27 01:59:18 PM PST 23 |
48494693068 ps |
| T1367 |
/workspace/coverage/cover_reg_top/24.xbar_error_and_unmapped_addr.1578242543 |
|
|
Dec 27 01:43:23 PM PST 23 |
Dec 27 01:43:58 PM PST 23 |
874189779 ps |
| T1368 |
/workspace/coverage/cover_reg_top/71.xbar_error_and_unmapped_addr.3252766714 |
|
|
Dec 27 01:47:32 PM PST 23 |
Dec 27 01:48:01 PM PST 23 |
528137002 ps |
| T1369 |
/workspace/coverage/cover_reg_top/78.xbar_random.1549760786 |
|
|
Dec 27 01:47:56 PM PST 23 |
Dec 27 01:48:36 PM PST 23 |
441684977 ps |
| T1370 |
/workspace/coverage/cover_reg_top/30.xbar_random_zero_delays.689483647 |
|
|
Dec 27 01:43:57 PM PST 23 |
Dec 27 01:44:18 PM PST 23 |
196580777 ps |
| T1371 |
/workspace/coverage/cover_reg_top/94.xbar_stress_all_with_error.2829271747 |
|
|
Dec 27 01:49:44 PM PST 23 |
Dec 27 01:50:04 PM PST 23 |
199178776 ps |
| T1372 |
/workspace/coverage/cover_reg_top/46.xbar_smoke_slow_rsp.3754221196 |
|
|
Dec 27 01:45:00 PM PST 23 |
Dec 27 01:46:51 PM PST 23 |
6596173604 ps |
| T1373 |
/workspace/coverage/cover_reg_top/5.xbar_random_large_delays.1143550897 |
|
|
Dec 27 01:40:30 PM PST 23 |
Dec 27 01:50:11 PM PST 23 |
54504787916 ps |
| T1374 |
/workspace/coverage/cover_reg_top/89.xbar_unmapped_addr.170474893 |
|
|
Dec 27 01:49:45 PM PST 23 |
Dec 27 01:50:13 PM PST 23 |
630012989 ps |
| T1375 |
/workspace/coverage/cover_reg_top/6.xbar_stress_all_with_rand_reset.2521116407 |
|
|
Dec 27 01:40:52 PM PST 23 |
Dec 27 01:42:09 PM PST 23 |
187497336 ps |
| T1376 |
/workspace/coverage/cover_reg_top/37.xbar_stress_all_with_rand_reset.3276972836 |
|
|
Dec 27 01:45:00 PM PST 23 |
Dec 27 01:50:11 PM PST 23 |
715899970 ps |
| T1377 |
/workspace/coverage/cover_reg_top/60.xbar_stress_all_with_error.506469097 |
|
|
Dec 27 01:46:32 PM PST 23 |
Dec 27 01:47:39 PM PST 23 |
815786146 ps |
| T1378 |
/workspace/coverage/cover_reg_top/50.xbar_smoke_slow_rsp.1213797524 |
|
|
Dec 27 01:46:22 PM PST 23 |
Dec 27 01:48:15 PM PST 23 |
6463757554 ps |
| T1379 |
/workspace/coverage/cover_reg_top/88.xbar_stress_all_with_rand_reset.974418846 |
|
|
Dec 27 01:49:10 PM PST 23 |
Dec 27 01:54:33 PM PST 23 |
1363309006 ps |
| T1380 |
/workspace/coverage/cover_reg_top/77.xbar_random_zero_delays.2061555006 |
|
|
Dec 27 01:47:52 PM PST 23 |
Dec 27 01:48:12 PM PST 23 |
218693012 ps |
| T1381 |
/workspace/coverage/cover_reg_top/69.xbar_smoke_large_delays.2973195506 |
|
|
Dec 27 01:47:31 PM PST 23 |
Dec 27 01:48:52 PM PST 23 |
7277369509 ps |
| T1382 |
/workspace/coverage/cover_reg_top/45.xbar_smoke_zero_delays.566000957 |
|
|
Dec 27 01:45:27 PM PST 23 |
Dec 27 01:45:35 PM PST 23 |
55253239 ps |
| T1383 |
/workspace/coverage/cover_reg_top/93.xbar_random_large_delays.1584486457 |
|
|
Dec 27 01:49:42 PM PST 23 |
Dec 27 02:03:05 PM PST 23 |
70523645904 ps |
| T1384 |
/workspace/coverage/cover_reg_top/4.xbar_smoke.4074212820 |
|
|
Dec 27 01:40:25 PM PST 23 |
Dec 27 01:40:35 PM PST 23 |
205638924 ps |
| T1385 |
/workspace/coverage/cover_reg_top/68.xbar_stress_all_with_rand_reset.2593932247 |
|
|
Dec 27 01:47:32 PM PST 23 |
Dec 27 01:53:43 PM PST 23 |
1522047440 ps |
| T1386 |
/workspace/coverage/cover_reg_top/69.xbar_stress_all_with_reset_error.2953493082 |
|
|
Dec 27 01:47:31 PM PST 23 |
Dec 27 01:50:29 PM PST 23 |
437538109 ps |
| T1387 |
/workspace/coverage/cover_reg_top/2.xbar_access_same_device.2283388515 |
|
|
Dec 27 01:40:36 PM PST 23 |
Dec 27 01:42:21 PM PST 23 |
3120852953 ps |
| T1388 |
/workspace/coverage/cover_reg_top/40.xbar_random.3985621450 |
|
|
Dec 27 01:45:23 PM PST 23 |
Dec 27 01:45:39 PM PST 23 |
186201677 ps |
| T1389 |
/workspace/coverage/cover_reg_top/64.xbar_random_slow_rsp.134244756 |
|
|
Dec 27 01:46:33 PM PST 23 |
Dec 27 01:54:53 PM PST 23 |
27268009721 ps |
| T1390 |
/workspace/coverage/cover_reg_top/15.chip_csr_rw.2312063938 |
|
|
Dec 27 01:41:52 PM PST 23 |
Dec 27 01:50:41 PM PST 23 |
5874494800 ps |
| T1391 |
/workspace/coverage/cover_reg_top/44.xbar_error_and_unmapped_addr.3892271048 |
|
|
Dec 27 01:45:31 PM PST 23 |
Dec 27 01:45:44 PM PST 23 |
87142106 ps |
| T1392 |
/workspace/coverage/cover_reg_top/89.xbar_random.1156462213 |
|
|
Dec 27 01:49:35 PM PST 23 |
Dec 27 01:50:38 PM PST 23 |
1454552760 ps |
| T1393 |
/workspace/coverage/cover_reg_top/5.xbar_error_random.716607568 |
|
|
Dec 27 01:40:43 PM PST 23 |
Dec 27 01:41:26 PM PST 23 |
1358696215 ps |
| T1394 |
/workspace/coverage/cover_reg_top/11.chip_csr_mem_rw_with_rand_reset.1123694017 |
|
|
Dec 27 01:42:11 PM PST 23 |
Dec 27 01:48:12 PM PST 23 |
7143664952 ps |
| T1395 |
/workspace/coverage/cover_reg_top/11.xbar_smoke_slow_rsp.1110551005 |
|
|
Dec 27 01:42:15 PM PST 23 |
Dec 27 01:43:54 PM PST 23 |
5513701842 ps |
| T1396 |
/workspace/coverage/cover_reg_top/95.xbar_random_zero_delays.968146246 |
|
|
Dec 27 01:49:29 PM PST 23 |
Dec 27 01:50:27 PM PST 23 |
645422505 ps |
| T1397 |
/workspace/coverage/cover_reg_top/3.xbar_access_same_device_slow_rsp.539222097 |
|
|
Dec 27 01:40:32 PM PST 23 |
Dec 27 02:07:47 PM PST 23 |
93663928388 ps |
| T1398 |
/workspace/coverage/cover_reg_top/3.xbar_random.1693983732 |
|
|
Dec 27 01:40:31 PM PST 23 |
Dec 27 01:40:48 PM PST 23 |
388420695 ps |
| T1399 |
/workspace/coverage/cover_reg_top/3.xbar_same_source.1162950075 |
|
|
Dec 27 01:40:32 PM PST 23 |
Dec 27 01:41:01 PM PST 23 |
341932205 ps |
| T1400 |
/workspace/coverage/cover_reg_top/22.xbar_error_and_unmapped_addr.1426706629 |
|
|
Dec 27 01:43:22 PM PST 23 |
Dec 27 01:43:34 PM PST 23 |
108406683 ps |
| T1401 |
/workspace/coverage/cover_reg_top/94.xbar_smoke_slow_rsp.3172880548 |
|
|
Dec 27 01:49:41 PM PST 23 |
Dec 27 01:51:08 PM PST 23 |
4942775419 ps |
| T1402 |
/workspace/coverage/cover_reg_top/53.xbar_stress_all_with_error.2470305514 |
|
|
Dec 27 01:45:59 PM PST 23 |
Dec 27 01:51:26 PM PST 23 |
10048196644 ps |
| T1403 |
/workspace/coverage/cover_reg_top/67.xbar_error_and_unmapped_addr.227849615 |
|
|
Dec 27 01:47:40 PM PST 23 |
Dec 27 01:48:05 PM PST 23 |
521423893 ps |
| T241 |
/workspace/coverage/cover_reg_top/93.xbar_stress_all_with_error.427579148 |
|
|
Dec 27 01:49:41 PM PST 23 |
Dec 27 01:54:28 PM PST 23 |
4088322211 ps |
| T1404 |
/workspace/coverage/cover_reg_top/81.xbar_random_zero_delays.1453657026 |
|
|
Dec 27 01:48:56 PM PST 23 |
Dec 27 01:49:30 PM PST 23 |
436786067 ps |
| T1405 |
/workspace/coverage/cover_reg_top/57.xbar_smoke.1235487858 |
|
|
Dec 27 01:47:33 PM PST 23 |
Dec 27 01:47:49 PM PST 23 |
229839814 ps |
| T1406 |
/workspace/coverage/cover_reg_top/25.xbar_stress_all.515746379 |
|
|
Dec 27 01:42:58 PM PST 23 |
Dec 27 01:45:18 PM PST 23 |
1810640505 ps |
| T1407 |
/workspace/coverage/cover_reg_top/90.xbar_error_and_unmapped_addr.3239375313 |
|
|
Dec 27 01:49:35 PM PST 23 |
Dec 27 01:50:12 PM PST 23 |
817093495 ps |
| T1408 |
/workspace/coverage/cover_reg_top/91.xbar_smoke_large_delays.3887828491 |
|
|
Dec 27 01:49:18 PM PST 23 |
Dec 27 01:51:03 PM PST 23 |
8342666920 ps |
| T1409 |
/workspace/coverage/cover_reg_top/62.xbar_smoke_slow_rsp.3196371114 |
|
|
Dec 27 01:46:29 PM PST 23 |
Dec 27 01:47:59 PM PST 23 |
5260249859 ps |
| T1410 |
/workspace/coverage/cover_reg_top/17.xbar_stress_all_with_rand_reset.93231014 |
|
|
Dec 27 01:43:25 PM PST 23 |
Dec 27 01:47:23 PM PST 23 |
874482662 ps |
| T1411 |
/workspace/coverage/cover_reg_top/23.xbar_stress_all_with_reset_error.1335118557 |
|
|
Dec 27 01:43:17 PM PST 23 |
Dec 27 01:44:30 PM PST 23 |
341563520 ps |
| T1412 |
/workspace/coverage/cover_reg_top/65.xbar_smoke_slow_rsp.2913234473 |
|
|
Dec 27 01:47:07 PM PST 23 |
Dec 27 01:48:36 PM PST 23 |
5449341493 ps |
| T33 |
/workspace/coverage/cover_reg_top/3.chip_csr_bit_bash.3399264150 |
|
|
Dec 27 01:40:34 PM PST 23 |
Dec 27 01:47:58 PM PST 23 |
4861311272 ps |
| T1413 |
/workspace/coverage/cover_reg_top/11.xbar_smoke_large_delays.3012976425 |
|
|
Dec 27 01:42:16 PM PST 23 |
Dec 27 01:44:05 PM PST 23 |
9569501165 ps |
| T1414 |
/workspace/coverage/cover_reg_top/84.xbar_smoke_zero_delays.375490521 |
|
|
Dec 27 01:48:54 PM PST 23 |
Dec 27 01:49:01 PM PST 23 |
52618903 ps |
| T1415 |
/workspace/coverage/cover_reg_top/66.xbar_stress_all_with_error.3518681031 |
|
|
Dec 27 01:47:26 PM PST 23 |
Dec 27 01:48:15 PM PST 23 |
1467719624 ps |
| T1416 |
/workspace/coverage/cover_reg_top/44.xbar_smoke_slow_rsp.2334747233 |
|
|
Dec 27 01:44:47 PM PST 23 |
Dec 27 01:46:21 PM PST 23 |
5284203934 ps |
| T1417 |
/workspace/coverage/cover_reg_top/87.xbar_random_large_delays.3978257586 |
|
|
Dec 27 01:49:13 PM PST 23 |
Dec 27 02:07:39 PM PST 23 |
98937714856 ps |
| T1418 |
/workspace/coverage/cover_reg_top/56.xbar_smoke.4089572474 |
|
|
Dec 27 01:47:01 PM PST 23 |
Dec 27 01:47:14 PM PST 23 |
216051718 ps |
| T1419 |
/workspace/coverage/cover_reg_top/2.xbar_same_source.3172472132 |
|
|
Dec 27 01:40:35 PM PST 23 |
Dec 27 01:41:19 PM PST 23 |
1465153135 ps |
| T1420 |
/workspace/coverage/cover_reg_top/20.xbar_smoke_zero_delays.1493890932 |
|
|
Dec 27 01:42:13 PM PST 23 |
Dec 27 01:42:20 PM PST 23 |
58617494 ps |
| T1421 |
/workspace/coverage/cover_reg_top/73.xbar_smoke_slow_rsp.1627996849 |
|
|
Dec 27 01:47:30 PM PST 23 |
Dec 27 01:49:15 PM PST 23 |
5713142220 ps |
| T1422 |
/workspace/coverage/cover_reg_top/1.xbar_smoke_large_delays.4184323993 |
|
|
Dec 27 01:40:29 PM PST 23 |
Dec 27 01:42:05 PM PST 23 |
8632417389 ps |
| T1423 |
/workspace/coverage/cover_reg_top/65.xbar_access_same_device.3032998945 |
|
|
Dec 27 01:47:22 PM PST 23 |
Dec 27 01:47:49 PM PST 23 |
288286236 ps |
| T238 |
/workspace/coverage/cover_reg_top/15.xbar_stress_all_with_reset_error.1496042886 |
|
|
Dec 27 01:41:53 PM PST 23 |
Dec 27 01:52:49 PM PST 23 |
9019500507 ps |
| T1424 |
/workspace/coverage/cover_reg_top/23.xbar_random_large_delays.3186449047 |
|
|
Dec 27 01:43:13 PM PST 23 |
Dec 27 01:59:29 PM PST 23 |
81844972985 ps |
| T1425 |
/workspace/coverage/cover_reg_top/67.xbar_error_random.1323405418 |
|
|
Dec 27 01:47:40 PM PST 23 |
Dec 27 01:47:55 PM PST 23 |
131873166 ps |
| T1426 |
/workspace/coverage/cover_reg_top/57.xbar_smoke_zero_delays.2939114468 |
|
|
Dec 27 01:47:29 PM PST 23 |
Dec 27 01:47:36 PM PST 23 |
45929252 ps |
| T1427 |
/workspace/coverage/cover_reg_top/60.xbar_smoke_large_delays.3832287852 |
|
|
Dec 27 01:46:33 PM PST 23 |
Dec 27 01:48:02 PM PST 23 |
8049339344 ps |
| T1428 |
/workspace/coverage/cover_reg_top/52.xbar_smoke_slow_rsp.3346934985 |
|
|
Dec 27 01:45:42 PM PST 23 |
Dec 27 01:46:55 PM PST 23 |
4147138374 ps |
| T264 |
/workspace/coverage/cover_reg_top/0.chip_csr_mem_rw_with_rand_reset.2199737931 |
|
|
Dec 27 01:40:34 PM PST 23 |
Dec 27 01:44:25 PM PST 23 |
4023524511 ps |
| T1429 |
/workspace/coverage/cover_reg_top/39.xbar_access_same_device.3767570277 |
|
|
Dec 27 01:44:46 PM PST 23 |
Dec 27 01:45:06 PM PST 23 |
213884200 ps |
| T1430 |
/workspace/coverage/cover_reg_top/34.xbar_error_and_unmapped_addr.287443285 |
|
|
Dec 27 01:44:55 PM PST 23 |
Dec 27 01:45:15 PM PST 23 |
138175632 ps |
| T1431 |
/workspace/coverage/cover_reg_top/23.xbar_smoke_slow_rsp.3006718153 |
|
|
Dec 27 01:43:11 PM PST 23 |
Dec 27 01:45:06 PM PST 23 |
6778724004 ps |
| T1432 |
/workspace/coverage/cover_reg_top/38.xbar_access_same_device_slow_rsp.3812325663 |
|
|
Dec 27 01:44:50 PM PST 23 |
Dec 27 01:56:05 PM PST 23 |
39897766238 ps |
| T1433 |
/workspace/coverage/cover_reg_top/50.xbar_stress_all_with_reset_error.120210447 |
|
|
Dec 27 01:46:00 PM PST 23 |
Dec 27 01:50:56 PM PST 23 |
3639846801 ps |
| T1434 |
/workspace/coverage/cover_reg_top/91.xbar_stress_all_with_error.1569101508 |
|
|
Dec 27 01:49:34 PM PST 23 |
Dec 27 01:53:50 PM PST 23 |
3291411883 ps |
| T1435 |
/workspace/coverage/cover_reg_top/27.xbar_stress_all_with_rand_reset.808561973 |
|
|
Dec 27 01:43:22 PM PST 23 |
Dec 27 01:43:55 PM PST 23 |
98065454 ps |
| T1436 |
/workspace/coverage/cover_reg_top/35.xbar_smoke_slow_rsp.66807987 |
|
|
Dec 27 01:44:45 PM PST 23 |
Dec 27 01:45:47 PM PST 23 |
3720307328 ps |
| T1437 |
/workspace/coverage/cover_reg_top/42.xbar_random_zero_delays.167033797 |
|
|
Dec 27 01:45:01 PM PST 23 |
Dec 27 01:45:52 PM PST 23 |
569596873 ps |
| T1438 |
/workspace/coverage/cover_reg_top/77.xbar_random_slow_rsp.1446981333 |
|
|
Dec 27 01:47:46 PM PST 23 |
Dec 27 02:03:14 PM PST 23 |
54859605298 ps |
| T1439 |
/workspace/coverage/cover_reg_top/9.xbar_error_and_unmapped_addr.257222075 |
|
|
Dec 27 01:41:24 PM PST 23 |
Dec 27 01:42:01 PM PST 23 |
977469236 ps |
| T1440 |
/workspace/coverage/cover_reg_top/37.xbar_access_same_device_slow_rsp.4176397244 |
|
|
Dec 27 01:44:49 PM PST 23 |
Dec 27 02:16:06 PM PST 23 |
116944272654 ps |
| T1441 |
/workspace/coverage/cover_reg_top/22.xbar_random_large_delays.2425914023 |
|
|
Dec 27 01:42:58 PM PST 23 |
Dec 27 01:47:57 PM PST 23 |
30800401906 ps |
| T1442 |
/workspace/coverage/cover_reg_top/28.xbar_error_and_unmapped_addr.3100327087 |
|
|
Dec 27 01:43:56 PM PST 23 |
Dec 27 01:44:21 PM PST 23 |
244218548 ps |
| T1443 |
/workspace/coverage/cover_reg_top/0.xbar_smoke.3353974916 |
|
|
Dec 27 01:40:26 PM PST 23 |
Dec 27 01:40:34 PM PST 23 |
190255178 ps |
| T1444 |
/workspace/coverage/cover_reg_top/40.xbar_stress_all.3348402525 |
|
|
Dec 27 01:45:26 PM PST 23 |
Dec 27 01:57:22 PM PST 23 |
20209363985 ps |
| T1445 |
/workspace/coverage/cover_reg_top/35.xbar_stress_all.1001445325 |
|
|
Dec 27 01:44:47 PM PST 23 |
Dec 27 01:48:59 PM PST 23 |
6105812923 ps |
| T1446 |
/workspace/coverage/cover_reg_top/45.xbar_stress_all_with_rand_reset.3754161578 |
|
|
Dec 27 01:44:48 PM PST 23 |
Dec 27 01:52:06 PM PST 23 |
5885179985 ps |
| T1447 |
/workspace/coverage/cover_reg_top/46.xbar_stress_all_with_rand_reset.656938501 |
|
|
Dec 27 01:44:51 PM PST 23 |
Dec 27 01:46:39 PM PST 23 |
435733092 ps |
| T1448 |
/workspace/coverage/cover_reg_top/28.xbar_smoke_large_delays.72294181 |
|
|
Dec 27 01:43:20 PM PST 23 |
Dec 27 01:44:24 PM PST 23 |
6125642968 ps |
| T1449 |
/workspace/coverage/cover_reg_top/83.xbar_error_random.1889887350 |
|
|
Dec 27 01:49:06 PM PST 23 |
Dec 27 01:50:03 PM PST 23 |
1804338371 ps |
| T1450 |
/workspace/coverage/cover_reg_top/92.xbar_random_slow_rsp.1461234670 |
|
|
Dec 27 01:49:12 PM PST 23 |
Dec 27 02:01:30 PM PST 23 |
42514475144 ps |
| T1451 |
/workspace/coverage/cover_reg_top/58.xbar_random_slow_rsp.2158244418 |
|
|
Dec 27 01:47:00 PM PST 23 |
Dec 27 02:06:06 PM PST 23 |
62256330600 ps |
| T1452 |
/workspace/coverage/cover_reg_top/8.xbar_random_zero_delays.1047940122 |
|
|
Dec 27 01:41:17 PM PST 23 |
Dec 27 01:42:07 PM PST 23 |
605338888 ps |
| T1453 |
/workspace/coverage/cover_reg_top/83.xbar_random.3549945237 |
|
|
Dec 27 01:48:55 PM PST 23 |
Dec 27 01:49:49 PM PST 23 |
1667512501 ps |
| T1454 |
/workspace/coverage/cover_reg_top/1.xbar_smoke_slow_rsp.1627406693 |
|
|
Dec 27 01:40:28 PM PST 23 |
Dec 27 01:41:58 PM PST 23 |
4918433501 ps |
| T1455 |
/workspace/coverage/cover_reg_top/30.xbar_access_same_device_slow_rsp.3762507590 |
|
|
Dec 27 01:43:31 PM PST 23 |
Dec 27 02:17:49 PM PST 23 |
129639741135 ps |
| T1456 |
/workspace/coverage/cover_reg_top/28.xbar_stress_all_with_rand_reset.2678646411 |
|
|
Dec 27 01:43:40 PM PST 23 |
Dec 27 01:48:30 PM PST 23 |
618341262 ps |
| T1457 |
/workspace/coverage/cover_reg_top/87.xbar_random.181588686 |
|
|
Dec 27 01:49:44 PM PST 23 |
Dec 27 01:50:18 PM PST 23 |
360289806 ps |
| T1458 |
/workspace/coverage/cover_reg_top/95.xbar_error_random.2524593502 |
|
|
Dec 27 01:49:27 PM PST 23 |
Dec 27 01:50:46 PM PST 23 |
2346412075 ps |
| T1459 |
/workspace/coverage/cover_reg_top/87.xbar_error_random.3961996410 |
|
|
Dec 27 01:49:08 PM PST 23 |
Dec 27 01:49:30 PM PST 23 |
579445053 ps |
| T1460 |
/workspace/coverage/cover_reg_top/93.xbar_same_source.1919939248 |
|
|
Dec 27 01:49:40 PM PST 23 |
Dec 27 01:51:04 PM PST 23 |
2658346238 ps |
| T45 |
/workspace/coverage/cover_reg_top/0.chip_rv_dm_lc_disabled.2885593900 |
|
|
Dec 27 01:40:27 PM PST 23 |
Dec 27 01:48:05 PM PST 23 |
9231772187 ps |
| T1461 |
/workspace/coverage/cover_reg_top/52.xbar_access_same_device.4293949912 |
|
|
Dec 27 01:45:41 PM PST 23 |
Dec 27 01:45:54 PM PST 23 |
124081548 ps |
| T1462 |
/workspace/coverage/cover_reg_top/12.chip_same_csr_outstanding.89203350 |
|
|
Dec 27 01:41:57 PM PST 23 |
Dec 27 02:07:46 PM PST 23 |
15712263320 ps |
| T1463 |
/workspace/coverage/cover_reg_top/10.xbar_stress_all_with_error.2507172356 |
|
|
Dec 27 01:42:10 PM PST 23 |
Dec 27 01:44:29 PM PST 23 |
1836432647 ps |
| T1464 |
/workspace/coverage/cover_reg_top/33.xbar_same_source.402530918 |
|
|
Dec 27 01:44:33 PM PST 23 |
Dec 27 01:44:52 PM PST 23 |
243284134 ps |
| T1465 |
/workspace/coverage/cover_reg_top/99.xbar_stress_all.810345618 |
|
|
Dec 27 01:50:02 PM PST 23 |
Dec 27 01:53:26 PM PST 23 |
2015319993 ps |
| T1466 |
/workspace/coverage/cover_reg_top/23.xbar_random_slow_rsp.3446900908 |
|
|
Dec 27 01:43:05 PM PST 23 |
Dec 27 01:55:57 PM PST 23 |
44079869325 ps |
| T1467 |
/workspace/coverage/cover_reg_top/93.xbar_stress_all.160886148 |
|
|
Dec 27 01:49:29 PM PST 23 |
Dec 27 01:54:07 PM PST 23 |
3501835832 ps |
| T1468 |
/workspace/coverage/cover_reg_top/95.xbar_smoke_zero_delays.1527807809 |
|
|
Dec 27 01:49:39 PM PST 23 |
Dec 27 01:49:48 PM PST 23 |
52676030 ps |
| T1469 |
/workspace/coverage/cover_reg_top/36.xbar_random_large_delays.3903615923 |
|
|
Dec 27 01:45:28 PM PST 23 |
Dec 27 02:00:54 PM PST 23 |
89224565317 ps |
| T1470 |
/workspace/coverage/cover_reg_top/13.xbar_random_slow_rsp.3584277199 |
|
|
Dec 27 01:41:51 PM PST 23 |
Dec 27 01:59:30 PM PST 23 |
62396132127 ps |
| T1471 |
/workspace/coverage/cover_reg_top/10.xbar_error_random.572135996 |
|
|
Dec 27 01:41:54 PM PST 23 |
Dec 27 01:42:12 PM PST 23 |
400430189 ps |
| T1472 |
/workspace/coverage/cover_reg_top/48.xbar_smoke_large_delays.4160662623 |
|
|
Dec 27 01:45:36 PM PST 23 |
Dec 27 01:46:54 PM PST 23 |
7257364297 ps |
| T1473 |
/workspace/coverage/cover_reg_top/40.xbar_stress_all_with_error.1750483645 |
|
|
Dec 27 01:45:27 PM PST 23 |
Dec 27 01:50:48 PM PST 23 |
9185694704 ps |
| T1474 |
/workspace/coverage/cover_reg_top/15.xbar_smoke_zero_delays.2147938119 |
|
|
Dec 27 01:41:47 PM PST 23 |
Dec 27 01:41:53 PM PST 23 |
42872819 ps |
| T1475 |
/workspace/coverage/cover_reg_top/10.xbar_smoke_zero_delays.595616266 |
|
|
Dec 27 01:41:44 PM PST 23 |
Dec 27 01:41:50 PM PST 23 |
48774616 ps |
| T1476 |
/workspace/coverage/cover_reg_top/4.xbar_error_random.2904656097 |
|
|
Dec 27 01:40:39 PM PST 23 |
Dec 27 01:41:13 PM PST 23 |
378340501 ps |
| T1477 |
/workspace/coverage/cover_reg_top/80.xbar_stress_all.674768770 |
|
|
Dec 27 01:49:27 PM PST 23 |
Dec 27 01:50:59 PM PST 23 |
2748456849 ps |
| T1478 |
/workspace/coverage/cover_reg_top/17.xbar_stress_all_with_error.307749816 |
|
|
Dec 27 01:43:11 PM PST 23 |
Dec 27 01:45:32 PM PST 23 |
3916256839 ps |
| T1479 |
/workspace/coverage/cover_reg_top/18.xbar_random_large_delays.1706178234 |
|
|
Dec 27 01:42:13 PM PST 23 |
Dec 27 01:52:28 PM PST 23 |
66014036659 ps |
| T1480 |
/workspace/coverage/cover_reg_top/34.xbar_stress_all.1895124913 |
|
|
Dec 27 01:44:47 PM PST 23 |
Dec 27 01:47:39 PM PST 23 |
4294194900 ps |
| T1481 |
/workspace/coverage/cover_reg_top/70.xbar_smoke_large_delays.974137489 |
|
|
Dec 27 01:47:31 PM PST 23 |
Dec 27 01:49:19 PM PST 23 |
9623821868 ps |
| T1482 |
/workspace/coverage/cover_reg_top/6.xbar_access_same_device_slow_rsp.2378054800 |
|
|
Dec 27 01:41:14 PM PST 23 |
Dec 27 01:55:58 PM PST 23 |
51053325082 ps |
| T1483 |
/workspace/coverage/cover_reg_top/64.xbar_unmapped_addr.950386406 |
|
|
Dec 27 01:46:46 PM PST 23 |
Dec 27 01:47:14 PM PST 23 |
240043813 ps |
| T1484 |
/workspace/coverage/cover_reg_top/66.xbar_random.536066780 |
|
|
Dec 27 01:47:26 PM PST 23 |
Dec 27 01:47:57 PM PST 23 |
300227813 ps |
| T1485 |
/workspace/coverage/cover_reg_top/24.xbar_stress_all_with_error.1073431247 |
|
|
Dec 27 01:43:02 PM PST 23 |
Dec 27 01:45:47 PM PST 23 |
2072684131 ps |
| T1486 |
/workspace/coverage/cover_reg_top/32.xbar_random_large_delays.1099514238 |
|
|
Dec 27 01:43:39 PM PST 23 |
Dec 27 01:57:11 PM PST 23 |
80269495382 ps |
| T1487 |
/workspace/coverage/cover_reg_top/9.chip_csr_mem_rw_with_rand_reset.2468025080 |
|
|
Dec 27 01:41:50 PM PST 23 |
Dec 27 01:48:00 PM PST 23 |
8166618575 ps |
| T1488 |
/workspace/coverage/cover_reg_top/73.xbar_smoke_zero_delays.2869920492 |
|
|
Dec 27 01:47:34 PM PST 23 |
Dec 27 01:47:45 PM PST 23 |
42079081 ps |
| T1489 |
/workspace/coverage/cover_reg_top/15.xbar_access_same_device.106269742 |
|
|
Dec 27 01:41:53 PM PST 23 |
Dec 27 01:43:49 PM PST 23 |
2855496985 ps |
| T1490 |
/workspace/coverage/cover_reg_top/76.xbar_same_source.179124974 |
|
|
Dec 27 01:47:44 PM PST 23 |
Dec 27 01:47:56 PM PST 23 |
126997846 ps |
| T1491 |
/workspace/coverage/cover_reg_top/23.xbar_smoke.2230065194 |
|
|
Dec 27 01:43:08 PM PST 23 |
Dec 27 01:43:15 PM PST 23 |
55005032 ps |
| T1492 |
/workspace/coverage/cover_reg_top/90.xbar_smoke_large_delays.70489216 |
|
|
Dec 27 01:50:06 PM PST 23 |
Dec 27 01:51:31 PM PST 23 |
7792261813 ps |
| T1493 |
/workspace/coverage/cover_reg_top/44.xbar_stress_all.84947974 |
|
|
Dec 27 01:45:32 PM PST 23 |
Dec 27 01:48:33 PM PST 23 |
2480411117 ps |
| T1494 |
/workspace/coverage/cover_reg_top/64.xbar_random.1076103484 |
|
|
Dec 27 01:47:06 PM PST 23 |
Dec 27 01:48:16 PM PST 23 |
1744499098 ps |
| T1495 |
/workspace/coverage/cover_reg_top/51.xbar_random_slow_rsp.3293541870 |
|
|
Dec 27 01:45:36 PM PST 23 |
Dec 27 01:57:12 PM PST 23 |
44361270506 ps |
| T1496 |
/workspace/coverage/cover_reg_top/69.xbar_same_source.2147978196 |
|
|
Dec 27 01:47:28 PM PST 23 |
Dec 27 01:48:43 PM PST 23 |
2500566792 ps |
| T1497 |
/workspace/coverage/cover_reg_top/62.xbar_stress_all.1583495550 |
|
|
Dec 27 01:47:29 PM PST 23 |
Dec 27 01:50:20 PM PST 23 |
2307990764 ps |
| T1498 |
/workspace/coverage/cover_reg_top/92.xbar_smoke_zero_delays.1379258334 |
|
|
Dec 27 01:49:40 PM PST 23 |
Dec 27 01:49:50 PM PST 23 |
53778312 ps |
| T1499 |
/workspace/coverage/cover_reg_top/71.xbar_stress_all_with_rand_reset.64892495 |
|
|
Dec 27 01:47:39 PM PST 23 |
Dec 27 01:48:21 PM PST 23 |
72749199 ps |
| T1500 |
/workspace/coverage/cover_reg_top/11.xbar_stress_all_with_reset_error.629856763 |
|
|
Dec 27 01:41:51 PM PST 23 |
Dec 27 01:45:45 PM PST 23 |
3167441793 ps |
| T1501 |
/workspace/coverage/cover_reg_top/14.xbar_same_source.3663407807 |
|
|
Dec 27 01:42:17 PM PST 23 |
Dec 27 01:42:52 PM PST 23 |
440965941 ps |
| T1502 |
/workspace/coverage/cover_reg_top/99.xbar_smoke.1583877771 |
|
|
Dec 27 01:49:43 PM PST 23 |
Dec 27 01:49:52 PM PST 23 |
40660242 ps |
| T1503 |
/workspace/coverage/cover_reg_top/14.xbar_random_zero_delays.3379686085 |
|
|
Dec 27 01:42:42 PM PST 23 |
Dec 27 01:42:59 PM PST 23 |
117633804 ps |
| T1504 |
/workspace/coverage/cover_reg_top/54.xbar_access_same_device_slow_rsp.3307139942 |
|
|
Dec 27 01:46:12 PM PST 23 |
Dec 27 02:09:03 PM PST 23 |
86172749631 ps |