| T1505 |
/workspace/coverage/cover_reg_top/77.xbar_smoke_large_delays.3046300788 |
|
|
Dec 27 01:47:58 PM PST 23 |
Dec 27 01:48:54 PM PST 23 |
5323987461 ps |
| T1506 |
/workspace/coverage/cover_reg_top/79.xbar_error_random.3224441077 |
|
|
Dec 27 01:48:41 PM PST 23 |
Dec 27 01:48:48 PM PST 23 |
36752660 ps |
| T1507 |
/workspace/coverage/cover_reg_top/47.xbar_stress_all_with_rand_reset.2705091074 |
|
|
Dec 27 01:45:29 PM PST 23 |
Dec 27 01:47:08 PM PST 23 |
286669080 ps |
| T1508 |
/workspace/coverage/cover_reg_top/44.xbar_access_same_device.3882863029 |
|
|
Dec 27 01:45:29 PM PST 23 |
Dec 27 01:46:32 PM PST 23 |
1506500829 ps |
| T1509 |
/workspace/coverage/cover_reg_top/88.xbar_access_same_device.4085535865 |
|
|
Dec 27 01:49:14 PM PST 23 |
Dec 27 01:50:09 PM PST 23 |
1448884575 ps |
| T1510 |
/workspace/coverage/cover_reg_top/21.xbar_access_same_device_slow_rsp.3231151159 |
|
|
Dec 27 01:43:07 PM PST 23 |
Dec 27 02:10:27 PM PST 23 |
90811480298 ps |
| T1511 |
/workspace/coverage/cover_reg_top/16.xbar_same_source.3850766148 |
|
|
Dec 27 01:42:11 PM PST 23 |
Dec 27 01:43:12 PM PST 23 |
2269360157 ps |
| T1512 |
/workspace/coverage/cover_reg_top/75.xbar_smoke.1038097624 |
|
|
Dec 27 01:48:01 PM PST 23 |
Dec 27 01:48:11 PM PST 23 |
221142002 ps |
| T24 |
/workspace/coverage/cover_reg_top/0.chip_csr_hw_reset.3624768122 |
|
|
Dec 27 01:40:36 PM PST 23 |
Dec 27 01:46:40 PM PST 23 |
6422528502 ps |
| T1513 |
/workspace/coverage/cover_reg_top/66.xbar_error_and_unmapped_addr.3964731885 |
|
|
Dec 27 01:47:31 PM PST 23 |
Dec 27 01:47:53 PM PST 23 |
191701323 ps |
| T1514 |
/workspace/coverage/cover_reg_top/30.xbar_smoke.788705891 |
|
|
Dec 27 01:43:31 PM PST 23 |
Dec 27 01:43:41 PM PST 23 |
231008117 ps |
| T1515 |
/workspace/coverage/cover_reg_top/29.xbar_stress_all_with_reset_error.674336591 |
|
|
Dec 27 01:43:37 PM PST 23 |
Dec 27 01:50:43 PM PST 23 |
9281608863 ps |
| T1516 |
/workspace/coverage/cover_reg_top/42.xbar_unmapped_addr.529347953 |
|
|
Dec 27 01:44:49 PM PST 23 |
Dec 27 01:45:41 PM PST 23 |
1177934649 ps |
| T1517 |
/workspace/coverage/cover_reg_top/3.xbar_random_large_delays.1366323025 |
|
|
Dec 27 01:40:32 PM PST 23 |
Dec 27 02:02:49 PM PST 23 |
114119425215 ps |
| T1518 |
/workspace/coverage/cover_reg_top/31.xbar_smoke_large_delays.1392441181 |
|
|
Dec 27 01:43:56 PM PST 23 |
Dec 27 01:45:26 PM PST 23 |
8773270414 ps |
| T1519 |
/workspace/coverage/cover_reg_top/99.xbar_unmapped_addr.3346826519 |
|
|
Dec 27 01:50:09 PM PST 23 |
Dec 27 01:50:38 PM PST 23 |
700357931 ps |
| T1520 |
/workspace/coverage/cover_reg_top/8.chip_csr_mem_rw_with_rand_reset.1817390328 |
|
|
Dec 27 01:41:18 PM PST 23 |
Dec 27 01:45:23 PM PST 23 |
6289531783 ps |
| T1521 |
/workspace/coverage/cover_reg_top/95.xbar_smoke.1494734812 |
|
|
Dec 27 01:49:42 PM PST 23 |
Dec 27 01:49:55 PM PST 23 |
223203129 ps |
| T1522 |
/workspace/coverage/cover_reg_top/77.xbar_stress_all_with_rand_reset.2316162729 |
|
|
Dec 27 01:47:54 PM PST 23 |
Dec 27 01:55:54 PM PST 23 |
3501904600 ps |
| T1523 |
/workspace/coverage/cover_reg_top/71.xbar_unmapped_addr.1375055149 |
|
|
Dec 27 01:47:34 PM PST 23 |
Dec 27 01:48:29 PM PST 23 |
1174725890 ps |
| T1524 |
/workspace/coverage/cover_reg_top/77.xbar_error_random.599917797 |
|
|
Dec 27 01:47:47 PM PST 23 |
Dec 27 01:48:28 PM PST 23 |
560140494 ps |
| T1525 |
/workspace/coverage/cover_reg_top/0.chip_same_csr_outstanding.1567428631 |
|
|
Dec 27 01:40:33 PM PST 23 |
Dec 27 02:38:29 PM PST 23 |
30133649527 ps |
| T1526 |
/workspace/coverage/cover_reg_top/87.xbar_access_same_device.1959551480 |
|
|
Dec 27 01:49:09 PM PST 23 |
Dec 27 01:50:09 PM PST 23 |
1590698540 ps |
| T1527 |
/workspace/coverage/cover_reg_top/22.xbar_access_same_device.3718775479 |
|
|
Dec 27 01:43:00 PM PST 23 |
Dec 27 01:44:21 PM PST 23 |
1979947798 ps |
| T1528 |
/workspace/coverage/cover_reg_top/96.xbar_smoke_zero_delays.2360721388 |
|
|
Dec 27 01:49:28 PM PST 23 |
Dec 27 01:49:35 PM PST 23 |
45394804 ps |
| T1529 |
/workspace/coverage/cover_reg_top/78.xbar_stress_all_with_rand_reset.4054781733 |
|
|
Dec 27 01:48:31 PM PST 23 |
Dec 27 01:50:24 PM PST 23 |
615979839 ps |
| T1530 |
/workspace/coverage/cover_reg_top/94.xbar_smoke_large_delays.1658138018 |
|
|
Dec 27 01:49:28 PM PST 23 |
Dec 27 01:50:50 PM PST 23 |
7484236025 ps |
| T1531 |
/workspace/coverage/cover_reg_top/54.xbar_random.464381561 |
|
|
Dec 27 01:45:59 PM PST 23 |
Dec 27 01:46:07 PM PST 23 |
135730194 ps |
| T1532 |
/workspace/coverage/cover_reg_top/45.xbar_stress_all.1864425800 |
|
|
Dec 27 01:44:49 PM PST 23 |
Dec 27 01:47:37 PM PST 23 |
3951018638 ps |
| T1533 |
/workspace/coverage/cover_reg_top/99.xbar_random.219244164 |
|
|
Dec 27 01:49:52 PM PST 23 |
Dec 27 01:50:07 PM PST 23 |
155846735 ps |
| T1534 |
/workspace/coverage/cover_reg_top/51.xbar_stress_all_with_reset_error.3291796450 |
|
|
Dec 27 01:45:38 PM PST 23 |
Dec 27 01:48:09 PM PST 23 |
578873338 ps |
| T1535 |
/workspace/coverage/cover_reg_top/76.xbar_random_large_delays.2146295052 |
|
|
Dec 27 01:47:41 PM PST 23 |
Dec 27 02:02:04 PM PST 23 |
79876625315 ps |
| T1536 |
/workspace/coverage/cover_reg_top/91.xbar_smoke_slow_rsp.824044037 |
|
|
Dec 27 01:49:35 PM PST 23 |
Dec 27 01:51:00 PM PST 23 |
4447784630 ps |
| T1537 |
/workspace/coverage/cover_reg_top/40.xbar_stress_all_with_rand_reset.3627438146 |
|
|
Dec 27 01:45:23 PM PST 23 |
Dec 27 01:57:07 PM PST 23 |
13027219199 ps |
| T1538 |
/workspace/coverage/cover_reg_top/95.xbar_same_source.844067572 |
|
|
Dec 27 01:49:28 PM PST 23 |
Dec 27 01:50:04 PM PST 23 |
1172650800 ps |
| T1539 |
/workspace/coverage/cover_reg_top/46.xbar_random_zero_delays.638451835 |
|
|
Dec 27 01:45:32 PM PST 23 |
Dec 27 01:45:45 PM PST 23 |
128677828 ps |
| T1540 |
/workspace/coverage/cover_reg_top/56.xbar_smoke_zero_delays.4155445371 |
|
|
Dec 27 01:46:41 PM PST 23 |
Dec 27 01:46:48 PM PST 23 |
41939919 ps |
| T1541 |
/workspace/coverage/cover_reg_top/49.xbar_random_zero_delays.3397831020 |
|
|
Dec 27 01:45:41 PM PST 23 |
Dec 27 01:46:24 PM PST 23 |
450022528 ps |
| T1542 |
/workspace/coverage/cover_reg_top/96.xbar_stress_all_with_reset_error.449954493 |
|
|
Dec 27 01:49:30 PM PST 23 |
Dec 27 01:50:28 PM PST 23 |
76001690 ps |
| T1543 |
/workspace/coverage/cover_reg_top/98.xbar_stress_all_with_error.1927441278 |
|
|
Dec 27 01:49:58 PM PST 23 |
Dec 27 01:51:57 PM PST 23 |
3398277909 ps |
| T1544 |
/workspace/coverage/cover_reg_top/28.xbar_stress_all_with_error.2469005377 |
|
|
Dec 27 01:43:40 PM PST 23 |
Dec 27 01:45:09 PM PST 23 |
1132077412 ps |
| T1545 |
/workspace/coverage/cover_reg_top/34.xbar_smoke_large_delays.2860839871 |
|
|
Dec 27 01:44:32 PM PST 23 |
Dec 27 01:45:52 PM PST 23 |
7812142853 ps |
| T1546 |
/workspace/coverage/cover_reg_top/12.xbar_random_slow_rsp.1223371577 |
|
|
Dec 27 01:41:46 PM PST 23 |
Dec 27 01:56:24 PM PST 23 |
55924430042 ps |
| T1547 |
/workspace/coverage/cover_reg_top/14.xbar_access_same_device.1566698430 |
|
|
Dec 27 01:42:09 PM PST 23 |
Dec 27 01:43:33 PM PST 23 |
2117122226 ps |
| T1548 |
/workspace/coverage/cover_reg_top/32.xbar_unmapped_addr.669145735 |
|
|
Dec 27 01:44:09 PM PST 23 |
Dec 27 01:45:03 PM PST 23 |
1282589317 ps |
| T1549 |
/workspace/coverage/cover_reg_top/68.xbar_unmapped_addr.2223589850 |
|
|
Dec 27 01:47:24 PM PST 23 |
Dec 27 01:48:11 PM PST 23 |
1157291351 ps |
| T1550 |
/workspace/coverage/cover_reg_top/94.xbar_smoke_zero_delays.2612673143 |
|
|
Dec 27 01:49:14 PM PST 23 |
Dec 27 01:49:21 PM PST 23 |
47370956 ps |
| T1551 |
/workspace/coverage/cover_reg_top/17.chip_tl_errors.1268139376 |
|
|
Dec 27 01:42:53 PM PST 23 |
Dec 27 01:48:59 PM PST 23 |
4935607400 ps |
| T1552 |
/workspace/coverage/cover_reg_top/25.xbar_error_and_unmapped_addr.467621521 |
|
|
Dec 27 01:43:20 PM PST 23 |
Dec 27 01:43:30 PM PST 23 |
166268995 ps |
| T1553 |
/workspace/coverage/cover_reg_top/55.xbar_random_slow_rsp.4118783142 |
|
|
Dec 27 01:46:17 PM PST 23 |
Dec 27 01:54:11 PM PST 23 |
28850377822 ps |
| T1554 |
/workspace/coverage/cover_reg_top/13.xbar_smoke_zero_delays.764945378 |
|
|
Dec 27 01:41:56 PM PST 23 |
Dec 27 01:42:03 PM PST 23 |
49457528 ps |
| T1555 |
/workspace/coverage/cover_reg_top/7.xbar_random_zero_delays.3884611197 |
|
|
Dec 27 01:41:17 PM PST 23 |
Dec 27 01:41:42 PM PST 23 |
280032696 ps |
| T1556 |
/workspace/coverage/cover_reg_top/73.xbar_unmapped_addr.193566304 |
|
|
Dec 27 01:47:33 PM PST 23 |
Dec 27 01:48:33 PM PST 23 |
1405025481 ps |
| T1557 |
/workspace/coverage/cover_reg_top/82.xbar_smoke_zero_delays.52437839 |
|
|
Dec 27 01:49:44 PM PST 23 |
Dec 27 01:49:53 PM PST 23 |
42375679 ps |
| T1558 |
/workspace/coverage/cover_reg_top/9.xbar_stress_all_with_rand_reset.4117477282 |
|
|
Dec 27 01:41:45 PM PST 23 |
Dec 27 01:42:44 PM PST 23 |
241063877 ps |
| T1559 |
/workspace/coverage/cover_reg_top/92.xbar_unmapped_addr.686667544 |
|
|
Dec 27 01:49:35 PM PST 23 |
Dec 27 01:50:08 PM PST 23 |
649746544 ps |
| T1560 |
/workspace/coverage/cover_reg_top/90.xbar_access_same_device_slow_rsp.523574641 |
|
|
Dec 27 01:49:42 PM PST 23 |
Dec 27 02:24:12 PM PST 23 |
138920082317 ps |
| T1561 |
/workspace/coverage/cover_reg_top/58.xbar_random_zero_delays.416939861 |
|
|
Dec 27 01:46:35 PM PST 23 |
Dec 27 01:47:02 PM PST 23 |
337372130 ps |
| T1562 |
/workspace/coverage/cover_reg_top/56.xbar_access_same_device_slow_rsp.3119605310 |
|
|
Dec 27 01:47:23 PM PST 23 |
Dec 27 02:02:41 PM PST 23 |
58811288801 ps |
| T1563 |
/workspace/coverage/cover_reg_top/6.xbar_random_zero_delays.791604011 |
|
|
Dec 27 01:41:16 PM PST 23 |
Dec 27 01:41:53 PM PST 23 |
400954012 ps |
| T1564 |
/workspace/coverage/cover_reg_top/1.xbar_random_slow_rsp.1682626177 |
|
|
Dec 27 01:40:25 PM PST 23 |
Dec 27 01:59:27 PM PST 23 |
63884504365 ps |
| T1565 |
/workspace/coverage/cover_reg_top/70.xbar_unmapped_addr.3729077445 |
|
|
Dec 27 01:47:26 PM PST 23 |
Dec 27 01:47:47 PM PST 23 |
164193732 ps |
| T1566 |
/workspace/coverage/cover_reg_top/1.xbar_stress_all_with_error.810400966 |
|
|
Dec 27 01:40:34 PM PST 23 |
Dec 27 01:45:26 PM PST 23 |
8765771173 ps |
| T1567 |
/workspace/coverage/cover_reg_top/60.xbar_smoke.3341733672 |
|
|
Dec 27 01:46:33 PM PST 23 |
Dec 27 01:46:39 PM PST 23 |
40212277 ps |
| T1568 |
/workspace/coverage/cover_reg_top/43.xbar_smoke_slow_rsp.2403510362 |
|
|
Dec 27 01:44:44 PM PST 23 |
Dec 27 01:46:31 PM PST 23 |
6425161890 ps |
| T1569 |
/workspace/coverage/cover_reg_top/19.xbar_smoke_zero_delays.1625630333 |
|
|
Dec 27 01:43:25 PM PST 23 |
Dec 27 01:43:33 PM PST 23 |
55026892 ps |
| T1570 |
/workspace/coverage/cover_reg_top/12.xbar_stress_all.4203474351 |
|
|
Dec 27 01:41:44 PM PST 23 |
Dec 27 01:43:49 PM PST 23 |
3530796032 ps |
| T1571 |
/workspace/coverage/cover_reg_top/43.xbar_smoke_large_delays.2251460278 |
|
|
Dec 27 01:44:43 PM PST 23 |
Dec 27 01:46:28 PM PST 23 |
9559353848 ps |
| T1572 |
/workspace/coverage/cover_reg_top/46.xbar_access_same_device_slow_rsp.1801637711 |
|
|
Dec 27 01:44:58 PM PST 23 |
Dec 27 02:24:49 PM PST 23 |
138149923515 ps |
| T1573 |
/workspace/coverage/cover_reg_top/58.xbar_access_same_device_slow_rsp.713709504 |
|
|
Dec 27 01:47:01 PM PST 23 |
Dec 27 01:57:26 PM PST 23 |
37518485433 ps |
| T1574 |
/workspace/coverage/cover_reg_top/48.xbar_unmapped_addr.1338428168 |
|
|
Dec 27 01:45:24 PM PST 23 |
Dec 27 01:46:27 PM PST 23 |
1232270289 ps |
| T1575 |
/workspace/coverage/cover_reg_top/36.xbar_smoke_large_delays.675435548 |
|
|
Dec 27 01:44:45 PM PST 23 |
Dec 27 01:46:16 PM PST 23 |
8301448419 ps |
| T1576 |
/workspace/coverage/cover_reg_top/34.xbar_random.3535102161 |
|
|
Dec 27 01:44:08 PM PST 23 |
Dec 27 01:44:40 PM PST 23 |
343079563 ps |
| T1577 |
/workspace/coverage/cover_reg_top/20.xbar_stress_all_with_rand_reset.1849179882 |
|
|
Dec 27 01:42:54 PM PST 23 |
Dec 27 01:58:06 PM PST 23 |
17247766224 ps |
| T1578 |
/workspace/coverage/cover_reg_top/19.xbar_stress_all_with_error.141703468 |
|
|
Dec 27 01:43:16 PM PST 23 |
Dec 27 01:51:51 PM PST 23 |
14127325854 ps |
| T1579 |
/workspace/coverage/cover_reg_top/96.xbar_same_source.2058437440 |
|
|
Dec 27 01:49:38 PM PST 23 |
Dec 27 01:50:35 PM PST 23 |
1986497004 ps |
| T1580 |
/workspace/coverage/cover_reg_top/89.xbar_error_and_unmapped_addr.863687757 |
|
|
Dec 27 01:50:02 PM PST 23 |
Dec 27 01:50:33 PM PST 23 |
266663760 ps |
| T1581 |
/workspace/coverage/cover_reg_top/57.xbar_access_same_device_slow_rsp.1904568293 |
|
|
Dec 27 01:46:12 PM PST 23 |
Dec 27 02:08:16 PM PST 23 |
85245300986 ps |
| T1582 |
/workspace/coverage/cover_reg_top/30.xbar_error_and_unmapped_addr.3092867132 |
|
|
Dec 27 01:43:34 PM PST 23 |
Dec 27 01:43:52 PM PST 23 |
471038433 ps |
| T1583 |
/workspace/coverage/cover_reg_top/26.xbar_access_same_device.88767622 |
|
|
Dec 27 01:43:12 PM PST 23 |
Dec 27 01:44:36 PM PST 23 |
1855568095 ps |
| T1584 |
/workspace/coverage/cover_reg_top/18.xbar_random.4235760392 |
|
|
Dec 27 01:42:50 PM PST 23 |
Dec 27 01:43:29 PM PST 23 |
352750048 ps |
| T1585 |
/workspace/coverage/cover_reg_top/76.xbar_access_same_device.2022678399 |
|
|
Dec 27 01:47:52 PM PST 23 |
Dec 27 01:48:50 PM PST 23 |
1345731004 ps |
| T1586 |
/workspace/coverage/cover_reg_top/85.xbar_error_random.626644751 |
|
|
Dec 27 01:48:57 PM PST 23 |
Dec 27 01:50:01 PM PST 23 |
1793347822 ps |
| T1587 |
/workspace/coverage/cover_reg_top/34.xbar_same_source.1102178034 |
|
|
Dec 27 01:44:44 PM PST 23 |
Dec 27 01:45:27 PM PST 23 |
1367028540 ps |
| T1588 |
/workspace/coverage/cover_reg_top/14.xbar_error_and_unmapped_addr.986706880 |
|
|
Dec 27 01:42:13 PM PST 23 |
Dec 27 01:42:46 PM PST 23 |
329854176 ps |
| T1589 |
/workspace/coverage/cover_reg_top/73.xbar_access_same_device.3090408381 |
|
|
Dec 27 01:47:30 PM PST 23 |
Dec 27 01:47:55 PM PST 23 |
492125982 ps |
| T1590 |
/workspace/coverage/cover_reg_top/97.xbar_smoke_zero_delays.264128319 |
|
|
Dec 27 01:49:36 PM PST 23 |
Dec 27 01:49:47 PM PST 23 |
58176508 ps |
| T1591 |
/workspace/coverage/cover_reg_top/88.xbar_random_large_delays.302933292 |
|
|
Dec 27 01:49:07 PM PST 23 |
Dec 27 01:55:52 PM PST 23 |
38386499196 ps |
| T1592 |
/workspace/coverage/cover_reg_top/15.xbar_random.3527339458 |
|
|
Dec 27 01:41:52 PM PST 23 |
Dec 27 01:42:33 PM PST 23 |
1072905226 ps |
| T1593 |
/workspace/coverage/cover_reg_top/46.xbar_random.1920831901 |
|
|
Dec 27 01:45:00 PM PST 23 |
Dec 27 01:45:48 PM PST 23 |
1342753555 ps |
| T1594 |
/workspace/coverage/cover_reg_top/20.xbar_random_large_delays.1991653620 |
|
|
Dec 27 01:42:36 PM PST 23 |
Dec 27 01:52:24 PM PST 23 |
52778313867 ps |
| T1595 |
/workspace/coverage/cover_reg_top/45.xbar_random_zero_delays.3277767077 |
|
|
Dec 27 01:45:29 PM PST 23 |
Dec 27 01:45:50 PM PST 23 |
206147007 ps |
| T1596 |
/workspace/coverage/cover_reg_top/65.xbar_random_large_delays.1790432924 |
|
|
Dec 27 01:46:59 PM PST 23 |
Dec 27 02:00:47 PM PST 23 |
76210836904 ps |
| T48 |
/workspace/coverage/cover_reg_top/2.chip_rv_dm_lc_disabled.4016506984 |
|
|
Dec 27 01:40:37 PM PST 23 |
Dec 27 01:44:47 PM PST 23 |
5773756929 ps |
| T1597 |
/workspace/coverage/cover_reg_top/91.xbar_random.662438432 |
|
|
Dec 27 01:49:20 PM PST 23 |
Dec 27 01:50:45 PM PST 23 |
2317070512 ps |
| T1598 |
/workspace/coverage/cover_reg_top/98.xbar_stress_all_with_rand_reset.3381673041 |
|
|
Dec 27 01:49:42 PM PST 23 |
Dec 27 01:50:30 PM PST 23 |
54974552 ps |
| T1599 |
/workspace/coverage/cover_reg_top/25.xbar_random_large_delays.1538897128 |
|
|
Dec 27 01:43:09 PM PST 23 |
Dec 27 02:03:39 PM PST 23 |
107070519072 ps |
| T1600 |
/workspace/coverage/cover_reg_top/51.xbar_stress_all_with_rand_reset.253702387 |
|
|
Dec 27 01:45:38 PM PST 23 |
Dec 27 01:55:11 PM PST 23 |
9358616027 ps |
| T1601 |
/workspace/coverage/cover_reg_top/20.xbar_stress_all_with_error.1804889457 |
|
|
Dec 27 01:42:14 PM PST 23 |
Dec 27 01:44:04 PM PST 23 |
1349199294 ps |
| T1602 |
/workspace/coverage/cover_reg_top/76.xbar_smoke_zero_delays.3559669326 |
|
|
Dec 27 01:47:40 PM PST 23 |
Dec 27 01:47:49 PM PST 23 |
43313038 ps |
| T1603 |
/workspace/coverage/cover_reg_top/34.xbar_random_large_delays.3079028391 |
|
|
Dec 27 01:44:30 PM PST 23 |
Dec 27 01:48:13 PM PST 23 |
19693055027 ps |
| T1604 |
/workspace/coverage/cover_reg_top/26.xbar_access_same_device_slow_rsp.113040098 |
|
|
Dec 27 01:43:12 PM PST 23 |
Dec 27 02:03:09 PM PST 23 |
68529727284 ps |
| T1605 |
/workspace/coverage/cover_reg_top/90.xbar_smoke.687849416 |
|
|
Dec 27 01:49:42 PM PST 23 |
Dec 27 01:49:51 PM PST 23 |
44281046 ps |
| T1606 |
/workspace/coverage/cover_reg_top/82.xbar_smoke_slow_rsp.2367770052 |
|
|
Dec 27 01:48:41 PM PST 23 |
Dec 27 01:50:15 PM PST 23 |
5503785705 ps |
| T1607 |
/workspace/coverage/cover_reg_top/36.xbar_stress_all_with_rand_reset.62297114 |
|
|
Dec 27 01:45:26 PM PST 23 |
Dec 27 01:49:45 PM PST 23 |
4896424747 ps |
| T1608 |
/workspace/coverage/cover_reg_top/8.xbar_stress_all_with_error.2161764725 |
|
|
Dec 27 01:42:09 PM PST 23 |
Dec 27 01:45:28 PM PST 23 |
2574092857 ps |
| T1609 |
/workspace/coverage/cover_reg_top/50.xbar_smoke_large_delays.792361411 |
|
|
Dec 27 01:46:22 PM PST 23 |
Dec 27 01:48:01 PM PST 23 |
9099229630 ps |
| T1610 |
/workspace/coverage/cover_reg_top/94.xbar_smoke.2338096255 |
|
|
Dec 27 01:49:35 PM PST 23 |
Dec 27 01:49:47 PM PST 23 |
53962764 ps |
| T1611 |
/workspace/coverage/cover_reg_top/45.xbar_stress_all_with_reset_error.766646471 |
|
|
Dec 27 01:45:01 PM PST 23 |
Dec 27 01:49:04 PM PST 23 |
5315625873 ps |
| T1612 |
/workspace/coverage/cover_reg_top/38.xbar_stress_all_with_reset_error.3065369073 |
|
|
Dec 27 01:44:46 PM PST 23 |
Dec 27 01:54:26 PM PST 23 |
4921173287 ps |
| T1613 |
/workspace/coverage/cover_reg_top/75.xbar_random_slow_rsp.754037622 |
|
|
Dec 27 01:47:31 PM PST 23 |
Dec 27 02:07:36 PM PST 23 |
70001500941 ps |
| T1614 |
/workspace/coverage/cover_reg_top/1.xbar_access_same_device_slow_rsp.1791147642 |
|
|
Dec 27 01:40:28 PM PST 23 |
Dec 27 01:44:49 PM PST 23 |
13723585513 ps |
| T1615 |
/workspace/coverage/cover_reg_top/68.xbar_smoke.3475759944 |
|
|
Dec 27 01:47:31 PM PST 23 |
Dec 27 01:47:38 PM PST 23 |
44622325 ps |
| T1616 |
/workspace/coverage/cover_reg_top/55.xbar_error_and_unmapped_addr.997338307 |
|
|
Dec 27 01:46:35 PM PST 23 |
Dec 27 01:47:01 PM PST 23 |
207135339 ps |
| T1617 |
/workspace/coverage/cover_reg_top/5.chip_csr_mem_rw_with_rand_reset.397635202 |
|
|
Dec 27 01:41:17 PM PST 23 |
Dec 27 01:45:18 PM PST 23 |
6131555056 ps |
| T1618 |
/workspace/coverage/cover_reg_top/13.chip_csr_mem_rw_with_rand_reset.3924925597 |
|
|
Dec 27 01:42:10 PM PST 23 |
Dec 27 01:46:07 PM PST 23 |
5818342530 ps |
| T1619 |
/workspace/coverage/cover_reg_top/87.xbar_smoke.967797737 |
|
|
Dec 27 01:49:46 PM PST 23 |
Dec 27 01:49:54 PM PST 23 |
48525537 ps |
| T1620 |
/workspace/coverage/cover_reg_top/42.xbar_stress_all_with_reset_error.2115621492 |
|
|
Dec 27 01:44:45 PM PST 23 |
Dec 27 01:53:54 PM PST 23 |
5193822492 ps |
| T1621 |
/workspace/coverage/cover_reg_top/67.xbar_smoke_zero_delays.2809597279 |
|
|
Dec 27 01:47:31 PM PST 23 |
Dec 27 01:47:38 PM PST 23 |
43240699 ps |
| T1622 |
/workspace/coverage/cover_reg_top/69.xbar_unmapped_addr.3159473411 |
|
|
Dec 27 01:47:28 PM PST 23 |
Dec 27 01:48:01 PM PST 23 |
274692205 ps |
| T1623 |
/workspace/coverage/cover_reg_top/9.xbar_access_same_device_slow_rsp.1169674516 |
|
|
Dec 27 01:41:48 PM PST 23 |
Dec 27 02:03:56 PM PST 23 |
78858676526 ps |
| T1624 |
/workspace/coverage/cover_reg_top/82.xbar_random_large_delays.1354190823 |
|
|
Dec 27 01:48:41 PM PST 23 |
Dec 27 01:53:40 PM PST 23 |
26827899531 ps |
| T1625 |
/workspace/coverage/cover_reg_top/76.xbar_smoke_slow_rsp.1102232915 |
|
|
Dec 27 01:47:38 PM PST 23 |
Dec 27 01:49:18 PM PST 23 |
5627759207 ps |
| T1626 |
/workspace/coverage/cover_reg_top/51.xbar_smoke_slow_rsp.2479124564 |
|
|
Dec 27 01:45:39 PM PST 23 |
Dec 27 01:47:00 PM PST 23 |
4871339976 ps |
| T1627 |
/workspace/coverage/cover_reg_top/16.xbar_smoke_zero_delays.451937708 |
|
|
Dec 27 01:42:13 PM PST 23 |
Dec 27 01:42:19 PM PST 23 |
43261833 ps |
| T1628 |
/workspace/coverage/cover_reg_top/50.xbar_error_and_unmapped_addr.2409454761 |
|
|
Dec 27 01:45:42 PM PST 23 |
Dec 27 01:46:08 PM PST 23 |
217776722 ps |
| T1629 |
/workspace/coverage/cover_reg_top/12.xbar_random_zero_delays.2630402110 |
|
|
Dec 27 01:42:07 PM PST 23 |
Dec 27 01:42:37 PM PST 23 |
327392280 ps |
| T1630 |
/workspace/coverage/cover_reg_top/15.xbar_error_and_unmapped_addr.958769144 |
|
|
Dec 27 01:41:52 PM PST 23 |
Dec 27 01:42:27 PM PST 23 |
311174050 ps |
| T1631 |
/workspace/coverage/cover_reg_top/11.xbar_stress_all.1200670692 |
|
|
Dec 27 01:42:42 PM PST 23 |
Dec 27 01:47:06 PM PST 23 |
2992172700 ps |
| T1632 |
/workspace/coverage/cover_reg_top/30.xbar_access_same_device.1652615565 |
|
|
Dec 27 01:43:32 PM PST 23 |
Dec 27 01:43:38 PM PST 23 |
18628256 ps |
| T1633 |
/workspace/coverage/cover_reg_top/2.xbar_error_random.3901481691 |
|
|
Dec 27 01:40:30 PM PST 23 |
Dec 27 01:41:05 PM PST 23 |
471437035 ps |
| T1634 |
/workspace/coverage/cover_reg_top/35.xbar_unmapped_addr.3597927308 |
|
|
Dec 27 01:45:26 PM PST 23 |
Dec 27 01:46:03 PM PST 23 |
769317665 ps |
| T1635 |
/workspace/coverage/cover_reg_top/78.xbar_unmapped_addr.2552354788 |
|
|
Dec 27 01:48:37 PM PST 23 |
Dec 27 01:49:07 PM PST 23 |
734705374 ps |
| T1636 |
/workspace/coverage/cover_reg_top/62.xbar_random_large_delays.263220775 |
|
|
Dec 27 01:47:26 PM PST 23 |
Dec 27 02:02:08 PM PST 23 |
81338289028 ps |
| T1637 |
/workspace/coverage/cover_reg_top/69.xbar_stress_all.809475156 |
|
|
Dec 27 01:47:30 PM PST 23 |
Dec 27 01:48:05 PM PST 23 |
322396084 ps |
| T1638 |
/workspace/coverage/cover_reg_top/44.xbar_stress_all_with_rand_reset.3126668300 |
|
|
Dec 27 01:45:29 PM PST 23 |
Dec 27 01:46:55 PM PST 23 |
185767922 ps |
| T1639 |
/workspace/coverage/cover_reg_top/79.xbar_random.118632388 |
|
|
Dec 27 01:48:39 PM PST 23 |
Dec 27 01:50:07 PM PST 23 |
2353612729 ps |
| T1640 |
/workspace/coverage/cover_reg_top/14.chip_csr_rw.86291780 |
|
|
Dec 27 01:42:56 PM PST 23 |
Dec 27 01:52:16 PM PST 23 |
5365006625 ps |
| T1641 |
/workspace/coverage/cover_reg_top/25.xbar_smoke.518582934 |
|
|
Dec 27 01:43:02 PM PST 23 |
Dec 27 01:43:13 PM PST 23 |
225861995 ps |
| T1642 |
/workspace/coverage/cover_reg_top/50.xbar_random_slow_rsp.2391067406 |
|
|
Dec 27 01:45:38 PM PST 23 |
Dec 27 01:59:51 PM PST 23 |
49766083753 ps |
| T1643 |
/workspace/coverage/cover_reg_top/56.xbar_stress_all_with_rand_reset.3867749096 |
|
|
Dec 27 01:47:26 PM PST 23 |
Dec 27 01:50:50 PM PST 23 |
564612582 ps |
| T1644 |
/workspace/coverage/cover_reg_top/83.xbar_random_zero_delays.2738301800 |
|
|
Dec 27 01:49:05 PM PST 23 |
Dec 27 01:49:22 PM PST 23 |
163210410 ps |
| T1645 |
/workspace/coverage/cover_reg_top/22.xbar_unmapped_addr.254139394 |
|
|
Dec 27 01:43:15 PM PST 23 |
Dec 27 01:43:42 PM PST 23 |
225146971 ps |
| T1646 |
/workspace/coverage/cover_reg_top/55.xbar_stress_all_with_reset_error.2104771909 |
|
|
Dec 27 01:46:58 PM PST 23 |
Dec 27 01:49:51 PM PST 23 |
1609934408 ps |
| T1647 |
/workspace/coverage/cover_reg_top/36.xbar_stress_all_with_reset_error.2288825642 |
|
|
Dec 27 01:44:47 PM PST 23 |
Dec 27 01:47:14 PM PST 23 |
396455846 ps |
| T1648 |
/workspace/coverage/cover_reg_top/31.xbar_stress_all_with_rand_reset.3878191883 |
|
|
Dec 27 01:43:36 PM PST 23 |
Dec 27 01:48:07 PM PST 23 |
5424305968 ps |
| T1649 |
/workspace/coverage/cover_reg_top/51.xbar_same_source.1747134957 |
|
|
Dec 27 01:45:38 PM PST 23 |
Dec 27 01:45:53 PM PST 23 |
427962396 ps |
| T1650 |
/workspace/coverage/cover_reg_top/1.xbar_smoke_zero_delays.2597417354 |
|
|
Dec 27 01:40:29 PM PST 23 |
Dec 27 01:40:35 PM PST 23 |
38300933 ps |
| T1651 |
/workspace/coverage/cover_reg_top/20.xbar_stress_all.3672451620 |
|
|
Dec 27 01:42:55 PM PST 23 |
Dec 27 01:44:46 PM PST 23 |
3458349956 ps |
| T1652 |
/workspace/coverage/cover_reg_top/36.xbar_random_slow_rsp.2690101997 |
|
|
Dec 27 01:45:00 PM PST 23 |
Dec 27 01:58:28 PM PST 23 |
47071892832 ps |
| T1653 |
/workspace/coverage/cover_reg_top/64.xbar_stress_all.3981364102 |
|
|
Dec 27 01:46:46 PM PST 23 |
Dec 27 01:50:51 PM PST 23 |
3470920261 ps |
| T1654 |
/workspace/coverage/cover_reg_top/93.xbar_stress_all_with_rand_reset.3642529966 |
|
|
Dec 27 01:49:34 PM PST 23 |
Dec 27 02:01:35 PM PST 23 |
14656802544 ps |
| T1655 |
/workspace/coverage/cover_reg_top/95.xbar_smoke_slow_rsp.2310173724 |
|
|
Dec 27 01:49:33 PM PST 23 |
Dec 27 01:51:17 PM PST 23 |
5592519179 ps |
| T1656 |
/workspace/coverage/cover_reg_top/54.xbar_smoke.137314155 |
|
|
Dec 27 01:46:18 PM PST 23 |
Dec 27 01:46:24 PM PST 23 |
46650054 ps |
| T1657 |
/workspace/coverage/cover_reg_top/89.xbar_stress_all_with_reset_error.486033039 |
|
|
Dec 27 01:49:58 PM PST 23 |
Dec 27 01:53:04 PM PST 23 |
3255234738 ps |
| T1658 |
/workspace/coverage/cover_reg_top/68.xbar_access_same_device_slow_rsp.2628241966 |
|
|
Dec 27 01:47:26 PM PST 23 |
Dec 27 02:03:14 PM PST 23 |
54227583774 ps |
| T1659 |
/workspace/coverage/cover_reg_top/73.xbar_random_zero_delays.3197473732 |
|
|
Dec 27 01:47:39 PM PST 23 |
Dec 27 01:48:08 PM PST 23 |
314138368 ps |
| T1660 |
/workspace/coverage/cover_reg_top/69.xbar_error_random.2760458457 |
|
|
Dec 27 01:47:27 PM PST 23 |
Dec 27 01:47:44 PM PST 23 |
190929292 ps |
| T1661 |
/workspace/coverage/cover_reg_top/56.xbar_access_same_device.602751371 |
|
|
Dec 27 01:47:33 PM PST 23 |
Dec 27 01:48:15 PM PST 23 |
391279507 ps |
| T1662 |
/workspace/coverage/cover_reg_top/18.chip_csr_mem_rw_with_rand_reset.4121699674 |
|
|
Dec 27 01:43:25 PM PST 23 |
Dec 27 01:47:22 PM PST 23 |
4881433080 ps |
| T1663 |
/workspace/coverage/cover_reg_top/13.xbar_access_same_device_slow_rsp.3996263232 |
|
|
Dec 27 01:42:10 PM PST 23 |
Dec 27 02:20:08 PM PST 23 |
135704036710 ps |
| T1664 |
/workspace/coverage/cover_reg_top/91.xbar_error_and_unmapped_addr.3248684433 |
|
|
Dec 27 01:49:15 PM PST 23 |
Dec 27 01:49:28 PM PST 23 |
236717492 ps |
| T1665 |
/workspace/coverage/cover_reg_top/47.xbar_error_random.1409444566 |
|
|
Dec 27 01:44:52 PM PST 23 |
Dec 27 01:45:01 PM PST 23 |
152601661 ps |
| T1666 |
/workspace/coverage/cover_reg_top/21.xbar_unmapped_addr.4010879100 |
|
|
Dec 27 01:42:37 PM PST 23 |
Dec 27 01:43:38 PM PST 23 |
1343676978 ps |
| T1667 |
/workspace/coverage/cover_reg_top/35.xbar_stress_all_with_rand_reset.1005101880 |
|
|
Dec 27 01:44:47 PM PST 23 |
Dec 27 01:53:47 PM PST 23 |
9041396451 ps |
| T1668 |
/workspace/coverage/cover_reg_top/58.xbar_access_same_device.236461826 |
|
|
Dec 27 01:46:55 PM PST 23 |
Dec 27 01:47:57 PM PST 23 |
666348878 ps |
| T1669 |
/workspace/coverage/cover_reg_top/76.xbar_random_slow_rsp.62278135 |
|
|
Dec 27 01:47:44 PM PST 23 |
Dec 27 02:03:26 PM PST 23 |
52894798877 ps |
| T1670 |
/workspace/coverage/cover_reg_top/7.xbar_stress_all.2085841541 |
|
|
Dec 27 01:41:52 PM PST 23 |
Dec 27 01:44:57 PM PST 23 |
2351981873 ps |
| T1671 |
/workspace/coverage/cover_reg_top/62.xbar_random_zero_delays.2703103902 |
|
|
Dec 27 01:47:27 PM PST 23 |
Dec 27 01:47:59 PM PST 23 |
364859373 ps |
| T1672 |
/workspace/coverage/cover_reg_top/49.xbar_smoke_slow_rsp.2619741797 |
|
|
Dec 27 01:45:35 PM PST 23 |
Dec 27 01:46:40 PM PST 23 |
3736500615 ps |
| T1673 |
/workspace/coverage/cover_reg_top/13.xbar_unmapped_addr.3272297915 |
|
|
Dec 27 01:42:46 PM PST 23 |
Dec 27 01:43:14 PM PST 23 |
592609490 ps |
| T1674 |
/workspace/coverage/cover_reg_top/84.xbar_stress_all_with_rand_reset.13692448 |
|
|
Dec 27 01:48:40 PM PST 23 |
Dec 27 01:50:05 PM PST 23 |
178309768 ps |
| T1675 |
/workspace/coverage/cover_reg_top/49.xbar_random.3299598529 |
|
|
Dec 27 01:45:47 PM PST 23 |
Dec 27 01:46:27 PM PST 23 |
464957646 ps |
| T1676 |
/workspace/coverage/cover_reg_top/60.xbar_smoke_zero_delays.3956423556 |
|
|
Dec 27 01:46:34 PM PST 23 |
Dec 27 01:46:41 PM PST 23 |
57840580 ps |
| T1677 |
/workspace/coverage/cover_reg_top/6.xbar_stress_all_with_error.3421691027 |
|
|
Dec 27 01:41:15 PM PST 23 |
Dec 27 01:46:07 PM PST 23 |
3949929475 ps |
| T1678 |
/workspace/coverage/cover_reg_top/49.xbar_stress_all_with_rand_reset.2562329865 |
|
|
Dec 27 01:46:08 PM PST 23 |
Dec 27 01:49:39 PM PST 23 |
2204571310 ps |
| T1679 |
/workspace/coverage/cover_reg_top/71.xbar_random_large_delays.3900268461 |
|
|
Dec 27 01:47:31 PM PST 23 |
Dec 27 01:56:38 PM PST 23 |
51469714103 ps |
| T1680 |
/workspace/coverage/cover_reg_top/50.xbar_smoke_zero_delays.2019628900 |
|
|
Dec 27 01:45:59 PM PST 23 |
Dec 27 01:46:06 PM PST 23 |
57326875 ps |
| T1681 |
/workspace/coverage/cover_reg_top/4.xbar_random_slow_rsp.3585762234 |
|
|
Dec 27 01:40:24 PM PST 23 |
Dec 27 01:57:09 PM PST 23 |
57273868975 ps |
| T1682 |
/workspace/coverage/cover_reg_top/93.xbar_error_random.3595342111 |
|
|
Dec 27 01:49:31 PM PST 23 |
Dec 27 01:50:49 PM PST 23 |
2315664785 ps |
| T1683 |
/workspace/coverage/cover_reg_top/25.xbar_stress_all_with_error.1507001718 |
|
|
Dec 27 01:42:59 PM PST 23 |
Dec 27 01:44:50 PM PST 23 |
3045855356 ps |
| T1684 |
/workspace/coverage/cover_reg_top/6.xbar_random_slow_rsp.562354940 |
|
|
Dec 27 01:41:14 PM PST 23 |
Dec 27 01:58:11 PM PST 23 |
59575507147 ps |
| T1685 |
/workspace/coverage/cover_reg_top/19.xbar_smoke_slow_rsp.693344575 |
|
|
Dec 27 01:43:10 PM PST 23 |
Dec 27 01:44:47 PM PST 23 |
5507935391 ps |
| T1686 |
/workspace/coverage/cover_reg_top/52.xbar_random_zero_delays.3105147679 |
|
|
Dec 27 01:45:42 PM PST 23 |
Dec 27 01:46:08 PM PST 23 |
262406526 ps |
| T1687 |
/workspace/coverage/cover_reg_top/21.xbar_stress_all.4093376594 |
|
|
Dec 27 01:42:53 PM PST 23 |
Dec 27 01:51:00 PM PST 23 |
12985047599 ps |
| T1688 |
/workspace/coverage/cover_reg_top/67.xbar_access_same_device.714302669 |
|
|
Dec 27 01:47:36 PM PST 23 |
Dec 27 01:49:19 PM PST 23 |
2556421760 ps |
| T1689 |
/workspace/coverage/cover_reg_top/62.xbar_same_source.1888515009 |
|
|
Dec 27 01:47:37 PM PST 23 |
Dec 27 01:47:53 PM PST 23 |
136935923 ps |
| T1690 |
/workspace/coverage/cover_reg_top/3.xbar_smoke_slow_rsp.1770589102 |
|
|
Dec 27 01:40:34 PM PST 23 |
Dec 27 01:41:48 PM PST 23 |
4081920759 ps |
| T1691 |
/workspace/coverage/cover_reg_top/66.xbar_error_random.795347316 |
|
|
Dec 27 01:47:06 PM PST 23 |
Dec 27 01:47:21 PM PST 23 |
261049138 ps |
| T1692 |
/workspace/coverage/cover_reg_top/33.xbar_smoke_slow_rsp.2628689865 |
|
|
Dec 27 01:44:08 PM PST 23 |
Dec 27 01:45:38 PM PST 23 |
5168847255 ps |
| T1693 |
/workspace/coverage/cover_reg_top/37.xbar_access_same_device.4211213636 |
|
|
Dec 27 01:44:09 PM PST 23 |
Dec 27 01:46:14 PM PST 23 |
2891825211 ps |
| T1694 |
/workspace/coverage/cover_reg_top/64.xbar_smoke.3830813720 |
|
|
Dec 27 01:46:39 PM PST 23 |
Dec 27 01:46:50 PM PST 23 |
231556355 ps |
| T1695 |
/workspace/coverage/cover_reg_top/41.xbar_random_zero_delays.3094171190 |
|
|
Dec 27 01:44:49 PM PST 23 |
Dec 27 01:45:31 PM PST 23 |
469291194 ps |
| T1696 |
/workspace/coverage/cover_reg_top/16.chip_tl_errors.64601905 |
|
|
Dec 27 01:42:09 PM PST 23 |
Dec 27 01:44:16 PM PST 23 |
2912570636 ps |
| T1697 |
/workspace/coverage/cover_reg_top/98.xbar_smoke_zero_delays.251556231 |
|
|
Dec 27 01:49:41 PM PST 23 |
Dec 27 01:49:51 PM PST 23 |
57071984 ps |
| T1698 |
/workspace/coverage/cover_reg_top/2.xbar_stress_all_with_error.234209649 |
|
|
Dec 27 01:40:37 PM PST 23 |
Dec 27 01:41:35 PM PST 23 |
1819273307 ps |
| T1699 |
/workspace/coverage/cover_reg_top/54.xbar_stress_all_with_error.556768567 |
|
|
Dec 27 01:46:18 PM PST 23 |
Dec 27 01:47:45 PM PST 23 |
1007104277 ps |
| T1700 |
/workspace/coverage/cover_reg_top/31.xbar_random_slow_rsp.1720016127 |
|
|
Dec 27 01:43:39 PM PST 23 |
Dec 27 02:00:34 PM PST 23 |
65937335908 ps |
| T1701 |
/workspace/coverage/cover_reg_top/1.xbar_same_source.3326963911 |
|
|
Dec 27 01:40:33 PM PST 23 |
Dec 27 01:41:04 PM PST 23 |
401761153 ps |
| T1702 |
/workspace/coverage/cover_reg_top/0.chip_csr_aliasing.608851422 |
|
|
Dec 27 01:40:36 PM PST 23 |
Dec 27 03:10:17 PM PST 23 |
37429716499 ps |
| T1703 |
/workspace/coverage/cover_reg_top/30.xbar_stress_all_with_error.2015968273 |
|
|
Dec 27 01:43:32 PM PST 23 |
Dec 27 01:47:41 PM PST 23 |
3040838652 ps |
| T1704 |
/workspace/coverage/cover_reg_top/56.xbar_stress_all.975925696 |
|
|
Dec 27 01:46:17 PM PST 23 |
Dec 27 01:49:37 PM PST 23 |
1843700373 ps |
| T1705 |
/workspace/coverage/cover_reg_top/67.xbar_smoke.1306895159 |
|
|
Dec 27 01:47:29 PM PST 23 |
Dec 27 01:47:40 PM PST 23 |
209014406 ps |
| T1706 |
/workspace/coverage/cover_reg_top/83.xbar_stress_all.3127188456 |
|
|
Dec 27 01:48:55 PM PST 23 |
Dec 27 01:53:35 PM PST 23 |
7255568579 ps |
| T1707 |
/workspace/coverage/cover_reg_top/26.xbar_stress_all_with_error.877009274 |
|
|
Dec 27 01:43:22 PM PST 23 |
Dec 27 01:47:27 PM PST 23 |
3259064549 ps |
| T1708 |
/workspace/coverage/cover_reg_top/14.chip_tl_errors.2816434919 |
|
|
Dec 27 01:41:56 PM PST 23 |
Dec 27 01:45:26 PM PST 23 |
3292384814 ps |
| T1709 |
/workspace/coverage/cover_reg_top/37.xbar_smoke.2008542039 |
|
|
Dec 27 01:44:56 PM PST 23 |
Dec 27 01:45:07 PM PST 23 |
146935171 ps |
| T1710 |
/workspace/coverage/cover_reg_top/16.xbar_smoke_large_delays.2198345626 |
|
|
Dec 27 01:42:43 PM PST 23 |
Dec 27 01:44:34 PM PST 23 |
10090280906 ps |
| T1711 |
/workspace/coverage/cover_reg_top/84.xbar_same_source.1281738898 |
|
|
Dec 27 01:49:22 PM PST 23 |
Dec 27 01:50:32 PM PST 23 |
2410826924 ps |
| T1712 |
/workspace/coverage/cover_reg_top/29.xbar_error_and_unmapped_addr.3382550039 |
|
|
Dec 27 01:43:37 PM PST 23 |
Dec 27 01:43:55 PM PST 23 |
429098974 ps |
| T1713 |
/workspace/coverage/cover_reg_top/94.xbar_unmapped_addr.288767172 |
|
|
Dec 27 01:49:40 PM PST 23 |
Dec 27 01:50:06 PM PST 23 |
174892830 ps |
| T1714 |
/workspace/coverage/cover_reg_top/2.xbar_smoke_large_delays.2962108530 |
|
|
Dec 27 01:40:23 PM PST 23 |
Dec 27 01:41:38 PM PST 23 |
6935938537 ps |
| T1715 |
/workspace/coverage/cover_reg_top/42.xbar_stress_all_with_rand_reset.2422053422 |
|
|
Dec 27 01:45:25 PM PST 23 |
Dec 27 01:53:07 PM PST 23 |
2655884615 ps |
| T1716 |
/workspace/coverage/cover_reg_top/47.xbar_stress_all_with_error.4006580963 |
|
|
Dec 27 01:45:30 PM PST 23 |
Dec 27 01:48:33 PM PST 23 |
5397164549 ps |
| T1717 |
/workspace/coverage/cover_reg_top/67.xbar_stress_all_with_error.1072404951 |
|
|
Dec 27 01:47:29 PM PST 23 |
Dec 27 01:50:07 PM PST 23 |
2074616099 ps |
| T1718 |
/workspace/coverage/cover_reg_top/28.xbar_access_same_device_slow_rsp.4273771289 |
|
|
Dec 27 01:43:37 PM PST 23 |
Dec 27 02:20:52 PM PST 23 |
135725660281 ps |
| T1719 |
/workspace/coverage/cover_reg_top/19.xbar_error_and_unmapped_addr.2332195698 |
|
|
Dec 27 01:42:59 PM PST 23 |
Dec 27 01:43:44 PM PST 23 |
1205292884 ps |
| T1720 |
/workspace/coverage/cover_reg_top/19.xbar_random_slow_rsp.3863323606 |
|
|
Dec 27 01:42:50 PM PST 23 |
Dec 27 01:50:36 PM PST 23 |
24161610523 ps |
| T1721 |
/workspace/coverage/cover_reg_top/13.xbar_smoke.2208515151 |
|
|
Dec 27 01:41:48 PM PST 23 |
Dec 27 01:41:57 PM PST 23 |
209117690 ps |
| T1722 |
/workspace/coverage/cover_reg_top/61.xbar_error_random.1919025135 |
|
|
Dec 27 01:47:05 PM PST 23 |
Dec 27 01:48:14 PM PST 23 |
1911570170 ps |
| T1723 |
/workspace/coverage/cover_reg_top/97.xbar_unmapped_addr.869724663 |
|
|
Dec 27 01:49:42 PM PST 23 |
Dec 27 01:50:01 PM PST 23 |
133026063 ps |
| T1724 |
/workspace/coverage/cover_reg_top/17.xbar_access_same_device.296487463 |
|
|
Dec 27 01:43:00 PM PST 23 |
Dec 27 01:44:22 PM PST 23 |
1840837096 ps |
| T1725 |
/workspace/coverage/cover_reg_top/19.xbar_stress_all.870149936 |
|
|
Dec 27 01:42:59 PM PST 23 |
Dec 27 01:50:37 PM PST 23 |
13199810250 ps |
| T1726 |
/workspace/coverage/cover_reg_top/5.xbar_smoke_large_delays.3408994183 |
|
|
Dec 27 01:40:27 PM PST 23 |
Dec 27 01:42:00 PM PST 23 |
9079639221 ps |
| T1727 |
/workspace/coverage/cover_reg_top/39.xbar_smoke_slow_rsp.3686714801 |
|
|
Dec 27 01:44:29 PM PST 23 |
Dec 27 01:46:02 PM PST 23 |
5239513762 ps |
| T1728 |
/workspace/coverage/cover_reg_top/3.xbar_smoke_large_delays.1399919808 |
|
|
Dec 27 01:40:28 PM PST 23 |
Dec 27 01:41:52 PM PST 23 |
7533128330 ps |
| T1729 |
/workspace/coverage/cover_reg_top/71.xbar_random.1533898264 |
|
|
Dec 27 01:47:35 PM PST 23 |
Dec 27 01:48:45 PM PST 23 |
1782449568 ps |
| T1730 |
/workspace/coverage/cover_reg_top/1.chip_rv_dm_lc_disabled.2776967924 |
|
|
Dec 27 01:40:26 PM PST 23 |
Dec 27 01:46:10 PM PST 23 |
12753481443 ps |
| T1731 |
/workspace/coverage/cover_reg_top/18.xbar_smoke_slow_rsp.625139409 |
|
|
Dec 27 01:42:42 PM PST 23 |
Dec 27 01:44:15 PM PST 23 |
4984128074 ps |
| T1732 |
/workspace/coverage/cover_reg_top/49.xbar_same_source.3411034340 |
|
|
Dec 27 01:45:45 PM PST 23 |
Dec 27 01:46:06 PM PST 23 |
283463504 ps |
| T1733 |
/workspace/coverage/cover_reg_top/66.xbar_smoke_large_delays.2622607218 |
|
|
Dec 27 01:47:06 PM PST 23 |
Dec 27 01:48:51 PM PST 23 |
9244124877 ps |
| T1734 |
/workspace/coverage/cover_reg_top/77.xbar_random.3847198843 |
|
|
Dec 27 01:47:45 PM PST 23 |
Dec 27 01:48:44 PM PST 23 |
1650490980 ps |
| T1735 |
/workspace/coverage/cover_reg_top/81.xbar_random_large_delays.942335899 |
|
|
Dec 27 01:48:57 PM PST 23 |
Dec 27 01:54:14 PM PST 23 |
29199602967 ps |
| T1736 |
/workspace/coverage/cover_reg_top/47.xbar_stress_all.3303177473 |
|
|
Dec 27 01:45:42 PM PST 23 |
Dec 27 01:48:38 PM PST 23 |
1839198375 ps |
| T1737 |
/workspace/coverage/cover_reg_top/97.xbar_smoke.483001801 |
|
|
Dec 27 01:49:33 PM PST 23 |
Dec 27 01:49:45 PM PST 23 |
137768393 ps |
| T1738 |
/workspace/coverage/cover_reg_top/10.xbar_random_large_delays.2857698682 |
|
|
Dec 27 01:41:43 PM PST 23 |
Dec 27 01:57:24 PM PST 23 |
80156498674 ps |
| T1739 |
/workspace/coverage/cover_reg_top/25.xbar_random_zero_delays.725807595 |
|
|
Dec 27 01:43:07 PM PST 23 |
Dec 27 01:43:53 PM PST 23 |
558532273 ps |
| T1740 |
/workspace/coverage/cover_reg_top/5.xbar_random_slow_rsp.3473635208 |
|
|
Dec 27 01:40:32 PM PST 23 |
Dec 27 01:43:42 PM PST 23 |
11455479690 ps |
| T1741 |
/workspace/coverage/cover_reg_top/24.xbar_smoke.3506799026 |
|
|
Dec 27 01:42:55 PM PST 23 |
Dec 27 01:43:05 PM PST 23 |
160300803 ps |
| T1742 |
/workspace/coverage/cover_reg_top/94.xbar_error_random.2589815113 |
|
|
Dec 27 01:49:35 PM PST 23 |
Dec 27 01:51:04 PM PST 23 |
2224416447 ps |
| T1743 |
/workspace/coverage/cover_reg_top/25.xbar_stress_all_with_rand_reset.1416840320 |
|
|
Dec 27 01:43:09 PM PST 23 |
Dec 27 01:49:22 PM PST 23 |
8549009923 ps |
| T1744 |
/workspace/coverage/cover_reg_top/29.xbar_smoke_zero_delays.1565064085 |
|
|
Dec 27 01:43:35 PM PST 23 |
Dec 27 01:43:41 PM PST 23 |
43791217 ps |
| T1745 |
/workspace/coverage/cover_reg_top/67.xbar_unmapped_addr.2682466654 |
|
|
Dec 27 01:47:41 PM PST 23 |
Dec 27 01:47:49 PM PST 23 |
29022407 ps |
| T1746 |
/workspace/coverage/cover_reg_top/6.xbar_smoke.3951552378 |
|
|
Dec 27 01:41:16 PM PST 23 |
Dec 27 01:41:24 PM PST 23 |
167450717 ps |
| T1747 |
/workspace/coverage/cover_reg_top/11.xbar_random_zero_delays.3728979039 |
|
|
Dec 27 01:42:41 PM PST 23 |
Dec 27 01:43:26 PM PST 23 |
430484935 ps |
| T1748 |
/workspace/coverage/cover_reg_top/7.chip_csr_mem_rw_with_rand_reset.2666992162 |
|
|
Dec 27 01:42:10 PM PST 23 |
Dec 27 01:45:59 PM PST 23 |
5272295616 ps |
| T1749 |
/workspace/coverage/cover_reg_top/98.xbar_random.506441233 |
|
|
Dec 27 01:49:43 PM PST 23 |
Dec 27 01:49:55 PM PST 23 |
160588971 ps |
| T1750 |
/workspace/coverage/cover_reg_top/9.xbar_random.4000244160 |
|
|
Dec 27 01:41:23 PM PST 23 |
Dec 27 01:42:36 PM PST 23 |
2043251111 ps |
| T1751 |
/workspace/coverage/cover_reg_top/42.xbar_smoke_zero_delays.269299654 |
|
|
Dec 27 01:44:45 PM PST 23 |
Dec 27 01:44:53 PM PST 23 |
62589360 ps |
| T1752 |
/workspace/coverage/cover_reg_top/64.xbar_stress_all_with_error.327842780 |
|
|
Dec 27 01:46:45 PM PST 23 |
Dec 27 01:47:27 PM PST 23 |
632794510 ps |