| T538 |
/workspace/coverage/cover_reg_top/93.xbar_stress_all.2837372014 |
|
|
Mar 26 04:29:33 PM PDT 24 |
Mar 26 04:31:50 PM PDT 24 |
1605690156 ps |
| T534 |
/workspace/coverage/cover_reg_top/24.xbar_random_zero_delays.1892176153 |
|
|
Mar 26 04:18:20 PM PDT 24 |
Mar 26 04:18:46 PM PDT 24 |
251256287 ps |
| T571 |
/workspace/coverage/cover_reg_top/28.xbar_stress_all_with_rand_reset.134240642 |
|
|
Mar 26 04:19:14 PM PDT 24 |
Mar 26 04:23:21 PM PDT 24 |
643937358 ps |
| T1266 |
/workspace/coverage/cover_reg_top/96.xbar_stress_all.2279879849 |
|
|
Mar 26 04:30:06 PM PDT 24 |
Mar 26 04:30:10 PM PDT 24 |
6474451 ps |
| T521 |
/workspace/coverage/cover_reg_top/84.xbar_same_source.1199020327 |
|
|
Mar 26 04:28:13 PM PDT 24 |
Mar 26 04:29:34 PM PDT 24 |
2457731066 ps |
| T1267 |
/workspace/coverage/cover_reg_top/94.xbar_random_slow_rsp.4114540400 |
|
|
Mar 26 04:29:45 PM PDT 24 |
Mar 26 04:31:16 PM PDT 24 |
5019765808 ps |
| T760 |
/workspace/coverage/cover_reg_top/35.xbar_stress_all_with_reset_error.3345029270 |
|
|
Mar 26 04:20:44 PM PDT 24 |
Mar 26 04:26:26 PM PDT 24 |
2009831343 ps |
| T142 |
/workspace/coverage/cover_reg_top/3.chip_csr_aliasing.4006875769 |
|
|
Mar 26 04:09:49 PM PDT 24 |
Mar 26 06:40:16 PM PDT 24 |
56573604252 ps |
| T1268 |
/workspace/coverage/cover_reg_top/93.xbar_error_random.47935683 |
|
|
Mar 26 04:29:32 PM PDT 24 |
Mar 26 04:30:09 PM PDT 24 |
1049718799 ps |
| T779 |
/workspace/coverage/cover_reg_top/95.xbar_stress_all_with_error.50459567 |
|
|
Mar 26 04:29:54 PM PDT 24 |
Mar 26 04:33:18 PM PDT 24 |
5129347741 ps |
| T557 |
/workspace/coverage/cover_reg_top/20.xbar_random_large_delays.1641192317 |
|
|
Mar 26 04:17:05 PM PDT 24 |
Mar 26 04:29:41 PM PDT 24 |
73869358256 ps |
| T536 |
/workspace/coverage/cover_reg_top/40.xbar_smoke.3008146114 |
|
|
Mar 26 04:21:12 PM PDT 24 |
Mar 26 04:21:21 PM PDT 24 |
181149281 ps |
| T1269 |
/workspace/coverage/cover_reg_top/70.xbar_smoke_large_delays.1757828418 |
|
|
Mar 26 04:26:19 PM PDT 24 |
Mar 26 04:27:52 PM PDT 24 |
8332860078 ps |
| T143 |
/workspace/coverage/cover_reg_top/8.chip_same_csr_outstanding.688389195 |
|
|
Mar 26 04:12:43 PM PDT 24 |
Mar 26 05:16:17 PM PDT 24 |
31555590632 ps |
| T776 |
/workspace/coverage/cover_reg_top/85.xbar_access_same_device_slow_rsp.3543938700 |
|
|
Mar 26 04:28:18 PM PDT 24 |
Mar 26 04:42:10 PM PDT 24 |
43838109658 ps |
| T348 |
/workspace/coverage/cover_reg_top/1.chip_csr_aliasing.262960050 |
|
|
Mar 26 04:07:51 PM PDT 24 |
Mar 26 05:16:56 PM PDT 24 |
28029423848 ps |
| T1270 |
/workspace/coverage/cover_reg_top/0.xbar_smoke.3619131414 |
|
|
Mar 26 04:06:59 PM PDT 24 |
Mar 26 04:07:06 PM PDT 24 |
44373379 ps |
| T572 |
/workspace/coverage/cover_reg_top/28.xbar_random_zero_delays.2643887108 |
|
|
Mar 26 04:19:04 PM PDT 24 |
Mar 26 04:19:38 PM PDT 24 |
335379098 ps |
| T826 |
/workspace/coverage/cover_reg_top/15.xbar_stress_all_with_reset_error.3220454092 |
|
|
Mar 26 04:15:41 PM PDT 24 |
Mar 26 04:15:52 PM PDT 24 |
30983397 ps |
| T438 |
/workspace/coverage/cover_reg_top/50.xbar_same_source.2169136799 |
|
|
Mar 26 04:22:49 PM PDT 24 |
Mar 26 04:23:09 PM PDT 24 |
249452483 ps |
| T761 |
/workspace/coverage/cover_reg_top/56.xbar_stress_all_with_reset_error.896435409 |
|
|
Mar 26 04:24:00 PM PDT 24 |
Mar 26 04:28:52 PM PDT 24 |
5114423930 ps |
| T1271 |
/workspace/coverage/cover_reg_top/12.xbar_error_and_unmapped_addr.3844222809 |
|
|
Mar 26 04:14:36 PM PDT 24 |
Mar 26 04:15:29 PM PDT 24 |
1285311048 ps |
| T1272 |
/workspace/coverage/cover_reg_top/84.xbar_smoke_zero_delays.510331486 |
|
|
Mar 26 04:28:06 PM PDT 24 |
Mar 26 04:28:13 PM PDT 24 |
40061367 ps |
| T593 |
/workspace/coverage/cover_reg_top/36.xbar_same_source.3168144270 |
|
|
Mar 26 04:20:40 PM PDT 24 |
Mar 26 04:21:20 PM PDT 24 |
455103442 ps |
| T1273 |
/workspace/coverage/cover_reg_top/91.xbar_error_random.49187732 |
|
|
Mar 26 04:29:12 PM PDT 24 |
Mar 26 04:29:44 PM PDT 24 |
351142701 ps |
| T1274 |
/workspace/coverage/cover_reg_top/24.xbar_smoke_zero_delays.1329675974 |
|
|
Mar 26 04:18:14 PM PDT 24 |
Mar 26 04:18:21 PM PDT 24 |
49059974 ps |
| T1275 |
/workspace/coverage/cover_reg_top/95.xbar_smoke_large_delays.1878471242 |
|
|
Mar 26 04:29:43 PM PDT 24 |
Mar 26 04:31:01 PM PDT 24 |
7477405389 ps |
| T1276 |
/workspace/coverage/cover_reg_top/2.xbar_smoke_large_delays.2098191030 |
|
|
Mar 26 04:08:53 PM PDT 24 |
Mar 26 04:10:00 PM PDT 24 |
6271407122 ps |
| T518 |
/workspace/coverage/cover_reg_top/25.chip_tl_errors.2516207081 |
|
|
Mar 26 04:18:27 PM PDT 24 |
Mar 26 04:24:18 PM PDT 24 |
3855526010 ps |
| T1277 |
/workspace/coverage/cover_reg_top/30.xbar_stress_all_with_error.1700966665 |
|
|
Mar 26 04:19:34 PM PDT 24 |
Mar 26 04:21:23 PM PDT 24 |
1185881839 ps |
| T803 |
/workspace/coverage/cover_reg_top/49.xbar_stress_all_with_reset_error.3229589384 |
|
|
Mar 26 04:22:52 PM PDT 24 |
Mar 26 04:23:46 PM PDT 24 |
144759383 ps |
| T473 |
/workspace/coverage/cover_reg_top/45.xbar_random.2505065066 |
|
|
Mar 26 04:22:12 PM PDT 24 |
Mar 26 04:22:52 PM PDT 24 |
1055874649 ps |
| T448 |
/workspace/coverage/cover_reg_top/89.xbar_stress_all_with_rand_reset.295303175 |
|
|
Mar 26 04:29:02 PM PDT 24 |
Mar 26 04:40:39 PM PDT 24 |
5971058726 ps |
| T1278 |
/workspace/coverage/cover_reg_top/1.chip_prim_tl_access.802303510 |
|
|
Mar 26 04:07:54 PM PDT 24 |
Mar 26 04:11:27 PM PDT 24 |
4497466607 ps |
| T1279 |
/workspace/coverage/cover_reg_top/78.xbar_stress_all_with_error.4180681205 |
|
|
Mar 26 04:27:05 PM PDT 24 |
Mar 26 04:27:19 PM PDT 24 |
182202222 ps |
| T1280 |
/workspace/coverage/cover_reg_top/72.xbar_error_and_unmapped_addr.1607577321 |
|
|
Mar 26 04:26:43 PM PDT 24 |
Mar 26 04:26:51 PM PDT 24 |
32612521 ps |
| T819 |
/workspace/coverage/cover_reg_top/26.xbar_stress_all_with_reset_error.819563291 |
|
|
Mar 26 04:18:43 PM PDT 24 |
Mar 26 04:18:58 PM PDT 24 |
96121887 ps |
| T791 |
/workspace/coverage/cover_reg_top/64.xbar_access_same_device.460178193 |
|
|
Mar 26 04:25:08 PM PDT 24 |
Mar 26 04:25:53 PM PDT 24 |
1125455745 ps |
| T784 |
/workspace/coverage/cover_reg_top/50.xbar_access_same_device_slow_rsp.2765861303 |
|
|
Mar 26 04:22:49 PM PDT 24 |
Mar 26 04:47:41 PM PDT 24 |
85957107296 ps |
| T1281 |
/workspace/coverage/cover_reg_top/91.xbar_error_and_unmapped_addr.3252077170 |
|
|
Mar 26 04:29:15 PM PDT 24 |
Mar 26 04:29:50 PM PDT 24 |
681031715 ps |
| T610 |
/workspace/coverage/cover_reg_top/67.xbar_smoke_slow_rsp.2505875070 |
|
|
Mar 26 04:25:32 PM PDT 24 |
Mar 26 04:27:04 PM PDT 24 |
5607671035 ps |
| T349 |
/workspace/coverage/cover_reg_top/2.chip_csr_rw.3650539165 |
|
|
Mar 26 04:09:55 PM PDT 24 |
Mar 26 04:19:03 PM PDT 24 |
5046455000 ps |
| T549 |
/workspace/coverage/cover_reg_top/31.xbar_same_source.1388114592 |
|
|
Mar 26 04:19:41 PM PDT 24 |
Mar 26 04:21:21 PM PDT 24 |
2739330960 ps |
| T765 |
/workspace/coverage/cover_reg_top/27.xbar_stress_all_with_error.620785462 |
|
|
Mar 26 04:18:55 PM PDT 24 |
Mar 26 04:26:59 PM PDT 24 |
12639927642 ps |
| T639 |
/workspace/coverage/cover_reg_top/79.xbar_stress_all_with_error.2071402270 |
|
|
Mar 26 04:27:15 PM PDT 24 |
Mar 26 04:37:18 PM PDT 24 |
15459950244 ps |
| T1282 |
/workspace/coverage/cover_reg_top/29.xbar_smoke.4023693857 |
|
|
Mar 26 04:19:13 PM PDT 24 |
Mar 26 04:19:20 PM PDT 24 |
45150014 ps |
| T529 |
/workspace/coverage/cover_reg_top/56.xbar_random_zero_delays.2615892335 |
|
|
Mar 26 04:23:48 PM PDT 24 |
Mar 26 04:24:04 PM PDT 24 |
164230660 ps |
| T793 |
/workspace/coverage/cover_reg_top/24.xbar_access_same_device.2583434032 |
|
|
Mar 26 04:18:26 PM PDT 24 |
Mar 26 04:18:45 PM PDT 24 |
192588238 ps |
| T488 |
/workspace/coverage/cover_reg_top/9.xbar_random_zero_delays.3534438383 |
|
|
Mar 26 04:13:19 PM PDT 24 |
Mar 26 04:14:10 PM PDT 24 |
516868035 ps |
| T519 |
/workspace/coverage/cover_reg_top/92.xbar_stress_all.3490066400 |
|
|
Mar 26 04:29:24 PM PDT 24 |
Mar 26 04:33:29 PM PDT 24 |
5848829114 ps |
| T541 |
/workspace/coverage/cover_reg_top/1.xbar_random_zero_delays.2576695097 |
|
|
Mar 26 04:08:04 PM PDT 24 |
Mar 26 04:08:36 PM PDT 24 |
267057253 ps |
| T431 |
/workspace/coverage/cover_reg_top/11.xbar_stress_all_with_rand_reset.1476720698 |
|
|
Mar 26 04:14:11 PM PDT 24 |
Mar 26 04:20:20 PM PDT 24 |
3400068718 ps |
| T462 |
/workspace/coverage/cover_reg_top/52.xbar_random_zero_delays.3418811194 |
|
|
Mar 26 04:23:11 PM PDT 24 |
Mar 26 04:23:37 PM PDT 24 |
298485060 ps |
| T775 |
/workspace/coverage/cover_reg_top/24.xbar_access_same_device_slow_rsp.901276553 |
|
|
Mar 26 04:18:31 PM PDT 24 |
Mar 26 04:35:14 PM PDT 24 |
58376017927 ps |
| T486 |
/workspace/coverage/cover_reg_top/70.xbar_random_large_delays.3012585629 |
|
|
Mar 26 04:25:46 PM PDT 24 |
Mar 26 04:41:29 PM PDT 24 |
83890246279 ps |
| T470 |
/workspace/coverage/cover_reg_top/31.xbar_random.1726953036 |
|
|
Mar 26 04:19:43 PM PDT 24 |
Mar 26 04:20:28 PM PDT 24 |
1147731430 ps |
| T1283 |
/workspace/coverage/cover_reg_top/38.xbar_smoke_slow_rsp.2971895935 |
|
|
Mar 26 04:20:54 PM PDT 24 |
Mar 26 04:22:22 PM PDT 24 |
4848653510 ps |
| T570 |
/workspace/coverage/cover_reg_top/83.xbar_same_source.2888692022 |
|
|
Mar 26 04:28:06 PM PDT 24 |
Mar 26 04:29:09 PM PDT 24 |
1859076800 ps |
| T432 |
/workspace/coverage/cover_reg_top/10.xbar_stress_all.2686972253 |
|
|
Mar 26 04:13:57 PM PDT 24 |
Mar 26 04:18:18 PM PDT 24 |
2589032749 ps |
| T530 |
/workspace/coverage/cover_reg_top/96.xbar_random_zero_delays.1752378304 |
|
|
Mar 26 04:30:02 PM PDT 24 |
Mar 26 04:30:43 PM PDT 24 |
440416988 ps |
| T579 |
/workspace/coverage/cover_reg_top/0.xbar_random_zero_delays.1396994439 |
|
|
Mar 26 04:07:10 PM PDT 24 |
Mar 26 04:07:43 PM PDT 24 |
268669765 ps |
| T1284 |
/workspace/coverage/cover_reg_top/9.xbar_error_random.1848924978 |
|
|
Mar 26 04:13:19 PM PDT 24 |
Mar 26 04:14:28 PM PDT 24 |
1494437735 ps |
| T520 |
/workspace/coverage/cover_reg_top/73.xbar_random_slow_rsp.3928320093 |
|
|
Mar 26 04:26:58 PM PDT 24 |
Mar 26 04:37:13 PM PDT 24 |
30439115269 ps |
| T585 |
/workspace/coverage/cover_reg_top/2.xbar_smoke_zero_delays.1247769119 |
|
|
Mar 26 04:09:02 PM PDT 24 |
Mar 26 04:09:08 PM PDT 24 |
36836260 ps |
| T512 |
/workspace/coverage/cover_reg_top/21.chip_tl_errors.1468614159 |
|
|
Mar 26 04:17:14 PM PDT 24 |
Mar 26 04:22:55 PM PDT 24 |
3968245272 ps |
| T1285 |
/workspace/coverage/cover_reg_top/42.xbar_unmapped_addr.4026003688 |
|
|
Mar 26 04:21:36 PM PDT 24 |
Mar 26 04:21:56 PM PDT 24 |
136627148 ps |
| T561 |
/workspace/coverage/cover_reg_top/80.xbar_random_large_delays.2195881870 |
|
|
Mar 26 04:27:29 PM PDT 24 |
Mar 26 04:41:15 PM PDT 24 |
72916813826 ps |
| T553 |
/workspace/coverage/cover_reg_top/30.xbar_unmapped_addr.3527855662 |
|
|
Mar 26 04:19:34 PM PDT 24 |
Mar 26 04:20:12 PM PDT 24 |
278628192 ps |
| T552 |
/workspace/coverage/cover_reg_top/44.xbar_smoke.1191086383 |
|
|
Mar 26 04:21:58 PM PDT 24 |
Mar 26 04:22:07 PM PDT 24 |
139141760 ps |
| T1286 |
/workspace/coverage/cover_reg_top/23.xbar_unmapped_addr.1932855631 |
|
|
Mar 26 04:17:55 PM PDT 24 |
Mar 26 04:18:13 PM PDT 24 |
122207492 ps |
| T1287 |
/workspace/coverage/cover_reg_top/11.xbar_smoke_slow_rsp.1028133622 |
|
|
Mar 26 04:13:59 PM PDT 24 |
Mar 26 04:15:33 PM PDT 24 |
5327011266 ps |
| T583 |
/workspace/coverage/cover_reg_top/17.xbar_stress_all_with_error.1339522020 |
|
|
Mar 26 04:16:29 PM PDT 24 |
Mar 26 04:22:21 PM PDT 24 |
3787624239 ps |
| T1288 |
/workspace/coverage/cover_reg_top/39.xbar_error_and_unmapped_addr.3736062298 |
|
|
Mar 26 04:20:59 PM PDT 24 |
Mar 26 04:21:38 PM PDT 24 |
304379648 ps |
| T516 |
/workspace/coverage/cover_reg_top/4.chip_tl_errors.3938031259 |
|
|
Mar 26 04:10:35 PM PDT 24 |
Mar 26 04:12:58 PM PDT 24 |
2481666209 ps |
| T1289 |
/workspace/coverage/cover_reg_top/27.xbar_random_large_delays.1035225966 |
|
|
Mar 26 04:18:55 PM PDT 24 |
Mar 26 04:26:26 PM PDT 24 |
45467154030 ps |
| T762 |
/workspace/coverage/cover_reg_top/32.xbar_access_same_device_slow_rsp.354055960 |
|
|
Mar 26 04:19:52 PM PDT 24 |
Mar 26 04:52:00 PM PDT 24 |
113422011294 ps |
| T605 |
/workspace/coverage/cover_reg_top/96.xbar_stress_all_with_rand_reset.4272708840 |
|
|
Mar 26 04:30:02 PM PDT 24 |
Mar 26 04:34:24 PM PDT 24 |
631054388 ps |
| T608 |
/workspace/coverage/cover_reg_top/44.xbar_random_large_delays.273835648 |
|
|
Mar 26 04:21:58 PM PDT 24 |
Mar 26 04:39:42 PM PDT 24 |
90591571308 ps |
| T1290 |
/workspace/coverage/cover_reg_top/37.xbar_access_same_device.2100479185 |
|
|
Mar 26 04:20:43 PM PDT 24 |
Mar 26 04:20:49 PM PDT 24 |
14043517 ps |
| T763 |
/workspace/coverage/cover_reg_top/12.xbar_stress_all_with_error.2522267464 |
|
|
Mar 26 04:14:31 PM PDT 24 |
Mar 26 04:18:00 PM PDT 24 |
5156908939 ps |
| T477 |
/workspace/coverage/cover_reg_top/17.xbar_unmapped_addr.3376854651 |
|
|
Mar 26 04:16:19 PM PDT 24 |
Mar 26 04:16:57 PM PDT 24 |
285454418 ps |
| T613 |
/workspace/coverage/cover_reg_top/30.xbar_stress_all_with_rand_reset.1891837920 |
|
|
Mar 26 04:19:33 PM PDT 24 |
Mar 26 04:22:51 PM PDT 24 |
632173754 ps |
| T537 |
/workspace/coverage/cover_reg_top/62.xbar_same_source.1389379963 |
|
|
Mar 26 04:24:46 PM PDT 24 |
Mar 26 04:25:06 PM PDT 24 |
237554416 ps |
| T574 |
/workspace/coverage/cover_reg_top/95.xbar_random_slow_rsp.3826688591 |
|
|
Mar 26 04:29:52 PM PDT 24 |
Mar 26 04:48:42 PM PDT 24 |
64340248833 ps |
| T1291 |
/workspace/coverage/cover_reg_top/70.xbar_access_same_device.3988569043 |
|
|
Mar 26 04:25:48 PM PDT 24 |
Mar 26 04:26:03 PM PDT 24 |
104976016 ps |
| T1292 |
/workspace/coverage/cover_reg_top/28.xbar_error_and_unmapped_addr.3649729201 |
|
|
Mar 26 04:19:14 PM PDT 24 |
Mar 26 04:19:43 PM PDT 24 |
549254197 ps |
| T1293 |
/workspace/coverage/cover_reg_top/3.xbar_unmapped_addr.1274810222 |
|
|
Mar 26 04:10:12 PM PDT 24 |
Mar 26 04:10:45 PM PDT 24 |
759243633 ps |
| T1294 |
/workspace/coverage/cover_reg_top/73.xbar_stress_all_with_reset_error.429045311 |
|
|
Mar 26 04:26:44 PM PDT 24 |
Mar 26 04:27:03 PM PDT 24 |
53225513 ps |
| T1295 |
/workspace/coverage/cover_reg_top/57.xbar_error_and_unmapped_addr.1558450753 |
|
|
Mar 26 04:23:59 PM PDT 24 |
Mar 26 04:24:13 PM PDT 24 |
100354555 ps |
| T1296 |
/workspace/coverage/cover_reg_top/54.xbar_smoke_slow_rsp.2908083798 |
|
|
Mar 26 04:23:29 PM PDT 24 |
Mar 26 04:25:15 PM PDT 24 |
6264999961 ps |
| T515 |
/workspace/coverage/cover_reg_top/3.chip_tl_errors.3535098138 |
|
|
Mar 26 04:10:03 PM PDT 24 |
Mar 26 04:12:34 PM PDT 24 |
3710468726 ps |
| T788 |
/workspace/coverage/cover_reg_top/11.xbar_access_same_device.2880160562 |
|
|
Mar 26 04:14:00 PM PDT 24 |
Mar 26 04:14:16 PM PDT 24 |
128916801 ps |
| T489 |
/workspace/coverage/cover_reg_top/19.xbar_stress_all_with_rand_reset.2201855406 |
|
|
Mar 26 04:17:03 PM PDT 24 |
Mar 26 04:19:57 PM PDT 24 |
541406118 ps |
| T547 |
/workspace/coverage/cover_reg_top/10.xbar_stress_all_with_rand_reset.2289490916 |
|
|
Mar 26 04:13:59 PM PDT 24 |
Mar 26 04:22:20 PM PDT 24 |
1673102357 ps |
| T539 |
/workspace/coverage/cover_reg_top/56.xbar_random.3915142067 |
|
|
Mar 26 04:23:49 PM PDT 24 |
Mar 26 04:24:12 PM PDT 24 |
237592855 ps |
| T350 |
/workspace/coverage/cover_reg_top/14.chip_csr_rw.1243769314 |
|
|
Mar 26 04:15:34 PM PDT 24 |
Mar 26 04:21:08 PM PDT 24 |
4169717448 ps |
| T1297 |
/workspace/coverage/cover_reg_top/3.xbar_smoke_zero_delays.1927621883 |
|
|
Mar 26 04:10:02 PM PDT 24 |
Mar 26 04:10:10 PM PDT 24 |
48899471 ps |
| T1298 |
/workspace/coverage/cover_reg_top/3.xbar_smoke_large_delays.4256958830 |
|
|
Mar 26 04:10:01 PM PDT 24 |
Mar 26 04:11:24 PM PDT 24 |
7562718017 ps |
| T1299 |
/workspace/coverage/cover_reg_top/98.xbar_smoke.1269018568 |
|
|
Mar 26 04:30:12 PM PDT 24 |
Mar 26 04:30:18 PM PDT 24 |
39675747 ps |
| T766 |
/workspace/coverage/cover_reg_top/93.xbar_stress_all_with_error.1533936170 |
|
|
Mar 26 04:29:32 PM PDT 24 |
Mar 26 04:35:11 PM PDT 24 |
10269062615 ps |
| T1300 |
/workspace/coverage/cover_reg_top/63.xbar_stress_all_with_error.2200002968 |
|
|
Mar 26 04:24:49 PM PDT 24 |
Mar 26 04:27:16 PM PDT 24 |
3741104164 ps |
| T558 |
/workspace/coverage/cover_reg_top/52.xbar_random_large_delays.1032391094 |
|
|
Mar 26 04:23:16 PM PDT 24 |
Mar 26 04:43:18 PM PDT 24 |
112479331595 ps |
| T459 |
/workspace/coverage/cover_reg_top/43.xbar_access_same_device.1179091411 |
|
|
Mar 26 04:21:50 PM PDT 24 |
Mar 26 04:23:33 PM PDT 24 |
2459293789 ps |
| T799 |
/workspace/coverage/cover_reg_top/33.xbar_stress_all_with_error.3514097259 |
|
|
Mar 26 04:20:18 PM PDT 24 |
Mar 26 04:25:15 PM PDT 24 |
9354384180 ps |
| T555 |
/workspace/coverage/cover_reg_top/15.xbar_unmapped_addr.111933769 |
|
|
Mar 26 04:15:43 PM PDT 24 |
Mar 26 04:16:06 PM PDT 24 |
161687383 ps |
| T1301 |
/workspace/coverage/cover_reg_top/4.xbar_stress_all_with_reset_error.2765411550 |
|
|
Mar 26 04:11:09 PM PDT 24 |
Mar 26 04:11:26 PM PDT 24 |
54897111 ps |
| T493 |
/workspace/coverage/cover_reg_top/84.xbar_unmapped_addr.4075445604 |
|
|
Mar 26 04:28:15 PM PDT 24 |
Mar 26 04:29:02 PM PDT 24 |
1003623313 ps |
| T376 |
/workspace/coverage/cover_reg_top/9.chip_csr_rw.3060600490 |
|
|
Mar 26 04:13:33 PM PDT 24 |
Mar 26 04:19:39 PM PDT 24 |
3721098199 ps |
| T589 |
/workspace/coverage/cover_reg_top/58.xbar_random_slow_rsp.3423997494 |
|
|
Mar 26 04:24:17 PM PDT 24 |
Mar 26 04:26:57 PM PDT 24 |
8526161854 ps |
| T1302 |
/workspace/coverage/cover_reg_top/52.xbar_smoke_zero_delays.12775789 |
|
|
Mar 26 04:23:13 PM PDT 24 |
Mar 26 04:23:20 PM PDT 24 |
45703471 ps |
| T446 |
/workspace/coverage/cover_reg_top/17.xbar_random_zero_delays.2532774811 |
|
|
Mar 26 04:16:16 PM PDT 24 |
Mar 26 04:16:53 PM PDT 24 |
316860571 ps |
| T595 |
/workspace/coverage/cover_reg_top/68.xbar_random_zero_delays.3553224414 |
|
|
Mar 26 04:25:26 PM PDT 24 |
Mar 26 04:25:36 PM PDT 24 |
84629452 ps |
| T478 |
/workspace/coverage/cover_reg_top/76.xbar_stress_all.131928355 |
|
|
Mar 26 04:26:51 PM PDT 24 |
Mar 26 04:29:55 PM PDT 24 |
4551391218 ps |
| T1303 |
/workspace/coverage/cover_reg_top/2.xbar_stress_all.2648103813 |
|
|
Mar 26 04:09:34 PM PDT 24 |
Mar 26 04:09:38 PM PDT 24 |
5634608 ps |
| T767 |
/workspace/coverage/cover_reg_top/50.xbar_stress_all_with_reset_error.1359852847 |
|
|
Mar 26 04:23:00 PM PDT 24 |
Mar 26 04:28:36 PM PDT 24 |
4910933945 ps |
| T1304 |
/workspace/coverage/cover_reg_top/50.xbar_smoke_large_delays.1987306793 |
|
|
Mar 26 04:22:48 PM PDT 24 |
Mar 26 04:24:39 PM PDT 24 |
10550540018 ps |
| T582 |
/workspace/coverage/cover_reg_top/63.xbar_random_zero_delays.1186807733 |
|
|
Mar 26 04:24:52 PM PDT 24 |
Mar 26 04:25:32 PM PDT 24 |
480724233 ps |
| T1305 |
/workspace/coverage/cover_reg_top/10.xbar_smoke.2111654164 |
|
|
Mar 26 04:13:36 PM PDT 24 |
Mar 26 04:13:44 PM PDT 24 |
59591721 ps |
| T596 |
/workspace/coverage/cover_reg_top/91.xbar_stress_all_with_rand_reset.2517704788 |
|
|
Mar 26 04:29:12 PM PDT 24 |
Mar 26 04:32:23 PM PDT 24 |
2091749657 ps |
| T777 |
/workspace/coverage/cover_reg_top/99.xbar_access_same_device.1144240859 |
|
|
Mar 26 04:30:31 PM PDT 24 |
Mar 26 04:32:34 PM PDT 24 |
2530376748 ps |
| T524 |
/workspace/coverage/cover_reg_top/34.xbar_random_slow_rsp.2185589274 |
|
|
Mar 26 04:20:19 PM PDT 24 |
Mar 26 04:30:19 PM PDT 24 |
33932123684 ps |
| T543 |
/workspace/coverage/cover_reg_top/79.xbar_same_source.3146587875 |
|
|
Mar 26 04:27:18 PM PDT 24 |
Mar 26 04:27:35 PM PDT 24 |
175728635 ps |
| T1306 |
/workspace/coverage/cover_reg_top/27.xbar_smoke_large_delays.3757228605 |
|
|
Mar 26 04:19:00 PM PDT 24 |
Mar 26 04:20:14 PM PDT 24 |
7011559758 ps |
| T597 |
/workspace/coverage/cover_reg_top/71.xbar_unmapped_addr.3152466904 |
|
|
Mar 26 04:26:48 PM PDT 24 |
Mar 26 04:27:09 PM PDT 24 |
160499724 ps |
| T513 |
/workspace/coverage/cover_reg_top/29.xbar_stress_all.1451671108 |
|
|
Mar 26 04:19:24 PM PDT 24 |
Mar 26 04:23:28 PM PDT 24 |
6214378043 ps |
| T443 |
/workspace/coverage/cover_reg_top/29.xbar_random_slow_rsp.2738591350 |
|
|
Mar 26 04:19:15 PM PDT 24 |
Mar 26 04:37:45 PM PDT 24 |
60646327333 ps |
| T564 |
/workspace/coverage/cover_reg_top/34.xbar_same_source.2831585737 |
|
|
Mar 26 04:20:21 PM PDT 24 |
Mar 26 04:21:36 PM PDT 24 |
2279401275 ps |
| T1307 |
/workspace/coverage/cover_reg_top/8.xbar_error_random.2483361364 |
|
|
Mar 26 04:12:56 PM PDT 24 |
Mar 26 04:13:57 PM PDT 24 |
1523394551 ps |
| T346 |
/workspace/coverage/cover_reg_top/14.chip_same_csr_outstanding.3449140672 |
|
|
Mar 26 04:15:04 PM PDT 24 |
Mar 26 04:40:33 PM PDT 24 |
14781064734 ps |
| T474 |
/workspace/coverage/cover_reg_top/92.xbar_random_large_delays.593428296 |
|
|
Mar 26 04:29:13 PM PDT 24 |
Mar 26 04:42:35 PM PDT 24 |
71728462693 ps |
| T556 |
/workspace/coverage/cover_reg_top/68.xbar_random_large_delays.1989532855 |
|
|
Mar 26 04:25:33 PM PDT 24 |
Mar 26 04:37:24 PM PDT 24 |
64802223529 ps |
| T798 |
/workspace/coverage/cover_reg_top/67.xbar_access_same_device_slow_rsp.3424582666 |
|
|
Mar 26 04:25:32 PM PDT 24 |
Mar 26 04:31:00 PM PDT 24 |
17248701634 ps |
| T577 |
/workspace/coverage/cover_reg_top/11.xbar_stress_all_with_reset_error.1766230243 |
|
|
Mar 26 04:14:09 PM PDT 24 |
Mar 26 04:20:01 PM PDT 24 |
2112344891 ps |
| T1308 |
/workspace/coverage/cover_reg_top/38.xbar_access_same_device.1172700537 |
|
|
Mar 26 04:20:51 PM PDT 24 |
Mar 26 04:21:40 PM PDT 24 |
517782344 ps |
| T1309 |
/workspace/coverage/cover_reg_top/94.xbar_error_and_unmapped_addr.2521169392 |
|
|
Mar 26 04:29:43 PM PDT 24 |
Mar 26 04:30:33 PM PDT 24 |
1116751201 ps |
| T1310 |
/workspace/coverage/cover_reg_top/13.xbar_smoke_slow_rsp.617739587 |
|
|
Mar 26 04:14:41 PM PDT 24 |
Mar 26 04:15:55 PM PDT 24 |
4437998080 ps |
| T551 |
/workspace/coverage/cover_reg_top/41.xbar_unmapped_addr.489288592 |
|
|
Mar 26 04:21:28 PM PDT 24 |
Mar 26 04:21:36 PM PDT 24 |
100792493 ps |
| T1311 |
/workspace/coverage/cover_reg_top/13.xbar_random_large_delays.2071863639 |
|
|
Mar 26 04:15:11 PM PDT 24 |
Mar 26 04:17:15 PM PDT 24 |
10409828513 ps |
| T533 |
/workspace/coverage/cover_reg_top/44.xbar_random_slow_rsp.466408899 |
|
|
Mar 26 04:22:01 PM PDT 24 |
Mar 26 04:27:18 PM PDT 24 |
16526068583 ps |
| T802 |
/workspace/coverage/cover_reg_top/23.xbar_stress_all_with_error.1106894837 |
|
|
Mar 26 04:18:15 PM PDT 24 |
Mar 26 04:23:36 PM PDT 24 |
3156702371 ps |
| T466 |
/workspace/coverage/cover_reg_top/69.xbar_random_zero_delays.4230384969 |
|
|
Mar 26 04:25:48 PM PDT 24 |
Mar 26 04:26:33 PM PDT 24 |
516850213 ps |
| T794 |
/workspace/coverage/cover_reg_top/33.xbar_access_same_device.3464837094 |
|
|
Mar 26 04:20:02 PM PDT 24 |
Mar 26 04:20:46 PM PDT 24 |
558330831 ps |
| T1312 |
/workspace/coverage/cover_reg_top/19.xbar_smoke_large_delays.4011044519 |
|
|
Mar 26 04:16:52 PM PDT 24 |
Mar 26 04:18:12 PM PDT 24 |
7088841873 ps |
| T568 |
/workspace/coverage/cover_reg_top/27.xbar_random_slow_rsp.765512355 |
|
|
Mar 26 04:19:00 PM PDT 24 |
Mar 26 04:32:33 PM PDT 24 |
45175316992 ps |
| T450 |
/workspace/coverage/cover_reg_top/44.xbar_stress_all.3866618517 |
|
|
Mar 26 04:21:58 PM PDT 24 |
Mar 26 04:27:36 PM PDT 24 |
8057138870 ps |
| T1313 |
/workspace/coverage/cover_reg_top/16.xbar_error_and_unmapped_addr.581492776 |
|
|
Mar 26 04:16:01 PM PDT 24 |
Mar 26 04:16:37 PM PDT 24 |
301146856 ps |
| T795 |
/workspace/coverage/cover_reg_top/7.xbar_access_same_device.2452222503 |
|
|
Mar 26 04:12:31 PM PDT 24 |
Mar 26 04:13:01 PM PDT 24 |
316572093 ps |
| T554 |
/workspace/coverage/cover_reg_top/87.xbar_random.2816689152 |
|
|
Mar 26 04:28:39 PM PDT 24 |
Mar 26 04:30:11 PM PDT 24 |
2430276762 ps |
| T546 |
/workspace/coverage/cover_reg_top/61.xbar_same_source.896377882 |
|
|
Mar 26 04:24:35 PM PDT 24 |
Mar 26 04:25:18 PM PDT 24 |
562712647 ps |
| T603 |
/workspace/coverage/cover_reg_top/22.xbar_random.1703011999 |
|
|
Mar 26 04:17:35 PM PDT 24 |
Mar 26 04:18:45 PM PDT 24 |
1902741591 ps |
| T588 |
/workspace/coverage/cover_reg_top/9.xbar_random_large_delays.3022623911 |
|
|
Mar 26 04:13:21 PM PDT 24 |
Mar 26 04:18:24 PM PDT 24 |
24357148723 ps |
| T611 |
/workspace/coverage/cover_reg_top/4.xbar_stress_all_with_error.4172836523 |
|
|
Mar 26 04:11:08 PM PDT 24 |
Mar 26 04:16:15 PM PDT 24 |
8471701879 ps |
| T460 |
/workspace/coverage/cover_reg_top/48.xbar_smoke_large_delays.3445116196 |
|
|
Mar 26 04:22:32 PM PDT 24 |
Mar 26 04:23:56 PM PDT 24 |
7677484350 ps |
| T1314 |
/workspace/coverage/cover_reg_top/85.xbar_smoke_slow_rsp.1410786492 |
|
|
Mar 26 04:28:17 PM PDT 24 |
Mar 26 04:30:00 PM PDT 24 |
5504178229 ps |
| T499 |
/workspace/coverage/cover_reg_top/56.xbar_unmapped_addr.4176341531 |
|
|
Mar 26 04:23:57 PM PDT 24 |
Mar 26 04:24:31 PM PDT 24 |
290132930 ps |
| T1315 |
/workspace/coverage/cover_reg_top/28.xbar_smoke_zero_delays.1911937833 |
|
|
Mar 26 04:19:04 PM PDT 24 |
Mar 26 04:19:11 PM PDT 24 |
50022944 ps |
| T439 |
/workspace/coverage/cover_reg_top/36.xbar_stress_all_with_rand_reset.1665149541 |
|
|
Mar 26 04:20:42 PM PDT 24 |
Mar 26 04:28:35 PM PDT 24 |
2878767099 ps |
| T1316 |
/workspace/coverage/cover_reg_top/27.xbar_smoke_slow_rsp.353995666 |
|
|
Mar 26 04:18:58 PM PDT 24 |
Mar 26 04:20:29 PM PDT 24 |
5512869196 ps |
| T1317 |
/workspace/coverage/cover_reg_top/2.chip_csr_bit_bash.1000441505 |
|
|
Mar 26 04:08:51 PM PDT 24 |
Mar 26 04:32:35 PM PDT 24 |
11304059384 ps |
| T479 |
/workspace/coverage/cover_reg_top/97.xbar_access_same_device_slow_rsp.2983720857 |
|
|
Mar 26 04:30:12 PM PDT 24 |
Mar 26 04:56:15 PM PDT 24 |
94839752754 ps |
| T540 |
/workspace/coverage/cover_reg_top/67.xbar_stress_all.2360009286 |
|
|
Mar 26 04:25:31 PM PDT 24 |
Mar 26 04:29:53 PM PDT 24 |
6689669151 ps |
| T444 |
/workspace/coverage/cover_reg_top/34.xbar_access_same_device_slow_rsp.3906567409 |
|
|
Mar 26 04:20:20 PM PDT 24 |
Mar 26 04:37:27 PM PDT 24 |
54530316372 ps |
| T1318 |
/workspace/coverage/cover_reg_top/79.xbar_smoke_large_delays.3683918881 |
|
|
Mar 26 04:27:07 PM PDT 24 |
Mar 26 04:28:38 PM PDT 24 |
7992375015 ps |
| T1319 |
/workspace/coverage/cover_reg_top/45.xbar_error_and_unmapped_addr.2039541086 |
|
|
Mar 26 04:22:04 PM PDT 24 |
Mar 26 04:22:41 PM PDT 24 |
909729356 ps |
| T1320 |
/workspace/coverage/cover_reg_top/1.xbar_random_large_delays.3472285840 |
|
|
Mar 26 04:08:06 PM PDT 24 |
Mar 26 04:15:47 PM PDT 24 |
41208984787 ps |
| T584 |
/workspace/coverage/cover_reg_top/88.xbar_smoke_zero_delays.3014734044 |
|
|
Mar 26 04:28:54 PM PDT 24 |
Mar 26 04:29:01 PM PDT 24 |
45733364 ps |
| T1321 |
/workspace/coverage/cover_reg_top/4.xbar_random_zero_delays.2934541303 |
|
|
Mar 26 04:10:56 PM PDT 24 |
Mar 26 04:11:13 PM PDT 24 |
155698911 ps |
| T800 |
/workspace/coverage/cover_reg_top/23.xbar_access_same_device_slow_rsp.1391153495 |
|
|
Mar 26 04:17:55 PM PDT 24 |
Mar 26 04:23:31 PM PDT 24 |
18969128278 ps |
| T815 |
/workspace/coverage/cover_reg_top/30.xbar_stress_all_with_reset_error.3351943270 |
|
|
Mar 26 04:19:32 PM PDT 24 |
Mar 26 04:19:44 PM PDT 24 |
16073837 ps |
| T818 |
/workspace/coverage/cover_reg_top/96.xbar_stress_all_with_reset_error.1668933847 |
|
|
Mar 26 04:30:02 PM PDT 24 |
Mar 26 04:30:47 PM PDT 24 |
117999310 ps |
| T1322 |
/workspace/coverage/cover_reg_top/63.xbar_smoke_slow_rsp.2526248521 |
|
|
Mar 26 04:24:51 PM PDT 24 |
Mar 26 04:26:41 PM PDT 24 |
6369947609 ps |
| T780 |
/workspace/coverage/cover_reg_top/29.xbar_access_same_device.2701562225 |
|
|
Mar 26 04:19:11 PM PDT 24 |
Mar 26 04:21:21 PM PDT 24 |
3003561026 ps |
| T1323 |
/workspace/coverage/cover_reg_top/91.xbar_smoke_large_delays.1825577938 |
|
|
Mar 26 04:29:06 PM PDT 24 |
Mar 26 04:30:07 PM PDT 24 |
5283213206 ps |
| T1324 |
/workspace/coverage/cover_reg_top/48.xbar_stress_all_with_reset_error.2749556849 |
|
|
Mar 26 04:22:41 PM PDT 24 |
Mar 26 04:28:31 PM PDT 24 |
7080230652 ps |
| T522 |
/workspace/coverage/cover_reg_top/48.xbar_random_slow_rsp.332147426 |
|
|
Mar 26 04:22:28 PM PDT 24 |
Mar 26 04:31:39 PM PDT 24 |
28538680312 ps |
| T455 |
/workspace/coverage/cover_reg_top/72.xbar_random_large_delays.3884411688 |
|
|
Mar 26 04:26:43 PM PDT 24 |
Mar 26 04:43:50 PM PDT 24 |
100196339178 ps |
| T1325 |
/workspace/coverage/cover_reg_top/11.xbar_stress_all_with_error.4272400065 |
|
|
Mar 26 04:14:09 PM PDT 24 |
Mar 26 04:18:54 PM PDT 24 |
3367225093 ps |
| T514 |
/workspace/coverage/cover_reg_top/17.chip_tl_errors.3088827654 |
|
|
Mar 26 04:16:01 PM PDT 24 |
Mar 26 04:22:16 PM PDT 24 |
3893357010 ps |
| T1326 |
/workspace/coverage/cover_reg_top/96.xbar_unmapped_addr.240320003 |
|
|
Mar 26 04:30:03 PM PDT 24 |
Mar 26 04:30:53 PM PDT 24 |
1076208901 ps |
| T569 |
/workspace/coverage/cover_reg_top/95.xbar_smoke_zero_delays.3814246979 |
|
|
Mar 26 04:29:45 PM PDT 24 |
Mar 26 04:29:52 PM PDT 24 |
51373579 ps |
| T1327 |
/workspace/coverage/cover_reg_top/53.xbar_random.1190744839 |
|
|
Mar 26 04:23:25 PM PDT 24 |
Mar 26 04:23:40 PM PDT 24 |
334660833 ps |
| T1328 |
/workspace/coverage/cover_reg_top/42.xbar_error_random.3298096058 |
|
|
Mar 26 04:21:36 PM PDT 24 |
Mar 26 04:22:52 PM PDT 24 |
2229146835 ps |
| T441 |
/workspace/coverage/cover_reg_top/48.xbar_stress_all_with_rand_reset.2303907160 |
|
|
Mar 26 04:22:41 PM PDT 24 |
Mar 26 04:30:11 PM PDT 24 |
6994569508 ps |
| T606 |
/workspace/coverage/cover_reg_top/54.xbar_smoke_large_delays.3124273912 |
|
|
Mar 26 04:23:35 PM PDT 24 |
Mar 26 04:25:20 PM PDT 24 |
8761106535 ps |
| T548 |
/workspace/coverage/cover_reg_top/25.xbar_random_slow_rsp.2508043745 |
|
|
Mar 26 04:18:24 PM PDT 24 |
Mar 26 04:32:54 PM PDT 24 |
47321215801 ps |
| T1329 |
/workspace/coverage/cover_reg_top/11.xbar_smoke.933768972 |
|
|
Mar 26 04:13:57 PM PDT 24 |
Mar 26 04:14:05 PM PDT 24 |
51119995 ps |
| T601 |
/workspace/coverage/cover_reg_top/61.xbar_random_large_delays.2251881562 |
|
|
Mar 26 04:24:31 PM PDT 24 |
Mar 26 04:43:55 PM PDT 24 |
97736550075 ps |
| T778 |
/workspace/coverage/cover_reg_top/36.xbar_access_same_device.963933870 |
|
|
Mar 26 04:20:45 PM PDT 24 |
Mar 26 04:23:25 PM PDT 24 |
3404723144 ps |
| T1330 |
/workspace/coverage/cover_reg_top/51.xbar_stress_all_with_rand_reset.2670639406 |
|
|
Mar 26 04:23:14 PM PDT 24 |
Mar 26 04:26:08 PM PDT 24 |
184186691 ps |
| T1331 |
/workspace/coverage/cover_reg_top/93.xbar_random_slow_rsp.643733010 |
|
|
Mar 26 04:29:32 PM PDT 24 |
Mar 26 04:35:34 PM PDT 24 |
19282071051 ps |
| T1332 |
/workspace/coverage/cover_reg_top/30.xbar_smoke_slow_rsp.1493813910 |
|
|
Mar 26 04:19:22 PM PDT 24 |
Mar 26 04:21:17 PM PDT 24 |
6226540198 ps |
| T1333 |
/workspace/coverage/cover_reg_top/24.xbar_random_large_delays.1650936896 |
|
|
Mar 26 04:18:17 PM PDT 24 |
Mar 26 04:20:21 PM PDT 24 |
11015865674 ps |
| T496 |
/workspace/coverage/cover_reg_top/53.xbar_stress_all.3023767952 |
|
|
Mar 26 04:23:33 PM PDT 24 |
Mar 26 04:31:42 PM PDT 24 |
12882629229 ps |
| T437 |
/workspace/coverage/cover_reg_top/64.xbar_unmapped_addr.3650625521 |
|
|
Mar 26 04:25:04 PM PDT 24 |
Mar 26 04:25:41 PM PDT 24 |
298901743 ps |
| T560 |
/workspace/coverage/cover_reg_top/96.xbar_smoke_zero_delays.1629027513 |
|
|
Mar 26 04:30:03 PM PDT 24 |
Mar 26 04:30:10 PM PDT 24 |
45962177 ps |
| T1334 |
/workspace/coverage/cover_reg_top/1.xbar_stress_all_with_rand_reset.754037415 |
|
|
Mar 26 04:08:32 PM PDT 24 |
Mar 26 04:10:06 PM PDT 24 |
156201190 ps |
| T1335 |
/workspace/coverage/cover_reg_top/67.xbar_stress_all_with_error.252531090 |
|
|
Mar 26 04:25:33 PM PDT 24 |
Mar 26 04:29:27 PM PDT 24 |
7119124267 ps |
| T490 |
/workspace/coverage/cover_reg_top/55.xbar_random_zero_delays.3954745673 |
|
|
Mar 26 04:23:43 PM PDT 24 |
Mar 26 04:24:18 PM PDT 24 |
372999804 ps |
| T377 |
/workspace/coverage/cover_reg_top/16.chip_csr_rw.127771628 |
|
|
Mar 26 04:16:05 PM PDT 24 |
Mar 26 04:19:50 PM PDT 24 |
3903787848 ps |
| T440 |
/workspace/coverage/cover_reg_top/34.xbar_stress_all_with_rand_reset.2948830137 |
|
|
Mar 26 04:20:24 PM PDT 24 |
Mar 26 04:33:55 PM PDT 24 |
17937179993 ps |
| T575 |
/workspace/coverage/cover_reg_top/74.xbar_random_zero_delays.3729482961 |
|
|
Mar 26 04:26:48 PM PDT 24 |
Mar 26 04:27:18 PM PDT 24 |
293620148 ps |
| T456 |
/workspace/coverage/cover_reg_top/56.xbar_stress_all_with_rand_reset.1752502212 |
|
|
Mar 26 04:23:49 PM PDT 24 |
Mar 26 04:29:28 PM PDT 24 |
2572008664 ps |
| T825 |
/workspace/coverage/cover_reg_top/16.xbar_stress_all_with_reset_error.1725730432 |
|
|
Mar 26 04:16:01 PM PDT 24 |
Mar 26 04:18:59 PM PDT 24 |
900154611 ps |
| T435 |
/workspace/coverage/cover_reg_top/54.xbar_stress_all.1054782581 |
|
|
Mar 26 04:23:34 PM PDT 24 |
Mar 26 04:28:32 PM PDT 24 |
3591041361 ps |
| T1336 |
/workspace/coverage/cover_reg_top/60.xbar_smoke_zero_delays.2973314232 |
|
|
Mar 26 04:24:24 PM PDT 24 |
Mar 26 04:24:31 PM PDT 24 |
49599100 ps |
| T1337 |
/workspace/coverage/cover_reg_top/86.xbar_smoke_zero_delays.2522030837 |
|
|
Mar 26 04:28:22 PM PDT 24 |
Mar 26 04:28:29 PM PDT 24 |
47078234 ps |
| T1338 |
/workspace/coverage/cover_reg_top/96.xbar_smoke_slow_rsp.3730124537 |
|
|
Mar 26 04:30:01 PM PDT 24 |
Mar 26 04:31:12 PM PDT 24 |
3786966644 ps |
| T573 |
/workspace/coverage/cover_reg_top/52.xbar_stress_all.134746357 |
|
|
Mar 26 04:23:21 PM PDT 24 |
Mar 26 04:27:52 PM PDT 24 |
6389486278 ps |
| T1339 |
/workspace/coverage/cover_reg_top/0.chip_rv_dm_lc_disabled.3302355825 |
|
|
Mar 26 04:06:55 PM PDT 24 |
Mar 26 04:12:18 PM PDT 24 |
6422248733 ps |
| T480 |
/workspace/coverage/cover_reg_top/68.xbar_random_slow_rsp.2960408662 |
|
|
Mar 26 04:25:48 PM PDT 24 |
Mar 26 04:43:59 PM PDT 24 |
66451098345 ps |
| T463 |
/workspace/coverage/cover_reg_top/62.xbar_random_slow_rsp.2372901811 |
|
|
Mar 26 04:24:46 PM PDT 24 |
Mar 26 04:31:43 PM PDT 24 |
23543357599 ps |
| T1340 |
/workspace/coverage/cover_reg_top/48.xbar_smoke_zero_delays.2037482788 |
|
|
Mar 26 04:22:32 PM PDT 24 |
Mar 26 04:22:39 PM PDT 24 |
48878106 ps |
| T1341 |
/workspace/coverage/cover_reg_top/6.xbar_smoke_large_delays.1185455536 |
|
|
Mar 26 04:11:42 PM PDT 24 |
Mar 26 04:13:18 PM PDT 24 |
8126401131 ps |
| T790 |
/workspace/coverage/cover_reg_top/69.xbar_stress_all_with_error.2685717493 |
|
|
Mar 26 04:25:44 PM PDT 24 |
Mar 26 04:36:34 PM PDT 24 |
18542147495 ps |
| T1342 |
/workspace/coverage/cover_reg_top/79.xbar_smoke_slow_rsp.3915150468 |
|
|
Mar 26 04:27:18 PM PDT 24 |
Mar 26 04:28:12 PM PDT 24 |
3066109373 ps |
| T1343 |
/workspace/coverage/cover_reg_top/16.xbar_random.4162582779 |
|
|
Mar 26 04:15:51 PM PDT 24 |
Mar 26 04:16:05 PM PDT 24 |
319334901 ps |
| T813 |
/workspace/coverage/cover_reg_top/87.xbar_stress_all_with_reset_error.3394083370 |
|
|
Mar 26 04:28:55 PM PDT 24 |
Mar 26 04:37:02 PM PDT 24 |
8630078155 ps |
| T1344 |
/workspace/coverage/cover_reg_top/32.xbar_stress_all_with_reset_error.3242470210 |
|
|
Mar 26 04:20:01 PM PDT 24 |
Mar 26 04:20:19 PM PDT 24 |
96065336 ps |
| T563 |
/workspace/coverage/cover_reg_top/57.xbar_random_zero_delays.2886042738 |
|
|
Mar 26 04:23:59 PM PDT 24 |
Mar 26 04:24:09 PM PDT 24 |
66162650 ps |
| T1345 |
/workspace/coverage/cover_reg_top/95.xbar_smoke_slow_rsp.2819441618 |
|
|
Mar 26 04:29:45 PM PDT 24 |
Mar 26 04:31:04 PM PDT 24 |
4108544682 ps |
| T1346 |
/workspace/coverage/cover_reg_top/14.xbar_smoke_large_delays.1576252078 |
|
|
Mar 26 04:15:04 PM PDT 24 |
Mar 26 04:16:39 PM PDT 24 |
8500014365 ps |
| T565 |
/workspace/coverage/cover_reg_top/26.xbar_same_source.1839934188 |
|
|
Mar 26 04:18:44 PM PDT 24 |
Mar 26 04:19:15 PM PDT 24 |
361777266 ps |
| T1347 |
/workspace/coverage/cover_reg_top/4.xbar_error_random.3537451407 |
|
|
Mar 26 04:11:00 PM PDT 24 |
Mar 26 04:12:19 PM PDT 24 |
1887884111 ps |
| T1348 |
/workspace/coverage/cover_reg_top/25.xbar_stress_all_with_error.1138868098 |
|
|
Mar 26 04:18:40 PM PDT 24 |
Mar 26 04:22:03 PM PDT 24 |
2251174516 ps |
| T517 |
/workspace/coverage/cover_reg_top/13.chip_tl_errors.1515472366 |
|
|
Mar 26 04:14:43 PM PDT 24 |
Mar 26 04:20:26 PM PDT 24 |
4131526808 ps |
| T1349 |
/workspace/coverage/cover_reg_top/29.xbar_error_random.1674778350 |
|
|
Mar 26 04:19:25 PM PDT 24 |
Mar 26 04:20:30 PM PDT 24 |
1783677041 ps |
| T1350 |
/workspace/coverage/cover_reg_top/38.xbar_smoke_zero_delays.234923579 |
|
|
Mar 26 04:20:55 PM PDT 24 |
Mar 26 04:21:02 PM PDT 24 |
47057190 ps |
| T1351 |
/workspace/coverage/cover_reg_top/49.xbar_unmapped_addr.176278138 |
|
|
Mar 26 04:22:56 PM PDT 24 |
Mar 26 04:23:35 PM PDT 24 |
288649226 ps |
| T604 |
/workspace/coverage/cover_reg_top/47.xbar_unmapped_addr.2483653486 |
|
|
Mar 26 04:22:31 PM PDT 24 |
Mar 26 04:23:01 PM PDT 24 |
210127180 ps |
| T578 |
/workspace/coverage/cover_reg_top/50.xbar_random.1430083702 |
|
|
Mar 26 04:22:50 PM PDT 24 |
Mar 26 04:23:45 PM PDT 24 |
1374049391 ps |
| T602 |
/workspace/coverage/cover_reg_top/98.xbar_stress_all_with_rand_reset.4189333358 |
|
|
Mar 26 04:30:20 PM PDT 24 |
Mar 26 04:34:21 PM PDT 24 |
602237337 ps |
| T1352 |
/workspace/coverage/cover_reg_top/21.xbar_random_large_delays.124673059 |
|
|
Mar 26 04:17:16 PM PDT 24 |
Mar 26 04:31:45 PM PDT 24 |
77859257059 ps |
| T1353 |
/workspace/coverage/cover_reg_top/55.xbar_error_and_unmapped_addr.3544892251 |
|
|
Mar 26 04:23:44 PM PDT 24 |
Mar 26 04:24:24 PM PDT 24 |
975011474 ps |
| T600 |
/workspace/coverage/cover_reg_top/35.xbar_stress_all_with_rand_reset.1384996473 |
|
|
Mar 26 04:20:35 PM PDT 24 |
Mar 26 04:25:05 PM PDT 24 |
629261352 ps |
| T1354 |
/workspace/coverage/cover_reg_top/84.xbar_error_and_unmapped_addr.3282972931 |
|
|
Mar 26 04:28:16 PM PDT 24 |
Mar 26 04:28:36 PM PDT 24 |
147015442 ps |
| T451 |
/workspace/coverage/cover_reg_top/30.xbar_access_same_device_slow_rsp.3465932477 |
|
|
Mar 26 04:19:34 PM PDT 24 |
Mar 26 04:37:07 PM PDT 24 |
60504439867 ps |
| T424 |
/workspace/coverage/cover_reg_top/3.chip_csr_rw.3667468619 |
|
|
Mar 26 04:10:21 PM PDT 24 |
Mar 26 04:16:20 PM PDT 24 |
4443124968 ps |
| T1355 |
/workspace/coverage/cover_reg_top/85.xbar_error_and_unmapped_addr.2760044417 |
|
|
Mar 26 04:28:21 PM PDT 24 |
Mar 26 04:28:51 PM PDT 24 |
238387282 ps |
| T789 |
/workspace/coverage/cover_reg_top/59.xbar_stress_all_with_reset_error.715037789 |
|
|
Mar 26 04:24:19 PM PDT 24 |
Mar 26 04:30:01 PM PDT 24 |
2556918457 ps |
| T609 |
/workspace/coverage/cover_reg_top/75.xbar_smoke.3682175545 |
|
|
Mar 26 04:26:50 PM PDT 24 |
Mar 26 04:27:00 PM PDT 24 |
224991711 ps |
| T1356 |
/workspace/coverage/cover_reg_top/73.xbar_smoke_zero_delays.4134461041 |
|
|
Mar 26 04:26:43 PM PDT 24 |
Mar 26 04:26:50 PM PDT 24 |
52624919 ps |
| T1357 |
/workspace/coverage/cover_reg_top/63.xbar_smoke.2538298970 |
|
|
Mar 26 04:24:45 PM PDT 24 |
Mar 26 04:24:53 PM PDT 24 |
56515111 ps |
| T1358 |
/workspace/coverage/cover_reg_top/18.xbar_stress_all_with_rand_reset.1957227974 |
|
|
Mar 26 04:16:37 PM PDT 24 |
Mar 26 04:21:31 PM PDT 24 |
555077474 ps |
| T1359 |
/workspace/coverage/cover_reg_top/61.xbar_error_and_unmapped_addr.2915369995 |
|
|
Mar 26 04:24:33 PM PDT 24 |
Mar 26 04:24:58 PM PDT 24 |
538359967 ps |
| T1360 |
/workspace/coverage/cover_reg_top/64.xbar_random.3407959344 |
|
|
Mar 26 04:24:54 PM PDT 24 |
Mar 26 04:25:28 PM PDT 24 |
925562993 ps |
| T1361 |
/workspace/coverage/cover_reg_top/6.xbar_random.3143857949 |
|
|
Mar 26 04:11:51 PM PDT 24 |
Mar 26 04:12:40 PM PDT 24 |
384010593 ps |
| T1362 |
/workspace/coverage/cover_reg_top/24.xbar_unmapped_addr.3753259433 |
|
|
Mar 26 04:18:31 PM PDT 24 |
Mar 26 04:19:03 PM PDT 24 |
720621916 ps |
| T457 |
/workspace/coverage/cover_reg_top/39.xbar_stress_all.783970627 |
|
|
Mar 26 04:21:07 PM PDT 24 |
Mar 26 04:30:57 PM PDT 24 |
14702091597 ps |
| T796 |
/workspace/coverage/cover_reg_top/44.xbar_stress_all_with_reset_error.1437557346 |
|
|
Mar 26 04:21:57 PM PDT 24 |
Mar 26 04:33:46 PM PDT 24 |
13995172158 ps |
| T785 |
/workspace/coverage/cover_reg_top/0.xbar_stress_all_with_error.2913431365 |
|
|
Mar 26 04:07:48 PM PDT 24 |
Mar 26 04:13:40 PM PDT 24 |
8401163779 ps |