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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.20 95.74 94.03 98.31 91.84 98.34 96.89 98.24


Total test records in report: 1271
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T669 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_rma_reset.3370494145 Sep 09 06:11:03 PM UTC 24 Sep 09 06:24:05 PM UTC 24 80137677400 ps
T670 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_smoke.1660197431 Sep 09 06:21:10 PM UTC 24 Sep 09 06:24:05 PM UTC 24 138684300 ps
T671 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_read_seed_err.3819937357 Sep 09 06:23:45 PM UTC 24 Sep 09 06:24:06 PM UTC 24 15201700 ps
T672 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_alert_test.2319041482 Sep 09 06:23:55 PM UTC 24 Sep 09 06:24:15 PM UTC 24 65292100 ps
T412 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_sec_info_access.3220787310 Sep 09 06:23:25 PM UTC 24 Sep 09 06:24:23 PM UTC 24 446090100 ps
T673 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_otp_reset.987163297 Sep 09 06:21:24 PM UTC 24 Sep 09 06:24:45 PM UTC 24 37726800 ps
T207 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_host_ctrl_arb.1791407686 Sep 09 05:41:25 PM UTC 24 Sep 09 06:24:48 PM UTC 24 345467474800 ps
T674 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_invalid_op.988441047 Sep 09 06:24:07 PM UTC 24 Sep 09 06:25:02 PM UTC 24 1497723200 ps
T675 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_wo.3183948033 Sep 09 06:21:35 PM UTC 24 Sep 09 06:25:07 PM UTC 24 4449053300 ps
T676 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_sec_otp.2935343802 Sep 09 06:24:01 PM UTC 24 Sep 09 06:25:25 PM UTC 24 2760267700 ps
T677 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_prog_reset.1301797100 Sep 09 06:25:07 PM UTC 24 Sep 09 06:25:34 PM UTC 24 55552600 ps
T678 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd.1472193754 Sep 09 06:22:16 PM UTC 24 Sep 09 06:25:42 PM UTC 24 21062462900 ps
T135 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_full_mem_access.3285640424 Sep 09 05:41:35 PM UTC 24 Sep 09 06:25:43 PM UTC 24 332042887700 ps
T679 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_sec_otp.3456460940 Sep 09 06:21:20 PM UTC 24 Sep 09 06:25:50 PM UTC 24 30792604300 ps
T680 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_prog_reset.3115395298 Sep 09 06:22:32 PM UTC 24 Sep 09 06:26:12 PM UTC 24 3177864200 ps
T681 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rw.4238621024 Sep 09 06:17:42 PM UTC 24 Sep 09 06:26:13 PM UTC 24 4335061100 ps
T682 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw_evict.2643932130 Sep 09 06:25:27 PM UTC 24 Sep 09 06:26:17 PM UTC 24 84697100 ps
T136 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_mp_regions.3021719410 Sep 09 06:21:32 PM UTC 24 Sep 09 06:26:18 PM UTC 24 20926728000 ps
T683 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_disable.1335836712 Sep 09 06:25:52 PM UTC 24 Sep 09 06:26:26 PM UTC 24 13063100 ps
T684 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_connect.28851525 Sep 09 06:26:13 PM UTC 24 Sep 09 06:26:35 PM UTC 24 170852400 ps
T685 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_re_evict.692186394 Sep 09 06:25:43 PM UTC 24 Sep 09 06:26:35 PM UTC 24 113513000 ps
T686 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw_evict_all_en.1597677716 Sep 09 06:25:35 PM UTC 24 Sep 09 06:26:37 PM UTC 24 30044000 ps
T687 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_lcmgr_intg.259821092 Sep 09 06:26:14 PM UTC 24 Sep 09 06:26:38 PM UTC 24 15144900 ps
T688 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_prog_rma_wipe_err.2828521271 Sep 09 06:23:49 PM UTC 24 Sep 09 06:26:42 PM UTC 24 10012691700 ps
T689 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_smoke.1275473654 Sep 09 06:23:59 PM UTC 24 Sep 09 06:26:42 PM UTC 24 21938900 ps
T690 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_ro.1945341999 Sep 09 06:24:24 PM UTC 24 Sep 09 06:26:46 PM UTC 24 550964400 ps
T691 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_read_seed_err.2117219284 Sep 09 06:26:19 PM UTC 24 Sep 09 06:26:48 PM UTC 24 47194600 ps
T692 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_alert_test.3238993792 Sep 09 06:26:27 PM UTC 24 Sep 09 06:26:52 PM UTC 24 55721900 ps
T182 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_otp_reset.1363806648 Sep 09 06:24:06 PM UTC 24 Sep 09 06:26:52 PM UTC 24 128777000 ps
T693 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_phy_arb.2844475892 Sep 09 06:17:09 PM UTC 24 Sep 09 06:27:05 PM UTC 24 1479950300 ps
T694 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd_slow_flash.3072027910 Sep 09 06:22:30 PM UTC 24 Sep 09 06:27:10 PM UTC 24 53141788100 ps
T695 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rand_ops.3798012220 Sep 09 06:07:05 PM UTC 24 Sep 09 06:27:14 PM UTC 24 649277700 ps
T400 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_sec_info_access.980722312 Sep 09 06:25:53 PM UTC 24 Sep 09 06:27:17 PM UTC 24 1871326200 ps
T696 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rw.2812350274 Sep 09 06:19:32 PM UTC 24 Sep 09 06:27:19 PM UTC 24 3721399000 ps
T697 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_wo.3124429033 Sep 09 06:24:17 PM UTC 24 Sep 09 06:27:25 PM UTC 24 9986210700 ps
T90 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_error_prog_type.1030985590 Sep 09 05:46:48 PM UTC 24 Sep 09 06:27:33 PM UTC 24 801438300 ps
T698 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_prog_reset.3747928728 Sep 09 06:27:18 PM UTC 24 Sep 09 06:27:43 PM UTC 24 64878500 ps
T137 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_mp_regions.3700876681 Sep 09 06:17:27 PM UTC 24 Sep 09 06:27:54 PM UTC 24 11971946200 ps
T699 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_invalid_op.1264888385 Sep 09 06:26:50 PM UTC 24 Sep 09 06:27:54 PM UTC 24 7118811200 ps
T700 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd.130038154 Sep 09 06:24:49 PM UTC 24 Sep 09 06:27:59 PM UTC 24 3000251200 ps
T701 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_sec_otp.1875924696 Sep 09 06:26:39 PM UTC 24 Sep 09 06:28:10 PM UTC 24 2751701600 ps
T702 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_connect.3992887062 Sep 09 06:27:56 PM UTC 24 Sep 09 06:28:15 PM UTC 24 26996200 ps
T419 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_re_evict.2041653274 Sep 09 06:27:34 PM UTC 24 Sep 09 06:28:23 PM UTC 24 111333400 ps
T703 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw_evict.3380607213 Sep 09 06:27:20 PM UTC 24 Sep 09 06:28:25 PM UTC 24 39171000 ps
T704 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_lcmgr_intg.1566776690 Sep 09 06:28:00 PM UTC 24 Sep 09 06:28:25 PM UTC 24 203205400 ps
T429 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw_evict_all_en.452387213 Sep 09 06:27:26 PM UTC 24 Sep 09 06:28:26 PM UTC 24 28855000 ps
T108 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_disable.135910862 Sep 09 06:27:44 PM UTC 24 Sep 09 06:28:27 PM UTC 24 16433400 ps
T705 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_read_seed_err.3601165341 Sep 09 06:28:11 PM UTC 24 Sep 09 06:28:28 PM UTC 24 51839800 ps
T706 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_rma_reset.871702408 Sep 09 06:14:57 PM UTC 24 Sep 09 06:28:29 PM UTC 24 80139500600 ps
T707 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_smoke.3975966678 Sep 09 06:26:36 PM UTC 24 Sep 09 06:28:38 PM UTC 24 110070600 ps
T708 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_ro.3600264784 Sep 09 06:26:54 PM UTC 24 Sep 09 06:28:39 PM UTC 24 642326900 ps
T709 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_alert_test.1033795459 Sep 09 06:28:23 PM UTC 24 Sep 09 06:28:42 PM UTC 24 564762700 ps
T710 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_prog_rma_wipe_err.1929875841 Sep 09 06:26:19 PM UTC 24 Sep 09 06:28:43 PM UTC 24 10017353700 ps
T138 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_mp_regions.1976218844 Sep 09 06:24:07 PM UTC 24 Sep 09 06:29:10 PM UTC 24 12118513200 ps
T711 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rand_ops.3487656320 Sep 09 06:21:14 PM UTC 24 Sep 09 06:29:17 PM UTC 24 958129800 ps
T712 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_wo.1050864090 Sep 09 06:26:53 PM UTC 24 Sep 09 06:29:23 PM UTC 24 1819515800 ps
T283 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_error_mp.688262517 Sep 09 05:36:05 PM UTC 24 Sep 09 06:29:30 PM UTC 24 24060375800 ps
T713 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_smoke.4201472561 Sep 09 06:28:25 PM UTC 24 Sep 09 06:29:38 PM UTC 24 100007900 ps
T714 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rand_ops.841895920 Sep 09 06:17:06 PM UTC 24 Sep 09 06:29:41 PM UTC 24 109635500 ps
T715 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_sec_info_access.3940134684 Sep 09 06:27:56 PM UTC 24 Sep 09 06:29:42 PM UTC 24 8278977000 ps
T716 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_rma_reset.3657113540 Sep 09 06:17:13 PM UTC 24 Sep 09 06:29:45 PM UTC 24 40125308600 ps
T717 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_intr_rd.734641676 Sep 09 06:27:11 PM UTC 24 Sep 09 06:29:50 PM UTC 24 1436073600 ps
T718 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_prog_reset.3198617153 Sep 09 06:29:31 PM UTC 24 Sep 09 06:29:57 PM UTC 24 35531800 ps
T719 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_prog_rma_wipe_err.4192612153 Sep 09 06:28:16 PM UTC 24 Sep 09 06:30:02 PM UTC 24 10019569200 ps
T720 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_invalid_op.3860142540 Sep 09 06:28:40 PM UTC 24 Sep 09 06:30:11 PM UTC 24 1935186600 ps
T386 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_disable.4161165495 Sep 09 06:29:46 PM UTC 24 Sep 09 06:30:14 PM UTC 24 11098400 ps
T427 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict_all_en.3361451694 Sep 09 06:29:42 PM UTC 24 Sep 09 06:30:24 PM UTC 24 60515000 ps
T721 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_connect.4096693120 Sep 09 06:29:58 PM UTC 24 Sep 09 06:30:25 PM UTC 24 159551900 ps
T183 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_otp_reset.936837964 Sep 09 06:26:43 PM UTC 24 Sep 09 06:30:25 PM UTC 24 37116900 ps
T722 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_re_evict.3848944310 Sep 09 06:29:43 PM UTC 24 Sep 09 06:30:28 PM UTC 24 495041400 ps
T723 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_lcmgr_intg.1333261099 Sep 09 06:30:03 PM UTC 24 Sep 09 06:30:29 PM UTC 24 34668200 ps
T724 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_read_seed_err.2261312658 Sep 09 06:30:13 PM UTC 24 Sep 09 06:30:33 PM UTC 24 26760400 ps
T725 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_host_ctrl_arb.2760592695 Sep 09 05:35:33 PM UTC 24 Sep 09 06:30:34 PM UTC 24 281691808500 ps
T726 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict.1271541667 Sep 09 06:29:39 PM UTC 24 Sep 09 06:30:37 PM UTC 24 30024000 ps
T727 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_ro.3971446420 Sep 09 06:28:44 PM UTC 24 Sep 09 06:30:40 PM UTC 24 1852340900 ps
T728 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_alert_test.4283042162 Sep 09 06:30:25 PM UTC 24 Sep 09 06:30:42 PM UTC 24 75729800 ps
T729 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_error_prog_win.1486887543 Sep 09 06:11:21 PM UTC 24 Sep 09 06:30:49 PM UTC 24 364323500 ps
T730 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw.2998436154 Sep 09 06:21:50 PM UTC 24 Sep 09 06:30:53 PM UTC 24 3783509400 ps
T731 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_sec_info_access.3869377861 Sep 09 06:29:50 PM UTC 24 Sep 09 06:31:02 PM UTC 24 1283593000 ps
T317 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_sec_otp.789692692 Sep 09 06:28:27 PM UTC 24 Sep 09 06:31:06 PM UTC 24 4248710100 ps
T93 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_intr_rd_slow_flash.3339464122 Sep 09 06:27:15 PM UTC 24 Sep 09 06:31:07 PM UTC 24 12084050300 ps
T732 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_wo.3255917959 Sep 09 06:28:43 PM UTC 24 Sep 09 06:31:10 PM UTC 24 12857842600 ps
T733 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_phy_arb.2539814953 Sep 09 06:26:38 PM UTC 24 Sep 09 06:31:14 PM UTC 24 351008000 ps
T734 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_prog_reset.1001962077 Sep 09 06:31:08 PM UTC 24 Sep 09 06:31:33 PM UTC 24 60254200 ps
T735 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_otp_reset.2341295648 Sep 09 06:28:31 PM UTC 24 Sep 09 06:31:37 PM UTC 24 346624300 ps
T736 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd.1741968709 Sep 09 06:29:18 PM UTC 24 Sep 09 06:31:46 PM UTC 24 744331500 ps
T152 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_mp_regions.700666415 Sep 09 06:26:47 PM UTC 24 Sep 09 06:31:51 PM UTC 24 41223386700 ps
T737 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_invalid_op.1515131470 Sep 09 06:30:41 PM UTC 24 Sep 09 06:31:58 PM UTC 24 2381817100 ps
T738 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_phy_arb.1557454812 Sep 09 06:21:19 PM UTC 24 Sep 09 06:32:01 PM UTC 24 12105327500 ps
T739 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw_evict_all_en.449129580 Sep 09 06:31:15 PM UTC 24 Sep 09 06:32:03 PM UTC 24 27030700 ps
T740 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_sec_otp.585874212 Sep 09 06:30:30 PM UTC 24 Sep 09 06:32:06 PM UTC 24 3121439800 ps
T741 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_prog_rma_wipe_err.4087509667 Sep 09 06:30:14 PM UTC 24 Sep 09 06:32:07 PM UTC 24 10019526500 ps
T742 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd_slow_flash.3562556841 Sep 09 06:29:24 PM UTC 24 Sep 09 06:32:10 PM UTC 24 29880521100 ps
T743 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_connect.2681059625 Sep 09 06:31:53 PM UTC 24 Sep 09 06:32:14 PM UTC 24 198923400 ps
T109 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_disable.2345370290 Sep 09 06:31:38 PM UTC 24 Sep 09 06:32:16 PM UTC 24 15185600 ps
T744 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_lcmgr_intg.804765876 Sep 09 06:31:59 PM UTC 24 Sep 09 06:32:19 PM UTC 24 14981500 ps
T745 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_rma_reset.4126689830 Sep 09 06:19:08 PM UTC 24 Sep 09 06:32:21 PM UTC 24 40121716000 ps
T746 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_alert_test.2647138140 Sep 09 06:32:04 PM UTC 24 Sep 09 06:32:27 PM UTC 24 132052100 ps
T747 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_read_seed_err.4782939 Sep 09 06:32:02 PM UTC 24 Sep 09 06:32:28 PM UTC 24 36300600 ps
T748 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_re_evict.2566585227 Sep 09 06:31:34 PM UTC 24 Sep 09 06:32:36 PM UTC 24 69802100 ps
T749 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_phy_arb.2444462209 Sep 09 06:24:00 PM UTC 24 Sep 09 06:32:45 PM UTC 24 11070607100 ps
T153 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_full_mem_access.4125303451 Sep 09 05:46:41 PM UTC 24 Sep 09 06:32:48 PM UTC 24 324089820600 ps
T750 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_ro.3802820173 Sep 09 06:30:50 PM UTC 24 Sep 09 06:32:58 PM UTC 24 1823520200 ps
T751 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw.4177583904 Sep 09 06:24:46 PM UTC 24 Sep 09 06:33:04 PM UTC 24 3707616000 ps
T752 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_wo.277548379 Sep 09 06:30:43 PM UTC 24 Sep 09 06:33:23 PM UTC 24 13610987300 ps
T753 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_invalid_op.385109753 Sep 09 06:32:28 PM UTC 24 Sep 09 06:33:23 PM UTC 24 1568973000 ps
T754 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_prog_reset.3993969940 Sep 09 06:32:59 PM UTC 24 Sep 09 06:33:29 PM UTC 24 44300500 ps
T755 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_sec_otp.910900822 Sep 09 06:32:16 PM UTC 24 Sep 09 06:33:36 PM UTC 24 2794804700 ps
T756 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd_slow_flash.2205865072 Sep 09 06:31:06 PM UTC 24 Sep 09 06:33:37 PM UTC 24 24315349600 ps
T757 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_sec_info_access.4280837774 Sep 09 06:31:47 PM UTC 24 Sep 09 06:33:39 PM UTC 24 2318485400 ps
T758 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw.4092938719 Sep 09 06:27:06 PM UTC 24 Sep 09 06:33:43 PM UTC 24 4206996600 ps
T759 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_otp_reset.1028388271 Sep 09 06:30:35 PM UTC 24 Sep 09 06:33:44 PM UTC 24 63157000 ps
T91 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_error_prog_type.4262920892 Sep 09 05:35:44 PM UTC 24 Sep 09 06:33:50 PM UTC 24 948456800 ps
T760 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict.1590793942 Sep 09 06:33:05 PM UTC 24 Sep 09 06:33:50 PM UTC 24 28281500 ps
T338 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd_slow_flash.3937717095 Sep 09 06:25:03 PM UTC 24 Sep 09 06:33:57 PM UTC 24 199192857700 ps
T435 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict_all_en.2462772387 Sep 09 06:33:24 PM UTC 24 Sep 09 06:34:01 PM UTC 24 86951200 ps
T278 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_prog_rma_wipe_err.3877690011 Sep 09 06:32:03 PM UTC 24 Sep 09 06:34:02 PM UTC 24 10036837300 ps
T761 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_re_evict.423304523 Sep 09 06:33:24 PM UTC 24 Sep 09 06:34:05 PM UTC 24 66869900 ps
T762 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_lcmgr_intg.1209389595 Sep 09 06:33:40 PM UTC 24 Sep 09 06:34:06 PM UTC 24 16039800 ps
T86 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_connect.1064734097 Sep 09 06:33:38 PM UTC 24 Sep 09 06:34:07 PM UTC 24 94518900 ps
T763 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_read_seed_err.3283201947 Sep 09 06:33:44 PM UTC 24 Sep 09 06:34:09 PM UTC 24 46298600 ps
T764 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_disable.1694354698 Sep 09 06:33:29 PM UTC 24 Sep 09 06:34:10 PM UTC 24 97100800 ps
T765 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd.1734563691 Sep 09 06:31:03 PM UTC 24 Sep 09 06:34:12 PM UTC 24 4029875000 ps
T766 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_alert_test.3126570512 Sep 09 06:33:50 PM UTC 24 Sep 09 06:34:16 PM UTC 24 29458200 ps
T767 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_ro.464781944 Sep 09 06:32:36 PM UTC 24 Sep 09 06:34:20 PM UTC 24 2394654300 ps
T403 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_sec_info_access.4226518216 Sep 09 06:33:38 PM UTC 24 Sep 09 06:34:47 PM UTC 24 4176400100 ps
T768 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_error_prog_win.3568071128 Sep 09 06:08:00 PM UTC 24 Sep 09 06:35:16 PM UTC 24 1942660200 ps
T769 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_smoke.3993198529 Sep 09 06:30:25 PM UTC 24 Sep 09 06:35:19 PM UTC 24 65856800 ps
T284 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_error_mp.3437444714 Sep 09 05:41:38 PM UTC 24 Sep 09 06:35:20 PM UTC 24 7475256100 ps
T184 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_otp_reset.898300605 Sep 09 06:32:20 PM UTC 24 Sep 09 06:35:25 PM UTC 24 53711000 ps
T770 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_wo.3696576997 Sep 09 06:32:29 PM UTC 24 Sep 09 06:35:33 PM UTC 24 31403077300 ps
T771 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd.4238767809 Sep 09 06:32:57 PM UTC 24 Sep 09 06:35:37 PM UTC 24 1485381900 ps
T772 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_invalid_op.448339165 Sep 09 06:34:09 PM UTC 24 Sep 09 06:35:40 PM UTC 24 39008492000 ps
T773 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_smoke.2606362728 Sep 09 06:32:06 PM UTC 24 Sep 09 06:35:48 PM UTC 24 24710400 ps
T414 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_mp_regions.764502893 Sep 09 06:19:17 PM UTC 24 Sep 09 06:35:56 PM UTC 24 15560606100 ps
T774 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw_evict_all_en.440390972 Sep 09 06:35:21 PM UTC 24 Sep 09 06:35:59 PM UTC 24 47020200 ps
T370 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_disable.640321200 Sep 09 06:35:34 PM UTC 24 Sep 09 06:36:01 PM UTC 24 30494100 ps
T775 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_connect.523232284 Sep 09 06:35:41 PM UTC 24 Sep 09 06:36:05 PM UTC 24 21246400 ps
T776 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rand_ops.3631509776 Sep 09 06:19:00 PM UTC 24 Sep 09 06:36:08 PM UTC 24 151729900 ps
T777 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_alert_test.1296538512 Sep 09 06:36:02 PM UTC 24 Sep 09 06:36:27 PM UTC 24 48608400 ps
T778 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_smoke.3437606069 Sep 09 06:33:51 PM UTC 24 Sep 09 06:36:08 PM UTC 24 93588900 ps
T779 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw_evict.688651550 Sep 09 06:35:20 PM UTC 24 Sep 09 06:36:09 PM UTC 24 235889700 ps
T320 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_re_evict.4205336616 Sep 09 06:35:26 PM UTC 24 Sep 09 06:36:11 PM UTC 24 63573900 ps
T780 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_wo.1521945463 Sep 09 06:34:11 PM UTC 24 Sep 09 06:36:14 PM UTC 24 1892148900 ps
T781 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_read_seed_err.1268856243 Sep 09 06:35:57 PM UTC 24 Sep 09 06:36:15 PM UTC 24 15488600 ps
T782 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_lcmgr_intg.3527228012 Sep 09 06:35:49 PM UTC 24 Sep 09 06:36:16 PM UTC 24 46062500 ps
T783 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_sec_otp.966888809 Sep 09 06:34:04 PM UTC 24 Sep 09 06:36:18 PM UTC 24 42030014400 ps
T784 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_otp_reset.1508362157 Sep 09 06:34:07 PM UTC 24 Sep 09 06:36:25 PM UTC 24 158047400 ps
T94 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw.1569377633 Sep 09 06:29:11 PM UTC 24 Sep 09 06:36:26 PM UTC 24 10558317800 ps
T785 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_rma_reset.1832684410 Sep 09 06:21:21 PM UTC 24 Sep 09 06:36:39 PM UTC 24 80148616100 ps
T786 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_prog_reset.2699390747 Sep 09 06:36:15 PM UTC 24 Sep 09 06:36:41 PM UTC 24 212877500 ps
T787 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_ro.1098804656 Sep 09 06:34:12 PM UTC 24 Sep 09 06:36:45 PM UTC 24 562992100 ps
T371 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_disable.1790071999 Sep 09 06:36:19 PM UTC 24 Sep 09 06:36:47 PM UTC 24 61983600 ps
T788 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd.1124269741 Sep 09 06:34:22 PM UTC 24 Sep 09 06:36:48 PM UTC 24 504738100 ps
T789 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_connect.713922335 Sep 09 06:36:26 PM UTC 24 Sep 09 06:36:51 PM UTC 24 16322700 ps
T790 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_alert_test.764525307 Sep 09 06:36:28 PM UTC 24 Sep 09 06:36:53 PM UTC 24 23829400 ps
T791 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_prog_rma_wipe_err.2493395213 Sep 09 06:36:00 PM UTC 24 Sep 09 06:36:53 PM UTC 24 10038926900 ps
T424 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict_all_en.43970977 Sep 09 06:36:17 PM UTC 24 Sep 09 06:37:05 PM UTC 24 90535100 ps
T792 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_sec_info_access.2865093595 Sep 09 06:35:38 PM UTC 24 Sep 09 06:37:05 PM UTC 24 3350340400 ps
T793 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_prog_reset.2000411376 Sep 09 06:36:52 PM UTC 24 Sep 09 06:37:11 PM UTC 24 81441400 ps
T794 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict.2915399455 Sep 09 06:36:16 PM UTC 24 Sep 09 06:37:13 PM UTC 24 30016100 ps
T432 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_rw_evict.1119091590 Sep 09 06:36:54 PM UTC 24 Sep 09 06:37:33 PM UTC 24 382669200 ps
T795 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd_slow_flash.4106600101 Sep 09 06:32:59 PM UTC 24 Sep 09 06:37:38 PM UTC 24 24065773500 ps
T796 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_alert_test.4211590052 Sep 09 06:37:14 PM UTC 24 Sep 09 06:37:39 PM UTC 24 37463500 ps
T797 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_sec_info_access.2204296001 Sep 09 06:36:26 PM UTC 24 Sep 09 06:37:40 PM UTC 24 3722654700 ps
T798 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_connect.3257739665 Sep 09 06:37:12 PM UTC 24 Sep 09 06:37:40 PM UTC 24 17249900 ps
T799 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_disable.1607969094 Sep 09 06:37:06 PM UTC 24 Sep 09 06:37:42 PM UTC 24 20730900 ps
T800 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_rma_reset.3253705782 Sep 09 06:24:01 PM UTC 24 Sep 09 06:37:44 PM UTC 24 80137335400 ps
T801 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_rw_evict_all_en.3501317576 Sep 09 06:36:54 PM UTC 24 Sep 09 06:37:47 PM UTC 24 142342700 ps
T802 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw.1363741229 Sep 09 06:30:53 PM UTC 24 Sep 09 06:37:55 PM UTC 24 14318440100 ps
T803 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_prog_reset.3113639395 Sep 09 06:37:43 PM UTC 24 Sep 09 06:38:05 PM UTC 24 75258700 ps
T804 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_mp_regions.797494618 Sep 09 06:32:22 PM UTC 24 Sep 09 06:38:16 PM UTC 24 42153071400 ps
T279 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_prog_rma_wipe_err.1704858117 Sep 09 06:33:45 PM UTC 24 Sep 09 06:38:18 PM UTC 24 10013146700 ps
T805 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_hw_sec_otp.345069187 Sep 09 06:36:08 PM UTC 24 Sep 09 06:38:24 PM UTC 24 4886995400 ps
T390 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_disable.407280344 Sep 09 06:37:56 PM UTC 24 Sep 09 06:38:31 PM UTC 24 20595300 ps
T806 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rand_ops.2061388438 Sep 09 06:02:49 PM UTC 24 Sep 09 06:38:32 PM UTC 24 3316936800 ps
T807 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_error_mp.1226461880 Sep 09 05:52:26 PM UTC 24 Sep 09 06:38:33 PM UTC 24 21499315200 ps
T808 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_sec_info_access.413342313 Sep 09 06:37:07 PM UTC 24 Sep 09 06:38:34 PM UTC 24 992104100 ps
T809 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_alert_test.3671820359 Sep 09 06:38:19 PM UTC 24 Sep 09 06:38:37 PM UTC 24 97952800 ps
T810 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_rw_evict.2241261867 Sep 09 06:37:45 PM UTC 24 Sep 09 06:38:39 PM UTC 24 39758700 ps
T811 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_rw_evict_all_en.3222002842 Sep 09 06:37:48 PM UTC 24 Sep 09 06:38:40 PM UTC 24 273051200 ps
T319 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_hw_sec_otp.3809949883 Sep 09 06:36:42 PM UTC 24 Sep 09 06:38:42 PM UTC 24 14733236400 ps
T812 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_connect.4223084901 Sep 09 06:38:18 PM UTC 24 Sep 09 06:38:45 PM UTC 24 40182500 ps
T813 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_host_ctrl_arb.384096946 Sep 09 05:46:26 PM UTC 24 Sep 09 06:38:52 PM UTC 24 247904085200 ps
T814 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rand_ops.150658383 Sep 09 06:32:07 PM UTC 24 Sep 09 06:38:52 PM UTC 24 275862300 ps
T815 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw.2574018814 Sep 09 06:32:45 PM UTC 24 Sep 09 06:39:01 PM UTC 24 3018348800 ps
T816 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd_slow_flash.2797814222 Sep 09 06:36:12 PM UTC 24 Sep 09 06:39:04 PM UTC 24 5803727600 ps
T410 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_sec_info_access.211468712 Sep 09 06:38:05 PM UTC 24 Sep 09 06:39:05 PM UTC 24 387983800 ps
T817 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_prog_reset.1944249518 Sep 09 06:38:38 PM UTC 24 Sep 09 06:39:05 PM UTC 24 58009700 ps
T818 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_phy_arb.2090217066 Sep 09 06:34:02 PM UTC 24 Sep 09 06:39:11 PM UTC 24 4932450000 ps
T819 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_connect.1810389933 Sep 09 06:38:53 PM UTC 24 Sep 09 06:39:14 PM UTC 24 28292900 ps
T820 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_disable.2343420592 Sep 09 06:38:43 PM UTC 24 Sep 09 06:39:18 PM UTC 24 10755800 ps
T821 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_alert_test.536793393 Sep 09 06:38:54 PM UTC 24 Sep 09 06:39:21 PM UTC 24 62566800 ps
T822 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict.3928448543 Sep 09 06:38:40 PM UTC 24 Sep 09 06:39:22 PM UTC 24 27409600 ps
T823 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd.1516335510 Sep 09 06:36:09 PM UTC 24 Sep 09 06:39:24 PM UTC 24 1585473100 ps
T92 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_error_prog_type.3330095429 Sep 09 05:41:37 PM UTC 24 Sep 09 06:39:27 PM UTC 24 691100100 ps
T824 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_smoke.833092773 Sep 09 06:38:25 PM UTC 24 Sep 09 06:39:31 PM UTC 24 47948700 ps
T825 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rand_ops.1000333822 Sep 09 06:33:58 PM UTC 24 Sep 09 06:39:31 PM UTC 24 130899100 ps
T174 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_otp_reset.2833690423 Sep 09 06:36:46 PM UTC 24 Sep 09 06:39:32 PM UTC 24 155890800 ps
T826 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_prog_reset.191877063 Sep 09 06:39:14 PM UTC 24 Sep 09 06:39:33 PM UTC 24 21155000 ps
T827 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict_all_en.1779756305 Sep 09 06:38:41 PM UTC 24 Sep 09 06:39:37 PM UTC 24 132423200 ps
T828 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_hw_sec_otp.4002043462 Sep 09 06:37:39 PM UTC 24 Sep 09 06:39:42 PM UTC 24 10488186400 ps
T829 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_disable.309404890 Sep 09 06:39:23 PM UTC 24 Sep 09 06:39:50 PM UTC 24 37046400 ps
T830 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_connect.3302559852 Sep 09 06:39:28 PM UTC 24 Sep 09 06:39:52 PM UTC 24 14878400 ps
T831 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_alert_test.733154617 Sep 09 06:39:32 PM UTC 24 Sep 09 06:39:57 PM UTC 24 50174800 ps
T832 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_otp_reset.1491237641 Sep 09 06:36:09 PM UTC 24 Sep 09 06:39:58 PM UTC 24 145265700 ps
T833 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_sec_info_access.1932287064 Sep 09 06:38:45 PM UTC 24 Sep 09 06:39:59 PM UTC 24 2303651000 ps
T834 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_rw_evict.2544324587 Sep 09 06:39:20 PM UTC 24 Sep 09 06:40:03 PM UTC 24 94942700 ps
T835 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_rw_evict_all_en.607733795 Sep 09 06:39:22 PM UTC 24 Sep 09 06:40:07 PM UTC 24 27554000 ps
T836 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_intr_rd.2535346049 Sep 09 06:36:48 PM UTC 24 Sep 09 06:40:07 PM UTC 24 2908973000 ps
T837 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_prog_reset.479844190 Sep 09 06:39:51 PM UTC 24 Sep 09 06:40:16 PM UTC 24 31187100 ps
T838 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_phy_arb.2160728956 Sep 09 06:28:27 PM UTC 24 Sep 09 06:40:21 PM UTC 24 1491954300 ps
T839 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_smoke.3891246746 Sep 09 06:36:40 PM UTC 24 Sep 09 06:40:24 PM UTC 24 105413600 ps
T840 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_smoke.1721932290 Sep 09 06:37:34 PM UTC 24 Sep 09 06:40:24 PM UTC 24 46214900 ps
T841 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_intr_rd_slow_flash.3938537779 Sep 09 06:37:42 PM UTC 24 Sep 09 06:40:28 PM UTC 24 5782340900 ps
T842 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_alert_test.3427262357 Sep 09 06:40:08 PM UTC 24 Sep 09 06:40:31 PM UTC 24 86786600 ps
T843 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_sec_info_access.15885717 Sep 09 06:39:25 PM UTC 24 Sep 09 06:40:32 PM UTC 24 4895181800 ps
T844 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd_slow_flash.792058028 Sep 09 06:34:48 PM UTC 24 Sep 09 06:40:33 PM UTC 24 12759496700 ps
T368 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_disable.481149815 Sep 09 06:39:59 PM UTC 24 Sep 09 06:40:34 PM UTC 24 94187500 ps
T845 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_connect.3886165261 Sep 09 06:40:04 PM UTC 24 Sep 09 06:40:37 PM UTC 24 16776700 ps
T846 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_smoke.3800202171 Sep 09 06:36:06 PM UTC 24 Sep 09 06:40:38 PM UTC 24 73494700 ps
T847 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_rw_evict_all_en.2588938211 Sep 09 06:39:57 PM UTC 24 Sep 09 06:40:41 PM UTC 24 42157400 ps
T848 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_rw_evict.2309714103 Sep 09 06:39:53 PM UTC 24 Sep 09 06:40:46 PM UTC 24 32655600 ps
T849 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_intr_rd.4197057316 Sep 09 06:37:40 PM UTC 24 Sep 09 06:40:49 PM UTC 24 4901195000 ps
T850 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_mp_regions.838351725 Sep 09 06:34:08 PM UTC 24 Sep 09 06:40:51 PM UTC 24 22124015200 ps
T175 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_otp_reset.1904818378 Sep 09 06:37:40 PM UTC 24 Sep 09 06:40:51 PM UTC 24 125762200 ps
T851 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_prog_reset.343361794 Sep 09 06:40:28 PM UTC 24 Sep 09 06:40:53 PM UTC 24 61083300 ps
T852 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_connect.1268983047 Sep 09 06:40:38 PM UTC 24 Sep 09 06:41:06 PM UTC 24 15495400 ps
T853 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_alert_test.3395055783 Sep 09 06:40:39 PM UTC 24 Sep 09 06:41:06 PM UTC 24 79963800 ps
T854 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_rw_evict.2889031946 Sep 09 06:40:32 PM UTC 24 Sep 09 06:41:07 PM UTC 24 27400500 ps
T855 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_rw_evict_all_en.3537885113 Sep 09 06:40:33 PM UTC 24 Sep 09 06:41:10 PM UTC 24 82397500 ps
T391 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_disable.785035916 Sep 09 06:40:35 PM UTC 24 Sep 09 06:41:12 PM UTC 24 40937100 ps
T856 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_intr_rd_slow_flash.3264660998 Sep 09 06:38:36 PM UTC 24 Sep 09 06:41:20 PM UTC 24 26123633200 ps
T857 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_hw_sec_otp.3837745363 Sep 09 06:39:33 PM UTC 24 Sep 09 06:41:21 PM UTC 24 9241333200 ps
T858 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_prog_reset.3320627409 Sep 09 06:40:54 PM UTC 24 Sep 09 06:41:24 PM UTC 24 22455100 ps
T859 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_mp_regions.3983704005 Sep 09 06:30:38 PM UTC 24 Sep 09 06:41:26 PM UTC 24 68680611800 ps
T860 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_connect.3294014484 Sep 09 06:41:13 PM UTC 24 Sep 09 06:41:39 PM UTC 24 21126500 ps
T407 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_sec_info_access.2976322900 Sep 09 06:39:59 PM UTC 24 Sep 09 06:41:40 PM UTC 24 1192006800 ps
T861 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_hw_sec_otp.2728364517 Sep 09 06:38:31 PM UTC 24 Sep 09 06:41:43 PM UTC 24 4446070200 ps
T169 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_otp_reset.1742658244 Sep 09 06:38:32 PM UTC 24 Sep 09 06:41:43 PM UTC 24 150092500 ps
T862 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_rw_evict.2429017987 Sep 09 06:41:07 PM UTC 24 Sep 09 06:41:44 PM UTC 24 29446600 ps
T863 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_alert_test.3045434811 Sep 09 06:41:21 PM UTC 24 Sep 09 06:41:47 PM UTC 24 22620100 ps
T864 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_smoke.3704687120 Sep 09 06:39:32 PM UTC 24 Sep 09 06:41:48 PM UTC 24 28554200 ps
T865 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_smoke.1513313725 Sep 09 06:40:42 PM UTC 24 Sep 09 06:41:49 PM UTC 24 33014400 ps
T866 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_rw_evict_all_en.1792937394 Sep 09 06:41:07 PM UTC 24 Sep 09 06:41:50 PM UTC 24 27460600 ps
T387 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_disable.673835041 Sep 09 06:41:08 PM UTC 24 Sep 09 06:41:50 PM UTC 24 28925000 ps
T867 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_otp_reset.1413573047 Sep 09 06:39:05 PM UTC 24 Sep 09 06:41:52 PM UTC 24 154172000 ps
T868 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_sec_info_access.2672130371 Sep 09 06:40:35 PM UTC 24 Sep 09 06:41:53 PM UTC 24 1646858100 ps
T313 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_hw_sec_otp.51183767 Sep 09 06:39:05 PM UTC 24 Sep 09 06:41:58 PM UTC 24 8389598500 ps
T869 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw.3221510094 Sep 09 06:34:16 PM UTC 24 Sep 09 06:42:03 PM UTC 24 3973605000 ps
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