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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.20 95.74 94.03 98.31 91.84 98.34 96.89 98.24


Total test records in report: 1271
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T870 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_prog_reset.4141400205 Sep 09 06:41:43 PM UTC 24 Sep 09 06:42:03 PM UTC 24 20778900 ps
T871 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_intr_rd_slow_flash.889672268 Sep 09 06:36:49 PM UTC 24 Sep 09 06:42:06 PM UTC 24 13607973200 ps
T872 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_connect.4215577965 Sep 09 06:41:50 PM UTC 24 Sep 09 06:42:11 PM UTC 24 70420200 ps
T873 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_alert_test.3036209439 Sep 09 06:41:51 PM UTC 24 Sep 09 06:42:18 PM UTC 24 109385200 ps
T187 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_host_ctrl_arb.1082570313 Sep 09 05:51:53 PM UTC 24 Sep 09 06:42:19 PM UTC 24 248426826800 ps
T874 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_phy_arb.3732584553 Sep 09 06:32:10 PM UTC 24 Sep 09 06:42:23 PM UTC 24 4905033600 ps
T875 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_intr_rd.3862983643 Sep 09 06:39:38 PM UTC 24 Sep 09 06:42:26 PM UTC 24 9595660600 ps
T876 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_hw_sec_otp.2979758211 Sep 09 06:40:47 PM UTC 24 Sep 09 06:42:26 PM UTC 24 2175682200 ps
T877 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_disable.2868181578 Sep 09 06:41:48 PM UTC 24 Sep 09 06:42:26 PM UTC 24 20397200 ps
T878 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_rw_evict_all_en.2287074268 Sep 09 06:41:44 PM UTC 24 Sep 09 06:42:35 PM UTC 24 68830800 ps
T879 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_sec_info_access.2928244573 Sep 09 06:41:11 PM UTC 24 Sep 09 06:42:36 PM UTC 24 2000515600 ps
T880 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_intr_rd.3348663455 Sep 09 06:38:34 PM UTC 24 Sep 09 06:42:39 PM UTC 24 13225243000 ps
T881 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_prog_reset.309174728 Sep 09 06:42:04 PM UTC 24 Sep 09 06:42:40 PM UTC 24 216515900 ps
T882 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_intr_rd.402833925 Sep 09 06:39:06 PM UTC 24 Sep 09 06:42:41 PM UTC 24 5272685000 ps
T883 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_connect.2637549384 Sep 09 06:42:20 PM UTC 24 Sep 09 06:42:41 PM UTC 24 14241400 ps
T884 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_otp_reset.1175051604 Sep 09 06:39:33 PM UTC 24 Sep 09 06:42:49 PM UTC 24 372038800 ps
T885 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_disable.2428719579 Sep 09 06:42:19 PM UTC 24 Sep 09 06:42:50 PM UTC 24 28185000 ps
T886 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_alert_test.1011235731 Sep 09 06:42:24 PM UTC 24 Sep 09 06:42:54 PM UTC 24 244447400 ps
T887 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_smoke.976630070 Sep 09 06:40:08 PM UTC 24 Sep 09 06:43:01 PM UTC 24 2667903000 ps
T888 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_intr_rd.2430348645 Sep 09 06:40:52 PM UTC 24 Sep 09 06:43:09 PM UTC 24 3933943600 ps
T889 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_smoke.2477161694 Sep 09 06:41:22 PM UTC 24 Sep 09 06:43:12 PM UTC 24 73302600 ps
T890 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_intr_rd_slow_flash.2627019914 Sep 09 06:42:04 PM UTC 24 Sep 09 06:44:32 PM UTC 24 40840237400 ps
T891 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_rw_evict.1922887604 Sep 09 06:42:40 PM UTC 24 Sep 09 06:43:14 PM UTC 24 48857500 ps
T892 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_rw_evict_all_en.3623947007 Sep 09 06:42:12 PM UTC 24 Sep 09 06:43:15 PM UTC 24 29268400 ps
T893 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_alert_test.31681734 Sep 09 06:42:52 PM UTC 24 Sep 09 06:43:17 PM UTC 24 128815500 ps
T408 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_sec_info_access.2565004045 Sep 09 06:41:49 PM UTC 24 Sep 09 06:43:18 PM UTC 24 3332361000 ps
T894 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_connect.450510911 Sep 09 06:42:49 PM UTC 24 Sep 09 06:43:18 PM UTC 24 24136600 ps
T314 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_hw_sec_otp.2063728000 Sep 09 06:40:17 PM UTC 24 Sep 09 06:43:19 PM UTC 24 2498473600 ps
T895 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_smoke.757937570 Sep 09 06:39:02 PM UTC 24 Sep 09 06:43:21 PM UTC 24 71921500 ps
T896 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_disable.297251356 Sep 09 06:42:41 PM UTC 24 Sep 09 06:43:26 PM UTC 24 10669900 ps
T897 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_rw_evict_all_en.685672843 Sep 09 06:42:41 PM UTC 24 Sep 09 06:43:27 PM UTC 24 29126700 ps
T898 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_phy_arb.2004295225 Sep 09 06:30:28 PM UTC 24 Sep 09 06:43:30 PM UTC 24 4057489000 ps
T899 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_intr_rd.2025708128 Sep 09 06:40:24 PM UTC 24 Sep 09 06:43:32 PM UTC 24 12352492900 ps
T900 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_alert_test.207915156 Sep 09 06:43:20 PM UTC 24 Sep 09 06:43:41 PM UTC 24 18191800 ps
T901 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_connect.1875853292 Sep 09 06:43:20 PM UTC 24 Sep 09 06:43:46 PM UTC 24 16741900 ps
T902 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_otp_reset.794306734 Sep 09 06:40:50 PM UTC 24 Sep 09 06:43:46 PM UTC 24 139973300 ps
T903 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_mp_regions.1345529245 Sep 09 06:28:39 PM UTC 24 Sep 09 06:43:46 PM UTC 24 12902791300 ps
T904 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_sec_info_access.575938613 Sep 09 06:42:19 PM UTC 24 Sep 09 06:43:49 PM UTC 24 1801727400 ps
T905 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_rma_reset.2394736001 Sep 09 06:30:35 PM UTC 24 Sep 09 06:43:50 PM UTC 24 90155018700 ps
T906 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_intr_rd.2092873080 Sep 09 06:41:40 PM UTC 24 Sep 09 06:43:50 PM UTC 24 1608811700 ps
T907 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_sec_info_access.1103560199 Sep 09 06:42:42 PM UTC 24 Sep 09 06:43:50 PM UTC 24 1344583600 ps
T388 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_disable.1833510100 Sep 09 06:43:17 PM UTC 24 Sep 09 06:43:53 PM UTC 24 15634500 ps
T908 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_rw_evict.3850261240 Sep 09 06:43:15 PM UTC 24 Sep 09 06:43:54 PM UTC 24 42695100 ps
T909 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rand_ops.2373711377 Sep 09 06:26:36 PM UTC 24 Sep 09 06:43:55 PM UTC 24 1532277200 ps
T910 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_smoke.1421771327 Sep 09 06:41:51 PM UTC 24 Sep 09 06:43:57 PM UTC 24 46749500 ps
T911 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_intr_rd_slow_flash.4048865187 Sep 09 06:40:52 PM UTC 24 Sep 09 06:43:58 PM UTC 24 25181407700 ps
T912 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rand_ops.2867396814 Sep 09 06:30:26 PM UTC 24 Sep 09 06:44:00 PM UTC 24 294469400 ps
T913 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_rma_reset.4275108245 Sep 09 06:26:42 PM UTC 24 Sep 09 06:44:02 PM UTC 24 160183806300 ps
T914 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_hw_sec_otp.508199389 Sep 09 06:42:28 PM UTC 24 Sep 09 06:44:02 PM UTC 24 7139936000 ps
T915 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_connect.1537313946 Sep 09 06:43:50 PM UTC 24 Sep 09 06:44:09 PM UTC 24 28192300 ps
T916 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_rw_evict_all_en.2073410123 Sep 09 06:43:16 PM UTC 24 Sep 09 06:44:09 PM UTC 24 29622100 ps
T917 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_otp_reset.1314930742 Sep 09 06:40:22 PM UTC 24 Sep 09 06:44:10 PM UTC 24 59514000 ps
T918 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_disable.3277067651 Sep 09 06:43:47 PM UTC 24 Sep 09 06:44:13 PM UTC 24 12990300 ps
T919 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_alert_test.3863203080 Sep 09 06:43:51 PM UTC 24 Sep 09 06:44:15 PM UTC 24 61198600 ps
T920 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_otp_reset.1498888526 Sep 09 06:41:27 PM UTC 24 Sep 09 06:44:23 PM UTC 24 42133500 ps
T921 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_connect.1753714165 Sep 09 06:44:03 PM UTC 24 Sep 09 06:44:24 PM UTC 24 38211400 ps
T922 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_intr_rd_slow_flash.3245871403 Sep 09 06:39:43 PM UTC 24 Sep 09 06:44:24 PM UTC 24 12327818600 ps
T923 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_intr_rd.46518410 Sep 09 06:41:59 PM UTC 24 Sep 09 06:44:28 PM UTC 24 1044534500 ps
T392 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_disable.1299804558 Sep 09 06:44:02 PM UTC 24 Sep 09 06:44:32 PM UTC 24 24744900 ps
T322 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_full_mem_access.4280648156 Sep 09 05:35:39 PM UTC 24 Sep 09 06:44:34 PM UTC 24 203465925100 ps
T924 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_rw_evict.2055979814 Sep 09 06:43:57 PM UTC 24 Sep 09 06:44:35 PM UTC 24 73846900 ps
T925 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_alert_test.1009919211 Sep 09 06:44:09 PM UTC 24 Sep 09 06:44:37 PM UTC 24 32882800 ps
T926 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_hw_sec_otp.2289337347 Sep 09 06:43:26 PM UTC 24 Sep 09 06:44:38 PM UTC 24 1103916500 ps
T927 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_rw_evict_all_en.2536902562 Sep 09 06:43:47 PM UTC 24 Sep 09 06:44:40 PM UTC 24 62123800 ps
T928 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_smoke.615639494 Sep 09 06:43:22 PM UTC 24 Sep 09 06:44:43 PM UTC 24 52755500 ps
T929 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_rw_evict.2385615461 Sep 09 06:43:43 PM UTC 24 Sep 09 06:44:45 PM UTC 24 29945300 ps
T930 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_rw_evict_all_en.4046732062 Sep 09 06:43:59 PM UTC 24 Sep 09 06:44:45 PM UTC 24 185540700 ps
T931 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_sec_info_access.4035972720 Sep 09 06:43:19 PM UTC 24 Sep 09 06:44:52 PM UTC 24 7575354800 ps
T932 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_connect.484812974 Sep 09 06:44:33 PM UTC 24 Sep 09 06:44:56 PM UTC 24 52833800 ps
T933 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_sec_info_access.3385123734 Sep 09 06:43:48 PM UTC 24 Sep 09 06:44:58 PM UTC 24 6459410900 ps
T934 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_hw_sec_otp.4074253865 Sep 09 06:41:25 PM UTC 24 Sep 09 06:45:00 PM UTC 24 10446681300 ps
T935 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_hw_sec_otp.2856703442 Sep 09 06:42:58 PM UTC 24 Sep 09 06:45:02 PM UTC 24 15906853800 ps
T936 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_rw_evict_all_en.2252902600 Sep 09 06:44:25 PM UTC 24 Sep 09 06:45:03 PM UTC 24 110443400 ps
T937 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_error_mp.2767246538 Sep 09 05:47:14 PM UTC 24 Sep 09 06:45:04 PM UTC 24 9525770400 ps
T938 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_disable.4179639437 Sep 09 06:44:29 PM UTC 24 Sep 09 06:45:07 PM UTC 24 46070600 ps
T426 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_rw_evict.2326196590 Sep 09 06:44:25 PM UTC 24 Sep 09 06:45:07 PM UTC 24 112733600 ps
T939 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_alert_test.2275516388 Sep 09 06:44:40 PM UTC 24 Sep 09 06:45:10 PM UTC 24 62294900 ps
T940 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_smoke.1838312213 Sep 09 06:42:26 PM UTC 24 Sep 09 06:45:11 PM UTC 24 20707700 ps
T941 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_smoke.1474278277 Sep 09 06:44:10 PM UTC 24 Sep 09 06:45:16 PM UTC 24 43483900 ps
T942 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_connect.1118591840 Sep 09 06:44:58 PM UTC 24 Sep 09 06:45:16 PM UTC 24 47575400 ps
T943 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_otp_reset.3759202686 Sep 09 06:41:54 PM UTC 24 Sep 09 06:45:16 PM UTC 24 71060800 ps
T409 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_sec_info_access.1497938030 Sep 09 06:44:03 PM UTC 24 Sep 09 06:45:21 PM UTC 24 8157200200 ps
T944 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_alert_test.1949298709 Sep 09 06:45:02 PM UTC 24 Sep 09 06:45:28 PM UTC 24 52886000 ps
T315 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_hw_sec_otp.2369510611 Sep 09 06:41:53 PM UTC 24 Sep 09 06:45:29 PM UTC 24 4109145200 ps
T945 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_disable.4291686752 Sep 09 06:44:53 PM UTC 24 Sep 09 06:45:31 PM UTC 24 73181000 ps
T946 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_rw_evict.3770726384 Sep 09 06:44:46 PM UTC 24 Sep 09 06:45:32 PM UTC 24 71203800 ps
T947 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_hw_sec_otp.688956779 Sep 09 06:44:10 PM UTC 24 Sep 09 06:45:35 PM UTC 24 2663640300 ps
T948 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_intr_rd_slow_flash.2303164743 Sep 09 06:39:12 PM UTC 24 Sep 09 06:45:36 PM UTC 24 40631092000 ps
T949 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_otp_reset.2646769394 Sep 09 06:42:28 PM UTC 24 Sep 09 06:45:36 PM UTC 24 172933400 ps
T950 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_smoke.969508874 Sep 09 06:43:51 PM UTC 24 Sep 09 06:45:39 PM UTC 24 69991600 ps
T951 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_alert_test.608476467 Sep 09 06:45:22 PM UTC 24 Sep 09 06:45:41 PM UTC 24 46492100 ps
T952 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_connect.2655621720 Sep 09 06:45:18 PM UTC 24 Sep 09 06:45:43 PM UTC 24 21856600 ps
T953 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_rw_evict_all_en.3531976933 Sep 09 06:44:46 PM UTC 24 Sep 09 06:45:48 PM UTC 24 26890700 ps
T369 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_disable.672868743 Sep 09 06:45:17 PM UTC 24 Sep 09 06:45:50 PM UTC 24 13997000 ps
T170 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_otp_reset.2651279154 Sep 09 06:43:28 PM UTC 24 Sep 09 06:45:50 PM UTC 24 44815600 ps
T954 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_intr_rd_slow_flash.3653058631 Sep 09 06:42:37 PM UTC 24 Sep 09 06:45:52 PM UTC 24 33567044100 ps
T422 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_rw_evict.2157640177 Sep 09 06:45:10 PM UTC 24 Sep 09 06:45:55 PM UTC 24 52523700 ps
T318 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_rw_evict_all_en.3362981028 Sep 09 06:45:12 PM UTC 24 Sep 09 06:45:56 PM UTC 24 41905400 ps
T176 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_otp_reset.1034218800 Sep 09 06:43:02 PM UTC 24 Sep 09 06:45:58 PM UTC 24 137589000 ps
T955 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_sec_info_access.652141189 Sep 09 06:44:32 PM UTC 24 Sep 09 06:46:00 PM UTC 24 4443424300 ps
T956 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_hw_sec_otp.3907462325 Sep 09 06:44:42 PM UTC 24 Sep 09 06:46:01 PM UTC 24 4179492600 ps
T957 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_intr_rd.1868845398 Sep 09 06:43:30 PM UTC 24 Sep 09 06:46:07 PM UTC 24 468135100 ps
T958 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_disable.2949449802 Sep 09 06:45:40 PM UTC 24 Sep 09 06:46:13 PM UTC 24 23434600 ps
T959 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_hw_sec_otp.202532856 Sep 09 06:43:51 PM UTC 24 Sep 09 06:46:13 PM UTC 24 8926470100 ps
T960 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_rma_reset.3910103317 Sep 09 06:28:30 PM UTC 24 Sep 09 06:46:14 PM UTC 24 80137793400 ps
T961 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_intr_rd_slow_flash.2232237435 Sep 09 06:43:33 PM UTC 24 Sep 09 06:46:14 PM UTC 24 29865132800 ps
T962 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_connect.3881514814 Sep 09 06:45:43 PM UTC 24 Sep 09 06:46:15 PM UTC 24 146482600 ps
T963 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_rw_evict.667722221 Sep 09 06:45:37 PM UTC 24 Sep 09 06:46:15 PM UTC 24 47802500 ps
T964 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_smoke.1297647011 Sep 09 06:42:55 PM UTC 24 Sep 09 06:46:16 PM UTC 24 128656500 ps
T965 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_otp_reset.3774508020 Sep 09 06:43:54 PM UTC 24 Sep 09 06:46:18 PM UTC 24 136615600 ps
T394 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_sec_info_access.2053298040 Sep 09 06:44:57 PM UTC 24 Sep 09 06:46:18 PM UTC 24 7109804100 ps
T966 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_alert_test.4016387937 Sep 09 06:45:48 PM UTC 24 Sep 09 06:46:18 PM UTC 24 82022500 ps
T967 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_rw_evict_all_en.816403075 Sep 09 06:45:37 PM UTC 24 Sep 09 06:46:27 PM UTC 24 31074000 ps
T968 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_intr_rd.3110115443 Sep 09 06:42:36 PM UTC 24 Sep 09 06:46:31 PM UTC 24 7292834900 ps
T969 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_disable.549413128 Sep 09 06:46:02 PM UTC 24 Sep 09 06:46:32 PM UTC 24 14760600 ps
T970 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_connect.3505538467 Sep 09 06:46:13 PM UTC 24 Sep 09 06:46:37 PM UTC 24 13573900 ps
T971 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_hw_sec_otp.2235955961 Sep 09 06:45:30 PM UTC 24 Sep 09 06:46:38 PM UTC 24 1274431700 ps
T972 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_rw_evict_all_en.35346701 Sep 09 06:46:01 PM UTC 24 Sep 09 06:46:39 PM UTC 24 32548200 ps
T973 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_alert_test.3929910409 Sep 09 06:46:14 PM UTC 24 Sep 09 06:46:41 PM UTC 24 275291700 ps
T974 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_rma_reset.148096331 Sep 09 06:32:17 PM UTC 24 Sep 09 06:46:44 PM UTC 24 40120862300 ps
T975 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_hw_sec_otp.705389028 Sep 09 06:45:04 PM UTC 24 Sep 09 06:46:46 PM UTC 24 4942618600 ps
T976 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_rw_evict.600526705 Sep 09 06:45:59 PM UTC 24 Sep 09 06:46:47 PM UTC 24 58872600 ps
T977 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_sec_info_access.2615986418 Sep 09 06:45:18 PM UTC 24 Sep 09 06:46:48 PM UTC 24 8703238600 ps
T978 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_intr_rd_slow_flash.1385347332 Sep 09 06:43:56 PM UTC 24 Sep 09 06:46:49 PM UTC 24 23852748500 ps
T979 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_connect.495683733 Sep 09 06:46:31 PM UTC 24 Sep 09 06:46:52 PM UTC 24 15753500 ps
T980 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_error_mp.2700938017 Sep 09 05:59:58 PM UTC 24 Sep 09 06:46:53 PM UTC 24 21094006300 ps
T981 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_rw_evict_all_en.925393427 Sep 09 06:46:19 PM UTC 24 Sep 09 06:46:55 PM UTC 24 30492900 ps
T982 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_sec_info_access.1797084739 Sep 09 06:45:42 PM UTC 24 Sep 09 06:46:56 PM UTC 24 1630433500 ps
T983 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_alert_test.1151176958 Sep 09 06:46:34 PM UTC 24 Sep 09 06:46:58 PM UTC 24 68271200 ps
T984 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_disable.2398516977 Sep 09 06:46:19 PM UTC 24 Sep 09 06:46:58 PM UTC 24 25559200 ps
T985 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_otp_reset.2293702903 Sep 09 06:44:14 PM UTC 24 Sep 09 06:46:58 PM UTC 24 38192300 ps
T986 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_hw_sec_otp.860559159 Sep 09 06:46:16 PM UTC 24 Sep 09 06:47:01 PM UTC 24 1089716000 ps
T413 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_intr_rd_slow_flash.3547087860 Sep 09 06:44:25 PM UTC 24 Sep 09 06:47:01 PM UTC 24 15535987900 ps
T987 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_intr_rd_slow_flash.3664284857 Sep 09 06:41:41 PM UTC 24 Sep 09 06:47:07 PM UTC 24 24995275800 ps
T988 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_connect.3079822934 Sep 09 06:46:47 PM UTC 24 Sep 09 06:47:08 PM UTC 24 85991500 ps
T989 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_alert_test.1970090351 Sep 09 06:46:47 PM UTC 24 Sep 09 06:47:13 PM UTC 24 30404900 ps
T990 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_disable.434586153 Sep 09 06:46:42 PM UTC 24 Sep 09 06:47:16 PM UTC 24 15071000 ps
T95 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_intr_rd_slow_flash.219734843 Sep 09 06:40:25 PM UTC 24 Sep 09 06:47:17 PM UTC 24 12149468100 ps
T991 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/57.flash_ctrl_connect.433748960 Sep 09 06:49:18 PM UTC 24 Sep 09 06:49:43 PM UTC 24 16670800 ps
T992 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_sec_info_access.2060412490 Sep 09 06:46:08 PM UTC 24 Sep 09 06:47:19 PM UTC 24 3329264500 ps
T993 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_rw_evict.397010356 Sep 09 06:46:19 PM UTC 24 Sep 09 06:47:20 PM UTC 24 63769700 ps
T994 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_intr_rd.1617908249 Sep 09 06:44:16 PM UTC 24 Sep 09 06:47:20 PM UTC 24 5213029600 ps
T321 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_hw_sec_otp.3890668828 Sep 09 06:45:51 PM UTC 24 Sep 09 06:47:23 PM UTC 24 2856749300 ps
T995 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_connect.3202200089 Sep 09 06:46:57 PM UTC 24 Sep 09 06:47:23 PM UTC 24 14641000 ps
T996 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_intr_rd.1419821318 Sep 09 06:43:10 PM UTC 24 Sep 09 06:47:24 PM UTC 24 1753586300 ps
T997 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_alert_test.3731451397 Sep 09 06:46:59 PM UTC 24 Sep 09 06:47:24 PM UTC 24 114534600 ps
T998 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_disable.376341087 Sep 09 06:46:54 PM UTC 24 Sep 09 06:47:25 PM UTC 24 38924600 ps
T999 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_connect.4045535892 Sep 09 06:47:09 PM UTC 24 Sep 09 06:47:31 PM UTC 24 22172900 ps
T1000 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_intr_rd.1747172245 Sep 09 06:45:07 PM UTC 24 Sep 09 06:47:37 PM UTC 24 7090698000 ps
T1001 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_smoke.3698058112 Sep 09 06:46:38 PM UTC 24 Sep 09 06:47:42 PM UTC 24 18217200 ps
T1002 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_connect.3452022534 Sep 09 06:47:24 PM UTC 24 Sep 09 06:47:44 PM UTC 24 15835700 ps
T1003 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_alert_test.1135880777 Sep 09 06:47:14 PM UTC 24 Sep 09 06:47:44 PM UTC 24 316365300 ps
T1004 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_sec_info_access.2878147205 Sep 09 06:46:45 PM UTC 24 Sep 09 06:47:45 PM UTC 24 694158200 ps
T415 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_disable.3730586730 Sep 09 06:47:01 PM UTC 24 Sep 09 06:47:45 PM UTC 24 74912800 ps
T185 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_otp_reset.4252100435 Sep 09 06:44:42 PM UTC 24 Sep 09 06:47:47 PM UTC 24 76210700 ps
T1005 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rand_ops.1989399766 Sep 09 06:28:26 PM UTC 24 Sep 09 06:47:49 PM UTC 24 688465700 ps
T1006 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_alert_test.2357314767 Sep 09 06:47:24 PM UTC 24 Sep 09 06:47:54 PM UTC 24 33326500 ps
T1007 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_disable.92238772 Sep 09 06:47:20 PM UTC 24 Sep 09 06:47:56 PM UTC 24 16400400 ps
T1008 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_sec_info_access.837169791 Sep 09 06:46:56 PM UTC 24 Sep 09 06:47:57 PM UTC 24 350141600 ps
T1009 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_hw_sec_otp.615867505 Sep 09 06:46:50 PM UTC 24 Sep 09 06:48:00 PM UTC 24 3283229600 ps
T399 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_sec_info_access.1133599756 Sep 09 06:46:27 PM UTC 24 Sep 09 06:48:03 PM UTC 24 4080989200 ps
T1010 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_intr_rd.3511729207 Sep 09 06:43:55 PM UTC 24 Sep 09 06:48:07 PM UTC 24 6622187600 ps
T1011 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_alert_test.1210837916 Sep 09 06:47:44 PM UTC 24 Sep 09 06:48:09 PM UTC 24 40066000 ps
T1012 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_smoke.1178516354 Sep 09 06:45:03 PM UTC 24 Sep 09 06:48:10 PM UTC 24 294786500 ps
T1013 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_hw_sec_otp.1844939049 Sep 09 06:46:59 PM UTC 24 Sep 09 06:48:14 PM UTC 24 1979012500 ps
T1014 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_connect.4290967035 Sep 09 06:47:42 PM UTC 24 Sep 09 06:48:14 PM UTC 24 16979100 ps
T1015 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_disable.2244222255 Sep 09 06:47:31 PM UTC 24 Sep 09 06:48:16 PM UTC 24 11240500 ps
T395 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_sec_info_access.2444577780 Sep 09 06:47:08 PM UTC 24 Sep 09 06:48:17 PM UTC 24 650833400 ps
T1016 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_connect.4017760099 Sep 09 06:47:55 PM UTC 24 Sep 09 06:48:21 PM UTC 24 16963100 ps
T177 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_otp_reset.186193188 Sep 09 06:45:31 PM UTC 24 Sep 09 06:48:22 PM UTC 24 38524800 ps
T1017 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_hw_sec_otp.3155139345 Sep 09 06:47:18 PM UTC 24 Sep 09 06:48:22 PM UTC 24 1255152000 ps
T1018 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_disable.2653581689 Sep 09 06:47:48 PM UTC 24 Sep 09 06:48:24 PM UTC 24 36689200 ps
T1019 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_alert_test.2020557261 Sep 09 06:47:56 PM UTC 24 Sep 09 06:48:26 PM UTC 24 51698700 ps
T1020 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_otp_reset.1003298997 Sep 09 06:45:05 PM UTC 24 Sep 09 06:48:28 PM UTC 24 70793300 ps
T1021 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_smoke.591582872 Sep 09 06:44:42 PM UTC 24 Sep 09 06:48:31 PM UTC 24 25840300 ps
T405 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_sec_info_access.2233386206 Sep 09 06:47:20 PM UTC 24 Sep 09 06:48:32 PM UTC 24 4863236800 ps
T1022 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_connect.3913562956 Sep 09 06:48:11 PM UTC 24 Sep 09 06:48:36 PM UTC 24 39074200 ps
T1023 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_alert_test.2466317360 Sep 09 06:48:14 PM UTC 24 Sep 09 06:48:37 PM UTC 24 32094700 ps
T1024 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_smoke.3466917514 Sep 09 06:46:59 PM UTC 24 Sep 09 06:48:39 PM UTC 24 47740300 ps
T1025 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_intr_rd_slow_flash.3543934146 Sep 09 06:46:17 PM UTC 24 Sep 09 06:48:41 PM UTC 24 5989633600 ps
T1026 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_smoke.2961169354 Sep 09 06:46:16 PM UTC 24 Sep 09 06:48:45 PM UTC 24 98778100 ps
T1027 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_disable.1934124359 Sep 09 06:48:09 PM UTC 24 Sep 09 06:48:45 PM UTC 24 20998400 ps
T1028 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_intr_rd.2549296558 Sep 09 06:45:33 PM UTC 24 Sep 09 06:48:46 PM UTC 24 3773701100 ps
T1029 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_intr_rd_slow_flash.676468618 Sep 09 06:45:36 PM UTC 24 Sep 09 06:48:50 PM UTC 24 14061839100 ps
T1030 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_connect.4107717997 Sep 09 06:48:23 PM UTC 24 Sep 09 06:48:52 PM UTC 24 31745400 ps
T1031 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_alert_test.740104744 Sep 09 06:48:25 PM UTC 24 Sep 09 06:48:56 PM UTC 24 30219200 ps
T1032 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_sec_info_access.4151555470 Sep 09 06:47:37 PM UTC 24 Sep 09 06:48:56 PM UTC 24 1639165500 ps
T1033 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_alert_test.1160527334 Sep 09 06:48:40 PM UTC 24 Sep 09 06:48:56 PM UTC 24 127520500 ps
T1034 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_connect.3535575334 Sep 09 06:48:39 PM UTC 24 Sep 09 06:48:57 PM UTC 24 14136700 ps
T1035 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_intr_rd.3399737108 Sep 09 06:44:42 PM UTC 24 Sep 09 06:48:57 PM UTC 24 7155333900 ps
T1036 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_disable.3639534840 Sep 09 06:48:22 PM UTC 24 Sep 09 06:48:59 PM UTC 24 10708000 ps
T401 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_sec_info_access.2386971934 Sep 09 06:47:50 PM UTC 24 Sep 09 06:49:00 PM UTC 24 1576551900 ps
T1037 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_smoke.1318999718 Sep 09 06:45:29 PM UTC 24 Sep 09 06:49:02 PM UTC 24 198076800 ps
T186 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_otp_reset.3168864570 Sep 09 06:45:52 PM UTC 24 Sep 09 06:49:03 PM UTC 24 37520200 ps
T1038 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_intr_rd.3337982961 Sep 09 06:46:17 PM UTC 24 Sep 09 06:49:03 PM UTC 24 1309216400 ps
T1039 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_hw_sec_otp.3113855799 Sep 09 06:47:46 PM UTC 24 Sep 09 06:49:12 PM UTC 24 8287668500 ps
T1040 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_disable.1392931934 Sep 09 06:48:32 PM UTC 24 Sep 09 06:49:12 PM UTC 24 12749500 ps
T1041 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_disable.3483687302 Sep 09 06:48:47 PM UTC 24 Sep 09 06:49:13 PM UTC 24 15709300 ps
T1042 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_intr_rd.3517487718 Sep 09 06:45:57 PM UTC 24 Sep 09 06:49:13 PM UTC 24 14540756600 ps
T406 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_sec_info_access.1732177868 Sep 09 06:48:10 PM UTC 24 Sep 09 06:49:14 PM UTC 24 460542900 ps
T1043 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_alert_test.764124950 Sep 09 06:48:56 PM UTC 24 Sep 09 06:49:14 PM UTC 24 22150900 ps
T1044 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/50.flash_ctrl_connect.3249419963 Sep 09 06:48:57 PM UTC 24 Sep 09 06:49:17 PM UTC 24 15832700 ps
T1045 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_hw_sec_otp.1016212535 Sep 09 06:46:39 PM UTC 24 Sep 09 06:49:17 PM UTC 24 25474619800 ps
T1046 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/51.flash_ctrl_connect.3149476774 Sep 09 06:48:58 PM UTC 24 Sep 09 06:49:19 PM UTC 24 181523400 ps
T1047 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_connect.1084321316 Sep 09 06:48:53 PM UTC 24 Sep 09 06:49:22 PM UTC 24 32789800 ps
T1048 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/53.flash_ctrl_connect.3534233470 Sep 09 06:49:03 PM UTC 24 Sep 09 06:49:28 PM UTC 24 24964600 ps
T1049 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_smoke.1217816746 Sep 09 06:47:45 PM UTC 24 Sep 09 06:49:29 PM UTC 24 91407700 ps
T1050 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_otp_reset.150037549 Sep 09 06:46:54 PM UTC 24 Sep 09 06:49:30 PM UTC 24 82844600 ps
T1051 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/52.flash_ctrl_connect.464582806 Sep 09 06:49:01 PM UTC 24 Sep 09 06:49:31 PM UTC 24 41875500 ps
T1052 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_smoke.1449918078 Sep 09 06:48:15 PM UTC 24 Sep 09 06:49:32 PM UTC 24 33493800 ps
T1053 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_hw_sec_otp.3505576832 Sep 09 06:48:01 PM UTC 24 Sep 09 06:49:33 PM UTC 24 7091901300 ps
T1054 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/55.flash_ctrl_connect.954537712 Sep 09 06:49:14 PM UTC 24 Sep 09 06:49:33 PM UTC 24 17499000 ps
T178 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_rma_reset.1335105355 Sep 09 06:34:06 PM UTC 24 Sep 09 06:49:34 PM UTC 24 130156782100 ps
T1055 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_smoke.367869360 Sep 09 06:47:25 PM UTC 24 Sep 09 06:49:34 PM UTC 24 81777800 ps
T1056 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_otp_reset.582011365 Sep 09 06:46:40 PM UTC 24 Sep 09 06:49:35 PM UTC 24 39671300 ps
T1057 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_smoke.4286306256 Sep 09 06:48:27 PM UTC 24 Sep 09 06:49:37 PM UTC 24 28290200 ps
T1058 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/54.flash_ctrl_connect.3520663239 Sep 09 06:49:13 PM UTC 24 Sep 09 06:49:38 PM UTC 24 15142800 ps
T1059 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_sec_info_access.946632487 Sep 09 06:48:37 PM UTC 24 Sep 09 06:49:38 PM UTC 24 952366400 ps
T1060 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_otp_reset.634802658 Sep 09 06:46:16 PM UTC 24 Sep 09 06:49:40 PM UTC 24 41226700 ps
T1061 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/56.flash_ctrl_connect.1926450942 Sep 09 06:49:15 PM UTC 24 Sep 09 06:49:41 PM UTC 24 41747000 ps
T1062 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_hw_sec_otp.3295692568 Sep 09 06:47:25 PM UTC 24 Sep 09 06:49:44 PM UTC 24 3681008800 ps
T1063 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/58.flash_ctrl_connect.1127521448 Sep 09 06:49:19 PM UTC 24 Sep 09 06:49:44 PM UTC 24 47293200 ps
T1064 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_sec_info_access.4194268212 Sep 09 06:48:23 PM UTC 24 Sep 09 06:49:48 PM UTC 24 677456300 ps
T1065 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_otp_reset.3399303551 Sep 09 06:47:01 PM UTC 24 Sep 09 06:49:48 PM UTC 24 140605800 ps
T1066 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_hw_sec_otp.3614135924 Sep 09 06:48:17 PM UTC 24 Sep 09 06:49:51 PM UTC 24 10461512500 ps
T1067 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/61.flash_ctrl_connect.1385132191 Sep 09 06:49:33 PM UTC 24 Sep 09 06:49:52 PM UTC 24 28130400 ps
T1068 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_intr_rd_slow_flash.54951579 Sep 09 06:44:44 PM UTC 24 Sep 09 06:49:53 PM UTC 24 13279905500 ps
T1069 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/59.flash_ctrl_connect.1637501308 Sep 09 06:49:28 PM UTC 24 Sep 09 06:49:54 PM UTC 24 71425300 ps
T1070 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/60.flash_ctrl_connect.3402209999 Sep 09 06:49:32 PM UTC 24 Sep 09 06:49:58 PM UTC 24 201017400 ps
T1071 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/62.flash_ctrl_connect.2761045064 Sep 09 06:49:34 PM UTC 24 Sep 09 06:49:59 PM UTC 24 51270300 ps
T1072 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/63.flash_ctrl_connect.1575260349 Sep 09 06:49:35 PM UTC 24 Sep 09 06:50:03 PM UTC 24 45286300 ps
T1073 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_sec_info_access.3574762052 Sep 09 06:48:50 PM UTC 24 Sep 09 06:50:03 PM UTC 24 2649854700 ps
T1074 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/65.flash_ctrl_connect.2177481510 Sep 09 06:49:39 PM UTC 24 Sep 09 06:50:05 PM UTC 24 71151900 ps
T1075 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/66.flash_ctrl_connect.253017055 Sep 09 06:49:42 PM UTC 24 Sep 09 06:50:05 PM UTC 24 23184300 ps
T1076 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/64.flash_ctrl_connect.153144035 Sep 09 06:49:38 PM UTC 24 Sep 09 06:50:06 PM UTC 24 83521000 ps
T1077 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/67.flash_ctrl_connect.788475084 Sep 09 06:49:44 PM UTC 24 Sep 09 06:50:07 PM UTC 24 26441900 ps
T1078 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_intr_rd_slow_flash.2850633188 Sep 09 06:43:12 PM UTC 24 Sep 09 06:50:07 PM UTC 24 105524956900 ps
T1079 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_smoke.2071861385 Sep 09 06:46:48 PM UTC 24 Sep 09 06:50:10 PM UTC 24 118926500 ps
T1080 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/68.flash_ctrl_connect.3740902169 Sep 09 06:49:49 PM UTC 24 Sep 09 06:50:13 PM UTC 24 26868000 ps
T1081 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/70.flash_ctrl_connect.1038121698 Sep 09 06:49:54 PM UTC 24 Sep 09 06:50:15 PM UTC 24 15795500 ps
T1082 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_otp_reset.187511045 Sep 09 06:47:20 PM UTC 24 Sep 09 06:50:16 PM UTC 24 72215200 ps
T1083 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/69.flash_ctrl_connect.41085367 Sep 09 06:49:52 PM UTC 24 Sep 09 06:50:19 PM UTC 24 14804900 ps
T1084 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_otp_reset.2018442260 Sep 09 06:47:26 PM UTC 24 Sep 09 06:50:21 PM UTC 24 85632000 ps
T1085 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/72.flash_ctrl_connect.3842701438 Sep 09 06:50:03 PM UTC 24 Sep 09 06:50:23 PM UTC 24 202099200 ps
T1086 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_hw_sec_otp.3672820558 Sep 09 06:48:46 PM UTC 24 Sep 09 06:50:24 PM UTC 24 2667082700 ps
T1087 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/71.flash_ctrl_connect.131060549 Sep 09 06:49:58 PM UTC 24 Sep 09 06:50:26 PM UTC 24 45252600 ps
T1088 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/74.flash_ctrl_connect.845626745 Sep 09 06:50:07 PM UTC 24 Sep 09 06:50:32 PM UTC 24 30705100 ps
T1089 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/75.flash_ctrl_connect.1657699986 Sep 09 06:50:08 PM UTC 24 Sep 09 06:50:34 PM UTC 24 28795300 ps
T1090 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_otp_reset.797148225 Sep 09 06:47:47 PM UTC 24 Sep 09 06:50:37 PM UTC 24 42520400 ps
T1091 /workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/coverage/default/77.flash_ctrl_connect.4123698942 Sep 09 06:50:16 PM UTC 24 Sep 09 06:50:38 PM UTC 24 69199700 ps
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