| T323 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_intr_rd_slow_flash.3690666186 |
|
|
Oct 03 07:52:15 AM UTC 24 |
Oct 03 07:57:34 AM UTC 24 |
49577673300 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_ro.2158618297 |
|
|
Oct 03 07:55:38 AM UTC 24 |
Oct 03 07:58:00 AM UTC 24 |
541916000 ps |
| T293 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_prog_reset.3536558611 |
|
|
Oct 03 07:57:35 AM UTC 24 |
Oct 03 07:58:04 AM UTC 24 |
150349500 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_intr_wr.2535203333 |
|
|
Oct 03 07:56:44 AM UTC 24 |
Oct 03 07:58:08 AM UTC 24 |
6780310100 ps |
| T264 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_otp_reset.999554439 |
|
|
Oct 03 07:54:45 AM UTC 24 |
Oct 03 07:58:11 AM UTC 24 |
39711200 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_rma_err.1757277114 |
|
|
Oct 03 07:40:12 AM UTC 24 |
Oct 03 07:58:25 AM UTC 24 |
219247735400 ps |
| T189 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_disable.1269143483 |
|
|
Oct 03 07:58:12 AM UTC 24 |
Oct 03 07:58:40 AM UTC 24 |
120540700 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_rw.1244397157 |
|
|
Oct 03 07:50:35 AM UTC 24 |
Oct 03 07:58:54 AM UTC 24 |
7424926900 ps |
| T342 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rw_evict.2943970048 |
|
|
Oct 03 07:58:01 AM UTC 24 |
Oct 03 07:58:55 AM UTC 24 |
31761800 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rw_evict_all_en.12632130 |
|
|
Oct 03 07:58:05 AM UTC 24 |
Oct 03 07:58:55 AM UTC 24 |
43740400 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_ro_serr.4032605565 |
|
|
Oct 03 07:56:00 AM UTC 24 |
Oct 03 07:58:58 AM UTC 24 |
1315555200 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_re_evict.426043770 |
|
|
Oct 03 07:58:09 AM UTC 24 |
Oct 03 07:59:01 AM UTC 24 |
120987600 ps |
| T203 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_ro_derr.762291863 |
|
|
Oct 03 07:56:30 AM UTC 24 |
Oct 03 07:59:05 AM UTC 24 |
1758699700 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_smoke.2629886310 |
|
|
Oct 03 07:54:30 AM UTC 24 |
Oct 03 07:59:06 AM UTC 24 |
26474100 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_connect.1537805189 |
|
|
Oct 03 07:58:41 AM UTC 24 |
Oct 03 07:59:11 AM UTC 24 |
56041200 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_lcmgr_intg.3286941234 |
|
|
Oct 03 07:58:54 AM UTC 24 |
Oct 03 07:59:11 AM UTC 24 |
47845800 ps |
| T261 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_hw_read_seed_err.1307175792 |
|
|
Oct 03 07:58:56 AM UTC 24 |
Oct 03 07:59:17 AM UTC 24 |
64868700 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_alert_test.3984174362 |
|
|
Oct 03 07:58:59 AM UTC 24 |
Oct 03 07:59:20 AM UTC 24 |
176462700 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rw_derr.809092025 |
|
|
Oct 03 07:56:34 AM UTC 24 |
Oct 03 07:59:35 AM UTC 24 |
1196900100 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rw_serr.4001495989 |
|
|
Oct 03 07:56:04 AM UTC 24 |
Oct 03 07:59:41 AM UTC 24 |
19500086700 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_sec_info_access.1017569912 |
|
|
Oct 03 07:58:25 AM UTC 24 |
Oct 03 07:59:58 AM UTC 24 |
529422100 ps |
| T57 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_fetch_code.2486723726 |
|
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Oct 03 07:59:36 AM UTC 24 |
Oct 03 08:00:10 AM UTC 24 |
561471600 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_erase_suspend.3704603280 |
|
|
Oct 03 07:48:54 AM UTC 24 |
Oct 03 08:00:15 AM UTC 24 |
12240751100 ps |
| T265 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_hw_prog_rma_wipe_err.2956548448 |
|
|
Oct 03 07:58:56 AM UTC 24 |
Oct 03 08:00:31 AM UTC 24 |
10019490900 ps |
| T326 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_intr_rd_slow_flash.288647933 |
|
|
Oct 03 07:56:48 AM UTC 24 |
Oct 03 08:00:36 AM UTC 24 |
32936947900 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_hw_sec_otp.369084007 |
|
|
Oct 03 07:59:11 AM UTC 24 |
Oct 03 08:00:39 AM UTC 24 |
16889807500 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_rma_err.2432231496 |
|
|
Oct 03 07:43:14 AM UTC 24 |
Oct 03 08:01:35 AM UTC 24 |
159306048600 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_mp_regions.1782753171 |
|
|
Oct 03 07:54:54 AM UTC 24 |
Oct 03 08:01:44 AM UTC 24 |
24483988100 ps |
| T276 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_error_prog_win.230365725 |
|
|
Oct 03 07:38:45 AM UTC 24 |
Oct 03 08:01:52 AM UTC 24 |
689131400 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_invalid_op.3751657488 |
|
|
Oct 03 08:00:11 AM UTC 24 |
Oct 03 08:01:56 AM UTC 24 |
3109939400 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_intr_wr_slow_flash.2218476469 |
|
|
Oct 03 07:57:28 AM UTC 24 |
Oct 03 08:01:57 AM UTC 24 |
162562160200 ps |
| T277 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_error_prog_win.3712638355 |
|
|
Oct 03 07:44:22 AM UTC 24 |
Oct 03 08:02:21 AM UTC 24 |
1599564900 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_ro_serr.1373773201 |
|
|
Oct 03 08:00:36 AM UTC 24 |
Oct 03 08:02:33 AM UTC 24 |
1314538100 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_stress_all.322571601 |
|
|
Oct 03 07:53:29 AM UTC 24 |
Oct 03 08:02:35 AM UTC 24 |
4365693700 ps |
| T129 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_hw_rma.2992939401 |
|
|
Oct 03 07:30:04 AM UTC 24 |
Oct 03 08:02:38 AM UTC 24 |
334112650900 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_rand_ops.2140013096 |
|
|
Oct 03 07:40:26 AM UTC 24 |
Oct 03 08:02:39 AM UTC 24 |
76968400 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_integrity.3882789593 |
|
|
Oct 03 07:51:43 AM UTC 24 |
Oct 03 08:02:46 AM UTC 24 |
4450986100 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_ro.302293741 |
|
|
Oct 03 08:00:16 AM UTC 24 |
Oct 03 08:02:57 AM UTC 24 |
2216347500 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_otp_reset.2050607132 |
|
|
Oct 03 07:59:18 AM UTC 24 |
Oct 03 08:02:58 AM UTC 24 |
77126900 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_intr_wr.183126604 |
|
|
Oct 03 08:01:57 AM UTC 24 |
Oct 03 08:03:14 AM UTC 24 |
7919241400 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rw_evict_all_en.887741311 |
|
|
Oct 03 08:02:40 AM UTC 24 |
Oct 03 08:03:18 AM UTC 24 |
30404800 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rw_evict.1223534652 |
|
|
Oct 03 08:02:35 AM UTC 24 |
Oct 03 08:03:21 AM UTC 24 |
44492300 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_connect.255392183 |
|
|
Oct 03 08:02:59 AM UTC 24 |
Oct 03 08:03:25 AM UTC 24 |
27041800 ps |
| T119 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_disable.1318121222 |
|
|
Oct 03 08:02:47 AM UTC 24 |
Oct 03 08:03:26 AM UTC 24 |
84089900 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_error_prog_win.2529893675 |
|
|
Oct 03 07:40:54 AM UTC 24 |
Oct 03 08:03:31 AM UTC 24 |
1467566500 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_hw_read_seed_err.2862789429 |
|
|
Oct 03 08:03:19 AM UTC 24 |
Oct 03 08:03:36 AM UTC 24 |
208831200 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_lcmgr_intg.1302848891 |
|
|
Oct 03 08:03:15 AM UTC 24 |
Oct 03 08:03:37 AM UTC 24 |
42663000 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_re_evict.2961967315 |
|
|
Oct 03 08:02:40 AM UTC 24 |
Oct 03 08:03:43 AM UTC 24 |
943977300 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_alert_test.3064167603 |
|
|
Oct 03 08:03:26 AM UTC 24 |
Oct 03 08:03:54 AM UTC 24 |
60566800 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rw_serr.1851797484 |
|
|
Oct 03 08:00:41 AM UTC 24 |
Oct 03 08:04:04 AM UTC 24 |
1701850200 ps |
| T219 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rw.1868186733 |
|
|
Oct 03 07:55:50 AM UTC 24 |
Oct 03 08:04:07 AM UTC 24 |
4781722900 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_rand_ops.3007511436 |
|
|
Oct 03 07:43:32 AM UTC 24 |
Oct 03 08:04:09 AM UTC 24 |
1684709200 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_wo.1278135579 |
|
|
Oct 03 08:00:14 AM UTC 24 |
Oct 03 08:04:09 AM UTC 24 |
3675512800 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_phy_arb.369969064 |
|
|
Oct 03 07:54:37 AM UTC 24 |
Oct 03 08:04:26 AM UTC 24 |
1380781800 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_ro_derr.2541533430 |
|
|
Oct 03 08:01:36 AM UTC 24 |
Oct 03 08:04:27 AM UTC 24 |
3657614500 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_smoke.3833806749 |
|
|
Oct 03 07:59:02 AM UTC 24 |
Oct 03 08:04:37 AM UTC 24 |
805677400 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_sec_info_access.557393495 |
|
|
Oct 03 08:02:58 AM UTC 24 |
Oct 03 08:04:40 AM UTC 24 |
1370412600 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rw_derr.134767456 |
|
|
Oct 03 08:01:45 AM UTC 24 |
Oct 03 08:04:47 AM UTC 24 |
1381309300 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_fetch_code.325165378 |
|
|
Oct 03 08:04:04 AM UTC 24 |
Oct 03 08:04:52 AM UTC 24 |
6227319200 ps |
| T272 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_error_mp.4043881851 |
|
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Oct 03 07:07:56 AM UTC 24 |
Oct 03 08:04:56 AM UTC 24 |
4375125600 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_intr_rd.2025116432 |
|
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Oct 03 08:01:54 AM UTC 24 |
Oct 03 08:05:07 AM UTC 24 |
1533411400 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_hw_prog_rma_wipe_err.2093272178 |
|
|
Oct 03 08:03:22 AM UTC 24 |
Oct 03 08:05:08 AM UTC 24 |
10019090500 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rand_ops.2536669001 |
|
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Oct 03 07:59:06 AM UTC 24 |
Oct 03 08:05:11 AM UTC 24 |
164890900 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_invalid_op.1814752294 |
|
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Oct 03 08:04:11 AM UTC 24 |
Oct 03 08:05:30 AM UTC 24 |
822524300 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_prog_reset.4138974253 |
|
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Oct 03 08:02:34 AM UTC 24 |
Oct 03 08:05:31 AM UTC 24 |
8254519000 ps |
| T107 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_error_prog_type.2982907950 |
|
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Oct 03 07:06:22 AM UTC 24 |
Oct 03 08:05:48 AM UTC 24 |
3801257300 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_rand_ops.4294371737 |
|
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Oct 03 07:48:33 AM UTC 24 |
Oct 03 08:06:05 AM UTC 24 |
164579500 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_ro.1302385900 |
|
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Oct 03 08:04:27 AM UTC 24 |
Oct 03 08:06:16 AM UTC 24 |
1138111700 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_smoke.2713356660 |
|
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Oct 03 08:03:27 AM UTC 24 |
Oct 03 08:06:17 AM UTC 24 |
121273100 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw_evict.846979987 |
|
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Oct 03 08:05:32 AM UTC 24 |
Oct 03 08:06:18 AM UTC 24 |
37297000 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_intr_wr_slow_flash.1426868288 |
|
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Oct 03 08:02:22 AM UTC 24 |
Oct 03 08:06:34 AM UTC 24 |
45408009100 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw_evict_all_en.520627443 |
|
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Oct 03 08:05:48 AM UTC 24 |
Oct 03 08:06:40 AM UTC 24 |
30892900 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_connect.269947282 |
|
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Oct 03 08:06:19 AM UTC 24 |
Oct 03 08:06:43 AM UTC 24 |
18785600 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_ro_serr.2670346935 |
|
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Oct 03 08:04:38 AM UTC 24 |
Oct 03 08:06:45 AM UTC 24 |
498370900 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_hw_rma_reset.80789108 |
|
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Oct 03 07:49:09 AM UTC 24 |
Oct 03 08:06:46 AM UTC 24 |
760477782500 ps |
| T190 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_disable.3304399902 |
|
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Oct 03 08:06:17 AM UTC 24 |
Oct 03 08:06:57 AM UTC 24 |
16193100 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_sec_otp.378592273 |
|
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Oct 03 08:03:38 AM UTC 24 |
Oct 03 08:06:58 AM UTC 24 |
10069510900 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_re_evict.2013922260 |
|
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Oct 03 08:06:06 AM UTC 24 |
Oct 03 08:07:00 AM UTC 24 |
201171800 ps |
| T269 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_lcmgr_intg.4052991297 |
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Oct 03 08:06:35 AM UTC 24 |
Oct 03 08:07:02 AM UTC 24 |
47337300 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_intr_wr.4097274257 |
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Oct 03 08:05:09 AM UTC 24 |
Oct 03 08:07:04 AM UTC 24 |
5079933100 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_read_seed_err.691309388 |
|
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Oct 03 08:06:41 AM UTC 24 |
Oct 03 08:07:08 AM UTC 24 |
48938100 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_alert_test.3572749596 |
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Oct 03 08:06:46 AM UTC 24 |
Oct 03 08:07:14 AM UTC 24 |
49008700 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_intr_rd_slow_flash.5348575 |
|
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Oct 03 08:01:58 AM UTC 24 |
Oct 03 08:07:18 AM UTC 24 |
26436900700 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_ro_derr.3239868544 |
|
|
Oct 03 08:04:48 AM UTC 24 |
Oct 03 08:07:25 AM UTC 24 |
2555765900 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_stress_all.884663860 |
|
|
Oct 03 07:42:39 AM UTC 24 |
Oct 03 08:07:34 AM UTC 24 |
581206300 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw_serr.412862862 |
|
|
Oct 03 08:04:41 AM UTC 24 |
Oct 03 08:07:40 AM UTC 24 |
5105355900 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_otp_reset.590505876 |
|
|
Oct 03 08:03:55 AM UTC 24 |
Oct 03 08:07:41 AM UTC 24 |
36874900 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_wo.130232768 |
|
|
Oct 03 08:04:23 AM UTC 24 |
Oct 03 08:07:42 AM UTC 24 |
1904832900 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_fetch_code.878492534 |
|
|
Oct 03 08:07:16 AM UTC 24 |
Oct 03 08:07:50 AM UTC 24 |
463626900 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_sec_info_access.25201044 |
|
|
Oct 03 08:06:18 AM UTC 24 |
Oct 03 08:08:04 AM UTC 24 |
776012900 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_smoke.3644653713 |
|
|
Oct 03 08:06:47 AM UTC 24 |
Oct 03 08:08:14 AM UTC 24 |
83758300 ps |
| T211 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw_derr.576687754 |
|
|
Oct 03 08:04:52 AM UTC 24 |
Oct 03 08:08:15 AM UTC 24 |
3107471600 ps |
| T325 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_intr_rd.2889923665 |
|
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Oct 03 08:04:57 AM UTC 24 |
Oct 03 08:08:16 AM UTC 24 |
3183271000 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_stress_all.2423332870 |
|
|
Oct 03 07:39:41 AM UTC 24 |
Oct 03 08:08:19 AM UTC 24 |
493664700 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_sec_otp.46211330 |
|
|
Oct 03 08:07:01 AM UTC 24 |
Oct 03 08:08:27 AM UTC 24 |
11323050900 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_invalid_op.3787429428 |
|
|
Oct 03 08:07:35 AM UTC 24 |
Oct 03 08:08:47 AM UTC 24 |
880047900 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_phy_arb.2414520871 |
|
|
Oct 03 07:59:07 AM UTC 24 |
Oct 03 08:09:03 AM UTC 24 |
1523571600 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_mp_regions.3327423368 |
|
|
Oct 03 08:03:57 AM UTC 24 |
Oct 03 08:09:17 AM UTC 24 |
36594932000 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_prog_reset.1836811933 |
|
|
Oct 03 08:09:04 AM UTC 24 |
Oct 03 08:09:26 AM UTC 24 |
50579300 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_prog_reset.355154828 |
|
|
Oct 03 08:05:31 AM UTC 24 |
Oct 03 08:09:29 AM UTC 24 |
8031973200 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_prog_rma_wipe_err.3440485817 |
|
|
Oct 03 08:06:44 AM UTC 24 |
Oct 03 08:09:32 AM UTC 24 |
10012611400 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rw.557381183 |
|
|
Oct 03 08:00:36 AM UTC 24 |
Oct 03 08:09:40 AM UTC 24 |
83303604900 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_ro.4069021229 |
|
|
Oct 03 08:07:42 AM UTC 24 |
Oct 03 08:09:55 AM UTC 24 |
1740831400 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_otp_reset.1814904708 |
|
|
Oct 03 08:07:04 AM UTC 24 |
Oct 03 08:10:05 AM UTC 24 |
141602900 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_intr_wr.3653645165 |
|
|
Oct 03 08:08:20 AM UTC 24 |
Oct 03 08:10:08 AM UTC 24 |
8926283300 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_ro_serr.4191525518 |
|
|
Oct 03 08:07:52 AM UTC 24 |
Oct 03 08:10:12 AM UTC 24 |
5392549000 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_disable.1807516803 |
|
|
Oct 03 08:09:33 AM UTC 24 |
Oct 03 08:10:13 AM UTC 24 |
27059800 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw_evict.1875588043 |
|
|
Oct 03 08:09:18 AM UTC 24 |
Oct 03 08:10:15 AM UTC 24 |
29502500 ps |
| T318 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_intr_rd.1218171487 |
|
|
Oct 03 08:08:17 AM UTC 24 |
Oct 03 08:10:18 AM UTC 24 |
757331900 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw_evict_all_en.3390726634 |
|
|
Oct 03 08:09:27 AM UTC 24 |
Oct 03 08:10:18 AM UTC 24 |
30745300 ps |
| T337 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_re_evict.1727011582 |
|
|
Oct 03 08:09:30 AM UTC 24 |
Oct 03 08:10:20 AM UTC 24 |
163502200 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_connect.84241214 |
|
|
Oct 03 08:09:55 AM UTC 24 |
Oct 03 08:10:22 AM UTC 24 |
15142300 ps |
| T319 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_intr_rd_slow_flash.369826302 |
|
|
Oct 03 08:05:09 AM UTC 24 |
Oct 03 08:10:23 AM UTC 24 |
52024808500 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_lcmgr_intg.334842361 |
|
|
Oct 03 08:10:06 AM UTC 24 |
Oct 03 08:10:26 AM UTC 24 |
32204300 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_read_seed_err.1649949472 |
|
|
Oct 03 08:10:08 AM UTC 24 |
Oct 03 08:10:33 AM UTC 24 |
15148000 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_alert_test.2544908981 |
|
|
Oct 03 08:10:14 AM UTC 24 |
Oct 03 08:10:39 AM UTC 24 |
249398600 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_intr_wr_slow_flash.3882026802 |
|
|
Oct 03 08:05:12 AM UTC 24 |
Oct 03 08:10:48 AM UTC 24 |
171591769100 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_wo.716880693 |
|
|
Oct 03 08:07:41 AM UTC 24 |
Oct 03 08:10:54 AM UTC 24 |
11092275900 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_fetch_code.3238344559 |
|
|
Oct 03 08:10:33 AM UTC 24 |
Oct 03 08:11:01 AM UTC 24 |
860929700 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_sec_info_access.2542435654 |
|
|
Oct 03 08:09:40 AM UTC 24 |
Oct 03 08:11:11 AM UTC 24 |
3126490100 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_mp_regions.905310945 |
|
|
Oct 03 08:07:08 AM UTC 24 |
Oct 03 08:11:11 AM UTC 24 |
10903593500 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw_derr.3049029806 |
|
|
Oct 03 08:08:16 AM UTC 24 |
Oct 03 08:11:12 AM UTC 24 |
1401539700 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_ro_derr.1224353541 |
|
|
Oct 03 08:08:15 AM UTC 24 |
Oct 03 08:11:24 AM UTC 24 |
1270200700 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw_serr.269826967 |
|
|
Oct 03 08:08:05 AM UTC 24 |
Oct 03 08:11:24 AM UTC 24 |
1682195500 ps |
| T268 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_prog_rma_wipe_err.45850070 |
|
|
Oct 03 08:10:12 AM UTC 24 |
Oct 03 08:11:25 AM UTC 24 |
10071882400 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_phy_arb.3220943815 |
|
|
Oct 03 08:03:37 AM UTC 24 |
Oct 03 08:11:51 AM UTC 24 |
2586345800 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_sec_otp.2075096461 |
|
|
Oct 03 08:10:21 AM UTC 24 |
Oct 03 08:11:54 AM UTC 24 |
3926647800 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_invalid_op.223326597 |
|
|
Oct 03 08:10:56 AM UTC 24 |
Oct 03 08:11:56 AM UTC 24 |
3366357400 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_hw_rma.603920444 |
|
|
Oct 03 07:40:39 AM UTC 24 |
Oct 03 08:12:05 AM UTC 24 |
501973227800 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_smoke.3809992085 |
|
|
Oct 03 08:10:16 AM UTC 24 |
Oct 03 08:12:47 AM UTC 24 |
27151000 ps |
| T96 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_otp_reset.4185478595 |
|
|
Oct 03 08:10:24 AM UTC 24 |
Oct 03 08:13:13 AM UTC 24 |
35646900 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_ro_serr.3914422711 |
|
|
Oct 03 08:11:14 AM UTC 24 |
Oct 03 08:13:15 AM UTC 24 |
2182698900 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_intr_wr_slow_flash.3547611795 |
|
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Oct 03 08:08:49 AM UTC 24 |
Oct 03 08:13:22 AM UTC 24 |
78716268700 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_error_prog_win.3533565084 |
|
|
Oct 03 07:50:02 AM UTC 24 |
Oct 03 08:13:29 AM UTC 24 |
17311777500 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_phy_arb.2290535398 |
|
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Oct 03 08:10:19 AM UTC 24 |
Oct 03 08:13:32 AM UTC 24 |
131989500 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_ro.3869734255 |
|
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Oct 03 08:11:13 AM UTC 24 |
Oct 03 08:13:43 AM UTC 24 |
532686700 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_ro_derr.3924442030 |
|
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Oct 03 08:11:25 AM UTC 24 |
Oct 03 08:13:44 AM UTC 24 |
13754281100 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_intr_wr.83338324 |
|
|
Oct 03 08:11:54 AM UTC 24 |
Oct 03 08:13:47 AM UTC 24 |
49287726100 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw_evict.2182251960 |
|
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Oct 03 08:13:13 AM UTC 24 |
Oct 03 08:13:49 AM UTC 24 |
29442200 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_hw_rma_reset.2631365629 |
|
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Oct 03 07:54:39 AM UTC 24 |
Oct 03 08:14:07 AM UTC 24 |
480366581000 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_connect.2934606662 |
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Oct 03 08:13:44 AM UTC 24 |
Oct 03 08:14:07 AM UTC 24 |
13461400 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_error_prog_win.1305237676 |
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Oct 03 07:54:58 AM UTC 24 |
Oct 03 08:14:07 AM UTC 24 |
1341440300 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_disable.2919654760 |
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Oct 03 08:13:30 AM UTC 24 |
Oct 03 08:14:08 AM UTC 24 |
10810500 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_lcmgr_intg.2200375508 |
|
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Oct 03 08:13:45 AM UTC 24 |
Oct 03 08:14:12 AM UTC 24 |
45772800 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_re_evict.1264316591 |
|
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Oct 03 08:13:23 AM UTC 24 |
Oct 03 08:14:12 AM UTC 24 |
79363200 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_read_seed_err.849568576 |
|
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Oct 03 08:13:48 AM UTC 24 |
Oct 03 08:14:13 AM UTC 24 |
48950500 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw_evict_all_en.2982925393 |
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Oct 03 08:13:15 AM UTC 24 |
Oct 03 08:14:14 AM UTC 24 |
153193600 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_wo.788194959 |
|
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Oct 03 08:11:02 AM UTC 24 |
Oct 03 08:14:21 AM UTC 24 |
5238048600 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_hw_rma_reset.2289757042 |
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Oct 03 07:59:12 AM UTC 24 |
Oct 03 08:14:33 AM UTC 24 |
200210712300 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_alert_test.3830037425 |
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Oct 03 08:14:07 AM UTC 24 |
Oct 03 08:14:34 AM UTC 24 |
41587800 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw_derr.2408984241 |
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Oct 03 08:11:26 AM UTC 24 |
Oct 03 08:14:36 AM UTC 24 |
1513807100 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rand_ops.3873597673 |
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Oct 03 07:54:37 AM UTC 24 |
Oct 03 08:14:48 AM UTC 24 |
456242100 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_prog_reset.3284000765 |
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Oct 03 08:12:47 AM UTC 24 |
Oct 03 08:14:54 AM UTC 24 |
1298762000 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_phy_arb.2847435971 |
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Oct 03 08:06:59 AM UTC 24 |
Oct 03 08:14:57 AM UTC 24 |
1462800600 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_prog_rma_wipe_err.890871145 |
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Oct 03 08:13:50 AM UTC 24 |
Oct 03 08:15:15 AM UTC 24 |
10053998500 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_sec_info_access.3330855518 |
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Oct 03 08:13:35 AM UTC 24 |
Oct 03 08:15:20 AM UTC 24 |
5463220800 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_intr_rd_slow_flash.2731885893 |
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Oct 03 08:08:27 AM UTC 24 |
Oct 03 08:15:32 AM UTC 24 |
65190240000 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_invalid_op.2254755843 |
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Oct 03 08:14:22 AM UTC 24 |
Oct 03 08:16:02 AM UTC 24 |
898283500 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw_serr.4283203017 |
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Oct 03 08:11:25 AM UTC 24 |
Oct 03 08:16:04 AM UTC 24 |
6944920600 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_ro.195679548 |
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Oct 03 08:14:34 AM UTC 24 |
Oct 03 08:16:08 AM UTC 24 |
1096228400 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_intr_wr_slow_flash.1626771779 |
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Oct 03 08:12:06 AM UTC 24 |
Oct 03 08:16:09 AM UTC 24 |
20085900000 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_rw_evict_all_en.580309633 |
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Oct 03 08:15:20 AM UTC 24 |
Oct 03 08:16:13 AM UTC 24 |
29630100 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_sec_otp.1321818435 |
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Oct 03 08:14:13 AM UTC 24 |
Oct 03 08:16:20 AM UTC 24 |
12325091300 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_lcmgr_intg.3578064823 |
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Oct 03 08:16:09 AM UTC 24 |
Oct 03 08:16:30 AM UTC 24 |
26228200 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_re_evict.95269151 |
|
|
Oct 03 08:15:33 AM UTC 24 |
Oct 03 08:16:30 AM UTC 24 |
696765900 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_read_seed_err.3516592184 |
|
|
Oct 03 08:16:10 AM UTC 24 |
Oct 03 08:16:35 AM UTC 24 |
46658400 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_connect.3219871624 |
|
|
Oct 03 08:16:05 AM UTC 24 |
Oct 03 08:16:38 AM UTC 24 |
23029500 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_disable.1821691143 |
|
|
Oct 03 08:15:56 AM UTC 24 |
Oct 03 08:16:42 AM UTC 24 |
26086900 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_alert_test.152841963 |
|
|
Oct 03 08:16:20 AM UTC 24 |
Oct 03 08:16:49 AM UTC 24 |
69836900 ps |
| T110 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw.1629801314 |
|
|
Oct 03 08:07:42 AM UTC 24 |
Oct 03 08:16:49 AM UTC 24 |
6872189100 ps |
| T42 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_intr_rd.3190410796 |
|
|
Oct 03 08:14:49 AM UTC 24 |
Oct 03 08:16:49 AM UTC 24 |
3946317200 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_wo.1588531669 |
|
|
Oct 03 08:14:34 AM UTC 24 |
Oct 03 08:17:01 AM UTC 24 |
7010055900 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_intr_rd_slow_flash.2914827407 |
|
|
Oct 03 08:11:58 AM UTC 24 |
Oct 03 08:17:01 AM UTC 24 |
55055057600 ps |
| T317 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_intr_rd.594870017 |
|
|
Oct 03 08:11:52 AM UTC 24 |
Oct 03 08:17:01 AM UTC 24 |
1670437700 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_otp_reset.2633585090 |
|
|
Oct 03 08:14:14 AM UTC 24 |
Oct 03 08:17:05 AM UTC 24 |
43309500 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_prog_rma_wipe_err.217038776 |
|
|
Oct 03 08:16:14 AM UTC 24 |
Oct 03 08:17:10 AM UTC 24 |
10071197000 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_sec_info_access.2281169117 |
|
|
Oct 03 08:16:03 AM UTC 24 |
Oct 03 08:17:27 AM UTC 24 |
1762117500 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_phy_arb.3302278676 |
|
|
Oct 03 08:14:10 AM UTC 24 |
Oct 03 08:17:28 AM UTC 24 |
204775500 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_prog_reset.3886215017 |
|
|
Oct 03 08:14:58 AM UTC 24 |
Oct 03 08:17:37 AM UTC 24 |
5312118100 ps |
| T298 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_sec_otp.2430495098 |
|
|
Oct 03 08:16:39 AM UTC 24 |
Oct 03 08:17:41 AM UTC 24 |
25620420000 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_mp_regions.506556274 |
|
|
Oct 03 08:10:26 AM UTC 24 |
Oct 03 08:17:54 AM UTC 24 |
7245940100 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_smoke.332068533 |
|
|
Oct 03 08:14:07 AM UTC 24 |
Oct 03 08:17:57 AM UTC 24 |
37159800 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_mp_regions.750733584 |
|
|
Oct 03 07:59:20 AM UTC 24 |
Oct 03 08:17:57 AM UTC 24 |
59470565100 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_prog_reset.503482784 |
|
|
Oct 03 08:17:28 AM UTC 24 |
Oct 03 08:18:05 AM UTC 24 |
639012600 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rw_evict.929399054 |
|
|
Oct 03 08:17:29 AM UTC 24 |
Oct 03 08:18:13 AM UTC 24 |
31516200 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_phy_arb.411128624 |
|
|
Oct 03 08:16:36 AM UTC 24 |
Oct 03 08:18:14 AM UTC 24 |
80935800 ps |
| T120 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_disable.2838330037 |
|
|
Oct 03 08:17:53 AM UTC 24 |
Oct 03 08:18:20 AM UTC 24 |
30347600 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rw_evict_all_en.1538632203 |
|
|
Oct 03 08:17:38 AM UTC 24 |
Oct 03 08:18:22 AM UTC 24 |
28345100 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_lcmgr_intg.449268749 |
|
|
Oct 03 08:17:58 AM UTC 24 |
Oct 03 08:18:24 AM UTC 24 |
41829200 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_invalid_op.826917013 |
|
|
Oct 03 08:16:50 AM UTC 24 |
Oct 03 08:18:25 AM UTC 24 |
891841900 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_read_seed_err.4084705601 |
|
|
Oct 03 08:18:05 AM UTC 24 |
Oct 03 08:18:29 AM UTC 24 |
40145500 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_connect.3220982277 |
|
|
Oct 03 08:17:58 AM UTC 24 |
Oct 03 08:18:31 AM UTC 24 |
26746300 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_alert_test.1683227266 |
|
|
Oct 03 08:18:14 AM UTC 24 |
Oct 03 08:18:37 AM UTC 24 |
78101800 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_re_evict.363209742 |
|
|
Oct 03 08:17:41 AM UTC 24 |
Oct 03 08:18:44 AM UTC 24 |
1178757900 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_smoke.4004539299 |
|
|
Oct 03 08:16:31 AM UTC 24 |
Oct 03 08:18:49 AM UTC 24 |
57627000 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_intr_rd_slow_flash.1102853373 |
|
|
Oct 03 08:14:55 AM UTC 24 |
Oct 03 08:19:05 AM UTC 24 |
24907740500 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_sec_info_access.4212875777 |
|
|
Oct 03 08:17:55 AM UTC 24 |
Oct 03 08:19:07 AM UTC 24 |
4002373400 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_ro.3437929098 |
|
|
Oct 03 08:17:02 AM UTC 24 |
Oct 03 08:19:27 AM UTC 24 |
2181976800 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_host_ctrl_arb.1620019104 |
|
|
Oct 03 07:36:39 AM UTC 24 |
Oct 03 08:19:35 AM UTC 24 |
241544490800 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_error_prog_win.999801560 |
|
|
Oct 03 07:59:42 AM UTC 24 |
Oct 03 08:19:35 AM UTC 24 |
311824300 ps |
| T108 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_error_prog_type.3679715406 |
|
|
Oct 03 07:38:45 AM UTC 24 |
Oct 03 08:19:36 AM UTC 24 |
1867550800 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_smoke.2639840347 |
|
|
Oct 03 08:18:22 AM UTC 24 |
Oct 03 08:19:47 AM UTC 24 |
34432500 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_wo.2895981894 |
|
|
Oct 03 08:17:02 AM UTC 24 |
Oct 03 08:19:53 AM UTC 24 |
4671746100 ps |
| T290 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_intr_rd.3568829342 |
|
|
Oct 03 08:17:06 AM UTC 24 |
Oct 03 08:19:59 AM UTC 24 |
2995672200 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_prog_reset.3812832740 |
|
|
Oct 03 08:19:37 AM UTC 24 |
Oct 03 08:20:04 AM UTC 24 |
21016300 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_otp_reset.188434615 |
|
|
Oct 03 08:16:50 AM UTC 24 |
Oct 03 08:20:10 AM UTC 24 |
88707100 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_invalid_op.1761274078 |
|
|
Oct 03 08:18:45 AM UTC 24 |
Oct 03 08:20:11 AM UTC 24 |
3247217400 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_ro.3104019324 |
|
|
Oct 03 08:21:10 AM UTC 24 |
Oct 03 08:22:58 AM UTC 24 |
477815000 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_prog_rma_wipe_err.2315581005 |
|
|
Oct 03 08:18:13 AM UTC 24 |
Oct 03 08:20:21 AM UTC 24 |
10034283700 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw.1471096455 |
|
|
Oct 03 08:11:13 AM UTC 24 |
Oct 03 08:20:21 AM UTC 24 |
30188440100 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rw_evict.1362268252 |
|
|
Oct 03 08:19:38 AM UTC 24 |
Oct 03 08:20:26 AM UTC 24 |
315991500 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_connect.553038136 |
|
|
Oct 03 08:20:11 AM UTC 24 |
Oct 03 08:20:33 AM UTC 24 |
13985000 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rw_evict_all_en.1768181081 |
|
|
Oct 03 08:19:48 AM UTC 24 |
Oct 03 08:20:42 AM UTC 24 |
65395500 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_lcmgr_intg.3020074660 |
|
|
Oct 03 08:20:13 AM UTC 24 |
Oct 03 08:20:43 AM UTC 24 |
27000100 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_disable.3330553091 |
|
|
Oct 03 08:20:00 AM UTC 24 |
Oct 03 08:20:46 AM UTC 24 |
12909900 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_alert_test.2584318572 |
|
|
Oct 03 08:20:22 AM UTC 24 |
Oct 03 08:20:49 AM UTC 24 |
29777500 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_read_seed_err.4153827680 |
|
|
Oct 03 08:20:21 AM UTC 24 |
Oct 03 08:20:51 AM UTC 24 |
15119600 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_re_evict.500527566 |
|
|
Oct 03 08:19:53 AM UTC 24 |
Oct 03 08:20:57 AM UTC 24 |
269696200 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_ro.3344139067 |
|
|
Oct 03 08:19:06 AM UTC 24 |
Oct 03 08:21:00 AM UTC 24 |
550858300 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_sec_otp.2901060732 |
|
|
Oct 03 08:18:26 AM UTC 24 |
Oct 03 08:21:08 AM UTC 24 |
4496828600 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_rma_reset.1371363205 |
|
|
Oct 03 08:03:44 AM UTC 24 |
Oct 03 08:21:12 AM UTC 24 |
160176834000 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_prog_rma_wipe_err.2826581590 |
|
|
Oct 03 08:20:22 AM UTC 24 |
Oct 03 08:21:14 AM UTC 24 |
10042521000 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_sec_info_access.286286426 |
|
|
Oct 03 08:20:05 AM UTC 24 |
Oct 03 08:21:37 AM UTC 24 |
2515285300 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_otp_reset.2219264154 |
|
|
Oct 03 08:18:32 AM UTC 24 |
Oct 03 08:21:40 AM UTC 24 |
39904100 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_rand_ops.2990000945 |
|
|
Oct 03 08:14:09 AM UTC 24 |
Oct 03 08:22:11 AM UTC 24 |
412730200 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_intr_rd_slow_flash.1628141705 |
|
|
Oct 03 08:17:11 AM UTC 24 |
Oct 03 08:22:13 AM UTC 24 |
23902830000 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_phy_arb.1761164692 |
|
|
Oct 03 08:18:25 AM UTC 24 |
Oct 03 08:22:13 AM UTC 24 |
129399800 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_prog_reset.869990714 |
|
|
Oct 03 08:21:40 AM UTC 24 |
Oct 03 08:22:14 AM UTC 24 |
639261200 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_wo.3704105278 |
|
|
Oct 03 08:18:50 AM UTC 24 |
Oct 03 08:22:18 AM UTC 24 |
12051149700 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_invalid_op.3612656717 |
|
|
Oct 03 08:20:58 AM UTC 24 |
Oct 03 08:22:18 AM UTC 24 |
7931741400 ps |
| T102 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_connect.87302152 |
|
|
Oct 03 08:22:19 AM UTC 24 |
Oct 03 08:22:40 AM UTC 24 |
51391800 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rand_ops.1726764590 |
|
|
Oct 03 08:06:58 AM UTC 24 |
Oct 03 08:22:41 AM UTC 24 |
146952300 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw_evict.487969953 |
|
|
Oct 03 08:22:11 AM UTC 24 |
Oct 03 08:22:50 AM UTC 24 |
74302500 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_disable.3049678435 |
|
|
Oct 03 08:22:15 AM UTC 24 |
Oct 03 08:22:51 AM UTC 24 |
17691500 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_mp_regions.9775175 |
|
|
Oct 03 08:20:52 AM UTC 24 |
Oct 03 08:22:57 AM UTC 24 |
2702869500 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_smoke.2277176809 |
|
|
Oct 03 08:20:26 AM UTC 24 |
Oct 03 08:23:00 AM UTC 24 |
66060300 ps |
| T136 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_mp_regions.3570830571 |
|
|
Oct 03 08:16:50 AM UTC 24 |
Oct 03 08:23:01 AM UTC 24 |
29105116600 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_lcmgr_intg.3701718066 |
|
|
Oct 03 08:22:41 AM UTC 24 |
Oct 03 08:23:02 AM UTC 24 |
15868900 ps |
| T212 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_re_evict.4228070590 |
|
|
Oct 03 08:22:15 AM UTC 24 |
Oct 03 08:23:03 AM UTC 24 |
346422300 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw_evict_all_en.2726854750 |
|
|
Oct 03 08:22:15 AM UTC 24 |
Oct 03 08:23:04 AM UTC 24 |
60110000 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_read_seed_err.2650651100 |
|
|
Oct 03 08:22:42 AM UTC 24 |
Oct 03 08:23:04 AM UTC 24 |
108978600 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_alert_test.3233391007 |
|
|
Oct 03 08:22:52 AM UTC 24 |
Oct 03 08:23:17 AM UTC 24 |
76738000 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_phy_arb.3480054847 |
|
|
Oct 03 08:20:43 AM UTC 24 |
Oct 03 08:23:24 AM UTC 24 |
113032700 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_rw.216433114 |
|
|
Oct 03 08:14:37 AM UTC 24 |
Oct 03 08:23:31 AM UTC 24 |
3356442400 ps |
| T137 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_mp_regions.1149093892 |
|
|
Oct 03 08:18:38 AM UTC 24 |
Oct 03 08:23:36 AM UTC 24 |
32324984900 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd.224353833 |
|
|
Oct 03 08:21:15 AM UTC 24 |
Oct 03 08:23:45 AM UTC 24 |
910316000 ps |
| T328 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_intr_rd_slow_flash.3470411870 |
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Oct 03 08:19:37 AM UTC 24 |
Oct 03 08:23:47 AM UTC 24 |
15077637400 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rand_ops.3446529763 |
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Oct 03 08:20:34 AM UTC 24 |
Oct 03 08:23:52 AM UTC 24 |
43950100 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_wo.2209382027 |
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Oct 03 08:21:01 AM UTC 24 |
Oct 03 08:23:52 AM UTC 24 |
1832345400 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_sec_info_access.2320323021 |
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Oct 03 08:22:19 AM UTC 24 |
Oct 03 08:23:57 AM UTC 24 |
7593186500 ps |