| T862 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_hw_sec_otp.2756731127 |
|
|
Oct 03 08:37:45 AM UTC 24 |
Oct 03 08:41:54 AM UTC 24 |
2911303000 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_alert_test.1460685478 |
|
|
Oct 03 08:41:38 AM UTC 24 |
Oct 03 08:41:59 AM UTC 24 |
130700800 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_rw_evict_all_en.3360080899 |
|
|
Oct 03 08:41:27 AM UTC 24 |
Oct 03 08:42:00 AM UTC 24 |
38944800 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_sec_info_access.3474618802 |
|
|
Oct 03 08:40:13 AM UTC 24 |
Oct 03 08:42:01 AM UTC 24 |
9456132800 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_disable.2944454002 |
|
|
Oct 03 08:41:27 AM UTC 24 |
Oct 03 08:42:02 AM UTC 24 |
84617200 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_connect.3098516298 |
|
|
Oct 03 08:41:38 AM UTC 24 |
Oct 03 08:42:08 AM UTC 24 |
38852900 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_sec_info_access.1895213842 |
|
|
Oct 03 08:40:51 AM UTC 24 |
Oct 03 08:42:12 AM UTC 24 |
2898538400 ps |
| T187 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_host_ctrl_arb.3034788427 |
|
|
Oct 03 07:44:12 AM UTC 24 |
Oct 03 08:42:18 AM UTC 24 |
267916743700 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_hw_sec_otp.3045395630 |
|
|
Oct 03 08:39:46 AM UTC 24 |
Oct 03 08:42:23 AM UTC 24 |
3444880000 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_intr_rd_slow_flash.3908569461 |
|
|
Oct 03 08:37:57 AM UTC 24 |
Oct 03 08:42:23 AM UTC 24 |
24795550100 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_intr_rd.2910906472 |
|
|
Oct 03 08:39:52 AM UTC 24 |
Oct 03 08:44:12 AM UTC 24 |
7882040400 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_intr_rd_slow_flash.1170606192 |
|
|
Oct 03 08:38:34 AM UTC 24 |
Oct 03 08:42:24 AM UTC 24 |
23581918100 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_connect.988796623 |
|
|
Oct 03 08:42:02 AM UTC 24 |
Oct 03 08:42:27 AM UTC 24 |
48395500 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_alert_test.4220587563 |
|
|
Oct 03 08:42:03 AM UTC 24 |
Oct 03 08:42:31 AM UTC 24 |
69855900 ps |
| T875 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_intr_rd.1677908648 |
|
|
Oct 03 08:39:08 AM UTC 24 |
Oct 03 08:42:31 AM UTC 24 |
14271014200 ps |
| T876 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_rw_evict.2894937006 |
|
|
Oct 03 08:41:53 AM UTC 24 |
Oct 03 08:42:37 AM UTC 24 |
88930000 ps |
| T877 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_smoke.929335770 |
|
|
Oct 03 08:40:25 AM UTC 24 |
Oct 03 08:42:39 AM UTC 24 |
59733900 ps |
| T878 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_rw_evict_all_en.2932353000 |
|
|
Oct 03 08:41:54 AM UTC 24 |
Oct 03 08:42:41 AM UTC 24 |
65454400 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_disable.1263414036 |
|
|
Oct 03 08:42:00 AM UTC 24 |
Oct 03 08:42:41 AM UTC 24 |
13663200 ps |
| T879 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_intr_rd_slow_flash.3772736857 |
|
|
Oct 03 08:39:53 AM UTC 24 |
Oct 03 08:42:42 AM UTC 24 |
6018282000 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_otp_reset.108008489 |
|
|
Oct 03 08:39:52 AM UTC 24 |
Oct 03 08:42:46 AM UTC 24 |
76135200 ps |
| T880 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_smoke.30813672 |
|
|
Oct 03 08:39:06 AM UTC 24 |
Oct 03 08:42:53 AM UTC 24 |
29486600 ps |
| T881 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_hw_sec_otp.1484191605 |
|
|
Oct 03 08:40:25 AM UTC 24 |
Oct 03 08:42:53 AM UTC 24 |
16252773100 ps |
| T882 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_connect.3072158129 |
|
|
Oct 03 08:42:32 AM UTC 24 |
Oct 03 08:43:00 AM UTC 24 |
47414200 ps |
| T883 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_rw_evict.2315620924 |
|
|
Oct 03 08:42:25 AM UTC 24 |
Oct 03 08:43:01 AM UTC 24 |
156836300 ps |
| T884 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_alert_test.1577603583 |
|
|
Oct 03 08:42:38 AM UTC 24 |
Oct 03 08:43:03 AM UTC 24 |
90742500 ps |
| T885 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_disable.3076298662 |
|
|
Oct 03 08:42:28 AM UTC 24 |
Oct 03 08:43:06 AM UTC 24 |
10833800 ps |
| T886 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_intr_rd_slow_flash.3462005236 |
|
|
Oct 03 08:40:41 AM UTC 24 |
Oct 03 08:43:08 AM UTC 24 |
5816138800 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_mp_regions.1924934204 |
|
|
Oct 03 08:27:11 AM UTC 24 |
Oct 03 08:43:13 AM UTC 24 |
12169832600 ps |
| T887 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_smoke.1844872809 |
|
|
Oct 03 08:39:37 AM UTC 24 |
Oct 03 08:43:13 AM UTC 24 |
26001800 ps |
| T888 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_rw_evict_all_en.3930846770 |
|
|
Oct 03 08:42:26 AM UTC 24 |
Oct 03 08:43:16 AM UTC 24 |
36349700 ps |
| T889 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_error_mp.2209990077 |
|
|
Oct 03 07:55:05 AM UTC 24 |
Oct 03 08:43:16 AM UTC 24 |
12906214600 ps |
| T890 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_prog_reset.3504315696 |
|
|
Oct 03 08:39:54 AM UTC 24 |
Oct 03 08:43:18 AM UTC 24 |
2356356500 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_sec_info_access.65283752 |
|
|
Oct 03 08:41:29 AM UTC 24 |
Oct 03 08:43:19 AM UTC 24 |
4142207600 ps |
| T891 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_smoke.846450526 |
|
|
Oct 03 08:42:09 AM UTC 24 |
Oct 03 08:43:20 AM UTC 24 |
18850600 ps |
| T892 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_otp_reset.3804924229 |
|
|
Oct 03 08:40:39 AM UTC 24 |
Oct 03 08:43:22 AM UTC 24 |
74942100 ps |
| T893 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_sec_info_access.1784328940 |
|
|
Oct 03 08:42:02 AM UTC 24 |
Oct 03 08:43:23 AM UTC 24 |
397283500 ps |
| T894 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_smoke.2447725963 |
|
|
Oct 03 08:41:00 AM UTC 24 |
Oct 03 08:43:24 AM UTC 24 |
142018300 ps |
| T895 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_alert_test.2862938029 |
|
|
Oct 03 08:43:08 AM UTC 24 |
Oct 03 08:43:27 AM UTC 24 |
83088400 ps |
| T896 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_smoke.2031581879 |
|
|
Oct 03 08:38:16 AM UTC 24 |
Oct 03 08:43:30 AM UTC 24 |
117638700 ps |
| T897 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_connect.2116244700 |
|
|
Oct 03 08:43:04 AM UTC 24 |
Oct 03 08:43:30 AM UTC 24 |
13852000 ps |
| T898 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_prog_reset.2331733021 |
|
|
Oct 03 08:40:41 AM UTC 24 |
Oct 03 08:43:31 AM UTC 24 |
19049674200 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_disable.2597225631 |
|
|
Oct 03 08:43:00 AM UTC 24 |
Oct 03 08:43:31 AM UTC 24 |
13014200 ps |
| T899 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_hw_sec_otp.3872509275 |
|
|
Oct 03 08:41:48 AM UTC 24 |
Oct 03 08:43:32 AM UTC 24 |
2125981900 ps |
| T900 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_host_ctrl_arb.185093084 |
|
|
Oct 03 07:49:12 AM UTC 24 |
Oct 03 08:43:33 AM UTC 24 |
288022767900 ps |
| T901 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_smoke.3525262001 |
|
|
Oct 03 08:41:44 AM UTC 24 |
Oct 03 08:43:38 AM UTC 24 |
20722600 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_rw_evict_all_en.751983832 |
|
|
Oct 03 08:42:54 AM UTC 24 |
Oct 03 08:43:38 AM UTC 24 |
88593100 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_sec_info_access.480152661 |
|
|
Oct 03 08:42:31 AM UTC 24 |
Oct 03 08:43:39 AM UTC 24 |
776419000 ps |
| T902 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_connect.2957541006 |
|
|
Oct 03 08:43:23 AM UTC 24 |
Oct 03 08:43:45 AM UTC 24 |
43188100 ps |
| T903 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_rw_evict.3571572617 |
|
|
Oct 03 08:42:53 AM UTC 24 |
Oct 03 08:43:48 AM UTC 24 |
39596000 ps |
| T904 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_alert_test.2944261311 |
|
|
Oct 03 08:43:25 AM UTC 24 |
Oct 03 08:43:49 AM UTC 24 |
30071500 ps |
| T905 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_intr_rd_slow_flash.3105799483 |
|
|
Oct 03 08:39:10 AM UTC 24 |
Oct 03 08:43:49 AM UTC 24 |
12580512600 ps |
| T906 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_rw_evict.1506920912 |
|
|
Oct 03 08:43:19 AM UTC 24 |
Oct 03 08:43:56 AM UTC 24 |
54202600 ps |
| T907 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_alert_test.3161755807 |
|
|
Oct 03 08:43:46 AM UTC 24 |
Oct 03 08:44:04 AM UTC 24 |
29568400 ps |
| T908 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_disable.4055371227 |
|
|
Oct 03 08:43:20 AM UTC 24 |
Oct 03 08:44:06 AM UTC 24 |
10274700 ps |
| T909 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_hw_sec_otp.725703320 |
|
|
Oct 03 08:43:15 AM UTC 24 |
Oct 03 08:44:06 AM UTC 24 |
991936100 ps |
| T910 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_connect.1569684037 |
|
|
Oct 03 08:43:40 AM UTC 24 |
Oct 03 08:44:08 AM UTC 24 |
22767400 ps |
| T911 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_rw_evict.3462028851 |
|
|
Oct 03 08:43:32 AM UTC 24 |
Oct 03 08:44:08 AM UTC 24 |
43522700 ps |
| T912 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_disable.2764102768 |
|
|
Oct 03 08:43:39 AM UTC 24 |
Oct 03 08:44:12 AM UTC 24 |
11953700 ps |
| T913 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_smoke.1693310935 |
|
|
Oct 03 08:42:40 AM UTC 24 |
Oct 03 08:44:13 AM UTC 24 |
61916400 ps |
| T914 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_rw_evict_all_en.2057941504 |
|
|
Oct 03 08:43:20 AM UTC 24 |
Oct 03 08:44:16 AM UTC 24 |
55779300 ps |
| T95 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_otp_reset.400758428 |
|
|
Oct 03 08:41:20 AM UTC 24 |
Oct 03 08:44:16 AM UTC 24 |
350814400 ps |
| T915 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rand_ops.3687771812 |
|
|
Oct 03 08:31:16 AM UTC 24 |
Oct 03 08:44:18 AM UTC 24 |
229814900 ps |
| T916 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_sec_info_access.2031217165 |
|
|
Oct 03 08:43:02 AM UTC 24 |
Oct 03 08:44:26 AM UTC 24 |
2125522600 ps |
| T917 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_rw_evict_all_en.3129515583 |
|
|
Oct 03 08:43:35 AM UTC 24 |
Oct 03 08:44:30 AM UTC 24 |
174050400 ps |
| T918 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_intr_rd.655402784 |
|
|
Oct 03 08:42:25 AM UTC 24 |
Oct 03 08:44:34 AM UTC 24 |
1275469300 ps |
| T919 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_sec_info_access.771173811 |
|
|
Oct 03 08:43:23 AM UTC 24 |
Oct 03 08:44:35 AM UTC 24 |
4949489500 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_error_prog_type.1100480968 |
|
|
Oct 03 07:49:56 AM UTC 24 |
Oct 03 08:44:38 AM UTC 24 |
1517056800 ps |
| T920 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_alert_test.94503355 |
|
|
Oct 03 08:44:13 AM UTC 24 |
Oct 03 08:44:42 AM UTC 24 |
255690900 ps |
| T921 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_connect.2471884023 |
|
|
Oct 03 08:44:12 AM UTC 24 |
Oct 03 08:44:46 AM UTC 24 |
49451100 ps |
| T922 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_disable.2716941729 |
|
|
Oct 03 08:44:09 AM UTC 24 |
Oct 03 08:44:46 AM UTC 24 |
30523300 ps |
| T923 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_rw_evict.3328636892 |
|
|
Oct 03 08:44:07 AM UTC 24 |
Oct 03 08:44:48 AM UTC 24 |
27884700 ps |
| T924 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_intr_rd_slow_flash.1609870985 |
|
|
Oct 03 08:41:50 AM UTC 24 |
Oct 03 08:44:48 AM UTC 24 |
32093659900 ps |
| T925 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_intr_rd.92839270 |
|
|
Oct 03 08:40:40 AM UTC 24 |
Oct 03 08:44:50 AM UTC 24 |
8943758800 ps |
| T926 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_intr_rd.2199571842 |
|
|
Oct 03 08:41:50 AM UTC 24 |
Oct 03 08:44:52 AM UTC 24 |
1686927200 ps |
| T927 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_connect.1633136233 |
|
|
Oct 03 08:44:40 AM UTC 24 |
Oct 03 08:44:59 AM UTC 24 |
20413500 ps |
| T928 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_rw_evict_all_en.2322415961 |
|
|
Oct 03 08:44:08 AM UTC 24 |
Oct 03 08:45:01 AM UTC 24 |
29601600 ps |
| T929 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_smoke.2398354722 |
|
|
Oct 03 08:43:28 AM UTC 24 |
Oct 03 08:45:02 AM UTC 24 |
52214700 ps |
| T930 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_alert_test.3668973371 |
|
|
Oct 03 08:44:43 AM UTC 24 |
Oct 03 08:45:02 AM UTC 24 |
149951800 ps |
| T931 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_intr_rd.801195280 |
|
|
Oct 03 08:42:43 AM UTC 24 |
Oct 03 08:45:09 AM UTC 24 |
3495765300 ps |
| T932 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_disable.3246162328 |
|
|
Oct 03 08:44:35 AM UTC 24 |
Oct 03 08:45:12 AM UTC 24 |
15925200 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_sec_info_access.1230687022 |
|
|
Oct 03 08:43:40 AM UTC 24 |
Oct 03 08:45:13 AM UTC 24 |
2883402700 ps |
| T933 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_rw_evict_all_en.4283358172 |
|
|
Oct 03 08:44:30 AM UTC 24 |
Oct 03 08:45:21 AM UTC 24 |
30873200 ps |
| T934 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_connect.1852095321 |
|
|
Oct 03 08:45:03 AM UTC 24 |
Oct 03 08:45:24 AM UTC 24 |
47135500 ps |
| T935 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_intr_rd.2693107307 |
|
|
Oct 03 08:41:23 AM UTC 24 |
Oct 03 08:45:25 AM UTC 24 |
9691217200 ps |
| T936 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_intr_rd_slow_flash.1155846745 |
|
|
Oct 03 08:42:47 AM UTC 24 |
Oct 03 08:45:25 AM UTC 24 |
47732859000 ps |
| T937 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_rw_evict.3390272742 |
|
|
Oct 03 08:44:27 AM UTC 24 |
Oct 03 08:45:31 AM UTC 24 |
127508400 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_disable.4070619544 |
|
|
Oct 03 08:45:02 AM UTC 24 |
Oct 03 08:45:32 AM UTC 24 |
31012200 ps |
| T938 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_otp_reset.1364885531 |
|
|
Oct 03 08:42:19 AM UTC 24 |
Oct 03 08:45:36 AM UTC 24 |
49833200 ps |
| T939 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_alert_test.102946206 |
|
|
Oct 03 08:45:10 AM UTC 24 |
Oct 03 08:45:36 AM UTC 24 |
47537300 ps |
| T940 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_intr_rd_slow_flash.3371741540 |
|
|
Oct 03 08:43:17 AM UTC 24 |
Oct 03 08:45:37 AM UTC 24 |
5933288900 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_otp_reset.32857666 |
|
|
Oct 03 08:41:49 AM UTC 24 |
Oct 03 08:45:39 AM UTC 24 |
269750100 ps |
| T941 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_smoke.1049690184 |
|
|
Oct 03 08:43:09 AM UTC 24 |
Oct 03 08:45:39 AM UTC 24 |
27994200 ps |
| T942 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_hw_sec_otp.1652465246 |
|
|
Oct 03 08:41:14 AM UTC 24 |
Oct 03 08:45:39 AM UTC 24 |
2987928000 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_sec_info_access.3171115352 |
|
|
Oct 03 08:44:09 AM UTC 24 |
Oct 03 08:45:39 AM UTC 24 |
2137716700 ps |
| T943 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_rw_evict.2229125268 |
|
|
Oct 03 08:44:53 AM UTC 24 |
Oct 03 08:45:54 AM UTC 24 |
27142400 ps |
| T944 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_intr_rd.2439268527 |
|
|
Oct 03 08:43:32 AM UTC 24 |
Oct 03 08:45:56 AM UTC 24 |
4444430300 ps |
| T945 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_intr_rd_slow_flash.2133399208 |
|
|
Oct 03 08:41:24 AM UTC 24 |
Oct 03 08:45:56 AM UTC 24 |
12321371400 ps |
| T946 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_alert_test.3158978523 |
|
|
Oct 03 08:45:38 AM UTC 24 |
Oct 03 08:45:57 AM UTC 24 |
80705500 ps |
| T947 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_connect.1720930 |
|
|
Oct 03 08:45:37 AM UTC 24 |
Oct 03 08:45:57 AM UTC 24 |
27123500 ps |
| T948 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_hw_sec_otp.1838611969 |
|
|
Oct 03 08:43:31 AM UTC 24 |
Oct 03 08:45:58 AM UTC 24 |
1697404100 ps |
| T949 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_hw_sec_otp.2828535526 |
|
|
Oct 03 08:44:16 AM UTC 24 |
Oct 03 08:46:00 AM UTC 24 |
9863633600 ps |
| T950 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_sec_info_access.244446006 |
|
|
Oct 03 08:44:35 AM UTC 24 |
Oct 03 08:46:01 AM UTC 24 |
562362400 ps |
| T951 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_rw_evict_all_en.409197328 |
|
|
Oct 03 08:44:59 AM UTC 24 |
Oct 03 08:46:01 AM UTC 24 |
30541200 ps |
| T952 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_hw_sec_otp.889450533 |
|
|
Oct 03 08:43:50 AM UTC 24 |
Oct 03 08:46:08 AM UTC 24 |
6208077600 ps |
| T953 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_disable.2232803123 |
|
|
Oct 03 08:45:33 AM UTC 24 |
Oct 03 08:46:08 AM UTC 24 |
10503200 ps |
| T954 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_otp_reset.793914689 |
|
|
Oct 03 08:43:15 AM UTC 24 |
Oct 03 08:46:09 AM UTC 24 |
159835900 ps |
| T955 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_sec_info_access.3989244679 |
|
|
Oct 03 08:45:03 AM UTC 24 |
Oct 03 08:46:15 AM UTC 24 |
1713389500 ps |
| T956 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_rw_evict.3321385745 |
|
|
Oct 03 08:45:27 AM UTC 24 |
Oct 03 08:46:17 AM UTC 24 |
72798400 ps |
| T957 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_hw_sec_otp.149449162 |
|
|
Oct 03 08:42:42 AM UTC 24 |
Oct 03 08:46:19 AM UTC 24 |
10830205300 ps |
| T958 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_smoke.4010850398 |
|
|
Oct 03 08:43:48 AM UTC 24 |
Oct 03 08:46:21 AM UTC 24 |
69397500 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_otp_reset.2897335719 |
|
|
Oct 03 08:42:42 AM UTC 24 |
Oct 03 08:46:22 AM UTC 24 |
120696200 ps |
| T959 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_connect.2476976683 |
|
|
Oct 03 08:45:59 AM UTC 24 |
Oct 03 08:46:23 AM UTC 24 |
46292700 ps |
| T960 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_alert_test.2389485929 |
|
|
Oct 03 08:46:01 AM UTC 24 |
Oct 03 08:46:28 AM UTC 24 |
50838000 ps |
| T291 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_hw_sec_otp.4113952398 |
|
|
Oct 03 08:42:12 AM UTC 24 |
Oct 03 08:46:32 AM UTC 24 |
12430559800 ps |
| T961 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_alert_test.590552502 |
|
|
Oct 03 08:46:16 AM UTC 24 |
Oct 03 08:46:36 AM UTC 24 |
83709600 ps |
| T962 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_connect.1331093966 |
|
|
Oct 03 08:46:13 AM UTC 24 |
Oct 03 08:46:36 AM UTC 24 |
12851100 ps |
| T963 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_smoke.353825221 |
|
|
Oct 03 08:45:13 AM UTC 24 |
Oct 03 08:46:39 AM UTC 24 |
56054500 ps |
| T964 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_disable.1430972775 |
|
|
Oct 03 08:45:58 AM UTC 24 |
Oct 03 08:46:43 AM UTC 24 |
72039100 ps |
| T965 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_otp_reset.4029570887 |
|
|
Oct 03 08:43:31 AM UTC 24 |
Oct 03 08:46:43 AM UTC 24 |
125328700 ps |
| T966 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_disable.1645740269 |
|
|
Oct 03 08:46:09 AM UTC 24 |
Oct 03 08:46:43 AM UTC 24 |
10724200 ps |
| T967 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_sec_info_access.2875706663 |
|
|
Oct 03 08:45:37 AM UTC 24 |
Oct 03 08:46:47 AM UTC 24 |
2548842200 ps |
| T968 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_error_mp.43078482 |
|
|
Oct 03 07:50:08 AM UTC 24 |
Oct 03 08:46:49 AM UTC 24 |
4424765000 ps |
| T969 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_intr_rd_slow_flash.548310746 |
|
|
Oct 03 08:44:04 AM UTC 24 |
Oct 03 08:46:49 AM UTC 24 |
23307965600 ps |
| T970 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_disable.1370445478 |
|
|
Oct 03 08:46:23 AM UTC 24 |
Oct 03 08:46:50 AM UTC 24 |
10753800 ps |
| T971 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_intr_rd_slow_flash.200924542 |
|
|
Oct 03 08:42:25 AM UTC 24 |
Oct 03 08:46:50 AM UTC 24 |
71548183800 ps |
| T972 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_otp_reset.4272426498 |
|
|
Oct 03 08:43:50 AM UTC 24 |
Oct 03 08:46:50 AM UTC 24 |
140712900 ps |
| T973 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_rw_evict.3122402568 |
|
|
Oct 03 08:45:57 AM UTC 24 |
Oct 03 08:46:50 AM UTC 24 |
122058600 ps |
| T974 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_intr_rd.3269521680 |
|
|
Oct 03 08:44:19 AM UTC 24 |
Oct 03 08:46:51 AM UTC 24 |
2890730400 ps |
| T975 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_alert_test.295576784 |
|
|
Oct 03 08:46:34 AM UTC 24 |
Oct 03 08:46:53 AM UTC 24 |
82917500 ps |
| T976 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_connect.3497205677 |
|
|
Oct 03 08:46:28 AM UTC 24 |
Oct 03 08:46:53 AM UTC 24 |
16114800 ps |
| T977 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_rw_evict_all_en.3434907092 |
|
|
Oct 03 08:45:57 AM UTC 24 |
Oct 03 08:46:58 AM UTC 24 |
74464500 ps |
| T978 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_hw_sec_otp.1363852851 |
|
|
Oct 03 08:44:47 AM UTC 24 |
Oct 03 08:47:02 AM UTC 24 |
3700390900 ps |
| T979 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_alert_test.2080388159 |
|
|
Oct 03 08:46:48 AM UTC 24 |
Oct 03 08:47:06 AM UTC 24 |
121434900 ps |
| T980 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_intr_rd.1857748369 |
|
|
Oct 03 08:43:17 AM UTC 24 |
Oct 03 08:47:06 AM UTC 24 |
3087696000 ps |
| T981 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_full_mem_access.1443073964 |
|
|
Oct 03 07:38:44 AM UTC 24 |
Oct 03 08:47:07 AM UTC 24 |
50872470700 ps |
| T982 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_sec_info_access.2792024310 |
|
|
Oct 03 08:46:10 AM UTC 24 |
Oct 03 08:47:12 AM UTC 24 |
346498800 ps |
| T983 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_connect.3363078758 |
|
|
Oct 03 08:46:44 AM UTC 24 |
Oct 03 08:47:12 AM UTC 24 |
44089800 ps |
| T984 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_alert_test.1455764928 |
|
|
Oct 03 08:46:52 AM UTC 24 |
Oct 03 08:47:14 AM UTC 24 |
38684900 ps |
| T985 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_connect.244133525 |
|
|
Oct 03 08:46:51 AM UTC 24 |
Oct 03 08:47:14 AM UTC 24 |
70047600 ps |
| T986 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_hw_sec_otp.3526981823 |
|
|
Oct 03 08:45:14 AM UTC 24 |
Oct 03 08:47:19 AM UTC 24 |
3248074000 ps |
| T987 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/67.flash_ctrl_connect.1100376212 |
|
|
Oct 03 08:49:15 AM UTC 24 |
Oct 03 08:49:35 AM UTC 24 |
15211600 ps |
| T988 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_rma_reset.3779863287 |
|
|
Oct 03 08:31:22 AM UTC 24 |
Oct 03 08:47:19 AM UTC 24 |
210210586800 ps |
| T989 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_otp_reset.978121325 |
|
|
Oct 03 08:44:17 AM UTC 24 |
Oct 03 08:47:22 AM UTC 24 |
119470300 ps |
| T990 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_disable.1145899424 |
|
|
Oct 03 08:46:51 AM UTC 24 |
Oct 03 08:47:23 AM UTC 24 |
10607200 ps |
| T991 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_disable.3558257462 |
|
|
Oct 03 08:46:43 AM UTC 24 |
Oct 03 08:47:24 AM UTC 24 |
24731700 ps |
| T992 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_rma_reset.2357206263 |
|
|
Oct 03 08:33:23 AM UTC 24 |
Oct 03 08:47:29 AM UTC 24 |
40127783200 ps |
| T993 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_smoke.1377686193 |
|
|
Oct 03 08:44:13 AM UTC 24 |
Oct 03 08:47:30 AM UTC 24 |
59989500 ps |
| T994 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_sec_info_access.235169170 |
|
|
Oct 03 08:45:58 AM UTC 24 |
Oct 03 08:47:31 AM UTC 24 |
1434065800 ps |
| T995 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_connect.2940570857 |
|
|
Oct 03 08:47:07 AM UTC 24 |
Oct 03 08:47:31 AM UTC 24 |
25709400 ps |
| T996 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_intr_rd_slow_flash.3155949707 |
|
|
Oct 03 08:44:22 AM UTC 24 |
Oct 03 08:47:32 AM UTC 24 |
6003663200 ps |
| T997 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_alert_test.1962796056 |
|
|
Oct 03 08:47:16 AM UTC 24 |
Oct 03 08:47:34 AM UTC 24 |
32185700 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_disable.2654093991 |
|
|
Oct 03 08:47:03 AM UTC 24 |
Oct 03 08:47:39 AM UTC 24 |
15654000 ps |
| T998 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_smoke.1299629745 |
|
|
Oct 03 08:46:37 AM UTC 24 |
Oct 03 08:47:40 AM UTC 24 |
33711700 ps |
| T999 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_hw_sec_otp.1618287374 |
|
|
Oct 03 08:46:55 AM UTC 24 |
Oct 03 08:47:41 AM UTC 24 |
2124061500 ps |
| T1000 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_rma_reset.2814457251 |
|
|
Oct 03 08:29:24 AM UTC 24 |
Oct 03 08:47:42 AM UTC 24 |
160202474100 ps |
| T1001 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_alert_test.3471504483 |
|
|
Oct 03 08:47:23 AM UTC 24 |
Oct 03 08:47:46 AM UTC 24 |
50500300 ps |
| T1002 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_connect.2914938076 |
|
|
Oct 03 08:47:21 AM UTC 24 |
Oct 03 08:47:49 AM UTC 24 |
15089500 ps |
| T1003 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_otp_reset.2929093840 |
|
|
Oct 03 08:44:49 AM UTC 24 |
Oct 03 08:47:50 AM UTC 24 |
71189600 ps |
| T1004 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_alert_test.3821937004 |
|
|
Oct 03 08:47:33 AM UTC 24 |
Oct 03 08:47:51 AM UTC 24 |
163534200 ps |
| T1005 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_sec_info_access.765245584 |
|
|
Oct 03 08:46:44 AM UTC 24 |
Oct 03 08:47:53 AM UTC 24 |
2315381800 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_disable.265875875 |
|
|
Oct 03 08:47:17 AM UTC 24 |
Oct 03 08:47:54 AM UTC 24 |
30735900 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_sec_info_access.3000930557 |
|
|
Oct 03 08:46:24 AM UTC 24 |
Oct 03 08:47:56 AM UTC 24 |
3363237700 ps |
| T1006 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_intr_rd_slow_flash.677644210 |
|
|
Oct 03 08:45:26 AM UTC 24 |
Oct 03 08:47:56 AM UTC 24 |
23689938700 ps |
| T1007 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_sec_info_access.1269022240 |
|
|
Oct 03 08:46:51 AM UTC 24 |
Oct 03 08:47:57 AM UTC 24 |
1418649000 ps |
| T1008 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_disable.3711318503 |
|
|
Oct 03 08:47:31 AM UTC 24 |
Oct 03 08:48:00 AM UTC 24 |
21502100 ps |
| T1009 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_connect.484117008 |
|
|
Oct 03 08:47:33 AM UTC 24 |
Oct 03 08:48:01 AM UTC 24 |
25805300 ps |
| T1010 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_intr_rd_slow_flash.3093241387 |
|
|
Oct 03 08:44:50 AM UTC 24 |
Oct 03 08:48:07 AM UTC 24 |
12136379800 ps |
| T1011 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_disable.3164095295 |
|
|
Oct 03 08:47:42 AM UTC 24 |
Oct 03 08:48:10 AM UTC 24 |
25640400 ps |
| T1012 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_connect.4117920989 |
|
|
Oct 03 08:47:47 AM UTC 24 |
Oct 03 08:48:16 AM UTC 24 |
13898300 ps |
| T1013 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_alert_test.697632284 |
|
|
Oct 03 08:47:49 AM UTC 24 |
Oct 03 08:48:20 AM UTC 24 |
100639000 ps |
| T1014 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_connect.2764100067 |
|
|
Oct 03 08:47:57 AM UTC 24 |
Oct 03 08:48:20 AM UTC 24 |
25475200 ps |
| T1015 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_disable.1168459537 |
|
|
Oct 03 08:47:55 AM UTC 24 |
Oct 03 08:48:22 AM UTC 24 |
48945900 ps |
| T1016 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_hw_sec_otp.2834992343 |
|
|
Oct 03 08:46:50 AM UTC 24 |
Oct 03 08:48:23 AM UTC 24 |
974473100 ps |
| T1017 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_hw_sec_otp.2507954962 |
|
|
Oct 03 08:46:38 AM UTC 24 |
Oct 03 08:48:25 AM UTC 24 |
11299148400 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_otp_reset.3035228400 |
|
|
Oct 03 08:45:22 AM UTC 24 |
Oct 03 08:48:28 AM UTC 24 |
40257900 ps |
| T1018 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_alert_test.2337156977 |
|
|
Oct 03 08:47:58 AM UTC 24 |
Oct 03 08:48:28 AM UTC 24 |
162594400 ps |
| T1019 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_sec_info_access.2376462543 |
|
|
Oct 03 08:47:06 AM UTC 24 |
Oct 03 08:48:35 AM UTC 24 |
5183799400 ps |
| T1020 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_intr_rd.790729646 |
|
|
Oct 03 08:45:24 AM UTC 24 |
Oct 03 08:48:38 AM UTC 24 |
3667578000 ps |
| T1021 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_intr_rd.2741698312 |
|
|
Oct 03 08:43:57 AM UTC 24 |
Oct 03 08:48:38 AM UTC 24 |
17006003000 ps |
| T1022 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_hw_sec_otp.4087021570 |
|
|
Oct 03 08:46:02 AM UTC 24 |
Oct 03 08:48:39 AM UTC 24 |
2950317800 ps |
| T1023 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_disable.2339618140 |
|
|
Oct 03 08:48:11 AM UTC 24 |
Oct 03 08:48:43 AM UTC 24 |
32554700 ps |
| T1024 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_smoke.1570285500 |
|
|
Oct 03 08:45:39 AM UTC 24 |
Oct 03 08:48:44 AM UTC 24 |
56109500 ps |
| T1025 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_alert_test.1348385257 |
|
|
Oct 03 08:48:21 AM UTC 24 |
Oct 03 08:48:46 AM UTC 24 |
29976300 ps |
| T1026 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_connect.1139780240 |
|
|
Oct 03 08:48:20 AM UTC 24 |
Oct 03 08:48:47 AM UTC 24 |
45955400 ps |
| T1027 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_intr_rd.3246337422 |
|
|
Oct 03 08:44:49 AM UTC 24 |
Oct 03 08:48:48 AM UTC 24 |
1694396700 ps |
| T1028 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_intr_rd.1779545796 |
|
|
Oct 03 08:45:41 AM UTC 24 |
Oct 03 08:48:50 AM UTC 24 |
3418584200 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_sec_info_access.2679618688 |
|
|
Oct 03 08:47:42 AM UTC 24 |
Oct 03 08:48:50 AM UTC 24 |
9831653600 ps |
| T1029 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_otp_reset.116033083 |
|
|
Oct 03 08:45:41 AM UTC 24 |
Oct 03 08:48:51 AM UTC 24 |
48239800 ps |
| T1030 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_sec_info_access.1094209096 |
|
|
Oct 03 08:47:32 AM UTC 24 |
Oct 03 08:48:51 AM UTC 24 |
1239293500 ps |
| T1031 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/50.flash_ctrl_connect.2442535528 |
|
|
Oct 03 08:48:24 AM UTC 24 |
Oct 03 08:48:52 AM UTC 24 |
26879400 ps |
| T1032 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_hw_sec_otp.3762652593 |
|
|
Oct 03 08:48:01 AM UTC 24 |
Oct 03 08:48:53 AM UTC 24 |
905002700 ps |
| T1033 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/51.flash_ctrl_connect.869449401 |
|
|
Oct 03 08:48:29 AM UTC 24 |
Oct 03 08:48:54 AM UTC 24 |
16459900 ps |
| T1034 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_smoke.2471545442 |
|
|
Oct 03 08:46:55 AM UTC 24 |
Oct 03 08:48:56 AM UTC 24 |
47749500 ps |
| T1035 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_smoke.1706673915 |
|
|
Oct 03 08:46:02 AM UTC 24 |
Oct 03 08:48:59 AM UTC 24 |
33358500 ps |
| T1036 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_sec_info_access.3052241446 |
|
|
Oct 03 08:47:20 AM UTC 24 |
Oct 03 08:49:00 AM UTC 24 |
3779452600 ps |
| T1037 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_hw_sec_otp.1637799268 |
|
|
Oct 03 08:46:20 AM UTC 24 |
Oct 03 08:49:02 AM UTC 24 |
9283157700 ps |
| T1038 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/52.flash_ctrl_connect.1882033672 |
|
|
Oct 03 08:48:36 AM UTC 24 |
Oct 03 08:49:03 AM UTC 24 |
24113500 ps |
| T1039 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_smoke.38594506 |
|
|
Oct 03 08:47:35 AM UTC 24 |
Oct 03 08:49:05 AM UTC 24 |
48365900 ps |
| T1040 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_hw_sec_otp.2412172014 |
|
|
Oct 03 08:45:39 AM UTC 24 |
Oct 03 08:49:05 AM UTC 24 |
4713193800 ps |
| T1041 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/53.flash_ctrl_connect.2580786695 |
|
|
Oct 03 08:48:39 AM UTC 24 |
Oct 03 08:49:06 AM UTC 24 |
16622200 ps |
| T1042 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/54.flash_ctrl_connect.851666572 |
|
|
Oct 03 08:48:43 AM UTC 24 |
Oct 03 08:49:09 AM UTC 24 |
16966500 ps |
| T1043 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_sec_info_access.654920737 |
|
|
Oct 03 08:47:56 AM UTC 24 |
Oct 03 08:49:09 AM UTC 24 |
3328516800 ps |
| T1044 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_otp_reset.2567531015 |
|
|
Oct 03 08:46:09 AM UTC 24 |
Oct 03 08:49:10 AM UTC 24 |
196001200 ps |
| T1045 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/58.flash_ctrl_connect.603697715 |
|
|
Oct 03 08:48:52 AM UTC 24 |
Oct 03 08:49:11 AM UTC 24 |
16466200 ps |
| T1046 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/55.flash_ctrl_connect.2380341035 |
|
|
Oct 03 08:48:47 AM UTC 24 |
Oct 03 08:49:12 AM UTC 24 |
47119500 ps |
| T1047 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_otp_reset.173874429 |
|
|
Oct 03 08:46:59 AM UTC 24 |
Oct 03 08:49:14 AM UTC 24 |
87309000 ps |
| T1048 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/57.flash_ctrl_connect.1086344925 |
|
|
Oct 03 08:48:51 AM UTC 24 |
Oct 03 08:49:15 AM UTC 24 |
13871000 ps |
| T1049 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/56.flash_ctrl_connect.2770767569 |
|
|
Oct 03 08:48:49 AM UTC 24 |
Oct 03 08:49:15 AM UTC 24 |
22443300 ps |
| T1050 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_sec_info_access.2559698678 |
|
|
Oct 03 08:48:17 AM UTC 24 |
Oct 03 08:49:15 AM UTC 24 |
844768300 ps |
| T1051 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_otp_reset.1308408242 |
|
|
Oct 03 08:46:22 AM UTC 24 |
Oct 03 08:49:18 AM UTC 24 |
81141200 ps |
| T1052 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/59.flash_ctrl_connect.700114538 |
|
|
Oct 03 08:48:54 AM UTC 24 |
Oct 03 08:49:20 AM UTC 24 |
19998200 ps |
| T1053 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/62.flash_ctrl_connect.2724941520 |
|
|
Oct 03 08:49:04 AM UTC 24 |
Oct 03 08:49:22 AM UTC 24 |
32896500 ps |
| T1054 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_hw_sec_otp.961559577 |
|
|
Oct 03 08:47:40 AM UTC 24 |
Oct 03 08:49:25 AM UTC 24 |
8350505900 ps |
| T1055 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/60.flash_ctrl_connect.2726677944 |
|
|
Oct 03 08:48:57 AM UTC 24 |
Oct 03 08:49:26 AM UTC 24 |
41435600 ps |
| T1056 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_mp_regions.262217286 |
|
|
Oct 03 08:33:24 AM UTC 24 |
Oct 03 08:49:27 AM UTC 24 |
191272420500 ps |
| T1057 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/61.flash_ctrl_connect.3964276539 |
|
|
Oct 03 08:49:01 AM UTC 24 |
Oct 03 08:49:27 AM UTC 24 |
40845800 ps |
| T1058 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/63.flash_ctrl_connect.3801960931 |
|
|
Oct 03 08:49:06 AM UTC 24 |
Oct 03 08:49:28 AM UTC 24 |
71659900 ps |
| T1059 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_otp_reset.254432129 |
|
|
Oct 03 08:46:40 AM UTC 24 |
Oct 03 08:49:29 AM UTC 24 |
43587600 ps |
| T1060 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/64.flash_ctrl_connect.3641170474 |
|
|
Oct 03 08:49:10 AM UTC 24 |
Oct 03 08:49:33 AM UTC 24 |
36030800 ps |
| T1061 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/66.flash_ctrl_connect.1521998420 |
|
|
Oct 03 08:49:13 AM UTC 24 |
Oct 03 08:49:36 AM UTC 24 |
27104500 ps |
| T1062 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/68.flash_ctrl_connect.286624782 |
|
|
Oct 03 08:49:17 AM UTC 24 |
Oct 03 08:49:38 AM UTC 24 |
26879900 ps |
| T1063 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_hw_sec_otp.729426855 |
|
|
Oct 03 08:47:17 AM UTC 24 |
Oct 03 08:49:42 AM UTC 24 |
19739819600 ps |
| T1064 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/65.flash_ctrl_connect.3109300762 |
|
|
Oct 03 08:49:11 AM UTC 24 |
Oct 03 08:49:42 AM UTC 24 |
15652100 ps |
| T1065 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/69.flash_ctrl_connect.1768280706 |
|
|
Oct 03 08:49:21 AM UTC 24 |
Oct 03 08:49:44 AM UTC 24 |
39916900 ps |
| T1066 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_otp_reset.3096675622 |
|
|
Oct 03 08:47:17 AM UTC 24 |
Oct 03 08:49:48 AM UTC 24 |
66444500 ps |
| T1067 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/70.flash_ctrl_connect.1637759031 |
|
|
Oct 03 08:49:26 AM UTC 24 |
Oct 03 08:49:51 AM UTC 24 |
161084500 ps |
| T1068 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_otp_reset.1643705293 |
|
|
Oct 03 08:46:51 AM UTC 24 |
Oct 03 08:49:52 AM UTC 24 |
37570000 ps |
| T1069 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/73.flash_ctrl_connect.1471376187 |
|
|
Oct 03 08:49:34 AM UTC 24 |
Oct 03 08:49:52 AM UTC 24 |
16668200 ps |
| T1070 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/72.flash_ctrl_connect.3593692965 |
|
|
Oct 03 08:49:29 AM UTC 24 |
Oct 03 08:49:54 AM UTC 24 |
49963600 ps |
| T1071 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/71.flash_ctrl_connect.487531924 |
|
|
Oct 03 08:49:29 AM UTC 24 |
Oct 03 08:49:56 AM UTC 24 |
21649600 ps |
| T1072 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/74.flash_ctrl_connect.3326840201 |
|
|
Oct 03 08:49:36 AM UTC 24 |
Oct 03 08:49:58 AM UTC 24 |
14523600 ps |
| T1073 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_hw_sec_otp.1162219159 |
|
|
Oct 03 08:47:53 AM UTC 24 |
Oct 03 08:50:03 AM UTC 24 |
1228374800 ps |
| T1074 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/75.flash_ctrl_connect.4071110940 |
|
|
Oct 03 08:49:43 AM UTC 24 |
Oct 03 08:50:03 AM UTC 24 |
46029200 ps |
| T1075 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/76.flash_ctrl_connect.385791793 |
|
|
Oct 03 08:49:45 AM UTC 24 |
Oct 03 08:50:12 AM UTC 24 |
26241700 ps |
| T1076 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/77.flash_ctrl_connect.3806602810 |
|
|
Oct 03 08:49:51 AM UTC 24 |
Oct 03 08:50:16 AM UTC 24 |
52517900 ps |
| T1077 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/78.flash_ctrl_connect.3114572478 |
|
|
Oct 03 08:49:53 AM UTC 24 |
Oct 03 08:50:18 AM UTC 24 |
73153500 ps |
| T1078 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/79.flash_ctrl_connect.1977611236 |
|
|
Oct 03 08:49:56 AM UTC 24 |
Oct 03 08:50:22 AM UTC 24 |
18953900 ps |
| T1079 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_error_mp.3944771296 |
|
|
Oct 03 07:59:59 AM UTC 24 |
Oct 03 08:50:23 AM UTC 24 |
9288830800 ps |
| T1080 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_hw_sec_otp.2714301887 |
|
|
Oct 03 08:47:25 AM UTC 24 |
Oct 03 08:50:29 AM UTC 24 |
22052027800 ps |
| T1081 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_smoke.2902770081 |
|
|
Oct 03 08:48:00 AM UTC 24 |
Oct 03 08:50:30 AM UTC 24 |
88104300 ps |
| T1082 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_otp_reset.1812234444 |
|
|
Oct 03 08:47:30 AM UTC 24 |
Oct 03 08:50:31 AM UTC 24 |
335881500 ps |
| T1083 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/50.flash_ctrl_otp_reset.572710968 |
|
|
Oct 03 08:48:23 AM UTC 24 |
Oct 03 08:50:34 AM UTC 24 |
155757900 ps |
| T1084 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_otp_reset.774557051 |
|
|
Oct 03 08:47:41 AM UTC 24 |
Oct 03 08:50:38 AM UTC 24 |
147254600 ps |
| T1085 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_full_mem_access.2814893515 |
|
|
Oct 03 07:40:51 AM UTC 24 |
Oct 03 08:50:44 AM UTC 24 |
99777602800 ps |
| T1086 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_smoke.4210143377 |
|
|
Oct 03 08:47:17 AM UTC 24 |
Oct 03 08:50:48 AM UTC 24 |
152677300 ps |
| T1087 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_intr_rd_slow_flash.3728915006 |
|
|
Oct 03 08:45:55 AM UTC 24 |
Oct 03 08:50:48 AM UTC 24 |
12483817900 ps |
| T1088 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_otp_reset.785650689 |
|
|
Oct 03 08:47:54 AM UTC 24 |
Oct 03 08:50:50 AM UTC 24 |
333080600 ps |
| T1089 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_smoke.1634156138 |
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|
Oct 03 08:47:24 AM UTC 24 |
Oct 03 08:50:55 AM UTC 24 |
88733900 ps |
| T1090 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_otp_reset.1020274360 |
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|
Oct 03 08:48:08 AM UTC 24 |
Oct 03 08:50:59 AM UTC 24 |
40894900 ps |