| T659 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_rma_reset.915407753 |
|
|
Oct 03 08:07:03 AM UTC 24 |
Oct 03 08:24:01 AM UTC 24 |
60133001000 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_prog_reset.4067686922 |
|
|
Oct 03 08:23:48 AM UTC 24 |
Oct 03 08:24:11 AM UTC 24 |
66586200 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw_evict_all_en.1370691476 |
|
|
Oct 03 08:23:53 AM UTC 24 |
Oct 03 08:24:31 AM UTC 24 |
184487600 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_invalid_op.1701068261 |
|
|
Oct 03 08:23:04 AM UTC 24 |
Oct 03 08:24:36 AM UTC 24 |
6166113500 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_sec_otp.2294040498 |
|
|
Oct 03 08:20:44 AM UTC 24 |
Oct 03 08:24:41 AM UTC 24 |
11306662100 ps |
| T121 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_disable.2992854943 |
|
|
Oct 03 08:24:01 AM UTC 24 |
Oct 03 08:24:41 AM UTC 24 |
104306200 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw_evict.1242561814 |
|
|
Oct 03 08:23:53 AM UTC 24 |
Oct 03 08:24:47 AM UTC 24 |
74774500 ps |
| T266 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_prog_rma_wipe_err.2837332589 |
|
|
Oct 03 08:22:51 AM UTC 24 |
Oct 03 08:24:54 AM UTC 24 |
10012048800 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_re_evict.1060289606 |
|
|
Oct 03 08:23:57 AM UTC 24 |
Oct 03 08:24:55 AM UTC 24 |
109642800 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_smoke.614267419 |
|
|
Oct 03 08:22:58 AM UTC 24 |
Oct 03 08:24:59 AM UTC 24 |
50476100 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_otp_reset.1408063997 |
|
|
Oct 03 08:20:50 AM UTC 24 |
Oct 03 08:25:00 AM UTC 24 |
130711100 ps |
| T103 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_connect.2774150560 |
|
|
Oct 03 08:24:33 AM UTC 24 |
Oct 03 08:25:01 AM UTC 24 |
25774000 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_lcmgr_intg.3309601216 |
|
|
Oct 03 08:24:37 AM UTC 24 |
Oct 03 08:25:01 AM UTC 24 |
15559800 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_read_seed_err.173381783 |
|
|
Oct 03 08:24:41 AM UTC 24 |
Oct 03 08:25:11 AM UTC 24 |
19578900 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_alert_test.1193508633 |
|
|
Oct 03 08:24:48 AM UTC 24 |
Oct 03 08:25:11 AM UTC 24 |
377143100 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_ro.2725037535 |
|
|
Oct 03 08:23:25 AM UTC 24 |
Oct 03 08:25:15 AM UTC 24 |
1882312700 ps |
| T292 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_sec_otp.3182890641 |
|
|
Oct 03 08:23:03 AM UTC 24 |
Oct 03 08:25:18 AM UTC 24 |
1750446000 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_rma_reset.3958470628 |
|
|
Oct 03 08:10:23 AM UTC 24 |
Oct 03 08:25:19 AM UTC 24 |
40123573200 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rand_ops.4245161684 |
|
|
Oct 03 08:03:32 AM UTC 24 |
Oct 03 08:25:24 AM UTC 24 |
221581300 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_sec_info_access.3285474283 |
|
|
Oct 03 08:24:12 AM UTC 24 |
Oct 03 08:25:39 AM UTC 24 |
1668358400 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd.4080279204 |
|
|
Oct 03 08:23:38 AM UTC 24 |
Oct 03 08:25:52 AM UTC 24 |
574809900 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_otp_reset.2614402192 |
|
|
Oct 03 08:23:04 AM UTC 24 |
Oct 03 08:25:55 AM UTC 24 |
43441200 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_prog_reset.2316468451 |
|
|
Oct 03 08:25:52 AM UTC 24 |
Oct 03 08:26:12 AM UTC 24 |
59118600 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_invalid_op.748976439 |
|
|
Oct 03 08:25:12 AM UTC 24 |
Oct 03 08:26:25 AM UTC 24 |
9225467500 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_phy_arb.2518952766 |
|
|
Oct 03 08:25:00 AM UTC 24 |
Oct 03 08:26:27 AM UTC 24 |
28500600 ps |
| T111 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rw.3393425776 |
|
|
Oct 03 08:17:03 AM UTC 24 |
Oct 03 08:26:31 AM UTC 24 |
3363992700 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw_evict.4057531409 |
|
|
Oct 03 08:25:56 AM UTC 24 |
Oct 03 08:26:42 AM UTC 24 |
37687800 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw_evict_all_en.2474180846 |
|
|
Oct 03 08:26:13 AM UTC 24 |
Oct 03 08:26:47 AM UTC 24 |
28813400 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_host_ctrl_arb.2051408716 |
|
|
Oct 03 07:40:42 AM UTC 24 |
Oct 03 08:26:49 AM UTC 24 |
903392809300 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_ro.1293521646 |
|
|
Oct 03 08:25:20 AM UTC 24 |
Oct 03 08:26:59 AM UTC 24 |
2433172400 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_connect.3392636770 |
|
|
Oct 03 08:26:43 AM UTC 24 |
Oct 03 08:27:03 AM UTC 24 |
13750500 ps |
| T112 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd_slow_flash.3646593401 |
|
|
Oct 03 08:21:38 AM UTC 24 |
Oct 03 08:27:03 AM UTC 24 |
12237738600 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rand_ops.2039067751 |
|
|
Oct 03 08:18:23 AM UTC 24 |
Oct 03 08:27:04 AM UTC 24 |
425516100 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_disable.2261211371 |
|
|
Oct 03 08:26:28 AM UTC 24 |
Oct 03 08:27:06 AM UTC 24 |
18280300 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_re_evict.1745327710 |
|
|
Oct 03 08:26:26 AM UTC 24 |
Oct 03 08:27:07 AM UTC 24 |
121563700 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rw.896984145 |
|
|
Oct 03 08:19:08 AM UTC 24 |
Oct 03 08:27:07 AM UTC 24 |
15573787500 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_read_seed_err.1694257240 |
|
|
Oct 03 08:26:49 AM UTC 24 |
Oct 03 08:27:09 AM UTC 24 |
18070500 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_lcmgr_intg.301378415 |
|
|
Oct 03 08:26:48 AM UTC 24 |
Oct 03 08:27:10 AM UTC 24 |
15526000 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_wo.1715177615 |
|
|
Oct 03 08:23:18 AM UTC 24 |
Oct 03 08:27:25 AM UTC 24 |
12027948300 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_alert_test.2761090716 |
|
|
Oct 03 08:27:04 AM UTC 24 |
Oct 03 08:27:31 AM UTC 24 |
21621400 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_sec_info_access.935337526 |
|
|
Oct 03 08:26:32 AM UTC 24 |
Oct 03 08:27:43 AM UTC 24 |
9063527900 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_error_prog_win.1766703340 |
|
|
Oct 03 08:04:07 AM UTC 24 |
Oct 03 08:27:49 AM UTC 24 |
3124380300 ps |
| T138 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_mp_regions.2014268659 |
|
|
Oct 03 08:14:15 AM UTC 24 |
Oct 03 08:28:00 AM UTC 24 |
102400584000 ps |
| T153 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_mp_regions.2873727702 |
|
|
Oct 03 08:23:04 AM UTC 24 |
Oct 03 08:28:09 AM UTC 24 |
10026434200 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_otp_reset.1182269110 |
|
|
Oct 03 08:25:02 AM UTC 24 |
Oct 03 08:28:19 AM UTC 24 |
147109300 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd_slow_flash.1972022702 |
|
|
Oct 03 08:23:46 AM UTC 24 |
Oct 03 08:28:21 AM UTC 24 |
48271730200 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rand_ops.1463352384 |
|
|
Oct 03 08:10:19 AM UTC 24 |
Oct 03 08:28:27 AM UTC 24 |
341693900 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rand_ops.2601199018 |
|
|
Oct 03 08:22:58 AM UTC 24 |
Oct 03 08:28:42 AM UTC 24 |
36274400 ps |
| T343 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw.2607388844 |
|
|
Oct 03 08:21:14 AM UTC 24 |
Oct 03 08:28:44 AM UTC 24 |
15022607300 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_prog_reset.3820678149 |
|
|
Oct 03 08:28:21 AM UTC 24 |
Oct 03 08:28:45 AM UTC 24 |
20885600 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_sec_otp.476061424 |
|
|
Oct 03 08:25:01 AM UTC 24 |
Oct 03 08:28:54 AM UTC 24 |
2381879100 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_invalid_op.2962286218 |
|
|
Oct 03 08:27:26 AM UTC 24 |
Oct 03 08:28:54 AM UTC 24 |
3145949800 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict.3450509475 |
|
|
Oct 03 08:28:22 AM UTC 24 |
Oct 03 08:28:58 AM UTC 24 |
29080000 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_disable.1320221491 |
|
|
Oct 03 08:28:45 AM UTC 24 |
Oct 03 08:29:15 AM UTC 24 |
28135900 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict_all_en.2190922296 |
|
|
Oct 03 08:28:28 AM UTC 24 |
Oct 03 08:29:17 AM UTC 24 |
71669100 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_intr_rd_slow_flash.3503705922 |
|
|
Oct 03 08:25:40 AM UTC 24 |
Oct 03 08:29:17 AM UTC 24 |
11581315800 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_connect.1845791370 |
|
|
Oct 03 08:28:55 AM UTC 24 |
Oct 03 08:29:18 AM UTC 24 |
16471400 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_smoke.2767495104 |
|
|
Oct 03 08:27:05 AM UTC 24 |
Oct 03 08:29:19 AM UTC 24 |
18885100 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_re_evict.1651953688 |
|
|
Oct 03 08:28:43 AM UTC 24 |
Oct 03 08:29:23 AM UTC 24 |
1260442400 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_lcmgr_intg.2390801899 |
|
|
Oct 03 08:28:55 AM UTC 24 |
Oct 03 08:29:23 AM UTC 24 |
15158700 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_read_seed_err.4276568786 |
|
|
Oct 03 08:28:59 AM UTC 24 |
Oct 03 08:29:25 AM UTC 24 |
15436900 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_wo.4035085547 |
|
|
Oct 03 08:25:16 AM UTC 24 |
Oct 03 08:29:26 AM UTC 24 |
9727946000 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_ro.3991429702 |
|
|
Oct 03 08:27:45 AM UTC 24 |
Oct 03 08:29:38 AM UTC 24 |
560556900 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_alert_test.3866131284 |
|
|
Oct 03 08:29:16 AM UTC 24 |
Oct 03 08:29:38 AM UTC 24 |
38062800 ps |
| T295 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_sec_otp.3916269663 |
|
|
Oct 03 08:27:08 AM UTC 24 |
Oct 03 08:29:40 AM UTC 24 |
3373121600 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_smoke.4160341173 |
|
|
Oct 03 08:24:56 AM UTC 24 |
Oct 03 08:29:56 AM UTC 24 |
89769000 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_otp_reset.3852493703 |
|
|
Oct 03 08:27:10 AM UTC 24 |
Oct 03 08:30:09 AM UTC 24 |
74632400 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd_slow_flash.742652538 |
|
|
Oct 03 08:28:10 AM UTC 24 |
Oct 03 08:30:17 AM UTC 24 |
11850155400 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_sec_info_access.103678959 |
|
|
Oct 03 08:28:46 AM UTC 24 |
Oct 03 08:30:17 AM UTC 24 |
4179469500 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd.4097211258 |
|
|
Oct 03 08:28:03 AM UTC 24 |
Oct 03 08:30:22 AM UTC 24 |
7365188500 ps |
| T273 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_error_mp.2784103119 |
|
|
Oct 03 07:44:25 AM UTC 24 |
Oct 03 08:30:22 AM UTC 24 |
4708790100 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_wo.2567371415 |
|
|
Oct 03 08:27:32 AM UTC 24 |
Oct 03 08:30:31 AM UTC 24 |
19220314600 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_prog_rma_wipe_err.3357672051 |
|
|
Oct 03 08:29:00 AM UTC 24 |
Oct 03 08:30:35 AM UTC 24 |
10019440800 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_prog_reset.3346921027 |
|
|
Oct 03 08:30:18 AM UTC 24 |
Oct 03 08:30:35 AM UTC 24 |
20469700 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw_evict.1185668272 |
|
|
Oct 03 08:30:18 AM UTC 24 |
Oct 03 08:30:59 AM UTC 24 |
112388100 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_prog_rma_wipe_err.449370738 |
|
|
Oct 03 08:24:41 AM UTC 24 |
Oct 03 08:31:02 AM UTC 24 |
10012330500 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_connect.1479295796 |
|
|
Oct 03 08:30:36 AM UTC 24 |
Oct 03 08:31:03 AM UTC 24 |
24671300 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_disable.1797762860 |
|
|
Oct 03 08:30:31 AM UTC 24 |
Oct 03 08:31:12 AM UTC 24 |
21004200 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_rma_reset.1454503089 |
|
|
Oct 03 08:14:14 AM UTC 24 |
Oct 03 08:31:14 AM UTC 24 |
90144400600 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_re_evict.3327370236 |
|
|
Oct 03 08:30:23 AM UTC 24 |
Oct 03 08:31:15 AM UTC 24 |
80147500 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw_evict_all_en.3710349379 |
|
|
Oct 03 08:30:22 AM UTC 24 |
Oct 03 08:31:16 AM UTC 24 |
98508000 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw.3858439896 |
|
|
Oct 03 08:23:32 AM UTC 24 |
Oct 03 08:31:21 AM UTC 24 |
4923393000 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_invalid_op.2630916704 |
|
|
Oct 03 08:29:27 AM UTC 24 |
Oct 03 08:31:22 AM UTC 24 |
921770100 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_ro.3510145006 |
|
|
Oct 03 08:29:39 AM UTC 24 |
Oct 03 08:31:26 AM UTC 24 |
572140800 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_rma_reset.1122510385 |
|
|
Oct 03 08:16:43 AM UTC 24 |
Oct 03 08:31:26 AM UTC 24 |
180172544600 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_phy_arb.732803424 |
|
|
Oct 03 08:27:07 AM UTC 24 |
Oct 03 08:31:27 AM UTC 24 |
103668800 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_read_seed_err.4073894695 |
|
|
Oct 03 08:31:03 AM UTC 24 |
Oct 03 08:31:28 AM UTC 24 |
15061400 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_lcmgr_intg.3102027332 |
|
|
Oct 03 08:31:00 AM UTC 24 |
Oct 03 08:31:30 AM UTC 24 |
45886100 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_alert_test.2008358654 |
|
|
Oct 03 08:31:12 AM UTC 24 |
Oct 03 08:31:34 AM UTC 24 |
139251900 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_sec_otp.322415276 |
|
|
Oct 03 08:29:21 AM UTC 24 |
Oct 03 08:31:44 AM UTC 24 |
12200401600 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_wo.974573731 |
|
|
Oct 03 08:29:38 AM UTC 24 |
Oct 03 08:32:01 AM UTC 24 |
3364062800 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_otp_reset.1329252271 |
|
|
Oct 03 08:29:24 AM UTC 24 |
Oct 03 08:32:13 AM UTC 24 |
73491100 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_prog_rma_wipe_err.1281808527 |
|
|
Oct 03 08:27:00 AM UTC 24 |
Oct 03 08:32:18 AM UTC 24 |
10012513600 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_sec_info_access.500857288 |
|
|
Oct 03 08:30:36 AM UTC 24 |
Oct 03 08:32:27 AM UTC 24 |
10838851700 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_error_prog_win.3159234832 |
|
|
Oct 03 08:07:20 AM UTC 24 |
Oct 03 08:32:32 AM UTC 24 |
792647600 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd.2594178483 |
|
|
Oct 03 08:29:57 AM UTC 24 |
Oct 03 08:32:33 AM UTC 24 |
1301829600 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_smoke.2278867044 |
|
|
Oct 03 08:29:18 AM UTC 24 |
Oct 03 08:32:51 AM UTC 24 |
23472200 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_prog_rma_wipe_err.3705869248 |
|
|
Oct 03 08:31:04 AM UTC 24 |
Oct 03 08:32:59 AM UTC 24 |
10012366900 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_sec_otp.3682242705 |
|
|
Oct 03 08:31:22 AM UTC 24 |
Oct 03 08:32:59 AM UTC 24 |
4602017700 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict.467971943 |
|
|
Oct 03 08:32:19 AM UTC 24 |
Oct 03 08:33:00 AM UTC 24 |
153378300 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_invalid_op.4116027103 |
|
|
Oct 03 08:31:28 AM UTC 24 |
Oct 03 08:33:05 AM UTC 24 |
10632094200 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_disable.2163384893 |
|
|
Oct 03 08:32:34 AM UTC 24 |
Oct 03 08:33:08 AM UTC 24 |
30987200 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_ro.28513424 |
|
|
Oct 03 08:31:31 AM UTC 24 |
Oct 03 08:33:08 AM UTC 24 |
3876521500 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_full_mem_access.2972019289 |
|
|
Oct 03 07:44:20 AM UTC 24 |
Oct 03 08:33:14 AM UTC 24 |
324267243600 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_rma_reset.884950857 |
|
|
Oct 03 08:18:30 AM UTC 24 |
Oct 03 08:33:15 AM UTC 24 |
90154429200 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw.634500483 |
|
|
Oct 03 08:25:20 AM UTC 24 |
Oct 03 08:33:17 AM UTC 24 |
4837935700 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict_all_en.2880741749 |
|
|
Oct 03 08:32:28 AM UTC 24 |
Oct 03 08:33:20 AM UTC 24 |
29923900 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_phy_arb.1687910561 |
|
|
Oct 03 08:23:00 AM UTC 24 |
Oct 03 08:33:20 AM UTC 24 |
90607400 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_lcmgr_intg.984371085 |
|
|
Oct 03 08:33:00 AM UTC 24 |
Oct 03 08:33:22 AM UTC 24 |
26863900 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_re_evict.180153543 |
|
|
Oct 03 08:32:33 AM UTC 24 |
Oct 03 08:33:24 AM UTC 24 |
277183000 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_connect.397143911 |
|
|
Oct 03 08:32:59 AM UTC 24 |
Oct 03 08:33:25 AM UTC 24 |
56257900 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_read_seed_err.2657682887 |
|
|
Oct 03 08:33:00 AM UTC 24 |
Oct 03 08:33:29 AM UTC 24 |
15310100 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_alert_test.3081115348 |
|
|
Oct 03 08:33:09 AM UTC 24 |
Oct 03 08:33:30 AM UTC 24 |
31434500 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_mp_regions.1043032694 |
|
|
Oct 03 08:25:11 AM UTC 24 |
Oct 03 08:33:31 AM UTC 24 |
7755154000 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_smoke.2825748951 |
|
|
Oct 03 08:31:15 AM UTC 24 |
Oct 03 08:34:00 AM UTC 24 |
28105800 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rand_ops.4138542462 |
|
|
Oct 03 08:24:56 AM UTC 24 |
Oct 03 08:34:07 AM UTC 24 |
44079300 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd_slow_flash.2322551784 |
|
|
Oct 03 08:30:10 AM UTC 24 |
Oct 03 08:34:08 AM UTC 24 |
61724976600 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_wo.2855982826 |
|
|
Oct 03 08:31:29 AM UTC 24 |
Oct 03 08:34:15 AM UTC 24 |
1525924600 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_error_prog_win.1840340923 |
|
|
Oct 03 08:10:40 AM UTC 24 |
Oct 03 08:34:24 AM UTC 24 |
831306600 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd_slow_flash.3511339132 |
|
|
Oct 03 08:32:02 AM UTC 24 |
Oct 03 08:34:26 AM UTC 24 |
19434899900 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_sec_info_access.2074310429 |
|
|
Oct 03 08:32:52 AM UTC 24 |
Oct 03 08:34:27 AM UTC 24 |
2995670300 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_prog_reset.2728891665 |
|
|
Oct 03 08:34:08 AM UTC 24 |
Oct 03 08:34:28 AM UTC 24 |
27429300 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_otp_reset.994086013 |
|
|
Oct 03 08:31:26 AM UTC 24 |
Oct 03 08:34:31 AM UTC 24 |
379083900 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_mp_regions.1935241005 |
|
|
Oct 03 08:31:28 AM UTC 24 |
Oct 03 08:34:44 AM UTC 24 |
1816381700 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_connect.39429619 |
|
|
Oct 03 08:34:29 AM UTC 24 |
Oct 03 08:34:49 AM UTC 24 |
13464000 ps |
| T340 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw_evict.15937201 |
|
|
Oct 03 08:34:08 AM UTC 24 |
Oct 03 08:34:50 AM UTC 24 |
123097600 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_invalid_op.1269072798 |
|
|
Oct 03 08:33:25 AM UTC 24 |
Oct 03 08:34:54 AM UTC 24 |
5494347400 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_lcmgr_intg.3853968384 |
|
|
Oct 03 08:34:32 AM UTC 24 |
Oct 03 08:34:55 AM UTC 24 |
20662000 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_prog_reset.558152440 |
|
|
Oct 03 08:32:13 AM UTC 24 |
Oct 03 08:35:03 AM UTC 24 |
3808657800 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_disable.3597860579 |
|
|
Oct 03 08:34:27 AM UTC 24 |
Oct 03 08:35:04 AM UTC 24 |
23671900 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw_evict_all_en.4052091458 |
|
|
Oct 03 08:34:15 AM UTC 24 |
Oct 03 08:35:06 AM UTC 24 |
44270700 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_ro.2905032637 |
|
|
Oct 03 08:33:30 AM UTC 24 |
Oct 03 08:35:07 AM UTC 24 |
876501000 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd.1213127097 |
|
|
Oct 03 08:31:45 AM UTC 24 |
Oct 03 08:35:09 AM UTC 24 |
7098618900 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_read_seed_err.3358717111 |
|
|
Oct 03 08:34:45 AM UTC 24 |
Oct 03 08:35:11 AM UTC 24 |
16318600 ps |
| T154 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_mp_regions.2723594178 |
|
|
Oct 03 08:29:26 AM UTC 24 |
Oct 03 08:35:12 AM UTC 24 |
16186424700 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_alert_test.3175307780 |
|
|
Oct 03 08:34:51 AM UTC 24 |
Oct 03 08:35:15 AM UTC 24 |
134175800 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_re_evict.1367462776 |
|
|
Oct 03 08:34:24 AM UTC 24 |
Oct 03 08:35:17 AM UTC 24 |
440902500 ps |
| T274 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_error_mp.117166395 |
|
|
Oct 03 07:38:46 AM UTC 24 |
Oct 03 08:35:20 AM UTC 24 |
8878996900 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_phy_arb.1390824949 |
|
|
Oct 03 08:31:17 AM UTC 24 |
Oct 03 08:35:35 AM UTC 24 |
717329400 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_connect.3924041656 |
|
|
Oct 03 08:35:18 AM UTC 24 |
Oct 03 08:35:47 AM UTC 24 |
57069800 ps |
| T267 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_prog_rma_wipe_err.1396522685 |
|
|
Oct 03 08:33:06 AM UTC 24 |
Oct 03 08:35:47 AM UTC 24 |
10014970000 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_alert_test.1087127684 |
|
|
Oct 03 08:35:21 AM UTC 24 |
Oct 03 08:35:47 AM UTC 24 |
30960700 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict_all_en.3181155865 |
|
|
Oct 03 08:35:12 AM UTC 24 |
Oct 03 08:35:48 AM UTC 24 |
42993700 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_disable.4269387009 |
|
|
Oct 03 08:35:14 AM UTC 24 |
Oct 03 08:35:52 AM UTC 24 |
13074000 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_prog_rma_wipe_err.1977030701 |
|
|
Oct 03 08:34:50 AM UTC 24 |
Oct 03 08:36:05 AM UTC 24 |
10068501200 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict.2171663436 |
|
|
Oct 03 08:35:10 AM UTC 24 |
Oct 03 08:36:13 AM UTC 24 |
81347200 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_prog_reset.1391831069 |
|
|
Oct 03 08:35:53 AM UTC 24 |
Oct 03 08:36:17 AM UTC 24 |
19799700 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_otp_reset.4024267748 |
|
|
Oct 03 08:33:23 AM UTC 24 |
Oct 03 08:36:23 AM UTC 24 |
153530500 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_sec_info_access.3253718228 |
|
|
Oct 03 08:35:16 AM UTC 24 |
Oct 03 08:36:28 AM UTC 24 |
1634285800 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_sec_info_access.3935703399 |
|
|
Oct 03 08:34:28 AM UTC 24 |
Oct 03 08:36:34 AM UTC 24 |
16726507900 ps |
| T297 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rand_ops.1872885583 |
|
|
Oct 03 08:16:31 AM UTC 24 |
Oct 03 08:36:42 AM UTC 24 |
6395431100 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_wo.2377735314 |
|
|
Oct 03 08:33:26 AM UTC 24 |
Oct 03 08:36:55 AM UTC 24 |
4748132700 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_connect.2468499277 |
|
|
Oct 03 08:36:29 AM UTC 24 |
Oct 03 08:36:55 AM UTC 24 |
14788600 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_disable.4179771433 |
|
|
Oct 03 08:36:18 AM UTC 24 |
Oct 03 08:36:56 AM UTC 24 |
16495000 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_smoke.2454234116 |
|
|
Oct 03 08:33:09 AM UTC 24 |
Oct 03 08:36:58 AM UTC 24 |
87694500 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd.2982109815 |
|
|
Oct 03 08:33:32 AM UTC 24 |
Oct 03 08:36:59 AM UTC 24 |
4750793000 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_alert_test.1078995710 |
|
|
Oct 03 08:36:35 AM UTC 24 |
Oct 03 08:37:01 AM UTC 24 |
37446200 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_rw_evict.610011980 |
|
|
Oct 03 08:36:06 AM UTC 24 |
Oct 03 08:37:02 AM UTC 24 |
284540100 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw.850954928 |
|
|
Oct 03 08:27:50 AM UTC 24 |
Oct 03 08:37:03 AM UTC 24 |
13137472200 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_error_mp.2989159040 |
|
|
Oct 03 07:40:55 AM UTC 24 |
Oct 03 08:37:07 AM UTC 24 |
11437204300 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_phy_arb.301686098 |
|
|
Oct 03 08:29:19 AM UTC 24 |
Oct 03 08:37:16 AM UTC 24 |
155461600 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_full_mem_access.2958520567 |
|
|
Oct 03 07:49:34 AM UTC 24 |
Oct 03 08:37:16 AM UTC 24 |
847621816500 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd_slow_flash.2629834752 |
|
|
Oct 03 08:34:01 AM UTC 24 |
Oct 03 08:37:17 AM UTC 24 |
5952954900 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_rw_evict_all_en.797502535 |
|
|
Oct 03 08:36:14 AM UTC 24 |
Oct 03 08:37:19 AM UTC 24 |
42780800 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rand_ops.4232008347 |
|
|
Oct 03 08:27:05 AM UTC 24 |
Oct 03 08:37:26 AM UTC 24 |
82233700 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_rma_reset.3981769480 |
|
|
Oct 03 08:20:47 AM UTC 24 |
Oct 03 08:37:31 AM UTC 24 |
180184873500 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd_slow_flash.3961393710 |
|
|
Oct 03 08:35:07 AM UTC 24 |
Oct 03 08:37:36 AM UTC 24 |
6065626200 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_smoke.411758642 |
|
|
Oct 03 08:34:55 AM UTC 24 |
Oct 03 08:37:39 AM UTC 24 |
26925000 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw.1530404930 |
|
|
Oct 03 08:29:40 AM UTC 24 |
Oct 03 08:37:39 AM UTC 24 |
3635135800 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_disable.1508474052 |
|
|
Oct 03 08:37:04 AM UTC 24 |
Oct 03 08:37:40 AM UTC 24 |
12305100 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_hw_sec_otp.95201129 |
|
|
Oct 03 08:34:55 AM UTC 24 |
Oct 03 08:37:41 AM UTC 24 |
7921098000 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_otp_reset.400525440 |
|
|
Oct 03 08:35:05 AM UTC 24 |
Oct 03 08:37:41 AM UTC 24 |
420050900 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_rma_reset.4211268005 |
|
|
Oct 03 08:23:03 AM UTC 24 |
Oct 03 08:37:42 AM UTC 24 |
40127001400 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_alert_test.778400113 |
|
|
Oct 03 08:37:25 AM UTC 24 |
Oct 03 08:37:42 AM UTC 24 |
149116300 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_sec_otp.1380682564 |
|
|
Oct 03 08:33:22 AM UTC 24 |
Oct 03 08:37:43 AM UTC 24 |
12022863100 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_connect.1915062781 |
|
|
Oct 03 08:37:16 AM UTC 24 |
Oct 03 08:37:44 AM UTC 24 |
29601800 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_rw_evict.1203136694 |
|
|
Oct 03 08:37:02 AM UTC 24 |
Oct 03 08:37:45 AM UTC 24 |
53139200 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_rw_evict_all_en.1498337396 |
|
|
Oct 03 08:37:03 AM UTC 24 |
Oct 03 08:37:48 AM UTC 24 |
51555000 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw.1316908473 |
|
|
Oct 03 08:31:35 AM UTC 24 |
Oct 03 08:37:55 AM UTC 24 |
6172505300 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_prog_reset.1600143710 |
|
|
Oct 03 08:35:08 AM UTC 24 |
Oct 03 08:37:56 AM UTC 24 |
7378983700 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_sec_info_access.3102350914 |
|
|
Oct 03 08:36:23 AM UTC 24 |
Oct 03 08:38:01 AM UTC 24 |
1330206600 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_alert_test.1386486074 |
|
|
Oct 03 08:37:44 AM UTC 24 |
Oct 03 08:38:02 AM UTC 24 |
333192600 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_hw_sec_otp.741449913 |
|
|
Oct 03 08:35:48 AM UTC 24 |
Oct 03 08:38:05 AM UTC 24 |
2807017800 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_intr_rd.1520303155 |
|
|
Oct 03 08:35:48 AM UTC 24 |
Oct 03 08:38:07 AM UTC 24 |
3920830300 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_disable.3923813954 |
|
|
Oct 03 08:37:41 AM UTC 24 |
Oct 03 08:38:13 AM UTC 24 |
12759000 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_connect.3685721172 |
|
|
Oct 03 08:37:43 AM UTC 24 |
Oct 03 08:38:13 AM UTC 24 |
14441700 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict.2639039183 |
|
|
Oct 03 08:37:40 AM UTC 24 |
Oct 03 08:38:14 AM UTC 24 |
46586000 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict_all_en.3452063901 |
|
|
Oct 03 08:37:41 AM UTC 24 |
Oct 03 08:38:16 AM UTC 24 |
43750700 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_prog_reset.350909227 |
|
|
Oct 03 08:37:01 AM UTC 24 |
Oct 03 08:38:24 AM UTC 24 |
1306046100 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_connect.3648848611 |
|
|
Oct 03 08:38:13 AM UTC 24 |
Oct 03 08:38:32 AM UTC 24 |
13783500 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_smoke.2468034988 |
|
|
Oct 03 08:35:36 AM UTC 24 |
Oct 03 08:38:33 AM UTC 24 |
45552200 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_intr_rd_slow_flash.3469493672 |
|
|
Oct 03 08:35:49 AM UTC 24 |
Oct 03 08:38:34 AM UTC 24 |
5921095600 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_disable.248233029 |
|
|
Oct 03 08:38:06 AM UTC 24 |
Oct 03 08:38:38 AM UTC 24 |
31708800 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_alert_test.1698439104 |
|
|
Oct 03 08:38:14 AM UTC 24 |
Oct 03 08:38:38 AM UTC 24 |
55206500 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_rw_evict.899135638 |
|
|
Oct 03 08:38:02 AM UTC 24 |
Oct 03 08:38:41 AM UTC 24 |
32958600 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_rw_evict_all_en.3088660198 |
|
|
Oct 03 08:38:03 AM UTC 24 |
Oct 03 08:38:44 AM UTC 24 |
74235700 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_sec_info_access.910155678 |
|
|
Oct 03 08:37:08 AM UTC 24 |
Oct 03 08:38:50 AM UTC 24 |
3910061200 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_otp_reset.4014401268 |
|
|
Oct 03 08:35:48 AM UTC 24 |
Oct 03 08:38:53 AM UTC 24 |
93167200 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd.1787533155 |
|
|
Oct 03 08:35:05 AM UTC 24 |
Oct 03 08:39:05 AM UTC 24 |
2114165300 ps |
| T296 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_hw_sec_otp.2403333991 |
|
|
Oct 03 08:36:55 AM UTC 24 |
Oct 03 08:39:06 AM UTC 24 |
13561786200 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_prog_reset.553161757 |
|
|
Oct 03 08:38:35 AM UTC 24 |
Oct 03 08:39:06 AM UTC 24 |
83251500 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_smoke.190347346 |
|
|
Oct 03 08:36:43 AM UTC 24 |
Oct 03 08:39:07 AM UTC 24 |
34807200 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_disable.2201210154 |
|
|
Oct 03 08:38:41 AM UTC 24 |
Oct 03 08:39:08 AM UTC 24 |
17141600 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_alert_test.2389890078 |
|
|
Oct 03 08:38:54 AM UTC 24 |
Oct 03 08:39:15 AM UTC 24 |
103841800 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_connect.3556058004 |
|
|
Oct 03 08:38:52 AM UTC 24 |
Oct 03 08:39:18 AM UTC 24 |
23232800 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_intr_rd.1060942838 |
|
|
Oct 03 08:36:57 AM UTC 24 |
Oct 03 08:39:19 AM UTC 24 |
1266557700 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_rw_evict_all_en.3997272778 |
|
|
Oct 03 08:38:39 AM UTC 24 |
Oct 03 08:39:21 AM UTC 24 |
59043800 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_sec_info_access.2182094831 |
|
|
Oct 03 08:37:43 AM UTC 24 |
Oct 03 08:39:21 AM UTC 24 |
1128233600 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_sec_info_access.1465769348 |
|
|
Oct 03 08:38:08 AM UTC 24 |
Oct 03 08:39:24 AM UTC 24 |
1544219800 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_rw_evict.2183269824 |
|
|
Oct 03 08:38:39 AM UTC 24 |
Oct 03 08:39:25 AM UTC 24 |
73697200 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_prog_reset.2886526371 |
|
|
Oct 03 08:39:16 AM UTC 24 |
Oct 03 08:39:36 AM UTC 24 |
40646900 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_sec_info_access.2882017108 |
|
|
Oct 03 08:38:45 AM UTC 24 |
Oct 03 08:39:45 AM UTC 24 |
385707100 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_otp_reset.4098614348 |
|
|
Oct 03 08:36:56 AM UTC 24 |
Oct 03 08:39:51 AM UTC 24 |
135763200 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_rma_reset.3249264885 |
|
|
Oct 03 08:25:02 AM UTC 24 |
Oct 03 08:39:51 AM UTC 24 |
140169020700 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_alert_test.1040539656 |
|
|
Oct 03 08:39:27 AM UTC 24 |
Oct 03 08:39:52 AM UTC 24 |
66637400 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_hw_sec_otp.4270616633 |
|
|
Oct 03 08:37:25 AM UTC 24 |
Oct 03 08:39:53 AM UTC 24 |
4321723700 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_connect.3898765743 |
|
|
Oct 03 08:39:25 AM UTC 24 |
Oct 03 08:39:54 AM UTC 24 |
23249200 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_rw_evict_all_en.4239107861 |
|
|
Oct 03 08:39:20 AM UTC 24 |
Oct 03 08:40:01 AM UTC 24 |
79910400 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_disable.1718087731 |
|
|
Oct 03 08:39:21 AM UTC 24 |
Oct 03 08:40:05 AM UTC 24 |
35896400 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_hw_sec_otp.3356290728 |
|
|
Oct 03 08:38:17 AM UTC 24 |
Oct 03 08:40:12 AM UTC 24 |
2688812600 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_rw_evict.3089314656 |
|
|
Oct 03 08:39:19 AM UTC 24 |
Oct 03 08:40:17 AM UTC 24 |
70334100 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_smoke.3770869054 |
|
|
Oct 03 08:37:45 AM UTC 24 |
Oct 03 08:40:18 AM UTC 24 |
69392100 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_intr_rd.1218586296 |
|
|
Oct 03 08:38:33 AM UTC 24 |
Oct 03 08:40:43 AM UTC 24 |
1901440900 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rand_ops.1811187715 |
|
|
Oct 03 08:29:18 AM UTC 24 |
Oct 03 08:40:25 AM UTC 24 |
3051505000 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_alert_test.435744686 |
|
|
Oct 03 08:40:19 AM UTC 24 |
Oct 03 08:40:38 AM UTC 24 |
93468100 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_disable.2729890039 |
|
|
Oct 03 08:40:07 AM UTC 24 |
Oct 03 08:40:39 AM UTC 24 |
12792000 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_rw_evict.2581345973 |
|
|
Oct 03 08:39:56 AM UTC 24 |
Oct 03 08:40:39 AM UTC 24 |
28097500 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_rw_evict_all_en.2403871337 |
|
|
Oct 03 08:40:02 AM UTC 24 |
Oct 03 08:40:40 AM UTC 24 |
28057400 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_connect.972426112 |
|
|
Oct 03 08:40:18 AM UTC 24 |
Oct 03 08:40:46 AM UTC 24 |
16022100 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_otp_reset.2629649151 |
|
|
Oct 03 08:37:27 AM UTC 24 |
Oct 03 08:40:49 AM UTC 24 |
41832900 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_sec_info_access.1581599080 |
|
|
Oct 03 08:39:22 AM UTC 24 |
Oct 03 08:40:50 AM UTC 24 |
1179708600 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_prog_reset.324522523 |
|
|
Oct 03 08:37:40 AM UTC 24 |
Oct 03 08:40:56 AM UTC 24 |
7581143900 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_rma_reset.1630935817 |
|
|
Oct 03 08:27:08 AM UTC 24 |
Oct 03 08:41:00 AM UTC 24 |
160171763000 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_hw_sec_otp.407337418 |
|
|
Oct 03 08:39:07 AM UTC 24 |
Oct 03 08:41:14 AM UTC 24 |
54602331200 ps |
| T316 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_intr_rd_slow_flash.276872600 |
|
|
Oct 03 08:37:37 AM UTC 24 |
Oct 03 08:41:20 AM UTC 24 |
13191619600 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_connect.4219543541 |
|
|
Oct 03 08:40:55 AM UTC 24 |
Oct 03 08:41:22 AM UTC 24 |
24891300 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_disable.2869587608 |
|
|
Oct 03 08:40:51 AM UTC 24 |
Oct 03 08:41:23 AM UTC 24 |
11988500 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_prog_reset.3338195812 |
|
|
Oct 03 08:37:57 AM UTC 24 |
Oct 03 08:41:25 AM UTC 24 |
11425069800 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_smoke.2523319661 |
|
|
Oct 03 08:37:25 AM UTC 24 |
Oct 03 08:41:25 AM UTC 24 |
51216500 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_rw_evict.1744793775 |
|
|
Oct 03 08:40:44 AM UTC 24 |
Oct 03 08:41:25 AM UTC 24 |
30217800 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_alert_test.1441470802 |
|
|
Oct 03 08:40:57 AM UTC 24 |
Oct 03 08:41:27 AM UTC 24 |
316324100 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_otp_reset.2193810607 |
|
|
Oct 03 08:38:26 AM UTC 24 |
Oct 03 08:41:28 AM UTC 24 |
63680200 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_intr_rd.3228295755 |
|
|
Oct 03 08:37:48 AM UTC 24 |
Oct 03 08:41:37 AM UTC 24 |
6895041700 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_phy_arb.1356670975 |
|
|
Oct 03 08:33:22 AM UTC 24 |
Oct 03 08:41:38 AM UTC 24 |
1371608900 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_rw_evict_all_en.2036784077 |
|
|
Oct 03 08:40:46 AM UTC 24 |
Oct 03 08:41:43 AM UTC 24 |
39415500 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_otp_reset.2558431941 |
|
|
Oct 03 08:39:07 AM UTC 24 |
Oct 03 08:41:47 AM UTC 24 |
39015200 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_intr_rd_slow_flash.4131736464 |
|
|
Oct 03 08:36:58 AM UTC 24 |
Oct 03 08:41:48 AM UTC 24 |
23294001600 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw.888216328 |
|
|
Oct 03 08:33:32 AM UTC 24 |
Oct 03 08:41:49 AM UTC 24 |
13812774800 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_prog_reset.2040135856 |
|
|
Oct 03 08:41:26 AM UTC 24 |
Oct 03 08:41:49 AM UTC 24 |
30414200 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_10_02/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_otp_reset.2175609562 |
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|
Oct 03 08:37:46 AM UTC 24 |
Oct 03 08:41:53 AM UTC 24 |
135001600 ps |