e3ca274e77
Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
---|---|---|---|---|---|---|---|
V1 | wake_up | aes_wake_up | 0 | 1 | 0.00 | ||
V1 | smoke | aes_smoke | 0 | 50 | 0.00 | ||
V1 | csr_hw_reset | aes_csr_hw_reset | 4.000s | 150.951us | 5 | 5 | 100.00 |
V1 | csr_rw | aes_csr_rw | 5.000s | 59.905us | 20 | 20 | 100.00 |
V1 | csr_bit_bash | aes_csr_bit_bash | 13.000s | 3.210ms | 5 | 5 | 100.00 |
V1 | csr_aliasing | aes_csr_aliasing | 5.000s | 622.276us | 5 | 5 | 100.00 |
V1 | csr_mem_rw_with_rand_reset | aes_csr_mem_rw_with_rand_reset | 6.000s | 324.785us | 20 | 20 | 100.00 |
V1 | regwen_csr_and_corresponding_lockable_csr | aes_csr_rw | 5.000s | 59.905us | 20 | 20 | 100.00 |
aes_csr_aliasing | 5.000s | 622.276us | 5 | 5 | 100.00 | ||
V1 | TOTAL | 55 | 106 | 51.89 | |||
V2 | algorithm | aes_smoke | 0 | 50 | 0.00 | ||
aes_config_error | 0 | 50 | 0.00 | ||||
aes_stress | 0 | 50 | 0.00 | ||||
V2 | key_length | aes_smoke | 0 | 50 | 0.00 | ||
aes_config_error | 0 | 50 | 0.00 | ||||
aes_stress | 0 | 50 | 0.00 | ||||
V2 | back2back | aes_stress | 0 | 50 | 0.00 | ||
aes_b2b | 0 | 50 | 0.00 | ||||
V2 | backpressure | aes_stress | 0 | 50 | 0.00 | ||
V2 | multi_message | aes_smoke | 0 | 50 | 0.00 | ||
aes_config_error | 0 | 50 | 0.00 | ||||
aes_stress | 0 | 50 | 0.00 | ||||
aes_alert_reset | 0 | 50 | 0.00 | ||||
V2 | failure_test | aes_man_cfg_err | 0 | 50 | 0.00 | ||
aes_config_error | 0 | 50 | 0.00 | ||||
aes_alert_reset | 0 | 50 | 0.00 | ||||
V2 | trigger_clear_test | aes_clear | 0 | 50 | 0.00 | ||
V2 | nist_test_vectors | aes_nist_vectors | 0 | 1 | 0.00 | ||
V2 | reset_recovery | aes_alert_reset | 0 | 50 | 0.00 | ||
V2 | stress | aes_stress | 0 | 50 | 0.00 | ||
V2 | sideload | aes_stress | 0 | 50 | 0.00 | ||
aes_sideload | 0 | 50 | 0.00 | ||||
V2 | deinitialization | aes_deinit | 0 | 50 | 0.00 | ||
V2 | stress_all | aes_stress_all | 0 | 10 | 0.00 | ||
V2 | alert_test | aes_alert_test | 0 | 50 | 0.00 | ||
V2 | tl_d_oob_addr_access | aes_tl_errors | 6.000s | 82.587us | 20 | 20 | 100.00 |
V2 | tl_d_illegal_access | aes_tl_errors | 6.000s | 82.587us | 20 | 20 | 100.00 |
V2 | tl_d_outstanding_access | aes_csr_hw_reset | 4.000s | 150.951us | 5 | 5 | 100.00 |
aes_csr_rw | 5.000s | 59.905us | 20 | 20 | 100.00 | ||
aes_csr_aliasing | 5.000s | 622.276us | 5 | 5 | 100.00 | ||
aes_same_csr_outstanding | 10.000s | 89.075us | 20 | 20 | 100.00 | ||
V2 | tl_d_partial_access | aes_csr_hw_reset | 4.000s | 150.951us | 5 | 5 | 100.00 |
aes_csr_rw | 5.000s | 59.905us | 20 | 20 | 100.00 | ||
aes_csr_aliasing | 5.000s | 622.276us | 5 | 5 | 100.00 | ||
aes_same_csr_outstanding | 10.000s | 89.075us | 20 | 20 | 100.00 | ||
V2 | TOTAL | 40 | 501 | 7.98 | |||
V2S | reseeding | aes_reseed | 0 | 50 | 0.00 | ||
V2S | fault_inject | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
V2S | shadow_reg_update_error | aes_shadow_reg_errors | 6.000s | 120.788us | 20 | 20 | 100.00 |
V2S | shadow_reg_read_clear_staged_value | aes_shadow_reg_errors | 6.000s | 120.788us | 20 | 20 | 100.00 |
V2S | shadow_reg_storage_error | aes_shadow_reg_errors | 6.000s | 120.788us | 20 | 20 | 100.00 |
V2S | shadowed_reset_glitch | aes_shadow_reg_errors | 6.000s | 120.788us | 20 | 20 | 100.00 |
V2S | shadow_reg_update_error_with_csr_rw | aes_shadow_reg_errors_with_csr_rw | 5.000s | 101.028us | 20 | 20 | 100.00 |
V2S | tl_intg_err | aes_sec_cm | 0 | 5 | 0.00 | ||
aes_tl_intg_err | 6.000s | 158.288us | 20 | 20 | 100.00 | ||
V2S | sec_cm_bus_integrity | aes_tl_intg_err | 6.000s | 158.288us | 20 | 20 | 100.00 |
V2S | sec_cm_lc_escalate_en_intersig_mubi | aes_alert_reset | 0 | 50 | 0.00 | ||
V2S | sec_cm_main_config_shadow | aes_shadow_reg_errors | 6.000s | 120.788us | 20 | 20 | 100.00 |
V2S | sec_cm_main_config_sparse | aes_smoke | 0 | 50 | 0.00 | ||
aes_stress | 0 | 50 | 0.00 | ||||
aes_alert_reset | 0 | 50 | 0.00 | ||||
aes_core_fi | 0 | 70 | 0.00 | ||||
V2S | sec_cm_aux_config_shadow | aes_shadow_reg_errors | 6.000s | 120.788us | 20 | 20 | 100.00 |
V2S | sec_cm_aux_config_regwen | aes_readability | 0 | 50 | 0.00 | ||
aes_stress | 0 | 50 | 0.00 | ||||
V2S | sec_cm_key_sideload | aes_stress | 0 | 50 | 0.00 | ||
aes_sideload | 0 | 50 | 0.00 | ||||
V2S | sec_cm_key_sw_unreadable | aes_readability | 0 | 50 | 0.00 | ||
V2S | sec_cm_data_reg_sw_unreadable | aes_readability | 0 | 50 | 0.00 | ||
V2S | sec_cm_key_sec_wipe | aes_readability | 0 | 50 | 0.00 | ||
V2S | sec_cm_iv_config_sec_wipe | aes_readability | 0 | 50 | 0.00 | ||
V2S | sec_cm_data_reg_sec_wipe | aes_readability | 0 | 50 | 0.00 | ||
V2S | sec_cm_data_reg_key_sca | aes_stress | 0 | 50 | 0.00 | ||
V2S | sec_cm_key_masking | aes_stress | 0 | 50 | 0.00 | ||
V2S | sec_cm_main_fsm_sparse | aes_fi | 0 | 50 | 0.00 | ||
V2S | sec_cm_main_fsm_redun | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_cipher_fsm_sparse | aes_fi | 0 | 50 | 0.00 | ||
V2S | sec_cm_cipher_fsm_redun | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
V2S | sec_cm_cipher_ctr_redun | aes_cipher_fi | 0 | 350 | 0.00 | ||
V2S | sec_cm_ctr_fsm_sparse | aes_fi | 0 | 50 | 0.00 | ||
V2S | sec_cm_ctr_fsm_redun | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_ctrl_sparse | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_main_fsm_global_esc | aes_alert_reset | 0 | 50 | 0.00 | ||
V2S | sec_cm_main_fsm_local_esc | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_cipher_fsm_local_esc | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_ctr_fsm_local_esc | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_data_reg_local_esc | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
V2S | TOTAL | 60 | 985 | 6.09 | |||
V3 | stress_all_with_rand_reset | aes_stress_all_with_rand_reset | 0 | 10 | 0.00 | ||
V3 | TOTAL | 0 | 10 | 0.00 | |||
TOTAL | 155 | 1602 | 9.68 |
Items | Total | Written | Passing | Progress |
---|---|---|---|---|
V1 | 7 | 7 | 5 | 71.43 |
V2 | 13 | 13 | 2 | 15.38 |
V2S | 11 | 11 | 3 | 27.27 |
V3 | 1 | 1 | 0 | 0.00 |
Score | Block | Branch | Statement | Expression | Toggle | Fsm | Assertion | CoverGroup |
---|---|---|---|---|---|---|---|---|
84.10 | 99.63 | 98.89 | 100.00 | 99.74 | 44.47 | -- | 98.03 | 43.64 |
launch_task.returncode != *, err: * *:*:* * lswatcher.go:*] Failed to connect to Watcher service in the Envelope (you probably need to import _ "google3/tech/env/go/envelope"): generic::unimplemented: envrpc: no envelope available for service "chubby.googleapis.com" Failure to submit jobs: rpc error: code = Unavailable desc = error reading from server: read tcp *.*:*->*.*:*: read: connection reset by peer
has 724 failures:
Test aes_wake_up has 1 failures.
Test aes_deinit has 28 failures.
0.aes_deinit.2868136218909479090649670731825978910067388995019027694541760711504560838589
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/0.aes_deinit/latest/run.log
1.aes_deinit.104043499446679620970727394884873979411657035520326287447522095602739295685548
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/1.aes_deinit/latest/run.log
... and 26 more failures.
Test aes_readability has 28 failures.
0.aes_readability.30684085782079237985913654540862444462781865907669958027496971259010964522176
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/0.aes_readability/latest/run.log
1.aes_readability.6100281538282738338099612937162693195153693644347902958177478689641566112503
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/1.aes_readability/latest/run.log
... and 26 more failures.
Test aes_config_error has 28 failures.
0.aes_config_error.54841623036862717345508535016406504711239327411111221617241104942348461133142
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/0.aes_config_error/latest/run.log
1.aes_config_error.42592637662696847097178500535445675329508100037648270605004039795325369617967
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/1.aes_config_error/latest/run.log
... and 26 more failures.
Test aes_b2b has 28 failures.
0.aes_b2b.107326100014083630207770657109187122975772247094885363216043375766019015304200
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/0.aes_b2b/latest/run.log
1.aes_b2b.3552795069835233510068621023103227306165782622627964280680048386836141745370
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/1.aes_b2b/latest/run.log
... and 26 more failures.
... and 16 more tests.
Job killed most likely because its dependent job failed.
has 723 failures:
Test aes_nist_vectors has 1 failures.
Test aes_man_cfg_err has 28 failures.
0.aes_man_cfg_err.49149939977166965083136298218386202690135926730008264355187220884667158835054
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/0.aes_man_cfg_err/latest/run.log
1.aes_man_cfg_err.22896913867889202748546128926012177676196630918929507809373551255788291814955
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/1.aes_man_cfg_err/latest/run.log
... and 26 more failures.
Test aes_smoke has 28 failures.
0.aes_smoke.90848934026375138624407957457884367631876094483216556329328959625608718598041
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/0.aes_smoke/latest/run.log
1.aes_smoke.20015267114872669352376456104821278627258324778565951527899701338677772652198
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/1.aes_smoke/latest/run.log
... and 26 more failures.
Test aes_stress has 28 failures.
0.aes_stress.87765730473710229589439596704773339408396123938332723071832593827617713374959
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/0.aes_stress/latest/run.log
1.aes_stress.11527806472049123594895571410151838329724362886353490116241151647136962902669
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/1.aes_stress/latest/run.log
... and 26 more failures.
Test aes_clear has 28 failures.
0.aes_clear.66137349181577732949364566580764583081365134628719300806591264501751995687944
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/0.aes_clear/latest/run.log
1.aes_clear.56674316975176122432223265508455635353961999834410109708851741739989198655567
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/1.aes_clear/latest/run.log
... and 26 more failures.
... and 15 more tests.