8d1fda3660
Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
---|---|---|---|---|---|---|---|
V1 | wake_up | aes_wake_up | 0 | 1 | 0.00 | ||
V1 | smoke | aes_smoke | 0 | 50 | 0.00 | ||
V1 | csr_hw_reset | aes_csr_hw_reset | 4.000s | 162.665us | 5 | 5 | 100.00 |
V1 | csr_rw | aes_csr_rw | 8.000s | 100.011us | 20 | 20 | 100.00 |
V1 | csr_bit_bash | aes_csr_bit_bash | 11.000s | 1.080ms | 5 | 5 | 100.00 |
V1 | csr_aliasing | aes_csr_aliasing | 5.000s | 161.821us | 5 | 5 | 100.00 |
V1 | csr_mem_rw_with_rand_reset | aes_csr_mem_rw_with_rand_reset | 14.000s | 155.349us | 20 | 20 | 100.00 |
V1 | regwen_csr_and_corresponding_lockable_csr | aes_csr_rw | 8.000s | 100.011us | 20 | 20 | 100.00 |
aes_csr_aliasing | 5.000s | 161.821us | 5 | 5 | 100.00 | ||
V1 | TOTAL | 55 | 106 | 51.89 | |||
V2 | algorithm | aes_smoke | 0 | 50 | 0.00 | ||
aes_config_error | 0 | 50 | 0.00 | ||||
aes_stress | 0 | 50 | 0.00 | ||||
V2 | key_length | aes_smoke | 0 | 50 | 0.00 | ||
aes_config_error | 0 | 50 | 0.00 | ||||
aes_stress | 0 | 50 | 0.00 | ||||
V2 | back2back | aes_stress | 0 | 50 | 0.00 | ||
aes_b2b | 0 | 50 | 0.00 | ||||
V2 | backpressure | aes_stress | 0 | 50 | 0.00 | ||
V2 | multi_message | aes_smoke | 0 | 50 | 0.00 | ||
aes_config_error | 0 | 50 | 0.00 | ||||
aes_stress | 0 | 50 | 0.00 | ||||
aes_alert_reset | 0 | 50 | 0.00 | ||||
V2 | failure_test | aes_man_cfg_err | 0 | 50 | 0.00 | ||
aes_config_error | 0 | 50 | 0.00 | ||||
aes_alert_reset | 0 | 50 | 0.00 | ||||
V2 | trigger_clear_test | aes_clear | 0 | 50 | 0.00 | ||
V2 | nist_test_vectors | aes_nist_vectors | 0 | 1 | 0.00 | ||
V2 | reset_recovery | aes_alert_reset | 0 | 50 | 0.00 | ||
V2 | stress | aes_stress | 0 | 50 | 0.00 | ||
V2 | sideload | aes_stress | 0 | 50 | 0.00 | ||
aes_sideload | 0 | 50 | 0.00 | ||||
V2 | deinitialization | aes_deinit | 0 | 50 | 0.00 | ||
V2 | stress_all | aes_stress_all | 0 | 10 | 0.00 | ||
V2 | alert_test | aes_alert_test | 0 | 50 | 0.00 | ||
V2 | tl_d_oob_addr_access | aes_tl_errors | 7.000s | 158.964us | 20 | 20 | 100.00 |
V2 | tl_d_illegal_access | aes_tl_errors | 7.000s | 158.964us | 20 | 20 | 100.00 |
V2 | tl_d_outstanding_access | aes_csr_hw_reset | 4.000s | 162.665us | 5 | 5 | 100.00 |
aes_csr_rw | 8.000s | 100.011us | 20 | 20 | 100.00 | ||
aes_csr_aliasing | 5.000s | 161.821us | 5 | 5 | 100.00 | ||
aes_same_csr_outstanding | 5.000s | 483.274us | 20 | 20 | 100.00 | ||
V2 | tl_d_partial_access | aes_csr_hw_reset | 4.000s | 162.665us | 5 | 5 | 100.00 |
aes_csr_rw | 8.000s | 100.011us | 20 | 20 | 100.00 | ||
aes_csr_aliasing | 5.000s | 161.821us | 5 | 5 | 100.00 | ||
aes_same_csr_outstanding | 5.000s | 483.274us | 20 | 20 | 100.00 | ||
V2 | TOTAL | 40 | 501 | 7.98 | |||
V2S | reseeding | aes_reseed | 0 | 50 | 0.00 | ||
V2S | fault_inject | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
V2S | shadow_reg_update_error | aes_shadow_reg_errors | 8.000s | 91.844us | 20 | 20 | 100.00 |
V2S | shadow_reg_read_clear_staged_value | aes_shadow_reg_errors | 8.000s | 91.844us | 20 | 20 | 100.00 |
V2S | shadow_reg_storage_error | aes_shadow_reg_errors | 8.000s | 91.844us | 20 | 20 | 100.00 |
V2S | shadowed_reset_glitch | aes_shadow_reg_errors | 8.000s | 91.844us | 20 | 20 | 100.00 |
V2S | shadow_reg_update_error_with_csr_rw | aes_shadow_reg_errors_with_csr_rw | 8.000s | 64.996us | 20 | 20 | 100.00 |
V2S | tl_intg_err | aes_sec_cm | 0 | 5 | 0.00 | ||
aes_tl_intg_err | 7.000s | 167.605us | 20 | 20 | 100.00 | ||
V2S | sec_cm_bus_integrity | aes_tl_intg_err | 7.000s | 167.605us | 20 | 20 | 100.00 |
V2S | sec_cm_lc_escalate_en_intersig_mubi | aes_alert_reset | 0 | 50 | 0.00 | ||
V2S | sec_cm_main_config_shadow | aes_shadow_reg_errors | 8.000s | 91.844us | 20 | 20 | 100.00 |
V2S | sec_cm_main_config_sparse | aes_smoke | 0 | 50 | 0.00 | ||
aes_stress | 0 | 50 | 0.00 | ||||
aes_alert_reset | 0 | 50 | 0.00 | ||||
aes_core_fi | 0 | 70 | 0.00 | ||||
V2S | sec_cm_aux_config_shadow | aes_shadow_reg_errors | 8.000s | 91.844us | 20 | 20 | 100.00 |
V2S | sec_cm_aux_config_regwen | aes_readability | 0 | 50 | 0.00 | ||
aes_stress | 0 | 50 | 0.00 | ||||
V2S | sec_cm_key_sideload | aes_stress | 0 | 50 | 0.00 | ||
aes_sideload | 0 | 50 | 0.00 | ||||
V2S | sec_cm_key_sw_unreadable | aes_readability | 0 | 50 | 0.00 | ||
V2S | sec_cm_data_reg_sw_unreadable | aes_readability | 0 | 50 | 0.00 | ||
V2S | sec_cm_key_sec_wipe | aes_readability | 0 | 50 | 0.00 | ||
V2S | sec_cm_iv_config_sec_wipe | aes_readability | 0 | 50 | 0.00 | ||
V2S | sec_cm_data_reg_sec_wipe | aes_readability | 0 | 50 | 0.00 | ||
V2S | sec_cm_data_reg_key_sca | aes_stress | 0 | 50 | 0.00 | ||
V2S | sec_cm_key_masking | aes_stress | 0 | 50 | 0.00 | ||
V2S | sec_cm_main_fsm_sparse | aes_fi | 0 | 50 | 0.00 | ||
V2S | sec_cm_main_fsm_redun | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_cipher_fsm_sparse | aes_fi | 0 | 50 | 0.00 | ||
V2S | sec_cm_cipher_fsm_redun | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
V2S | sec_cm_cipher_ctr_redun | aes_cipher_fi | 0 | 350 | 0.00 | ||
V2S | sec_cm_ctr_fsm_sparse | aes_fi | 0 | 50 | 0.00 | ||
V2S | sec_cm_ctr_fsm_redun | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_ctrl_sparse | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_main_fsm_global_esc | aes_alert_reset | 0 | 50 | 0.00 | ||
V2S | sec_cm_main_fsm_local_esc | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_cipher_fsm_local_esc | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_ctr_fsm_local_esc | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_data_reg_local_esc | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
V2S | TOTAL | 60 | 985 | 6.09 | |||
V3 | stress_all_with_rand_reset | aes_stress_all_with_rand_reset | 0 | 10 | 0.00 | ||
V3 | TOTAL | 0 | 10 | 0.00 | |||
TOTAL | 155 | 1602 | 9.68 |
Items | Total | Written | Passing | Progress |
---|---|---|---|---|
V1 | 7 | 7 | 5 | 71.43 |
V2 | 13 | 13 | 2 | 15.38 |
V2S | 11 | 11 | 3 | 27.27 |
V3 | 1 | 1 | 0 | 0.00 |
Score | Block | Branch | Statement | Expression | Toggle | Fsm | Assertion | CoverGroup |
---|---|---|---|---|---|---|---|---|
83.97 | 99.38 | 98.15 | 99.87 | 99.74 | 44.47 | -- | 98.03 | 43.43 |
launch_task.returncode != *, err: * *:*:* * lswatcher.go:*] Failed to connect to Watcher service in the Envelope (you probably need to import _ "google3/tech/env/go/envelope"): generic::unimplemented: envrpc: no envelope available for service "chubby.googleapis.com" Failure to submit jobs: rpc error: code = Unavailable desc = The service is currently unavailable.
has 724 failures:
Test aes_wake_up has 1 failures.
Test aes_deinit has 28 failures.
0.aes_deinit.31290923951709017426093604741009137499386125118655690888220247288931465970471
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/0.aes_deinit/latest/run.log
1.aes_deinit.53685397027034732112898702922402408750996803120567597076377478318906409791651
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/1.aes_deinit/latest/run.log
... and 26 more failures.
Test aes_readability has 28 failures.
0.aes_readability.36178711320114940767099260012010542959976384786952213267596832520418620681311
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/0.aes_readability/latest/run.log
1.aes_readability.2482946737155403052420135549763047350819127469883278049913785947690160315593
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/1.aes_readability/latest/run.log
... and 26 more failures.
Test aes_config_error has 28 failures.
0.aes_config_error.26728618484153479488076702830517833449942325210024893024558182318633711341718
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/0.aes_config_error/latest/run.log
1.aes_config_error.56836468375894369422641839513865380921734407006276614089502574551098438306835
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/1.aes_config_error/latest/run.log
... and 26 more failures.
Test aes_b2b has 28 failures.
0.aes_b2b.72989388596127554385883583857347971985791023632102936627111910003329605569511
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/0.aes_b2b/latest/run.log
1.aes_b2b.23294049726728548083721698196120303890972232056287896419210269619002303336464
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/1.aes_b2b/latest/run.log
... and 26 more failures.
... and 16 more tests.
Job killed most likely because its dependent job failed.
has 723 failures:
Test aes_nist_vectors has 1 failures.
Test aes_man_cfg_err has 28 failures.
0.aes_man_cfg_err.7447402833482351944472071833904614397072056465643884321644962141580493217116
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/0.aes_man_cfg_err/latest/run.log
1.aes_man_cfg_err.73766249452702245743504809128427181276748587788074076224264934230217042257837
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/1.aes_man_cfg_err/latest/run.log
... and 26 more failures.
Test aes_smoke has 28 failures.
0.aes_smoke.109790217978038869619229455100110380929191028282295042679770602498495615058030
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/0.aes_smoke/latest/run.log
1.aes_smoke.59023632193879393229131460256359026264441376431538364599549251426564932063280
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/1.aes_smoke/latest/run.log
... and 26 more failures.
Test aes_stress has 28 failures.
0.aes_stress.46384282085018179578081682215164639356562131425220297420222158438605835505452
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/0.aes_stress/latest/run.log
1.aes_stress.86056334034968442588428742469664264556365482284228474539065686124135600269163
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/1.aes_stress/latest/run.log
... and 26 more failures.
Test aes_clear has 28 failures.
0.aes_clear.114833958902182235699140104190416441780184377750527405728011071626957821430739
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/0.aes_clear/latest/run.log
1.aes_clear.11466979787644037845852489944586765605775901703928090619129962130956048849179
Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/1.aes_clear/latest/run.log
... and 26 more failures.
... and 15 more tests.