b938dde05c
Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
---|---|---|---|---|---|---|---|
V1 | wake_up | aes_wake_up | 0 | 1 | 0.00 | ||
V1 | smoke | aes_smoke | 0 | 50 | 0.00 | ||
V1 | csr_hw_reset | aes_csr_hw_reset | 4.000s | 68.060us | 5 | 5 | 100.00 |
V1 | csr_rw | aes_csr_rw | 4.000s | 229.250us | 20 | 20 | 100.00 |
V1 | csr_bit_bash | aes_csr_bit_bash | 9.000s | 508.060us | 5 | 5 | 100.00 |
V1 | csr_aliasing | aes_csr_aliasing | 5.000s | 67.699us | 5 | 5 | 100.00 |
V1 | csr_mem_rw_with_rand_reset | aes_csr_mem_rw_with_rand_reset | 4.000s | 88.840us | 20 | 20 | 100.00 |
V1 | regwen_csr_and_corresponding_lockable_csr | aes_csr_rw | 4.000s | 229.250us | 20 | 20 | 100.00 |
aes_csr_aliasing | 5.000s | 67.699us | 5 | 5 | 100.00 | ||
V1 | TOTAL | 55 | 106 | 51.89 | |||
V2 | algorithm | aes_smoke | 0 | 50 | 0.00 | ||
aes_config_error | 0 | 50 | 0.00 | ||||
aes_stress | 0 | 50 | 0.00 | ||||
V2 | key_length | aes_smoke | 0 | 50 | 0.00 | ||
aes_config_error | 0 | 50 | 0.00 | ||||
aes_stress | 0 | 50 | 0.00 | ||||
V2 | back2back | aes_stress | 0 | 50 | 0.00 | ||
aes_b2b | 0 | 50 | 0.00 | ||||
V2 | backpressure | aes_stress | 0 | 50 | 0.00 | ||
V2 | multi_message | aes_smoke | 0 | 50 | 0.00 | ||
aes_config_error | 0 | 50 | 0.00 | ||||
aes_stress | 0 | 50 | 0.00 | ||||
aes_alert_reset | 0 | 50 | 0.00 | ||||
V2 | failure_test | aes_man_cfg_err | 0 | 50 | 0.00 | ||
aes_config_error | 0 | 50 | 0.00 | ||||
aes_alert_reset | 0 | 50 | 0.00 | ||||
V2 | trigger_clear_test | aes_clear | 0 | 50 | 0.00 | ||
V2 | nist_test_vectors | aes_nist_vectors | 0 | 1 | 0.00 | ||
V2 | reset_recovery | aes_alert_reset | 0 | 50 | 0.00 | ||
V2 | stress | aes_stress | 0 | 50 | 0.00 | ||
V2 | sideload | aes_stress | 0 | 50 | 0.00 | ||
aes_sideload | 0 | 50 | 0.00 | ||||
V2 | deinitialization | aes_deinit | 0 | 50 | 0.00 | ||
V2 | stress_all | aes_stress_all | 0 | 10 | 0.00 | ||
V2 | alert_test | aes_alert_test | 0 | 50 | 0.00 | ||
V2 | tl_d_oob_addr_access | aes_tl_errors | 6.000s | 407.860us | 20 | 20 | 100.00 |
V2 | tl_d_illegal_access | aes_tl_errors | 6.000s | 407.860us | 20 | 20 | 100.00 |
V2 | tl_d_outstanding_access | aes_csr_hw_reset | 4.000s | 68.060us | 5 | 5 | 100.00 |
aes_csr_rw | 4.000s | 229.250us | 20 | 20 | 100.00 | ||
aes_csr_aliasing | 5.000s | 67.699us | 5 | 5 | 100.00 | ||
aes_same_csr_outstanding | 5.000s | 479.416us | 20 | 20 | 100.00 | ||
V2 | tl_d_partial_access | aes_csr_hw_reset | 4.000s | 68.060us | 5 | 5 | 100.00 |
aes_csr_rw | 4.000s | 229.250us | 20 | 20 | 100.00 | ||
aes_csr_aliasing | 5.000s | 67.699us | 5 | 5 | 100.00 | ||
aes_same_csr_outstanding | 5.000s | 479.416us | 20 | 20 | 100.00 | ||
V2 | TOTAL | 40 | 501 | 7.98 | |||
V2S | reseeding | aes_reseed | 0 | 50 | 0.00 | ||
V2S | fault_inject | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
V2S | shadow_reg_update_error | aes_shadow_reg_errors | 4.000s | 59.270us | 20 | 20 | 100.00 |
V2S | shadow_reg_read_clear_staged_value | aes_shadow_reg_errors | 4.000s | 59.270us | 20 | 20 | 100.00 |
V2S | shadow_reg_storage_error | aes_shadow_reg_errors | 4.000s | 59.270us | 20 | 20 | 100.00 |
V2S | shadowed_reset_glitch | aes_shadow_reg_errors | 4.000s | 59.270us | 20 | 20 | 100.00 |
V2S | shadow_reg_update_error_with_csr_rw | aes_shadow_reg_errors_with_csr_rw | 4.000s | 418.857us | 20 | 20 | 100.00 |
V2S | tl_intg_err | aes_sec_cm | 0 | 5 | 0.00 | ||
aes_tl_intg_err | 7.000s | 3.987ms | 20 | 20 | 100.00 | ||
V2S | sec_cm_bus_integrity | aes_tl_intg_err | 7.000s | 3.987ms | 20 | 20 | 100.00 |
V2S | sec_cm_lc_escalate_en_intersig_mubi | aes_alert_reset | 0 | 50 | 0.00 | ||
V2S | sec_cm_main_config_shadow | aes_shadow_reg_errors | 4.000s | 59.270us | 20 | 20 | 100.00 |
V2S | sec_cm_main_config_sparse | aes_smoke | 0 | 50 | 0.00 | ||
aes_stress | 0 | 50 | 0.00 | ||||
aes_alert_reset | 0 | 50 | 0.00 | ||||
aes_core_fi | 0 | 70 | 0.00 | ||||
V2S | sec_cm_aux_config_shadow | aes_shadow_reg_errors | 4.000s | 59.270us | 20 | 20 | 100.00 |
V2S | sec_cm_aux_config_regwen | aes_readability | 0 | 50 | 0.00 | ||
aes_stress | 0 | 50 | 0.00 | ||||
V2S | sec_cm_key_sideload | aes_stress | 0 | 50 | 0.00 | ||
aes_sideload | 0 | 50 | 0.00 | ||||
V2S | sec_cm_key_sw_unreadable | aes_readability | 0 | 50 | 0.00 | ||
V2S | sec_cm_data_reg_sw_unreadable | aes_readability | 0 | 50 | 0.00 | ||
V2S | sec_cm_key_sec_wipe | aes_readability | 0 | 50 | 0.00 | ||
V2S | sec_cm_iv_config_sec_wipe | aes_readability | 0 | 50 | 0.00 | ||
V2S | sec_cm_data_reg_sec_wipe | aes_readability | 0 | 50 | 0.00 | ||
V2S | sec_cm_data_reg_key_sca | aes_stress | 0 | 50 | 0.00 | ||
V2S | sec_cm_key_masking | aes_stress | 0 | 50 | 0.00 | ||
V2S | sec_cm_main_fsm_sparse | aes_fi | 0 | 50 | 0.00 | ||
V2S | sec_cm_main_fsm_redun | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_cipher_fsm_sparse | aes_fi | 0 | 50 | 0.00 | ||
V2S | sec_cm_cipher_fsm_redun | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
V2S | sec_cm_cipher_ctr_redun | aes_cipher_fi | 0 | 350 | 0.00 | ||
V2S | sec_cm_ctr_fsm_sparse | aes_fi | 0 | 50 | 0.00 | ||
V2S | sec_cm_ctr_fsm_redun | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_ctrl_sparse | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_main_fsm_global_esc | aes_alert_reset | 0 | 50 | 0.00 | ||
V2S | sec_cm_main_fsm_local_esc | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_cipher_fsm_local_esc | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_ctr_fsm_local_esc | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_data_reg_local_esc | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
V2S | TOTAL | 60 | 985 | 6.09 | |||
V3 | stress_all_with_rand_reset | aes_stress_all_with_rand_reset | 0 | 10 | 0.00 | ||
V3 | TOTAL | 0 | 10 | 0.00 | |||
TOTAL | 155 | 1602 | 9.68 |
Items | Total | Written | Passing | Progress |
---|---|---|---|---|
V1 | 7 | 7 | 5 | 71.43 |
V2 | 13 | 13 | 2 | 15.38 |
V2S | 11 | 11 | 3 | 27.27 |
V3 | 1 | 1 | 0 | 0.00 |
Score | Block | Branch | Statement | Expression | Toggle | Fsm | Assertion | CoverGroup |
---|---|---|---|---|---|---|---|---|
83.99 | 99.38 | 98.15 | 99.87 | 99.74 | 44.47 | -- | 98.03 | 43.64 |
launch_task.returncode != *, err: * *:*:* * lswatcher.go:*] Failed to connect to Watcher service in the Envelope (you probably need to import _ "google3/tech/env/go/envelope"): generic::unimplemented: envrpc: no envelope available for service "chubby.googleapis.com" Failure to submit jobs: rpc error: code = Unavailable desc = The service is currently unavailable.
has 724 failures:
Test aes_wake_up has 1 failures.
Test aes_deinit has 28 failures.
0.aes_deinit.53719658687657299336294817211867841158325816845976752092939775731845538100019
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/0.aes_deinit/latest/run.log
1.aes_deinit.115076242956486185810558571767723318693161995842173270565123998087840346749340
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/1.aes_deinit/latest/run.log
... and 26 more failures.
Test aes_readability has 28 failures.
0.aes_readability.35585722844788221978947529790188280851551839972812137507640413722686402873664
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/0.aes_readability/latest/run.log
1.aes_readability.46243457840406823570237703079295513039480471499336289480571117284815770288435
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/1.aes_readability/latest/run.log
... and 26 more failures.
Test aes_config_error has 28 failures.
0.aes_config_error.73196639881506242173010374682680615018855729343921105485017006950717404840629
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/0.aes_config_error/latest/run.log
1.aes_config_error.46880551832548059540611395013798896569373780119320197375448817857567963575787
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/1.aes_config_error/latest/run.log
... and 26 more failures.
Test aes_b2b has 28 failures.
0.aes_b2b.85755795290219603243772568746837786505244836859782393082601559192563522225976
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/0.aes_b2b/latest/run.log
1.aes_b2b.17807314610130879885753465287354269331803160125748338678905684331424299995170
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/1.aes_b2b/latest/run.log
... and 26 more failures.
... and 16 more tests.
Job killed most likely because its dependent job failed.
has 723 failures:
Test aes_nist_vectors has 1 failures.
Test aes_man_cfg_err has 28 failures.
0.aes_man_cfg_err.61860259145244216429922663109635465983158979125414608754875129381381672682738
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/0.aes_man_cfg_err/latest/run.log
1.aes_man_cfg_err.101593338350873116379382938886306601833585074767920859794632235674800682263474
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/1.aes_man_cfg_err/latest/run.log
... and 26 more failures.
Test aes_smoke has 28 failures.
0.aes_smoke.41608317797240971900673870009798537784466115630111902528227180394806076588896
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/0.aes_smoke/latest/run.log
1.aes_smoke.74504767002363179875807618256349451611886725981246723074696397398909707259651
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/1.aes_smoke/latest/run.log
... and 26 more failures.
Test aes_stress has 28 failures.
0.aes_stress.92072024196556215747423285186290072559096259563072631422560800941124397076594
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/0.aes_stress/latest/run.log
1.aes_stress.37748247074459015733173612814429524543173683956327443353602706906276100706223
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/1.aes_stress/latest/run.log
... and 26 more failures.
Test aes_clear has 28 failures.
0.aes_clear.47415538511624799596392592162570221235050303967297809128189130873502775497551
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/0.aes_clear/latest/run.log
1.aes_clear.94411192378280984172910530174923601033743502853562159636103228454759022471664
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/1.aes_clear/latest/run.log
... and 26 more failures.
... and 15 more tests.