CLKMGR Simulation Results

Wednesday January 24 2024 20:02:24 UTC

GitHub Revision: `17d5a97c3b`

Branch: os_regression

Simulator: VCS

Build randomization enabled with --build-seed 111545506019531132515166311410934274348263845011639206515682989027305484635840

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	clkmgr_smoke	1.320s	182.362us	48	50	96.00
V1	csr_hw_reset	clkmgr_csr_hw_reset	1.080s	117.107us	5	5	100.00
V1	csr_rw	clkmgr_csr_rw	1.040s	64.486us	20	20	100.00
V1	csr_bit_bash	clkmgr_csr_bit_bash	13.050s	2.186ms	5	5	100.00
V1	csr_aliasing	clkmgr_csr_aliasing	2.000s	144.873us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	clkmgr_csr_mem_rw_with_rand_reset	1.790s	87.016us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	clkmgr_csr_rw	1.040s	64.486us	20	20	100.00
		clkmgr_csr_aliasing	2.000s	144.873us	5	5	100.00
V1		TOTAL			103	105	98.10
V2	peri_enables	clkmgr_peri	1.420s	258.551us	49	50	98.00
V2	trans_enables	clkmgr_trans	1.500s	242.327us	48	50	96.00
V2	extclk	clkmgr_extclk	1.150s	136.760us	49	50	98.00
V2	clk_status	clkmgr_clk_status	0.890s	99.229us	49	50	98.00
V2	jitter	clkmgr_smoke	1.320s	182.362us	48	50	96.00
V2	frequency	clkmgr_frequency	18.720s	2.475ms	46	50	92.00
V2	frequency_timeout	clkmgr_frequency_timeout	17.420s	2.421ms	49	50	98.00
V2	frequency_overflow	clkmgr_frequency	18.720s	2.475ms	46	50	92.00
V2	stress_all	clkmgr_stress_all	57.400s	8.180ms	49	50	98.00
V2	intr_test	clkmgr_intr_test	0.850s	44.876us	48	50	96.00
V2	alert_test	clkmgr_alert_test	1.060s	118.385us	49	50	98.00
V2	tl_d_oob_addr_access	clkmgr_tl_errors	5.120s	861.949us	20	20	100.00
V2	tl_d_illegal_access	clkmgr_tl_errors	5.120s	861.949us	20	20	100.00
V2	tl_d_outstanding_access	clkmgr_csr_hw_reset	1.080s	117.107us	5	5	100.00
		clkmgr_csr_rw	1.040s	64.486us	20	20	100.00
		clkmgr_csr_aliasing	2.000s	144.873us	5	5	100.00
		clkmgr_same_csr_outstanding	2.220s	550.746us	20	20	100.00
V2	tl_d_partial_access	clkmgr_csr_hw_reset	1.080s	117.107us	5	5	100.00
		clkmgr_csr_rw	1.040s	64.486us	20	20	100.00
		clkmgr_csr_aliasing	2.000s	144.873us	5	5	100.00
		clkmgr_same_csr_outstanding	2.220s	550.746us	20	20	100.00
V2		TOTAL			476	490	97.14
V2S	tl_intg_err	clkmgr_sec_cm	3.190s	396.675us	5	5	100.00
		clkmgr_tl_intg_err	4.390s	847.787us	19	20	95.00
V2S	shadow_reg_update_error	clkmgr_shadow_reg_errors	2.470s	366.725us	20	20	100.00
V2S	shadow_reg_read_clear_staged_value	clkmgr_shadow_reg_errors	2.470s	366.725us	20	20	100.00
V2S	shadow_reg_storage_error	clkmgr_shadow_reg_errors	2.470s	366.725us	20	20	100.00
V2S	shadowed_reset_glitch	clkmgr_shadow_reg_errors	2.470s	366.725us	20	20	100.00
V2S	shadow_reg_update_error_with_csr_rw	clkmgr_shadow_reg_errors_with_csr_rw	3.600s	423.783us	19	20	95.00
V2S	sec_cm_bus_integrity	clkmgr_tl_intg_err	4.390s	847.787us	19	20	95.00
V2S	sec_cm_meas_clk_bkgn_chk	clkmgr_frequency	18.720s	2.475ms	46	50	92.00
V2S	sec_cm_timeout_clk_bkgn_chk	clkmgr_frequency_timeout	17.420s	2.421ms	49	50	98.00
V2S	sec_cm_meas_config_shadow	clkmgr_shadow_reg_errors	2.470s	366.725us	20	20	100.00
V2S	sec_cm_idle_intersig_mubi	clkmgr_idle_intersig_mubi	1.220s	62.345us	49	50	98.00
V2S	sec_cm_lc_ctrl_intersig_mubi	clkmgr_lc_ctrl_intersig_mubi	1.230s	154.596us	50	50	100.00
V2S	sec_cm_lc_ctrl_clk_handshake_intersig_mubi	clkmgr_lc_clk_byp_req_intersig_mubi	1.490s	238.251us	49	50	98.00
V2S	sec_cm_clk_handshake_intersig_mubi	clkmgr_clk_handshake_intersig_mubi	1.370s	235.616us	48	50	96.00
V2S	sec_cm_div_intersig_mubi	clkmgr_div_intersig_mubi	1.560s	294.641us	47	50	94.00
V2S	sec_cm_jitter_config_mubi	clkmgr_csr_rw	1.040s	64.486us	20	20	100.00
V2S	sec_cm_idle_ctr_redun	clkmgr_sec_cm	3.190s	396.675us	5	5	100.00
V2S	sec_cm_meas_config_regwen	clkmgr_csr_rw	1.040s	64.486us	20	20	100.00
V2S	sec_cm_clk_ctrl_config_regwen	clkmgr_csr_rw	1.040s	64.486us	20	20	100.00
V2S	prim_count_check	clkmgr_sec_cm	3.190s	396.675us	5	5	100.00
V2S		TOTAL			306	315	97.14
V3	regwen	clkmgr_regwen	7.080s	1.252ms	50	50	100.00
V3	stress_all_with_rand_reset	clkmgr_stress_all_with_rand_reset	25.467m	465.319ms	49	50	98.00
V3		TOTAL			99	100	99.00
		TOTAL			984	1010	97.43

Testplan Progress

Items	Total	Written	Passing	Progress
V1	6	6	5	83.33
V2	11	11	2	18.18
V2S	9	9	3	33.33
V3	2	2	1	50.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
98.53	99.15	95.79	100.00	100.00	98.81	97.01	98.97

Failure Buckets

Job clkmgr-sim-vcs_run_default killed due to: Exit reason: Error: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *] has 6 failures:
- Test clkmgr_clk_handshake_intersig_mubi has 1 failures.
  - 0.clkmgr_clk_handshake_intersig_mubi.57811250521686692151323217612171135756143640922838343047814909141803326367858
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/0.clkmgr_clk_handshake_intersig_mubi/latest/run.log
```
  Job ID: smart:ec302faa-6df9-4af7-80a9-2bc3940d69a6
```
- Test clkmgr_trans has 1 failures.
  - 7.clkmgr_trans.74539176656784514410922514197358809417083437468095899645326825938911317519281
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/7.clkmgr_trans/latest/run.log
```
  Job ID: smart:8e7abe9e-6db2-4043-b40e-699441b294c6
```
- Test clkmgr_alert_test has 1 failures.
  - 9.clkmgr_alert_test.32395407207509251259947936920968327545651446458246517850150850618084587556657
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/9.clkmgr_alert_test/latest/run.log
```
  Job ID: smart:1805c95d-742e-4531-b201-b986bfc0ce0e
```
- Test clkmgr_frequency has 2 failures.
  - 17.clkmgr_frequency.11133203597371654585477683600763214466766239375548234729235270903168232601911
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/17.clkmgr_frequency/latest/run.log
```
  Job ID: smart:d8e4fcbd-3580-477c-b24a-c2413ad4b9b2
```
  - 27.clkmgr_frequency.2232584799139615283657519343037524058702157550235084342887970015740857926597
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/27.clkmgr_frequency/latest/run.log
```
  Job ID: smart:eb9ce13e-a13d-4342-8030-a1e78a178ca1
```
- Test clkmgr_extclk has 1 failures.
  - 29.clkmgr_extclk.94392633069140468370115831224346412641868934324120671434980161681395867184721
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/29.clkmgr_extclk/latest/run.log
```
  Job ID: smart:63a4c8f8-ef18-4500-880c-18c74ed386ba
```
Job clkmgr-sim-vcs_run_default killed due to: Exit reason: Error: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *] has 6 failures:
- Test clkmgr_lc_clk_byp_req_intersig_mubi has 1 failures.
  - 1.clkmgr_lc_clk_byp_req_intersig_mubi.115718966909484797244500968216412623169164163943123557336870201873878339232825
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/1.clkmgr_lc_clk_byp_req_intersig_mubi/latest/run.log
```
  Job ID: smart:bdbcd17d-d427-429e-ab16-437a82bde81f
```
- Test clkmgr_frequency_timeout has 1 failures.
  - 7.clkmgr_frequency_timeout.88925912732150971987622803258843666720820089677766451888682223366337624036176
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/7.clkmgr_frequency_timeout/latest/run.log
```
  Job ID: smart:a633777f-3fd0-470f-8f11-395b4e257ce1
```
- Test clkmgr_frequency has 1 failures.
  - 21.clkmgr_frequency.66965760720140843574343768744500714182120874907116778196371307840392322785689
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/21.clkmgr_frequency/latest/run.log
```
  Job ID: smart:2b72018e-6764-444c-a383-9c1dc9812652
```
- Test clkmgr_idle_intersig_mubi has 1 failures.
  - 25.clkmgr_idle_intersig_mubi.90254042062372383251115166575741693844160386804746088553675375009091365024575
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/25.clkmgr_idle_intersig_mubi/latest/run.log
```
  Job ID: smart:17be57c9-ff94-4d43-8a21-710bfa3fbf2a
```
- Test clkmgr_stress_all has 1 failures.
  - 38.clkmgr_stress_all.90033019352200154527099046562793202017105818369990458463857062922565392283191
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/38.clkmgr_stress_all/latest/run.log
```
  Job ID: smart:5d2612db-f1dc-4940-9b52-f7e696ae2683
```
- ... and 1 more tests.
Job clkmgr-sim-vcs_run_default killed due to: Exit reason: Error: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *] has 6 failures:
- Test clkmgr_div_intersig_mubi has 3 failures.
  - 1.clkmgr_div_intersig_mubi.18730704169175210594944920476856279793085892814604454444341521775235000081756
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/1.clkmgr_div_intersig_mubi/latest/run.log
```
  Job ID: smart:288fc310-1b9b-4704-a599-e97764720b73
```
  - 28.clkmgr_div_intersig_mubi.71486153760458901665113741620523490896046451555809939751252208096782334782560
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/28.clkmgr_div_intersig_mubi/latest/run.log
```
  Job ID: smart:c4fbdf3f-13c9-47cb-b695-bf0afcf708df
```
  - ... and 1 more failures.
- Test clkmgr_smoke has 2 failures.
  - 20.clkmgr_smoke.86546460192362649032224123563888215368942524030521117791748741340716682834018
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/20.clkmgr_smoke/latest/run.log
```
  Job ID: smart:1817d21c-0acc-4639-9359-64b7ecea3cce
```
  - 46.clkmgr_smoke.53679216941130335855531593072565081334914566547262181100202386306319190752554
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/46.clkmgr_smoke/latest/run.log
```
  Job ID: smart:6d42a2ab-2380-4f40-bb21-b739e7c78e9a
```
- Test clkmgr_trans has 1 failures.
  - 34.clkmgr_trans.18404925947878066050682082642549798722641792738394503313769985187116763505352
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/34.clkmgr_trans/latest/run.log
```
  Job ID: smart:63d355e5-b5a2-477d-a8b9-7b61480fcfc2
```
Job clkmgr-sim-vcs_run_default killed due to: Exit reason: Error: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *] has 2 failures:
- Test clkmgr_peri has 1 failures.
  - 17.clkmgr_peri.62147480965825675188179678498284709830150443844479315725280489474825999373017
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/17.clkmgr_peri/latest/run.log
```
  Job ID: smart:fc03b6f5-cd38-4f2d-8b65-e373bae6b054
```
- Test clkmgr_clk_handshake_intersig_mubi has 1 failures.
  - 30.clkmgr_clk_handshake_intersig_mubi.45704744544378832471278249657262846257970784606916030094800680172130046871527
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/30.clkmgr_clk_handshake_intersig_mubi/latest/run.log
```
  Job ID: smart:d9f4664d-cc6b-49da-af5d-add9600e5b3e
```

Exit reason: Error: User command failed Job returned non-zero exit code has 2 failures:

Test clkmgr_tl_intg_err has 1 failures.

18.clkmgr_tl_intg_err.274749331856418238067333731141275390915266061155896002160152876928015444293
Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/18.clkmgr_tl_intg_err/latest/run.log

  [make]: simulate
  cd /workspace/18.clkmgr_tl_intg_err/latest && /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=544647493 -assert nopostproc +UVM_TESTNAME=clkmgr_base_test +UVM_TEST_SEQ=clkmgr_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.clkmgr_tl_intg_err.544647493
  Chronologic VCS simulator copyright 1991-2022
  Contains Synopsys proprietary information.
  Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64;  Jan 24 14:03 2024
  Cannot find license file.
  Make sure that you have a license file and that your
  LM_LICENSE_FILE is pointing to the right location.
  
  make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255

Test clkmgr_intr_test has 1 failures.

18.clkmgr_intr_test.24259586807153738765340841242583140595204524764283218243501055774576808233060
Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/18.clkmgr_intr_test/latest/run.log

  [make]: simulate
  cd /workspace/18.clkmgr_intr_test/latest && /workspace/cover_reg_top/simv +run_intr_test +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=414910564 -assert nopostproc +UVM_TESTNAME=clkmgr_base_test +UVM_TEST_SEQ=clkmgr_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.clkmgr_intr_test.414910564
  Chronologic VCS simulator copyright 1991-2022
  Contains Synopsys proprietary information.
  Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64;  Jan 24 14:03 2024
  Cannot find license file.
  Make sure that you have a license file and that your
  LM_LICENSE_FILE is pointing to the right location.
  
  make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255

Job clkmgr-sim-vcs_run_default killed due to: Exit reason: Error: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *] has 2 failures:
- Test clkmgr_clk_status has 1 failures.
  - 31.clkmgr_clk_status.8107198009997940698134041824882088139312756119650358736870910787436937225067
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/31.clkmgr_clk_status/latest/run.log
```
  Job ID: smart:be34e6ed-e25b-4abc-8cfd-498ccbe379a4
```
- Test clkmgr_frequency has 1 failures.
  - 38.clkmgr_frequency.54820569623200596677143691775073913423512249197215444315524981666332546224898
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/38.clkmgr_frequency/latest/run.log
```
  Job ID: smart:2dcf1b39-75ee-42fb-b02d-67b9ee86c304
```
Job clkmgr-sim-vcs_run_cover_reg_top killed due to: Exit reason: Error: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *] has 1 failures:
- Test clkmgr_intr_test has 1 failures.
  - 11.clkmgr_intr_test.31322533988930395397384467858010022272506606740934054357966802936699405387232
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/11.clkmgr_intr_test/latest/run.log
```
  Job ID: smart:cd94097d-7d26-4421-9f9b-3f18fda82c52
```
Job clkmgr-sim-vcs_run_cover_reg_top killed due to: Exit reason: Error: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *] has 1 failures:
- Test clkmgr_shadow_reg_errors_with_csr_rw has 1 failures.
  - 17.clkmgr_shadow_reg_errors_with_csr_rw.60674683639268652787182053267579198472973035980434615925150703666125224840912
    Log /container/opentitan-public/scratch/os_regression/clkmgr-sim-vcs/17.clkmgr_shadow_reg_errors_with_csr_rw/latest/run.log
```
  Job ID: smart:7619fd30-664d-4e96-b06f-eca7ca105225
```