GPIO Simulation Results

Saturday July 20 2024 23:02:34 UTC

GitHub Revision: e971cd9798

Branch: os_regression

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 85433431889345478971181747401055702269263498582281270185582621732035232392187

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke gpio_smoke 1.580s 420.472us 50 50 100.00
gpio_smoke_no_pullup_pulldown 1.400s 760.405us 50 50 100.00
gpio_smoke_en_cdc_prim 1.370s 203.777us 50 50 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.380s 188.378us 50 50 100.00
V1 csr_hw_reset gpio_csr_hw_reset 0.680s 50.281us 5 5 100.00
V1 csr_rw gpio_csr_rw 0.660s 17.586us 20 20 100.00
V1 csr_bit_bash gpio_csr_bit_bash 3.080s 326.342us 5 5 100.00
V1 csr_aliasing gpio_csr_aliasing 0.930s 122.493us 5 5 100.00
V1 csr_mem_rw_with_rand_reset gpio_csr_mem_rw_with_rand_reset 1.640s 40.991us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr gpio_csr_rw 0.660s 17.586us 20 20 100.00
gpio_csr_aliasing 0.930s 122.493us 5 5 100.00
V1 TOTAL 255 255 100.00
V2 direct_and_masked_out gpio_random_dout_din 1.410s 57.722us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 1.390s 72.409us 50 50 100.00
V2 out_in_regs_read_write gpio_dout_din_regs_random_rw 0.940s 29.392us 50 50 100.00
V2 gpio_interrupt_programming gpio_intr_rand_pgm 1.490s 642.976us 50 50 100.00
V2 random_interrupt_trigger gpio_rand_intr_trigger 3.330s 157.460us 50 50 100.00
V2 interrupt_and_noise_filter gpio_intr_with_filter_rand_intr_event 3.780s 189.103us 50 50 100.00
V2 noise_filter_stress gpio_filter_stress 26.970s 755.659us 50 50 100.00
V2 regs_long_reads_and_writes gpio_random_long_reg_writes_reg_reads 6.740s 1.418ms 50 50 100.00
V2 full_random gpio_full_random 1.160s 427.058us 50 50 100.00
V2 stress_all gpio_stress_all 3.956m 8.345ms 50 50 100.00
V2 alert_test gpio_alert_test 0.690s 21.506us 50 50 100.00
V2 intr_test gpio_intr_test 0.670s 53.775us 50 50 100.00
V2 tl_d_oob_addr_access gpio_tl_errors 2.960s 159.231us 20 20 100.00
V2 tl_d_illegal_access gpio_tl_errors 2.960s 159.231us 20 20 100.00
V2 tl_d_outstanding_access gpio_csr_rw 0.660s 17.586us 20 20 100.00
gpio_same_csr_outstanding 0.920s 177.552us 20 20 100.00
gpio_csr_aliasing 0.930s 122.493us 5 5 100.00
gpio_csr_hw_reset 0.680s 50.281us 5 5 100.00
V2 tl_d_partial_access gpio_csr_rw 0.660s 17.586us 20 20 100.00
gpio_same_csr_outstanding 0.920s 177.552us 20 20 100.00
gpio_csr_aliasing 0.930s 122.493us 5 5 100.00
gpio_csr_hw_reset 0.680s 50.281us 5 5 100.00
V2 TOTAL 640 640 100.00
V2S tl_intg_err gpio_tl_intg_err 1.540s 278.995us 20 20 100.00
gpio_sec_cm 0.950s 500.305us 5 5 100.00
V2S sec_cm_bus_integrity gpio_tl_intg_err 1.540s 278.995us 20 20 100.00
V2S TOTAL 25 25 100.00
V3 stress_all_with_rand_reset gpio_stress_all_with_rand_reset 50.138m 138.630ms 23 50 46.00
V3 TOTAL 23 50 46.00
TOTAL 943 970 97.22

Testplan Progress

Items Total Written Passing Progress
V1 9 9 9 100.00
V2 14 14 14 100.00
V2S 2 2 2 100.00
V3 1 1 0 0.00

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
99.63 99.06 99.24 100.00 -- 99.80 99.68 99.97

Failure Buckets

Past Results