GPIO Simulation Results

Saturday August 17 2024 23:02:17 UTC

GitHub Revision: 76588857da

Branch: os_regression

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 94235727392619910305578226901221990521512464990339520078429467885466612377995

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke gpio_smoke 1.500s 77.747us 50 50 100.00
gpio_smoke_no_pullup_pulldown 1.400s 83.419us 50 50 100.00
gpio_smoke_en_cdc_prim 1.520s 100.775us 50 50 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.530s 158.783us 50 50 100.00
V1 csr_hw_reset gpio_csr_hw_reset 0.640s 30.505us 5 5 100.00
V1 csr_rw gpio_csr_rw 0.630s 28.032us 20 20 100.00
V1 csr_bit_bash gpio_csr_bit_bash 3.050s 79.984us 5 5 100.00
V1 csr_aliasing gpio_csr_aliasing 0.860s 32.908us 5 5 100.00
V1 csr_mem_rw_with_rand_reset gpio_csr_mem_rw_with_rand_reset 1.380s 30.604us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr gpio_csr_rw 0.630s 28.032us 20 20 100.00
gpio_csr_aliasing 0.860s 32.908us 5 5 100.00
V1 TOTAL 255 255 100.00
V2 direct_and_masked_out gpio_random_dout_din 1.430s 243.287us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 1.350s 277.322us 50 50 100.00
V2 out_in_regs_read_write gpio_dout_din_regs_random_rw 0.970s 51.028us 50 50 100.00
V2 gpio_interrupt_programming gpio_intr_rand_pgm 1.310s 293.730us 50 50 100.00
V2 random_interrupt_trigger gpio_rand_intr_trigger 3.690s 120.253us 50 50 100.00
V2 interrupt_and_noise_filter gpio_intr_with_filter_rand_intr_event 3.590s 378.108us 50 50 100.00
V2 noise_filter_stress gpio_filter_stress 27.830s 1.019ms 50 50 100.00
V2 regs_long_reads_and_writes gpio_random_long_reg_writes_reg_reads 6.110s 381.705us 50 50 100.00
V2 full_random gpio_full_random 1.140s 134.854us 50 50 100.00
V2 stress_all gpio_stress_all 3.586m 70.553ms 50 50 100.00
V2 alert_test gpio_alert_test 0.640s 18.123us 50 50 100.00
V2 intr_test gpio_intr_test 0.650s 22.463us 50 50 100.00
V2 tl_d_oob_addr_access gpio_tl_errors 3.290s 309.109us 20 20 100.00
V2 tl_d_illegal_access gpio_tl_errors 3.290s 309.109us 20 20 100.00
V2 tl_d_outstanding_access gpio_csr_rw 0.630s 28.032us 20 20 100.00
gpio_same_csr_outstanding 0.890s 22.144us 20 20 100.00
gpio_csr_aliasing 0.860s 32.908us 5 5 100.00
gpio_csr_hw_reset 0.640s 30.505us 5 5 100.00
V2 tl_d_partial_access gpio_csr_rw 0.630s 28.032us 20 20 100.00
gpio_same_csr_outstanding 0.890s 22.144us 20 20 100.00
gpio_csr_aliasing 0.860s 32.908us 5 5 100.00
gpio_csr_hw_reset 0.640s 30.505us 5 5 100.00
V2 TOTAL 640 640 100.00
V2S tl_intg_err gpio_tl_intg_err 1.450s 187.624us 20 20 100.00
gpio_sec_cm 1.010s 92.429us 5 5 100.00
V2S sec_cm_bus_integrity gpio_tl_intg_err 1.450s 187.624us 20 20 100.00
V2S TOTAL 25 25 100.00
V3 stress_all_with_rand_reset gpio_stress_all_with_rand_reset 4.295m 27.410ms 14 50 28.00
V3 TOTAL 14 50 28.00
TOTAL 934 970 96.29

Testplan Progress

Items Total Written Passing Progress
V1 9 9 9 100.00
V2 14 14 14 100.00
V2S 2 2 2 100.00
V3 1 1 0 0.00

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
99.63 99.06 99.24 100.00 -- 99.80 99.68 99.99

Failure Buckets

Past Results