GPIO Simulation Results

Saturday August 24 2024 20:58:08 UTC

GitHub Revision: e733a8ef8a

Branch: os_regression_2024_08_24

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 36240513409906943553650221581975102764006655953510936167454320581301243659163

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke gpio_smoke 2.630s 150.428us 50 50 100.00
gpio_smoke_no_pullup_pulldown 2.570s 106.289us 50 50 100.00
gpio_smoke_en_cdc_prim 2.350s 308.886us 50 50 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 2.440s 103.551us 50 50 100.00
V1 csr_hw_reset gpio_csr_hw_reset 1.000s 21.939us 5 5 100.00
V1 csr_rw gpio_csr_rw 0.940s 54.563us 20 20 100.00
V1 csr_bit_bash gpio_csr_bit_bash 4.090s 548.801us 5 5 100.00
V1 csr_aliasing gpio_csr_aliasing 1.280s 41.035us 5 5 100.00
V1 csr_mem_rw_with_rand_reset gpio_csr_mem_rw_with_rand_reset 1.850s 99.549us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr gpio_csr_rw 0.940s 54.563us 20 20 100.00
gpio_csr_aliasing 1.280s 41.035us 5 5 100.00
V1 TOTAL 255 255 100.00
V2 direct_and_masked_out gpio_random_dout_din 2.160s 177.673us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 2.190s 65.716us 50 50 100.00
V2 out_in_regs_read_write gpio_dout_din_regs_random_rw 1.510s 57.290us 50 50 100.00
V2 gpio_interrupt_programming gpio_intr_rand_pgm 2.300s 98.535us 50 50 100.00
V2 random_interrupt_trigger gpio_rand_intr_trigger 5.560s 122.676us 50 50 100.00
V2 interrupt_and_noise_filter gpio_intr_with_filter_rand_intr_event 6.030s 365.876us 50 50 100.00
V2 noise_filter_stress gpio_filter_stress 44.300s 536.701us 50 50 100.00
V2 regs_long_reads_and_writes gpio_random_long_reg_writes_reg_reads 10.500s 2.585ms 50 50 100.00
V2 full_random gpio_full_random 1.780s 94.136us 50 50 100.00
V2 stress_all gpio_stress_all 5.720m 16.910ms 50 50 100.00
V2 alert_test gpio_alert_test 0.890s 14.660us 50 50 100.00
V2 intr_test gpio_intr_test 0.990s 57.991us 50 50 100.00
V2 tl_d_oob_addr_access gpio_tl_errors 5.100s 723.089us 20 20 100.00
V2 tl_d_illegal_access gpio_tl_errors 5.100s 723.089us 20 20 100.00
V2 tl_d_outstanding_access gpio_csr_rw 0.940s 54.563us 20 20 100.00
gpio_same_csr_outstanding 1.310s 35.362us 20 20 100.00
gpio_csr_aliasing 1.280s 41.035us 5 5 100.00
gpio_csr_hw_reset 1.000s 21.939us 5 5 100.00
V2 tl_d_partial_access gpio_csr_rw 0.940s 54.563us 20 20 100.00
gpio_same_csr_outstanding 1.310s 35.362us 20 20 100.00
gpio_csr_aliasing 1.280s 41.035us 5 5 100.00
gpio_csr_hw_reset 1.000s 21.939us 5 5 100.00
V2 TOTAL 640 640 100.00
V2S tl_intg_err gpio_tl_intg_err 2.180s 118.682us 20 20 100.00
gpio_sec_cm 1.460s 169.273us 5 5 100.00
V2S sec_cm_bus_integrity gpio_tl_intg_err 2.180s 118.682us 20 20 100.00
V2S TOTAL 25 25 100.00
V3 stress_all_with_rand_reset gpio_stress_all_with_rand_reset 5.109m 25.164ms 16 50 32.00
V3 TOTAL 16 50 32.00
TOTAL 936 970 96.49

Testplan Progress

Items Total Written Passing Progress
V1 9 9 9 100.00
V2 14 14 14 100.00
V2S 2 2 2 100.00
V3 1 1 0 0.00

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
99.63 99.06 99.24 100.00 -- 99.80 99.68 99.99

Failure Buckets

Past Results