| T172 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/7.i2c_target_nack_txstretch.2371392514 |
|
|
Oct 02 08:29:05 PM UTC 24 |
Oct 02 08:29:09 PM UTC 24 |
1781426270 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/7.i2c_target_nack_acqfull.132144556 |
|
|
Oct 02 08:29:03 PM UTC 24 |
Oct 02 08:29:10 PM UTC 24 |
527305701 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_host_override.649863349 |
|
|
Oct 02 08:29:09 PM UTC 24 |
Oct 02 08:29:11 PM UTC 24 |
146991588 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/7.i2c_target_nack_acqfull_addr.609373267 |
|
|
Oct 02 08:29:05 PM UTC 24 |
Oct 02 08:29:11 PM UTC 24 |
568385379 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_reset_fmt.3293619811 |
|
|
Oct 02 08:29:11 PM UTC 24 |
Oct 02 08:29:13 PM UTC 24 |
116487553 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/6.i2c_target_stress_all.451024621 |
|
|
Oct 02 08:28:04 PM UTC 24 |
Oct 02 08:29:14 PM UTC 24 |
35237983140 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/7.i2c_target_tx_stretch_ctrl.2715788900 |
|
|
Oct 02 08:29:02 PM UTC 24 |
Oct 02 08:29:15 PM UTC 24 |
392909893 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_fmt_empty.1329595887 |
|
|
Oct 02 08:29:12 PM UTC 24 |
Oct 02 08:29:19 PM UTC 24 |
110332418 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/7.i2c_target_stress_rd.824079606 |
|
|
Oct 02 08:28:40 PM UTC 24 |
Oct 02 08:29:25 PM UTC 24 |
3764354672 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_overflow.959853321 |
|
|
Oct 02 08:28:34 PM UTC 24 |
Oct 02 08:29:25 PM UTC 24 |
1520295774 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_reset_rx.1351186727 |
|
|
Oct 02 08:29:12 PM UTC 24 |
Oct 02 08:29:26 PM UTC 24 |
1033615084 ps |
| T39 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/7.i2c_host_may_nack.1378746925 |
|
|
Oct 02 08:29:00 PM UTC 24 |
Oct 02 08:29:29 PM UTC 24 |
2578586473 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_watermark.2726466053 |
|
|
Oct 02 08:28:34 PM UTC 24 |
Oct 02 08:29:30 PM UTC 24 |
11243791233 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_host_stretch_timeout.3144875 |
|
|
Oct 02 08:29:19 PM UTC 24 |
Oct 02 08:29:37 PM UTC 24 |
2921820631 ps |
| T279 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_host_smoke.1938533349 |
|
|
Oct 02 08:29:07 PM UTC 24 |
Oct 02 08:29:40 PM UTC 24 |
1541761685 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_target_intr_smoke.4143595249 |
|
|
Oct 02 08:29:33 PM UTC 24 |
Oct 02 08:29:43 PM UTC 24 |
1139931413 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/7.i2c_host_smoke.1823839149 |
|
|
Oct 02 08:28:34 PM UTC 24 |
Oct 02 08:29:48 PM UTC 24 |
1261757453 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_reset_acq.1459226428 |
|
|
Oct 02 08:29:47 PM UTC 24 |
Oct 02 08:29:51 PM UTC 24 |
574305611 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_reset_tx.1864685811 |
|
|
Oct 02 08:29:51 PM UTC 24 |
Oct 02 08:29:53 PM UTC 24 |
186438070 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_target_timeout.1541139350 |
|
|
Oct 02 08:29:41 PM UTC 24 |
Oct 02 08:29:54 PM UTC 24 |
2300409228 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_target_perf.2191764187 |
|
|
Oct 02 08:29:51 PM UTC 24 |
Oct 02 08:29:57 PM UTC 24 |
1854143252 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_target_bad_addr.1605126006 |
|
|
Oct 02 08:29:53 PM UTC 24 |
Oct 02 08:30:02 PM UTC 24 |
3753438310 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_target_stress_rd.1823394833 |
|
|
Oct 02 08:29:31 PM UTC 24 |
Oct 02 08:30:05 PM UTC 24 |
3277171178 ps |
| T24 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_host_mode_toggle.2543719084 |
|
|
Oct 02 08:30:02 PM UTC 24 |
Oct 02 08:30:07 PM UTC 24 |
284789931 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_target_smoke.3677130948 |
|
|
Oct 02 08:29:26 PM UTC 24 |
Oct 02 08:30:11 PM UTC 24 |
4124152953 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_host_perf_precise.2498166530 |
|
|
Oct 02 08:29:16 PM UTC 24 |
Oct 02 08:30:11 PM UTC 24 |
5967246918 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_fmt_empty.1649640371 |
|
|
Oct 02 08:31:39 PM UTC 24 |
Oct 02 08:31:50 PM UTC 24 |
465601135 ps |
| T40 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_host_may_nack.20919144 |
|
|
Oct 02 08:30:06 PM UTC 24 |
Oct 02 08:30:12 PM UTC 24 |
2727254268 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_watermarks_acq.4233828074 |
|
|
Oct 02 08:30:07 PM UTC 24 |
Oct 02 08:30:14 PM UTC 24 |
1343418042 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_watermarks_tx.3724287706 |
|
|
Oct 02 08:30:12 PM UTC 24 |
Oct 02 08:30:14 PM UTC 24 |
264557975 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_host_stretch_timeout.3398880521 |
|
|
Oct 02 08:31:46 PM UTC 24 |
Oct 02 08:32:14 PM UTC 24 |
1816863552 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/7.i2c_target_stress_all.1797041382 |
|
|
Oct 02 08:28:51 PM UTC 24 |
Oct 02 08:30:16 PM UTC 24 |
93087806325 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_target_tx_stretch_ctrl.4227440670 |
|
|
Oct 02 08:30:13 PM UTC 24 |
Oct 02 08:30:16 PM UTC 24 |
114775822 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_target_smbus_maxlen.49378649 |
|
|
Oct 02 08:30:13 PM UTC 24 |
Oct 02 08:30:17 PM UTC 24 |
436411850 ps |
| T29 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_host_error_intr.3838884243 |
|
|
Oct 02 08:31:46 PM UTC 24 |
Oct 02 08:31:57 PM UTC 24 |
813607934 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_target_nack_acqfull.3797941192 |
|
|
Oct 02 08:30:14 PM UTC 24 |
Oct 02 08:30:19 PM UTC 24 |
559241794 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_host_perf.2902458379 |
|
|
Oct 02 08:30:21 PM UTC 24 |
Oct 02 08:32:07 PM UTC 24 |
5117122353 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_target_nack_acqfull_addr.3270774058 |
|
|
Oct 02 08:30:15 PM UTC 24 |
Oct 02 08:30:19 PM UTC 24 |
436078708 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_alert_test.2590713021 |
|
|
Oct 02 08:30:17 PM UTC 24 |
Oct 02 08:30:19 PM UTC 24 |
22023876 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_host_override.3685403803 |
|
|
Oct 02 08:30:17 PM UTC 24 |
Oct 02 08:30:19 PM UTC 24 |
17534179 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/7.i2c_target_intr_stress_wr.1176244147 |
|
|
Oct 02 08:28:44 PM UTC 24 |
Oct 02 08:30:20 PM UTC 24 |
15064016109 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_target_intr_stress_wr.3375104411 |
|
|
Oct 02 08:29:38 PM UTC 24 |
Oct 02 08:30:20 PM UTC 24 |
17624877928 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_reset_fmt.1466823558 |
|
|
Oct 02 08:30:19 PM UTC 24 |
Oct 02 08:30:22 PM UTC 24 |
79822987 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_host_error_intr.221821792 |
|
|
Oct 02 08:30:23 PM UTC 24 |
Oct 02 08:30:26 PM UTC 24 |
63508418 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_reset_rx.2624590844 |
|
|
Oct 02 08:30:20 PM UTC 24 |
Oct 02 08:30:29 PM UTC 24 |
2459894602 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_full.3338119889 |
|
|
Oct 02 08:28:35 PM UTC 24 |
Oct 02 08:30:30 PM UTC 24 |
4730804362 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_target_stretch.2806945470 |
|
|
Oct 02 08:29:31 PM UTC 24 |
Oct 02 08:30:31 PM UTC 24 |
4220059560 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_fmt_empty.2243470355 |
|
|
Oct 02 08:30:19 PM UTC 24 |
Oct 02 08:30:33 PM UTC 24 |
3375085064 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_host_perf_precise.1161324184 |
|
|
Oct 02 08:30:22 PM UTC 24 |
Oct 02 08:30:34 PM UTC 24 |
267876674 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_target_stretch.426456844 |
|
|
Oct 02 08:30:34 PM UTC 24 |
Oct 02 08:30:37 PM UTC 24 |
1657685283 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_host_stretch_timeout.1072082719 |
|
|
Oct 02 08:30:22 PM UTC 24 |
Oct 02 08:30:42 PM UTC 24 |
895629012 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_target_intr_smoke.662146585 |
|
|
Oct 02 08:30:34 PM UTC 24 |
Oct 02 08:30:46 PM UTC 24 |
5503653379 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_target_stress_rd.3254181003 |
|
|
Oct 02 08:30:32 PM UTC 24 |
Oct 02 08:30:46 PM UTC 24 |
293617915 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_reset_tx.794209826 |
|
|
Oct 02 08:30:48 PM UTC 24 |
Oct 02 08:30:51 PM UTC 24 |
350453008 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_reset_acq.1726429041 |
|
|
Oct 02 08:30:48 PM UTC 24 |
Oct 02 08:30:51 PM UTC 24 |
622109363 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_target_timeout.1481223520 |
|
|
Oct 02 08:30:48 PM UTC 24 |
Oct 02 08:30:57 PM UTC 24 |
1384540305 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_target_perf.2937200158 |
|
|
Oct 02 08:30:51 PM UTC 24 |
Oct 02 08:30:57 PM UTC 24 |
473981325 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_target_bad_addr.1148847089 |
|
|
Oct 02 08:30:52 PM UTC 24 |
Oct 02 08:31:01 PM UTC 24 |
1240150202 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/4.i2c_target_intr_stress_wr.3267476381 |
|
|
Oct 02 08:25:59 PM UTC 24 |
Oct 02 08:31:09 PM UTC 24 |
21915690042 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_watermarks_acq.123074334 |
|
|
Oct 02 08:31:10 PM UTC 24 |
Oct 02 08:31:14 PM UTC 24 |
4041956369 ps |
| T80 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_target_smoke.2986211387 |
|
|
Oct 02 08:30:30 PM UTC 24 |
Oct 02 08:31:16 PM UTC 24 |
1441165508 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_watermarks_tx.3320343666 |
|
|
Oct 02 08:31:15 PM UTC 24 |
Oct 02 08:31:17 PM UTC 24 |
150301610 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_host_may_nack.2730292575 |
|
|
Oct 02 08:31:08 PM UTC 24 |
Oct 02 08:31:20 PM UTC 24 |
711401451 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_target_tx_stretch_ctrl.2382368619 |
|
|
Oct 02 08:31:17 PM UTC 24 |
Oct 02 08:31:22 PM UTC 24 |
85001980 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_target_smbus_maxlen.4268663055 |
|
|
Oct 02 08:31:18 PM UTC 24 |
Oct 02 08:31:23 PM UTC 24 |
1624500712 ps |
| T93 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_target_nack_txstretch.3679627249 |
|
|
Oct 02 08:31:23 PM UTC 24 |
Oct 02 08:31:27 PM UTC 24 |
463533743 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_target_nack_acqfull.2575254338 |
|
|
Oct 02 08:31:21 PM UTC 24 |
Oct 02 08:31:27 PM UTC 24 |
581403442 ps |
| T95 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_target_nack_acqfull_addr.2607570454 |
|
|
Oct 02 08:31:22 PM UTC 24 |
Oct 02 08:31:28 PM UTC 24 |
2292494474 ps |
| T96 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_alert_test.3755788364 |
|
|
Oct 02 08:31:27 PM UTC 24 |
Oct 02 08:31:29 PM UTC 24 |
34372448 ps |
| T97 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_host_override.1064408345 |
|
|
Oct 02 08:31:28 PM UTC 24 |
Oct 02 08:31:30 PM UTC 24 |
110477457 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_watermark.3339351673 |
|
|
Oct 02 08:29:10 PM UTC 24 |
Oct 02 08:31:34 PM UTC 24 |
13136486481 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_reset_fmt.1890992992 |
|
|
Oct 02 08:31:38 PM UTC 24 |
Oct 02 08:31:40 PM UTC 24 |
285006144 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_host_smoke.4060669467 |
|
|
Oct 02 08:30:17 PM UTC 24 |
Oct 02 08:31:43 PM UTC 24 |
1839151395 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_overflow.2605373145 |
|
|
Oct 02 08:30:19 PM UTC 24 |
Oct 02 08:31:44 PM UTC 24 |
4077708234 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_reset_rx.2073871940 |
|
|
Oct 02 08:31:39 PM UTC 24 |
Oct 02 08:31:45 PM UTC 24 |
199008828 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_watermark.3736269457 |
|
|
Oct 02 08:30:18 PM UTC 24 |
Oct 02 08:31:45 PM UTC 24 |
12023901263 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_host_smoke.845950506 |
|
|
Oct 02 08:31:28 PM UTC 24 |
Oct 02 08:32:19 PM UTC 24 |
15391284116 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_full.2123023522 |
|
|
Oct 02 08:29:14 PM UTC 24 |
Oct 02 08:32:08 PM UTC 24 |
2989724829 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_target_intr_smoke.408378088 |
|
|
Oct 02 08:32:10 PM UTC 24 |
Oct 02 08:32:18 PM UTC 24 |
837482050 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_reset_acq.1693363085 |
|
|
Oct 02 08:32:18 PM UTC 24 |
Oct 02 08:32:22 PM UTC 24 |
267952002 ps |
| T232 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_host_perf_precise.1781091039 |
|
|
Oct 02 08:31:45 PM UTC 24 |
Oct 02 08:32:22 PM UTC 24 |
865997378 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_reset_tx.3463315155 |
|
|
Oct 02 08:32:19 PM UTC 24 |
Oct 02 08:32:22 PM UTC 24 |
284676830 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_target_timeout.2452366538 |
|
|
Oct 02 08:32:10 PM UTC 24 |
Oct 02 08:32:25 PM UTC 24 |
6068534387 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_target_perf.1438049884 |
|
|
Oct 02 08:32:20 PM UTC 24 |
Oct 02 08:32:25 PM UTC 24 |
424641558 ps |
| T117 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_watermark.3122188159 |
|
|
Oct 02 08:31:29 PM UTC 24 |
Oct 02 08:32:26 PM UTC 24 |
5942091839 ps |
| T271 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_host_smoke.2159847421 |
|
|
Oct 02 08:33:16 PM UTC 24 |
Oct 02 08:33:54 PM UTC 24 |
1652284898 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_target_hrst.4201029153 |
|
|
Oct 02 08:32:22 PM UTC 24 |
Oct 02 08:32:27 PM UTC 24 |
1081751869 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_target_stress_wr.1519286711 |
|
|
Oct 02 08:29:29 PM UTC 24 |
Oct 02 08:32:28 PM UTC 24 |
55285139680 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_watermarks_tx.1898041244 |
|
|
Oct 02 08:32:27 PM UTC 24 |
Oct 02 08:32:30 PM UTC 24 |
167537569 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_watermarks_acq.4224387269 |
|
|
Oct 02 08:32:27 PM UTC 24 |
Oct 02 08:32:30 PM UTC 24 |
943149140 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_target_intr_stress_wr.2815376424 |
|
|
Oct 02 08:32:10 PM UTC 24 |
Oct 02 08:32:31 PM UTC 24 |
11550194236 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_target_smoke.1073353403 |
|
|
Oct 02 08:32:04 PM UTC 24 |
Oct 02 08:32:32 PM UTC 24 |
759195115 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_target_bad_addr.3199415521 |
|
|
Oct 02 08:32:22 PM UTC 24 |
Oct 02 08:32:32 PM UTC 24 |
4405657578 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_overflow.1377366038 |
|
|
Oct 02 08:29:10 PM UTC 24 |
Oct 02 08:32:32 PM UTC 24 |
10263003092 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_target_tx_stretch_ctrl.337359343 |
|
|
Oct 02 08:32:28 PM UTC 24 |
Oct 02 08:32:33 PM UTC 24 |
127808564 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_target_smbus_maxlen.598328722 |
|
|
Oct 02 08:32:28 PM UTC 24 |
Oct 02 08:32:33 PM UTC 24 |
1970595342 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_target_nack_txstretch.1802745027 |
|
|
Oct 02 08:32:31 PM UTC 24 |
Oct 02 08:32:33 PM UTC 24 |
261875350 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_target_nack_acqfull.2404552267 |
|
|
Oct 02 08:32:29 PM UTC 24 |
Oct 02 08:32:34 PM UTC 24 |
1226042389 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_alert_test.2949397779 |
|
|
Oct 02 08:32:32 PM UTC 24 |
Oct 02 08:32:34 PM UTC 24 |
37693949 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_target_nack_acqfull_addr.3842640368 |
|
|
Oct 02 08:32:31 PM UTC 24 |
Oct 02 08:32:36 PM UTC 24 |
1086866182 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_host_override.762742174 |
|
|
Oct 02 08:32:33 PM UTC 24 |
Oct 02 08:32:36 PM UTC 24 |
19215228 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_target_stretch.1955180419 |
|
|
Oct 02 08:32:10 PM UTC 24 |
Oct 02 08:32:36 PM UTC 24 |
2622191104 ps |
| T243 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_reset_fmt.3797575762 |
|
|
Oct 02 08:32:34 PM UTC 24 |
Oct 02 08:32:37 PM UTC 24 |
224585325 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_target_stress_all.3516693865 |
|
|
Oct 02 08:30:52 PM UTC 24 |
Oct 02 08:32:41 PM UTC 24 |
78332684022 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_host_error_intr.3144420989 |
|
|
Oct 02 08:32:38 PM UTC 24 |
Oct 02 08:32:42 PM UTC 24 |
118371302 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_reset_rx.2167476907 |
|
|
Oct 02 08:32:34 PM UTC 24 |
Oct 02 08:32:42 PM UTC 24 |
175874670 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_host_may_nack.424587006 |
|
|
Oct 02 08:32:25 PM UTC 24 |
Oct 02 08:32:45 PM UTC 24 |
344245608 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/3.i2c_host_stress_all.3316821969 |
|
|
Oct 02 08:23:21 PM UTC 24 |
Oct 02 08:32:48 PM UTC 24 |
49325901813 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_full.2399055778 |
|
|
Oct 02 08:31:41 PM UTC 24 |
Oct 02 08:32:52 PM UTC 24 |
2712942318 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_host_stretch_timeout.3045153259 |
|
|
Oct 02 08:32:37 PM UTC 24 |
Oct 02 08:32:56 PM UTC 24 |
836139500 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_target_smoke.2547636030 |
|
|
Oct 02 08:32:43 PM UTC 24 |
Oct 02 08:32:59 PM UTC 24 |
611854072 ps |
| T233 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_host_perf_precise.62409167 |
|
|
Oct 02 08:32:37 PM UTC 24 |
Oct 02 08:32:59 PM UTC 24 |
863583035 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_fmt_empty.3657807570 |
|
|
Oct 02 08:32:34 PM UTC 24 |
Oct 02 08:33:00 PM UTC 24 |
451594559 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_target_intr_smoke.1752048271 |
|
|
Oct 02 08:32:53 PM UTC 24 |
Oct 02 08:33:01 PM UTC 24 |
1412826530 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_reset_tx.1126941340 |
|
|
Oct 02 08:33:00 PM UTC 24 |
Oct 02 08:33:03 PM UTC 24 |
133659777 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_reset_acq.1165190753 |
|
|
Oct 02 08:33:00 PM UTC 24 |
Oct 02 08:33:03 PM UTC 24 |
151910125 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_overflow.2207717929 |
|
|
Oct 02 08:31:37 PM UTC 24 |
Oct 02 08:33:04 PM UTC 24 |
2560294122 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_target_stress_rd.2789564845 |
|
|
Oct 02 08:32:46 PM UTC 24 |
Oct 02 08:33:05 PM UTC 24 |
1653091171 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_full.3953946911 |
|
|
Oct 02 08:30:20 PM UTC 24 |
Oct 02 08:33:06 PM UTC 24 |
10257396672 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_target_hrst.577941001 |
|
|
Oct 02 08:33:04 PM UTC 24 |
Oct 02 08:33:07 PM UTC 24 |
5137144570 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_target_timeout.3896758726 |
|
|
Oct 02 08:32:58 PM UTC 24 |
Oct 02 08:33:10 PM UTC 24 |
2307015566 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_host_mode_toggle.4057370116 |
|
|
Oct 02 08:33:05 PM UTC 24 |
Oct 02 08:33:10 PM UTC 24 |
110411163 ps |
| T293 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_watermarks_tx.3258944320 |
|
|
Oct 02 08:33:08 PM UTC 24 |
Oct 02 08:33:11 PM UTC 24 |
383809320 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_target_perf.4110789639 |
|
|
Oct 02 08:33:01 PM UTC 24 |
Oct 02 08:33:12 PM UTC 24 |
698947674 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_watermarks_acq.1813835537 |
|
|
Oct 02 08:33:07 PM UTC 24 |
Oct 02 08:33:12 PM UTC 24 |
386293666 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_target_bad_addr.15264650 |
|
|
Oct 02 08:33:04 PM UTC 24 |
Oct 02 08:33:14 PM UTC 24 |
3964192286 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_target_stress_rd.1400274713 |
|
|
Oct 02 08:32:09 PM UTC 24 |
Oct 02 08:33:15 PM UTC 24 |
5194341913 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_target_intr_stress_wr.1283696838 |
|
|
Oct 02 08:30:46 PM UTC 24 |
Oct 02 08:33:15 PM UTC 24 |
23206330996 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_target_smbus_maxlen.1199781067 |
|
|
Oct 02 08:33:11 PM UTC 24 |
Oct 02 08:33:17 PM UTC 24 |
2133502255 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_target_nack_txstretch.1991759517 |
|
|
Oct 02 08:33:13 PM UTC 24 |
Oct 02 08:33:17 PM UTC 24 |
560747398 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_alert_test.252697004 |
|
|
Oct 02 08:33:15 PM UTC 24 |
Oct 02 08:33:17 PM UTC 24 |
15884413 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_target_nack_acqfull_addr.2417684880 |
|
|
Oct 02 08:33:12 PM UTC 24 |
Oct 02 08:33:18 PM UTC 24 |
664342687 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_host_override.1064221653 |
|
|
Oct 02 08:33:17 PM UTC 24 |
Oct 02 08:33:18 PM UTC 24 |
21959423 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_target_perf.4245712977 |
|
|
Oct 02 08:33:44 PM UTC 24 |
Oct 02 08:33:54 PM UTC 24 |
1558896584 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_target_nack_acqfull.4170392507 |
|
|
Oct 02 08:33:12 PM UTC 24 |
Oct 02 08:33:19 PM UTC 24 |
2254747611 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_target_intr_stress_wr.2108359248 |
|
|
Oct 02 08:32:58 PM UTC 24 |
Oct 02 08:33:20 PM UTC 24 |
11746941574 ps |
| T244 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_reset_fmt.2180527584 |
|
|
Oct 02 08:33:18 PM UTC 24 |
Oct 02 08:33:20 PM UTC 24 |
176059368 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_target_tx_stretch_ctrl.264410925 |
|
|
Oct 02 08:33:11 PM UTC 24 |
Oct 02 08:33:22 PM UTC 24 |
616535715 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_target_stretch.3328162666 |
|
|
Oct 02 08:32:49 PM UTC 24 |
Oct 02 08:33:22 PM UTC 24 |
1761809305 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_target_stress_wr.2855344070 |
|
|
Oct 02 08:32:43 PM UTC 24 |
Oct 02 08:33:24 PM UTC 24 |
28120746959 ps |
| T256 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_host_may_nack.1735882474 |
|
|
Oct 02 08:33:06 PM UTC 24 |
Oct 02 08:33:25 PM UTC 24 |
1580525353 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_full.1638016275 |
|
|
Oct 02 08:32:36 PM UTC 24 |
Oct 02 08:33:32 PM UTC 24 |
1900367140 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_host_smoke.661723524 |
|
|
Oct 02 08:32:32 PM UTC 24 |
Oct 02 08:33:35 PM UTC 24 |
1228899635 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_target_stress_all.3274143596 |
|
|
Oct 02 08:32:21 PM UTC 24 |
Oct 02 08:33:35 PM UTC 24 |
28489174614 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_host_perf_precise.3802490818 |
|
|
Oct 02 08:33:32 PM UTC 24 |
Oct 02 08:33:37 PM UTC 24 |
141325852 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_host_error_intr.1850050366 |
|
|
Oct 02 08:33:32 PM UTC 24 |
Oct 02 08:33:37 PM UTC 24 |
105337148 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_fmt_empty.1990419792 |
|
|
Oct 02 08:33:30 PM UTC 24 |
Oct 02 08:33:39 PM UTC 24 |
389243583 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_target_intr_smoke.3270350714 |
|
|
Oct 02 08:33:36 PM UTC 24 |
Oct 02 08:33:41 PM UTC 24 |
1678344892 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_target_stretch.3973751033 |
|
|
Oct 02 08:33:35 PM UTC 24 |
Oct 02 08:33:41 PM UTC 24 |
5111547681 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_target_stress_rd.3914530101 |
|
|
Oct 02 08:33:33 PM UTC 24 |
Oct 02 08:33:42 PM UTC 24 |
838623711 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_reset_rx.1856665924 |
|
|
Oct 02 08:33:31 PM UTC 24 |
Oct 02 08:33:45 PM UTC 24 |
885413958 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_host_stretch_timeout.2206690050 |
|
|
Oct 02 08:33:32 PM UTC 24 |
Oct 02 08:33:46 PM UTC 24 |
1001382206 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_host_mode_toggle.3762817492 |
|
|
Oct 02 08:33:48 PM UTC 24 |
Oct 02 08:33:51 PM UTC 24 |
94673562 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_reset_tx.1649558441 |
|
|
Oct 02 08:33:44 PM UTC 24 |
Oct 02 08:33:47 PM UTC 24 |
191618008 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_reset_acq.294373978 |
|
|
Oct 02 08:33:44 PM UTC 24 |
Oct 02 08:33:47 PM UTC 24 |
517860068 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_target_timeout.2268951818 |
|
|
Oct 02 08:33:37 PM UTC 24 |
Oct 02 08:33:48 PM UTC 24 |
2057482319 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_host_perf.1350069408 |
|
|
Oct 02 08:32:37 PM UTC 24 |
Oct 02 08:33:56 PM UTC 24 |
4995468137 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_watermarks_acq.2615964271 |
|
|
Oct 02 08:33:48 PM UTC 24 |
Oct 02 08:33:52 PM UTC 24 |
977010512 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_watermarks_tx.4048702239 |
|
|
Oct 02 08:33:49 PM UTC 24 |
Oct 02 08:33:53 PM UTC 24 |
585428191 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_target_bad_addr.2480254382 |
|
|
Oct 02 08:33:46 PM UTC 24 |
Oct 02 08:33:55 PM UTC 24 |
4148357608 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_target_smbus_maxlen.1699863167 |
|
|
Oct 02 08:33:52 PM UTC 24 |
Oct 02 08:33:58 PM UTC 24 |
2046786871 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_target_intr_stress_wr.2969016137 |
|
|
Oct 02 08:33:37 PM UTC 24 |
Oct 02 08:33:59 PM UTC 24 |
4871365482 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_target_nack_acqfull.2098367933 |
|
|
Oct 02 08:33:54 PM UTC 24 |
Oct 02 08:34:00 PM UTC 24 |
519829581 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/6.i2c_host_perf.1301839193 |
|
|
Oct 02 08:27:35 PM UTC 24 |
Oct 02 08:34:00 PM UTC 24 |
12180829214 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_target_nack_acqfull_addr.1304886856 |
|
|
Oct 02 08:33:54 PM UTC 24 |
Oct 02 08:34:00 PM UTC 24 |
480254967 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/0.i2c_target_stress_wr.1457837465 |
|
|
Oct 02 08:19:22 PM UTC 24 |
Oct 02 08:35:29 PM UTC 24 |
72970022483 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_target_smoke.4051936885 |
|
|
Oct 02 08:33:32 PM UTC 24 |
Oct 02 08:34:03 PM UTC 24 |
1069702823 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_target_tx_stretch_ctrl.1669273147 |
|
|
Oct 02 08:33:52 PM UTC 24 |
Oct 02 08:34:04 PM UTC 24 |
514822346 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_reset_rx.1814836322 |
|
|
Oct 02 08:35:23 PM UTC 24 |
Oct 02 08:35:29 PM UTC 24 |
453717378 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_host_may_nack.1771001373 |
|
|
Oct 02 08:33:48 PM UTC 24 |
Oct 02 08:34:06 PM UTC 24 |
410281808 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_alert_test.4285833643 |
|
|
Oct 02 08:34:06 PM UTC 24 |
Oct 02 08:34:08 PM UTC 24 |
46162753 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_target_stress_rd.288833926 |
|
|
Oct 02 08:34:56 PM UTC 24 |
Oct 02 08:35:29 PM UTC 24 |
1259556425 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_host_override.3012625006 |
|
|
Oct 02 08:34:23 PM UTC 24 |
Oct 02 08:34:26 PM UTC 24 |
35834977 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_reset_fmt.406688715 |
|
|
Oct 02 08:34:23 PM UTC 24 |
Oct 02 08:34:26 PM UTC 24 |
460315537 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_host_error_intr.1129852884 |
|
|
Oct 02 08:34:24 PM UTC 24 |
Oct 02 08:34:28 PM UTC 24 |
75582373 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_target_stretch.367484051 |
|
|
Oct 02 08:34:24 PM UTC 24 |
Oct 02 08:34:30 PM UTC 24 |
7149887531 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_target_stretch.2576299877 |
|
|
Oct 02 08:34:59 PM UTC 24 |
Oct 02 08:35:30 PM UTC 24 |
701501775 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_fmt_empty.1866524869 |
|
|
Oct 02 08:34:23 PM UTC 24 |
Oct 02 08:34:33 PM UTC 24 |
171609679 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_reset_rx.2918427600 |
|
|
Oct 02 08:34:24 PM UTC 24 |
Oct 02 08:34:33 PM UTC 24 |
243869134 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_host_perf_precise.1792602823 |
|
|
Oct 02 08:34:24 PM UTC 24 |
Oct 02 08:34:33 PM UTC 24 |
324916381 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_reset_acq.1194392928 |
|
|
Oct 02 08:34:31 PM UTC 24 |
Oct 02 08:34:34 PM UTC 24 |
270963761 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_host_stretch_timeout.1060565385 |
|
|
Oct 02 08:34:24 PM UTC 24 |
Oct 02 08:34:36 PM UTC 24 |
5727001739 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_target_intr_smoke.590412306 |
|
|
Oct 02 08:34:27 PM UTC 24 |
Oct 02 08:34:36 PM UTC 24 |
620676585 ps |
| T296 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_reset_tx.3079851380 |
|
|
Oct 02 08:34:33 PM UTC 24 |
Oct 02 08:34:37 PM UTC 24 |
723260072 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_overflow.4152249059 |
|
|
Oct 02 08:33:18 PM UTC 24 |
Oct 02 08:34:38 PM UTC 24 |
6466138402 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_target_hrst.1245902306 |
|
|
Oct 02 08:34:35 PM UTC 24 |
Oct 02 08:34:39 PM UTC 24 |
722915141 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_target_timeout.3309871822 |
|
|
Oct 02 08:34:28 PM UTC 24 |
Oct 02 08:34:39 PM UTC 24 |
1172867448 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_target_smoke.3997041614 |
|
|
Oct 02 08:34:24 PM UTC 24 |
Oct 02 08:34:43 PM UTC 24 |
5164055758 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_target_perf.3763204236 |
|
|
Oct 02 08:34:34 PM UTC 24 |
Oct 02 08:34:43 PM UTC 24 |
858512404 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_overflow.4148628365 |
|
|
Oct 02 08:32:34 PM UTC 24 |
Oct 02 08:34:44 PM UTC 24 |
3904470045 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_target_bad_addr.716866554 |
|
|
Oct 02 08:34:34 PM UTC 24 |
Oct 02 08:34:45 PM UTC 24 |
2670634814 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_target_intr_stress_wr.167752534 |
|
|
Oct 02 08:34:27 PM UTC 24 |
Oct 02 08:34:46 PM UTC 24 |
5737418191 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_target_stress_all.1161490498 |
|
|
Oct 02 08:33:45 PM UTC 24 |
Oct 02 08:34:46 PM UTC 24 |
37353795633 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_target_stress_wr.3843882570 |
|
|
Oct 02 08:34:24 PM UTC 24 |
Oct 02 08:34:46 PM UTC 24 |
9029411729 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_watermarks_tx.2013094586 |
|
|
Oct 02 08:34:48 PM UTC 24 |
Oct 02 08:34:50 PM UTC 24 |
92139686 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_alert_test.3956286159 |
|
|
Oct 02 08:34:49 PM UTC 24 |
Oct 02 08:34:51 PM UTC 24 |
27462571 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_host_override.1832403136 |
|
|
Oct 02 08:34:49 PM UTC 24 |
Oct 02 08:34:51 PM UTC 24 |
34996630 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_target_tx_stretch_ctrl.2912397718 |
|
|
Oct 02 08:34:49 PM UTC 24 |
Oct 02 08:34:52 PM UTC 24 |
58819527 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_target_nack_txstretch.4201622326 |
|
|
Oct 02 08:34:49 PM UTC 24 |
Oct 02 08:34:52 PM UTC 24 |
528724946 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_target_smbus_maxlen.2665722372 |
|
|
Oct 02 08:34:49 PM UTC 24 |
Oct 02 08:34:53 PM UTC 24 |
2641174320 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_reset_fmt.3946055197 |
|
|
Oct 02 08:34:51 PM UTC 24 |
Oct 02 08:34:53 PM UTC 24 |
242113539 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_target_nack_acqfull_addr.3227845839 |
|
|
Oct 02 08:34:49 PM UTC 24 |
Oct 02 08:34:53 PM UTC 24 |
911236179 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_target_nack_acqfull.1049036644 |
|
|
Oct 02 08:34:49 PM UTC 24 |
Oct 02 08:34:54 PM UTC 24 |
2211540304 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_watermarks_acq.3835737015 |
|
|
Oct 02 08:34:48 PM UTC 24 |
Oct 02 08:34:54 PM UTC 24 |
948493987 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_host_may_nack.2875950740 |
|
|
Oct 02 08:34:48 PM UTC 24 |
Oct 02 08:34:56 PM UTC 24 |
1527131840 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_host_error_intr.2743062335 |
|
|
Oct 02 08:34:54 PM UTC 24 |
Oct 02 08:34:57 PM UTC 24 |
78494858 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_host_perf_precise.1109226615 |
|
|
Oct 02 08:34:53 PM UTC 24 |
Oct 02 08:34:58 PM UTC 24 |
182579478 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_fmt_empty.1516751553 |
|
|
Oct 02 08:34:51 PM UTC 24 |
Oct 02 08:35:01 PM UTC 24 |
936474960 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_target_stress_rd.3593601536 |
|
|
Oct 02 08:34:24 PM UTC 24 |
Oct 02 08:35:02 PM UTC 24 |
6738178984 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_reset_rx.3313413121 |
|
|
Oct 02 08:34:52 PM UTC 24 |
Oct 02 08:35:07 PM UTC 24 |
1893011459 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_target_intr_smoke.4153214606 |
|
|
Oct 02 08:34:59 PM UTC 24 |
Oct 02 08:35:08 PM UTC 24 |
9043475067 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_host_stretch_timeout.3460987567 |
|
|
Oct 02 08:34:54 PM UTC 24 |
Oct 02 08:35:10 PM UTC 24 |
3131069957 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_target_intr_stress_wr.1297481561 |
|
|
Oct 02 08:35:02 PM UTC 24 |
Oct 02 08:35:10 PM UTC 24 |
5923716578 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_host_perf.1540529846 |
|
|
Oct 02 08:29:15 PM UTC 24 |
Oct 02 08:35:10 PM UTC 24 |
27639271239 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_target_smoke.214002995 |
|
|
Oct 02 08:34:54 PM UTC 24 |
Oct 02 08:35:11 PM UTC 24 |
1696869347 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_target_stress_wr.1419965712 |
|
|
Oct 02 08:34:55 PM UTC 24 |
Oct 02 08:35:13 PM UTC 24 |
18458848176 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_reset_acq.4119525934 |
|
|
Oct 02 08:35:09 PM UTC 24 |
Oct 02 08:35:13 PM UTC 24 |
409446269 ps |
| T275 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_reset_tx.2255990254 |
|
|
Oct 02 08:35:10 PM UTC 24 |
Oct 02 08:35:14 PM UTC 24 |
1778621388 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_host_perf.1458776150 |
|
|
Oct 02 08:34:24 PM UTC 24 |
Oct 02 08:35:14 PM UTC 24 |
4422511574 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_target_timeout.3234901536 |
|
|
Oct 02 08:35:04 PM UTC 24 |
Oct 02 08:35:15 PM UTC 24 |
5829021395 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_target_hrst.3138262784 |
|
|
Oct 02 08:35:12 PM UTC 24 |
Oct 02 08:35:16 PM UTC 24 |
856104308 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_target_perf.2900962314 |
|
|
Oct 02 08:35:11 PM UTC 24 |
Oct 02 08:35:18 PM UTC 24 |
516239022 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_watermarks_tx.2502113030 |
|
|
Oct 02 08:35:16 PM UTC 24 |
Oct 02 08:35:18 PM UTC 24 |
352036427 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_host_may_nack.1646905925 |
|
|
Oct 02 08:35:13 PM UTC 24 |
Oct 02 08:35:18 PM UTC 24 |
634503447 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_host_perf.2617074419 |
|
|
Oct 02 08:35:25 PM UTC 24 |
Oct 02 08:35:31 PM UTC 24 |
647577572 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_full.2240726917 |
|
|
Oct 02 08:34:24 PM UTC 24 |
Oct 02 08:35:18 PM UTC 24 |
3748823524 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_target_bad_addr.1766471385 |
|
|
Oct 02 08:35:11 PM UTC 24 |
Oct 02 08:35:18 PM UTC 24 |
3614699925 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_watermarks_acq.3846198698 |
|
|
Oct 02 08:35:15 PM UTC 24 |
Oct 02 08:35:19 PM UTC 24 |
326626575 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_host_smoke.82831238 |
|
|
Oct 02 08:34:06 PM UTC 24 |
Oct 02 08:35:19 PM UTC 24 |
3108900812 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_host_override.1706955682 |
|
|
Oct 02 08:35:19 PM UTC 24 |
Oct 02 08:35:21 PM UTC 24 |
180432782 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_alert_test.3713496900 |
|
|
Oct 02 08:35:19 PM UTC 24 |
Oct 02 08:35:22 PM UTC 24 |
21483903 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_target_nack_txstretch.1696803811 |
|
|
Oct 02 08:35:19 PM UTC 24 |
Oct 02 08:35:22 PM UTC 24 |
536229327 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_target_smbus_maxlen.2830906457 |
|
|
Oct 02 08:35:18 PM UTC 24 |
Oct 02 08:35:23 PM UTC 24 |
380267592 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_target_nack_acqfull.2710098084 |
|
|
Oct 02 08:35:19 PM UTC 24 |
Oct 02 08:35:24 PM UTC 24 |
2076223467 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_target_nack_acqfull_addr.685728179 |
|
|
Oct 02 08:35:19 PM UTC 24 |
Oct 02 08:35:24 PM UTC 24 |
2463632665 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_reset_fmt.2055894706 |
|
|
Oct 02 08:35:22 PM UTC 24 |
Oct 02 08:35:25 PM UTC 24 |
89533487 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_host_smoke.3463508690 |
|
|
Oct 02 08:34:49 PM UTC 24 |
Oct 02 08:35:36 PM UTC 24 |
9239782740 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_host_perf_precise.3040947682 |
|
|
Oct 02 08:35:25 PM UTC 24 |
Oct 02 08:35:33 PM UTC 24 |
606917331 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_target_intr_smoke.1624462305 |
|
|
Oct 02 08:35:34 PM UTC 24 |
Oct 02 08:35:41 PM UTC 24 |
934480874 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_target_tx_stretch_ctrl.2803561391 |
|
|
Oct 02 08:35:17 PM UTC 24 |
Oct 02 08:35:41 PM UTC 24 |
2065102021 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_target_stress_rd.761809181 |
|
|
Oct 02 08:35:32 PM UTC 24 |
Oct 02 08:35:41 PM UTC 24 |
792181158 ps |
| T209 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_acq.93903919 |
|
|
Oct 02 08:35:42 PM UTC 24 |
Oct 02 08:35:45 PM UTC 24 |
401494382 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_host_smoke.1192470213 |
|
|
Oct 02 08:35:19 PM UTC 24 |
Oct 02 08:35:47 PM UTC 24 |
2738306782 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_overflow.3374677847 |
|
|
Oct 02 08:34:23 PM UTC 24 |
Oct 02 08:35:49 PM UTC 24 |
38607041863 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_tx.3785404701 |
|
|
Oct 02 08:35:46 PM UTC 24 |
Oct 02 08:35:50 PM UTC 24 |
252500961 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_target_smoke.1900361746 |
|
|
Oct 02 08:35:30 PM UTC 24 |
Oct 02 08:35:50 PM UTC 24 |
11428249862 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_watermark.3771955352 |
|
|
Oct 02 08:34:23 PM UTC 24 |
Oct 02 08:35:50 PM UTC 24 |
5624997123 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_fmt_empty.1455696353 |
|
|
Oct 02 08:35:22 PM UTC 24 |
Oct 02 08:35:51 PM UTC 24 |
458773629 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_target_stretch.2549753472 |
|
|
Oct 02 08:35:33 PM UTC 24 |
Oct 02 08:35:52 PM UTC 24 |
1069876785 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_host_perf.610472184 |
|
|
Oct 02 08:34:53 PM UTC 24 |
Oct 02 08:37:26 PM UTC 24 |
19099861047 ps |