| T1321 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/38.i2c_target_intr_smoke.3193115697 |
|
|
Oct 02 08:51:38 PM UTC 24 |
Oct 02 08:51:51 PM UTC 24 |
6942181651 ps |
| T1322 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/38.i2c_target_stress_rd.1832487541 |
|
|
Oct 02 08:51:38 PM UTC 24 |
Oct 02 08:51:51 PM UTC 24 |
1850686085 ps |
| T1323 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_tx.122769989 |
|
|
Oct 02 08:51:48 PM UTC 24 |
Oct 02 08:51:52 PM UTC 24 |
380835888 ps |
| T1324 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/38.i2c_target_tx_stretch_ctrl.741897749 |
|
|
Oct 02 08:51:48 PM UTC 24 |
Oct 02 08:51:52 PM UTC 24 |
151486035 ps |
| T1325 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/38.i2c_target_smoke.514547870 |
|
|
Oct 02 08:51:38 PM UTC 24 |
Oct 02 08:51:52 PM UTC 24 |
978402838 ps |
| T261 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/38.i2c_host_may_nack.1707699632 |
|
|
Oct 02 08:51:44 PM UTC 24 |
Oct 02 08:51:52 PM UTC 24 |
612900115 ps |
| T1326 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/38.i2c_target_nack_txstretch.2938285769 |
|
|
Oct 02 08:51:51 PM UTC 24 |
Oct 02 08:51:53 PM UTC 24 |
581788770 ps |
| T1327 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/38.i2c_alert_test.464047612 |
|
|
Oct 02 08:51:52 PM UTC 24 |
Oct 02 08:51:54 PM UTC 24 |
18443990 ps |
| T1328 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/38.i2c_target_smbus_maxlen.3472189299 |
|
|
Oct 02 08:51:48 PM UTC 24 |
Oct 02 08:51:55 PM UTC 24 |
2284671503 ps |
| T1329 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_host_override.1509459249 |
|
|
Oct 02 08:51:53 PM UTC 24 |
Oct 02 08:51:55 PM UTC 24 |
18977808 ps |
| T1330 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_full.2667325986 |
|
|
Oct 02 08:50:53 PM UTC 24 |
Oct 02 08:51:55 PM UTC 24 |
5902649407 ps |
| T1331 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull.3748800345 |
|
|
Oct 02 08:51:50 PM UTC 24 |
Oct 02 08:51:56 PM UTC 24 |
549204605 ps |
| T1332 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull_addr.2342824455 |
|
|
Oct 02 08:51:51 PM UTC 24 |
Oct 02 08:51:56 PM UTC 24 |
2038858873 ps |
| T1333 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_fmt.581292097 |
|
|
Oct 02 08:51:53 PM UTC 24 |
Oct 02 08:51:56 PM UTC 24 |
714893004 ps |
| T1334 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/38.i2c_host_smoke.1234902186 |
|
|
Oct 02 08:51:22 PM UTC 24 |
Oct 02 08:51:58 PM UTC 24 |
6700803628 ps |
| T1335 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_fmt_empty.1471282550 |
|
|
Oct 02 08:51:53 PM UTC 24 |
Oct 02 08:51:58 PM UTC 24 |
304439080 ps |
| T1336 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/33.i2c_target_intr_stress_wr.2407196071 |
|
|
Oct 02 08:48:40 PM UTC 24 |
Oct 02 08:52:00 PM UTC 24 |
22266627054 ps |
| T1337 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_rx.2893070257 |
|
|
Oct 02 08:51:54 PM UTC 24 |
Oct 02 08:52:01 PM UTC 24 |
916474140 ps |
| T1338 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/38.i2c_host_stretch_timeout.2248753387 |
|
|
Oct 02 08:51:38 PM UTC 24 |
Oct 02 08:52:04 PM UTC 24 |
1105742336 ps |
| T1339 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_host_perf_precise.2775048995 |
|
|
Oct 02 08:51:56 PM UTC 24 |
Oct 02 08:52:05 PM UTC 24 |
6400801417 ps |
| T1340 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_target_stress_wr.3812420070 |
|
|
Oct 02 08:51:58 PM UTC 24 |
Oct 02 08:52:08 PM UTC 24 |
7208324043 ps |
| T1341 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_tx.832396069 |
|
|
Oct 02 08:52:06 PM UTC 24 |
Oct 02 08:52:09 PM UTC 24 |
313893114 ps |
| T1342 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_host_override.270587920 |
|
|
Oct 02 08:54:47 PM UTC 24 |
Oct 02 08:54:49 PM UTC 24 |
18528806 ps |
| T1343 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_acq.3629604911 |
|
|
Oct 02 08:52:06 PM UTC 24 |
Oct 02 08:52:09 PM UTC 24 |
435892671 ps |
| T1344 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_target_timeout.1522935832 |
|
|
Oct 02 08:52:01 PM UTC 24 |
Oct 02 08:52:11 PM UTC 24 |
1354380792 ps |
| T1345 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_target_intr_smoke.3660573363 |
|
|
Oct 02 08:52:00 PM UTC 24 |
Oct 02 08:52:12 PM UTC 24 |
2069640509 ps |
| T1346 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_host_stretch_timeout.2755990829 |
|
|
Oct 02 08:51:56 PM UTC 24 |
Oct 02 08:52:13 PM UTC 24 |
628793301 ps |
| T1347 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/38.i2c_target_stretch.1028786380 |
|
|
Oct 02 08:51:38 PM UTC 24 |
Oct 02 08:52:14 PM UTC 24 |
3905414441 ps |
| T1348 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_target_smoke.1387738107 |
|
|
Oct 02 08:51:57 PM UTC 24 |
Oct 02 08:52:15 PM UTC 24 |
431662711 ps |
| T1349 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/48.i2c_target_bad_addr.2096503443 |
|
|
Oct 02 08:58:03 PM UTC 24 |
Oct 02 08:58:15 PM UTC 24 |
1963878905 ps |
| T1350 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_target_bad_addr.2045116307 |
|
|
Oct 02 08:52:10 PM UTC 24 |
Oct 02 08:52:17 PM UTC 24 |
502436422 ps |
| T1351 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_tx.3635726104 |
|
|
Oct 02 08:52:15 PM UTC 24 |
Oct 02 08:52:19 PM UTC 24 |
646087511 ps |
| T1352 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_acq.747646021 |
|
|
Oct 02 08:52:14 PM UTC 24 |
Oct 02 08:52:19 PM UTC 24 |
2082152104 ps |
| T1353 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_host_smoke.918469537 |
|
|
Oct 02 08:51:52 PM UTC 24 |
Oct 02 08:52:20 PM UTC 24 |
1511900090 ps |
| T1354 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_target_perf.516240334 |
|
|
Oct 02 08:52:09 PM UTC 24 |
Oct 02 08:52:20 PM UTC 24 |
8671184816 ps |
| T1355 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_alert_test.2908812348 |
|
|
Oct 02 08:52:20 PM UTC 24 |
Oct 02 08:52:22 PM UTC 24 |
52381623 ps |
| T1356 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_target_tx_stretch_ctrl.4262574574 |
|
|
Oct 02 08:52:17 PM UTC 24 |
Oct 02 08:52:22 PM UTC 24 |
131313571 ps |
| T1357 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_overflow.3530688397 |
|
|
Oct 02 08:50:53 PM UTC 24 |
Oct 02 08:52:23 PM UTC 24 |
8895957546 ps |
| T1358 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_host_override.1468547224 |
|
|
Oct 02 08:52:21 PM UTC 24 |
Oct 02 08:52:23 PM UTC 24 |
54661492 ps |
| T1359 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_target_smbus_maxlen.1059235800 |
|
|
Oct 02 08:52:18 PM UTC 24 |
Oct 02 08:52:23 PM UTC 24 |
1100001597 ps |
| T1360 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_target_nack_txstretch.3314827812 |
|
|
Oct 02 08:52:20 PM UTC 24 |
Oct 02 08:52:24 PM UTC 24 |
217475668 ps |
| T1361 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull_addr.3067768233 |
|
|
Oct 02 08:52:19 PM UTC 24 |
Oct 02 08:52:24 PM UTC 24 |
1203009955 ps |
| T1362 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull.3921641354 |
|
|
Oct 02 08:52:18 PM UTC 24 |
Oct 02 08:52:24 PM UTC 24 |
2025940405 ps |
| T1363 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_host_perf.1348667618 |
|
|
Oct 02 08:39:29 PM UTC 24 |
Oct 02 08:52:25 PM UTC 24 |
51406217182 ps |
| T1364 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_target_stress_rd.3328734223 |
|
|
Oct 02 08:51:58 PM UTC 24 |
Oct 02 08:52:25 PM UTC 24 |
1089885586 ps |
| T1365 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_fmt.109969909 |
|
|
Oct 02 08:52:23 PM UTC 24 |
Oct 02 08:52:26 PM UTC 24 |
256923542 ps |
| T1366 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_host_perf_precise.300478763 |
|
|
Oct 02 08:52:26 PM UTC 24 |
Oct 02 08:52:30 PM UTC 24 |
74979542 ps |
| T1367 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_rx.1238778849 |
|
|
Oct 02 08:52:25 PM UTC 24 |
Oct 02 08:52:32 PM UTC 24 |
758183407 ps |
| T1368 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_host_error_intr.1163689208 |
|
|
Oct 02 08:52:26 PM UTC 24 |
Oct 02 08:52:32 PM UTC 24 |
653552606 ps |
| T1369 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_fmt_empty.744134496 |
|
|
Oct 02 08:52:25 PM UTC 24 |
Oct 02 08:52:35 PM UTC 24 |
595022412 ps |
| T1370 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_watermark.3897952468 |
|
|
Oct 02 08:51:33 PM UTC 24 |
Oct 02 08:52:37 PM UTC 24 |
10438779363 ps |
| T1371 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_host_may_nack.2850268260 |
|
|
Oct 02 08:52:13 PM UTC 24 |
Oct 02 08:52:37 PM UTC 24 |
3061880309 ps |
| T1372 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_target_stretch.2844964194 |
|
|
Oct 02 08:51:59 PM UTC 24 |
Oct 02 08:52:41 PM UTC 24 |
4214243026 ps |
| T1373 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_target_stretch.3620723961 |
|
|
Oct 02 08:52:33 PM UTC 24 |
Oct 02 08:52:44 PM UTC 24 |
1900374659 ps |
| T1374 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_target_intr_smoke.2111353995 |
|
|
Oct 02 08:52:37 PM UTC 24 |
Oct 02 08:52:45 PM UTC 24 |
767340195 ps |
| T1375 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_host_stretch_timeout.4284198235 |
|
|
Oct 02 08:52:26 PM UTC 24 |
Oct 02 08:52:46 PM UTC 24 |
1857806623 ps |
| T1376 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_acq.1446695532 |
|
|
Oct 02 08:52:45 PM UTC 24 |
Oct 02 08:52:48 PM UTC 24 |
192926679 ps |
| T1377 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_target_timeout.2128609976 |
|
|
Oct 02 08:52:38 PM UTC 24 |
Oct 02 08:52:48 PM UTC 24 |
991952502 ps |
| T1378 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_tx.1902428686 |
|
|
Oct 02 08:52:45 PM UTC 24 |
Oct 02 08:52:48 PM UTC 24 |
661369960 ps |
| T1379 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/32.i2c_host_perf_precise.3685316890 |
|
|
Oct 02 08:47:42 PM UTC 24 |
Oct 02 08:52:51 PM UTC 24 |
24341350194 ps |
| T36 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_host_stress_all.1219208528 |
|
|
Oct 02 08:46:35 PM UTC 24 |
Oct 02 08:52:52 PM UTC 24 |
98830676756 ps |
| T1380 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/36.i2c_host_perf_precise.2874106028 |
|
|
Oct 02 08:50:22 PM UTC 24 |
Oct 02 08:52:53 PM UTC 24 |
24389407699 ps |
| T1381 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_target_perf.713539323 |
|
|
Oct 02 08:52:46 PM UTC 24 |
Oct 02 08:52:54 PM UTC 24 |
2667117636 ps |
| T1382 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_tx.2095087004 |
|
|
Oct 02 08:52:53 PM UTC 24 |
Oct 02 08:52:55 PM UTC 24 |
78258609 ps |
| T1383 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_target_smoke.797784474 |
|
|
Oct 02 08:52:30 PM UTC 24 |
Oct 02 08:52:56 PM UTC 24 |
1194150052 ps |
| T1384 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_target_bad_addr.1952413281 |
|
|
Oct 02 08:52:48 PM UTC 24 |
Oct 02 08:52:56 PM UTC 24 |
790825381 ps |
| T1385 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/34.i2c_target_stress_all.2504649370 |
|
|
Oct 02 08:49:20 PM UTC 24 |
Oct 02 08:52:56 PM UTC 24 |
23772181715 ps |
| T1386 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_acq.293813991 |
|
|
Oct 02 08:52:53 PM UTC 24 |
Oct 02 08:52:57 PM UTC 24 |
1257018557 ps |
| T1387 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_host_smoke.1036511869 |
|
|
Oct 02 08:52:21 PM UTC 24 |
Oct 02 08:52:58 PM UTC 24 |
3024834794 ps |
| T1388 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_target_smbus_maxlen.2733539035 |
|
|
Oct 02 08:52:55 PM UTC 24 |
Oct 02 08:52:59 PM UTC 24 |
441620405 ps |
| T1389 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_alert_test.3448168298 |
|
|
Oct 02 08:52:57 PM UTC 24 |
Oct 02 08:52:59 PM UTC 24 |
21337236 ps |
| T1390 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_host_may_nack.3152809645 |
|
|
Oct 02 08:52:52 PM UTC 24 |
Oct 02 08:52:59 PM UTC 24 |
2656151590 ps |
| T1391 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_overflow.2034308399 |
|
|
Oct 02 08:51:33 PM UTC 24 |
Oct 02 08:53:00 PM UTC 24 |
2374682374 ps |
| T1392 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull.3560031739 |
|
|
Oct 02 08:52:56 PM UTC 24 |
Oct 02 08:53:00 PM UTC 24 |
4442371791 ps |
| T1393 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_host_override.707184021 |
|
|
Oct 02 08:52:59 PM UTC 24 |
Oct 02 08:53:00 PM UTC 24 |
36134746 ps |
| T1394 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_target_tx_stretch_ctrl.2107909150 |
|
|
Oct 02 08:52:54 PM UTC 24 |
Oct 02 08:53:01 PM UTC 24 |
248951444 ps |
| T1395 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_target_intr_smoke.4094800906 |
|
|
Oct 02 08:53:10 PM UTC 24 |
Oct 02 08:53:19 PM UTC 24 |
9412238990 ps |
| T1396 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull_addr.1644319494 |
|
|
Oct 02 08:52:56 PM UTC 24 |
Oct 02 08:53:02 PM UTC 24 |
1077546607 ps |
| T1397 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_target_intr_stress_wr.3114006123 |
|
|
Oct 02 08:52:01 PM UTC 24 |
Oct 02 08:53:02 PM UTC 24 |
21474012475 ps |
| T1398 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_fmt.4167604324 |
|
|
Oct 02 08:53:01 PM UTC 24 |
Oct 02 08:53:04 PM UTC 24 |
682299546 ps |
| T1399 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_host_perf_precise.926256858 |
|
|
Oct 02 08:53:02 PM UTC 24 |
Oct 02 08:53:05 PM UTC 24 |
101706047 ps |
| T1400 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_target_stress_wr.4250373275 |
|
|
Oct 02 08:30:31 PM UTC 24 |
Oct 02 08:53:06 PM UTC 24 |
56060366208 ps |
| T1401 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_host_error_intr.3690308232 |
|
|
Oct 02 08:53:03 PM UTC 24 |
Oct 02 08:53:07 PM UTC 24 |
140180513 ps |
| T1402 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_fmt_empty.855019756 |
|
|
Oct 02 08:53:01 PM UTC 24 |
Oct 02 08:53:09 PM UTC 24 |
115769972 ps |
| T1403 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_host_perf.1330818904 |
|
|
Oct 02 08:53:02 PM UTC 24 |
Oct 02 08:53:10 PM UTC 24 |
3785444634 ps |
| T1404 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_rx.3814248013 |
|
|
Oct 02 08:53:01 PM UTC 24 |
Oct 02 08:53:13 PM UTC 24 |
124320450 ps |
| T1405 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_watermark.508222629 |
|
|
Oct 02 08:50:20 PM UTC 24 |
Oct 02 08:53:13 PM UTC 24 |
11945441853 ps |
| T1406 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_target_stress_rd.606954270 |
|
|
Oct 02 08:52:33 PM UTC 24 |
Oct 02 08:53:15 PM UTC 24 |
34944282092 ps |
| T1407 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_host_stretch_timeout.1772158631 |
|
|
Oct 02 08:53:02 PM UTC 24 |
Oct 02 08:53:15 PM UTC 24 |
642923546 ps |
| T1408 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_tx.2204407758 |
|
|
Oct 02 08:53:16 PM UTC 24 |
Oct 02 08:53:19 PM UTC 24 |
455170304 ps |
| T1409 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_target_stress_wr.2002015139 |
|
|
Oct 02 08:53:07 PM UTC 24 |
Oct 02 08:53:19 PM UTC 24 |
13616588489 ps |
| T1410 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_acq.2130346668 |
|
|
Oct 02 08:53:16 PM UTC 24 |
Oct 02 08:53:19 PM UTC 24 |
200357483 ps |
| T1411 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_overflow.1123810589 |
|
|
Oct 02 08:52:23 PM UTC 24 |
Oct 02 08:53:22 PM UTC 24 |
6837972270 ps |
| T1412 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_target_timeout.2147568525 |
|
|
Oct 02 08:53:13 PM UTC 24 |
Oct 02 08:53:23 PM UTC 24 |
2257293538 ps |
| T1413 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_target_bad_addr.1204659872 |
|
|
Oct 02 08:53:19 PM UTC 24 |
Oct 02 08:53:25 PM UTC 24 |
4555521794 ps |
| T1414 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_target_intr_stress_wr.289946988 |
|
|
Oct 02 08:52:38 PM UTC 24 |
Oct 02 08:53:27 PM UTC 24 |
6644228096 ps |
| T1415 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_target_perf.1093994067 |
|
|
Oct 02 08:53:17 PM UTC 24 |
Oct 02 08:53:28 PM UTC 24 |
799026692 ps |
| T1416 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_tx.931043918 |
|
|
Oct 02 08:53:25 PM UTC 24 |
Oct 02 08:53:28 PM UTC 24 |
512376904 ps |
| T1417 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_acq.3747836874 |
|
|
Oct 02 08:53:24 PM UTC 24 |
Oct 02 08:53:28 PM UTC 24 |
594162957 ps |
| T1418 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/38.i2c_target_stress_wr.2153210471 |
|
|
Oct 02 08:51:38 PM UTC 24 |
Oct 02 08:53:30 PM UTC 24 |
78386824799 ps |
| T1419 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_target_stretch.1266369269 |
|
|
Oct 02 08:53:08 PM UTC 24 |
Oct 02 08:53:31 PM UTC 24 |
3140204276 ps |
| T1420 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_overflow.144968768 |
|
|
Oct 02 08:51:53 PM UTC 24 |
Oct 02 08:53:32 PM UTC 24 |
2656634221 ps |
| T1421 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_target_smbus_maxlen.3576597764 |
|
|
Oct 02 08:53:28 PM UTC 24 |
Oct 02 08:53:32 PM UTC 24 |
1788621108 ps |
| T1422 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_target_nack_txstretch.4099317316 |
|
|
Oct 02 08:53:29 PM UTC 24 |
Oct 02 08:53:32 PM UTC 24 |
135403129 ps |
| T1423 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_host_smoke.443099854 |
|
|
Oct 02 08:52:57 PM UTC 24 |
Oct 02 08:53:34 PM UTC 24 |
6364551975 ps |
| T1424 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull_addr.139985705 |
|
|
Oct 02 08:53:29 PM UTC 24 |
Oct 02 08:53:34 PM UTC 24 |
545963308 ps |
| T1425 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_alert_test.2903446716 |
|
|
Oct 02 08:53:31 PM UTC 24 |
Oct 02 08:53:34 PM UTC 24 |
16954588 ps |
| T1426 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull.2093975372 |
|
|
Oct 02 08:53:29 PM UTC 24 |
Oct 02 08:53:34 PM UTC 24 |
2058496783 ps |
| T1427 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_host_override.510806971 |
|
|
Oct 02 08:53:33 PM UTC 24 |
Oct 02 08:53:36 PM UTC 24 |
44216930 ps |
| T1428 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_host_may_nack.1830238109 |
|
|
Oct 02 08:53:23 PM UTC 24 |
Oct 02 08:53:36 PM UTC 24 |
565203039 ps |
| T1429 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_full.3950207195 |
|
|
Oct 02 08:51:38 PM UTC 24 |
Oct 02 08:53:36 PM UTC 24 |
3606837346 ps |
| T1430 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_fmt.95122769 |
|
|
Oct 02 08:53:35 PM UTC 24 |
Oct 02 08:53:38 PM UTC 24 |
101218755 ps |
| T1431 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_host_perf_precise.2700151500 |
|
|
Oct 02 08:53:37 PM UTC 24 |
Oct 02 08:53:41 PM UTC 24 |
142072772 ps |
| T1432 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_rx.492450304 |
|
|
Oct 02 08:53:35 PM UTC 24 |
Oct 02 08:53:41 PM UTC 24 |
144935607 ps |
| T1433 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_alert_test.3085925136 |
|
|
Oct 02 08:54:46 PM UTC 24 |
Oct 02 08:54:48 PM UTC 24 |
17372264 ps |
| T1434 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_fmt_empty.3550437708 |
|
|
Oct 02 08:53:35 PM UTC 24 |
Oct 02 08:53:43 PM UTC 24 |
230343646 ps |
| T1435 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_target_stress_rd.469801027 |
|
|
Oct 02 08:53:08 PM UTC 24 |
Oct 02 08:53:44 PM UTC 24 |
2129583304 ps |
| T1436 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_target_tx_stretch_ctrl.3711081304 |
|
|
Oct 02 08:53:27 PM UTC 24 |
Oct 02 08:53:49 PM UTC 24 |
1735238246 ps |
| T1437 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_host_smoke.120294324 |
|
|
Oct 02 08:53:32 PM UTC 24 |
Oct 02 08:53:50 PM UTC 24 |
4481015688 ps |
| T1438 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/35.i2c_host_perf_precise.965355741 |
|
|
Oct 02 08:49:45 PM UTC 24 |
Oct 02 08:53:51 PM UTC 24 |
24323166587 ps |
| T1439 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_target_stretch.430997422 |
|
|
Oct 02 08:53:45 PM UTC 24 |
Oct 02 08:53:52 PM UTC 24 |
904483790 ps |
| T1440 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_host_stretch_timeout.3390939175 |
|
|
Oct 02 08:53:38 PM UTC 24 |
Oct 02 08:53:53 PM UTC 24 |
247572790 ps |
| T1441 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_acq.43686331 |
|
|
Oct 02 08:53:53 PM UTC 24 |
Oct 02 08:53:56 PM UTC 24 |
212877881 ps |
| T1442 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_target_intr_smoke.1075440309 |
|
|
Oct 02 08:53:50 PM UTC 24 |
Oct 02 08:53:58 PM UTC 24 |
20023801865 ps |
| T1443 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_tx.759019142 |
|
|
Oct 02 08:53:54 PM UTC 24 |
Oct 02 08:53:59 PM UTC 24 |
281471318 ps |
| T1444 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_host_perf.1912165130 |
|
|
Oct 02 08:52:25 PM UTC 24 |
Oct 02 08:53:59 PM UTC 24 |
2715168081 ps |
| T1445 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_target_intr_stress_wr.187276820 |
|
|
Oct 02 08:53:50 PM UTC 24 |
Oct 02 08:54:01 PM UTC 24 |
8354740966 ps |
| T1446 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_target_smoke.329795610 |
|
|
Oct 02 08:53:06 PM UTC 24 |
Oct 02 08:54:02 PM UTC 24 |
1474257402 ps |
| T1447 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_target_perf.861363854 |
|
|
Oct 02 08:53:55 PM UTC 24 |
Oct 02 08:54:03 PM UTC 24 |
606107699 ps |
| T1448 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_host_mode_toggle.3815131315 |
|
|
Oct 02 08:54:00 PM UTC 24 |
Oct 02 08:54:04 PM UTC 24 |
127301263 ps |
| T1449 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_target_timeout.1987984091 |
|
|
Oct 02 08:53:51 PM UTC 24 |
Oct 02 08:54:04 PM UTC 24 |
1316420986 ps |
| T1450 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_target_stress_rd.4210346084 |
|
|
Oct 02 08:53:44 PM UTC 24 |
Oct 02 08:54:04 PM UTC 24 |
4115511089 ps |
| T1451 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_watermark.111414942 |
|
|
Oct 02 08:52:23 PM UTC 24 |
Oct 02 08:54:05 PM UTC 24 |
4616443187 ps |
| T1452 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_acq.1278701299 |
|
|
Oct 02 08:54:02 PM UTC 24 |
Oct 02 08:54:06 PM UTC 24 |
687253366 ps |
| T1453 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_tx.727273522 |
|
|
Oct 02 08:54:04 PM UTC 24 |
Oct 02 08:54:06 PM UTC 24 |
182457689 ps |
| T1454 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_target_bad_addr.1375305237 |
|
|
Oct 02 08:53:59 PM UTC 24 |
Oct 02 08:54:08 PM UTC 24 |
4128784107 ps |
| T1455 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_overflow.207749847 |
|
|
Oct 02 08:53:34 PM UTC 24 |
Oct 02 08:54:09 PM UTC 24 |
1378445120 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_target_smoke.1217646684 |
|
|
Oct 02 08:53:43 PM UTC 24 |
Oct 02 08:54:09 PM UTC 24 |
1761063778 ps |
| T1456 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_target_tx_stretch_ctrl.1161933013 |
|
|
Oct 02 08:54:05 PM UTC 24 |
Oct 02 08:54:10 PM UTC 24 |
119920580 ps |
| T1457 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_alert_test.2777256758 |
|
|
Oct 02 08:54:08 PM UTC 24 |
Oct 02 08:54:10 PM UTC 24 |
40058532 ps |
| T1458 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_target_smbus_maxlen.309627700 |
|
|
Oct 02 08:54:44 PM UTC 24 |
Oct 02 08:54:48 PM UTC 24 |
579781151 ps |
| T1459 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull.1590090890 |
|
|
Oct 02 08:54:05 PM UTC 24 |
Oct 02 08:54:11 PM UTC 24 |
1969537036 ps |
| T1460 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull_addr.3633478031 |
|
|
Oct 02 08:54:07 PM UTC 24 |
Oct 02 08:54:11 PM UTC 24 |
837443109 ps |
| T1461 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_target_smbus_maxlen.3784613524 |
|
|
Oct 02 08:54:05 PM UTC 24 |
Oct 02 08:54:11 PM UTC 24 |
888395340 ps |
| T1462 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_host_override.3633208671 |
|
|
Oct 02 08:54:10 PM UTC 24 |
Oct 02 08:54:12 PM UTC 24 |
143561313 ps |
| T1463 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_fmt.2539045463 |
|
|
Oct 02 08:54:11 PM UTC 24 |
Oct 02 08:54:13 PM UTC 24 |
126694540 ps |
| T262 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_host_may_nack.3155723118 |
|
|
Oct 02 08:54:02 PM UTC 24 |
Oct 02 08:54:16 PM UTC 24 |
683628195 ps |
| T1464 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/35.i2c_host_perf.3903962535 |
|
|
Oct 02 08:49:45 PM UTC 24 |
Oct 02 08:54:18 PM UTC 24 |
48508882299 ps |
| T1465 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_fmt_empty.3551612916 |
|
|
Oct 02 08:54:11 PM UTC 24 |
Oct 02 08:54:19 PM UTC 24 |
259283477 ps |
| T1466 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_rx.3919008293 |
|
|
Oct 02 08:54:12 PM UTC 24 |
Oct 02 08:54:20 PM UTC 24 |
182699429 ps |
| T1467 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_host_error_intr.1541078548 |
|
|
Oct 02 08:54:17 PM UTC 24 |
Oct 02 08:54:21 PM UTC 24 |
279980951 ps |
| T1468 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_target_stretch.922209180 |
|
|
Oct 02 08:54:22 PM UTC 24 |
Oct 02 08:54:26 PM UTC 24 |
886661358 ps |
| T1469 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_host_perf_precise.2293362679 |
|
|
Oct 02 08:54:12 PM UTC 24 |
Oct 02 08:54:26 PM UTC 24 |
439322819 ps |
| T1470 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_full.1374180498 |
|
|
Oct 02 08:53:36 PM UTC 24 |
Oct 02 08:54:29 PM UTC 24 |
2111425880 ps |
| T1471 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_host_smoke.396695964 |
|
|
Oct 02 08:54:09 PM UTC 24 |
Oct 02 08:54:35 PM UTC 24 |
6895754041 ps |
| T1472 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_target_intr_smoke.3648853408 |
|
|
Oct 02 08:54:22 PM UTC 24 |
Oct 02 08:54:35 PM UTC 24 |
1284593148 ps |
| T1473 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_target_smoke.1572213139 |
|
|
Oct 02 08:54:20 PM UTC 24 |
Oct 02 08:54:36 PM UTC 24 |
3373351086 ps |
| T1474 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_target_stress_wr.1280319266 |
|
|
Oct 02 08:54:21 PM UTC 24 |
Oct 02 08:54:37 PM UTC 24 |
10395589589 ps |
| T133 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/35.i2c_host_stress_all.1828710872 |
|
|
Oct 02 08:49:48 PM UTC 24 |
Oct 02 08:54:37 PM UTC 24 |
72870612804 ps |
| T1475 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_acq.1269817318 |
|
|
Oct 02 08:54:35 PM UTC 24 |
Oct 02 08:54:37 PM UTC 24 |
527663104 ps |
| T236 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_tx.405481024 |
|
|
Oct 02 08:54:36 PM UTC 24 |
Oct 02 08:54:39 PM UTC 24 |
681701209 ps |
| T1476 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_target_timeout.374271337 |
|
|
Oct 02 08:54:27 PM UTC 24 |
Oct 02 08:54:40 PM UTC 24 |
4864183597 ps |
| T1477 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_full.290989893 |
|
|
Oct 02 08:51:54 PM UTC 24 |
Oct 02 08:54:42 PM UTC 24 |
8865453255 ps |
| T1478 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_target_perf.2413877354 |
|
|
Oct 02 08:54:36 PM UTC 24 |
Oct 02 08:54:43 PM UTC 24 |
2597417526 ps |
| T1479 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_target_hrst.2418743155 |
|
|
Oct 02 08:54:38 PM UTC 24 |
Oct 02 08:54:43 PM UTC 24 |
602291999 ps |
| T1480 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/38.i2c_target_intr_stress_wr.1058172555 |
|
|
Oct 02 08:51:38 PM UTC 24 |
Oct 02 08:54:44 PM UTC 24 |
11950078732 ps |
| T1481 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_tx.2710643818 |
|
|
Oct 02 08:54:41 PM UTC 24 |
Oct 02 08:54:44 PM UTC 24 |
140564082 ps |
| T1482 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_target_bad_addr.3043374240 |
|
|
Oct 02 08:54:38 PM UTC 24 |
Oct 02 08:54:45 PM UTC 24 |
739103423 ps |
| T1483 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_host_stretch_timeout.1437791529 |
|
|
Oct 02 08:54:15 PM UTC 24 |
Oct 02 08:54:45 PM UTC 24 |
9075856056 ps |
| T1484 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_acq.3986514233 |
|
|
Oct 02 08:54:41 PM UTC 24 |
Oct 02 08:54:46 PM UTC 24 |
1360971815 ps |
| T1485 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull.3046762718 |
|
|
Oct 02 08:54:44 PM UTC 24 |
Oct 02 08:54:50 PM UTC 24 |
604398450 ps |
| T1486 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_target_stress_rd.2250702040 |
|
|
Oct 02 08:54:21 PM UTC 24 |
Oct 02 08:54:50 PM UTC 24 |
6006338203 ps |
| T1487 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_host_may_nack.1921269417 |
|
|
Oct 02 08:54:40 PM UTC 24 |
Oct 02 08:54:50 PM UTC 24 |
2270231388 ps |
| T1488 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull_addr.380811992 |
|
|
Oct 02 08:54:45 PM UTC 24 |
Oct 02 08:54:50 PM UTC 24 |
1957609394 ps |
| T1489 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_fmt.223677050 |
|
|
Oct 02 08:54:49 PM UTC 24 |
Oct 02 08:54:52 PM UTC 24 |
132883606 ps |
| T1490 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_target_tx_stretch_ctrl.149535736 |
|
|
Oct 02 08:54:42 PM UTC 24 |
Oct 02 08:54:54 PM UTC 24 |
638969361 ps |
| T1491 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_overflow.3092667715 |
|
|
Oct 02 08:54:11 PM UTC 24 |
Oct 02 08:54:55 PM UTC 24 |
1647515506 ps |
| T1492 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_rx.2145918605 |
|
|
Oct 02 08:54:51 PM UTC 24 |
Oct 02 08:54:59 PM UTC 24 |
182206024 ps |
| T1493 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_fmt_empty.1281306319 |
|
|
Oct 02 08:54:50 PM UTC 24 |
Oct 02 08:55:02 PM UTC 24 |
671631280 ps |
| T1494 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_host_stretch_timeout.3673318239 |
|
|
Oct 02 08:54:53 PM UTC 24 |
Oct 02 08:55:04 PM UTC 24 |
4284081850 ps |
| T1495 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_host_perf_precise.678171465 |
|
|
Oct 02 08:54:52 PM UTC 24 |
Oct 02 08:55:07 PM UTC 24 |
285049076 ps |
| T1496 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_target_stretch.3841458819 |
|
|
Oct 02 08:55:05 PM UTC 24 |
Oct 02 08:55:09 PM UTC 24 |
2114905787 ps |
| T1497 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_target_smoke.2010867578 |
|
|
Oct 02 08:54:58 PM UTC 24 |
Oct 02 08:55:09 PM UTC 24 |
2433183341 ps |
| T1498 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_target_stress_all.1116500534 |
|
|
Oct 02 08:42:36 PM UTC 24 |
Oct 02 08:55:12 PM UTC 24 |
38305879326 ps |
| T1499 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_watermark.830641207 |
|
|
Oct 02 08:53:00 PM UTC 24 |
Oct 02 08:55:14 PM UTC 24 |
20072727604 ps |
| T1500 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_target_intr_smoke.679103999 |
|
|
Oct 02 08:55:09 PM UTC 24 |
Oct 02 08:55:17 PM UTC 24 |
1923572538 ps |
| T1501 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_target_timeout.127297167 |
|
|
Oct 02 08:55:10 PM UTC 24 |
Oct 02 08:55:18 PM UTC 24 |
3025342178 ps |
| T1502 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_acq.1932365321 |
|
|
Oct 02 08:55:15 PM UTC 24 |
Oct 02 08:55:18 PM UTC 24 |
710415312 ps |
| T1503 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_target_intr_stress_wr.1892617748 |
|
|
Oct 02 08:54:26 PM UTC 24 |
Oct 02 08:55:19 PM UTC 24 |
21948618535 ps |
| T1504 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/37.i2c_target_stress_all.1950896884 |
|
|
Oct 02 08:51:11 PM UTC 24 |
Oct 02 08:55:19 PM UTC 24 |
85087845630 ps |
| T1505 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_tx.220911830 |
|
|
Oct 02 08:55:16 PM UTC 24 |
Oct 02 08:55:20 PM UTC 24 |
651886240 ps |
| T1506 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_watermark.3756016515 |
|
|
Oct 02 08:54:10 PM UTC 24 |
Oct 02 08:55:21 PM UTC 24 |
3022337315 ps |
| T1507 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_target_perf.157006866 |
|
|
Oct 02 08:55:17 PM UTC 24 |
Oct 02 08:55:24 PM UTC 24 |
2259532863 ps |
| T1508 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/36.i2c_target_stress_all.2014190442 |
|
|
Oct 02 08:50:38 PM UTC 24 |
Oct 02 08:55:25 PM UTC 24 |
28488084958 ps |
| T1509 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/46.i2c_host_fifo_reset_rx.1518225492 |
|
|
Oct 02 08:56:12 PM UTC 24 |
Oct 02 08:56:21 PM UTC 24 |
866358271 ps |
| T1510 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_host_smoke.2733165615 |
|
|
Oct 02 08:54:46 PM UTC 24 |
Oct 02 08:55:25 PM UTC 24 |
3489616492 ps |
| T1511 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_watermarks_acq.1459487715 |
|
|
Oct 02 08:55:22 PM UTC 24 |
Oct 02 08:55:26 PM UTC 24 |
434225403 ps |
| T1512 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_target_stress_all.1254085525 |
|
|
Oct 02 08:52:47 PM UTC 24 |
Oct 02 08:55:27 PM UTC 24 |
49730312604 ps |
| T1513 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_target_bad_addr.2287433799 |
|
|
Oct 02 08:55:19 PM UTC 24 |
Oct 02 08:55:27 PM UTC 24 |
765765826 ps |
| T1514 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_full.2506076239 |
|
|
Oct 02 08:53:01 PM UTC 24 |
Oct 02 08:55:28 PM UTC 24 |
3383377006 ps |
| T1515 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_watermarks_tx.3663442220 |
|
|
Oct 02 08:55:25 PM UTC 24 |
Oct 02 08:55:28 PM UTC 24 |
165795213 ps |
| T1516 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_target_intr_stress_wr.3798206220 |
|
|
Oct 02 08:55:10 PM UTC 24 |
Oct 02 08:55:29 PM UTC 24 |
10818373703 ps |
| T1517 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_alert_test.477768608 |
|
|
Oct 02 08:55:28 PM UTC 24 |
Oct 02 08:55:30 PM UTC 24 |
15246283 ps |
| T1518 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_host_override.1371475506 |
|
|
Oct 02 08:55:28 PM UTC 24 |
Oct 02 08:55:30 PM UTC 24 |
25777052 ps |
| T1519 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_target_smbus_maxlen.3740747202 |
|
|
Oct 02 08:55:26 PM UTC 24 |
Oct 02 08:55:31 PM UTC 24 |
2392621314 ps |
| T1520 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_target_nack_txstretch.1900733889 |
|
|
Oct 02 08:55:28 PM UTC 24 |
Oct 02 08:55:31 PM UTC 24 |
268559018 ps |
| T1521 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/46.i2c_host_error_intr.3209708501 |
|
|
Oct 02 08:56:17 PM UTC 24 |
Oct 02 08:56:21 PM UTC 24 |
386995878 ps |
| T1522 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_target_nack_acqfull_addr.3448112505 |
|
|
Oct 02 08:55:27 PM UTC 24 |
Oct 02 08:55:32 PM UTC 24 |
443877819 ps |
| T1523 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_target_nack_acqfull.128754396 |
|
|
Oct 02 08:55:26 PM UTC 24 |
Oct 02 08:55:33 PM UTC 24 |
1159441626 ps |
| T1524 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_fmt.3134780092 |
|
|
Oct 02 08:55:32 PM UTC 24 |
Oct 02 08:55:35 PM UTC 24 |
289652884 ps |
| T1525 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_target_tx_stretch_ctrl.4153536556 |
|
|
Oct 02 08:55:26 PM UTC 24 |
Oct 02 08:55:36 PM UTC 24 |
258885246 ps |
| T1526 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_full.1743683013 |
|
|
Oct 02 08:52:25 PM UTC 24 |
Oct 02 08:55:36 PM UTC 24 |
5939031241 ps |
| T1527 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_watermark.3381107779 |
|
|
Oct 02 08:50:52 PM UTC 24 |
Oct 02 08:55:37 PM UTC 24 |
4513511655 ps |
| T1528 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_host_error_intr.2442791441 |
|
|
Oct 02 08:55:36 PM UTC 24 |
Oct 02 08:55:40 PM UTC 24 |
86455524 ps |
| T1529 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_target_stress_rd.3951941632 |
|
|
Oct 02 08:55:02 PM UTC 24 |
Oct 02 08:55:41 PM UTC 24 |
1876109071 ps |
| T1530 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_rx.1415278138 |
|
|
Oct 02 08:55:33 PM UTC 24 |
Oct 02 08:55:42 PM UTC 24 |
264905271 ps |
| T1531 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/1.i2c_host_perf_precise.4144383991 |
|
|
Oct 02 08:20:23 PM UTC 24 |
Oct 02 08:55:44 PM UTC 24 |
23213860342 ps |
| T1532 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_host_may_nack.2830590683 |
|
|
Oct 02 08:55:21 PM UTC 24 |
Oct 02 08:55:46 PM UTC 24 |
1207017251 ps |
| T1533 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_watermark.2098584701 |
|
|
Oct 02 08:51:53 PM UTC 24 |
Oct 02 08:55:46 PM UTC 24 |
15610653918 ps |
| T1534 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_fmt_empty.1855033020 |
|
|
Oct 02 08:55:32 PM UTC 24 |
Oct 02 08:55:48 PM UTC 24 |
260772305 ps |
| T1535 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_watermark.1934883818 |
|
|
Oct 02 08:53:33 PM UTC 24 |
Oct 02 08:55:52 PM UTC 24 |
11268454213 ps |
| T1536 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_target_stress_all.4278758587 |
|
|
Oct 02 08:53:19 PM UTC 24 |
Oct 02 08:55:54 PM UTC 24 |
14035570286 ps |
| T1537 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_target_intr_smoke.233407716 |
|
|
Oct 02 08:55:45 PM UTC 24 |
Oct 02 08:55:55 PM UTC 24 |
857586431 ps |
| T1538 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/42.i2c_target_stress_wr.2057446630 |
|
|
Oct 02 08:53:44 PM UTC 24 |
Oct 02 08:55:55 PM UTC 24 |
26717698022 ps |
| T1539 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_reset_acq.2060897400 |
|
|
Oct 02 08:55:52 PM UTC 24 |
Oct 02 08:55:55 PM UTC 24 |
198828185 ps |
| T1540 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_reset_tx.103538417 |
|
|
Oct 02 08:55:54 PM UTC 24 |
Oct 02 08:55:57 PM UTC 24 |
498140086 ps |
| T1541 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_target_intr_stress_wr.976164792 |
|
|
Oct 02 08:53:11 PM UTC 24 |
Oct 02 08:55:57 PM UTC 24 |
21626130746 ps |
| T1542 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_target_smoke.2625208795 |
|
|
Oct 02 08:55:38 PM UTC 24 |
Oct 02 08:56:00 PM UTC 24 |
1114724052 ps |
| T270 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_host_mode_toggle.2336834661 |
|
|
Oct 02 08:55:58 PM UTC 24 |
Oct 02 08:56:02 PM UTC 24 |
122062066 ps |
| T1543 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_target_timeout.361227208 |
|
|
Oct 02 08:55:47 PM UTC 24 |
Oct 02 08:56:02 PM UTC 24 |
1320769004 ps |
| T1544 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_target_perf.317125177 |
|
|
Oct 02 08:55:55 PM UTC 24 |
Oct 02 08:56:05 PM UTC 24 |
2795628526 ps |
| T1545 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_watermarks_tx.449986277 |
|
|
Oct 02 08:56:02 PM UTC 24 |
Oct 02 08:56:05 PM UTC 24 |
814522990 ps |
| T1546 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_watermarks_acq.1872023980 |
|
|
Oct 02 08:56:01 PM UTC 24 |
Oct 02 08:56:05 PM UTC 24 |
494794927 ps |
| T1547 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_target_bad_addr.1199856973 |
|
|
Oct 02 08:55:57 PM UTC 24 |
Oct 02 08:56:05 PM UTC 24 |
3146437205 ps |
| T1548 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_target_tx_stretch_ctrl.127952208 |
|
|
Oct 02 08:56:02 PM UTC 24 |
Oct 02 08:56:05 PM UTC 24 |
163329722 ps |
| T1549 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_target_stretch.393965434 |
|
|
Oct 02 08:55:43 PM UTC 24 |
Oct 02 08:56:08 PM UTC 24 |
4899285576 ps |
| T1550 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_alert_test.820998174 |
|
|
Oct 02 08:56:07 PM UTC 24 |
Oct 02 08:56:09 PM UTC 24 |
28306624 ps |
| T1551 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_host_may_nack.3302617259 |
|
|
Oct 02 08:55:59 PM UTC 24 |
Oct 02 08:56:09 PM UTC 24 |
521330344 ps |
| T1552 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_target_nack_txstretch.2490323191 |
|
|
Oct 02 08:56:06 PM UTC 24 |
Oct 02 08:56:09 PM UTC 24 |
131437858 ps |
| T1553 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_overflow.1663705470 |
|
|
Oct 02 08:53:00 PM UTC 24 |
Oct 02 08:56:09 PM UTC 24 |
9578526825 ps |
| T1554 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_target_smbus_maxlen.3480469983 |
|
|
Oct 02 08:56:05 PM UTC 24 |
Oct 02 08:56:10 PM UTC 24 |
377112691 ps |
| T1555 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_target_nack_acqfull.3632165325 |
|
|
Oct 02 08:56:06 PM UTC 24 |
Oct 02 08:56:11 PM UTC 24 |
542785315 ps |
| T1556 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/46.i2c_host_override.2711455834 |
|
|
Oct 02 08:56:10 PM UTC 24 |
Oct 02 08:56:12 PM UTC 24 |
80787600 ps |
| T1557 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_target_nack_acqfull_addr.1116199116 |
|
|
Oct 02 08:56:06 PM UTC 24 |
Oct 02 08:56:12 PM UTC 24 |
495722481 ps |
| T1558 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/46.i2c_host_fifo_reset_fmt.1209271802 |
|
|
Oct 02 08:56:11 PM UTC 24 |
Oct 02 08:56:13 PM UTC 24 |
173943164 ps |
| T1559 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_overflow.2779213098 |
|
|
Oct 02 08:54:49 PM UTC 24 |
Oct 02 08:56:24 PM UTC 24 |
1374428092 ps |
| T1560 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_host_stretch_timeout.3837287490 |
|
|
Oct 02 08:55:36 PM UTC 24 |
Oct 02 08:56:16 PM UTC 24 |
708505382 ps |
| T1561 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/46.i2c_host_perf_precise.677218332 |
|
|
Oct 02 08:56:14 PM UTC 24 |
Oct 02 08:56:18 PM UTC 24 |
85550801 ps |
| T1562 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_target_intr_stress_wr.2601964440 |
|
|
Oct 02 08:55:47 PM UTC 24 |
Oct 02 08:56:31 PM UTC 24 |
4150846198 ps |
| T1563 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/45.i2c_target_stress_rd.3681268526 |
|
|
Oct 02 08:55:42 PM UTC 24 |
Oct 02 08:56:34 PM UTC 24 |
7805013071 ps |