| T630 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_target_perf.3575689361 |
|
|
Oct 02 08:35:46 PM UTC 24 |
Oct 02 08:35:54 PM UTC 24 |
5807323852 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_target_bad_addr.1603029695 |
|
|
Oct 02 08:35:50 PM UTC 24 |
Oct 02 08:35:55 PM UTC 24 |
1271091271 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_target_timeout.1319713076 |
|
|
Oct 02 08:35:42 PM UTC 24 |
Oct 02 08:35:55 PM UTC 24 |
2595258433 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_watermarks_tx.3499218986 |
|
|
Oct 02 08:35:53 PM UTC 24 |
Oct 02 08:35:55 PM UTC 24 |
362689611 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_watermarks_acq.2083842792 |
|
|
Oct 02 08:35:51 PM UTC 24 |
Oct 02 08:35:56 PM UTC 24 |
1388117473 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_host_stretch_timeout.4085988224 |
|
|
Oct 02 08:35:26 PM UTC 24 |
Oct 02 08:35:57 PM UTC 24 |
714958484 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_alert_test.2553075992 |
|
|
Oct 02 08:35:57 PM UTC 24 |
Oct 02 08:35:59 PM UTC 24 |
15421238 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_target_smbus_maxlen.1873825133 |
|
|
Oct 02 08:35:55 PM UTC 24 |
Oct 02 08:35:59 PM UTC 24 |
1952140784 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_target_nack_txstretch.94624282 |
|
|
Oct 02 08:35:56 PM UTC 24 |
Oct 02 08:35:59 PM UTC 24 |
131168438 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_target_tx_stretch_ctrl.2875129149 |
|
|
Oct 02 08:35:55 PM UTC 24 |
Oct 02 08:36:01 PM UTC 24 |
294348740 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_target_nack_acqfull_addr.3963773150 |
|
|
Oct 02 08:35:56 PM UTC 24 |
Oct 02 08:36:01 PM UTC 24 |
2319986631 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_target_nack_acqfull.1333028189 |
|
|
Oct 02 08:35:56 PM UTC 24 |
Oct 02 08:36:01 PM UTC 24 |
562108224 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_host_override.1821673783 |
|
|
Oct 02 08:36:00 PM UTC 24 |
Oct 02 08:36:02 PM UTC 24 |
28064155 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_reset_fmt.914781012 |
|
|
Oct 02 08:36:01 PM UTC 24 |
Oct 02 08:36:04 PM UTC 24 |
146973567 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_overflow.481040819 |
|
|
Oct 02 08:34:50 PM UTC 24 |
Oct 02 08:36:04 PM UTC 24 |
6986447563 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_target_intr_stress_wr.3718559463 |
|
|
Oct 02 08:35:36 PM UTC 24 |
Oct 02 08:36:07 PM UTC 24 |
14608273206 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_full.2295886539 |
|
|
Oct 02 08:33:31 PM UTC 24 |
Oct 02 08:36:08 PM UTC 24 |
10364689906 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_fmt_empty.3624768680 |
|
|
Oct 02 08:36:02 PM UTC 24 |
Oct 02 08:36:09 PM UTC 24 |
3205067452 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_reset_rx.717969703 |
|
|
Oct 02 08:36:03 PM UTC 24 |
Oct 02 08:36:14 PM UTC 24 |
146634413 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_host_stretch_timeout.1483567652 |
|
|
Oct 02 08:36:08 PM UTC 24 |
Oct 02 08:36:18 PM UTC 24 |
1453120112 ps |
| T276 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/8.i2c_target_stress_all.3284470540 |
|
|
Oct 02 08:29:52 PM UTC 24 |
Oct 02 08:36:20 PM UTC 24 |
24592411613 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_host_may_nack.1708624777 |
|
|
Oct 02 08:35:51 PM UTC 24 |
Oct 02 08:36:20 PM UTC 24 |
504958477 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_rx.957213712 |
|
|
Oct 02 08:43:57 PM UTC 24 |
Oct 02 08:44:14 PM UTC 24 |
1011267866 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_target_stretch.2417321944 |
|
|
Oct 02 08:36:21 PM UTC 24 |
Oct 02 08:36:24 PM UTC 24 |
230998853 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_reset_acq.3480089937 |
|
|
Oct 02 08:36:21 PM UTC 24 |
Oct 02 08:36:24 PM UTC 24 |
359470620 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_target_intr_smoke.3100089211 |
|
|
Oct 02 08:36:21 PM UTC 24 |
Oct 02 08:36:26 PM UTC 24 |
870782267 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_reset_tx.304016900 |
|
|
Oct 02 08:36:24 PM UTC 24 |
Oct 02 08:36:27 PM UTC 24 |
443105776 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_overflow.1760156540 |
|
|
Oct 02 08:35:20 PM UTC 24 |
Oct 02 08:36:30 PM UTC 24 |
2121567995 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_target_stress_rd.4000573441 |
|
|
Oct 02 08:36:14 PM UTC 24 |
Oct 02 08:36:33 PM UTC 24 |
962243942 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_target_timeout.2206990134 |
|
|
Oct 02 08:36:21 PM UTC 24 |
Oct 02 08:36:33 PM UTC 24 |
1346948771 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_host_perf.1478018722 |
|
|
Oct 02 08:33:32 PM UTC 24 |
Oct 02 08:36:34 PM UTC 24 |
12905447873 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_full.2695267630 |
|
|
Oct 02 08:35:24 PM UTC 24 |
Oct 02 08:36:35 PM UTC 24 |
9928232642 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_full.4270630521 |
|
|
Oct 02 08:42:01 PM UTC 24 |
Oct 02 08:44:17 PM UTC 24 |
3777506007 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_target_perf.425594908 |
|
|
Oct 02 08:36:24 PM UTC 24 |
Oct 02 08:36:35 PM UTC 24 |
865012809 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_target_bad_addr.2751466853 |
|
|
Oct 02 08:36:28 PM UTC 24 |
Oct 02 08:36:36 PM UTC 24 |
1860492986 ps |
| T118 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_watermark.3347836793 |
|
|
Oct 02 08:35:20 PM UTC 24 |
Oct 02 08:36:37 PM UTC 24 |
3214311939 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_watermarks_tx.4104744248 |
|
|
Oct 02 08:36:35 PM UTC 24 |
Oct 02 08:36:38 PM UTC 24 |
122653374 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_watermarks_acq.4105509378 |
|
|
Oct 02 08:36:34 PM UTC 24 |
Oct 02 08:36:38 PM UTC 24 |
213581156 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_watermark.447660495 |
|
|
Oct 02 08:32:33 PM UTC 24 |
Oct 02 08:36:38 PM UTC 24 |
7913902269 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_alert_test.3658919622 |
|
|
Oct 02 08:36:39 PM UTC 24 |
Oct 02 08:36:41 PM UTC 24 |
16991884 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_target_nack_txstretch.594237694 |
|
|
Oct 02 08:36:38 PM UTC 24 |
Oct 02 08:36:41 PM UTC 24 |
1172089163 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_host_override.1780260537 |
|
|
Oct 02 08:36:39 PM UTC 24 |
Oct 02 08:36:41 PM UTC 24 |
27335911 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_target_smbus_maxlen.2051918359 |
|
|
Oct 02 08:36:36 PM UTC 24 |
Oct 02 08:36:41 PM UTC 24 |
629979558 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_target_nack_acqfull.3412031700 |
|
|
Oct 02 08:36:36 PM UTC 24 |
Oct 02 08:36:42 PM UTC 24 |
2396712777 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_target_nack_acqfull_addr.619957086 |
|
|
Oct 02 08:36:38 PM UTC 24 |
Oct 02 08:36:43 PM UTC 24 |
2208986274 ps |
| T247 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_reset_fmt.3298981934 |
|
|
Oct 02 08:36:42 PM UTC 24 |
Oct 02 08:36:45 PM UTC 24 |
105581383 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_target_tx_stretch_ctrl.2528177301 |
|
|
Oct 02 08:36:36 PM UTC 24 |
Oct 02 08:36:45 PM UTC 24 |
342250932 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_overflow.3112656715 |
|
|
Oct 02 08:36:00 PM UTC 24 |
Oct 02 08:36:54 PM UTC 24 |
1739877692 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_reset_rx.81346880 |
|
|
Oct 02 08:36:43 PM UTC 24 |
Oct 02 08:36:55 PM UTC 24 |
199231434 ps |
| T291 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_target_stress_all.303215993 |
|
|
Oct 02 08:35:48 PM UTC 24 |
Oct 02 08:37:00 PM UTC 24 |
76373620145 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_host_error_intr.1570282811 |
|
|
Oct 02 08:36:55 PM UTC 24 |
Oct 02 08:37:01 PM UTC 24 |
281495760 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_host_may_nack.1446059509 |
|
|
Oct 02 08:36:33 PM UTC 24 |
Oct 02 08:37:02 PM UTC 24 |
2123443288 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_fmt_empty.3168188529 |
|
|
Oct 02 08:36:42 PM UTC 24 |
Oct 02 08:37:05 PM UTC 24 |
769363943 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_target_smoke.600827449 |
|
|
Oct 02 08:36:14 PM UTC 24 |
Oct 02 08:37:05 PM UTC 24 |
1366828498 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_host_perf.104818732 |
|
|
Oct 02 08:36:45 PM UTC 24 |
Oct 02 08:37:08 PM UTC 24 |
3298082474 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_host_smoke.4147126872 |
|
|
Oct 02 08:35:57 PM UTC 24 |
Oct 02 08:37:11 PM UTC 24 |
4785884461 ps |
| T119 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_watermark.1624678296 |
|
|
Oct 02 08:36:00 PM UTC 24 |
Oct 02 08:37:12 PM UTC 24 |
13162912243 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_host_stretch_timeout.3782860 |
|
|
Oct 02 08:36:52 PM UTC 24 |
Oct 02 08:37:17 PM UTC 24 |
2519294998 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_reset_acq.3418997928 |
|
|
Oct 02 08:37:18 PM UTC 24 |
Oct 02 08:37:20 PM UTC 24 |
207487227 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_reset_tx.2442707956 |
|
|
Oct 02 08:37:18 PM UTC 24 |
Oct 02 08:37:20 PM UTC 24 |
439065134 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_target_stretch.580370414 |
|
|
Oct 02 08:37:06 PM UTC 24 |
Oct 02 08:37:21 PM UTC 24 |
3366906293 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_target_intr_smoke.3166902622 |
|
|
Oct 02 08:37:06 PM UTC 24 |
Oct 02 08:37:22 PM UTC 24 |
1650682440 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_target_timeout.4092683675 |
|
|
Oct 02 08:37:12 PM UTC 24 |
Oct 02 08:37:23 PM UTC 24 |
17383682926 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_target_stress_all.3156393840 |
|
|
Oct 02 08:36:26 PM UTC 24 |
Oct 02 08:37:25 PM UTC 24 |
11359743288 ps |
| T274 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_target_perf.1077333893 |
|
|
Oct 02 08:37:21 PM UTC 24 |
Oct 02 08:37:28 PM UTC 24 |
743069231 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_watermarks_tx.3865898801 |
|
|
Oct 02 08:37:27 PM UTC 24 |
Oct 02 08:37:30 PM UTC 24 |
274638596 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_target_bad_addr.4081575231 |
|
|
Oct 02 08:37:22 PM UTC 24 |
Oct 02 08:37:30 PM UTC 24 |
705993284 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_fmt_empty.833712173 |
|
|
Oct 02 08:43:57 PM UTC 24 |
Oct 02 08:44:12 PM UTC 24 |
3755075628 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_target_stress_all.1349729423 |
|
|
Oct 02 08:35:11 PM UTC 24 |
Oct 02 08:37:31 PM UTC 24 |
56802984643 ps |
| T81 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_target_smoke.2807245417 |
|
|
Oct 02 08:37:01 PM UTC 24 |
Oct 02 08:37:31 PM UTC 24 |
4286468032 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_watermarks_acq.862468953 |
|
|
Oct 02 08:37:27 PM UTC 24 |
Oct 02 08:37:32 PM UTC 24 |
1050016284 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/10.i2c_target_stress_wr.2900929056 |
|
|
Oct 02 08:32:09 PM UTC 24 |
Oct 02 08:37:33 PM UTC 24 |
50005076816 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_alert_test.3164700462 |
|
|
Oct 02 08:37:32 PM UTC 24 |
Oct 02 08:37:34 PM UTC 24 |
16495129 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_target_tx_stretch_ctrl.3911071314 |
|
|
Oct 02 08:37:29 PM UTC 24 |
Oct 02 08:37:35 PM UTC 24 |
122714689 ps |
| T272 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_host_may_nack.3231258210 |
|
|
Oct 02 08:37:25 PM UTC 24 |
Oct 02 08:37:35 PM UTC 24 |
1934506582 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_alert_test.2701789261 |
|
|
Oct 02 08:38:54 PM UTC 24 |
Oct 02 08:38:56 PM UTC 24 |
17652133 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_target_smbus_maxlen.3988942382 |
|
|
Oct 02 08:37:30 PM UTC 24 |
Oct 02 08:37:36 PM UTC 24 |
979601073 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_host_override.706911069 |
|
|
Oct 02 08:37:34 PM UTC 24 |
Oct 02 08:37:36 PM UTC 24 |
28780854 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_target_nack_acqfull.1734754774 |
|
|
Oct 02 08:37:31 PM UTC 24 |
Oct 02 08:37:36 PM UTC 24 |
502697357 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_target_nack_acqfull_addr.2262839872 |
|
|
Oct 02 08:37:32 PM UTC 24 |
Oct 02 08:37:36 PM UTC 24 |
810117268 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_reset_fmt.30479331 |
|
|
Oct 02 08:37:36 PM UTC 24 |
Oct 02 08:37:39 PM UTC 24 |
85537815 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_overflow.2772870999 |
|
|
Oct 02 08:36:42 PM UTC 24 |
Oct 02 08:37:43 PM UTC 24 |
1851955712 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_watermark.1745671155 |
|
|
Oct 02 08:36:42 PM UTC 24 |
Oct 02 08:37:43 PM UTC 24 |
10894650187 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_target_intr_stress_wr.2366933398 |
|
|
Oct 02 08:37:09 PM UTC 24 |
Oct 02 08:37:45 PM UTC 24 |
22887366636 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_fmt_empty.2255371825 |
|
|
Oct 02 08:37:36 PM UTC 24 |
Oct 02 08:37:47 PM UTC 24 |
435336855 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_host_error_intr.743631023 |
|
|
Oct 02 08:37:44 PM UTC 24 |
Oct 02 08:37:50 PM UTC 24 |
193932486 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_reset_rx.3619279382 |
|
|
Oct 02 08:37:36 PM UTC 24 |
Oct 02 08:37:51 PM UTC 24 |
724280141 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/15.i2c_target_stress_wr.4190632111 |
|
|
Oct 02 08:35:31 PM UTC 24 |
Oct 02 08:37:54 PM UTC 24 |
37880753457 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_host_stretch_timeout.882291881 |
|
|
Oct 02 08:37:40 PM UTC 24 |
Oct 02 08:37:56 PM UTC 24 |
5253692839 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_target_intr_stress_wr.293311676 |
|
|
Oct 02 08:36:21 PM UTC 24 |
Oct 02 08:37:56 PM UTC 24 |
29857932564 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_host_smoke.1011608639 |
|
|
Oct 02 08:36:39 PM UTC 24 |
Oct 02 08:37:59 PM UTC 24 |
2379176847 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_target_stretch.1951054702 |
|
|
Oct 02 08:37:51 PM UTC 24 |
Oct 02 08:38:00 PM UTC 24 |
1159990980 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_target_smoke.3708349873 |
|
|
Oct 02 08:37:46 PM UTC 24 |
Oct 02 08:38:03 PM UTC 24 |
984727400 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_target_stress_rd.557824310 |
|
|
Oct 02 08:37:51 PM UTC 24 |
Oct 02 08:38:03 PM UTC 24 |
9546275464 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_reset_acq.4190431124 |
|
|
Oct 02 08:38:01 PM UTC 24 |
Oct 02 08:38:04 PM UTC 24 |
295861969 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_target_intr_smoke.284279634 |
|
|
Oct 02 08:37:54 PM UTC 24 |
Oct 02 08:38:05 PM UTC 24 |
1083250333 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_reset_tx.3612538509 |
|
|
Oct 02 08:38:04 PM UTC 24 |
Oct 02 08:38:07 PM UTC 24 |
1581978761 ps |
| T294 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/13.i2c_target_stress_all.1465983975 |
|
|
Oct 02 08:34:34 PM UTC 24 |
Oct 02 08:38:07 PM UTC 24 |
64331559845 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_host_perf_precise.2657061674 |
|
|
Oct 02 08:37:38 PM UTC 24 |
Oct 02 08:38:08 PM UTC 24 |
2441923386 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_full.3292205475 |
|
|
Oct 02 08:36:03 PM UTC 24 |
Oct 02 08:38:08 PM UTC 24 |
2404232731 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_target_timeout.3540414072 |
|
|
Oct 02 08:37:57 PM UTC 24 |
Oct 02 08:38:10 PM UTC 24 |
1535941298 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_full.1852535278 |
|
|
Oct 02 08:36:43 PM UTC 24 |
Oct 02 08:38:10 PM UTC 24 |
2759466188 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_watermarks_tx.2412607980 |
|
|
Oct 02 08:38:09 PM UTC 24 |
Oct 02 08:38:12 PM UTC 24 |
222130051 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_target_bad_addr.1837265606 |
|
|
Oct 02 08:38:05 PM UTC 24 |
Oct 02 08:38:12 PM UTC 24 |
4721207236 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_target_stress_rd.1530801943 |
|
|
Oct 02 08:37:02 PM UTC 24 |
Oct 02 08:38:13 PM UTC 24 |
1416366999 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_target_perf.3468720757 |
|
|
Oct 02 08:38:04 PM UTC 24 |
Oct 02 08:38:14 PM UTC 24 |
922232038 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_watermarks_acq.3249587961 |
|
|
Oct 02 08:38:08 PM UTC 24 |
Oct 02 08:38:14 PM UTC 24 |
403089953 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_target_tx_stretch_ctrl.3322301595 |
|
|
Oct 02 08:38:11 PM UTC 24 |
Oct 02 08:38:15 PM UTC 24 |
124532127 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_target_smbus_maxlen.2811405903 |
|
|
Oct 02 08:38:11 PM UTC 24 |
Oct 02 08:38:15 PM UTC 24 |
492512976 ps |
| T52 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_target_nack_acqfull.2174915421 |
|
|
Oct 02 08:38:12 PM UTC 24 |
Oct 02 08:38:16 PM UTC 24 |
3640604194 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_alert_test.2890129721 |
|
|
Oct 02 08:38:14 PM UTC 24 |
Oct 02 08:38:17 PM UTC 24 |
18227068 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_host_override.2860255468 |
|
|
Oct 02 08:38:15 PM UTC 24 |
Oct 02 08:38:17 PM UTC 24 |
65422942 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_host_may_nack.2809288883 |
|
|
Oct 02 08:38:07 PM UTC 24 |
Oct 02 08:38:18 PM UTC 24 |
775626913 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_reset_fmt.2781553422 |
|
|
Oct 02 08:38:16 PM UTC 24 |
Oct 02 08:38:19 PM UTC 24 |
99241693 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_target_nack_acqfull_addr.3492003497 |
|
|
Oct 02 08:38:13 PM UTC 24 |
Oct 02 08:38:19 PM UTC 24 |
660826149 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_full.2252242858 |
|
|
Oct 02 08:34:52 PM UTC 24 |
Oct 02 08:38:19 PM UTC 24 |
5522576844 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_overflow.3685118508 |
|
|
Oct 02 08:37:36 PM UTC 24 |
Oct 02 08:38:19 PM UTC 24 |
10463608427 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_target_intr_smoke.3562813721 |
|
|
Oct 02 08:40:27 PM UTC 24 |
Oct 02 08:40:36 PM UTC 24 |
779939991 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/3.i2c_target_stress_all.1138808639 |
|
|
Oct 02 08:24:05 PM UTC 24 |
Oct 02 08:38:23 PM UTC 24 |
50107598362 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_reset_rx.1803593256 |
|
|
Oct 02 08:38:18 PM UTC 24 |
Oct 02 08:38:23 PM UTC 24 |
263473188 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_host_error_intr.2553666237 |
|
|
Oct 02 08:38:21 PM UTC 24 |
Oct 02 08:38:26 PM UTC 24 |
151676931 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_fmt_empty.111396715 |
|
|
Oct 02 08:38:17 PM UTC 24 |
Oct 02 08:38:31 PM UTC 24 |
428687955 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_target_stress_all.4170391333 |
|
|
Oct 02 08:37:22 PM UTC 24 |
Oct 02 08:38:31 PM UTC 24 |
13781454117 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_host_smoke.562159033 |
|
|
Oct 02 08:37:33 PM UTC 24 |
Oct 02 08:38:34 PM UTC 24 |
5289302379 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_host_perf.3926927617 |
|
|
Oct 02 08:37:38 PM UTC 24 |
Oct 02 08:38:35 PM UTC 24 |
12997920907 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_reset_acq.10765907 |
|
|
Oct 02 08:38:39 PM UTC 24 |
Oct 02 08:38:42 PM UTC 24 |
152641783 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_target_intr_smoke.1130792889 |
|
|
Oct 02 08:38:32 PM UTC 24 |
Oct 02 08:38:43 PM UTC 24 |
1201854912 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_reset_tx.3906783796 |
|
|
Oct 02 08:38:43 PM UTC 24 |
Oct 02 08:38:46 PM UTC 24 |
176255198 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_host_stretch_timeout.1342386440 |
|
|
Oct 02 08:38:20 PM UTC 24 |
Oct 02 08:38:47 PM UTC 24 |
934324359 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_host_perf.1348351871 |
|
|
Oct 02 08:38:19 PM UTC 24 |
Oct 02 08:38:47 PM UTC 24 |
6619820198 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_target_timeout.3247050128 |
|
|
Oct 02 08:38:35 PM UTC 24 |
Oct 02 08:38:47 PM UTC 24 |
4566804707 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_host_smoke.825616093 |
|
|
Oct 02 08:38:15 PM UTC 24 |
Oct 02 08:38:49 PM UTC 24 |
8310451133 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_host_perf_precise.1999244515 |
|
|
Oct 02 08:36:46 PM UTC 24 |
Oct 02 08:38:50 PM UTC 24 |
2220881241 ps |
| T277 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_target_perf.2281428318 |
|
|
Oct 02 08:38:44 PM UTC 24 |
Oct 02 08:38:50 PM UTC 24 |
789831169 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/11.i2c_host_stress_all.809866745 |
|
|
Oct 02 08:32:42 PM UTC 24 |
Oct 02 08:38:51 PM UTC 24 |
24221590057 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_watermark.3537087038 |
|
|
Oct 02 08:33:18 PM UTC 24 |
Oct 02 08:38:51 PM UTC 24 |
39844911708 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_target_smoke.1653679627 |
|
|
Oct 02 08:38:24 PM UTC 24 |
Oct 02 08:38:52 PM UTC 24 |
867090665 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_target_stress_rd.3299961739 |
|
|
Oct 02 08:40:21 PM UTC 24 |
Oct 02 08:40:37 PM UTC 24 |
1138917764 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_watermarks_tx.3450889253 |
|
|
Oct 02 08:38:51 PM UTC 24 |
Oct 02 08:38:53 PM UTC 24 |
1094032697 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_target_hrst.3700260125 |
|
|
Oct 02 08:38:48 PM UTC 24 |
Oct 02 08:38:53 PM UTC 24 |
1151058352 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_target_timeout.428460255 |
|
|
Oct 02 08:40:27 PM UTC 24 |
Oct 02 08:40:37 PM UTC 24 |
3345425534 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_target_stress_rd.1678006030 |
|
|
Oct 02 08:38:26 PM UTC 24 |
Oct 02 08:38:55 PM UTC 24 |
4990102514 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_watermark.744017648 |
|
|
Oct 02 08:34:50 PM UTC 24 |
Oct 02 08:38:55 PM UTC 24 |
4059771707 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_host_may_nack.232821409 |
|
|
Oct 02 08:38:50 PM UTC 24 |
Oct 02 08:38:56 PM UTC 24 |
3636277227 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_watermarks_acq.620478118 |
|
|
Oct 02 08:38:51 PM UTC 24 |
Oct 02 08:38:56 PM UTC 24 |
3881360616 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_target_nack_txstretch.1001140661 |
|
|
Oct 02 08:38:54 PM UTC 24 |
Oct 02 08:38:57 PM UTC 24 |
254675761 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_target_smbus_maxlen.4247227983 |
|
|
Oct 02 08:38:52 PM UTC 24 |
Oct 02 08:38:57 PM UTC 24 |
1648460776 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_target_nack_acqfull.3648193653 |
|
|
Oct 02 08:38:53 PM UTC 24 |
Oct 02 08:38:57 PM UTC 24 |
1152009195 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_target_bad_addr.1417947285 |
|
|
Oct 02 08:38:47 PM UTC 24 |
Oct 02 08:38:57 PM UTC 24 |
2045627906 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_host_override.3770431727 |
|
|
Oct 02 08:38:55 PM UTC 24 |
Oct 02 08:38:57 PM UTC 24 |
26909267 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_target_tx_stretch_ctrl.2487575106 |
|
|
Oct 02 08:38:52 PM UTC 24 |
Oct 02 08:38:58 PM UTC 24 |
204222335 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_target_nack_acqfull_addr.3083833164 |
|
|
Oct 02 08:38:54 PM UTC 24 |
Oct 02 08:38:59 PM UTC 24 |
530599729 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_reset_fmt.3727966284 |
|
|
Oct 02 08:38:57 PM UTC 24 |
Oct 02 08:38:59 PM UTC 24 |
115826106 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_target_intr_stress_wr.272010250 |
|
|
Oct 02 08:38:32 PM UTC 24 |
Oct 02 08:39:00 PM UTC 24 |
15338353454 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_full.272565784 |
|
|
Oct 02 08:37:38 PM UTC 24 |
Oct 02 08:39:01 PM UTC 24 |
2842707431 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_host_error_intr.614786863 |
|
|
Oct 02 08:38:59 PM UTC 24 |
Oct 02 08:39:02 PM UTC 24 |
384906794 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_host_perf_precise.2390780733 |
|
|
Oct 02 08:38:58 PM UTC 24 |
Oct 02 08:39:04 PM UTC 24 |
824637667 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_overflow.3901660946 |
|
|
Oct 02 08:38:16 PM UTC 24 |
Oct 02 08:39:06 PM UTC 24 |
1860248376 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_fmt_empty.92219219 |
|
|
Oct 02 08:38:57 PM UTC 24 |
Oct 02 08:39:07 PM UTC 24 |
7823448562 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_target_stretch.2039651222 |
|
|
Oct 02 08:39:03 PM UTC 24 |
Oct 02 08:39:12 PM UTC 24 |
1156672668 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_reset_rx.1845102166 |
|
|
Oct 02 08:38:58 PM UTC 24 |
Oct 02 08:39:13 PM UTC 24 |
1194220788 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_target_stress_wr.1542626739 |
|
|
Oct 02 08:36:14 PM UTC 24 |
Oct 02 08:39:16 PM UTC 24 |
46499980055 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_target_intr_smoke.3750585470 |
|
|
Oct 02 08:39:04 PM UTC 24 |
Oct 02 08:39:16 PM UTC 24 |
5194786561 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_target_smoke.194066170 |
|
|
Oct 02 08:39:00 PM UTC 24 |
Oct 02 08:39:16 PM UTC 24 |
6246343472 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_target_stress_wr.871613422 |
|
|
Oct 02 08:39:01 PM UTC 24 |
Oct 02 08:39:17 PM UTC 24 |
16264414251 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_target_timeout.338634396 |
|
|
Oct 02 08:39:07 PM UTC 24 |
Oct 02 08:39:17 PM UTC 24 |
2507543637 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_reset_tx.3575031964 |
|
|
Oct 02 08:39:16 PM UTC 24 |
Oct 02 08:39:18 PM UTC 24 |
539421379 ps |
| T82 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_reset_acq.3101482856 |
|
|
Oct 02 08:39:16 PM UTC 24 |
Oct 02 08:39:19 PM UTC 24 |
393803289 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_watermarks_tx.3641134374 |
|
|
Oct 02 08:39:19 PM UTC 24 |
Oct 02 08:39:22 PM UTC 24 |
1473182550 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_host_perf.4052522746 |
|
|
Oct 02 08:38:58 PM UTC 24 |
Oct 02 08:39:22 PM UTC 24 |
5354629059 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_target_perf.2467831011 |
|
|
Oct 02 08:39:17 PM UTC 24 |
Oct 02 08:39:23 PM UTC 24 |
1918307332 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_target_tx_stretch_ctrl.1661373247 |
|
|
Oct 02 08:39:19 PM UTC 24 |
Oct 02 08:39:24 PM UTC 24 |
138723314 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_watermarks_acq.2905084391 |
|
|
Oct 02 08:39:18 PM UTC 24 |
Oct 02 08:39:24 PM UTC 24 |
467259666 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_overflow.1765100078 |
|
|
Oct 02 08:39:27 PM UTC 24 |
Oct 02 08:40:33 PM UTC 24 |
4128733934 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_target_stress_rd.3470773030 |
|
|
Oct 02 08:39:01 PM UTC 24 |
Oct 02 08:39:26 PM UTC 24 |
4583047554 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_target_stretch.4268773700 |
|
|
Oct 02 08:38:27 PM UTC 24 |
Oct 02 08:39:26 PM UTC 24 |
4369971149 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_target_bad_addr.2121500108 |
|
|
Oct 02 08:39:17 PM UTC 24 |
Oct 02 08:39:26 PM UTC 24 |
1022574129 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_target_smbus_maxlen.1818509477 |
|
|
Oct 02 08:39:22 PM UTC 24 |
Oct 02 08:39:27 PM UTC 24 |
2376290804 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_alert_test.2100391025 |
|
|
Oct 02 08:39:25 PM UTC 24 |
Oct 02 08:39:27 PM UTC 24 |
40156351 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_target_nack_txstretch.3977775825 |
|
|
Oct 02 08:39:24 PM UTC 24 |
Oct 02 08:39:27 PM UTC 24 |
1657231158 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_target_stress_all.515476787 |
|
|
Oct 02 08:38:46 PM UTC 24 |
Oct 02 08:39:27 PM UTC 24 |
20896904393 ps |
| T53 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_target_nack_acqfull.2344893583 |
|
|
Oct 02 08:39:23 PM UTC 24 |
Oct 02 08:39:28 PM UTC 24 |
555770369 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_host_override.2341235767 |
|
|
Oct 02 08:39:26 PM UTC 24 |
Oct 02 08:39:28 PM UTC 24 |
37336219 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_target_nack_acqfull_addr.3948173291 |
|
|
Oct 02 08:39:24 PM UTC 24 |
Oct 02 08:39:28 PM UTC 24 |
941552160 ps |
| T120 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_watermark.3686113533 |
|
|
Oct 02 08:37:35 PM UTC 24 |
Oct 02 08:39:29 PM UTC 24 |
17822457103 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_reset_fmt.4141700880 |
|
|
Oct 02 08:39:27 PM UTC 24 |
Oct 02 08:39:29 PM UTC 24 |
1388255949 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_reset_rx.1033786038 |
|
|
Oct 02 08:39:27 PM UTC 24 |
Oct 02 08:39:32 PM UTC 24 |
606540546 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_host_error_intr.1423504389 |
|
|
Oct 02 08:39:30 PM UTC 24 |
Oct 02 08:39:36 PM UTC 24 |
1467638291 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_fmt_empty.2848157832 |
|
|
Oct 02 08:39:27 PM UTC 24 |
Oct 02 08:39:36 PM UTC 24 |
313341499 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_host_stretch_timeout.447337612 |
|
|
Oct 02 08:38:58 PM UTC 24 |
Oct 02 08:39:36 PM UTC 24 |
906728718 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_host_may_nack.1615343735 |
|
|
Oct 02 08:39:18 PM UTC 24 |
Oct 02 08:39:38 PM UTC 24 |
450317481 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_target_stretch.1545116620 |
|
|
Oct 02 08:39:37 PM UTC 24 |
Oct 02 08:39:40 PM UTC 24 |
344740556 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_target_stress_wr.2015883499 |
|
|
Oct 02 08:38:24 PM UTC 24 |
Oct 02 08:39:41 PM UTC 24 |
39418659328 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_target_smoke.3328052003 |
|
|
Oct 02 08:39:30 PM UTC 24 |
Oct 02 08:39:43 PM UTC 24 |
3516283095 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_target_stress_rd.3434390660 |
|
|
Oct 02 08:39:37 PM UTC 24 |
Oct 02 08:39:44 PM UTC 24 |
305455607 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_target_intr_smoke.1415248974 |
|
|
Oct 02 08:39:37 PM UTC 24 |
Oct 02 08:39:45 PM UTC 24 |
877782364 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_full.2176174214 |
|
|
Oct 02 08:38:18 PM UTC 24 |
Oct 02 08:39:46 PM UTC 24 |
2763878379 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_reset_acq.2387384046 |
|
|
Oct 02 08:39:45 PM UTC 24 |
Oct 02 08:39:48 PM UTC 24 |
203590388 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_reset_tx.3909252749 |
|
|
Oct 02 08:39:45 PM UTC 24 |
Oct 02 08:39:48 PM UTC 24 |
187107328 ps |
| T121 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_watermark.775072377 |
|
|
Oct 02 08:38:57 PM UTC 24 |
Oct 02 08:40:35 PM UTC 24 |
15886591008 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_target_timeout.6774160 |
|
|
Oct 02 08:39:40 PM UTC 24 |
Oct 02 08:39:53 PM UTC 24 |
4999226312 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_host_perf_precise.3266235660 |
|
|
Oct 02 08:39:29 PM UTC 24 |
Oct 02 08:39:54 PM UTC 24 |
2614724009 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_target_perf.1672949864 |
|
|
Oct 02 08:39:46 PM UTC 24 |
Oct 02 08:39:54 PM UTC 24 |
9311103269 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_target_bad_addr.1282500986 |
|
|
Oct 02 08:39:47 PM UTC 24 |
Oct 02 08:39:54 PM UTC 24 |
6574737779 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_target_hrst.755062630 |
|
|
Oct 02 08:39:48 PM UTC 24 |
Oct 02 08:39:54 PM UTC 24 |
445233814 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_watermarks_tx.1757582832 |
|
|
Oct 02 08:39:54 PM UTC 24 |
Oct 02 08:39:58 PM UTC 24 |
459783808 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_watermarks_acq.4212720016 |
|
|
Oct 02 08:39:54 PM UTC 24 |
Oct 02 08:39:59 PM UTC 24 |
467000084 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_host_smoke.824800335 |
|
|
Oct 02 08:38:55 PM UTC 24 |
Oct 02 08:40:00 PM UTC 24 |
1249656148 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_target_nack_acqfull.3671595690 |
|
|
Oct 02 08:39:56 PM UTC 24 |
Oct 02 08:40:00 PM UTC 24 |
5140704598 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_target_smbus_maxlen.1768916837 |
|
|
Oct 02 08:39:56 PM UTC 24 |
Oct 02 08:40:00 PM UTC 24 |
1767585237 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/12.i2c_target_stress_wr.2744434133 |
|
|
Oct 02 08:33:32 PM UTC 24 |
Oct 02 08:40:01 PM UTC 24 |
49543291142 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_alert_test.2561670433 |
|
|
Oct 02 08:40:01 PM UTC 24 |
Oct 02 08:40:03 PM UTC 24 |
22904342 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_host_override.3165748355 |
|
|
Oct 02 08:40:01 PM UTC 24 |
Oct 02 08:40:03 PM UTC 24 |
89037424 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_target_tx_stretch_ctrl.3591783075 |
|
|
Oct 02 08:39:56 PM UTC 24 |
Oct 02 08:40:03 PM UTC 24 |
228531735 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_target_nack_txstretch.2318923463 |
|
|
Oct 02 08:40:01 PM UTC 24 |
Oct 02 08:40:05 PM UTC 24 |
570048226 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_target_nack_acqfull_addr.3022581626 |
|
|
Oct 02 08:40:01 PM UTC 24 |
Oct 02 08:40:06 PM UTC 24 |
535289539 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_reset_fmt.3305447007 |
|
|
Oct 02 08:40:05 PM UTC 24 |
Oct 02 08:40:07 PM UTC 24 |
1664914417 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_reset_rx.3552777722 |
|
|
Oct 02 08:40:05 PM UTC 24 |
Oct 02 08:40:12 PM UTC 24 |
1095400261 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_host_may_nack.4089334659 |
|
|
Oct 02 08:39:54 PM UTC 24 |
Oct 02 08:40:15 PM UTC 24 |
442421356 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_host_perf_precise.1775039971 |
|
|
Oct 02 08:40:14 PM UTC 24 |
Oct 02 08:40:17 PM UTC 24 |
72633207 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_fmt_empty.2473928015 |
|
|
Oct 02 08:40:05 PM UTC 24 |
Oct 02 08:40:20 PM UTC 24 |
461052607 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_host_stretch_timeout.714544869 |
|
|
Oct 02 08:39:29 PM UTC 24 |
Oct 02 08:40:25 PM UTC 24 |
3915415121 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_target_stretch.562422270 |
|
|
Oct 02 08:40:22 PM UTC 24 |
Oct 02 08:40:25 PM UTC 24 |
376411239 ps |
| T122 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_watermark.1057253397 |
|
|
Oct 02 08:39:26 PM UTC 24 |
Oct 02 08:40:26 PM UTC 24 |
10301628762 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_target_intr_stress_wr.2485607194 |
|
|
Oct 02 08:39:05 PM UTC 24 |
Oct 02 08:40:38 PM UTC 24 |
11767674277 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_reset_acq.2812016481 |
|
|
Oct 02 08:40:36 PM UTC 24 |
Oct 02 08:40:39 PM UTC 24 |
249638350 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_reset_tx.2710087618 |
|
|
Oct 02 08:40:37 PM UTC 24 |
Oct 02 08:40:39 PM UTC 24 |
194172047 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_host_stretch_timeout.3801173514 |
|
|
Oct 02 08:40:14 PM UTC 24 |
Oct 02 08:40:40 PM UTC 24 |
404648214 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_full.2989961783 |
|
|
Oct 02 08:39:29 PM UTC 24 |
Oct 02 08:40:41 PM UTC 24 |
2017664398 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_watermarks_tx.286642503 |
|
|
Oct 02 08:40:41 PM UTC 24 |
Oct 02 08:40:43 PM UTC 24 |
100751755 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_host_smoke.488767934 |
|
|
Oct 02 08:39:25 PM UTC 24 |
Oct 02 08:40:44 PM UTC 24 |
1466799504 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_full.3560248065 |
|
|
Oct 02 08:38:58 PM UTC 24 |
Oct 02 08:40:45 PM UTC 24 |
3301718511 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_watermarks_acq.720248029 |
|
|
Oct 02 08:40:41 PM UTC 24 |
Oct 02 08:40:46 PM UTC 24 |
1728954359 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_target_stretch.2521115798 |
|
|
Oct 02 08:41:34 PM UTC 24 |
Oct 02 08:41:53 PM UTC 24 |
6404744137 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_target_perf.2721692158 |
|
|
Oct 02 08:40:37 PM UTC 24 |
Oct 02 08:40:47 PM UTC 24 |
2557416636 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_host_may_nack.1775767467 |
|
|
Oct 02 08:40:39 PM UTC 24 |
Oct 02 08:40:47 PM UTC 24 |
767311922 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_target_bad_addr.2127928243 |
|
|
Oct 02 08:40:38 PM UTC 24 |
Oct 02 08:40:47 PM UTC 24 |
1058823393 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_target_smbus_maxlen.3764190106 |
|
|
Oct 02 08:40:43 PM UTC 24 |
Oct 02 08:40:48 PM UTC 24 |
463083691 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_target_tx_stretch_ctrl.1321464493 |
|
|
Oct 02 08:40:42 PM UTC 24 |
Oct 02 08:40:48 PM UTC 24 |
435300533 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_alert_test.1122611308 |
|
|
Oct 02 08:40:47 PM UTC 24 |
Oct 02 08:40:49 PM UTC 24 |
43407573 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_target_nack_acqfull.4216245337 |
|
|
Oct 02 08:40:44 PM UTC 24 |
Oct 02 08:40:49 PM UTC 24 |
673804574 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_target_nack_txstretch.524866174 |
|
|
Oct 02 08:40:46 PM UTC 24 |
Oct 02 08:40:50 PM UTC 24 |
167396526 ps |
| T292 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_target_nack_acqfull_addr.567454786 |
|
|
Oct 02 08:40:45 PM UTC 24 |
Oct 02 08:40:50 PM UTC 24 |
2724438120 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_host_override.1137248613 |
|
|
Oct 02 08:40:48 PM UTC 24 |
Oct 02 08:40:50 PM UTC 24 |
54476793 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_target_smoke.998725394 |
|
|
Oct 02 08:40:18 PM UTC 24 |
Oct 02 08:40:51 PM UTC 24 |
773075771 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_reset_fmt.3130331618 |
|
|
Oct 02 08:40:50 PM UTC 24 |
Oct 02 08:40:52 PM UTC 24 |
390966437 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_host_error_intr.3537636644 |
|
|
Oct 02 08:40:53 PM UTC 24 |
Oct 02 08:40:56 PM UTC 24 |
231727243 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_reset_rx.338114231 |
|
|
Oct 02 08:40:50 PM UTC 24 |
Oct 02 08:40:57 PM UTC 24 |
325121843 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_target_stress_wr.2602523974 |
|
|
Oct 02 08:40:19 PM UTC 24 |
Oct 02 08:40:58 PM UTC 24 |
47159469770 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_host_perf.2552428469 |
|
|
Oct 02 08:40:07 PM UTC 24 |
Oct 02 08:40:58 PM UTC 24 |
5533554137 ps |