| T857 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_full.1718413051 |
|
|
Oct 02 08:40:06 PM UTC 24 |
Oct 02 08:41:54 PM UTC 24 |
15534981360 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_host_perf_precise.989152330 |
|
|
Oct 02 08:40:51 PM UTC 24 |
Oct 02 08:40:59 PM UTC 24 |
1242043037 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_host_smoke.1024134206 |
|
|
Oct 02 08:40:01 PM UTC 24 |
Oct 02 08:40:59 PM UTC 24 |
5017622620 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_target_intr_stress_wr.1403790824 |
|
|
Oct 02 08:39:39 PM UTC 24 |
Oct 02 08:41:02 PM UTC 24 |
22847880580 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_target_intr_stress_wr.3526472581 |
|
|
Oct 02 08:40:27 PM UTC 24 |
Oct 02 08:41:02 PM UTC 24 |
12484103148 ps |
| T862 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_host_perf.2424283808 |
|
|
Oct 02 08:40:51 PM UTC 24 |
Oct 02 08:41:02 PM UTC 24 |
7245123649 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_overflow.1303623638 |
|
|
Oct 02 08:40:02 PM UTC 24 |
Oct 02 08:41:04 PM UTC 24 |
3472669770 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_reset_acq.490478766 |
|
|
Oct 02 08:41:04 PM UTC 24 |
Oct 02 08:41:06 PM UTC 24 |
409451047 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_reset_tx.2345706367 |
|
|
Oct 02 08:41:05 PM UTC 24 |
Oct 02 08:41:08 PM UTC 24 |
422499122 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_target_stress_all.2227388339 |
|
|
Oct 02 08:38:05 PM UTC 24 |
Oct 02 08:41:09 PM UTC 24 |
19533137635 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_fmt_empty.852536142 |
|
|
Oct 02 08:40:50 PM UTC 24 |
Oct 02 08:41:09 PM UTC 24 |
384435734 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_target_intr_smoke.1672930923 |
|
|
Oct 02 08:41:01 PM UTC 24 |
Oct 02 08:41:11 PM UTC 24 |
4921925444 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_target_timeout.236015165 |
|
|
Oct 02 08:41:03 PM UTC 24 |
Oct 02 08:41:13 PM UTC 24 |
1256749500 ps |
| T264 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_host_mode_toggle.2956638452 |
|
|
Oct 02 08:41:11 PM UTC 24 |
Oct 02 08:41:13 PM UTC 24 |
293991515 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_target_hrst.3215813185 |
|
|
Oct 02 08:41:10 PM UTC 24 |
Oct 02 08:41:14 PM UTC 24 |
362999853 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_target_bad_addr.242534778 |
|
|
Oct 02 08:41:08 PM UTC 24 |
Oct 02 08:41:16 PM UTC 24 |
745459432 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_target_perf.1346633382 |
|
|
Oct 02 08:41:07 PM UTC 24 |
Oct 02 08:41:17 PM UTC 24 |
1836348397 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_watermark.3059063990 |
|
|
Oct 02 08:40:01 PM UTC 24 |
Oct 02 08:41:18 PM UTC 24 |
2963983729 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_tx.1548566654 |
|
|
Oct 02 08:41:15 PM UTC 24 |
Oct 02 08:41:18 PM UTC 24 |
1911123675 ps |
| T875 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_host_stretch_timeout.2094804395 |
|
|
Oct 02 08:40:52 PM UTC 24 |
Oct 02 08:41:18 PM UTC 24 |
4015568430 ps |
| T876 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_acq.1327732911 |
|
|
Oct 02 08:41:14 PM UTC 24 |
Oct 02 08:41:19 PM UTC 24 |
520571717 ps |
| T877 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_target_tx_stretch_ctrl.58819404 |
|
|
Oct 02 08:41:15 PM UTC 24 |
Oct 02 08:41:19 PM UTC 24 |
80342722 ps |
| T878 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_target_smbus_maxlen.792503837 |
|
|
Oct 02 08:41:16 PM UTC 24 |
Oct 02 08:41:20 PM UTC 24 |
2382526392 ps |
| T879 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_target_stress_rd.3476606301 |
|
|
Oct 02 08:41:00 PM UTC 24 |
Oct 02 08:41:21 PM UTC 24 |
508389475 ps |
| T880 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_alert_test.4140606465 |
|
|
Oct 02 08:41:19 PM UTC 24 |
Oct 02 08:41:21 PM UTC 24 |
31358309 ps |
| T265 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_host_override.1749592474 |
|
|
Oct 02 08:41:20 PM UTC 24 |
Oct 02 08:41:22 PM UTC 24 |
44539940 ps |
| T881 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull.3095222942 |
|
|
Oct 02 08:41:17 PM UTC 24 |
Oct 02 08:41:22 PM UTC 24 |
2261395045 ps |
| T258 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_host_may_nack.2474441047 |
|
|
Oct 02 08:41:48 PM UTC 24 |
Oct 02 08:41:54 PM UTC 24 |
1265774281 ps |
| T882 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull_addr.2101362885 |
|
|
Oct 02 08:41:19 PM UTC 24 |
Oct 02 08:41:24 PM UTC 24 |
831644491 ps |
| T883 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_target_stretch.1028066760 |
|
|
Oct 02 08:41:00 PM UTC 24 |
Oct 02 08:41:24 PM UTC 24 |
4236194386 ps |
| T884 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_host_may_nack.2400237108 |
|
|
Oct 02 08:41:12 PM UTC 24 |
Oct 02 08:41:24 PM UTC 24 |
590960579 ps |
| T885 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_fmt.2136493722 |
|
|
Oct 02 08:41:23 PM UTC 24 |
Oct 02 08:41:26 PM UTC 24 |
454757647 ps |
| T83 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_target_smoke.4290427970 |
|
|
Oct 02 08:40:58 PM UTC 24 |
Oct 02 08:41:27 PM UTC 24 |
2823701293 ps |
| T886 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_target_stress_wr.647656070 |
|
|
Oct 02 08:39:33 PM UTC 24 |
Oct 02 08:41:28 PM UTC 24 |
23385045576 ps |
| T887 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_rx.889405710 |
|
|
Oct 02 08:41:23 PM UTC 24 |
Oct 02 08:41:29 PM UTC 24 |
161020341 ps |
| T888 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_host_error_intr.1472757726 |
|
|
Oct 02 08:41:26 PM UTC 24 |
Oct 02 08:41:31 PM UTC 24 |
69588369 ps |
| T889 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/22.i2c_target_stress_all.1295937621 |
|
|
Oct 02 08:40:38 PM UTC 24 |
Oct 02 08:41:33 PM UTC 24 |
24540724345 ps |
| T890 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_overflow.3012078689 |
|
|
Oct 02 08:40:48 PM UTC 24 |
Oct 02 08:41:34 PM UTC 24 |
2575601137 ps |
| T891 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_fmt_empty.1849903271 |
|
|
Oct 02 08:41:23 PM UTC 24 |
Oct 02 08:41:37 PM UTC 24 |
478292864 ps |
| T892 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_target_stress_wr.2421920646 |
|
|
Oct 02 08:40:59 PM UTC 24 |
Oct 02 08:41:38 PM UTC 24 |
26283960132 ps |
| T893 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_target_intr_stress_wr.2636360988 |
|
|
Oct 02 08:41:03 PM UTC 24 |
Oct 02 08:41:38 PM UTC 24 |
14626522923 ps |
| T894 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/21.i2c_target_stress_all.4184009787 |
|
|
Oct 02 08:39:47 PM UTC 24 |
Oct 02 08:41:39 PM UTC 24 |
87963478612 ps |
| T895 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_acq.5875539 |
|
|
Oct 02 08:41:40 PM UTC 24 |
Oct 02 08:41:44 PM UTC 24 |
584645050 ps |
| T896 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_target_intr_smoke.1477991110 |
|
|
Oct 02 08:41:35 PM UTC 24 |
Oct 02 08:41:44 PM UTC 24 |
4511567433 ps |
| T131 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/9.i2c_host_stress_all.1898501225 |
|
|
Oct 02 08:30:27 PM UTC 24 |
Oct 02 08:41:45 PM UTC 24 |
14377520021 ps |
| T138 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_tx.3216088368 |
|
|
Oct 02 08:41:43 PM UTC 24 |
Oct 02 08:41:46 PM UTC 24 |
451077098 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_target_timeout.3632188258 |
|
|
Oct 02 08:41:38 PM UTC 24 |
Oct 02 08:41:47 PM UTC 24 |
1188275379 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_host_stretch_timeout.3485706349 |
|
|
Oct 02 08:41:25 PM UTC 24 |
Oct 02 08:41:47 PM UTC 24 |
773747251 ps |
| T84 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_target_smoke.760419483 |
|
|
Oct 02 08:41:29 PM UTC 24 |
Oct 02 08:41:50 PM UTC 24 |
4422227456 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_overflow.3116328178 |
|
|
Oct 02 08:38:57 PM UTC 24 |
Oct 02 08:41:51 PM UTC 24 |
2630909609 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_target_perf.804047850 |
|
|
Oct 02 08:41:45 PM UTC 24 |
Oct 02 08:41:51 PM UTC 24 |
711732156 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_target_bad_addr.2778479451 |
|
|
Oct 02 08:41:46 PM UTC 24 |
Oct 02 08:41:53 PM UTC 24 |
540332308 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_host_mode_toggle.266790477 |
|
|
Oct 02 08:41:48 PM UTC 24 |
Oct 02 08:41:53 PM UTC 24 |
355247634 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_acq.1181621772 |
|
|
Oct 02 08:41:50 PM UTC 24 |
Oct 02 08:41:55 PM UTC 24 |
492479990 ps |
| T897 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_tx.2747758999 |
|
|
Oct 02 08:41:52 PM UTC 24 |
Oct 02 08:41:55 PM UTC 24 |
145745528 ps |
| T898 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_alert_test.529471847 |
|
|
Oct 02 08:41:55 PM UTC 24 |
Oct 02 08:41:57 PM UTC 24 |
14908308 ps |
| T899 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_watermark.1579790700 |
|
|
Oct 02 08:41:58 PM UTC 24 |
Oct 02 08:44:08 PM UTC 24 |
20763267048 ps |
| T900 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_host_override.1253506573 |
|
|
Oct 02 08:41:56 PM UTC 24 |
Oct 02 08:41:58 PM UTC 24 |
21797214 ps |
| T901 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_target_smbus_maxlen.1158732830 |
|
|
Oct 02 08:41:54 PM UTC 24 |
Oct 02 08:42:00 PM UTC 24 |
481090992 ps |
| T902 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_target_stress_rd.2936282725 |
|
|
Oct 02 08:41:32 PM UTC 24 |
Oct 02 08:42:00 PM UTC 24 |
1216291204 ps |
| T903 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_target_tx_stretch_ctrl.3194612845 |
|
|
Oct 02 08:41:52 PM UTC 24 |
Oct 02 08:42:01 PM UTC 24 |
288285873 ps |
| T904 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull_addr.2551730819 |
|
|
Oct 02 08:41:55 PM UTC 24 |
Oct 02 08:42:01 PM UTC 24 |
584259505 ps |
| T905 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull.148104538 |
|
|
Oct 02 08:41:55 PM UTC 24 |
Oct 02 08:42:01 PM UTC 24 |
531271313 ps |
| T906 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_fmt.3282629831 |
|
|
Oct 02 08:41:59 PM UTC 24 |
Oct 02 08:42:02 PM UTC 24 |
137275104 ps |
| T907 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_rx.1302309248 |
|
|
Oct 02 08:42:01 PM UTC 24 |
Oct 02 08:42:11 PM UTC 24 |
182915828 ps |
| T908 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_overflow.1238957311 |
|
|
Oct 02 08:41:22 PM UTC 24 |
Oct 02 08:42:15 PM UTC 24 |
7299117313 ps |
| T909 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_fmt_empty.3964981605 |
|
|
Oct 02 08:42:00 PM UTC 24 |
Oct 02 08:42:19 PM UTC 24 |
285066960 ps |
| T910 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_host_perf_precise.3336310387 |
|
|
Oct 02 08:38:20 PM UTC 24 |
Oct 02 08:42:21 PM UTC 24 |
6173383631 ps |
| T911 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_host_perf_precise.12694971 |
|
|
Oct 02 08:42:03 PM UTC 24 |
Oct 02 08:42:22 PM UTC 24 |
853574101 ps |
| T912 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_target_stretch.2008490264 |
|
|
Oct 02 08:42:21 PM UTC 24 |
Oct 02 08:42:27 PM UTC 24 |
468485247 ps |
| T913 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_host_smoke.3637847982 |
|
|
Oct 02 08:40:47 PM UTC 24 |
Oct 02 08:42:30 PM UTC 24 |
7963038002 ps |
| T914 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_target_smoke.219407371 |
|
|
Oct 02 08:42:14 PM UTC 24 |
Oct 02 08:42:31 PM UTC 24 |
1017324463 ps |
| T915 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_target_stress_wr.3082684390 |
|
|
Oct 02 08:37:48 PM UTC 24 |
Oct 02 08:42:31 PM UTC 24 |
48238931048 ps |
| T916 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_target_intr_smoke.2213211147 |
|
|
Oct 02 08:42:22 PM UTC 24 |
Oct 02 08:42:32 PM UTC 24 |
1067549348 ps |
| T917 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_acq.306150566 |
|
|
Oct 02 08:42:32 PM UTC 24 |
Oct 02 08:42:34 PM UTC 24 |
333425910 ps |
| T918 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_target_stress_rd.3420897981 |
|
|
Oct 02 08:42:20 PM UTC 24 |
Oct 02 08:42:35 PM UTC 24 |
255019969 ps |
| T919 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_tx.1099024228 |
|
|
Oct 02 08:42:33 PM UTC 24 |
Oct 02 08:42:37 PM UTC 24 |
251343013 ps |
| T920 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_target_timeout.4258462498 |
|
|
Oct 02 08:42:32 PM UTC 24 |
Oct 02 08:42:40 PM UTC 24 |
4332721239 ps |
| T921 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_host_smoke.2912823801 |
|
|
Oct 02 08:41:56 PM UTC 24 |
Oct 02 08:42:41 PM UTC 24 |
1929303920 ps |
| T922 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_target_perf.3247544310 |
|
|
Oct 02 08:42:35 PM UTC 24 |
Oct 02 08:42:44 PM UTC 24 |
1232142561 ps |
| T923 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_host_stretch_timeout.4205935746 |
|
|
Oct 02 08:42:03 PM UTC 24 |
Oct 02 08:42:44 PM UTC 24 |
2741664108 ps |
| T924 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_target_bad_addr.43583823 |
|
|
Oct 02 08:42:36 PM UTC 24 |
Oct 02 08:42:44 PM UTC 24 |
1356758385 ps |
| T925 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_target_stress_wr.1377456150 |
|
|
Oct 02 08:42:15 PM UTC 24 |
Oct 02 08:42:45 PM UTC 24 |
9811149440 ps |
| T132 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/18.i2c_host_stress_all.3339974375 |
|
|
Oct 02 08:37:44 PM UTC 24 |
Oct 02 08:42:45 PM UTC 24 |
130675492040 ps |
| T926 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_host_smoke.967338789 |
|
|
Oct 02 08:41:20 PM UTC 24 |
Oct 02 08:42:45 PM UTC 24 |
1784388056 ps |
| T927 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_acq.3881488494 |
|
|
Oct 02 08:42:45 PM UTC 24 |
Oct 02 08:42:49 PM UTC 24 |
936195354 ps |
| T928 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_full.1463165704 |
|
|
Oct 02 08:41:24 PM UTC 24 |
Oct 02 08:42:49 PM UTC 24 |
11508320035 ps |
| T929 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_tx.3018556163 |
|
|
Oct 02 08:42:45 PM UTC 24 |
Oct 02 08:42:49 PM UTC 24 |
177090991 ps |
| T930 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/17.i2c_target_stress_wr.3632011791 |
|
|
Oct 02 08:37:02 PM UTC 24 |
Oct 02 08:44:09 PM UTC 24 |
41450424835 ps |
| T931 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_target_tx_stretch_ctrl.2989155530 |
|
|
Oct 02 08:42:46 PM UTC 24 |
Oct 02 08:42:49 PM UTC 24 |
118017357 ps |
| T932 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_host_may_nack.1233487385 |
|
|
Oct 02 08:42:42 PM UTC 24 |
Oct 02 08:42:50 PM UTC 24 |
407343728 ps |
| T933 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull.922502358 |
|
|
Oct 02 08:42:46 PM UTC 24 |
Oct 02 08:42:50 PM UTC 24 |
488123295 ps |
| T934 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_target_smbus_maxlen.2639033021 |
|
|
Oct 02 08:42:46 PM UTC 24 |
Oct 02 08:42:51 PM UTC 24 |
481751121 ps |
| T935 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull_addr.3642400369 |
|
|
Oct 02 08:42:47 PM UTC 24 |
Oct 02 08:42:52 PM UTC 24 |
585177548 ps |
| T936 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_alert_test.2381653270 |
|
|
Oct 02 08:42:50 PM UTC 24 |
Oct 02 08:42:52 PM UTC 24 |
16408324 ps |
| T937 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_host_override.930028510 |
|
|
Oct 02 08:42:50 PM UTC 24 |
Oct 02 08:42:52 PM UTC 24 |
29082905 ps |
| T938 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_target_nack_txstretch.3401402620 |
|
|
Oct 02 08:42:49 PM UTC 24 |
Oct 02 08:42:53 PM UTC 24 |
138175978 ps |
| T939 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_fmt.4134862328 |
|
|
Oct 02 08:42:51 PM UTC 24 |
Oct 02 08:42:54 PM UTC 24 |
278517198 ps |
| T940 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_host_perf_precise.183880087 |
|
|
Oct 02 08:41:25 PM UTC 24 |
Oct 02 08:42:57 PM UTC 24 |
2355178979 ps |
| T941 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_host_perf.1444569564 |
|
|
Oct 02 08:42:53 PM UTC 24 |
Oct 02 08:42:59 PM UTC 24 |
676786340 ps |
| T942 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_host_error_intr.4147882237 |
|
|
Oct 02 08:42:58 PM UTC 24 |
Oct 02 08:43:04 PM UTC 24 |
184991953 ps |
| T943 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_fmt_empty.230260792 |
|
|
Oct 02 08:42:53 PM UTC 24 |
Oct 02 08:43:05 PM UTC 24 |
1622136705 ps |
| T944 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_rx.1393693256 |
|
|
Oct 02 08:42:53 PM UTC 24 |
Oct 02 08:43:12 PM UTC 24 |
878947898 ps |
| T945 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_target_intr_stress_wr.1631319227 |
|
|
Oct 02 08:41:37 PM UTC 24 |
Oct 02 08:43:14 PM UTC 24 |
30839634332 ps |
| T946 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_watermark.2700564023 |
|
|
Oct 02 08:40:48 PM UTC 24 |
Oct 02 08:43:14 PM UTC 24 |
22748444581 ps |
| T947 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_host_stretch_timeout.575273297 |
|
|
Oct 02 08:42:55 PM UTC 24 |
Oct 02 08:43:18 PM UTC 24 |
814915781 ps |
| T948 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_target_intr_smoke.1186958333 |
|
|
Oct 02 08:43:15 PM UTC 24 |
Oct 02 08:43:21 PM UTC 24 |
827492507 ps |
| T949 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_target_smoke.4247049431 |
|
|
Oct 02 08:43:05 PM UTC 24 |
Oct 02 08:43:21 PM UTC 24 |
487237371 ps |
| T950 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_host_error_intr.1437452288 |
|
|
Oct 02 08:44:10 PM UTC 24 |
Oct 02 08:44:12 PM UTC 24 |
70797441 ps |
| T951 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_acq.3912872 |
|
|
Oct 02 08:43:22 PM UTC 24 |
Oct 02 08:43:25 PM UTC 24 |
145665304 ps |
| T952 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_target_stress_rd.2912470771 |
|
|
Oct 02 08:43:12 PM UTC 24 |
Oct 02 08:43:26 PM UTC 24 |
835891974 ps |
| T953 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_target_timeout.2133514589 |
|
|
Oct 02 08:43:19 PM UTC 24 |
Oct 02 08:43:28 PM UTC 24 |
1026779271 ps |
| T954 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_tx.3797045924 |
|
|
Oct 02 08:43:25 PM UTC 24 |
Oct 02 08:43:28 PM UTC 24 |
417501133 ps |
| T955 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_host_perf_precise.2268215 |
|
|
Oct 02 08:42:54 PM UTC 24 |
Oct 02 08:43:31 PM UTC 24 |
6595371899 ps |
| T956 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_target_perf.1459764618 |
|
|
Oct 02 08:43:25 PM UTC 24 |
Oct 02 08:43:35 PM UTC 24 |
4692322681 ps |
| T957 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_target_bad_addr.3820291310 |
|
|
Oct 02 08:43:28 PM UTC 24 |
Oct 02 08:43:38 PM UTC 24 |
5630454268 ps |
| T958 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_host_smoke.3841914864 |
|
|
Oct 02 08:42:50 PM UTC 24 |
Oct 02 08:43:38 PM UTC 24 |
1075442202 ps |
| T959 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_acq.1461939695 |
|
|
Oct 02 08:43:37 PM UTC 24 |
Oct 02 08:43:41 PM UTC 24 |
1039623632 ps |
| T960 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_tx.1475158203 |
|
|
Oct 02 08:43:39 PM UTC 24 |
Oct 02 08:43:42 PM UTC 24 |
89569067 ps |
| T961 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_overflow.3659817579 |
|
|
Oct 02 08:42:51 PM UTC 24 |
Oct 02 08:44:09 PM UTC 24 |
1356977356 ps |
| T962 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/16.i2c_host_perf.2216409352 |
|
|
Oct 02 08:36:05 PM UTC 24 |
Oct 02 08:43:46 PM UTC 24 |
26620617231 ps |
| T963 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_target_smbus_maxlen.3025870202 |
|
|
Oct 02 08:43:41 PM UTC 24 |
Oct 02 08:43:47 PM UTC 24 |
622564109 ps |
| T964 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull.4167322353 |
|
|
Oct 02 08:43:42 PM UTC 24 |
Oct 02 08:43:48 PM UTC 24 |
660381906 ps |
| T965 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_alert_test.2787883464 |
|
|
Oct 02 08:43:47 PM UTC 24 |
Oct 02 08:43:49 PM UTC 24 |
34087073 ps |
| T966 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_target_nack_txstretch.996077208 |
|
|
Oct 02 08:43:47 PM UTC 24 |
Oct 02 08:43:50 PM UTC 24 |
142658176 ps |
| T967 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull_addr.4207012910 |
|
|
Oct 02 08:43:46 PM UTC 24 |
Oct 02 08:43:50 PM UTC 24 |
366272006 ps |
| T968 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_host_override.4052447710 |
|
|
Oct 02 08:43:51 PM UTC 24 |
Oct 02 08:43:53 PM UTC 24 |
31981036 ps |
| T969 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_host_perf.1288800828 |
|
|
Oct 02 08:41:24 PM UTC 24 |
Oct 02 08:43:56 PM UTC 24 |
2616561568 ps |
| T970 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_fmt.2210535459 |
|
|
Oct 02 08:43:54 PM UTC 24 |
Oct 02 08:43:56 PM UTC 24 |
283777529 ps |
| T971 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_target_tx_stretch_ctrl.77465387 |
|
|
Oct 02 08:43:39 PM UTC 24 |
Oct 02 08:44:00 PM UTC 24 |
1287509586 ps |
| T972 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_host_may_nack.720161246 |
|
|
Oct 02 08:43:36 PM UTC 24 |
Oct 02 08:44:00 PM UTC 24 |
3972586440 ps |
| T973 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_full.1176370331 |
|
|
Oct 02 08:40:51 PM UTC 24 |
Oct 02 08:44:06 PM UTC 24 |
2862270658 ps |
| T974 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_watermark.3534483948 |
|
|
Oct 02 08:38:16 PM UTC 24 |
Oct 02 08:44:17 PM UTC 24 |
42716193059 ps |
| T975 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_target_stress_wr.2785292439 |
|
|
Oct 02 08:44:14 PM UTC 24 |
Oct 02 08:44:21 PM UTC 24 |
15979606169 ps |
| T976 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_target_bad_addr.729992076 |
|
|
Oct 02 08:46:19 PM UTC 24 |
Oct 02 08:46:26 PM UTC 24 |
3044660360 ps |
| T977 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_host_smoke.2793830072 |
|
|
Oct 02 08:43:50 PM UTC 24 |
Oct 02 08:44:25 PM UTC 24 |
2780287956 ps |
| T978 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_watermark.3529502425 |
|
|
Oct 02 08:41:22 PM UTC 24 |
Oct 02 08:44:26 PM UTC 24 |
28038463949 ps |
| T979 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_target_intr_stress_wr.1531287625 |
|
|
Oct 02 08:44:22 PM UTC 24 |
Oct 02 08:44:27 PM UTC 24 |
1585553482 ps |
| T980 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_target_intr_smoke.2467321647 |
|
|
Oct 02 08:44:18 PM UTC 24 |
Oct 02 08:44:28 PM UTC 24 |
4135834609 ps |
| T981 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_overflow.683626851 |
|
|
Oct 02 08:41:59 PM UTC 24 |
Oct 02 08:44:30 PM UTC 24 |
2232106626 ps |
| T982 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_acq.395971338 |
|
|
Oct 02 08:44:26 PM UTC 24 |
Oct 02 08:44:30 PM UTC 24 |
768881359 ps |
| T983 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_tx.349881226 |
|
|
Oct 02 08:44:28 PM UTC 24 |
Oct 02 08:44:31 PM UTC 24 |
188076377 ps |
| T984 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_host_stretch_timeout.2085607104 |
|
|
Oct 02 08:44:08 PM UTC 24 |
Oct 02 08:44:33 PM UTC 24 |
1028751791 ps |
| T985 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_target_hrst.2367206631 |
|
|
Oct 02 08:44:31 PM UTC 24 |
Oct 02 08:44:35 PM UTC 24 |
1139543139 ps |
| T986 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_target_timeout.1208610677 |
|
|
Oct 02 08:44:26 PM UTC 24 |
Oct 02 08:44:38 PM UTC 24 |
1302943337 ps |
| T987 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_tx.214449628 |
|
|
Oct 02 08:44:36 PM UTC 24 |
Oct 02 08:44:39 PM UTC 24 |
132021520 ps |
| T988 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_target_perf.830254212 |
|
|
Oct 02 08:44:29 PM UTC 24 |
Oct 02 08:44:40 PM UTC 24 |
872424758 ps |
| T989 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_target_bad_addr.2438235415 |
|
|
Oct 02 08:44:31 PM UTC 24 |
Oct 02 08:44:41 PM UTC 24 |
2228909044 ps |
| T990 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_acq.3377401571 |
|
|
Oct 02 08:44:36 PM UTC 24 |
Oct 02 08:44:41 PM UTC 24 |
388573084 ps |
| T991 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_target_stress_rd.2282983108 |
|
|
Oct 02 08:44:15 PM UTC 24 |
Oct 02 08:44:41 PM UTC 24 |
2700410240 ps |
| T992 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_target_tx_stretch_ctrl.4189687366 |
|
|
Oct 02 08:44:36 PM UTC 24 |
Oct 02 08:44:43 PM UTC 24 |
214661286 ps |
| T993 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_target_smbus_maxlen.690151323 |
|
|
Oct 02 08:44:38 PM UTC 24 |
Oct 02 08:44:43 PM UTC 24 |
1882058324 ps |
| T85 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_target_smoke.540144853 |
|
|
Oct 02 08:44:14 PM UTC 24 |
Oct 02 08:44:43 PM UTC 24 |
923990493 ps |
| T994 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_target_nack_txstretch.996651436 |
|
|
Oct 02 08:44:42 PM UTC 24 |
Oct 02 08:44:45 PM UTC 24 |
319435052 ps |
| T995 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_alert_test.737929362 |
|
|
Oct 02 08:44:43 PM UTC 24 |
Oct 02 08:44:45 PM UTC 24 |
15580193 ps |
| T996 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_host_may_nack.2628250514 |
|
|
Oct 02 08:44:34 PM UTC 24 |
Oct 02 08:44:45 PM UTC 24 |
329605805 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_host_override.1760024719 |
|
|
Oct 02 08:44:44 PM UTC 24 |
Oct 02 08:44:46 PM UTC 24 |
343738655 ps |
| T48 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull_addr.1219981696 |
|
|
Oct 02 08:44:41 PM UTC 24 |
Oct 02 08:44:47 PM UTC 24 |
5620731920 ps |
| T997 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull.2372309851 |
|
|
Oct 02 08:44:41 PM UTC 24 |
Oct 02 08:44:48 PM UTC 24 |
1043339868 ps |
| T998 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_fmt.3775443381 |
|
|
Oct 02 08:44:50 PM UTC 24 |
Oct 02 08:44:53 PM UTC 24 |
1485440392 ps |
| T999 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_host_perf_precise.627993896 |
|
|
Oct 02 08:44:50 PM UTC 24 |
Oct 02 08:44:56 PM UTC 24 |
630511322 ps |
| T1000 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_rx.263064940 |
|
|
Oct 02 08:44:50 PM UTC 24 |
Oct 02 08:44:57 PM UTC 24 |
133586627 ps |
| T1001 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_host_error_intr.1996821408 |
|
|
Oct 02 08:44:53 PM UTC 24 |
Oct 02 08:44:59 PM UTC 24 |
973610476 ps |
| T1002 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_overflow.1737874499 |
|
|
Oct 02 08:43:52 PM UTC 24 |
Oct 02 08:45:04 PM UTC 24 |
10504695587 ps |
| T1003 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_full.464207219 |
|
|
Oct 02 08:44:01 PM UTC 24 |
Oct 02 08:45:08 PM UTC 24 |
2500686693 ps |
| T1004 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_host_perf.3469577093 |
|
|
Oct 02 08:44:01 PM UTC 24 |
Oct 02 08:45:08 PM UTC 24 |
3133834101 ps |
| T1005 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_host_smoke.1961213877 |
|
|
Oct 02 08:44:43 PM UTC 24 |
Oct 02 08:45:10 PM UTC 24 |
2255099695 ps |
| T1006 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_fmt_empty.3088600136 |
|
|
Oct 02 08:44:50 PM UTC 24 |
Oct 02 08:45:10 PM UTC 24 |
321824994 ps |
| T1007 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_target_intr_smoke.848619425 |
|
|
Oct 02 08:45:09 PM UTC 24 |
Oct 02 08:45:20 PM UTC 24 |
2839597556 ps |
| T1008 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_target_smoke.2851718818 |
|
|
Oct 02 08:44:58 PM UTC 24 |
Oct 02 08:45:21 PM UTC 24 |
1300944564 ps |
| T1009 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_acq.1207327216 |
|
|
Oct 02 08:45:18 PM UTC 24 |
Oct 02 08:45:21 PM UTC 24 |
219984648 ps |
| T1010 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_tx.4199112403 |
|
|
Oct 02 08:45:20 PM UTC 24 |
Oct 02 08:45:23 PM UTC 24 |
192073832 ps |
| T1011 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_target_timeout.1342556113 |
|
|
Oct 02 08:45:11 PM UTC 24 |
Oct 02 08:45:23 PM UTC 24 |
6584275484 ps |
| T1012 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_target_hrst.612589455 |
|
|
Oct 02 08:45:25 PM UTC 24 |
Oct 02 08:45:29 PM UTC 24 |
563207470 ps |
| T1013 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_target_perf.1800639698 |
|
|
Oct 02 08:45:21 PM UTC 24 |
Oct 02 08:45:30 PM UTC 24 |
782867483 ps |
| T1014 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_target_stress_rd.2339604315 |
|
|
Oct 02 08:45:05 PM UTC 24 |
Oct 02 08:45:31 PM UTC 24 |
1493346165 ps |
| T1015 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_host_stretch_timeout.3200949861 |
|
|
Oct 02 08:44:50 PM UTC 24 |
Oct 02 08:45:33 PM UTC 24 |
1482230221 ps |
| T1016 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_tx.4092076615 |
|
|
Oct 02 08:45:32 PM UTC 24 |
Oct 02 08:45:35 PM UTC 24 |
77445061 ps |
| T1017 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_target_bad_addr.2841259045 |
|
|
Oct 02 08:45:25 PM UTC 24 |
Oct 02 08:45:36 PM UTC 24 |
2810967523 ps |
| T1018 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_acq.2334399883 |
|
|
Oct 02 08:45:31 PM UTC 24 |
Oct 02 08:45:36 PM UTC 24 |
1046533242 ps |
| T1019 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/7.i2c_host_perf.799731528 |
|
|
Oct 02 08:28:35 PM UTC 24 |
Oct 02 08:45:36 PM UTC 24 |
25681616679 ps |
| T1020 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_alert_test.1077066414 |
|
|
Oct 02 08:45:37 PM UTC 24 |
Oct 02 08:45:39 PM UTC 24 |
34445660 ps |
| T1021 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_host_perf.4016111565 |
|
|
Oct 02 08:44:50 PM UTC 24 |
Oct 02 08:45:39 PM UTC 24 |
8200344348 ps |
| T1022 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_target_nack_txstretch.2138080396 |
|
|
Oct 02 08:45:37 PM UTC 24 |
Oct 02 08:45:40 PM UTC 24 |
141664707 ps |
| T1023 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_target_smbus_maxlen.1888149962 |
|
|
Oct 02 08:45:34 PM UTC 24 |
Oct 02 08:45:41 PM UTC 24 |
2009397982 ps |
| T1024 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull_addr.149350106 |
|
|
Oct 02 08:45:37 PM UTC 24 |
Oct 02 08:45:41 PM UTC 24 |
753860711 ps |
| T1025 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull.4069342371 |
|
|
Oct 02 08:45:35 PM UTC 24 |
Oct 02 08:45:41 PM UTC 24 |
1850320652 ps |
| T1026 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_target_tx_stretch_ctrl.756426257 |
|
|
Oct 02 08:45:34 PM UTC 24 |
Oct 02 08:45:41 PM UTC 24 |
227435491 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_host_override.3458161878 |
|
|
Oct 02 08:45:41 PM UTC 24 |
Oct 02 08:45:43 PM UTC 24 |
33292422 ps |
| T1027 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_fmt.3361146479 |
|
|
Oct 02 08:45:42 PM UTC 24 |
Oct 02 08:45:45 PM UTC 24 |
435705901 ps |
| T1028 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_rx.3125824899 |
|
|
Oct 02 08:45:42 PM UTC 24 |
Oct 02 08:45:52 PM UTC 24 |
259213146 ps |
| T1029 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_fmt_empty.178875373 |
|
|
Oct 02 08:45:42 PM UTC 24 |
Oct 02 08:45:53 PM UTC 24 |
1755952182 ps |
| T253 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_host_may_nack.2717893135 |
|
|
Oct 02 08:45:30 PM UTC 24 |
Oct 02 08:45:56 PM UTC 24 |
504110025 ps |
| T1030 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_overflow.2480701625 |
|
|
Oct 02 08:44:44 PM UTC 24 |
Oct 02 08:46:02 PM UTC 24 |
4530387992 ps |
| T1031 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_watermark.1212063270 |
|
|
Oct 02 08:44:44 PM UTC 24 |
Oct 02 08:46:05 PM UTC 24 |
11884079599 ps |
| T1032 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_target_stretch.1121996137 |
|
|
Oct 02 08:43:13 PM UTC 24 |
Oct 02 08:46:07 PM UTC 24 |
3175654253 ps |
| T1033 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_target_stress_all.3441492702 |
|
|
Oct 02 08:44:30 PM UTC 24 |
Oct 02 08:46:08 PM UTC 24 |
18389701739 ps |
| T278 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_host_smoke.548318544 |
|
|
Oct 02 08:45:40 PM UTC 24 |
Oct 02 08:46:08 PM UTC 24 |
2365992998 ps |
| T1034 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_host_perf_precise.1760834252 |
|
|
Oct 02 08:45:59 PM UTC 24 |
Oct 02 08:46:10 PM UTC 24 |
687793231 ps |
| T1035 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/28.i2c_target_stress_wr.3190452208 |
|
|
Oct 02 08:45:01 PM UTC 24 |
Oct 02 08:46:15 PM UTC 24 |
37522424790 ps |
| T1036 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_target_smoke.346900718 |
|
|
Oct 02 08:46:00 PM UTC 24 |
Oct 02 08:46:15 PM UTC 24 |
846860928 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/23.i2c_host_stress_all.2157108102 |
|
|
Oct 02 08:40:57 PM UTC 24 |
Oct 02 08:46:18 PM UTC 24 |
6285732093 ps |
| T1037 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_tx.2355141526 |
|
|
Oct 02 08:46:16 PM UTC 24 |
Oct 02 08:46:19 PM UTC 24 |
567865470 ps |
| T1038 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_acq.4246536780 |
|
|
Oct 02 08:46:16 PM UTC 24 |
Oct 02 08:46:19 PM UTC 24 |
205029043 ps |
| T1039 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_target_timeout.4023535091 |
|
|
Oct 02 08:46:08 PM UTC 24 |
Oct 02 08:46:21 PM UTC 24 |
2672916254 ps |
| T1040 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_target_perf.349258547 |
|
|
Oct 02 08:46:16 PM UTC 24 |
Oct 02 08:46:22 PM UTC 24 |
466458032 ps |
| T1041 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_target_hrst.2151230373 |
|
|
Oct 02 08:46:19 PM UTC 24 |
Oct 02 08:46:23 PM UTC 24 |
1167226985 ps |
| T1042 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_target_intr_smoke.334611043 |
|
|
Oct 02 08:46:08 PM UTC 24 |
Oct 02 08:46:23 PM UTC 24 |
3359990780 ps |
| T1043 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_full.735749376 |
|
|
Oct 02 08:42:53 PM UTC 24 |
Oct 02 08:46:24 PM UTC 24 |
7367861432 ps |
| T1044 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_host_stretch_timeout.3142937649 |
|
|
Oct 02 08:45:59 PM UTC 24 |
Oct 02 08:46:26 PM UTC 24 |
3467344264 ps |
| T1045 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_acq.178981672 |
|
|
Oct 02 08:46:22 PM UTC 24 |
Oct 02 08:46:26 PM UTC 24 |
362625837 ps |
| T1046 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_tx.616894035 |
|
|
Oct 02 08:46:23 PM UTC 24 |
Oct 02 08:46:27 PM UTC 24 |
516682058 ps |
| T1047 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_target_intr_stress_wr.2230314147 |
|
|
Oct 02 08:46:08 PM UTC 24 |
Oct 02 08:46:27 PM UTC 24 |
14949631532 ps |
| T1048 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_target_stretch.1999067868 |
|
|
Oct 02 08:46:06 PM UTC 24 |
Oct 02 08:46:27 PM UTC 24 |
4674990266 ps |
| T1049 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull_addr.171958101 |
|
|
Oct 02 08:47:36 PM UTC 24 |
Oct 02 08:47:42 PM UTC 24 |
8458289298 ps |
| T1050 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/24.i2c_target_stress_all.130869391 |
|
|
Oct 02 08:41:45 PM UTC 24 |
Oct 02 08:46:30 PM UTC 24 |
77304430894 ps |
| T1051 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_alert_test.3938889945 |
|
|
Oct 02 08:46:28 PM UTC 24 |
Oct 02 08:46:31 PM UTC 24 |
18571422 ps |
| T1052 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_host_override.4098974797 |
|
|
Oct 02 08:46:28 PM UTC 24 |
Oct 02 08:46:31 PM UTC 24 |
45028850 ps |
| T1053 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_target_smbus_maxlen.2636192595 |
|
|
Oct 02 08:46:26 PM UTC 24 |
Oct 02 08:46:31 PM UTC 24 |
2380076106 ps |
| T263 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_host_may_nack.1208926865 |
|
|
Oct 02 08:46:22 PM UTC 24 |
Oct 02 08:46:31 PM UTC 24 |
3073604711 ps |
| T1054 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull.3970794234 |
|
|
Oct 02 08:46:27 PM UTC 24 |
Oct 02 08:46:31 PM UTC 24 |
3456042266 ps |
| T1055 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull_addr.2609853978 |
|
|
Oct 02 08:46:27 PM UTC 24 |
Oct 02 08:46:31 PM UTC 24 |
1972752544 ps |
| T1056 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_full.1883025934 |
|
|
Oct 02 08:45:43 PM UTC 24 |
Oct 02 08:46:31 PM UTC 24 |
20968136769 ps |
| T1057 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_fmt.898517735 |
|
|
Oct 02 08:46:31 PM UTC 24 |
Oct 02 08:46:35 PM UTC 24 |
199440939 ps |
| T1058 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/27.i2c_target_stretch.922455175 |
|
|
Oct 02 08:44:17 PM UTC 24 |
Oct 02 08:46:38 PM UTC 24 |
3262635339 ps |
| T1059 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_target_stress_wr.2961105442 |
|
|
Oct 02 08:46:03 PM UTC 24 |
Oct 02 08:46:38 PM UTC 24 |
24380330270 ps |
| T1060 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_rx.211533248 |
|
|
Oct 02 08:46:31 PM UTC 24 |
Oct 02 08:46:39 PM UTC 24 |
847265024 ps |
| T1061 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/29.i2c_target_tx_stretch_ctrl.1513463311 |
|
|
Oct 02 08:46:25 PM UTC 24 |
Oct 02 08:46:41 PM UTC 24 |
841639542 ps |
| T1062 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_target_stress_wr.17554074 |
|
|
Oct 02 08:46:38 PM UTC 24 |
Oct 02 08:46:46 PM UTC 24 |
15695713380 ps |
| T1063 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/20.i2c_target_stress_all.2728322597 |
|
|
Oct 02 08:39:17 PM UTC 24 |
Oct 02 08:46:46 PM UTC 24 |
49345210044 ps |
| T1064 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_target_stress_rd.1701342627 |
|
|
Oct 02 08:46:38 PM UTC 24 |
Oct 02 08:46:47 PM UTC 24 |
1101801425 ps |
| T1065 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_watermark.665401809 |
|
|
Oct 02 08:42:50 PM UTC 24 |
Oct 02 08:46:47 PM UTC 24 |
13988848585 ps |
| T1066 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_host_smoke.1719258054 |
|
|
Oct 02 08:46:28 PM UTC 24 |
Oct 02 08:46:48 PM UTC 24 |
4590822586 ps |
| T1067 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_acq.3713637230 |
|
|
Oct 02 08:46:48 PM UTC 24 |
Oct 02 08:46:50 PM UTC 24 |
177263171 ps |
| T1068 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_target_intr_smoke.4040850347 |
|
|
Oct 02 08:46:41 PM UTC 24 |
Oct 02 08:46:50 PM UTC 24 |
8838957197 ps |
| T1069 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_host_stretch_timeout.1626754521 |
|
|
Oct 02 08:46:33 PM UTC 24 |
Oct 02 08:46:50 PM UTC 24 |
1434627923 ps |
| T1070 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_tx.2711346405 |
|
|
Oct 02 08:46:49 PM UTC 24 |
Oct 02 08:46:51 PM UTC 24 |
222319183 ps |
| T1071 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_target_smoke.1065964356 |
|
|
Oct 02 08:46:37 PM UTC 24 |
Oct 02 08:46:51 PM UTC 24 |
829547170 ps |
| T1072 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_host_perf_precise.776083733 |
|
|
Oct 02 08:46:33 PM UTC 24 |
Oct 02 08:46:55 PM UTC 24 |
402190804 ps |
| T1073 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_target_perf.2897710698 |
|
|
Oct 02 08:46:51 PM UTC 24 |
Oct 02 08:46:56 PM UTC 24 |
441956622 ps |
| T1074 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_target_timeout.3026931427 |
|
|
Oct 02 08:46:47 PM UTC 24 |
Oct 02 08:46:57 PM UTC 24 |
1154470988 ps |
| T1075 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_target_bad_addr.1839852384 |
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|
Oct 02 08:46:51 PM UTC 24 |
Oct 02 08:46:59 PM UTC 24 |
818753995 ps |
| T1076 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_watermarks_tx.4233816125 |
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|
Oct 02 08:46:57 PM UTC 24 |
Oct 02 08:46:59 PM UTC 24 |
1290524718 ps |
| T1077 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_fmt_empty.981776899 |
|
|
Oct 02 08:46:31 PM UTC 24 |
Oct 02 08:47:00 PM UTC 24 |
450023517 ps |
| T1078 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_watermarks_acq.3609720005 |
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|
Oct 02 08:46:56 PM UTC 24 |
Oct 02 08:47:01 PM UTC 24 |
1637355665 ps |
| T1079 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_host_may_nack.1226310233 |
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|
Oct 02 08:46:52 PM UTC 24 |
Oct 02 08:47:01 PM UTC 24 |
526584834 ps |
| T1080 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_target_smbus_maxlen.2322185588 |
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|
Oct 02 08:46:57 PM UTC 24 |
Oct 02 08:47:01 PM UTC 24 |
1808374828 ps |
| T1081 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_target_nack_acqfull.2644793046 |
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|
Oct 02 08:46:58 PM UTC 24 |
Oct 02 08:47:02 PM UTC 24 |
471608994 ps |
| T1082 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/30.i2c_target_tx_stretch_ctrl.2966220714 |
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|
Oct 02 08:46:57 PM UTC 24 |
Oct 02 08:47:02 PM UTC 24 |
125837581 ps |
| T260 |
/workspaces/repo/scratch/os_regression_2024_10_02/i2c-sim-vcs/coverage/default/31.i2c_host_may_nack.1519444658 |
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Oct 02 08:47:32 PM UTC 24 |
Oct 02 08:47:43 PM UTC 24 |
516789536 ps |