| T606 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_watermark.3902867597 |
|
|
Oct 15 11:47:54 AM UTC 24 |
Oct 15 11:51:56 AM UTC 24 |
8801658660 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_target_stretch.2055980047 |
|
|
Oct 15 11:53:01 AM UTC 24 |
Oct 15 11:53:14 AM UTC 24 |
1667989759 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_acq.1874429380 |
|
|
Oct 15 11:51:52 AM UTC 24 |
Oct 15 11:51:56 AM UTC 24 |
561091783 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_tx.463308966 |
|
|
Oct 15 11:51:55 AM UTC 24 |
Oct 15 11:51:58 AM UTC 24 |
414246137 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_fmt_empty.3021798789 |
|
|
Oct 15 11:51:36 AM UTC 24 |
Oct 15 11:51:59 AM UTC 24 |
837884651 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_target_stress_rd.1830895649 |
|
|
Oct 15 11:51:42 AM UTC 24 |
Oct 15 11:52:00 AM UTC 24 |
702596206 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_target_timeout.2301118907 |
|
|
Oct 15 11:51:51 AM UTC 24 |
Oct 15 11:52:03 AM UTC 24 |
1347704379 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_target_intr_smoke.2059603286 |
|
|
Oct 15 11:51:48 AM UTC 24 |
Oct 15 11:52:03 AM UTC 24 |
5978663481 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_target_smoke.133503821 |
|
|
Oct 15 11:52:57 AM UTC 24 |
Oct 15 11:53:14 AM UTC 24 |
828558983 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_target_intr_stress_wr.3763699095 |
|
|
Oct 15 11:51:51 AM UTC 24 |
Oct 15 11:52:05 AM UTC 24 |
3373518797 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_watermarks_acq.2839556283 |
|
|
Oct 15 11:52:01 AM UTC 24 |
Oct 15 11:52:06 AM UTC 24 |
5680727018 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_target_perf.1625586531 |
|
|
Oct 15 11:51:56 AM UTC 24 |
Oct 15 11:52:06 AM UTC 24 |
893498940 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_target_bad_addr.1822539916 |
|
|
Oct 15 11:51:57 AM UTC 24 |
Oct 15 11:52:06 AM UTC 24 |
1396374173 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_watermarks_tx.1720833069 |
|
|
Oct 15 11:52:03 AM UTC 24 |
Oct 15 11:52:06 AM UTC 24 |
939688800 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_host_may_nack.3918366224 |
|
|
Oct 15 11:52:00 AM UTC 24 |
Oct 15 11:52:08 AM UTC 24 |
1312772726 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_target_smoke.2911137940 |
|
|
Oct 15 11:51:40 AM UTC 24 |
Oct 15 11:52:08 AM UTC 24 |
3302438911 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_alert_test.328823979 |
|
|
Oct 15 11:52:06 AM UTC 24 |
Oct 15 11:52:09 AM UTC 24 |
14993950 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_host_override.2393938929 |
|
|
Oct 15 11:52:07 AM UTC 24 |
Oct 15 11:52:10 AM UTC 24 |
45989041 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_target_smbus_maxlen.3975779396 |
|
|
Oct 15 11:52:04 AM UTC 24 |
Oct 15 11:52:10 AM UTC 24 |
980127336 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_target_nack_txstretch.1039258577 |
|
|
Oct 15 11:52:06 AM UTC 24 |
Oct 15 11:52:10 AM UTC 24 |
146504133 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_target_nack_acqfull.1413725000 |
|
|
Oct 15 11:52:05 AM UTC 24 |
Oct 15 11:52:11 AM UTC 24 |
1018226301 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_target_tx_stretch_ctrl.2180743202 |
|
|
Oct 15 11:52:04 AM UTC 24 |
Oct 15 11:52:11 AM UTC 24 |
238716624 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_target_nack_acqfull_addr.2409521117 |
|
|
Oct 15 11:52:06 AM UTC 24 |
Oct 15 11:52:12 AM UTC 24 |
432098709 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_reset_fmt.1915255252 |
|
|
Oct 15 11:52:10 AM UTC 24 |
Oct 15 11:52:12 AM UTC 24 |
1237490200 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_host_error_intr.3697784908 |
|
|
Oct 15 11:52:13 AM UTC 24 |
Oct 15 11:52:16 AM UTC 24 |
89819560 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_target_stretch.1893055452 |
|
|
Oct 15 11:51:47 AM UTC 24 |
Oct 15 11:52:18 AM UTC 24 |
4747938769 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_host_perf_precise.3921876251 |
|
|
Oct 15 11:52:12 AM UTC 24 |
Oct 15 11:52:23 AM UTC 24 |
863530817 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_reset_rx.2350007399 |
|
|
Oct 15 11:52:11 AM UTC 24 |
Oct 15 11:52:29 AM UTC 24 |
446677345 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/12.i2c_host_perf_precise.721863161 |
|
|
Oct 15 11:48:47 AM UTC 24 |
Oct 15 11:52:31 AM UTC 24 |
24676839175 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_target_stretch.705157192 |
|
|
Oct 15 11:52:30 AM UTC 24 |
Oct 15 11:52:33 AM UTC 24 |
525362026 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/12.i2c_host_perf.2119439949 |
|
|
Oct 15 11:48:47 AM UTC 24 |
Oct 15 11:52:35 AM UTC 24 |
12126305977 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_overflow.1469564768 |
|
|
Oct 15 11:51:35 AM UTC 24 |
Oct 15 11:52:38 AM UTC 24 |
8795573559 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_full.2900134309 |
|
|
Oct 15 11:51:37 AM UTC 24 |
Oct 15 11:52:39 AM UTC 24 |
7873515452 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_fmt_empty.1531055654 |
|
|
Oct 15 11:52:11 AM UTC 24 |
Oct 15 11:52:39 AM UTC 24 |
467923902 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_target_intr_smoke.468123289 |
|
|
Oct 15 11:52:32 AM UTC 24 |
Oct 15 11:52:40 AM UTC 24 |
817355342 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_watermark.4029687743 |
|
|
Oct 15 11:50:51 AM UTC 24 |
Oct 15 11:52:41 AM UTC 24 |
14269415976 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_host_perf.3154262106 |
|
|
Oct 15 11:52:12 AM UTC 24 |
Oct 15 11:52:41 AM UTC 24 |
3005535195 ps |
| T22 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/5.i2c_host_stress_all.3943503989 |
|
|
Oct 15 11:42:53 AM UTC 24 |
Oct 15 11:52:42 AM UTC 24 |
14746401870 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_reset_tx.230074728 |
|
|
Oct 15 11:52:40 AM UTC 24 |
Oct 15 11:52:43 AM UTC 24 |
147127518 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_reset_acq.3670098474 |
|
|
Oct 15 11:52:40 AM UTC 24 |
Oct 15 11:52:43 AM UTC 24 |
172239752 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_target_smoke.2532925028 |
|
|
Oct 15 11:52:19 AM UTC 24 |
Oct 15 11:52:45 AM UTC 24 |
1104142278 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_target_perf.3361536681 |
|
|
Oct 15 11:52:41 AM UTC 24 |
Oct 15 11:52:47 AM UTC 24 |
2134689986 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_host_smoke.1702533035 |
|
|
Oct 15 11:52:07 AM UTC 24 |
Oct 15 11:52:48 AM UTC 24 |
1885460020 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_watermarks_tx.3496179701 |
|
|
Oct 15 11:52:46 AM UTC 24 |
Oct 15 11:52:49 AM UTC 24 |
726434554 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_target_timeout.246387552 |
|
|
Oct 15 11:52:36 AM UTC 24 |
Oct 15 11:52:49 AM UTC 24 |
1416855999 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_watermarks_acq.2364904233 |
|
|
Oct 15 11:52:44 AM UTC 24 |
Oct 15 11:52:50 AM UTC 24 |
566071979 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_target_bad_addr.2177110541 |
|
|
Oct 15 11:52:42 AM UTC 24 |
Oct 15 11:52:50 AM UTC 24 |
785094880 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_watermark.1857168068 |
|
|
Oct 15 11:51:35 AM UTC 24 |
Oct 15 11:52:51 AM UTC 24 |
3316464297 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_target_tx_stretch_ctrl.1549708310 |
|
|
Oct 15 11:52:47 AM UTC 24 |
Oct 15 11:52:52 AM UTC 24 |
101429825 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_target_smbus_maxlen.2686369000 |
|
|
Oct 15 11:52:48 AM UTC 24 |
Oct 15 11:52:53 AM UTC 24 |
1804190619 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_host_stretch_timeout.536103049 |
|
|
Oct 15 11:52:13 AM UTC 24 |
Oct 15 11:52:53 AM UTC 24 |
721588450 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_alert_test.1123064138 |
|
|
Oct 15 11:52:51 AM UTC 24 |
Oct 15 11:52:53 AM UTC 24 |
16956808 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_host_override.801271113 |
|
|
Oct 15 11:52:51 AM UTC 24 |
Oct 15 11:52:53 AM UTC 24 |
45323772 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_target_nack_acqfull.988652015 |
|
|
Oct 15 11:52:49 AM UTC 24 |
Oct 15 11:52:53 AM UTC 24 |
396667311 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_target_nack_txstretch.4222762990 |
|
|
Oct 15 11:52:50 AM UTC 24 |
Oct 15 11:52:53 AM UTC 24 |
266991975 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_host_may_nack.1152921495 |
|
|
Oct 15 11:52:43 AM UTC 24 |
Oct 15 11:52:53 AM UTC 24 |
998296133 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/14.i2c_target_intr_stress_wr.1574036307 |
|
|
Oct 15 11:51:06 AM UTC 24 |
Oct 15 11:52:54 AM UTC 24 |
19958340679 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_host_smoke.1801214632 |
|
|
Oct 15 11:51:33 AM UTC 24 |
Oct 15 11:52:54 AM UTC 24 |
16172984032 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_reset_fmt.999039284 |
|
|
Oct 15 11:52:53 AM UTC 24 |
Oct 15 11:52:55 AM UTC 24 |
270304682 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_target_nack_acqfull_addr.2831794474 |
|
|
Oct 15 11:52:50 AM UTC 24 |
Oct 15 11:52:56 AM UTC 24 |
3553842012 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_host_error_intr.1142389970 |
|
|
Oct 15 11:52:55 AM UTC 24 |
Oct 15 11:52:58 AM UTC 24 |
103534817 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_overflow.2805470872 |
|
|
Oct 15 11:52:10 AM UTC 24 |
Oct 15 11:53:00 AM UTC 24 |
3216595409 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_reset_rx.1642771920 |
|
|
Oct 15 11:52:54 AM UTC 24 |
Oct 15 11:53:01 AM UTC 24 |
1433391584 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_target_stress_rd.1119269321 |
|
|
Oct 15 11:53:01 AM UTC 24 |
Oct 15 11:53:09 AM UTC 24 |
345374120 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_host_stretch_timeout.3983262228 |
|
|
Oct 15 11:52:55 AM UTC 24 |
Oct 15 11:53:12 AM UTC 24 |
1610803600 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_target_intr_smoke.3704229014 |
|
|
Oct 15 11:53:10 AM UTC 24 |
Oct 15 11:53:18 AM UTC 24 |
972228433 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_target_perf.617919501 |
|
|
Oct 15 11:55:13 AM UTC 24 |
Oct 15 11:55:22 AM UTC 24 |
6015090932 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_target_intr_stress_wr.1609448992 |
|
|
Oct 15 11:52:35 AM UTC 24 |
Oct 15 11:53:19 AM UTC 24 |
19218828929 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_reset_acq.853218767 |
|
|
Oct 15 11:53:19 AM UTC 24 |
Oct 15 11:53:22 AM UTC 24 |
174983351 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_fmt_empty.2173508415 |
|
|
Oct 15 11:52:54 AM UTC 24 |
Oct 15 11:53:22 AM UTC 24 |
818589503 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_target_stretch.1015586095 |
|
|
Oct 15 11:54:54 AM UTC 24 |
Oct 15 11:55:22 AM UTC 24 |
2947519037 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_reset_tx.1334594185 |
|
|
Oct 15 11:53:20 AM UTC 24 |
Oct 15 11:53:23 AM UTC 24 |
199944182 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_target_intr_stress_wr.2341438249 |
|
|
Oct 15 11:53:13 AM UTC 24 |
Oct 15 11:53:23 AM UTC 24 |
2765390147 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_host_perf_precise.3534045839 |
|
|
Oct 15 11:52:55 AM UTC 24 |
Oct 15 11:53:24 AM UTC 24 |
764220994 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_target_timeout.1359804157 |
|
|
Oct 15 11:53:14 AM UTC 24 |
Oct 15 11:53:26 AM UTC 24 |
1365979022 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_target_perf.120372620 |
|
|
Oct 15 11:53:21 AM UTC 24 |
Oct 15 11:53:27 AM UTC 24 |
664606455 ps |
| T82 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_host_mode_toggle.643394487 |
|
|
Oct 15 11:53:24 AM UTC 24 |
Oct 15 11:53:28 AM UTC 24 |
238929970 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_target_stress_rd.476164241 |
|
|
Oct 15 11:52:24 AM UTC 24 |
Oct 15 11:53:29 AM UTC 24 |
2462503753 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_watermarks_acq.4193036270 |
|
|
Oct 15 11:53:25 AM UTC 24 |
Oct 15 11:53:30 AM UTC 24 |
2235025059 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_watermarks_tx.4220267352 |
|
|
Oct 15 11:53:26 AM UTC 24 |
Oct 15 11:53:30 AM UTC 24 |
598601619 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_watermark.2015863246 |
|
|
Oct 15 11:52:09 AM UTC 24 |
Oct 15 11:53:33 AM UTC 24 |
17279737273 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_target_tx_stretch_ctrl.4045697081 |
|
|
Oct 15 11:53:27 AM UTC 24 |
Oct 15 11:53:33 AM UTC 24 |
235042709 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_target_bad_addr.3347928620 |
|
|
Oct 15 11:53:23 AM UTC 24 |
Oct 15 11:53:34 AM UTC 24 |
1079912922 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_target_smbus_maxlen.1449695368 |
|
|
Oct 15 11:53:29 AM UTC 24 |
Oct 15 11:53:35 AM UTC 24 |
508919045 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_target_smoke.3322220686 |
|
|
Oct 15 11:54:42 AM UTC 24 |
Oct 15 11:55:18 AM UTC 24 |
3832897896 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_target_nack_acqfull.13233510 |
|
|
Oct 15 11:53:29 AM UTC 24 |
Oct 15 11:53:35 AM UTC 24 |
1032028170 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_alert_test.3765718417 |
|
|
Oct 15 11:53:34 AM UTC 24 |
Oct 15 11:53:36 AM UTC 24 |
15925572 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_host_override.3846578996 |
|
|
Oct 15 11:53:35 AM UTC 24 |
Oct 15 11:53:37 AM UTC 24 |
21218843 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_target_nack_acqfull_addr.1499118453 |
|
|
Oct 15 11:53:30 AM UTC 24 |
Oct 15 11:53:37 AM UTC 24 |
976604237 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_target_stress_all.2162403967 |
|
|
Oct 15 11:52:42 AM UTC 24 |
Oct 15 11:53:38 AM UTC 24 |
5959936536 ps |
| T252 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_reset_fmt.875602097 |
|
|
Oct 15 11:53:36 AM UTC 24 |
Oct 15 11:53:39 AM UTC 24 |
262757273 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_target_hrst.2931191154 |
|
|
Oct 15 11:55:19 AM UTC 24 |
Oct 15 11:55:23 AM UTC 24 |
1260712625 ps |
| T222 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/12.i2c_target_stress_all.1417473647 |
|
|
Oct 15 11:49:33 AM UTC 24 |
Oct 15 11:53:40 AM UTC 24 |
24253014775 ps |
| T258 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_host_may_nack.4033642742 |
|
|
Oct 15 11:53:24 AM UTC 24 |
Oct 15 11:53:41 AM UTC 24 |
2668093953 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_host_error_intr.3801547045 |
|
|
Oct 15 11:53:42 AM UTC 24 |
Oct 15 11:53:45 AM UTC 24 |
332455825 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_reset_rx.3625570101 |
|
|
Oct 15 11:53:38 AM UTC 24 |
Oct 15 11:53:45 AM UTC 24 |
344325234 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_host_perf_precise.3637112246 |
|
|
Oct 15 11:53:39 AM UTC 24 |
Oct 15 11:53:45 AM UTC 24 |
166856408 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_full.2643921396 |
|
|
Oct 15 11:52:11 AM UTC 24 |
Oct 15 11:53:50 AM UTC 24 |
5040116320 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_fmt_empty.1470622297 |
|
|
Oct 15 11:53:37 AM UTC 24 |
Oct 15 11:53:57 AM UTC 24 |
2848710083 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_watermark.1870407634 |
|
|
Oct 15 11:48:42 AM UTC 24 |
Oct 15 11:53:59 AM UTC 24 |
5006949653 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_target_stretch.3656616046 |
|
|
Oct 15 11:53:50 AM UTC 24 |
Oct 15 11:54:03 AM UTC 24 |
3070535106 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_host_stretch_timeout.1314533138 |
|
|
Oct 15 11:53:40 AM UTC 24 |
Oct 15 11:54:06 AM UTC 24 |
1168850420 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_target_smoke.475894391 |
|
|
Oct 15 11:53:46 AM UTC 24 |
Oct 15 11:54:08 AM UTC 24 |
1077965413 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_target_stress_wr.3824002447 |
|
|
Oct 15 11:53:47 AM UTC 24 |
Oct 15 11:54:08 AM UTC 24 |
32065429409 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_host_smoke.2578862490 |
|
|
Oct 15 11:53:35 AM UTC 24 |
Oct 15 11:54:08 AM UTC 24 |
1435194074 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_target_stress_rd.396616389 |
|
|
Oct 15 11:53:47 AM UTC 24 |
Oct 15 11:54:08 AM UTC 24 |
730697845 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_target_intr_smoke.2337471217 |
|
|
Oct 15 11:53:58 AM UTC 24 |
Oct 15 11:54:09 AM UTC 24 |
4147984402 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_reset_tx.1707016504 |
|
|
Oct 15 11:54:09 AM UTC 24 |
Oct 15 11:54:12 AM UTC 24 |
195267200 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_reset_acq.622173329 |
|
|
Oct 15 11:54:09 AM UTC 24 |
Oct 15 11:54:13 AM UTC 24 |
231367996 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_target_bad_addr.3839846858 |
|
|
Oct 15 11:55:15 AM UTC 24 |
Oct 15 11:55:27 AM UTC 24 |
1388318138 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_target_hrst.4020600850 |
|
|
Oct 15 11:54:12 AM UTC 24 |
Oct 15 11:54:16 AM UTC 24 |
888498494 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_target_timeout.263320655 |
|
|
Oct 15 11:54:04 AM UTC 24 |
Oct 15 11:54:16 AM UTC 24 |
3958804791 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_target_perf.1370625027 |
|
|
Oct 15 11:54:09 AM UTC 24 |
Oct 15 11:54:17 AM UTC 24 |
2393413073 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_watermarks_tx.3438167122 |
|
|
Oct 15 11:54:17 AM UTC 24 |
Oct 15 11:54:19 AM UTC 24 |
430540437 ps |
| T223 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_target_stress_all.4220698319 |
|
|
Oct 15 11:54:09 AM UTC 24 |
Oct 15 11:55:21 AM UTC 24 |
33719955360 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_watermarks_acq.2803059331 |
|
|
Oct 15 11:54:16 AM UTC 24 |
Oct 15 11:54:20 AM UTC 24 |
608683547 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_target_bad_addr.3735453048 |
|
|
Oct 15 11:54:11 AM UTC 24 |
Oct 15 11:54:21 AM UTC 24 |
930462992 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_host_may_nack.348176872 |
|
|
Oct 15 11:54:14 AM UTC 24 |
Oct 15 11:54:22 AM UTC 24 |
536479688 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_target_nack_txstretch.1644751116 |
|
|
Oct 15 11:54:21 AM UTC 24 |
Oct 15 11:54:24 AM UTC 24 |
259915570 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_target_smbus_maxlen.1651399574 |
|
|
Oct 15 11:54:18 AM UTC 24 |
Oct 15 11:54:24 AM UTC 24 |
601219030 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_alert_test.3348102375 |
|
|
Oct 15 11:54:23 AM UTC 24 |
Oct 15 11:54:25 AM UTC 24 |
15559346 ps |
| T51 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_target_nack_acqfull_addr.2416225359 |
|
|
Oct 15 11:54:20 AM UTC 24 |
Oct 15 11:54:25 AM UTC 24 |
3308610788 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_target_nack_acqfull.3253975660 |
|
|
Oct 15 11:54:20 AM UTC 24 |
Oct 15 11:54:27 AM UTC 24 |
558687559 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_host_override.662985214 |
|
|
Oct 15 11:54:26 AM UTC 24 |
Oct 15 11:54:28 AM UTC 24 |
28357418 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_target_tx_stretch_ctrl.4012685398 |
|
|
Oct 15 11:54:17 AM UTC 24 |
Oct 15 11:54:28 AM UTC 24 |
310649552 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_reset_fmt.259043701 |
|
|
Oct 15 11:54:28 AM UTC 24 |
Oct 15 11:54:31 AM UTC 24 |
750787253 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_target_stress_all.655393015 |
|
|
Oct 15 11:53:23 AM UTC 24 |
Oct 15 11:54:31 AM UTC 24 |
69445861192 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_overflow.3620366664 |
|
|
Oct 15 11:52:53 AM UTC 24 |
Oct 15 11:54:31 AM UTC 24 |
7203997893 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_reset_rx.2853567666 |
|
|
Oct 15 11:54:29 AM UTC 24 |
Oct 15 11:54:35 AM UTC 24 |
126782649 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_host_perf_precise.3228113444 |
|
|
Oct 15 11:54:32 AM UTC 24 |
Oct 15 11:54:35 AM UTC 24 |
313890926 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_fmt_empty.903019320 |
|
|
Oct 15 11:54:29 AM UTC 24 |
Oct 15 11:54:39 AM UTC 24 |
337587535 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_target_intr_smoke.4171525123 |
|
|
Oct 15 12:00:33 PM UTC 24 |
Oct 15 12:00:39 PM UTC 24 |
1024111487 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_host_error_intr.2385748289 |
|
|
Oct 15 11:54:36 AM UTC 24 |
Oct 15 11:54:41 AM UTC 24 |
754838303 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_host_smoke.777416197 |
|
|
Oct 15 11:52:51 AM UTC 24 |
Oct 15 11:54:46 AM UTC 24 |
8557734432 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_host_smoke.2835433537 |
|
|
Oct 15 11:54:25 AM UTC 24 |
Oct 15 11:54:51 AM UTC 24 |
5428713913 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_watermark.3572997049 |
|
|
Oct 15 11:53:36 AM UTC 24 |
Oct 15 11:54:53 AM UTC 24 |
13399518032 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_host_stretch_timeout.3331049070 |
|
|
Oct 15 11:54:36 AM UTC 24 |
Oct 15 11:54:56 AM UTC 24 |
3994129670 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_target_intr_stress_wr.53994787 |
|
|
Oct 15 11:54:00 AM UTC 24 |
Oct 15 11:55:02 AM UTC 24 |
6592302638 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_target_stress_rd.2312678468 |
|
|
Oct 15 11:54:52 AM UTC 24 |
Oct 15 11:55:04 AM UTC 24 |
794175995 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_target_intr_smoke.3549219055 |
|
|
Oct 15 11:54:57 AM UTC 24 |
Oct 15 11:55:05 AM UTC 24 |
2896451150 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_full.777007438 |
|
|
Oct 15 11:53:38 AM UTC 24 |
Oct 15 11:55:08 AM UTC 24 |
3383400711 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_reset_acq.3019809013 |
|
|
Oct 15 11:55:09 AM UTC 24 |
Oct 15 11:55:13 AM UTC 24 |
222195642 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_reset_tx.2684166329 |
|
|
Oct 15 11:55:10 AM UTC 24 |
Oct 15 11:55:14 AM UTC 24 |
198424331 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_target_timeout.1658188738 |
|
|
Oct 15 11:55:05 AM UTC 24 |
Oct 15 11:55:15 AM UTC 24 |
2788354583 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_target_smoke.1308416491 |
|
|
Oct 15 12:00:24 PM UTC 24 |
Oct 15 12:00:43 PM UTC 24 |
4619970974 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_watermarks_tx.3352290100 |
|
|
Oct 15 11:55:24 AM UTC 24 |
Oct 15 11:55:27 AM UTC 24 |
188302076 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_watermarks_acq.2362976191 |
|
|
Oct 15 11:55:24 AM UTC 24 |
Oct 15 11:55:27 AM UTC 24 |
332992534 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_host_mode_toggle.2933481449 |
|
|
Oct 15 11:55:22 AM UTC 24 |
Oct 15 11:55:28 AM UTC 24 |
280190285 ps |
| T264 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_host_may_nack.3730575023 |
|
|
Oct 15 11:55:23 AM UTC 24 |
Oct 15 11:55:32 AM UTC 24 |
450981074 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_target_smbus_maxlen.88210998 |
|
|
Oct 15 11:55:28 AM UTC 24 |
Oct 15 11:55:33 AM UTC 24 |
1000508604 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_target_tx_stretch_ctrl.4008681518 |
|
|
Oct 15 11:55:28 AM UTC 24 |
Oct 15 11:55:34 AM UTC 24 |
102505338 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_target_nack_acqfull.51823064 |
|
|
Oct 15 11:55:28 AM UTC 24 |
Oct 15 11:55:34 AM UTC 24 |
549007463 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_alert_test.4205404160 |
|
|
Oct 15 11:55:33 AM UTC 24 |
Oct 15 11:55:35 AM UTC 24 |
36000411 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_target_nack_acqfull_addr.2957126098 |
|
|
Oct 15 11:55:29 AM UTC 24 |
Oct 15 11:55:36 AM UTC 24 |
621559113 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_target_nack_txstretch.3380978594 |
|
|
Oct 15 11:55:33 AM UTC 24 |
Oct 15 11:55:36 AM UTC 24 |
139331026 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_host_override.3123007241 |
|
|
Oct 15 11:55:35 AM UTC 24 |
Oct 15 11:55:38 AM UTC 24 |
18803923 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_reset_fmt.2012251445 |
|
|
Oct 15 11:55:37 AM UTC 24 |
Oct 15 11:55:40 AM UTC 24 |
312860975 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_target_stress_wr.4232634837 |
|
|
Oct 15 11:54:47 AM UTC 24 |
Oct 15 11:55:44 AM UTC 24 |
34800805995 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/5.i2c_host_perf.2147747660 |
|
|
Oct 15 11:42:50 AM UTC 24 |
Oct 15 11:55:55 AM UTC 24 |
73910425471 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_watermark.3418574134 |
|
|
Oct 15 11:54:27 AM UTC 24 |
Oct 15 11:55:55 AM UTC 24 |
11077294423 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_reset_rx.1350963867 |
|
|
Oct 15 11:55:41 AM UTC 24 |
Oct 15 11:55:56 AM UTC 24 |
806397951 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_watermark.2148450935 |
|
|
Oct 15 11:52:53 AM UTC 24 |
Oct 15 11:55:56 AM UTC 24 |
26594362992 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_host_error_intr.4001316808 |
|
|
Oct 15 11:55:57 AM UTC 24 |
Oct 15 11:56:01 AM UTC 24 |
137390342 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/5.i2c_target_stress_all.3780081035 |
|
|
Oct 15 11:43:19 AM UTC 24 |
Oct 15 11:56:05 AM UTC 24 |
51271201471 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_fmt_empty.3828395091 |
|
|
Oct 15 11:55:39 AM UTC 24 |
Oct 15 11:56:06 AM UTC 24 |
1941027956 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_overflow.2315445780 |
|
|
Oct 15 11:54:27 AM UTC 24 |
Oct 15 11:56:06 AM UTC 24 |
5570383484 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_host_smoke.3931224711 |
|
|
Oct 15 11:55:34 AM UTC 24 |
Oct 15 11:56:08 AM UTC 24 |
1430907955 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_overflow.2700324019 |
|
|
Oct 15 11:53:36 AM UTC 24 |
Oct 15 11:56:14 AM UTC 24 |
9119848893 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_target_stress_all.2620035920 |
|
|
Oct 15 11:55:14 AM UTC 24 |
Oct 15 11:56:16 AM UTC 24 |
16316146979 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_host_stretch_timeout.702718515 |
|
|
Oct 15 11:55:57 AM UTC 24 |
Oct 15 11:56:20 AM UTC 24 |
956732968 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_target_smoke.918798183 |
|
|
Oct 15 11:56:06 AM UTC 24 |
Oct 15 11:56:21 AM UTC 24 |
812039840 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_reset_acq.3205547331 |
|
|
Oct 15 11:56:22 AM UTC 24 |
Oct 15 11:56:26 AM UTC 24 |
247688876 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_target_intr_smoke.947149926 |
|
|
Oct 15 11:56:15 AM UTC 24 |
Oct 15 11:56:27 AM UTC 24 |
4788823025 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/3.i2c_host_stress_all.2880105982 |
|
|
Oct 15 11:41:44 AM UTC 24 |
Oct 15 11:56:27 AM UTC 24 |
113094428980 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_reset_tx.3717344071 |
|
|
Oct 15 11:56:26 AM UTC 24 |
Oct 15 11:56:30 AM UTC 24 |
249528996 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_target_timeout.467350402 |
|
|
Oct 15 11:56:21 AM UTC 24 |
Oct 15 11:56:30 AM UTC 24 |
10105631223 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_host_mode_toggle.3040164199 |
|
|
Oct 15 11:56:31 AM UTC 24 |
Oct 15 11:56:35 AM UTC 24 |
229158768 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_target_stress_rd.1904972663 |
|
|
Oct 15 11:56:08 AM UTC 24 |
Oct 15 11:56:37 AM UTC 24 |
5126536087 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/18.i2c_host_perf.4275076970 |
|
|
Oct 15 11:53:39 AM UTC 24 |
Oct 15 11:56:38 AM UTC 24 |
5223914730 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_target_perf.1302107436 |
|
|
Oct 15 11:56:27 AM UTC 24 |
Oct 15 11:56:39 AM UTC 24 |
3057019862 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_target_bad_addr.1500576825 |
|
|
Oct 15 11:56:28 AM UTC 24 |
Oct 15 11:56:43 AM UTC 24 |
5554100763 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/13.i2c_target_stress_wr.4124956639 |
|
|
Oct 15 11:50:07 AM UTC 24 |
Oct 15 11:56:43 AM UTC 24 |
61274624306 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_watermarks_acq.4244753068 |
|
|
Oct 15 11:56:39 AM UTC 24 |
Oct 15 11:56:43 AM UTC 24 |
1412477640 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_watermarks_tx.2196911521 |
|
|
Oct 15 11:56:40 AM UTC 24 |
Oct 15 11:56:44 AM UTC 24 |
323494359 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_target_intr_stress_wr.4132473369 |
|
|
Oct 15 11:55:03 AM UTC 24 |
Oct 15 11:56:44 AM UTC 24 |
32240674553 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_target_tx_stretch_ctrl.2041697512 |
|
|
Oct 15 11:56:40 AM UTC 24 |
Oct 15 11:56:45 AM UTC 24 |
154010406 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_alert_test.2197332738 |
|
|
Oct 15 11:56:45 AM UTC 24 |
Oct 15 11:56:47 AM UTC 24 |
15480239 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_target_smbus_maxlen.2818087317 |
|
|
Oct 15 11:56:44 AM UTC 24 |
Oct 15 11:56:48 AM UTC 24 |
3299277161 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_target_nack_acqfull.2854442176 |
|
|
Oct 15 11:56:44 AM UTC 24 |
Oct 15 11:56:48 AM UTC 24 |
964975066 ps |
| T117 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_watermark.3722644804 |
|
|
Oct 15 11:55:37 AM UTC 24 |
Oct 15 11:56:49 AM UTC 24 |
5891175429 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_target_nack_acqfull_addr.3705858875 |
|
|
Oct 15 11:56:44 AM UTC 24 |
Oct 15 11:56:50 AM UTC 24 |
928968363 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_host_override.1641493114 |
|
|
Oct 15 11:56:48 AM UTC 24 |
Oct 15 11:56:51 AM UTC 24 |
120571582 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_reset_fmt.2851670433 |
|
|
Oct 15 11:56:50 AM UTC 24 |
Oct 15 11:56:52 AM UTC 24 |
430908220 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_full.2088283076 |
|
|
Oct 15 11:54:32 AM UTC 24 |
Oct 15 11:56:56 AM UTC 24 |
4105620012 ps |
| T262 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_host_may_nack.2928145307 |
|
|
Oct 15 11:56:37 AM UTC 24 |
Oct 15 11:56:56 AM UTC 24 |
1216360425 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_fmt_empty.8404962 |
|
|
Oct 15 11:56:50 AM UTC 24 |
Oct 15 11:56:58 AM UTC 24 |
346877265 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_host_perf_precise.1609969685 |
|
|
Oct 15 11:56:53 AM UTC 24 |
Oct 15 11:56:59 AM UTC 24 |
74736378 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_host_perf.159419404 |
|
|
Oct 15 11:56:52 AM UTC 24 |
Oct 15 11:57:00 AM UTC 24 |
1292923860 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_host_error_intr.1881153083 |
|
|
Oct 15 11:56:57 AM UTC 24 |
Oct 15 11:57:02 AM UTC 24 |
111305967 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_overflow.3068312638 |
|
|
Oct 15 11:55:37 AM UTC 24 |
Oct 15 11:57:03 AM UTC 24 |
2478749958 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_reset_rx.4173351917 |
|
|
Oct 15 11:56:50 AM UTC 24 |
Oct 15 11:57:04 AM UTC 24 |
184557172 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_full.4127569155 |
|
|
Oct 15 11:52:55 AM UTC 24 |
Oct 15 11:57:06 AM UTC 24 |
32553804649 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_full.733765332 |
|
|
Oct 15 11:55:45 AM UTC 24 |
Oct 15 11:57:06 AM UTC 24 |
8270393397 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_target_timeout.637749753 |
|
|
Oct 15 11:57:08 AM UTC 24 |
Oct 15 11:57:19 AM UTC 24 |
9098556856 ps |
| T297 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_reset_acq.3266070836 |
|
|
Oct 15 11:57:16 AM UTC 24 |
Oct 15 11:57:19 AM UTC 24 |
186391797 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_target_intr_smoke.1666319142 |
|
|
Oct 15 11:57:04 AM UTC 24 |
Oct 15 11:57:22 AM UTC 24 |
6509680223 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_reset_tx.1475509320 |
|
|
Oct 15 11:57:20 AM UTC 24 |
Oct 15 11:57:22 AM UTC 24 |
221506242 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_host_smoke.1460505997 |
|
|
Oct 15 11:56:46 AM UTC 24 |
Oct 15 11:57:23 AM UTC 24 |
11075770827 ps |
| T275 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_target_smoke.2511971184 |
|
|
Oct 15 11:56:59 AM UTC 24 |
Oct 15 11:57:23 AM UTC 24 |
3527619859 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_target_hrst.2028522027 |
|
|
Oct 15 11:57:23 AM UTC 24 |
Oct 15 11:57:28 AM UTC 24 |
690773043 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_host_mode_toggle.365538231 |
|
|
Oct 15 11:57:24 AM UTC 24 |
Oct 15 11:57:29 AM UTC 24 |
733584226 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_target_perf.3277851083 |
|
|
Oct 15 11:57:20 AM UTC 24 |
Oct 15 11:57:29 AM UTC 24 |
4445142264 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_watermarks_tx.3442938333 |
|
|
Oct 15 11:57:30 AM UTC 24 |
Oct 15 11:57:33 AM UTC 24 |
213215934 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_target_bad_addr.1904911796 |
|
|
Oct 15 11:57:23 AM UTC 24 |
Oct 15 11:57:34 AM UTC 24 |
1702025700 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_watermarks_acq.3006813463 |
|
|
Oct 15 11:57:30 AM UTC 24 |
Oct 15 11:57:34 AM UTC 24 |
736119212 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_target_stress_rd.3685302258 |
|
|
Oct 15 11:57:02 AM UTC 24 |
Oct 15 11:57:38 AM UTC 24 |
2364576635 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_target_smbus_maxlen.2404181110 |
|
|
Oct 15 11:57:35 AM UTC 24 |
Oct 15 11:57:38 AM UTC 24 |
738625681 ps |
| T263 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_host_may_nack.4126852497 |
|
|
Oct 15 11:57:29 AM UTC 24 |
Oct 15 11:57:39 AM UTC 24 |
1051196641 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_target_tx_stretch_ctrl.2773281178 |
|
|
Oct 15 11:57:33 AM UTC 24 |
Oct 15 11:57:39 AM UTC 24 |
140982586 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_target_nack_acqfull.2668250176 |
|
|
Oct 15 11:57:35 AM UTC 24 |
Oct 15 11:57:40 AM UTC 24 |
853218694 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_host_stretch_timeout.2819712581 |
|
|
Oct 15 11:56:57 AM UTC 24 |
Oct 15 11:57:42 AM UTC 24 |
1043176835 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_alert_test.3197276053 |
|
|
Oct 15 11:57:40 AM UTC 24 |
Oct 15 11:57:42 AM UTC 24 |
60586746 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_target_nack_txstretch.1363869542 |
|
|
Oct 15 11:57:39 AM UTC 24 |
Oct 15 11:57:42 AM UTC 24 |
136000866 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_host_override.2465885145 |
|
|
Oct 15 11:57:41 AM UTC 24 |
Oct 15 11:57:43 AM UTC 24 |
46655034 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_target_intr_stress_wr.3652665708 |
|
|
Oct 15 11:57:07 AM UTC 24 |
Oct 15 11:57:43 AM UTC 24 |
8275890169 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_target_nack_acqfull_addr.492762651 |
|
|
Oct 15 11:57:39 AM UTC 24 |
Oct 15 11:57:44 AM UTC 24 |
639806364 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_reset_fmt.2071198066 |
|
|
Oct 15 11:57:43 AM UTC 24 |
Oct 15 11:57:46 AM UTC 24 |
539485326 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_reset_rx.1200096796 |
|
|
Oct 15 11:57:44 AM UTC 24 |
Oct 15 11:57:49 AM UTC 24 |
300236722 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_full.1896858413 |
|
|
Oct 15 11:56:51 AM UTC 24 |
Oct 15 11:57:50 AM UTC 24 |
9538529811 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_fmt_empty.1160377555 |
|
|
Oct 15 11:57:44 AM UTC 24 |
Oct 15 11:57:52 AM UTC 24 |
249134512 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_host_perf.3904157964 |
|
|
Oct 15 11:57:46 AM UTC 24 |
Oct 15 11:57:54 AM UTC 24 |
1080842956 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_host_error_intr.595259841 |
|
|
Oct 15 11:57:53 AM UTC 24 |
Oct 15 11:57:57 AM UTC 24 |
168400809 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_target_stress_all.65555436 |
|
|
Oct 15 11:57:23 AM UTC 24 |
Oct 15 11:58:07 AM UTC 24 |
30814358580 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_overflow.1315733101 |
|
|
Oct 15 11:56:49 AM UTC 24 |
Oct 15 11:58:12 AM UTC 24 |
1434790201 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_target_smoke.2094454398 |
|
|
Oct 15 11:57:58 AM UTC 24 |
Oct 15 11:58:13 AM UTC 24 |
1700902907 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_host_perf_precise.1648599737 |
|
|
Oct 15 11:57:51 AM UTC 24 |
Oct 15 11:58:16 AM UTC 24 |
864759079 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_host_perf.2859654952 |
|
|
Oct 15 11:55:55 AM UTC 24 |
Oct 15 11:58:17 AM UTC 24 |
49591303344 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_target_stretch.4052249324 |
|
|
Oct 15 11:58:14 AM UTC 24 |
Oct 15 11:58:24 AM UTC 24 |
3869900216 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_target_intr_smoke.4141005512 |
|
|
Oct 15 11:58:17 AM UTC 24 |
Oct 15 11:58:26 AM UTC 24 |
849637516 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_reset_acq.2393257955 |
|
|
Oct 15 11:58:30 AM UTC 24 |
Oct 15 11:58:32 AM UTC 24 |
232673338 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_host_stretch_timeout.4202880917 |
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|
Oct 15 11:57:51 AM UTC 24 |
Oct 15 11:58:32 AM UTC 24 |
2617528387 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_target_timeout.156108084 |
|
|
Oct 15 11:58:24 AM UTC 24 |
Oct 15 11:58:34 AM UTC 24 |
14591926966 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_reset_tx.4108314563 |
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|
Oct 15 11:58:31 AM UTC 24 |
Oct 15 11:58:35 AM UTC 24 |
249260595 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_target_stress_all.572006749 |
|
|
Oct 15 11:51:56 AM UTC 24 |
Oct 15 11:58:37 AM UTC 24 |
97404986327 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_target_perf.1798604456 |
|
|
Oct 15 11:58:33 AM UTC 24 |
Oct 15 11:58:38 AM UTC 24 |
461583813 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_target_hrst.338918779 |
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|
Oct 15 11:58:36 AM UTC 24 |
Oct 15 11:58:41 AM UTC 24 |
304043598 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_target_bad_addr.905885101 |
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|
Oct 15 11:58:35 AM UTC 24 |
Oct 15 11:58:43 AM UTC 24 |
2881580822 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_watermarks_acq.2435411375 |
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|
Oct 15 11:58:41 AM UTC 24 |
Oct 15 11:58:43 AM UTC 24 |
179764777 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_watermark.1191553251 |
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|
Oct 15 11:56:48 AM UTC 24 |
Oct 15 11:58:44 AM UTC 24 |
3029384304 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_host_may_nack.4149378605 |
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|
Oct 15 11:58:39 AM UTC 24 |
Oct 15 11:58:45 AM UTC 24 |
301410179 ps |