| T1075 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_rx.1427753458 |
|
|
Oct 15 12:06:44 PM UTC 24 |
Oct 15 12:06:57 PM UTC 24 |
262252222 ps |
| T1076 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_target_stress_all.370947075 |
|
|
Oct 15 12:06:24 PM UTC 24 |
Oct 15 12:06:58 PM UTC 24 |
8101254129 ps |
| T1077 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/14.i2c_target_stress_all.4198231966 |
|
|
Oct 15 11:51:20 AM UTC 24 |
Oct 15 12:07:02 PM UTC 24 |
47760614907 ps |
| T1078 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_host_stretch_timeout.833798535 |
|
|
Oct 15 12:06:47 PM UTC 24 |
Oct 15 12:07:04 PM UTC 24 |
872325871 ps |
| T1079 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_watermark.3647559102 |
|
|
Oct 15 12:02:16 PM UTC 24 |
Oct 15 12:07:07 PM UTC 24 |
18899589522 ps |
| T1080 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_target_intr_smoke.1821853932 |
|
|
Oct 15 12:06:58 PM UTC 24 |
Oct 15 12:07:08 PM UTC 24 |
3639615350 ps |
| T1081 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_watermark.359516484 |
|
|
Oct 15 12:04:24 PM UTC 24 |
Oct 15 12:07:09 PM UTC 24 |
2909386538 ps |
| T1082 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_target_stress_rd.3278063692 |
|
|
Oct 15 12:06:54 PM UTC 24 |
Oct 15 12:07:11 PM UTC 24 |
13031873763 ps |
| T1083 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_acq.597989921 |
|
|
Oct 15 12:07:09 PM UTC 24 |
Oct 15 12:07:12 PM UTC 24 |
1236292023 ps |
| T1084 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_tx.2451355230 |
|
|
Oct 15 12:07:10 PM UTC 24 |
Oct 15 12:07:13 PM UTC 24 |
248455379 ps |
| T1085 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_target_smoke.792219106 |
|
|
Oct 15 12:06:52 PM UTC 24 |
Oct 15 12:07:15 PM UTC 24 |
2851765534 ps |
| T1086 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_target_timeout.3134418028 |
|
|
Oct 15 12:07:05 PM UTC 24 |
Oct 15 12:07:17 PM UTC 24 |
6736765878 ps |
| T1087 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_target_hrst.671098608 |
|
|
Oct 15 12:07:14 PM UTC 24 |
Oct 15 12:07:18 PM UTC 24 |
962418500 ps |
| T1088 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_target_perf.3198977560 |
|
|
Oct 15 12:07:12 PM UTC 24 |
Oct 15 12:07:19 PM UTC 24 |
546237993 ps |
| T1089 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_host_smoke.3889232616 |
|
|
Oct 15 12:06:39 PM UTC 24 |
Oct 15 12:07:19 PM UTC 24 |
8626368394 ps |
| T1090 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_watermarks_tx.3763429468 |
|
|
Oct 15 12:07:19 PM UTC 24 |
Oct 15 12:07:22 PM UTC 24 |
127493119 ps |
| T1091 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_overflow.1991416194 |
|
|
Oct 15 12:05:17 PM UTC 24 |
Oct 15 12:07:23 PM UTC 24 |
8094911842 ps |
| T1092 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_target_bad_addr.1881359826 |
|
|
Oct 15 12:07:13 PM UTC 24 |
Oct 15 12:07:23 PM UTC 24 |
931093426 ps |
| T1093 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_watermarks_acq.3343873581 |
|
|
Oct 15 12:07:18 PM UTC 24 |
Oct 15 12:07:25 PM UTC 24 |
566131419 ps |
| T1094 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_target_tx_stretch_ctrl.3891619937 |
|
|
Oct 15 12:07:20 PM UTC 24 |
Oct 15 12:07:25 PM UTC 24 |
96606493 ps |
| T1095 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_target_intr_stress_wr.3531736076 |
|
|
Oct 15 12:07:02 PM UTC 24 |
Oct 15 12:07:25 PM UTC 24 |
15281247325 ps |
| T1096 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_target_smbus_maxlen.4007986381 |
|
|
Oct 15 12:07:23 PM UTC 24 |
Oct 15 12:07:26 PM UTC 24 |
435652460 ps |
| T1097 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_full.697762120 |
|
|
Oct 15 12:05:21 PM UTC 24 |
Oct 15 12:08:06 PM UTC 24 |
2945039436 ps |
| T1098 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_target_nack_acqfull_addr.1074884978 |
|
|
Oct 15 12:07:24 PM UTC 24 |
Oct 15 12:07:28 PM UTC 24 |
2556024020 ps |
| T1099 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_alert_test.2548877954 |
|
|
Oct 15 12:07:26 PM UTC 24 |
Oct 15 12:07:28 PM UTC 24 |
52295773 ps |
| T1100 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_host_override.575601369 |
|
|
Oct 15 12:07:26 PM UTC 24 |
Oct 15 12:07:28 PM UTC 24 |
73762911 ps |
| T1101 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_target_nack_acqfull.4253219969 |
|
|
Oct 15 12:07:24 PM UTC 24 |
Oct 15 12:07:29 PM UTC 24 |
477089938 ps |
| T1102 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_target_stretch.4276791186 |
|
|
Oct 15 12:06:58 PM UTC 24 |
Oct 15 12:07:31 PM UTC 24 |
6131242049 ps |
| T1103 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_fmt.1617285585 |
|
|
Oct 15 12:07:29 PM UTC 24 |
Oct 15 12:07:32 PM UTC 24 |
197481932 ps |
| T1104 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_rx.824842152 |
|
|
Oct 15 12:07:29 PM UTC 24 |
Oct 15 12:07:39 PM UTC 24 |
262584206 ps |
| T1105 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_full.2594944596 |
|
|
Oct 15 12:04:27 PM UTC 24 |
Oct 15 12:07:40 PM UTC 24 |
6013930783 ps |
| T1106 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_host_perf_precise.3027037497 |
|
|
Oct 15 12:07:33 PM UTC 24 |
Oct 15 12:07:40 PM UTC 24 |
446709233 ps |
| T1107 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_fmt_empty.266994549 |
|
|
Oct 15 12:07:29 PM UTC 24 |
Oct 15 12:07:41 PM UTC 24 |
846373475 ps |
| T1108 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_host_smoke.3456739220 |
|
|
Oct 15 12:07:26 PM UTC 24 |
Oct 15 12:07:43 PM UTC 24 |
1143468824 ps |
| T1109 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_host_may_nack.3321798005 |
|
|
Oct 15 12:07:17 PM UTC 24 |
Oct 15 12:07:45 PM UTC 24 |
984754067 ps |
| T1110 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_host_error_intr.3078845969 |
|
|
Oct 15 12:07:41 PM UTC 24 |
Oct 15 12:07:47 PM UTC 24 |
2665387279 ps |
| T1111 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_target_stretch.2896081107 |
|
|
Oct 15 12:07:48 PM UTC 24 |
Oct 15 12:07:52 PM UTC 24 |
237579684 ps |
| T1112 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_host_stretch_timeout.1243428454 |
|
|
Oct 15 12:07:40 PM UTC 24 |
Oct 15 12:07:55 PM UTC 24 |
484123984 ps |
| T1113 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_target_smoke.330048727 |
|
|
Oct 15 12:07:42 PM UTC 24 |
Oct 15 12:07:55 PM UTC 24 |
3256271549 ps |
| T1114 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_target_intr_stress_wr.4187710562 |
|
|
Oct 15 12:02:49 PM UTC 24 |
Oct 15 12:08:00 PM UTC 24 |
21815095919 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_acq.3413998136 |
|
|
Oct 15 12:08:03 PM UTC 24 |
Oct 15 12:08:07 PM UTC 24 |
209700140 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_tx.2928368349 |
|
|
Oct 15 12:08:05 PM UTC 24 |
Oct 15 12:08:08 PM UTC 24 |
270055746 ps |
| T1115 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/17.i2c_target_stress_wr.373064852 |
|
|
Oct 15 11:52:59 AM UTC 24 |
Oct 15 12:08:10 PM UTC 24 |
53873359590 ps |
| T1116 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_target_perf.3875552500 |
|
|
Oct 15 12:08:05 PM UTC 24 |
Oct 15 12:08:12 PM UTC 24 |
510778421 ps |
| T1117 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_host_mode_toggle.976675486 |
|
|
Oct 15 12:08:10 PM UTC 24 |
Oct 15 12:08:12 PM UTC 24 |
137117663 ps |
| T1118 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_target_stress_wr.4062528347 |
|
|
Oct 15 12:00:26 PM UTC 24 |
Oct 15 12:08:14 PM UTC 24 |
58262024143 ps |
| T1119 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_target_bad_addr.4268310017 |
|
|
Oct 15 12:08:08 PM UTC 24 |
Oct 15 12:08:16 PM UTC 24 |
1213111724 ps |
| T1120 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_watermarks_acq.3981436685 |
|
|
Oct 15 12:08:13 PM UTC 24 |
Oct 15 12:08:16 PM UTC 24 |
1290705097 ps |
| T1121 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_watermarks_tx.1813665972 |
|
|
Oct 15 12:08:14 PM UTC 24 |
Oct 15 12:08:16 PM UTC 24 |
175817730 ps |
| T1122 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_target_smbus_maxlen.2257451444 |
|
|
Oct 15 12:08:17 PM UTC 24 |
Oct 15 12:08:21 PM UTC 24 |
540654508 ps |
| T1123 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_overflow.2060847627 |
|
|
Oct 15 12:06:41 PM UTC 24 |
Oct 15 12:08:23 PM UTC 24 |
6471108771 ps |
| T245 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_host_stress_all.3082788384 |
|
|
Oct 15 12:02:32 PM UTC 24 |
Oct 15 12:08:23 PM UTC 24 |
27801066555 ps |
| T1124 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull.200782208 |
|
|
Oct 15 12:08:17 PM UTC 24 |
Oct 15 12:08:24 PM UTC 24 |
2165945003 ps |
| T1125 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_target_tx_stretch_ctrl.1577541726 |
|
|
Oct 15 12:08:16 PM UTC 24 |
Oct 15 12:08:24 PM UTC 24 |
191873406 ps |
| T1126 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_alert_test.1378464665 |
|
|
Oct 15 12:10:01 PM UTC 24 |
Oct 15 12:10:03 PM UTC 24 |
25745703 ps |
| T1127 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull_addr.1171257057 |
|
|
Oct 15 12:08:21 PM UTC 24 |
Oct 15 12:08:27 PM UTC 24 |
3282620042 ps |
| T1128 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_alert_test.2537889193 |
|
|
Oct 15 12:08:25 PM UTC 24 |
Oct 15 12:08:27 PM UTC 24 |
17103066 ps |
| T1129 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_full.4012763020 |
|
|
Oct 15 12:07:30 PM UTC 24 |
Oct 15 12:08:27 PM UTC 24 |
3718347832 ps |
| T1130 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_target_nack_txstretch.826227354 |
|
|
Oct 15 12:08:24 PM UTC 24 |
Oct 15 12:08:27 PM UTC 24 |
819375631 ps |
| T1131 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_host_override.291066568 |
|
|
Oct 15 12:08:26 PM UTC 24 |
Oct 15 12:08:28 PM UTC 24 |
43047786 ps |
| T1132 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_reset_fmt.1842693670 |
|
|
Oct 15 12:08:28 PM UTC 24 |
Oct 15 12:08:30 PM UTC 24 |
436458573 ps |
| T265 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_host_may_nack.3212440153 |
|
|
Oct 15 12:08:13 PM UTC 24 |
Oct 15 12:08:32 PM UTC 24 |
672664616 ps |
| T1133 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_reset_rx.442937683 |
|
|
Oct 15 12:08:28 PM UTC 24 |
Oct 15 12:08:33 PM UTC 24 |
466447992 ps |
| T1134 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_target_stress_wr.4062152810 |
|
|
Oct 15 11:52:19 AM UTC 24 |
Oct 15 12:08:33 PM UTC 24 |
54787767645 ps |
| T1135 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_host_perf.513184344 |
|
|
Oct 15 12:07:32 PM UTC 24 |
Oct 15 12:08:33 PM UTC 24 |
13740037702 ps |
| T1136 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_full.3590378298 |
|
|
Oct 15 12:06:45 PM UTC 24 |
Oct 15 12:08:40 PM UTC 24 |
4285326616 ps |
| T1137 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_host_error_intr.3354390004 |
|
|
Oct 15 12:08:33 PM UTC 24 |
Oct 15 12:08:40 PM UTC 24 |
228374208 ps |
| T1138 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_watermark.2955167401 |
|
|
Oct 15 12:07:27 PM UTC 24 |
Oct 15 12:08:41 PM UTC 24 |
3705885110 ps |
| T1139 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_target_stress_rd.180190873 |
|
|
Oct 15 12:07:46 PM UTC 24 |
Oct 15 12:08:48 PM UTC 24 |
9842765227 ps |
| T1140 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_host_stretch_timeout.3174859770 |
|
|
Oct 15 12:08:32 PM UTC 24 |
Oct 15 12:08:50 PM UTC 24 |
943241434 ps |
| T1141 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_host_perf_precise.2449766837 |
|
|
Oct 15 12:08:31 PM UTC 24 |
Oct 15 12:08:51 PM UTC 24 |
302847398 ps |
| T1142 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_target_stress_all.3028081296 |
|
|
Oct 15 12:08:07 PM UTC 24 |
Oct 15 12:08:53 PM UTC 24 |
15236837768 ps |
| T1143 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_target_stress_rd.2633955732 |
|
|
Oct 15 12:08:42 PM UTC 24 |
Oct 15 12:08:55 PM UTC 24 |
1598559205 ps |
| T1144 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_reset_acq.1968154511 |
|
|
Oct 15 12:08:53 PM UTC 24 |
Oct 15 12:08:56 PM UTC 24 |
182102328 ps |
| T1145 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_reset_tx.1187760197 |
|
|
Oct 15 12:08:55 PM UTC 24 |
Oct 15 12:08:58 PM UTC 24 |
690080214 ps |
| T1146 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_target_intr_smoke.2495232419 |
|
|
Oct 15 12:08:49 PM UTC 24 |
Oct 15 12:08:59 PM UTC 24 |
1037321022 ps |
| T1147 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_target_smoke.41699389 |
|
|
Oct 15 12:08:35 PM UTC 24 |
Oct 15 12:09:00 PM UTC 24 |
6254899806 ps |
| T1148 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_watermark.3295692065 |
|
|
Oct 15 12:05:17 PM UTC 24 |
Oct 15 12:09:01 PM UTC 24 |
3856611158 ps |
| T1149 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_overflow.1324670699 |
|
|
Oct 15 12:08:27 PM UTC 24 |
Oct 15 12:09:03 PM UTC 24 |
1390730009 ps |
| T1150 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_target_timeout.836844306 |
|
|
Oct 15 12:08:51 PM UTC 24 |
Oct 15 12:09:03 PM UTC 24 |
1858474022 ps |
| T1151 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/8.i2c_target_stress_wr.2058242384 |
|
|
Oct 15 11:45:04 AM UTC 24 |
Oct 15 12:09:05 PM UTC 24 |
68162443571 ps |
| T1152 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_fmt_empty.3640591977 |
|
|
Oct 15 12:08:28 PM UTC 24 |
Oct 15 12:09:06 PM UTC 24 |
7327356482 ps |
| T1153 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_watermarks_tx.1898659555 |
|
|
Oct 15 12:09:04 PM UTC 24 |
Oct 15 12:09:07 PM UTC 24 |
618081187 ps |
| T1154 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_target_perf.2912671117 |
|
|
Oct 15 12:08:56 PM UTC 24 |
Oct 15 12:09:07 PM UTC 24 |
842180334 ps |
| T1155 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_target_bad_addr.3624890326 |
|
|
Oct 15 12:08:59 PM UTC 24 |
Oct 15 12:09:07 PM UTC 24 |
1934381115 ps |
| T1156 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_watermarks_acq.402454373 |
|
|
Oct 15 12:09:04 PM UTC 24 |
Oct 15 12:09:10 PM UTC 24 |
1903658241 ps |
| T1157 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_alert_test.553110813 |
|
|
Oct 15 12:09:08 PM UTC 24 |
Oct 15 12:09:10 PM UTC 24 |
16289477 ps |
| T1158 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_target_smbus_maxlen.1599292402 |
|
|
Oct 15 12:09:05 PM UTC 24 |
Oct 15 12:09:11 PM UTC 24 |
2032939260 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_host_override.3534490156 |
|
|
Oct 15 12:09:12 PM UTC 24 |
Oct 15 12:09:14 PM UTC 24 |
66771313 ps |
| T1159 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_target_nack_acqfull.1664472213 |
|
|
Oct 15 12:09:07 PM UTC 24 |
Oct 15 12:09:14 PM UTC 24 |
2041411442 ps |
| T1160 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_target_nack_acqfull_addr.808872310 |
|
|
Oct 15 12:09:08 PM UTC 24 |
Oct 15 12:09:14 PM UTC 24 |
2094693856 ps |
| T1161 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_target_tx_stretch_ctrl.2122770653 |
|
|
Oct 15 12:09:04 PM UTC 24 |
Oct 15 12:09:15 PM UTC 24 |
675145531 ps |
| T1162 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_reset_fmt.393224472 |
|
|
Oct 15 12:09:15 PM UTC 24 |
Oct 15 12:09:18 PM UTC 24 |
353572045 ps |
| T1163 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_target_stress_wr.339946026 |
|
|
Oct 15 12:08:41 PM UTC 24 |
Oct 15 12:09:19 PM UTC 24 |
13312482919 ps |
| T1164 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_host_smoke.3444623126 |
|
|
Oct 15 12:08:25 PM UTC 24 |
Oct 15 12:09:20 PM UTC 24 |
1354845943 ps |
| T266 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_host_may_nack.1104394486 |
|
|
Oct 15 12:09:02 PM UTC 24 |
Oct 15 12:09:20 PM UTC 24 |
3355807602 ps |
| T1165 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_host_perf_precise.3374720470 |
|
|
Oct 15 12:09:19 PM UTC 24 |
Oct 15 12:09:22 PM UTC 24 |
97107718 ps |
| T1166 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_target_stress_wr.3413285459 |
|
|
Oct 15 12:07:44 PM UTC 24 |
Oct 15 12:09:23 PM UTC 24 |
45809321561 ps |
| T1167 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_reset_rx.1893005252 |
|
|
Oct 15 12:09:15 PM UTC 24 |
Oct 15 12:09:24 PM UTC 24 |
2596488064 ps |
| T1168 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_fmt_empty.3420025905 |
|
|
Oct 15 12:09:15 PM UTC 24 |
Oct 15 12:09:26 PM UTC 24 |
1352731134 ps |
| T1169 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_host_error_intr.242884267 |
|
|
Oct 15 12:09:21 PM UTC 24 |
Oct 15 12:09:27 PM UTC 24 |
81624839 ps |
| T1170 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_target_stretch.785164739 |
|
|
Oct 15 12:09:28 PM UTC 24 |
Oct 15 12:09:32 PM UTC 24 |
695390941 ps |
| T1171 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_target_intr_stress_wr.2675753171 |
|
|
Oct 15 12:08:50 PM UTC 24 |
Oct 15 12:09:37 PM UTC 24 |
20642491409 ps |
| T1172 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_host_stretch_timeout.4268253499 |
|
|
Oct 15 12:09:20 PM UTC 24 |
Oct 15 12:09:38 PM UTC 24 |
4482185932 ps |
| T1173 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_target_stress_rd.3870012948 |
|
|
Oct 15 12:09:27 PM UTC 24 |
Oct 15 12:09:39 PM UTC 24 |
2551537072 ps |
| T1174 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_reset_acq.1959853548 |
|
|
Oct 15 12:09:40 PM UTC 24 |
Oct 15 12:09:43 PM UTC 24 |
2553619635 ps |
| T1175 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_target_intr_smoke.4065841481 |
|
|
Oct 15 12:09:33 PM UTC 24 |
Oct 15 12:09:44 PM UTC 24 |
953299089 ps |
| T1176 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_reset_tx.3986428713 |
|
|
Oct 15 12:09:42 PM UTC 24 |
Oct 15 12:09:46 PM UTC 24 |
704901776 ps |
| T1177 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_host_smoke.509472322 |
|
|
Oct 15 12:09:10 PM UTC 24 |
Oct 15 12:09:47 PM UTC 24 |
1446314176 ps |
| T1178 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_target_stress_all.4071034704 |
|
|
Oct 15 12:07:12 PM UTC 24 |
Oct 15 12:09:48 PM UTC 24 |
61139247033 ps |
| T1179 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_target_timeout.1055374905 |
|
|
Oct 15 12:09:38 PM UTC 24 |
Oct 15 12:09:52 PM UTC 24 |
1313205690 ps |
| T1180 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_target_perf.541988087 |
|
|
Oct 15 12:09:44 PM UTC 24 |
Oct 15 12:09:54 PM UTC 24 |
1271958567 ps |
| T1181 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_host_mode_toggle.1874300555 |
|
|
Oct 15 12:09:50 PM UTC 24 |
Oct 15 12:09:56 PM UTC 24 |
269353151 ps |
| T1182 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_target_smoke.3886602801 |
|
|
Oct 15 12:09:23 PM UTC 24 |
Oct 15 12:09:58 PM UTC 24 |
845589602 ps |
| T1183 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_host_perf.131639852 |
|
|
Oct 15 12:06:46 PM UTC 24 |
Oct 15 12:09:58 PM UTC 24 |
5000976221 ps |
| T1184 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_watermarks_tx.4005957048 |
|
|
Oct 15 12:09:56 PM UTC 24 |
Oct 15 12:09:59 PM UTC 24 |
362284965 ps |
| T1185 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_target_bad_addr.757950352 |
|
|
Oct 15 12:09:46 PM UTC 24 |
Oct 15 12:09:59 PM UTC 24 |
1393495315 ps |
| T1186 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_watermarks_acq.2660139819 |
|
|
Oct 15 12:09:55 PM UTC 24 |
Oct 15 12:10:01 PM UTC 24 |
595463626 ps |
| T1187 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_watermark.3497722765 |
|
|
Oct 15 12:08:27 PM UTC 24 |
Oct 15 12:10:03 PM UTC 24 |
2880115802 ps |
| T1188 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_overflow.2143847438 |
|
|
Oct 15 12:07:28 PM UTC 24 |
Oct 15 12:10:04 PM UTC 24 |
10103300455 ps |
| T1189 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_target_nack_txstretch.3073400935 |
|
|
Oct 15 12:10:00 PM UTC 24 |
Oct 15 12:10:04 PM UTC 24 |
186620685 ps |
| T1190 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_target_tx_stretch_ctrl.1802236339 |
|
|
Oct 15 12:09:57 PM UTC 24 |
Oct 15 12:10:05 PM UTC 24 |
198774301 ps |
| T1191 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_target_smbus_maxlen.690013758 |
|
|
Oct 15 12:09:59 PM UTC 24 |
Oct 15 12:10:05 PM UTC 24 |
3927689190 ps |
| T1192 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_target_nack_acqfull.3750194032 |
|
|
Oct 15 12:09:59 PM UTC 24 |
Oct 15 12:10:06 PM UTC 24 |
2295131484 ps |
| T1193 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_target_nack_acqfull_addr.3452276094 |
|
|
Oct 15 12:10:00 PM UTC 24 |
Oct 15 12:10:06 PM UTC 24 |
2340413128 ps |
| T1194 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_target_stress_wr.1174033994 |
|
|
Oct 15 12:09:25 PM UTC 24 |
Oct 15 12:10:06 PM UTC 24 |
35764809370 ps |
| T1195 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_host_override.1901452185 |
|
|
Oct 15 12:10:04 PM UTC 24 |
Oct 15 12:10:06 PM UTC 24 |
42669032 ps |
| T1196 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_reset_fmt.2605866830 |
|
|
Oct 15 12:10:06 PM UTC 24 |
Oct 15 12:10:08 PM UTC 24 |
170402156 ps |
| T1197 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/14.i2c_target_stress_wr.617538907 |
|
|
Oct 15 11:51:02 AM UTC 24 |
Oct 15 12:10:09 PM UTC 24 |
64264037718 ps |
| T1198 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_host_perf_precise.3658431200 |
|
|
Oct 15 12:10:07 PM UTC 24 |
Oct 15 12:10:10 PM UTC 24 |
92702899 ps |
| T1199 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_host_may_nack.4220089263 |
|
|
Oct 15 12:09:53 PM UTC 24 |
Oct 15 12:10:12 PM UTC 24 |
1303753256 ps |
| T1200 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_host_error_intr.2857863884 |
|
|
Oct 15 12:10:09 PM UTC 24 |
Oct 15 12:10:12 PM UTC 24 |
116224736 ps |
| T1201 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_reset_rx.1929334344 |
|
|
Oct 15 12:10:07 PM UTC 24 |
Oct 15 12:10:21 PM UTC 24 |
159316248 ps |
| T1202 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_host_perf_precise.3600391050 |
|
|
Oct 15 12:05:25 PM UTC 24 |
Oct 15 12:10:22 PM UTC 24 |
23144400148 ps |
| T1203 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_target_stress_wr.3008988448 |
|
|
Oct 15 12:10:12 PM UTC 24 |
Oct 15 12:10:23 PM UTC 24 |
7167639108 ps |
| T1204 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_fmt_empty.1578243839 |
|
|
Oct 15 12:10:06 PM UTC 24 |
Oct 15 12:10:24 PM UTC 24 |
1350742919 ps |
| T1205 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_full.2243969708 |
|
|
Oct 15 12:08:29 PM UTC 24 |
Oct 15 12:10:26 PM UTC 24 |
8673449055 ps |
| T1206 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_target_stretch.4284930542 |
|
|
Oct 15 12:10:22 PM UTC 24 |
Oct 15 12:10:31 PM UTC 24 |
1519521027 ps |
| T1207 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_host_error_intr.4082122644 |
|
|
Oct 15 12:11:52 PM UTC 24 |
Oct 15 12:11:55 PM UTC 24 |
586137570 ps |
| T1208 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_target_intr_smoke.1359524648 |
|
|
Oct 15 12:10:23 PM UTC 24 |
Oct 15 12:10:32 PM UTC 24 |
3919758911 ps |
| T1209 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_watermark.3589481368 |
|
|
Oct 15 12:06:41 PM UTC 24 |
Oct 15 12:10:33 PM UTC 24 |
5106798761 ps |
| T1210 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_host_perf.3164716840 |
|
|
Oct 15 12:10:07 PM UTC 24 |
Oct 15 12:10:33 PM UTC 24 |
8120427066 ps |
| T1211 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_reset_acq.4206194370 |
|
|
Oct 15 12:10:32 PM UTC 24 |
Oct 15 12:10:34 PM UTC 24 |
168923180 ps |
| T1212 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_host_perf.324441029 |
|
|
Oct 15 12:09:19 PM UTC 24 |
Oct 15 12:10:34 PM UTC 24 |
3642892602 ps |
| T1213 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_target_timeout.373235327 |
|
|
Oct 15 12:10:25 PM UTC 24 |
Oct 15 12:10:35 PM UTC 24 |
4640589256 ps |
| T1214 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_reset_tx.4262392150 |
|
|
Oct 15 12:10:33 PM UTC 24 |
Oct 15 12:10:36 PM UTC 24 |
479955003 ps |
| T1215 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_target_stress_rd.2155301841 |
|
|
Oct 15 12:10:13 PM UTC 24 |
Oct 15 12:10:39 PM UTC 24 |
18741680601 ps |
| T1216 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_target_stress_wr.618035391 |
|
|
Oct 15 12:06:53 PM UTC 24 |
Oct 15 12:10:40 PM UTC 24 |
33256673953 ps |
| T1217 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_target_perf.3263894449 |
|
|
Oct 15 12:10:33 PM UTC 24 |
Oct 15 12:10:40 PM UTC 24 |
2702846832 ps |
| T1218 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_host_stretch_timeout.143988602 |
|
|
Oct 15 12:10:09 PM UTC 24 |
Oct 15 12:10:41 PM UTC 24 |
667968268 ps |
| T1219 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_watermarks_tx.3213801812 |
|
|
Oct 15 12:10:39 PM UTC 24 |
Oct 15 12:10:41 PM UTC 24 |
288373483 ps |
| T1220 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_watermarks_acq.722380487 |
|
|
Oct 15 12:10:37 PM UTC 24 |
Oct 15 12:10:42 PM UTC 24 |
415736727 ps |
| T1221 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_target_bad_addr.1324533963 |
|
|
Oct 15 12:10:33 PM UTC 24 |
Oct 15 12:10:43 PM UTC 24 |
5384431721 ps |
| T1222 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_overflow.2651897410 |
|
|
Oct 15 12:10:45 PM UTC 24 |
Oct 15 12:11:51 PM UTC 24 |
1802197256 ps |
| T1223 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_host_may_nack.3433117285 |
|
|
Oct 15 12:10:36 PM UTC 24 |
Oct 15 12:10:44 PM UTC 24 |
3089118778 ps |
| T1224 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_target_nack_txstretch.2111481745 |
|
|
Oct 15 12:10:42 PM UTC 24 |
Oct 15 12:10:44 PM UTC 24 |
258716801 ps |
| T1225 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_target_smbus_maxlen.2271720320 |
|
|
Oct 15 12:10:41 PM UTC 24 |
Oct 15 12:10:44 PM UTC 24 |
1906494403 ps |
| T1226 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_alert_test.2290032154 |
|
|
Oct 15 12:10:43 PM UTC 24 |
Oct 15 12:10:45 PM UTC 24 |
26305162 ps |
| T1227 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_target_nack_acqfull_addr.2875627509 |
|
|
Oct 15 12:10:42 PM UTC 24 |
Oct 15 12:10:47 PM UTC 24 |
497524055 ps |
| T1228 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_host_override.2052559082 |
|
|
Oct 15 12:10:45 PM UTC 24 |
Oct 15 12:10:47 PM UTC 24 |
15518258 ps |
| T1229 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_reset_fmt.2829730865 |
|
|
Oct 15 12:10:45 PM UTC 24 |
Oct 15 12:10:48 PM UTC 24 |
275687045 ps |
| T1230 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_target_nack_acqfull.1789384008 |
|
|
Oct 15 12:10:42 PM UTC 24 |
Oct 15 12:10:48 PM UTC 24 |
6250189520 ps |
| T1231 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_target_intr_stress_wr.1819146889 |
|
|
Oct 15 12:09:38 PM UTC 24 |
Oct 15 12:10:48 PM UTC 24 |
14476792805 ps |
| T1232 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_host_smoke.6449421 |
|
|
Oct 15 12:10:04 PM UTC 24 |
Oct 15 12:10:48 PM UTC 24 |
6874440556 ps |
| T1233 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_host_error_intr.944967734 |
|
|
Oct 15 12:10:49 PM UTC 24 |
Oct 15 12:10:53 PM UTC 24 |
241201873 ps |
| T1234 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_target_smoke.950374545 |
|
|
Oct 15 12:10:11 PM UTC 24 |
Oct 15 12:11:01 PM UTC 24 |
4652534515 ps |
| T1235 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_reset_rx.2175811624 |
|
|
Oct 15 12:10:48 PM UTC 24 |
Oct 15 12:11:02 PM UTC 24 |
883175596 ps |
| T1236 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_host_stretch_timeout.1941416559 |
|
|
Oct 15 12:10:49 PM UTC 24 |
Oct 15 12:11:02 PM UTC 24 |
1161728430 ps |
| T1237 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_fmt_empty.765970851 |
|
|
Oct 15 12:10:46 PM UTC 24 |
Oct 15 12:11:03 PM UTC 24 |
1070170664 ps |
| T1238 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_full.3318615096 |
|
|
Oct 15 12:10:07 PM UTC 24 |
Oct 15 12:11:08 PM UTC 24 |
6745131886 ps |
| T1239 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_target_stretch.81104560 |
|
|
Oct 15 12:11:04 PM UTC 24 |
Oct 15 12:11:20 PM UTC 24 |
1212820313 ps |
| T1240 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_target_intr_smoke.2064443688 |
|
|
Oct 15 12:11:08 PM UTC 24 |
Oct 15 12:11:21 PM UTC 24 |
6036644001 ps |
| T1241 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_target_stress_wr.1945226578 |
|
|
Oct 15 12:11:02 PM UTC 24 |
Oct 15 12:11:22 PM UTC 24 |
11216596547 ps |
| T1242 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_host_smoke.4189357608 |
|
|
Oct 15 12:10:44 PM UTC 24 |
Oct 15 12:11:23 PM UTC 24 |
2190777162 ps |
| T1243 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_host_perf.1595265147 |
|
|
Oct 15 12:08:30 PM UTC 24 |
Oct 15 12:11:23 PM UTC 24 |
6584048562 ps |
| T1244 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_target_smoke.3792522059 |
|
|
Oct 15 12:11:02 PM UTC 24 |
Oct 15 12:11:24 PM UTC 24 |
2090786986 ps |
| T1245 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_reset_acq.2221181565 |
|
|
Oct 15 12:11:24 PM UTC 24 |
Oct 15 12:11:26 PM UTC 24 |
480744860 ps |
| T1246 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_target_stress_rd.513574767 |
|
|
Oct 15 12:11:03 PM UTC 24 |
Oct 15 12:11:26 PM UTC 24 |
765247867 ps |
| T1247 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_reset_tx.2011671677 |
|
|
Oct 15 12:11:24 PM UTC 24 |
Oct 15 12:11:27 PM UTC 24 |
274784428 ps |
| T1248 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_overflow.510062118 |
|
|
Oct 15 12:09:13 PM UTC 24 |
Oct 15 12:11:27 PM UTC 24 |
7753420301 ps |
| T1249 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_host_perf_precise.2098772988 |
|
|
Oct 15 12:10:49 PM UTC 24 |
Oct 15 12:11:30 PM UTC 24 |
2426348191 ps |
| T1250 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_host_mode_toggle.2614717654 |
|
|
Oct 15 12:11:28 PM UTC 24 |
Oct 15 12:11:32 PM UTC 24 |
68783578 ps |
| T1251 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_target_hrst.411487977 |
|
|
Oct 15 12:11:27 PM UTC 24 |
Oct 15 12:11:33 PM UTC 24 |
393344026 ps |
| T1252 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_target_perf.1656518828 |
|
|
Oct 15 12:11:25 PM UTC 24 |
Oct 15 12:11:34 PM UTC 24 |
2254759139 ps |
| T1253 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_target_timeout.141757463 |
|
|
Oct 15 12:11:22 PM UTC 24 |
Oct 15 12:11:35 PM UTC 24 |
1199189375 ps |
| T1254 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_watermarks_tx.2605224884 |
|
|
Oct 15 12:11:33 PM UTC 24 |
Oct 15 12:11:36 PM UTC 24 |
97732381 ps |
| T1255 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_watermarks_acq.1875819441 |
|
|
Oct 15 12:11:30 PM UTC 24 |
Oct 15 12:11:36 PM UTC 24 |
965445745 ps |
| T1256 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_target_bad_addr.3645759491 |
|
|
Oct 15 12:11:27 PM UTC 24 |
Oct 15 12:11:37 PM UTC 24 |
1937302485 ps |
| T1257 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_alert_test.1880557097 |
|
|
Oct 15 12:11:37 PM UTC 24 |
Oct 15 12:11:39 PM UTC 24 |
40971386 ps |
| T1258 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_target_smbus_maxlen.260558585 |
|
|
Oct 15 12:11:35 PM UTC 24 |
Oct 15 12:11:39 PM UTC 24 |
442920124 ps |
| T1259 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_host_may_nack.1626684769 |
|
|
Oct 15 12:11:28 PM UTC 24 |
Oct 15 12:11:40 PM UTC 24 |
2353444445 ps |
| T1260 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_full.1199243241 |
|
|
Oct 15 12:09:16 PM UTC 24 |
Oct 15 12:11:51 PM UTC 24 |
3214311670 ps |
| T1261 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_target_nack_acqfull_addr.2108118823 |
|
|
Oct 15 12:11:36 PM UTC 24 |
Oct 15 12:11:41 PM UTC 24 |
1680082347 ps |
| T1262 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_target_nack_acqfull.445534174 |
|
|
Oct 15 12:11:36 PM UTC 24 |
Oct 15 12:11:42 PM UTC 24 |
778460668 ps |
| T1263 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_host_override.3917109360 |
|
|
Oct 15 12:11:40 PM UTC 24 |
Oct 15 12:11:42 PM UTC 24 |
56344249 ps |
| T1264 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_reset_fmt.3990506614 |
|
|
Oct 15 12:11:41 PM UTC 24 |
Oct 15 12:11:44 PM UTC 24 |
382888654 ps |
| T1265 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_target_tx_stretch_ctrl.4255232089 |
|
|
Oct 15 12:11:34 PM UTC 24 |
Oct 15 12:11:44 PM UTC 24 |
382379396 ps |
| T1266 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_reset_rx.3226519050 |
|
|
Oct 15 12:11:42 PM UTC 24 |
Oct 15 12:11:49 PM UTC 24 |
172123895 ps |
| T1267 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_fmt_empty.1571271986 |
|
|
Oct 15 12:11:42 PM UTC 24 |
Oct 15 12:11:55 PM UTC 24 |
1504994499 ps |
| T1268 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_target_intr_stress_wr.3349521278 |
|
|
Oct 15 12:10:24 PM UTC 24 |
Oct 15 12:11:56 PM UTC 24 |
7880434168 ps |
| T1269 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_target_intr_stress_wr.460678354 |
|
|
Oct 15 12:11:21 PM UTC 24 |
Oct 15 12:11:58 PM UTC 24 |
16513214078 ps |
| T1270 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_host_smoke.2269307487 |
|
|
Oct 15 12:11:38 PM UTC 24 |
Oct 15 12:12:03 PM UTC 24 |
1444517798 ps |
| T1271 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_host_stretch_timeout.918058135 |
|
|
Oct 15 12:11:50 PM UTC 24 |
Oct 15 12:12:05 PM UTC 24 |
532175188 ps |
| T1272 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_target_smoke.1329662322 |
|
|
Oct 15 12:11:56 PM UTC 24 |
Oct 15 12:12:06 PM UTC 24 |
2028556898 ps |
| T1273 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_target_stress_all.669602986 |
|
|
Oct 15 12:08:56 PM UTC 24 |
Oct 15 12:12:16 PM UTC 24 |
17346686160 ps |
| T1274 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_target_stress_rd.2222103046 |
|
|
Oct 15 12:11:57 PM UTC 24 |
Oct 15 12:12:16 PM UTC 24 |
675075862 ps |
| T1275 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_target_intr_smoke.1963663958 |
|
|
Oct 15 12:12:04 PM UTC 24 |
Oct 15 12:12:16 PM UTC 24 |
1051919754 ps |
| T1276 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_target_intr_stress_wr.787926047 |
|
|
Oct 15 12:12:05 PM UTC 24 |
Oct 15 12:12:19 PM UTC 24 |
22607497103 ps |
| T1277 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_target_timeout.3243446012 |
|
|
Oct 15 12:12:06 PM UTC 24 |
Oct 15 12:12:19 PM UTC 24 |
2547904724 ps |
| T1278 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_target_smoke.100069708 |
|
|
Oct 15 12:14:08 PM UTC 24 |
Oct 15 12:14:25 PM UTC 24 |
815027147 ps |
| T1279 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_host_perf.3960159822 |
|
|
Oct 15 12:13:59 PM UTC 24 |
Oct 15 12:14:25 PM UTC 24 |
491296689 ps |
| T1280 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_reset_acq.1379169088 |
|
|
Oct 15 12:12:17 PM UTC 24 |
Oct 15 12:12:20 PM UTC 24 |
288525293 ps |
| T1281 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_reset_tx.3517517550 |
|
|
Oct 15 12:12:18 PM UTC 24 |
Oct 15 12:12:21 PM UTC 24 |
276512648 ps |
| T1282 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_target_perf.2112553707 |
|
|
Oct 15 12:12:20 PM UTC 24 |
Oct 15 12:12:27 PM UTC 24 |
438438657 ps |
| T1283 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_host_may_nack.1586055127 |
|
|
Oct 15 12:12:25 PM UTC 24 |
Oct 15 12:12:32 PM UTC 24 |
1370428510 ps |
| T1284 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_target_bad_addr.1815633516 |
|
|
Oct 15 12:12:21 PM UTC 24 |
Oct 15 12:12:33 PM UTC 24 |
1202433704 ps |
| T1285 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_watermarks_acq.2515076358 |
|
|
Oct 15 12:12:28 PM UTC 24 |
Oct 15 12:12:34 PM UTC 24 |
604163899 ps |
| T1286 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_overflow.3594485439 |
|
|
Oct 15 12:10:05 PM UTC 24 |
Oct 15 12:12:35 PM UTC 24 |
8472233480 ps |
| T1287 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_watermarks_tx.3509482469 |
|
|
Oct 15 12:12:32 PM UTC 24 |
Oct 15 12:12:36 PM UTC 24 |
432443738 ps |
| T1288 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_target_tx_stretch_ctrl.2032265600 |
|
|
Oct 15 12:12:34 PM UTC 24 |
Oct 15 12:12:39 PM UTC 24 |
78456960 ps |
| T1289 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_target_smbus_maxlen.519187072 |
|
|
Oct 15 12:12:34 PM UTC 24 |
Oct 15 12:12:40 PM UTC 24 |
467874266 ps |
| T1290 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_target_nack_acqfull.3993071241 |
|
|
Oct 15 12:12:36 PM UTC 24 |
Oct 15 12:12:41 PM UTC 24 |
934636760 ps |
| T1291 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_target_nack_acqfull_addr.3501888813 |
|
|
Oct 15 12:12:37 PM UTC 24 |
Oct 15 12:12:42 PM UTC 24 |
3818376545 ps |
| T1292 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_full.880315934 |
|
|
Oct 15 12:10:49 PM UTC 24 |
Oct 15 12:12:42 PM UTC 24 |
6402895103 ps |
| T1293 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_host_smoke.1217741141 |
|
|
Oct 15 12:13:55 PM UTC 24 |
Oct 15 12:14:26 PM UTC 24 |
7088023354 ps |
| T1294 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_alert_test.2746517398 |
|
|
Oct 15 12:12:41 PM UTC 24 |
Oct 15 12:12:43 PM UTC 24 |
20172094 ps |
| T1295 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_host_override.1456208384 |
|
|
Oct 15 12:12:43 PM UTC 24 |
Oct 15 12:12:45 PM UTC 24 |
51460217 ps |
| T1296 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_target_intr_stress_wr.793505178 |
|
|
Oct 15 12:07:55 PM UTC 24 |
Oct 15 12:12:46 PM UTC 24 |
22242364455 ps |
| T1297 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_reset_fmt.3665381665 |
|
|
Oct 15 12:12:44 PM UTC 24 |
Oct 15 12:12:46 PM UTC 24 |
296145076 ps |
| T1298 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_reset_rx.1235580683 |
|
|
Oct 15 12:12:47 PM UTC 24 |
Oct 15 12:12:54 PM UTC 24 |
929509609 ps |
| T1299 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_host_perf_precise.3527625013 |
|
|
Oct 15 12:11:46 PM UTC 24 |
Oct 15 12:12:56 PM UTC 24 |
24562235352 ps |
| T1300 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_fmt_empty.176158604 |
|
|
Oct 15 12:12:46 PM UTC 24 |
Oct 15 12:13:01 PM UTC 24 |
224489170 ps |
| T1301 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_host_perf_precise.299020260 |
|
|
Oct 15 12:12:56 PM UTC 24 |
Oct 15 12:13:05 PM UTC 24 |
734670306 ps |
| T1302 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_host_error_intr.949288681 |
|
|
Oct 15 12:13:07 PM UTC 24 |
Oct 15 12:13:11 PM UTC 24 |
616342559 ps |
| T1303 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_host_smoke.961502000 |
|
|
Oct 15 12:12:42 PM UTC 24 |
Oct 15 12:13:14 PM UTC 24 |
2784901792 ps |
| T1304 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_target_stretch.871991380 |
|
|
Oct 15 12:11:58 PM UTC 24 |
Oct 15 12:13:25 PM UTC 24 |
3527514846 ps |
| T1305 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_target_stress_wr.3348249644 |
|
|
Oct 15 12:11:56 PM UTC 24 |
Oct 15 12:13:25 PM UTC 24 |
19798859172 ps |
| T1306 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_target_smoke.1717042032 |
|
|
Oct 15 12:13:12 PM UTC 24 |
Oct 15 12:13:28 PM UTC 24 |
3273739884 ps |
| T1307 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_host_stretch_timeout.3500438054 |
|
|
Oct 15 12:13:03 PM UTC 24 |
Oct 15 12:13:32 PM UTC 24 |
2139698247 ps |
| T1308 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_target_stress_wr.1955597959 |
|
|
Oct 15 12:04:36 PM UTC 24 |
Oct 15 12:13:35 PM UTC 24 |
46020435389 ps |
| T1309 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_target_intr_smoke.3294191953 |
|
|
Oct 15 12:13:29 PM UTC 24 |
Oct 15 12:13:37 PM UTC 24 |
3224155938 ps |
| T130 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_host_stress_all.3674072170 |
|
|
Oct 15 12:07:41 PM UTC 24 |
Oct 15 12:13:39 PM UTC 24 |
21544085731 ps |
| T1310 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_full.1622944210 |
|
|
Oct 15 12:11:43 PM UTC 24 |
Oct 15 12:13:40 PM UTC 24 |
5533318934 ps |
| T1311 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_host_perf.2111369978 |
|
|
Oct 15 12:11:45 PM UTC 24 |
Oct 15 12:13:41 PM UTC 24 |
2753820191 ps |
| T1312 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_host_override.131317578 |
|
|
Oct 15 12:16:17 PM UTC 24 |
Oct 15 12:16:19 PM UTC 24 |
27052630 ps |
| T1313 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_reset_acq.1040488937 |
|
|
Oct 15 12:13:40 PM UTC 24 |
Oct 15 12:13:42 PM UTC 24 |
141015474 ps |
| T1314 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_host_perf.344212082 |
|
|
Oct 15 12:00:02 PM UTC 24 |
Oct 15 12:13:43 PM UTC 24 |
73384988346 ps |
| T1315 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_target_stress_all.981697596 |
|
|
Oct 15 12:09:45 PM UTC 24 |
Oct 15 12:13:45 PM UTC 24 |
27488701192 ps |
| T1316 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_reset_tx.2512699872 |
|
|
Oct 15 12:13:42 PM UTC 24 |
Oct 15 12:13:45 PM UTC 24 |
582166649 ps |
| T1317 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_target_stress_all.2847584201 |
|
|
Oct 15 12:12:20 PM UTC 24 |
Oct 15 12:13:46 PM UTC 24 |
42536106318 ps |