| T838 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_host_mode_toggle.303900402 |
|
|
Oct 15 11:58:38 AM UTC 24 |
Oct 15 11:58:45 AM UTC 24 |
504524422 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_watermarks_tx.3508766042 |
|
|
Oct 15 11:58:44 AM UTC 24 |
Oct 15 11:58:47 AM UTC 24 |
53276358 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_overflow.3423648969 |
|
|
Oct 15 11:57:43 AM UTC 24 |
Oct 15 11:58:49 AM UTC 24 |
8385197678 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_target_smbus_maxlen.1270839445 |
|
|
Oct 15 11:58:45 AM UTC 24 |
Oct 15 11:58:49 AM UTC 24 |
1339160201 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_target_tx_stretch_ctrl.1422537117 |
|
|
Oct 15 11:58:44 AM UTC 24 |
Oct 15 11:58:51 AM UTC 24 |
256577719 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_target_nack_acqfull_addr.1317353082 |
|
|
Oct 15 11:58:46 AM UTC 24 |
Oct 15 11:58:51 AM UTC 24 |
571488567 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_target_nack_txstretch.2582729061 |
|
|
Oct 15 11:58:48 AM UTC 24 |
Oct 15 11:58:51 AM UTC 24 |
506965725 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_target_stress_rd.3439397549 |
|
|
Oct 15 11:58:13 AM UTC 24 |
Oct 15 11:58:51 AM UTC 24 |
3570355792 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_alert_test.2486547818 |
|
|
Oct 15 11:58:50 AM UTC 24 |
Oct 15 11:58:52 AM UTC 24 |
50440057 ps |
| T57 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_target_nack_acqfull.3498397955 |
|
|
Oct 15 11:58:46 AM UTC 24 |
Oct 15 11:58:53 AM UTC 24 |
842314999 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_host_override.3061209772 |
|
|
Oct 15 11:58:52 AM UTC 24 |
Oct 15 11:58:54 AM UTC 24 |
20328100 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_reset_fmt.4117982191 |
|
|
Oct 15 11:58:52 AM UTC 24 |
Oct 15 11:58:55 AM UTC 24 |
343060410 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_reset_rx.1090159894 |
|
|
Oct 15 11:58:54 AM UTC 24 |
Oct 15 11:59:01 AM UTC 24 |
151999032 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_fmt_empty.3478362355 |
|
|
Oct 15 11:58:53 AM UTC 24 |
Oct 15 11:59:04 AM UTC 24 |
732908449 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_target_stress_all.868142298 |
|
|
Oct 15 11:56:27 AM UTC 24 |
Oct 15 11:59:04 AM UTC 24 |
74569454118 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_host_smoke.236467395 |
|
|
Oct 15 11:57:40 AM UTC 24 |
Oct 15 11:59:06 AM UTC 24 |
6121221187 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_host_perf_precise.1856022654 |
|
|
Oct 15 11:59:01 AM UTC 24 |
Oct 15 11:59:07 AM UTC 24 |
168611120 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_target_stress_wr.2655252162 |
|
|
Oct 15 11:51:40 AM UTC 24 |
Oct 15 11:59:09 AM UTC 24 |
57597691269 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_host_error_intr.1594512513 |
|
|
Oct 15 11:59:05 AM UTC 24 |
Oct 15 11:59:09 AM UTC 24 |
265879686 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_host_stretch_timeout.454900305 |
|
|
Oct 15 11:59:04 AM UTC 24 |
Oct 15 11:59:15 AM UTC 24 |
1193255548 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_target_stretch.4070806882 |
|
|
Oct 15 11:59:16 AM UTC 24 |
Oct 15 11:59:20 AM UTC 24 |
576595914 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_host_smoke.2124249204 |
|
|
Oct 15 11:58:50 AM UTC 24 |
Oct 15 11:59:29 AM UTC 24 |
7850758660 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_target_stress_rd.4245223567 |
|
|
Oct 15 11:59:10 AM UTC 24 |
Oct 15 11:59:29 AM UTC 24 |
1194806830 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_target_intr_smoke.3276373510 |
|
|
Oct 15 11:59:21 AM UTC 24 |
Oct 15 11:59:29 AM UTC 24 |
655599242 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_target_smoke.1763522644 |
|
|
Oct 15 11:59:08 AM UTC 24 |
Oct 15 11:59:32 AM UTC 24 |
1254001899 ps |
| T862 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_reset_acq.1985574501 |
|
|
Oct 15 11:59:30 AM UTC 24 |
Oct 15 11:59:33 AM UTC 24 |
141087400 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_host_perf.3262463461 |
|
|
Oct 15 11:54:32 AM UTC 24 |
Oct 15 11:59:37 AM UTC 24 |
75929129171 ps |
| T294 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_reset_tx.798853927 |
|
|
Oct 15 11:59:32 AM UTC 24 |
Oct 15 11:59:37 AM UTC 24 |
805886584 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_target_timeout.3249347947 |
|
|
Oct 15 11:59:29 AM UTC 24 |
Oct 15 11:59:40 AM UTC 24 |
4241152436 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_target_perf.3834263110 |
|
|
Oct 15 11:59:33 AM UTC 24 |
Oct 15 11:59:41 AM UTC 24 |
1374752941 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_target_bad_addr.1796377098 |
|
|
Oct 15 11:59:38 AM UTC 24 |
Oct 15 11:59:42 AM UTC 24 |
1261644683 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_acq.492687413 |
|
|
Oct 15 11:59:43 AM UTC 24 |
Oct 15 11:59:49 AM UTC 24 |
985215216 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_host_perf_precise.3955174827 |
|
|
Oct 15 12:00:07 PM UTC 24 |
Oct 15 12:00:38 PM UTC 24 |
2842986605 ps |
| T118 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_watermark.4056280025 |
|
|
Oct 15 11:57:43 AM UTC 24 |
Oct 15 11:59:50 AM UTC 24 |
26746425030 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_tx.3629664490 |
|
|
Oct 15 11:59:48 AM UTC 24 |
Oct 15 11:59:51 AM UTC 24 |
464246265 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_target_tx_stretch_ctrl.119511676 |
|
|
Oct 15 11:59:50 AM UTC 24 |
Oct 15 11:59:54 AM UTC 24 |
58917485 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/21.i2c_target_stress_wr.3806058795 |
|
|
Oct 15 11:57:00 AM UTC 24 |
Oct 15 11:59:54 AM UTC 24 |
30143229627 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_target_smbus_maxlen.640298362 |
|
|
Oct 15 11:59:50 AM UTC 24 |
Oct 15 11:59:55 AM UTC 24 |
1622367114 ps |
| T261 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_host_may_nack.1791568357 |
|
|
Oct 15 11:59:42 AM UTC 24 |
Oct 15 11:59:55 AM UTC 24 |
285174869 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull.2707864188 |
|
|
Oct 15 11:59:51 AM UTC 24 |
Oct 15 11:59:56 AM UTC 24 |
7072070330 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_host_smoke.3986890073 |
|
|
Oct 15 11:59:55 AM UTC 24 |
Oct 15 12:00:32 PM UTC 24 |
1582916041 ps |
| T875 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_alert_test.3584446243 |
|
|
Oct 15 11:59:55 AM UTC 24 |
Oct 15 11:59:57 AM UTC 24 |
52643309 ps |
| T876 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull_addr.881420343 |
|
|
Oct 15 11:59:52 AM UTC 24 |
Oct 15 11:59:58 AM UTC 24 |
475773229 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_host_override.1600037588 |
|
|
Oct 15 11:59:57 AM UTC 24 |
Oct 15 11:59:59 AM UTC 24 |
220496706 ps |
| T877 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_target_intr_stress_wr.1769615736 |
|
|
Oct 15 11:56:17 AM UTC 24 |
Oct 15 11:59:59 AM UTC 24 |
17160820085 ps |
| T878 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_fmt.1175551365 |
|
|
Oct 15 11:59:59 AM UTC 24 |
Oct 15 12:00:01 PM UTC 24 |
429769047 ps |
| T879 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_rx.3864151401 |
|
|
Oct 15 12:00:00 PM UTC 24 |
Oct 15 12:00:07 PM UTC 24 |
163598354 ps |
| T880 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_fmt_empty.1709304971 |
|
|
Oct 15 11:59:59 AM UTC 24 |
Oct 15 12:00:07 PM UTC 24 |
1109543520 ps |
| T881 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_target_stress_all.980565867 |
|
|
Oct 15 11:59:35 AM UTC 24 |
Oct 15 12:00:12 PM UTC 24 |
27055870952 ps |
| T882 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_host_error_intr.130388654 |
|
|
Oct 15 12:00:12 PM UTC 24 |
Oct 15 12:00:15 PM UTC 24 |
636067635 ps |
| T883 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_host_stretch_timeout.3712898432 |
|
|
Oct 15 12:00:08 PM UTC 24 |
Oct 15 12:00:23 PM UTC 24 |
994348731 ps |
| T884 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_full.642346262 |
|
|
Oct 15 11:58:54 AM UTC 24 |
Oct 15 12:00:24 PM UTC 24 |
14178348657 ps |
| T885 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_target_stress_wr.952694308 |
|
|
Oct 15 11:58:08 AM UTC 24 |
Oct 15 12:00:27 PM UTC 24 |
37925937129 ps |
| T886 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_overflow.3351144541 |
|
|
Oct 15 11:58:52 AM UTC 24 |
Oct 15 12:00:28 PM UTC 24 |
11758799351 ps |
| T887 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_overflow.3008763657 |
|
|
Oct 15 11:59:58 AM UTC 24 |
Oct 15 12:00:44 PM UTC 24 |
1449402135 ps |
| T888 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_target_stress_rd.484411779 |
|
|
Oct 15 12:00:28 PM UTC 24 |
Oct 15 12:00:45 PM UTC 24 |
968154226 ps |
| T889 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_host_may_nack.2986378793 |
|
|
Oct 15 12:03:07 PM UTC 24 |
Oct 15 12:03:14 PM UTC 24 |
645764104 ps |
| T890 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_acq.2443304559 |
|
|
Oct 15 12:00:45 PM UTC 24 |
Oct 15 12:00:48 PM UTC 24 |
151559168 ps |
| T891 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_target_stretch.2354591772 |
|
|
Oct 15 12:00:29 PM UTC 24 |
Oct 15 12:00:49 PM UTC 24 |
1970275586 ps |
| T892 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_tx.312400920 |
|
|
Oct 15 12:00:46 PM UTC 24 |
Oct 15 12:00:51 PM UTC 24 |
933954522 ps |
| T893 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_full.3078523341 |
|
|
Oct 15 11:57:44 AM UTC 24 |
Oct 15 12:00:51 PM UTC 24 |
16629385395 ps |
| T119 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_watermark.3545024919 |
|
|
Oct 15 11:58:52 AM UTC 24 |
Oct 15 12:00:51 PM UTC 24 |
20218626455 ps |
| T894 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_target_timeout.3115393941 |
|
|
Oct 15 12:00:40 PM UTC 24 |
Oct 15 12:00:51 PM UTC 24 |
4815763831 ps |
| T895 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_host_perf.1167704421 |
|
|
Oct 15 11:58:55 AM UTC 24 |
Oct 15 12:00:54 PM UTC 24 |
3083601450 ps |
| T896 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_target_bad_addr.1209332655 |
|
|
Oct 15 12:00:49 PM UTC 24 |
Oct 15 12:00:55 PM UTC 24 |
1501301118 ps |
| T897 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_target_perf.3704181269 |
|
|
Oct 15 12:00:48 PM UTC 24 |
Oct 15 12:00:55 PM UTC 24 |
542404262 ps |
| T898 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_tx.2882479788 |
|
|
Oct 15 12:00:52 PM UTC 24 |
Oct 15 12:00:55 PM UTC 24 |
661383869 ps |
| T899 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_acq.1029605939 |
|
|
Oct 15 12:00:52 PM UTC 24 |
Oct 15 12:00:56 PM UTC 24 |
2339370375 ps |
| T900 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_host_may_nack.3775236958 |
|
|
Oct 15 12:00:52 PM UTC 24 |
Oct 15 12:00:59 PM UTC 24 |
1221150985 ps |
| T901 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_alert_test.1390998261 |
|
|
Oct 15 12:00:57 PM UTC 24 |
Oct 15 12:01:00 PM UTC 24 |
58856210 ps |
| T902 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_full.2928549428 |
|
|
Oct 15 12:01:04 PM UTC 24 |
Oct 15 12:03:13 PM UTC 24 |
3959026769 ps |
| T903 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_target_tx_stretch_ctrl.1516689274 |
|
|
Oct 15 12:00:55 PM UTC 24 |
Oct 15 12:01:00 PM UTC 24 |
188399688 ps |
| T904 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_target_smbus_maxlen.1940121947 |
|
|
Oct 15 12:00:55 PM UTC 24 |
Oct 15 12:01:01 PM UTC 24 |
1056727902 ps |
| T905 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull_addr.3583672707 |
|
|
Oct 15 12:00:56 PM UTC 24 |
Oct 15 12:01:01 PM UTC 24 |
2037302305 ps |
| T906 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull.4273729852 |
|
|
Oct 15 12:00:56 PM UTC 24 |
Oct 15 12:01:02 PM UTC 24 |
2937323824 ps |
| T907 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_host_override.114810444 |
|
|
Oct 15 12:01:00 PM UTC 24 |
Oct 15 12:01:03 PM UTC 24 |
78237596 ps |
| T908 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_fmt.3721330130 |
|
|
Oct 15 12:01:02 PM UTC 24 |
Oct 15 12:01:04 PM UTC 24 |
97260879 ps |
| T909 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_fmt_empty.95149798 |
|
|
Oct 15 12:01:03 PM UTC 24 |
Oct 15 12:01:10 PM UTC 24 |
221511322 ps |
| T910 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_host_perf_precise.1669493287 |
|
|
Oct 15 12:01:11 PM UTC 24 |
Oct 15 12:01:13 PM UTC 24 |
84792421 ps |
| T911 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_target_intr_stress_wr.4161532733 |
|
|
Oct 15 11:58:18 AM UTC 24 |
Oct 15 12:01:16 PM UTC 24 |
24367897044 ps |
| T912 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_rx.773824001 |
|
|
Oct 15 12:01:03 PM UTC 24 |
Oct 15 12:01:17 PM UTC 24 |
1009206829 ps |
| T913 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_host_error_intr.3134513102 |
|
|
Oct 15 12:01:16 PM UTC 24 |
Oct 15 12:01:20 PM UTC 24 |
580309416 ps |
| T914 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/16.i2c_host_stress_all.561920923 |
|
|
Oct 15 11:52:17 AM UTC 24 |
Oct 15 12:01:37 PM UTC 24 |
11935754626 ps |
| T244 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/19.i2c_host_stress_all.1965132463 |
|
|
Oct 15 11:54:39 AM UTC 24 |
Oct 15 12:01:40 PM UTC 24 |
6560003333 ps |
| T915 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_host_stretch_timeout.2966928737 |
|
|
Oct 15 12:01:14 PM UTC 24 |
Oct 15 12:01:45 PM UTC 24 |
2719084294 ps |
| T916 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_target_stress_rd.139019875 |
|
|
Oct 15 12:01:37 PM UTC 24 |
Oct 15 12:01:48 PM UTC 24 |
8827364357 ps |
| T917 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_target_intr_smoke.294447507 |
|
|
Oct 15 12:01:42 PM UTC 24 |
Oct 15 12:01:49 PM UTC 24 |
2198488902 ps |
| T918 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_overflow.1321792177 |
|
|
Oct 15 12:01:01 PM UTC 24 |
Oct 15 12:01:50 PM UTC 24 |
1687072388 ps |
| T919 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_acq.3007233258 |
|
|
Oct 15 12:01:51 PM UTC 24 |
Oct 15 12:01:55 PM UTC 24 |
240711471 ps |
| T920 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_tx.1699509522 |
|
|
Oct 15 12:01:53 PM UTC 24 |
Oct 15 12:01:56 PM UTC 24 |
300883841 ps |
| T921 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_target_stress_wr.2404359245 |
|
|
Oct 15 12:01:25 PM UTC 24 |
Oct 15 12:01:58 PM UTC 24 |
29054187072 ps |
| T922 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_target_timeout.354588052 |
|
|
Oct 15 12:01:49 PM UTC 24 |
Oct 15 12:02:00 PM UTC 24 |
3388462800 ps |
| T923 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_target_intr_stress_wr.607805801 |
|
|
Oct 15 11:59:24 AM UTC 24 |
Oct 15 12:02:00 PM UTC 24 |
12321531170 ps |
| T924 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_target_perf.3869911877 |
|
|
Oct 15 12:01:56 PM UTC 24 |
Oct 15 12:02:05 PM UTC 24 |
614346086 ps |
| T925 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_target_stretch.3405962995 |
|
|
Oct 15 12:01:39 PM UTC 24 |
Oct 15 12:02:05 PM UTC 24 |
4298240671 ps |
| T926 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_host_smoke.2911221123 |
|
|
Oct 15 12:00:59 PM UTC 24 |
Oct 15 12:02:06 PM UTC 24 |
1636380292 ps |
| T927 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_watermark.2368983784 |
|
|
Oct 15 11:59:58 AM UTC 24 |
Oct 15 12:02:06 PM UTC 24 |
4135535615 ps |
| T928 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_target_smoke.1102115860 |
|
|
Oct 15 12:01:20 PM UTC 24 |
Oct 15 12:02:07 PM UTC 24 |
4815011780 ps |
| T929 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_target_bad_addr.4254222842 |
|
|
Oct 15 12:01:59 PM UTC 24 |
Oct 15 12:02:07 PM UTC 24 |
7088621103 ps |
| T930 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_tx.4065948253 |
|
|
Oct 15 12:02:07 PM UTC 24 |
Oct 15 12:02:10 PM UTC 24 |
265348208 ps |
| T931 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_acq.2403528245 |
|
|
Oct 15 12:02:06 PM UTC 24 |
Oct 15 12:02:11 PM UTC 24 |
426994054 ps |
| T932 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_target_smbus_maxlen.3785803150 |
|
|
Oct 15 12:02:07 PM UTC 24 |
Oct 15 12:02:11 PM UTC 24 |
2765400816 ps |
| T933 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull_addr.2807439973 |
|
|
Oct 15 12:02:08 PM UTC 24 |
Oct 15 12:02:13 PM UTC 24 |
950714873 ps |
| T934 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_host_may_nack.526466549 |
|
|
Oct 15 12:02:05 PM UTC 24 |
Oct 15 12:02:14 PM UTC 24 |
4800196586 ps |
| T935 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull.2895336836 |
|
|
Oct 15 12:02:08 PM UTC 24 |
Oct 15 12:02:14 PM UTC 24 |
521464904 ps |
| T936 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_alert_test.2465310689 |
|
|
Oct 15 12:02:12 PM UTC 24 |
Oct 15 12:02:14 PM UTC 24 |
25579583 ps |
| T937 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_host_override.2700394701 |
|
|
Oct 15 12:02:14 PM UTC 24 |
Oct 15 12:02:16 PM UTC 24 |
287843250 ps |
| T938 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_fmt.4145216374 |
|
|
Oct 15 12:02:16 PM UTC 24 |
Oct 15 12:02:19 PM UTC 24 |
418234593 ps |
| T939 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_target_tx_stretch_ctrl.3797846647 |
|
|
Oct 15 12:02:07 PM UTC 24 |
Oct 15 12:02:22 PM UTC 24 |
1054754774 ps |
| T940 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_rx.635597213 |
|
|
Oct 15 12:02:17 PM UTC 24 |
Oct 15 12:02:27 PM UTC 24 |
235337724 ps |
| T941 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_fmt_empty.1474403719 |
|
|
Oct 15 12:02:16 PM UTC 24 |
Oct 15 12:02:28 PM UTC 24 |
579992524 ps |
| T942 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_host_perf_precise.4268502241 |
|
|
Oct 15 12:02:23 PM UTC 24 |
Oct 15 12:02:32 PM UTC 24 |
501893805 ps |
| T943 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_host_error_intr.926111011 |
|
|
Oct 15 12:02:29 PM UTC 24 |
Oct 15 12:02:33 PM UTC 24 |
200758065 ps |
| T944 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/22.i2c_target_stress_all.4046646926 |
|
|
Oct 15 11:58:33 AM UTC 24 |
Oct 15 12:02:36 PM UTC 24 |
18846384799 ps |
| T945 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_target_intr_stress_wr.2860873366 |
|
|
Oct 15 12:01:46 PM UTC 24 |
Oct 15 12:02:46 PM UTC 24 |
12265810385 ps |
| T946 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_target_stress_rd.1439298345 |
|
|
Oct 15 12:02:37 PM UTC 24 |
Oct 15 12:02:48 PM UTC 24 |
1011372871 ps |
| T947 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_target_intr_stress_wr.3926657047 |
|
|
Oct 15 12:00:39 PM UTC 24 |
Oct 15 12:02:48 PM UTC 24 |
23417880481 ps |
| T948 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_host_stretch_timeout.204615781 |
|
|
Oct 15 12:02:28 PM UTC 24 |
Oct 15 12:02:49 PM UTC 24 |
3440465190 ps |
| T949 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_target_smoke.200724775 |
|
|
Oct 15 12:02:34 PM UTC 24 |
Oct 15 12:02:57 PM UTC 24 |
6167798736 ps |
| T950 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_target_intr_smoke.413647470 |
|
|
Oct 15 12:02:49 PM UTC 24 |
Oct 15 12:02:58 PM UTC 24 |
3677861772 ps |
| T951 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_target_stress_all.3443446659 |
|
|
Oct 15 12:01:56 PM UTC 24 |
Oct 15 12:02:59 PM UTC 24 |
9488465266 ps |
| T952 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_acq.3909961834 |
|
|
Oct 15 12:02:58 PM UTC 24 |
Oct 15 12:03:01 PM UTC 24 |
306285326 ps |
| T243 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/15.i2c_host_stress_all.1547461211 |
|
|
Oct 15 11:51:39 AM UTC 24 |
Oct 15 12:03:01 PM UTC 24 |
48404390708 ps |
| T953 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_tx.529843881 |
|
|
Oct 15 12:02:59 PM UTC 24 |
Oct 15 12:03:02 PM UTC 24 |
532843317 ps |
| T954 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_target_timeout.3742121701 |
|
|
Oct 15 12:02:50 PM UTC 24 |
Oct 15 12:03:04 PM UTC 24 |
5533255394 ps |
| T955 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_target_stretch.25561808 |
|
|
Oct 15 12:02:47 PM UTC 24 |
Oct 15 12:03:05 PM UTC 24 |
2572728982 ps |
| T956 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_target_hrst.3083949758 |
|
|
Oct 15 12:03:03 PM UTC 24 |
Oct 15 12:03:07 PM UTC 24 |
425653603 ps |
| T957 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_target_perf.3477408021 |
|
|
Oct 15 12:03:02 PM UTC 24 |
Oct 15 12:03:10 PM UTC 24 |
603068628 ps |
| T958 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_acq.2209931659 |
|
|
Oct 15 12:03:08 PM UTC 24 |
Oct 15 12:03:13 PM UTC 24 |
2024443969 ps |
| T959 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_tx.285815463 |
|
|
Oct 15 12:03:11 PM UTC 24 |
Oct 15 12:03:13 PM UTC 24 |
1649357069 ps |
| T960 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_target_tx_stretch_ctrl.3166075926 |
|
|
Oct 15 12:03:11 PM UTC 24 |
Oct 15 12:03:14 PM UTC 24 |
162983970 ps |
| T961 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_target_bad_addr.366310535 |
|
|
Oct 15 12:03:02 PM UTC 24 |
Oct 15 12:03:17 PM UTC 24 |
2750884507 ps |
| T962 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_alert_test.2226583576 |
|
|
Oct 15 12:03:15 PM UTC 24 |
Oct 15 12:03:17 PM UTC 24 |
29076654 ps |
| T963 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_target_smbus_maxlen.3585859465 |
|
|
Oct 15 12:03:14 PM UTC 24 |
Oct 15 12:03:18 PM UTC 24 |
440469791 ps |
| T964 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull_addr.1271866564 |
|
|
Oct 15 12:03:14 PM UTC 24 |
Oct 15 12:03:19 PM UTC 24 |
3749302043 ps |
| T146 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_host_override.2875168576 |
|
|
Oct 15 12:03:18 PM UTC 24 |
Oct 15 12:03:21 PM UTC 24 |
119325722 ps |
| T965 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull.3448823635 |
|
|
Oct 15 12:03:14 PM UTC 24 |
Oct 15 12:03:21 PM UTC 24 |
613326257 ps |
| T966 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_fmt.1619615342 |
|
|
Oct 15 12:03:21 PM UTC 24 |
Oct 15 12:03:24 PM UTC 24 |
136222273 ps |
| T967 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_rx.1341942931 |
|
|
Oct 15 12:03:22 PM UTC 24 |
Oct 15 12:03:34 PM UTC 24 |
155836522 ps |
| T968 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_full.3206377075 |
|
|
Oct 15 12:02:20 PM UTC 24 |
Oct 15 12:03:36 PM UTC 24 |
6077221484 ps |
| T969 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_target_stress_all.2735242211 |
|
|
Oct 15 12:03:02 PM UTC 24 |
Oct 15 12:03:37 PM UTC 24 |
7595308670 ps |
| T970 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_fmt_empty.2110310463 |
|
|
Oct 15 12:03:22 PM UTC 24 |
Oct 15 12:03:38 PM UTC 24 |
2699412246 ps |
| T971 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_host_perf_precise.3308629230 |
|
|
Oct 15 12:03:37 PM UTC 24 |
Oct 15 12:03:40 PM UTC 24 |
90349876 ps |
| T972 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_host_smoke.1639173023 |
|
|
Oct 15 12:03:17 PM UTC 24 |
Oct 15 12:03:41 PM UTC 24 |
2054628510 ps |
| T973 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_host_error_intr.3183967889 |
|
|
Oct 15 12:03:39 PM UTC 24 |
Oct 15 12:03:42 PM UTC 24 |
54420562 ps |
| T974 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_target_stress_wr.1552725400 |
|
|
Oct 15 11:56:07 AM UTC 24 |
Oct 15 12:03:45 PM UTC 24 |
62168661715 ps |
| T975 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_full.795869804 |
|
|
Oct 15 12:00:00 PM UTC 24 |
Oct 15 12:03:50 PM UTC 24 |
6420591421 ps |
| T976 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/23.i2c_target_stress_wr.2383852567 |
|
|
Oct 15 11:59:10 AM UTC 24 |
Oct 15 12:03:55 PM UTC 24 |
67503857616 ps |
| T977 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_host_perf.961022081 |
|
|
Oct 15 12:03:35 PM UTC 24 |
Oct 15 12:03:55 PM UTC 24 |
4073623877 ps |
| T978 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_overflow.934338886 |
|
|
Oct 15 12:02:16 PM UTC 24 |
Oct 15 12:03:56 PM UTC 24 |
2732401369 ps |
| T979 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_host_stretch_timeout.2323024412 |
|
|
Oct 15 12:03:38 PM UTC 24 |
Oct 15 12:03:58 PM UTC 24 |
384856241 ps |
| T980 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_target_smoke.2068902934 |
|
|
Oct 15 12:03:41 PM UTC 24 |
Oct 15 12:04:01 PM UTC 24 |
8046628821 ps |
| T981 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_target_stretch.3237961515 |
|
|
Oct 15 12:03:51 PM UTC 24 |
Oct 15 12:04:04 PM UTC 24 |
4296043483 ps |
| T982 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_acq.1612499067 |
|
|
Oct 15 12:04:02 PM UTC 24 |
Oct 15 12:04:05 PM UTC 24 |
274307507 ps |
| T983 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_tx.2865427258 |
|
|
Oct 15 12:04:02 PM UTC 24 |
Oct 15 12:04:06 PM UTC 24 |
1799304586 ps |
| T984 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_host_smoke.2685698750 |
|
|
Oct 15 12:02:12 PM UTC 24 |
Oct 15 12:04:07 PM UTC 24 |
1874625321 ps |
| T985 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_target_intr_smoke.3040702852 |
|
|
Oct 15 12:03:56 PM UTC 24 |
Oct 15 12:04:09 PM UTC 24 |
1167260199 ps |
| T986 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_target_timeout.3617454221 |
|
|
Oct 15 12:03:57 PM UTC 24 |
Oct 15 12:04:09 PM UTC 24 |
2362629114 ps |
| T987 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_host_mode_toggle.2786479323 |
|
|
Oct 15 12:04:10 PM UTC 24 |
Oct 15 12:04:13 PM UTC 24 |
107702701 ps |
| T988 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_target_hrst.1951276521 |
|
|
Oct 15 12:04:07 PM UTC 24 |
Oct 15 12:04:13 PM UTC 24 |
1405191226 ps |
| T989 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_target_perf.3085860959 |
|
|
Oct 15 12:04:04 PM UTC 24 |
Oct 15 12:04:14 PM UTC 24 |
1318240606 ps |
| T990 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_target_bad_addr.4243333642 |
|
|
Oct 15 12:04:06 PM UTC 24 |
Oct 15 12:04:17 PM UTC 24 |
1802082430 ps |
| T991 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_tx.2406388155 |
|
|
Oct 15 12:04:14 PM UTC 24 |
Oct 15 12:04:17 PM UTC 24 |
141535017 ps |
| T992 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_acq.2707678418 |
|
|
Oct 15 12:04:14 PM UTC 24 |
Oct 15 12:04:20 PM UTC 24 |
416458920 ps |
| T993 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_target_smbus_maxlen.1175414138 |
|
|
Oct 15 12:04:17 PM UTC 24 |
Oct 15 12:04:22 PM UTC 24 |
3696888949 ps |
| T994 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_overflow.3507543169 |
|
|
Oct 15 12:03:20 PM UTC 24 |
Oct 15 12:04:22 PM UTC 24 |
4911307886 ps |
| T995 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_target_tx_stretch_ctrl.3036885720 |
|
|
Oct 15 12:04:15 PM UTC 24 |
Oct 15 12:04:24 PM UTC 24 |
321556579 ps |
| T23 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_host_stress_all.2373428955 |
|
|
Oct 15 12:00:16 PM UTC 24 |
Oct 15 12:04:24 PM UTC 24 |
20123835833 ps |
| T996 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_target_stress_wr.681402863 |
|
|
Oct 15 12:03:43 PM UTC 24 |
Oct 15 12:04:24 PM UTC 24 |
27078497198 ps |
| T52 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull_addr.2923216781 |
|
|
Oct 15 12:04:18 PM UTC 24 |
Oct 15 12:04:24 PM UTC 24 |
575523386 ps |
| T997 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_full.1177026708 |
|
|
Oct 15 12:03:25 PM UTC 24 |
Oct 15 12:05:24 PM UTC 24 |
4022722007 ps |
| T58 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull.3842478802 |
|
|
Oct 15 12:04:18 PM UTC 24 |
Oct 15 12:04:25 PM UTC 24 |
2119119571 ps |
| T998 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_watermark.2076685360 |
|
|
Oct 15 12:03:20 PM UTC 24 |
Oct 15 12:04:25 PM UTC 24 |
5642448731 ps |
| T999 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_alert_test.1252320268 |
|
|
Oct 15 12:04:23 PM UTC 24 |
Oct 15 12:04:26 PM UTC 24 |
16359049 ps |
| T1000 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_host_override.1418464054 |
|
|
Oct 15 12:04:24 PM UTC 24 |
Oct 15 12:04:27 PM UTC 24 |
88520387 ps |
| T1001 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_fmt.2166315768 |
|
|
Oct 15 12:04:26 PM UTC 24 |
Oct 15 12:04:28 PM UTC 24 |
110558511 ps |
| T259 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_host_may_nack.1688305187 |
|
|
Oct 15 12:04:11 PM UTC 24 |
Oct 15 12:04:29 PM UTC 24 |
315012322 ps |
| T1002 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_rx.675741277 |
|
|
Oct 15 12:04:26 PM UTC 24 |
Oct 15 12:04:31 PM UTC 24 |
161764968 ps |
| T1003 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_host_perf_precise.3058727539 |
|
|
Oct 15 12:04:28 PM UTC 24 |
Oct 15 12:04:34 PM UTC 24 |
309474341 ps |
| T1004 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/24.i2c_target_stress_all.3542182870 |
|
|
Oct 15 12:00:48 PM UTC 24 |
Oct 15 12:04:35 PM UTC 24 |
45142598443 ps |
| T1005 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_host_error_intr.3372206661 |
|
|
Oct 15 12:04:30 PM UTC 24 |
Oct 15 12:04:36 PM UTC 24 |
608816983 ps |
| T1006 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_host_stretch_timeout.3030705194 |
|
|
Oct 15 12:04:29 PM UTC 24 |
Oct 15 12:04:44 PM UTC 24 |
1167482392 ps |
| T1007 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_fmt_empty.3684092145 |
|
|
Oct 15 12:04:26 PM UTC 24 |
Oct 15 12:04:44 PM UTC 24 |
579367298 ps |
| T1008 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_target_stress_rd.2784231410 |
|
|
Oct 15 12:03:46 PM UTC 24 |
Oct 15 12:04:49 PM UTC 24 |
2807376265 ps |
| T1009 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_target_stretch.318711461 |
|
|
Oct 15 12:04:42 PM UTC 24 |
Oct 15 12:04:51 PM UTC 24 |
3930846116 ps |
| T1010 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_target_intr_smoke.2718701029 |
|
|
Oct 15 12:04:46 PM UTC 24 |
Oct 15 12:04:54 PM UTC 24 |
15494866464 ps |
| T1011 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_acq.1532275589 |
|
|
Oct 15 12:04:55 PM UTC 24 |
Oct 15 12:04:57 PM UTC 24 |
164770739 ps |
| T1012 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_target_smoke.3212453089 |
|
|
Oct 15 12:04:34 PM UTC 24 |
Oct 15 12:04:57 PM UTC 24 |
4638369539 ps |
| T1013 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_tx.3424839104 |
|
|
Oct 15 12:04:55 PM UTC 24 |
Oct 15 12:04:58 PM UTC 24 |
263224615 ps |
| T1014 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_target_intr_stress_wr.1562469798 |
|
|
Oct 15 12:03:56 PM UTC 24 |
Oct 15 12:05:01 PM UTC 24 |
27158277800 ps |
| T1015 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_host_smoke.1795245162 |
|
|
Oct 15 12:04:23 PM UTC 24 |
Oct 15 12:05:02 PM UTC 24 |
3086065927 ps |
| T1016 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_target_timeout.3774033054 |
|
|
Oct 15 12:04:50 PM UTC 24 |
Oct 15 12:05:04 PM UTC 24 |
2447653098 ps |
| T1017 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_host_error_intr.1486315969 |
|
|
Oct 15 12:05:33 PM UTC 24 |
Oct 15 12:05:41 PM UTC 24 |
151799290 ps |
| T1018 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_target_perf.907125963 |
|
|
Oct 15 12:04:58 PM UTC 24 |
Oct 15 12:05:05 PM UTC 24 |
519290914 ps |
| T1019 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_target_hrst.1044291608 |
|
|
Oct 15 12:05:02 PM UTC 24 |
Oct 15 12:05:07 PM UTC 24 |
304087179 ps |
| T1020 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_target_bad_addr.491099931 |
|
|
Oct 15 12:04:59 PM UTC 24 |
Oct 15 12:05:09 PM UTC 24 |
2048837259 ps |
| T1021 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_tx.4194882937 |
|
|
Oct 15 12:05:07 PM UTC 24 |
Oct 15 12:05:10 PM UTC 24 |
312769162 ps |
| T1022 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_acq.3048432767 |
|
|
Oct 15 12:05:05 PM UTC 24 |
Oct 15 12:05:11 PM UTC 24 |
483629451 ps |
| T1023 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_target_tx_stretch_ctrl.1850868908 |
|
|
Oct 15 12:05:08 PM UTC 24 |
Oct 15 12:05:13 PM UTC 24 |
112750315 ps |
| T1024 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_target_intr_stress_wr.1232197101 |
|
|
Oct 15 12:04:46 PM UTC 24 |
Oct 15 12:05:13 PM UTC 24 |
8450976547 ps |
| T1025 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_target_smbus_maxlen.2673578976 |
|
|
Oct 15 12:05:10 PM UTC 24 |
Oct 15 12:05:15 PM UTC 24 |
1849547451 ps |
| T1026 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull.238241741 |
|
|
Oct 15 12:05:11 PM UTC 24 |
Oct 15 12:05:16 PM UTC 24 |
1648903517 ps |
| T1027 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_alert_test.1315575970 |
|
|
Oct 15 12:05:14 PM UTC 24 |
Oct 15 12:05:16 PM UTC 24 |
18966901 ps |
| T1028 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_target_nack_txstretch.2865714777 |
|
|
Oct 15 12:05:13 PM UTC 24 |
Oct 15 12:05:16 PM UTC 24 |
247430748 ps |
| T1029 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_host_may_nack.4210418273 |
|
|
Oct 15 12:05:04 PM UTC 24 |
Oct 15 12:05:17 PM UTC 24 |
287203292 ps |
| T1030 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull_addr.2525397444 |
|
|
Oct 15 12:05:12 PM UTC 24 |
Oct 15 12:05:17 PM UTC 24 |
827307091 ps |
| T1031 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_host_override.3919063748 |
|
|
Oct 15 12:05:16 PM UTC 24 |
Oct 15 12:05:18 PM UTC 24 |
18359685 ps |
| T1032 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_fmt.3742520133 |
|
|
Oct 15 12:05:17 PM UTC 24 |
Oct 15 12:05:20 PM UTC 24 |
732946662 ps |
| T1033 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_rx.2065011722 |
|
|
Oct 15 12:05:20 PM UTC 24 |
Oct 15 12:05:24 PM UTC 24 |
300692287 ps |
| T1034 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_fmt_empty.2339982826 |
|
|
Oct 15 12:05:17 PM UTC 24 |
Oct 15 12:05:32 PM UTC 24 |
233003061 ps |
| T1035 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_host_stretch_timeout.1536971712 |
|
|
Oct 15 12:05:26 PM UTC 24 |
Oct 15 12:05:43 PM UTC 24 |
765906092 ps |
| T1036 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/20.i2c_host_perf_precise.2275818259 |
|
|
Oct 15 11:55:56 AM UTC 24 |
Oct 15 12:05:53 PM UTC 24 |
24223070003 ps |
| T1037 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/26.i2c_target_stress_wr.3059455185 |
|
|
Oct 15 12:02:34 PM UTC 24 |
Oct 15 12:05:55 PM UTC 24 |
59826040914 ps |
| T1038 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_target_smoke.2870696882 |
|
|
Oct 15 12:05:44 PM UTC 24 |
Oct 15 12:06:00 PM UTC 24 |
3424174214 ps |
| T1039 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_host_smoke.825023791 |
|
|
Oct 15 12:05:16 PM UTC 24 |
Oct 15 12:06:01 PM UTC 24 |
3767238828 ps |
| T1040 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_target_intr_smoke.538117004 |
|
|
Oct 15 12:06:02 PM UTC 24 |
Oct 15 12:06:14 PM UTC 24 |
7376647144 ps |
| T1041 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_overflow.811143451 |
|
|
Oct 15 12:04:26 PM UTC 24 |
Oct 15 12:06:16 PM UTC 24 |
7229651089 ps |
| T1042 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_target_stress_rd.274357844 |
|
|
Oct 15 12:04:36 PM UTC 24 |
Oct 15 12:06:16 PM UTC 24 |
7096985224 ps |
| T1043 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_target_stress_rd.149462211 |
|
|
Oct 15 12:05:56 PM UTC 24 |
Oct 15 12:06:17 PM UTC 24 |
932600154 ps |
| T1044 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_acq.3387532775 |
|
|
Oct 15 12:06:18 PM UTC 24 |
Oct 15 12:06:21 PM UTC 24 |
232569447 ps |
| T1045 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_tx.652920067 |
|
|
Oct 15 12:06:20 PM UTC 24 |
Oct 15 12:06:23 PM UTC 24 |
222872824 ps |
| T1046 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_target_timeout.83096615 |
|
|
Oct 15 12:06:17 PM UTC 24 |
Oct 15 12:06:25 PM UTC 24 |
1093565793 ps |
| T1047 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_target_stress_wr.3341874186 |
|
|
Oct 15 12:05:53 PM UTC 24 |
Oct 15 12:06:26 PM UTC 24 |
7786669166 ps |
| T1048 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_host_perf.2789122018 |
|
|
Oct 15 12:04:27 PM UTC 24 |
Oct 15 12:06:28 PM UTC 24 |
3105326661 ps |
| T1049 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_host_perf.378938459 |
|
|
Oct 15 12:05:25 PM UTC 24 |
Oct 15 12:06:29 PM UTC 24 |
2635247334 ps |
| T1050 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_target_perf.1374656153 |
|
|
Oct 15 12:06:22 PM UTC 24 |
Oct 15 12:06:31 PM UTC 24 |
1183123189 ps |
| T1051 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_target_hrst.3637618308 |
|
|
Oct 15 12:06:26 PM UTC 24 |
Oct 15 12:06:31 PM UTC 24 |
1983106308 ps |
| T1052 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_target_bad_addr.2318105139 |
|
|
Oct 15 12:06:25 PM UTC 24 |
Oct 15 12:06:33 PM UTC 24 |
636280018 ps |
| T1053 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_host_mode_toggle.13123512 |
|
|
Oct 15 12:06:28 PM UTC 24 |
Oct 15 12:06:33 PM UTC 24 |
290477124 ps |
| T1054 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_tx.1345914644 |
|
|
Oct 15 12:06:32 PM UTC 24 |
Oct 15 12:06:34 PM UTC 24 |
400018708 ps |
| T1055 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_acq.457780254 |
|
|
Oct 15 12:06:32 PM UTC 24 |
Oct 15 12:06:35 PM UTC 24 |
355306270 ps |
| T1056 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_host_may_nack.1223477505 |
|
|
Oct 15 12:06:30 PM UTC 24 |
Oct 15 12:06:36 PM UTC 24 |
1044081637 ps |
| T1057 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_target_timeout.4015463023 |
|
|
Oct 15 12:07:55 PM UTC 24 |
Oct 15 12:08:02 PM UTC 24 |
1011692167 ps |
| T1058 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_target_tx_stretch_ctrl.2155434575 |
|
|
Oct 15 12:06:34 PM UTC 24 |
Oct 15 12:06:38 PM UTC 24 |
62726715 ps |
| T1059 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_target_smbus_maxlen.1453023084 |
|
|
Oct 15 12:06:35 PM UTC 24 |
Oct 15 12:06:38 PM UTC 24 |
1690931799 ps |
| T1060 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/31.i2c_target_intr_smoke.2985250602 |
|
|
Oct 15 12:07:53 PM UTC 24 |
Oct 15 12:08:03 PM UTC 24 |
806509346 ps |
| T1061 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull.1032725389 |
|
|
Oct 15 12:06:35 PM UTC 24 |
Oct 15 12:06:40 PM UTC 24 |
1469566713 ps |
| T1062 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_target_nack_txstretch.1142287559 |
|
|
Oct 15 12:06:37 PM UTC 24 |
Oct 15 12:06:41 PM UTC 24 |
652404811 ps |
| T1063 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_alert_test.1904703839 |
|
|
Oct 15 12:06:39 PM UTC 24 |
Oct 15 12:06:41 PM UTC 24 |
26222679 ps |
| T1064 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_host_perf.3880703168 |
|
|
Oct 15 12:01:05 PM UTC 24 |
Oct 15 12:06:42 PM UTC 24 |
28967825104 ps |
| T1065 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull_addr.2363185634 |
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|
Oct 15 12:06:36 PM UTC 24 |
Oct 15 12:06:42 PM UTC 24 |
522470497 ps |
| T1066 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_host_override.335110202 |
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|
Oct 15 12:06:41 PM UTC 24 |
Oct 15 12:06:43 PM UTC 24 |
83307450 ps |
| T1067 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/28.i2c_target_stress_all.986237060 |
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|
Oct 15 12:04:58 PM UTC 24 |
Oct 15 12:06:45 PM UTC 24 |
53766580603 ps |
| T1068 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_fmt.2457645558 |
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|
Oct 15 12:06:42 PM UTC 24 |
Oct 15 12:06:45 PM UTC 24 |
672295393 ps |
| T1069 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_target_stretch.2116653938 |
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|
Oct 15 12:06:01 PM UTC 24 |
Oct 15 12:06:46 PM UTC 24 |
4770806931 ps |
| T1070 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_host_perf_precise.1264290831 |
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|
Oct 15 12:06:46 PM UTC 24 |
Oct 15 12:06:49 PM UTC 24 |
94351744 ps |
| T1071 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/29.i2c_target_intr_stress_wr.550194154 |
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|
Oct 15 12:06:15 PM UTC 24 |
Oct 15 12:06:51 PM UTC 24 |
13108487901 ps |
| T1072 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_watermark.1693386918 |
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|
Oct 15 12:01:00 PM UTC 24 |
Oct 15 12:06:51 PM UTC 24 |
4404733885 ps |
| T1073 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_fmt_empty.1533634641 |
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|
Oct 15 12:06:43 PM UTC 24 |
Oct 15 12:06:52 PM UTC 24 |
1006910709 ps |
| T1074 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_host_error_intr.151351346 |
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Oct 15 12:06:50 PM UTC 24 |
Oct 15 12:06:54 PM UTC 24 |
485036726 ps |