| T1318 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_target_stretch.2210135348 |
|
|
Oct 15 12:13:26 PM UTC 24 |
Oct 15 12:13:47 PM UTC 24 |
2363160045 ps |
| T1319 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_full.2844367411 |
|
|
Oct 15 12:12:47 PM UTC 24 |
Oct 15 12:14:29 PM UTC 24 |
13617295768 ps |
| T1320 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_target_perf.3366712588 |
|
|
Oct 15 12:13:42 PM UTC 24 |
Oct 15 12:13:48 PM UTC 24 |
662995671 ps |
| T1321 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_target_hrst.383530209 |
|
|
Oct 15 12:13:44 PM UTC 24 |
Oct 15 12:13:48 PM UTC 24 |
216104813 ps |
| T1322 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_watermarks_acq.3878439844 |
|
|
Oct 15 12:13:47 PM UTC 24 |
Oct 15 12:13:50 PM UTC 24 |
187795562 ps |
| T1323 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_target_timeout.3291650756 |
|
|
Oct 15 12:13:35 PM UTC 24 |
Oct 15 12:13:50 PM UTC 24 |
5495229078 ps |
| T1324 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_watermarks_tx.956502732 |
|
|
Oct 15 12:13:47 PM UTC 24 |
Oct 15 12:13:50 PM UTC 24 |
929461172 ps |
| T1325 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_alert_test.3642478694 |
|
|
Oct 15 12:13:52 PM UTC 24 |
Oct 15 12:13:54 PM UTC 24 |
18129217 ps |
| T1326 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_target_smbus_maxlen.1740298271 |
|
|
Oct 15 12:13:49 PM UTC 24 |
Oct 15 12:13:54 PM UTC 24 |
383302980 ps |
| T1327 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_target_nack_acqfull.1972883862 |
|
|
Oct 15 12:13:49 PM UTC 24 |
Oct 15 12:13:55 PM UTC 24 |
512641556 ps |
| T1328 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_target_nack_txstretch.2705423777 |
|
|
Oct 15 12:13:52 PM UTC 24 |
Oct 15 12:13:55 PM UTC 24 |
1211440891 ps |
| T1329 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_target_nack_acqfull_addr.3652833720 |
|
|
Oct 15 12:13:50 PM UTC 24 |
Oct 15 12:13:57 PM UTC 24 |
778088380 ps |
| T1330 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_target_bad_addr.2984369331 |
|
|
Oct 15 12:13:43 PM UTC 24 |
Oct 15 12:13:57 PM UTC 24 |
4887907473 ps |
| T1331 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_host_override.3404013047 |
|
|
Oct 15 12:13:55 PM UTC 24 |
Oct 15 12:13:57 PM UTC 24 |
31793313 ps |
| T1332 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_target_tx_stretch_ctrl.547182125 |
|
|
Oct 15 12:13:48 PM UTC 24 |
Oct 15 12:13:57 PM UTC 24 |
168385686 ps |
| T1333 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_target_stress_rd.3489712986 |
|
|
Oct 15 12:13:26 PM UTC 24 |
Oct 15 12:13:58 PM UTC 24 |
4824312601 ps |
| T1334 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_watermark.2857758009 |
|
|
Oct 15 12:09:12 PM UTC 24 |
Oct 15 12:14:01 PM UTC 24 |
5010422685 ps |
| T1335 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_fmt.2659567827 |
|
|
Oct 15 12:13:58 PM UTC 24 |
Oct 15 12:14:02 PM UTC 24 |
332048526 ps |
| T1336 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_target_stress_all.2040854516 |
|
|
Oct 15 12:11:26 PM UTC 24 |
Oct 15 12:14:03 PM UTC 24 |
30548997782 ps |
| T1337 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_rx.2424125005 |
|
|
Oct 15 12:13:58 PM UTC 24 |
Oct 15 12:14:04 PM UTC 24 |
119760429 ps |
| T1338 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_host_perf_precise.1824672956 |
|
|
Oct 15 12:14:02 PM UTC 24 |
Oct 15 12:14:07 PM UTC 24 |
717659901 ps |
| T1339 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_fmt_empty.3869677266 |
|
|
Oct 15 12:13:58 PM UTC 24 |
Oct 15 12:14:08 PM UTC 24 |
373078110 ps |
| T1340 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_host_may_nack.1802467222 |
|
|
Oct 15 12:13:46 PM UTC 24 |
Oct 15 12:14:11 PM UTC 24 |
504752578 ps |
| T1341 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_watermark.3776082978 |
|
|
Oct 15 12:10:05 PM UTC 24 |
Oct 15 12:14:14 PM UTC 24 |
8346528491 ps |
| T1342 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_host_error_intr.577816371 |
|
|
Oct 15 12:14:05 PM UTC 24 |
Oct 15 12:14:15 PM UTC 24 |
1657753042 ps |
| T1343 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_target_stress_rd.3359607114 |
|
|
Oct 15 12:14:12 PM UTC 24 |
Oct 15 12:14:20 PM UTC 24 |
1224618092 ps |
| T1344 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_target_stretch.3028870848 |
|
|
Oct 15 12:14:15 PM UTC 24 |
Oct 15 12:14:22 PM UTC 24 |
3924084751 ps |
| T1345 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_target_intr_smoke.3008189272 |
|
|
Oct 15 12:14:16 PM UTC 24 |
Oct 15 12:14:27 PM UTC 24 |
4043638676 ps |
| T1346 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_reset_tx.2784993213 |
|
|
Oct 15 12:14:27 PM UTC 24 |
Oct 15 12:14:30 PM UTC 24 |
145626728 ps |
| T1347 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_reset_acq.1403165503 |
|
|
Oct 15 12:14:26 PM UTC 24 |
Oct 15 12:14:30 PM UTC 24 |
238452005 ps |
| T1348 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_overflow.365946706 |
|
|
Oct 15 12:11:40 PM UTC 24 |
Oct 15 12:14:30 PM UTC 24 |
5525675754 ps |
| T1349 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_target_timeout.3279517044 |
|
|
Oct 15 12:14:23 PM UTC 24 |
Oct 15 12:14:32 PM UTC 24 |
6668581166 ps |
| T1350 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_overflow.2554225131 |
|
|
Oct 15 12:12:44 PM UTC 24 |
Oct 15 12:14:36 PM UTC 24 |
4985773215 ps |
| T1351 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_target_hrst.4039107898 |
|
|
Oct 15 12:14:31 PM UTC 24 |
Oct 15 12:14:37 PM UTC 24 |
5179537174 ps |
| T1352 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_tx.3470143653 |
|
|
Oct 15 12:14:34 PM UTC 24 |
Oct 15 12:14:37 PM UTC 24 |
441208172 ps |
| T1353 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_target_perf.259437261 |
|
|
Oct 15 12:14:29 PM UTC 24 |
Oct 15 12:14:37 PM UTC 24 |
615792621 ps |
| T1354 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_host_may_nack.1646611290 |
|
|
Oct 15 12:14:31 PM UTC 24 |
Oct 15 12:14:39 PM UTC 24 |
6092955104 ps |
| T1355 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_acq.3456110289 |
|
|
Oct 15 12:14:33 PM UTC 24 |
Oct 15 12:14:39 PM UTC 24 |
2111670934 ps |
| T1356 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_host_stretch_timeout.2093917517 |
|
|
Oct 15 12:14:02 PM UTC 24 |
Oct 15 12:14:41 PM UTC 24 |
846016350 ps |
| T1357 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_alert_test.3038263702 |
|
|
Oct 15 12:14:41 PM UTC 24 |
Oct 15 12:14:42 PM UTC 24 |
95814939 ps |
| T1358 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_target_smbus_maxlen.2552863961 |
|
|
Oct 15 12:14:37 PM UTC 24 |
Oct 15 12:14:43 PM UTC 24 |
503731554 ps |
| T1359 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_host_override.1746492079 |
|
|
Oct 15 12:14:42 PM UTC 24 |
Oct 15 12:14:44 PM UTC 24 |
28719166 ps |
| T1360 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull.4179029513 |
|
|
Oct 15 12:14:37 PM UTC 24 |
Oct 15 12:14:44 PM UTC 24 |
5685242751 ps |
| T1361 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull_addr.1448718914 |
|
|
Oct 15 12:14:38 PM UTC 24 |
Oct 15 12:14:44 PM UTC 24 |
455089089 ps |
| T1362 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_target_bad_addr.28893147 |
|
|
Oct 15 12:14:30 PM UTC 24 |
Oct 15 12:14:46 PM UTC 24 |
6768241072 ps |
| T1363 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_fmt.3817330130 |
|
|
Oct 15 12:14:44 PM UTC 24 |
Oct 15 12:14:47 PM UTC 24 |
113234691 ps |
| T1364 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_target_stress_all.3435314046 |
|
|
Oct 15 12:13:43 PM UTC 24 |
Oct 15 12:14:50 PM UTC 24 |
8491997573 ps |
| T1365 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_rx.300425817 |
|
|
Oct 15 12:14:45 PM UTC 24 |
Oct 15 12:14:51 PM UTC 24 |
137014380 ps |
| T1366 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_fmt_empty.3281681343 |
|
|
Oct 15 12:14:45 PM UTC 24 |
Oct 15 12:14:56 PM UTC 24 |
619663076 ps |
| T1367 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_host_error_intr.2234822661 |
|
|
Oct 15 12:14:52 PM UTC 24 |
Oct 15 12:14:58 PM UTC 24 |
336718487 ps |
| T1368 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_host_perf_precise.328594573 |
|
|
Oct 15 12:14:47 PM UTC 24 |
Oct 15 12:15:04 PM UTC 24 |
3039946392 ps |
| T1369 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_watermark.76139477 |
|
|
Oct 15 12:11:40 PM UTC 24 |
Oct 15 12:15:07 PM UTC 24 |
15162641527 ps |
| T1370 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_target_stretch.2543006647 |
|
|
Oct 15 12:15:08 PM UTC 24 |
Oct 15 12:15:13 PM UTC 24 |
1819089463 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_target_smoke.1547955173 |
|
|
Oct 15 12:14:59 PM UTC 24 |
Oct 15 12:15:13 PM UTC 24 |
2789620880 ps |
| T1371 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_full.272603381 |
|
|
Oct 15 12:13:58 PM UTC 24 |
Oct 15 12:15:15 PM UTC 24 |
3081386148 ps |
| T1372 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_watermark.1811432240 |
|
|
Oct 15 12:12:43 PM UTC 24 |
Oct 15 12:15:16 PM UTC 24 |
2699631755 ps |
| T1373 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_acq.1024408451 |
|
|
Oct 15 12:15:18 PM UTC 24 |
Oct 15 12:15:22 PM UTC 24 |
2572190986 ps |
| T1374 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_tx.2482955230 |
|
|
Oct 15 12:15:20 PM UTC 24 |
Oct 15 12:15:23 PM UTC 24 |
364374651 ps |
| T1375 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_target_timeout.1368304408 |
|
|
Oct 15 12:15:16 PM UTC 24 |
Oct 15 12:15:25 PM UTC 24 |
2617250734 ps |
| T1376 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_host_smoke.1758296786 |
|
|
Oct 15 12:14:42 PM UTC 24 |
Oct 15 12:15:25 PM UTC 24 |
4132705726 ps |
| T1377 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_target_stress_wr.1025757033 |
|
|
Oct 15 12:14:10 PM UTC 24 |
Oct 15 12:15:28 PM UTC 24 |
63923096600 ps |
| T253 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/32.i2c_host_stress_all.1476108352 |
|
|
Oct 15 12:08:34 PM UTC 24 |
Oct 15 12:15:28 PM UTC 24 |
28636544873 ps |
| T1378 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_target_intr_smoke.3009981889 |
|
|
Oct 15 12:15:14 PM UTC 24 |
Oct 15 12:15:31 PM UTC 24 |
6293577823 ps |
| T1379 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_target_bad_addr.3730651375 |
|
|
Oct 15 12:15:26 PM UTC 24 |
Oct 15 12:15:32 PM UTC 24 |
1080298467 ps |
| T1380 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_host_mode_toggle.2008040132 |
|
|
Oct 15 12:15:29 PM UTC 24 |
Oct 15 12:15:32 PM UTC 24 |
58672017 ps |
| T1381 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_target_perf.3775018543 |
|
|
Oct 15 12:15:22 PM UTC 24 |
Oct 15 12:15:32 PM UTC 24 |
767483622 ps |
| T1382 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_overflow.3344085288 |
|
|
Oct 15 12:13:56 PM UTC 24 |
Oct 15 12:15:34 PM UTC 24 |
3087318005 ps |
| T1383 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_host_may_nack.4237318031 |
|
|
Oct 15 12:15:29 PM UTC 24 |
Oct 15 12:15:36 PM UTC 24 |
450738648 ps |
| T1384 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_tx.902006291 |
|
|
Oct 15 12:15:33 PM UTC 24 |
Oct 15 12:15:36 PM UTC 24 |
721553144 ps |
| T1385 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_target_tx_stretch_ctrl.3364905696 |
|
|
Oct 15 12:15:33 PM UTC 24 |
Oct 15 12:15:37 PM UTC 24 |
57661478 ps |
| T1386 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_acq.805360427 |
|
|
Oct 15 12:15:32 PM UTC 24 |
Oct 15 12:15:38 PM UTC 24 |
918912756 ps |
| T1387 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_host_perf.1728960873 |
|
|
Oct 15 12:14:46 PM UTC 24 |
Oct 15 12:15:38 PM UTC 24 |
12714882739 ps |
| T1388 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_target_smbus_maxlen.1102665505 |
|
|
Oct 15 12:15:33 PM UTC 24 |
Oct 15 12:15:39 PM UTC 24 |
425488741 ps |
| T1389 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_host_stretch_timeout.3494319231 |
|
|
Oct 15 12:14:51 PM UTC 24 |
Oct 15 12:15:39 PM UTC 24 |
2294644763 ps |
| T1390 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_alert_test.2331340030 |
|
|
Oct 15 12:15:37 PM UTC 24 |
Oct 15 12:15:40 PM UTC 24 |
17298636 ps |
| T1391 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_host_may_nack.1198634508 |
|
|
Oct 15 12:16:08 PM UTC 24 |
Oct 15 12:16:18 PM UTC 24 |
10157878224 ps |
| T1392 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull_addr.1101063423 |
|
|
Oct 15 12:15:36 PM UTC 24 |
Oct 15 12:15:41 PM UTC 24 |
850429638 ps |
| T1393 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_target_nack_txstretch.3478491933 |
|
|
Oct 15 12:15:37 PM UTC 24 |
Oct 15 12:15:41 PM UTC 24 |
151743935 ps |
| T131 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/27.i2c_host_stress_all.601186429 |
|
|
Oct 15 12:03:40 PM UTC 24 |
Oct 15 12:15:41 PM UTC 24 |
61845962090 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_host_override.2212268996 |
|
|
Oct 15 12:15:40 PM UTC 24 |
Oct 15 12:15:42 PM UTC 24 |
18080044 ps |
| T1394 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull.960904160 |
|
|
Oct 15 12:15:35 PM UTC 24 |
Oct 15 12:15:42 PM UTC 24 |
2058286072 ps |
| T1395 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_target_stress_wr.2850008217 |
|
|
Oct 15 12:15:05 PM UTC 24 |
Oct 15 12:15:43 PM UTC 24 |
13844352248 ps |
| T1396 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_fmt.333112455 |
|
|
Oct 15 12:15:41 PM UTC 24 |
Oct 15 12:15:43 PM UTC 24 |
95261040 ps |
| T1397 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_host_error_intr.4196781507 |
|
|
Oct 15 12:15:44 PM UTC 24 |
Oct 15 12:15:48 PM UTC 24 |
91311992 ps |
| T1398 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_target_stress_all.274841374 |
|
|
Oct 15 12:14:30 PM UTC 24 |
Oct 15 12:15:49 PM UTC 24 |
30839261594 ps |
| T1399 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_watermark.854730793 |
|
|
Oct 15 12:10:45 PM UTC 24 |
Oct 15 12:15:49 PM UTC 24 |
8999000606 ps |
| T1400 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_host_perf_precise.1456980696 |
|
|
Oct 15 12:15:43 PM UTC 24 |
Oct 15 12:15:51 PM UTC 24 |
728221027 ps |
| T1401 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_target_intr_stress_wr.2790339649 |
|
|
Oct 15 12:15:14 PM UTC 24 |
Oct 15 12:15:57 PM UTC 24 |
26660267508 ps |
| T1402 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_rx.1433558589 |
|
|
Oct 15 12:15:42 PM UTC 24 |
Oct 15 12:15:57 PM UTC 24 |
395764403 ps |
| T1403 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_host_smoke.2042415388 |
|
|
Oct 15 12:15:39 PM UTC 24 |
Oct 15 12:15:59 PM UTC 24 |
1174860560 ps |
| T1404 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_fmt_empty.1629673566 |
|
|
Oct 15 12:15:42 PM UTC 24 |
Oct 15 12:15:59 PM UTC 24 |
246530213 ps |
| T1405 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_alert_test.3019490176 |
|
|
Oct 15 12:16:16 PM UTC 24 |
Oct 15 12:16:18 PM UTC 24 |
17316991 ps |
| T1406 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_host_stretch_timeout.3495830502 |
|
|
Oct 15 12:15:44 PM UTC 24 |
Oct 15 12:16:01 PM UTC 24 |
4068166213 ps |
| T1407 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_acq.1348123269 |
|
|
Oct 15 12:16:00 PM UTC 24 |
Oct 15 12:16:03 PM UTC 24 |
231379815 ps |
| T1408 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_tx.3420575529 |
|
|
Oct 15 12:16:02 PM UTC 24 |
Oct 15 12:16:05 PM UTC 24 |
474046673 ps |
| T1409 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_target_intr_stress_wr.913433226 |
|
|
Oct 15 12:14:20 PM UTC 24 |
Oct 15 12:16:06 PM UTC 24 |
10993162056 ps |
| T1410 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_target_intr_smoke.3901315187 |
|
|
Oct 15 12:15:58 PM UTC 24 |
Oct 15 12:16:07 PM UTC 24 |
4768669625 ps |
| T1411 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_target_timeout.3443326308 |
|
|
Oct 15 12:15:59 PM UTC 24 |
Oct 15 12:16:09 PM UTC 24 |
4939579563 ps |
| T1412 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_target_bad_addr.981155732 |
|
|
Oct 15 12:16:04 PM UTC 24 |
Oct 15 12:16:10 PM UTC 24 |
781056900 ps |
| T1413 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_target_perf.2801568977 |
|
|
Oct 15 12:16:02 PM UTC 24 |
Oct 15 12:16:11 PM UTC 24 |
752162670 ps |
| T1414 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_target_intr_stress_wr.867456488 |
|
|
Oct 15 12:15:59 PM UTC 24 |
Oct 15 12:16:13 PM UTC 24 |
5243947931 ps |
| T1415 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_tx.3863103944 |
|
|
Oct 15 12:16:11 PM UTC 24 |
Oct 15 12:16:13 PM UTC 24 |
75130579 ps |
| T1416 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_acq.432137700 |
|
|
Oct 15 12:16:10 PM UTC 24 |
Oct 15 12:16:14 PM UTC 24 |
1258265141 ps |
| T1417 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_target_tx_stretch_ctrl.4031421757 |
|
|
Oct 15 12:16:11 PM UTC 24 |
Oct 15 12:16:15 PM UTC 24 |
99813100 ps |
| T1418 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_target_smoke.139178623 |
|
|
Oct 15 12:15:49 PM UTC 24 |
Oct 15 12:16:19 PM UTC 24 |
920784866 ps |
| T1419 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_target_smbus_maxlen.2608567678 |
|
|
Oct 15 12:16:12 PM UTC 24 |
Oct 15 12:16:17 PM UTC 24 |
2270498575 ps |
| T1420 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_target_nack_txstretch.162747171 |
|
|
Oct 15 12:16:14 PM UTC 24 |
Oct 15 12:16:17 PM UTC 24 |
130887641 ps |
| T1421 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull.3414331143 |
|
|
Oct 15 12:16:14 PM UTC 24 |
Oct 15 12:16:20 PM UTC 24 |
580427319 ps |
| T1422 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull_addr.1552509687 |
|
|
Oct 15 12:16:14 PM UTC 24 |
Oct 15 12:16:20 PM UTC 24 |
1752537259 ps |
| T1423 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_fmt.1949191772 |
|
|
Oct 15 12:16:20 PM UTC 24 |
Oct 15 12:16:22 PM UTC 24 |
298871645 ps |
| T1424 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_target_stress_rd.2266648001 |
|
|
Oct 15 12:15:52 PM UTC 24 |
Oct 15 12:16:23 PM UTC 24 |
4113354395 ps |
| T1425 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_target_stress_rd.3882146515 |
|
|
Oct 15 12:15:06 PM UTC 24 |
Oct 15 12:16:27 PM UTC 24 |
6131598213 ps |
| T1426 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_rx.3229471254 |
|
|
Oct 15 12:16:21 PM UTC 24 |
Oct 15 12:16:29 PM UTC 24 |
850280187 ps |
| T1427 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_host_error_intr.2029945380 |
|
|
Oct 15 12:16:28 PM UTC 24 |
Oct 15 12:16:32 PM UTC 24 |
178392407 ps |
| T1428 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_fmt_empty.660574666 |
|
|
Oct 15 12:16:20 PM UTC 24 |
Oct 15 12:16:35 PM UTC 24 |
227116072 ps |
| T1429 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/30.i2c_host_stress_all.280293044 |
|
|
Oct 15 12:06:51 PM UTC 24 |
Oct 15 12:16:39 PM UTC 24 |
38309057318 ps |
| T1430 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_target_stress_all.2210151408 |
|
|
Oct 15 12:16:03 PM UTC 24 |
Oct 15 12:16:39 PM UTC 24 |
8620071505 ps |
| T1431 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_host_stretch_timeout.3912014389 |
|
|
Oct 15 12:16:23 PM UTC 24 |
Oct 15 12:16:43 PM UTC 24 |
1872750530 ps |
| T1432 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_full.3421154368 |
|
|
Oct 15 12:15:42 PM UTC 24 |
Oct 15 12:16:45 PM UTC 24 |
13040997512 ps |
| T1433 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_target_stretch.2630448412 |
|
|
Oct 15 12:16:41 PM UTC 24 |
Oct 15 12:16:48 PM UTC 24 |
309807240 ps |
| T1434 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_host_smoke.3135590510 |
|
|
Oct 15 12:16:17 PM UTC 24 |
Oct 15 12:16:51 PM UTC 24 |
1857295218 ps |
| T1435 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_overflow.118013014 |
|
|
Oct 15 12:16:19 PM UTC 24 |
Oct 15 12:16:51 PM UTC 24 |
6591866742 ps |
| T1436 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_host_perf.2330903091 |
|
|
Oct 15 12:16:22 PM UTC 24 |
Oct 15 12:16:53 PM UTC 24 |
7026996288 ps |
| T1437 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_target_smoke.2286192236 |
|
|
Oct 15 12:16:32 PM UTC 24 |
Oct 15 12:16:53 PM UTC 24 |
4368771538 ps |
| T1438 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_target_intr_smoke.2166567731 |
|
|
Oct 15 12:16:44 PM UTC 24 |
Oct 15 12:16:53 PM UTC 24 |
2458648123 ps |
| T1439 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_full.2152650009 |
|
|
Oct 15 12:14:45 PM UTC 24 |
Oct 15 12:16:54 PM UTC 24 |
1986308466 ps |
| T1440 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_watermark.1530609068 |
|
|
Oct 15 12:14:43 PM UTC 24 |
Oct 15 12:16:55 PM UTC 24 |
9862434582 ps |
| T1441 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_tx.4057630265 |
|
|
Oct 15 12:16:53 PM UTC 24 |
Oct 15 12:16:56 PM UTC 24 |
158165058 ps |
| T1442 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_acq.2132229193 |
|
|
Oct 15 12:16:52 PM UTC 24 |
Oct 15 12:16:56 PM UTC 24 |
841496815 ps |
| T1443 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_target_timeout.2828913976 |
|
|
Oct 15 12:16:49 PM UTC 24 |
Oct 15 12:16:59 PM UTC 24 |
959941458 ps |
| T1444 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_target_perf.2173093783 |
|
|
Oct 15 12:16:54 PM UTC 24 |
Oct 15 12:17:00 PM UTC 24 |
1607032001 ps |
| T1445 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_overflow.2024545917 |
|
|
Oct 15 12:14:44 PM UTC 24 |
Oct 15 12:17:02 PM UTC 24 |
7677563619 ps |
| T1446 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_tx.2063036978 |
|
|
Oct 15 12:17:00 PM UTC 24 |
Oct 15 12:17:03 PM UTC 24 |
229580838 ps |
| T1447 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_acq.1940604790 |
|
|
Oct 15 12:16:59 PM UTC 24 |
Oct 15 12:17:05 PM UTC 24 |
516773197 ps |
| T1448 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_target_tx_stretch_ctrl.354465730 |
|
|
Oct 15 12:17:01 PM UTC 24 |
Oct 15 12:17:05 PM UTC 24 |
58883854 ps |
| T1449 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_target_bad_addr.2927021507 |
|
|
Oct 15 12:16:55 PM UTC 24 |
Oct 15 12:17:06 PM UTC 24 |
3923327468 ps |
| T1450 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_target_smbus_maxlen.2607294249 |
|
|
Oct 15 12:17:01 PM UTC 24 |
Oct 15 12:17:07 PM UTC 24 |
1944702590 ps |
| T1451 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_alert_test.196637627 |
|
|
Oct 15 12:17:06 PM UTC 24 |
Oct 15 12:17:08 PM UTC 24 |
27287560 ps |
| T1452 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull.2022368635 |
|
|
Oct 15 12:17:03 PM UTC 24 |
Oct 15 12:17:09 PM UTC 24 |
2402692301 ps |
| T1453 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull_addr.1265655977 |
|
|
Oct 15 12:17:04 PM UTC 24 |
Oct 15 12:17:10 PM UTC 24 |
486291659 ps |
| T1454 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_target_nack_txstretch.3352690803 |
|
|
Oct 15 12:17:06 PM UTC 24 |
Oct 15 12:17:10 PM UTC 24 |
154132699 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_host_override.3169480432 |
|
|
Oct 15 12:17:08 PM UTC 24 |
Oct 15 12:17:11 PM UTC 24 |
27559996 ps |
| T1455 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_host_may_nack.3006183174 |
|
|
Oct 15 12:16:58 PM UTC 24 |
Oct 15 12:17:12 PM UTC 24 |
8166750132 ps |
| T1456 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_fmt.1507654611 |
|
|
Oct 15 12:17:11 PM UTC 24 |
Oct 15 12:17:13 PM UTC 24 |
121500249 ps |
| T1457 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_rx.1900102429 |
|
|
Oct 15 12:17:12 PM UTC 24 |
Oct 15 12:17:20 PM UTC 24 |
410112511 ps |
| T1458 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_target_stress_all.2723916863 |
|
|
Oct 15 12:16:54 PM UTC 24 |
Oct 15 12:17:25 PM UTC 24 |
3285114030 ps |
| T1459 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_fmt_empty.2075294359 |
|
|
Oct 15 12:17:11 PM UTC 24 |
Oct 15 12:17:26 PM UTC 24 |
463092525 ps |
| T1460 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_watermark.1803883240 |
|
|
Oct 15 12:13:56 PM UTC 24 |
Oct 15 12:17:27 PM UTC 24 |
3527488450 ps |
| T1461 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_host_error_intr.2415281803 |
|
|
Oct 15 12:17:27 PM UTC 24 |
Oct 15 12:17:32 PM UTC 24 |
1222736539 ps |
| T1462 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_target_stress_rd.2740324785 |
|
|
Oct 15 12:16:40 PM UTC 24 |
Oct 15 12:17:36 PM UTC 24 |
3682704758 ps |
| T1463 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_host_smoke.2710513570 |
|
|
Oct 15 12:17:06 PM UTC 24 |
Oct 15 12:17:42 PM UTC 24 |
1642799682 ps |
| T1464 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_host_stretch_timeout.4103364433 |
|
|
Oct 15 12:17:26 PM UTC 24 |
Oct 15 12:17:46 PM UTC 24 |
12024814278 ps |
| T1465 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/35.i2c_host_perf.1308070867 |
|
|
Oct 15 12:10:49 PM UTC 24 |
Oct 15 12:17:46 PM UTC 24 |
7231253354 ps |
| T1466 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_host_perf.2767122106 |
|
|
Oct 15 12:17:14 PM UTC 24 |
Oct 15 12:17:50 PM UTC 24 |
2631457703 ps |
| T1467 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_host_perf_precise.3587506103 |
|
|
Oct 15 12:17:21 PM UTC 24 |
Oct 15 12:17:51 PM UTC 24 |
2336344723 ps |
| T1468 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_target_intr_smoke.2329251113 |
|
|
Oct 15 12:17:47 PM UTC 24 |
Oct 15 12:17:57 PM UTC 24 |
2537785470 ps |
| T1469 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_target_stress_rd.1682811407 |
|
|
Oct 15 12:17:43 PM UTC 24 |
Oct 15 12:17:57 PM UTC 24 |
755930234 ps |
| T1470 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_acq.3029291844 |
|
|
Oct 15 12:17:58 PM UTC 24 |
Oct 15 12:18:01 PM UTC 24 |
492055797 ps |
| T1471 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_target_timeout.4038395139 |
|
|
Oct 15 12:17:52 PM UTC 24 |
Oct 15 12:18:03 PM UTC 24 |
4471717788 ps |
| T1472 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_tx.3051200940 |
|
|
Oct 15 12:17:59 PM UTC 24 |
Oct 15 12:18:03 PM UTC 24 |
468314995 ps |
| T1473 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_target_perf.134090448 |
|
|
Oct 15 12:18:00 PM UTC 24 |
Oct 15 12:18:08 PM UTC 24 |
1040133939 ps |
| T1474 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_target_stress_rd.3517324857 |
|
|
Oct 15 12:18:50 PM UTC 24 |
Oct 15 12:19:00 PM UTC 24 |
593331059 ps |
| T1475 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_target_hrst.1567947728 |
|
|
Oct 15 12:18:03 PM UTC 24 |
Oct 15 12:18:08 PM UTC 24 |
362492957 ps |
| T1476 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_target_bad_addr.65452951 |
|
|
Oct 15 12:18:02 PM UTC 24 |
Oct 15 12:18:10 PM UTC 24 |
554002660 ps |
| T1477 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_tx.627676827 |
|
|
Oct 15 12:18:09 PM UTC 24 |
Oct 15 12:18:12 PM UTC 24 |
106141097 ps |
| T1478 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_acq.1410685192 |
|
|
Oct 15 12:18:09 PM UTC 24 |
Oct 15 12:18:14 PM UTC 24 |
1589176779 ps |
| T1479 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/37.i2c_target_intr_stress_wr.1177703184 |
|
|
Oct 15 12:13:32 PM UTC 24 |
Oct 15 12:18:15 PM UTC 24 |
18042202088 ps |
| T1480 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_overflow.903334800 |
|
|
Oct 15 12:17:11 PM UTC 24 |
Oct 15 12:18:15 PM UTC 24 |
2750033692 ps |
| T1481 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_target_smoke.2426427597 |
|
|
Oct 15 12:17:32 PM UTC 24 |
Oct 15 12:18:16 PM UTC 24 |
1096691016 ps |
| T1482 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_host_may_nack.1240470804 |
|
|
Oct 15 12:18:09 PM UTC 24 |
Oct 15 12:18:16 PM UTC 24 |
448294307 ps |
| T1483 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/34.i2c_target_stress_all.205807880 |
|
|
Oct 15 12:10:33 PM UTC 24 |
Oct 15 12:18:16 PM UTC 24 |
34642158274 ps |
| T1484 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_target_tx_stretch_ctrl.160255636 |
|
|
Oct 15 12:18:11 PM UTC 24 |
Oct 15 12:18:17 PM UTC 24 |
134233764 ps |
| T1485 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_target_smbus_maxlen.1343352269 |
|
|
Oct 15 12:18:13 PM UTC 24 |
Oct 15 12:18:18 PM UTC 24 |
935198788 ps |
| T1486 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_alert_test.1595830742 |
|
|
Oct 15 12:18:16 PM UTC 24 |
Oct 15 12:18:18 PM UTC 24 |
17061841 ps |
| T1487 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_host_override.382692307 |
|
|
Oct 15 12:18:17 PM UTC 24 |
Oct 15 12:18:20 PM UTC 24 |
49033568 ps |
| T1488 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_target_nack_txstretch.2992681533 |
|
|
Oct 15 12:18:16 PM UTC 24 |
Oct 15 12:18:20 PM UTC 24 |
337303444 ps |
| T1489 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull.2137529923 |
|
|
Oct 15 12:18:15 PM UTC 24 |
Oct 15 12:18:21 PM UTC 24 |
3867371503 ps |
| T1490 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull_addr.1069529292 |
|
|
Oct 15 12:18:16 PM UTC 24 |
Oct 15 12:18:22 PM UTC 24 |
488504799 ps |
| T1491 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_fmt.2114185102 |
|
|
Oct 15 12:18:20 PM UTC 24 |
Oct 15 12:18:22 PM UTC 24 |
62686677 ps |
| T1492 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_fmt_empty.2517123669 |
|
|
Oct 15 12:18:21 PM UTC 24 |
Oct 15 12:18:31 PM UTC 24 |
195560086 ps |
| T1493 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_rx.2761051318 |
|
|
Oct 15 12:18:21 PM UTC 24 |
Oct 15 12:18:34 PM UTC 24 |
363207358 ps |
| T1494 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_overflow.493796195 |
|
|
Oct 15 12:15:41 PM UTC 24 |
Oct 15 12:18:38 PM UTC 24 |
32049050237 ps |
| T1495 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_host_error_intr.1809585964 |
|
|
Oct 15 12:18:35 PM UTC 24 |
Oct 15 12:18:40 PM UTC 24 |
182421081 ps |
| T1496 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_host_perf.4287908320 |
|
|
Oct 15 12:18:23 PM UTC 24 |
Oct 15 12:18:42 PM UTC 24 |
709251131 ps |
| T1497 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_host_stretch_timeout.3893899913 |
|
|
Oct 15 12:18:32 PM UTC 24 |
Oct 15 12:18:49 PM UTC 24 |
2833431272 ps |
| T1498 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_watermark.4008533158 |
|
|
Oct 15 12:17:09 PM UTC 24 |
Oct 15 12:18:54 PM UTC 24 |
7948733204 ps |
| T1499 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_target_smoke.2029854345 |
|
|
Oct 15 12:18:40 PM UTC 24 |
Oct 15 12:18:59 PM UTC 24 |
1289422982 ps |
| T1500 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_target_intr_stress_wr.379107833 |
|
|
Oct 15 12:17:51 PM UTC 24 |
Oct 15 12:19:02 PM UTC 24 |
14255772071 ps |
| T1501 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_target_stretch.815729599 |
|
|
Oct 15 12:18:55 PM UTC 24 |
Oct 15 12:19:03 PM UTC 24 |
1262024778 ps |
| T1502 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_target_intr_smoke.372385540 |
|
|
Oct 15 12:19:00 PM UTC 24 |
Oct 15 12:19:09 PM UTC 24 |
686074622 ps |
| T1503 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_acq.568682198 |
|
|
Oct 15 12:19:07 PM UTC 24 |
Oct 15 12:19:09 PM UTC 24 |
355823627 ps |
| T1504 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_host_perf_precise.1050955350 |
|
|
Oct 15 12:18:23 PM UTC 24 |
Oct 15 12:19:10 PM UTC 24 |
2503934421 ps |
| T1505 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_target_intr_stress_wr.823698731 |
|
|
Oct 15 12:16:46 PM UTC 24 |
Oct 15 12:19:11 PM UTC 24 |
24440533405 ps |
| T1506 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_tx.2093739472 |
|
|
Oct 15 12:19:10 PM UTC 24 |
Oct 15 12:19:13 PM UTC 24 |
189180019 ps |
| T1507 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_target_timeout.579200421 |
|
|
Oct 15 12:19:03 PM UTC 24 |
Oct 15 12:19:17 PM UTC 24 |
14760327070 ps |
| T1508 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_target_perf.2569416576 |
|
|
Oct 15 12:19:10 PM UTC 24 |
Oct 15 12:19:18 PM UTC 24 |
584846790 ps |
| T1509 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_full.1634471166 |
|
|
Oct 15 12:17:13 PM UTC 24 |
Oct 15 12:19:19 PM UTC 24 |
6283036989 ps |
| T1510 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_target_bad_addr.369931095 |
|
|
Oct 15 12:19:12 PM UTC 24 |
Oct 15 12:19:20 PM UTC 24 |
3324810994 ps |
| T1511 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_tx.1300276941 |
|
|
Oct 15 12:19:21 PM UTC 24 |
Oct 15 12:19:23 PM UTC 24 |
116237023 ps |
| T1512 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_host_mode_toggle.4017751015 |
|
|
Oct 15 12:19:19 PM UTC 24 |
Oct 15 12:19:23 PM UTC 24 |
179052218 ps |
| T1513 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_acq.4221323971 |
|
|
Oct 15 12:19:20 PM UTC 24 |
Oct 15 12:19:25 PM UTC 24 |
786534353 ps |
| T1514 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_full.2332428436 |
|
|
Oct 15 12:16:21 PM UTC 24 |
Oct 15 12:19:27 PM UTC 24 |
31784386346 ps |
| T1515 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_target_tx_stretch_ctrl.2888687586 |
|
|
Oct 15 12:19:24 PM UTC 24 |
Oct 15 12:19:27 PM UTC 24 |
53266791 ps |
| T1516 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_target_smbus_maxlen.3390511998 |
|
|
Oct 15 12:19:24 PM UTC 24 |
Oct 15 12:19:27 PM UTC 24 |
448498400 ps |
| T1517 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_target_stress_wr.1039994367 |
|
|
Oct 15 12:15:50 PM UTC 24 |
Oct 15 12:19:29 PM UTC 24 |
59173304976 ps |
| T1518 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_host_may_nack.2619210750 |
|
|
Oct 15 12:19:19 PM UTC 24 |
Oct 15 12:19:29 PM UTC 24 |
1626608783 ps |
| T1519 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_alert_test.473534015 |
|
|
Oct 15 12:19:28 PM UTC 24 |
Oct 15 12:19:30 PM UTC 24 |
19204167 ps |
| T1520 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_watermark.1296169367 |
|
|
Oct 15 12:16:18 PM UTC 24 |
Oct 15 12:19:31 PM UTC 24 |
3284087059 ps |
| T1521 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_target_nack_txstretch.3845551916 |
|
|
Oct 15 12:19:28 PM UTC 24 |
Oct 15 12:19:31 PM UTC 24 |
140405504 ps |
| T1522 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_host_override.1827149803 |
|
|
Oct 15 12:19:29 PM UTC 24 |
Oct 15 12:19:32 PM UTC 24 |
41955714 ps |
| T1523 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull.4058877993 |
|
|
Oct 15 12:19:26 PM UTC 24 |
Oct 15 12:19:32 PM UTC 24 |
563929620 ps |
| T1524 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/41.i2c_target_stress_wr.511252392 |
|
|
Oct 15 12:16:36 PM UTC 24 |
Oct 15 12:19:32 PM UTC 24 |
37459380093 ps |
| T1525 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull_addr.3647669267 |
|
|
Oct 15 12:19:28 PM UTC 24 |
Oct 15 12:19:35 PM UTC 24 |
1076762762 ps |
| T1526 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_fmt.44141610 |
|
|
Oct 15 12:19:33 PM UTC 24 |
Oct 15 12:19:36 PM UTC 24 |
1179431991 ps |
| T1527 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_fmt_empty.1961997511 |
|
|
Oct 15 12:19:33 PM UTC 24 |
Oct 15 12:19:39 PM UTC 24 |
265772316 ps |
| T1528 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_rx.3035544882 |
|
|
Oct 15 12:19:33 PM UTC 24 |
Oct 15 12:19:41 PM UTC 24 |
257401377 ps |
| T1529 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_host_smoke.1820320085 |
|
|
Oct 15 12:18:17 PM UTC 24 |
Oct 15 12:19:43 PM UTC 24 |
1428505639 ps |
| T1530 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_host_stretch_timeout.181331357 |
|
|
Oct 15 12:19:40 PM UTC 24 |
Oct 15 12:19:47 PM UTC 24 |
1446611265 ps |
| T1531 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_host_smoke.1343662643 |
|
|
Oct 15 12:19:29 PM UTC 24 |
Oct 15 12:19:52 PM UTC 24 |
5110460012 ps |
| T1532 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_host_error_intr.509393425 |
|
|
Oct 15 12:19:42 PM UTC 24 |
Oct 15 12:19:52 PM UTC 24 |
426172623 ps |
| T1533 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_overflow.2192797281 |
|
|
Oct 15 12:18:19 PM UTC 24 |
Oct 15 12:20:04 PM UTC 24 |
1596936544 ps |
| T1534 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_target_intr_smoke.1234734210 |
|
|
Oct 15 12:19:54 PM UTC 24 |
Oct 15 12:20:04 PM UTC 24 |
4146526950 ps |
| T1535 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_watermark.3790048270 |
|
|
Oct 15 12:15:40 PM UTC 24 |
Oct 15 12:20:05 PM UTC 24 |
8320707023 ps |
| T1536 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_host_perf.2137025836 |
|
|
Oct 15 12:19:35 PM UTC 24 |
Oct 15 12:20:06 PM UTC 24 |
1530361323 ps |
| T1537 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_acq.240837571 |
|
|
Oct 15 12:20:07 PM UTC 24 |
Oct 15 12:20:10 PM UTC 24 |
1469970704 ps |
| T158 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_tx.422928824 |
|
|
Oct 15 12:20:09 PM UTC 24 |
Oct 15 12:20:11 PM UTC 24 |
244479758 ps |
| T1538 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_target_stress_all.4079340565 |
|
|
Oct 15 12:19:10 PM UTC 24 |
Oct 15 12:20:12 PM UTC 24 |
34629303003 ps |
| T1539 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_target_stress_rd.3009553583 |
|
|
Oct 15 12:19:52 PM UTC 24 |
Oct 15 12:20:13 PM UTC 24 |
875021222 ps |
| T1540 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_target_timeout.1992561683 |
|
|
Oct 15 12:20:05 PM UTC 24 |
Oct 15 12:20:14 PM UTC 24 |
4225179268 ps |
| T1541 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_target_bad_addr.2006430200 |
|
|
Oct 15 12:20:12 PM UTC 24 |
Oct 15 12:20:16 PM UTC 24 |
2934290906 ps |
| T1542 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_target_perf.2719628343 |
|
|
Oct 15 12:20:10 PM UTC 24 |
Oct 15 12:20:18 PM UTC 24 |
2229590377 ps |
| T1543 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_target_smoke.1509031756 |
|
|
Oct 15 12:19:47 PM UTC 24 |
Oct 15 12:20:20 PM UTC 24 |
4244641163 ps |
| T1544 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_watermarks_tx.513618574 |
|
|
Oct 15 12:20:18 PM UTC 24 |
Oct 15 12:20:20 PM UTC 24 |
385287723 ps |
| T1545 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_watermarks_acq.3381563168 |
|
|
Oct 15 12:20:18 PM UTC 24 |
Oct 15 12:20:24 PM UTC 24 |
1823432746 ps |
| T1546 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_target_smbus_maxlen.642015852 |
|
|
Oct 15 12:20:19 PM UTC 24 |
Oct 15 12:20:24 PM UTC 24 |
460453080 ps |
| T1547 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_target_nack_acqfull_addr.1603479950 |
|
|
Oct 15 12:20:21 PM UTC 24 |
Oct 15 12:20:26 PM UTC 24 |
571759102 ps |
| T1548 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_target_tx_stretch_ctrl.1248935845 |
|
|
Oct 15 12:20:18 PM UTC 24 |
Oct 15 12:20:26 PM UTC 24 |
239804296 ps |
| T1549 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_overflow.1534906785 |
|
|
Oct 15 12:19:31 PM UTC 24 |
Oct 15 12:20:27 PM UTC 24 |
2029214171 ps |
| T1550 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_target_nack_acqfull.1874142949 |
|
|
Oct 15 12:20:21 PM UTC 24 |
Oct 15 12:20:27 PM UTC 24 |
491989709 ps |
| T1551 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_alert_test.1198754815 |
|
|
Oct 15 12:20:25 PM UTC 24 |
Oct 15 12:20:28 PM UTC 24 |
20505824 ps |
| T1552 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_host_may_nack.2778453971 |
|
|
Oct 15 12:20:17 PM UTC 24 |
Oct 15 12:20:28 PM UTC 24 |
2524576802 ps |
| T1553 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/45.i2c_target_bad_addr.3918568556 |
|
|
Oct 15 12:21:42 PM UTC 24 |
Oct 15 12:21:51 PM UTC 24 |
4335665379 ps |
| T1554 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/45.i2c_host_override.3019751915 |
|
|
Oct 15 12:20:27 PM UTC 24 |
Oct 15 12:20:30 PM UTC 24 |
24716214 ps |
| T1555 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_fmt.1832722094 |
|
|
Oct 15 12:20:28 PM UTC 24 |
Oct 15 12:20:31 PM UTC 24 |
450197471 ps |
| T1556 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/44.i2c_host_perf_precise.2942208423 |
|
|
Oct 15 12:19:36 PM UTC 24 |
Oct 15 12:20:38 PM UTC 24 |
2848916446 ps |
| T1557 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_fmt_empty.3558696245 |
|
|
Oct 15 12:20:29 PM UTC 24 |
Oct 15 12:20:41 PM UTC 24 |
446773775 ps |
| T1558 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_rx.3193617844 |
|
|
Oct 15 12:20:31 PM UTC 24 |
Oct 15 12:20:44 PM UTC 24 |
230843684 ps |
| T1559 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/45.i2c_host_error_intr.1620421649 |
|
|
Oct 15 12:20:42 PM UTC 24 |
Oct 15 12:20:47 PM UTC 24 |
92304462 ps |
| T1560 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/45.i2c_host_perf.1607090498 |
|
|
Oct 15 12:20:32 PM UTC 24 |
Oct 15 12:20:55 PM UTC 24 |
7022358792 ps |
| T1561 |
/workspaces/repo/scratch/os_regression_2024_10_14/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_full.2802848989 |
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|
Oct 15 12:18:22 PM UTC 24 |
Oct 15 12:21:12 PM UTC 24 |
2430606596 ps |