KMAC/UNMASKED Simulation Results

Tuesday May 30 2023 07:03:17 UTC

GitHub Revision: `f8b3c19a2`

Branch: os_regression

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 1284268927

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	kmac_smoke	55.950s	3.770ms	50	50	100.00
V1	csr_hw_reset	kmac_csr_hw_reset	1.130s	40.624us	5	5	100.00
V1	csr_rw	kmac_csr_rw	1.220s	249.069us	20	20	100.00
V1	csr_bit_bash	kmac_csr_bit_bash	20.440s	1.372ms	5	5	100.00
V1	csr_aliasing	kmac_csr_aliasing	10.470s	2.763ms	5	5	100.00
V1	csr_mem_rw_with_rand_reset	kmac_csr_mem_rw_with_rand_reset	2.440s	33.145us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	kmac_csr_rw	1.220s	249.069us	20	20	100.00
		kmac_csr_aliasing	10.470s	2.763ms	5	5	100.00
V1	mem_walk	kmac_mem_walk	0.720s	14.479us	5	5	100.00
V1	mem_partial_access	kmac_mem_partial_access	1.420s	43.728us	5	5	100.00
V1		TOTAL			115	115	100.00
V2	long_msg_and_output	kmac_long_msg_and_output	50.027m	584.342ms	50	50	100.00
V2	burst_write	kmac_burst_write	12.869m	33.071ms	50	50	100.00
V2	test_vectors	kmac_test_vectors_sha3_224	34.968m	862.975ms	50	50	100.00
		kmac_test_vectors_sha3_256	37.138m	1.141s	50	50	100.00
		kmac_test_vectors_sha3_384	26.446m	646.689ms	50	50	100.00
		kmac_test_vectors_sha3_512	17.189m	98.010ms	50	50	100.00
		kmac_test_vectors_shake_128	1.517h	773.922ms	50	50	100.00
		kmac_test_vectors_shake_256	1.327h	911.362ms	50	50	100.00
		kmac_test_vectors_kmac	5.420s	1.064ms	50	50	100.00
		kmac_test_vectors_kmac_xof	5.920s	4.601ms	50	50	100.00
V2	sideload	kmac_sideload	6.570m	198.462ms	50	50	100.00
V2	app	kmac_app	5.825m	162.601ms	50	50	100.00
V2	app_with_partial_data	kmac_app_with_partial_data	5.125m	75.962ms	9	10	90.00
V2	entropy_refresh	kmac_entropy_refresh	5.152m	17.437ms	47	50	94.00
V2	error	kmac_error	6.821m	19.986ms	50	50	100.00
V2	key_error	kmac_key_error	6.750s	2.610ms	50	50	100.00
V2	edn_timeout_error	kmac_edn_timeout_error	37.250s	1.518ms	20	20	100.00
V2	entropy_mode_error	kmac_entropy_mode_error	38.710s	2.097ms	20	20	100.00
V2	entropy_ready_error	kmac_entropy_ready_error	1.063m	7.050ms	10	10	100.00
V2	lc_escalation	kmac_lc_escalation	36.770s	1.135ms	50	50	100.00
V2	stress_all	kmac_stress_all	32.028m	65.577ms	49	50	98.00
V2	intr_test	kmac_intr_test	0.830s	22.954us	50	50	100.00
V2	alert_test	kmac_alert_test	0.850s	84.167us	50	50	100.00
V2	tl_d_oob_addr_access	kmac_tl_errors	3.280s	685.940us	20	20	100.00
V2	tl_d_illegal_access	kmac_tl_errors	3.280s	685.940us	20	20	100.00
V2	tl_d_outstanding_access	kmac_csr_hw_reset	1.130s	40.624us	5	5	100.00
		kmac_csr_rw	1.220s	249.069us	20	20	100.00
		kmac_csr_aliasing	10.470s	2.763ms	5	5	100.00
		kmac_same_csr_outstanding	2.730s	287.521us	20	20	100.00
V2	tl_d_partial_access	kmac_csr_hw_reset	1.130s	40.624us	5	5	100.00
		kmac_csr_rw	1.220s	249.069us	20	20	100.00
		kmac_csr_aliasing	10.470s	2.763ms	5	5	100.00
		kmac_same_csr_outstanding	2.730s	287.521us	20	20	100.00
V2		TOTAL			1045	1050	99.52
V2S	shadow_reg_update_error	kmac_shadow_reg_errors	2.390s	185.196us	20	20	100.00
V2S	shadow_reg_read_clear_staged_value	kmac_shadow_reg_errors	2.390s	185.196us	20	20	100.00
V2S	shadow_reg_storage_error	kmac_shadow_reg_errors	2.390s	185.196us	20	20	100.00
V2S	shadowed_reset_glitch	kmac_shadow_reg_errors	2.390s	185.196us	20	20	100.00
V2S	shadow_reg_update_error_with_csr_rw	kmac_shadow_reg_errors_with_csr_rw	5.110s	345.693us	20	20	100.00
V2S	tl_intg_err	kmac_sec_cm	1.195m	25.243ms	5	5	100.00
		kmac_tl_intg_err	5.130s	1.327ms	20	20	100.00
V2S	sec_cm_bus_integrity	kmac_tl_intg_err	5.130s	1.327ms	20	20	100.00
V2S	sec_cm_lc_escalate_en_intersig_mubi	kmac_lc_escalation	36.770s	1.135ms	50	50	100.00
V2S	sec_cm_sw_key_key_masking	kmac_smoke	55.950s	3.770ms	50	50	100.00
V2S	sec_cm_key_sideload	kmac_sideload	6.570m	198.462ms	50	50	100.00
V2S	sec_cm_cfg_shadowed_config_shadow	kmac_shadow_reg_errors	2.390s	185.196us	20	20	100.00
V2S	sec_cm_fsm_sparse	kmac_sec_cm	1.195m	25.243ms	5	5	100.00
V2S	sec_cm_ctr_redun	kmac_sec_cm	1.195m	25.243ms	5	5	100.00
V2S	sec_cm_packer_ctr_redun	kmac_sec_cm	1.195m	25.243ms	5	5	100.00
V2S	sec_cm_cfg_shadowed_config_regwen	kmac_smoke	55.950s	3.770ms	50	50	100.00
V2S	sec_cm_fsm_global_esc	kmac_lc_escalation	36.770s	1.135ms	50	50	100.00
V2S	sec_cm_fsm_local_esc	kmac_sec_cm	1.195m	25.243ms	5	5	100.00
V2S	sec_cm_absorbed_ctrl_mubi	kmac_mubi	4.904m	50.269ms	10	10	100.00
V2S	sec_cm_sw_cmd_ctrl_sparse	kmac_smoke	55.950s	3.770ms	50	50	100.00
V2S		TOTAL			75	75	100.00
V3	throughput	kmac_throughput			0	0	--
V3	stress_all_with_rand_reset	kmac_stress_all_with_rand_reset	43.024m	91.732ms	40	50	80.00
V3		TOTAL			40	50	80.00
		TOTAL			1275	1290	98.84

Testplan Progress

Items	Total	Written	Passing	Progress
V1	8	8	8	100.00
V2	25	25	22	88.00
V2S	5	5	5	100.00
V3	2	1	0	0.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
95.31	96.65	92.52	100.00	87.50	94.67	98.82	97.02

Failure Buckets

UVM_ERROR (kmac_scoreboard.sv:1176) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: kmac_reg_block.err_code

has 10 failures:

Test kmac_stress_all_with_rand_reset has 10 failures.

2.kmac_stress_all_with_rand_reset.4100734395
Line 269, in log /container/opentitan-public/scratch/os_regression/kmac_unmasked-sim-vcs/2.kmac_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 524431389 ps: (kmac_scoreboard.sv:1176) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2147483672 [0x80000018]) reg name: kmac_reg_block.err_code
  UVM_INFO @ 524431389 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

5.kmac_stress_all_with_rand_reset.36616764
Line 752, in log /container/opentitan-public/scratch/os_regression/kmac_unmasked-sim-vcs/5.kmac_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 46158143031 ps: (kmac_scoreboard.sv:1176) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2147483736 [0x80000058]) reg name: kmac_reg_block.err_code
  UVM_INFO @ 46158143031 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 8 more failures.

UVM_FATAL (kmac_scoreboard.sv:1520) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*]

has 5 failures:

Test kmac_entropy_refresh has 3 failures.

2.kmac_entropy_refresh.1134797110
Line 279, in log /container/opentitan-public/scratch/os_regression/kmac_unmasked-sim-vcs/2.kmac_entropy_refresh/latest/run.log

  UVM_FATAL @ 26872876788 ps: (kmac_scoreboard.sv:1520) [uvm_test_top.env.scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (191 [0xbf] vs 29 [0x1d]) Mismatch between unmasked_digest[0] and dpi_digest[0]
  UVM_INFO @ 26872876788 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

17.kmac_entropy_refresh.90700023
Line 238, in log /container/opentitan-public/scratch/os_regression/kmac_unmasked-sim-vcs/17.kmac_entropy_refresh/latest/run.log

  UVM_FATAL @ 747703593 ps: (kmac_scoreboard.sv:1520) [uvm_test_top.env.scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (91 [0x5b] vs 146 [0x92]) Mismatch between unmasked_digest[0] and dpi_digest[0]
  UVM_INFO @ 747703593 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 1 more failures.

Test kmac_app_with_partial_data has 1 failures.

8.kmac_app_with_partial_data.2955112796
Line 264, in log /container/opentitan-public/scratch/os_regression/kmac_unmasked-sim-vcs/8.kmac_app_with_partial_data/latest/run.log

  UVM_FATAL @ 7157875694 ps: (kmac_scoreboard.sv:1520) [uvm_test_top.env.scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (47 [0x2f] vs 157 [0x9d]) Mismatch between unmasked_digest[0] and dpi_digest[0]
  UVM_INFO @ 7157875694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Test kmac_stress_all has 1 failures.

18.kmac_stress_all.1528541258
Line 496, in log /container/opentitan-public/scratch/os_regression/kmac_unmasked-sim-vcs/18.kmac_stress_all/latest/run.log

  UVM_FATAL @ 24218731328 ps: (kmac_scoreboard.sv:1520) [uvm_test_top.env.scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (136 [0x88] vs 50 [0x32]) Mismatch between unmasked_digest[0] and dpi_digest[0]
  UVM_INFO @ 24218731328 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---