213e792ea
Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
---|---|---|---|---|---|---|---|
V1 | smoke | otbn_smoke | 9.000s | 70.759us | 1 | 1 | 100.00 |
V1 | single_binary | otbn_single | 1.000m | 266.354us | 95 | 100 | 95.00 |
V1 | csr_hw_reset | otbn_csr_hw_reset | 5.000s | 65.415us | 5 | 5 | 100.00 |
V1 | csr_rw | otbn_csr_rw | 7.000s | 51.997us | 20 | 20 | 100.00 |
V1 | csr_bit_bash | otbn_csr_bit_bash | 10.000s | 129.465us | 5 | 5 | 100.00 |
V1 | csr_aliasing | otbn_csr_aliasing | 6.000s | 16.056us | 5 | 5 | 100.00 |
V1 | csr_mem_rw_with_rand_reset | otbn_csr_mem_rw_with_rand_reset | 9.000s | 34.974us | 20 | 20 | 100.00 |
V1 | regwen_csr_and_corresponding_lockable_csr | otbn_csr_rw | 7.000s | 51.997us | 20 | 20 | 100.00 |
otbn_csr_aliasing | 6.000s | 16.056us | 5 | 5 | 100.00 | ||
V1 | mem_walk | otbn_mem_walk | 33.000s | 1.549ms | 5 | 5 | 100.00 |
V1 | mem_partial_access | otbn_mem_partial_access | 16.000s | 892.950us | 5 | 5 | 100.00 |
V1 | TOTAL | 161 | 166 | 96.99 | |||
V2 | reset_recovery | otbn_reset | 1.083m | 4.052ms | 10 | 10 | 100.00 |
V2 | multi_error | otbn_multi_err | 59.000s | 241.228us | 1 | 1 | 100.00 |
V2 | back_to_back | otbn_multi | 1.900m | 442.839us | 9 | 10 | 90.00 |
V2 | stress_all | otbn_stress_all | 1.117m | 808.794us | 9 | 10 | 90.00 |
V2 | lc_escalation | otbn_escalate | 13.000s | 49.436us | 47 | 60 | 78.33 |
V2 | zero_state_err_urnd | otbn_zero_state_err_urnd | 8.000s | 37.318us | 3 | 5 | 60.00 |
V2 | sw_errs_fatal_chk | otbn_sw_errs_fatal_chk | 18.000s | 56.826us | 10 | 10 | 100.00 |
V2 | alert_test | otbn_alert_test | 8.000s | 16.586us | 50 | 50 | 100.00 |
V2 | intr_test | otbn_intr_test | 8.000s | 13.855us | 50 | 50 | 100.00 |
V2 | tl_d_oob_addr_access | otbn_tl_errors | 10.000s | 2.122ms | 20 | 20 | 100.00 |
V2 | tl_d_illegal_access | otbn_tl_errors | 10.000s | 2.122ms | 20 | 20 | 100.00 |
V2 | tl_d_outstanding_access | otbn_csr_hw_reset | 5.000s | 65.415us | 5 | 5 | 100.00 |
otbn_csr_rw | 7.000s | 51.997us | 20 | 20 | 100.00 | ||
otbn_csr_aliasing | 6.000s | 16.056us | 5 | 5 | 100.00 | ||
otbn_same_csr_outstanding | 7.000s | 46.454us | 20 | 20 | 100.00 | ||
V2 | tl_d_partial_access | otbn_csr_hw_reset | 5.000s | 65.415us | 5 | 5 | 100.00 |
otbn_csr_rw | 7.000s | 51.997us | 20 | 20 | 100.00 | ||
otbn_csr_aliasing | 6.000s | 16.056us | 5 | 5 | 100.00 | ||
otbn_same_csr_outstanding | 7.000s | 46.454us | 20 | 20 | 100.00 | ||
V2 | TOTAL | 229 | 246 | 93.09 | |||
V2S | mem_integrity | otbn_imem_err | 11.000s | 201.670us | 10 | 10 | 100.00 |
otbn_dmem_err | 13.000s | 17.873us | 13 | 15 | 86.67 | ||
V2S | internal_integrity | otbn_alu_bignum_mod_err | 14.000s | 121.587us | 5 | 5 | 100.00 |
otbn_controller_ispr_rdata_err | 9.000s | 36.603us | 5 | 5 | 100.00 | ||
otbn_mac_bignum_acc_err | 28.000s | 797.977us | 5 | 5 | 100.00 | ||
otbn_urnd_err | 7.000s | 8.501us | 1 | 2 | 50.00 | ||
V2S | illegal_bus_access | otbn_illegal_mem_acc | 8.000s | 19.940us | 5 | 5 | 100.00 |
V2S | otbn_mem_gnt_acc_err | otbn_mem_gnt_acc_err | 7.000s | 14.113us | 2 | 2 | 100.00 |
V2S | tl_intg_err | otbn_sec_cm | 4.183m | 4.612ms | 3 | 5 | 60.00 |
otbn_tl_intg_err | 32.000s | 331.903us | 20 | 20 | 100.00 | ||
V2S | passthru_mem_tl_intg_err | otbn_passthru_mem_tl_intg_err | 36.000s | 201.908us | 20 | 20 | 100.00 |
V2S | prim_fsm_check | otbn_sec_cm | 4.183m | 4.612ms | 3 | 5 | 60.00 |
V2S | prim_count_check | otbn_sec_cm | 4.183m | 4.612ms | 3 | 5 | 60.00 |
V2S | sec_cm_mem_scramble | otbn_smoke | 9.000s | 70.759us | 1 | 1 | 100.00 |
V2S | sec_cm_data_mem_integrity | otbn_dmem_err | 13.000s | 17.873us | 13 | 15 | 86.67 |
V2S | sec_cm_instruction_mem_integrity | otbn_imem_err | 11.000s | 201.670us | 10 | 10 | 100.00 |
V2S | sec_cm_bus_integrity | otbn_tl_intg_err | 32.000s | 331.903us | 20 | 20 | 100.00 |
V2S | sec_cm_controller_fsm_global_esc | otbn_escalate | 13.000s | 49.436us | 47 | 60 | 78.33 |
V2S | sec_cm_controller_fsm_local_esc | otbn_imem_err | 11.000s | 201.670us | 10 | 10 | 100.00 |
otbn_dmem_err | 13.000s | 17.873us | 13 | 15 | 86.67 | ||
otbn_zero_state_err_urnd | 8.000s | 37.318us | 3 | 5 | 60.00 | ||
otbn_illegal_mem_acc | 8.000s | 19.940us | 5 | 5 | 100.00 | ||
otbn_sec_cm | 4.183m | 4.612ms | 3 | 5 | 60.00 | ||
V2S | sec_cm_controller_fsm_sparse | otbn_sec_cm | 4.183m | 4.612ms | 3 | 5 | 60.00 |
V2S | sec_cm_scramble_key_sideload | otbn_single | 1.000m | 266.354us | 95 | 100 | 95.00 |
V2S | sec_cm_scramble_ctrl_fsm_local_esc | otbn_imem_err | 11.000s | 201.670us | 10 | 10 | 100.00 |
otbn_dmem_err | 13.000s | 17.873us | 13 | 15 | 86.67 | ||
otbn_zero_state_err_urnd | 8.000s | 37.318us | 3 | 5 | 60.00 | ||
otbn_illegal_mem_acc | 8.000s | 19.940us | 5 | 5 | 100.00 | ||
otbn_sec_cm | 4.183m | 4.612ms | 3 | 5 | 60.00 | ||
V2S | sec_cm_scramble_ctrl_fsm_sparse | otbn_sec_cm | 4.183m | 4.612ms | 3 | 5 | 60.00 |
V2S | sec_cm_start_stop_ctrl_fsm_global_esc | otbn_escalate | 13.000s | 49.436us | 47 | 60 | 78.33 |
V2S | sec_cm_start_stop_ctrl_fsm_local_esc | otbn_imem_err | 11.000s | 201.670us | 10 | 10 | 100.00 |
otbn_dmem_err | 13.000s | 17.873us | 13 | 15 | 86.67 | ||
otbn_zero_state_err_urnd | 8.000s | 37.318us | 3 | 5 | 60.00 | ||
otbn_illegal_mem_acc | 8.000s | 19.940us | 5 | 5 | 100.00 | ||
otbn_sec_cm | 4.183m | 4.612ms | 3 | 5 | 60.00 | ||
V2S | sec_cm_start_stop_ctrl_fsm_sparse | otbn_sec_cm | 4.183m | 4.612ms | 3 | 5 | 60.00 |
V2S | sec_cm_data_reg_sw_sca | otbn_single | 1.000m | 266.354us | 95 | 100 | 95.00 |
V2S | sec_cm_ctrl_redun | otbn_ctrl_redun | 9.000s | 20.569us | 11 | 12 | 91.67 |
V2S | sec_cm_pc_ctrl_flow_redun | otbn_pc_ctrl_flow_redun | 9.000s | 24.488us | 5 | 5 | 100.00 |
V2S | sec_cm_rnd_bus_consistency | otbn_rnd_sec_cm | 43.000s | 129.793us | 5 | 5 | 100.00 |
V2S | sec_cm_rnd_rng_digest | otbn_rnd_sec_cm | 43.000s | 129.793us | 5 | 5 | 100.00 |
V2S | sec_cm_rf_base_data_reg_sw_integrity | otbn_rf_base_intg_err | 13.000s | 430.243us | 5 | 10 | 50.00 |
V2S | sec_cm_rf_base_data_reg_sw_glitch_detect | otbn_sec_cm | 4.183m | 4.612ms | 3 | 5 | 60.00 |
V2S | sec_cm_stack_wr_ptr_ctr_redun | otbn_sec_cm | 4.183m | 4.612ms | 3 | 5 | 60.00 |
V2S | sec_cm_rf_bignum_data_reg_sw_integrity | otbn_rf_bignum_intg_err | 9.000s | 41.527us | 9 | 10 | 90.00 |
V2S | sec_cm_rf_bignum_data_reg_sw_glitch_detect | otbn_sec_cm | 4.183m | 4.612ms | 3 | 5 | 60.00 |
V2S | sec_cm_loop_stack_ctr_redun | otbn_sec_cm | 4.183m | 4.612ms | 3 | 5 | 60.00 |
V2S | sec_cm_loop_stack_addr_integrity | otbn_stack_addr_integ_chk | 2.083m | 10.011ms | 4 | 5 | 80.00 |
V2S | sec_cm_call_stack_addr_integrity | otbn_stack_addr_integ_chk | 2.083m | 10.011ms | 4 | 5 | 80.00 |
V2S | sec_cm_start_stop_ctrl_state_consistency | otbn_sec_wipe_err | 11.000s | 31.958us | 7 | 7 | 100.00 |
V2S | sec_cm_data_mem_sec_wipe | otbn_single | 1.000m | 266.354us | 95 | 100 | 95.00 |
V2S | sec_cm_instruction_mem_sec_wipe | otbn_single | 1.000m | 266.354us | 95 | 100 | 95.00 |
V2S | sec_cm_data_reg_sw_sec_wipe | otbn_single | 1.000m | 266.354us | 95 | 100 | 95.00 |
V2S | sec_cm_write_mem_integrity | otbn_multi | 1.900m | 442.839us | 9 | 10 | 90.00 |
V2S | sec_cm_ctrl_flow_count | otbn_single | 1.000m | 266.354us | 95 | 100 | 95.00 |
V2S | sec_cm_ctrl_flow_sca | otbn_single | 1.000m | 266.354us | 95 | 100 | 95.00 |
V2S | sec_cm_data_mem_sw_noaccess | otbn_sw_no_acc | 13.000s | 139.054us | 5 | 5 | 100.00 |
V2S | sec_cm_key_sideload | otbn_single | 1.000m | 266.354us | 95 | 100 | 95.00 |
V2S | sec_cm_tlul_fifo_ctr_redun | otbn_sec_cm | 4.183m | 4.612ms | 3 | 5 | 60.00 |
V2S | TOTAL | 140 | 153 | 91.50 | |||
V3 | stress_all_with_rand_reset | otbn_stress_all_with_rand_reset | 31.267m | 24.165ms | 8 | 10 | 80.00 |
V3 | TOTAL | 8 | 10 | 80.00 | |||
TOTAL | 538 | 575 | 93.57 |
Items | Total | Written | Passing | Progress |
---|---|---|---|---|
V1 | 9 | 9 | 8 | 88.89 |
V2 | 11 | 11 | 7 | 63.64 |
V2S | 19 | 19 | 12 | 63.16 |
V3 | 1 | 1 | 0 | 0.00 |
Score | Block | Branch | Statement | Expression | Toggle | Fsm | Assertion | CoverGroup |
---|---|---|---|---|---|---|---|---|
98.74 | 99.52 | 94.33 | 99.62 | 90.97 | 93.01 | 94.87 | 91.52 | 99.16 |
Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_*/otbn_insn_cnt_if.sv,21): Assertion InsnCntMatches_A has failed
has 5 failures:
Test otbn_ctrl_redun has 1 failures.
0.otbn_ctrl_redun.1681499615
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/0.otbn_ctrl_redun/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 9376341 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
UVM_ERROR @ 9376341 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
UVM_INFO @ 9376341 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_rf_base_intg_err has 1 failures.
2.otbn_rf_base_intg_err.3770221482
Line 250, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/2.otbn_rf_base_intg_err/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 101784075 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,137): (time 101784075 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 101784075 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
UVM_INFO @ 101784075 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_zero_state_err_urnd has 1 failures.
4.otbn_zero_state_err_urnd.3411642080
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/4.otbn_zero_state_err_urnd/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 10112790 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
UVM_ERROR @ 10112790 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
UVM_INFO @ 10112790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_escalate has 2 failures.
17.otbn_escalate.442958018
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/17.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 8815435 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
UVM_ERROR @ 8815435 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
UVM_INFO @ 8815435 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
35.otbn_escalate.1435361222
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/35.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 12382481 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
UVM_ERROR @ 12382481 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
UVM_INFO @ 12382481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_*/tb.sv,270): Assertion MatchingStatus_A has failed
has 5 failures:
Test otbn_rf_base_intg_err has 2 failures.
1.otbn_rf_base_intg_err.3482509364
Line 244, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/1.otbn_rf_base_intg_err/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 152317718 PS) Assertion tb.MatchingStatus_A has failed
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 152317718 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
UVM_ERROR @ 152317718 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
UVM_INFO @ 152317718 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
4.otbn_rf_base_intg_err.202844328
Line 243, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/4.otbn_rf_base_intg_err/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 430243066 PS) Assertion tb.MatchingStatus_A has failed
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 430243066 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
UVM_ERROR @ 430243066 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
UVM_INFO @ 430243066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_escalate has 3 failures.
21.otbn_escalate.2364553509
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/21.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 7945973 PS) Assertion tb.MatchingStatus_A has failed
UVM_ERROR @ 7945973 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
UVM_INFO @ 7945973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
30.otbn_escalate.2718889117
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/30.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 4868462 PS) Assertion tb.MatchingStatus_A has failed
UVM_ERROR @ 4868462 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
UVM_INFO @ 4868462 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 1 more failures.
UVM_FATAL (otbn_scoreboard.sv:538) scoreboard [scoreboard] We saw a STATUS change * cycles ago that implied we'd get a fatal alert but it still hasn't arrived.
has 4 failures:
9.otbn_escalate.375540260
Line 243, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/9.otbn_escalate/latest/run.log
UVM_FATAL @ 14985439 ps: (otbn_scoreboard.sv:538) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] We saw a STATUS change 30 cycles ago that implied we'd get a fatal alert but it still hasn't arrived.
UVM_INFO @ 14985439 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
14.otbn_escalate.2799620977
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/14.otbn_escalate/latest/run.log
UVM_FATAL @ 3590217 ps: (otbn_scoreboard.sv:538) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] We saw a STATUS change 30 cycles ago that implied we'd get a fatal alert but it still hasn't arrived.
UVM_INFO @ 3590217 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
has 3 failures:
Test otbn_single has 2 failures.
3.otbn_single.2129168334
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_single/latest/run.log
UVM_FATAL @ 25813329 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 25813329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
19.otbn_single.3863091838
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/19.otbn_single/latest/run.log
UVM_FATAL @ 53957513 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 53957513 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_stress_all_with_rand_reset has 1 failures.
3.otbn_stress_all_with_rand_reset.3681003579
Line 330, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_stress_all_with_rand_reset/latest/run.log
UVM_FATAL @ 562040531 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 562040531 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_dmem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
has 3 failures:
Test otbn_stress_all has 1 failures.
3.otbn_stress_all.1914506455
Line 279, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_stress_all/latest/run.log
UVM_FATAL @ 31297148 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 31297148 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_dmem_err has 2 failures.
4.otbn_dmem_err.1955826424
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/4.otbn_dmem_err/latest/run.log
UVM_FATAL @ 20148549 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 20148549 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
6.otbn_dmem_err.3034000391
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/6.otbn_dmem_err/latest/run.log
UVM_FATAL @ 10004107 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 10004107 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_rf_base_intg_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
has 2 failures:
0.otbn_rf_base_intg_err.2239071813
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/0.otbn_rf_base_intg_err/latest/run.log
UVM_FATAL @ 15715502 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_rf_base_intg_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 15715502 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
9.otbn_rf_base_intg_err.2269743793
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/9.otbn_rf_base_intg_err/latest/run.log
UVM_FATAL @ 11886029 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_rf_base_intg_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 11886029 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_scoreboard.sv:495) scoreboard [scoreboard] A fatal alert arrived * cycles ago and we still don't think it should have done.
has 2 failures:
0.otbn_sec_cm.130446968
Line 224, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/0.otbn_sec_cm/latest/run.log
UVM_FATAL @ 14842648 ps: (otbn_scoreboard.sv:495) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] A fatal alert arrived 400 cycles ago and we still don't think it should have done.
UVM_INFO @ 14842648 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.otbn_sec_cm.4023580453
Line 221, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/1.otbn_sec_cm/latest/run.log
UVM_FATAL @ 6207598 ps: (otbn_scoreboard.sv:495) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] A fatal alert arrived 400 cycles ago and we still don't think it should have done.
UVM_INFO @ 6207598 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_*/otbn_model_if.sv,137): Assertion NoModelErrs has failed
has 2 failures:
8.otbn_escalate.3509253618
Line 261, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/8.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,137): (time 2099192 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 2099192 ps: (otbn_model_if.sv:137) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 2099192 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
44.otbn_escalate.523247891
Line 261, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/44.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,137): (time 2928294 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 2928294 ps: (otbn_model_if.sv:137) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 2928294 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_single_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
has 2 failures:
26.otbn_single.983290183
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/26.otbn_single/latest/run.log
UVM_FATAL @ 13149502 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 13149502 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
43.otbn_single.3119393990
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/43.otbn_single/latest/run.log
UVM_FATAL @ 15470641 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 15470641 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_multi_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
has 1 failures:
0.otbn_multi.429079117
Line 277, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/0.otbn_multi/latest/run.log
UVM_FATAL @ 147016440 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_multi_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 147016440 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_zero_state_err_urnd_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
has 1 failures:
0.otbn_zero_state_err_urnd.3698969130
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/0.otbn_zero_state_err_urnd/latest/run.log
UVM_FATAL @ 11479396 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_zero_state_err_urnd_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 11479396 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed UVM_FATAL (otbn_base_vseq.sv:582) [otbn_urnd_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
has 1 failures:
1.otbn_urnd_err.680383675
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/1.otbn_urnd_err/latest/run.log
UVM_FATAL @ 8501378 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_urnd_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 8501378 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_stack_addr_integ_chk_vseq.sv:72) [otbn_stack_addr_integ_chk_vseq] timeout occurred!
has 1 failures:
1.otbn_stack_addr_integ_chk.3729822954
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/1.otbn_stack_addr_integ_chk/latest/run.log
UVM_FATAL @ 10011191422 ps: (otbn_stack_addr_integ_chk_vseq.sv:72) [uvm_test_top.env.virtual_sequencer.otbn_stack_addr_integ_chk_vseq] timeout occurred!
UVM_INFO @ 10011191422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_imem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
has 1 failures:
6.otbn_stress_all_with_rand_reset.3513331424
Line 280, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/6.otbn_stress_all_with_rand_reset/latest/run.log
UVM_FATAL @ 97114798 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_imem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 97114798 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_rf_bignum_intg_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
has 1 failures:
8.otbn_rf_bignum_intg_err.4085762051
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/8.otbn_rf_bignum_intg_err/latest/run.log
UVM_FATAL @ 19841146 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_rf_bignum_intg_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 19841146 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed UVM_FATAL (otbn_model_if.sv:77) [otbn_model_if] Check failed (u_model.otbn_model_step_crc(handle, item, crc_state) == *) Failed to update CRC
has 1 failures:
28.otbn_escalate.1342030529
Line 261, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/28.otbn_escalate/latest/run.log
UVM_FATAL @ 16303064 ps: (otbn_model_if.sv:77) [otbn_model_if] Check failed (u_model.otbn_model_step_crc(handle, item, crc_state) == 0) Failed to update CRC
UVM_INFO @ 16303064 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_escalate_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
has 1 failures:
31.otbn_escalate.704494331
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/31.otbn_escalate/latest/run.log
UVM_FATAL @ 11140411 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_escalate_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 11140411 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed UVM_FATAL (otbn_base_vseq.sv:582) [otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
has 1 failures:
86.otbn_single.2159419894
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/86.otbn_single/latest/run.log
UVM_FATAL @ 35840856 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 35840856 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---