PWM Simulation Results

Sunday March 17 2024 19:02:52 UTC

GitHub Revision: c187a82ee8

Branch: os_regression

Testplan

Simulator: XCELIUM

Build randomization enabled with --build-seed 28440605375541353837496064678278045899395893237469128852560697715229879921060

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke pwm_smoke 6.000s 513.244us 50 50 100.00
V1 csr_hw_reset pwm_csr_hw_reset 4.000s 51.762us 5 5 100.00
V1 csr_rw pwm_csr_rw 4.000s 68.556us 20 20 100.00
V1 csr_bit_bash pwm_csr_bit_bash 12.000s 7.707ms 5 5 100.00
V1 csr_aliasing pwm_csr_aliasing 6.000s 373.904us 5 5 100.00
V1 csr_mem_rw_with_rand_reset pwm_csr_mem_rw_with_rand_reset 5.000s 58.333us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr pwm_csr_rw 4.000s 68.556us 20 20 100.00
pwm_csr_aliasing 6.000s 373.904us 5 5 100.00
V1 TOTAL 105 105 100.00
V2 dutycycle pwm_rand_output 2.117m 21.004ms 49 50 98.00
V2 pulse pwm_rand_output 2.117m 21.004ms 49 50 98.00
V2 blink pwm_rand_output 2.117m 21.004ms 49 50 98.00
V2 heartbeat pwm_rand_output 2.117m 21.004ms 49 50 98.00
V2 resolution pwm_rand_output 2.117m 21.004ms 49 50 98.00
V2 multi_channel pwm_rand_output 2.117m 21.004ms 49 50 98.00
V2 polarity pwm_rand_output 2.117m 21.004ms 49 50 98.00
V2 phase pwm_rand_output 2.117m 21.004ms 49 50 98.00
V2 lowpower pwm_rand_output 2.117m 21.004ms 49 50 98.00
V2 perf pwm_perf 50.000s 11.669ms 50 50 100.00
V2 stress_all pwm_stress_all 4.917m 190.920ms 47 50 94.00
V2 alert_test pwm_alert_test 4.000s 16.024us 50 50 100.00
V2 intr_test pwm_intr_test 4.000s 50.278us 50 50 100.00
V2 tl_d_oob_addr_access pwm_tl_errors 9.000s 179.373us 20 20 100.00
V2 tl_d_illegal_access pwm_tl_errors 9.000s 179.373us 20 20 100.00
V2 tl_d_outstanding_access pwm_csr_hw_reset 4.000s 51.762us 5 5 100.00
pwm_csr_rw 4.000s 68.556us 20 20 100.00
pwm_csr_aliasing 6.000s 373.904us 5 5 100.00
pwm_same_csr_outstanding 5.000s 129.211us 20 20 100.00
V2 tl_d_partial_access pwm_csr_hw_reset 4.000s 51.762us 5 5 100.00
pwm_csr_rw 4.000s 68.556us 20 20 100.00
pwm_csr_aliasing 6.000s 373.904us 5 5 100.00
pwm_same_csr_outstanding 5.000s 129.211us 20 20 100.00
V2 TOTAL 286 290 98.62
V2S tl_intg_err pwm_tl_intg_err 6.000s 132.020us 20 20 100.00
pwm_sec_cm 3.000s 82.769us 5 5 100.00
V2S sec_cm_bus_integrity pwm_tl_intg_err 6.000s 132.020us 20 20 100.00
V2S TOTAL 25 25 100.00
V3 TOTAL 0 0 --
TOTAL 416 420 99.05

Testplan Progress

Items Total Written Passing Progress
V1 6 6 6 100.00
V2 7 7 5 71.43
V2S 2 2 2 100.00

Coverage Results

Coverage Dashboard

Score Block Branch Statement Expression Toggle Fsm Assertion CoverGroup
98.56 99.55 99.20 99.92 95.13 94.92 -- 100.00 99.01

Failure Buckets

Past Results