PWM Simulation Results

Friday August 16 2024 23:02:10 UTC

GitHub Revision: 76588857da

Branch: os_regression

Testplan

Simulator: XCELIUM

Build randomization enabled with --build-seed 107397868712693014844033025164446565408841343499325418676943424680076749785789

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke pwm_smoke 6.000s 2.033ms 50 50 100.00
V1 csr_hw_reset pwm_csr_hw_reset 2.000s 29.986us 5 5 100.00
V1 csr_rw pwm_csr_rw 4.000s 199.286us 20 20 100.00
V1 csr_bit_bash pwm_csr_bit_bash 9.000s 496.238us 5 5 100.00
V1 csr_aliasing pwm_csr_aliasing 4.000s 99.897us 5 5 100.00
V1 csr_mem_rw_with_rand_reset pwm_csr_mem_rw_with_rand_reset 5.000s 51.509us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr pwm_csr_rw 4.000s 199.286us 20 20 100.00
pwm_csr_aliasing 4.000s 99.897us 5 5 100.00
V1 TOTAL 105 105 100.00
V2 dutycycle pwm_rand_output 2.233m 21.877ms 50 50 100.00
V2 pulse pwm_rand_output 2.233m 21.877ms 50 50 100.00
V2 blink pwm_rand_output 2.233m 21.877ms 50 50 100.00
V2 heartbeat pwm_rand_output 2.233m 21.877ms 50 50 100.00
V2 resolution pwm_rand_output 2.233m 21.877ms 50 50 100.00
V2 multi_channel pwm_rand_output 2.233m 21.877ms 50 50 100.00
V2 polarity pwm_rand_output 2.233m 21.877ms 50 50 100.00
V2 phase pwm_rand_output 2.233m 21.877ms 50 50 100.00
V2 lowpower pwm_rand_output 2.233m 21.877ms 50 50 100.00
V2 perf pwm_perf 51.000s 10.609ms 50 50 100.00
V2 stress_all pwm_stress_all 6.367m 74.758ms 45 50 90.00
V2 alert_test pwm_alert_test 3.000s 21.198us 50 50 100.00
V2 intr_test pwm_intr_test 7.000s 12.423us 50 50 100.00
V2 tl_d_oob_addr_access pwm_tl_errors 6.000s 136.007us 20 20 100.00
V2 tl_d_illegal_access pwm_tl_errors 6.000s 136.007us 20 20 100.00
V2 tl_d_outstanding_access pwm_csr_hw_reset 2.000s 29.986us 5 5 100.00
pwm_csr_rw 4.000s 199.286us 20 20 100.00
pwm_csr_aliasing 4.000s 99.897us 5 5 100.00
pwm_same_csr_outstanding 4.000s 59.327us 20 20 100.00
V2 tl_d_partial_access pwm_csr_hw_reset 2.000s 29.986us 5 5 100.00
pwm_csr_rw 4.000s 199.286us 20 20 100.00
pwm_csr_aliasing 4.000s 99.897us 5 5 100.00
pwm_same_csr_outstanding 4.000s 59.327us 20 20 100.00
V2 TOTAL 285 290 98.28
V2S tl_intg_err pwm_tl_intg_err 6.000s 733.792us 20 20 100.00
pwm_sec_cm 3.000s 252.162us 5 5 100.00
V2S sec_cm_bus_integrity pwm_tl_intg_err 6.000s 733.792us 20 20 100.00
V2S TOTAL 25 25 100.00
V3 TOTAL 0 0 --
TOTAL 415 420 98.81

Testplan Progress

Items Total Written Passing Progress
V1 6 6 6 100.00
V2 7 7 6 85.71
V2S 2 2 2 100.00

Coverage Results

Coverage Dashboard

Score Block Branch Statement Expression Toggle Fsm Assertion CoverGroup
98.51 99.48 99.08 99.96 95.00 94.92 -- 100.00 99.01

Failure Buckets

Past Results