Unified Coverage Report :: Module :: sysrst_ctrl_intr

Module : sysrst_ctrl_intr

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00			0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_sysrst_ctrl_1.0/rtl/sysrst_ctrl_intr.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.u_sysrst_ctrl_intr	0.00	0.00	0.00			0.00

---

Module Instance : tb.dut.u_sysrst_ctrl_intr

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00			0.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00			0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
31.55	0.00	0.00	94.65				dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_match_sync	0.00	0.00	0.00			0.00
u_sysrst_ctrl_intr_o	0.00	0.00	0.00			0.00

---

Since this is the module's only instance, the coverage report is the same as for the module.

Line Coverage for Module : sysrst_ctrl_intr

	Line No.	Total	Covered	Percent
TOTAL		28	0	0.00
CONT_ASSIGN	41	1	0	0.00
CONT_ASSIGN	47	1	0	0.00
CONT_ASSIGN	49	1	0	0.00
ALWAYS	61	6	0	0.00
CONT_ASSIGN	74	1	0	0.00
ALWAYS	78	6	0	0.00
ALWAYS	105	6	0	0.00
CONT_ASSIGN	121	1	0	0.00
CONT_ASSIGN	127	1	0	0.00
CONT_ASSIGN	135	1	0	0.00
CONT_ASSIGN	163	1	0	0.00
CONT_ASSIGN	170	1	0	0.00
CONT_ASSIGN	174	1	0	0.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_sysrst_ctrl_1.0/rtl/sysrst_ctrl_intr.sv' or '../src/lowrisc_ip_sysrst_ctrl_1.0/rtl/sysrst_ctrl_intr.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
41	0	1
47	0	1
49	0	1
61	0	1
62	0	1
63	0	1
64	0	1
65	0	1
66	0	1
			==> MISSING_ELSE
74	0	1
78	0	1
79	0	1
80	0	1
81	0	1
82	0	1
83	0	1
			==> MISSING_ELSE
105	0	1
106	0	1
107	0	1
109	0	1
110	0	1
111	0	1
			==> MISSING_ELSE
121	0	1
127	0	1
135	0	1
163	0	1
170	0	1
174	0	1

---

Cond Coverage for Module : sysrst_ctrl_intr

	Total	Covered	Percent
Conditions	5	0	0.00
Logical	5	0	0.00
Non-Logical	0	0
Event	0	0

 LINE       74
 EXPRESSION ((aon_req_hold_q == '0) && ((|aon_staging_reqs_q)))
             -----------1----------    -----------2-----------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       74
 SUB-EXPRESSION (aon_req_hold_q == '0)
                -----------1----------

-1-	Status	Tests
0	Not Covered
1	Not Covered

---

Branch Coverage for Module : sysrst_ctrl_intr

	Line No.	Total	Covered	Percent
Branches		11	0	0.00
IF	61	4	0	0.00
IF	78	4	0	0.00
IF	105	3	0	0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_sysrst_ctrl_1.0/rtl/sysrst_ctrl_intr.sv' or '../src/lowrisc_ip_sysrst_ctrl_1.0/rtl/sysrst_ctrl_intr.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	61	if ((!rst_aon_ni))
-2-:	63	if (aon_ld_req)
-3-:	65	if ((|aon_reqs))

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	78	if ((!rst_aon_ni))
-2-:	80	if (aon_ld_req)
-3-:	82	if (aon_ack)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	105	if ((!rst_ni))
-2-:	110	if (dst_ack)

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered