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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.29 99.38 96.41 100.00 97.44 98.85 99.61 89.33


Total test records in report: 914
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T604 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.2782957926 Apr 21 01:07:24 PM PDT 24 Apr 21 01:07:31 PM PDT 24 5796981781 ps
T314 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.1560318461 Apr 21 01:07:46 PM PDT 24 Apr 21 01:08:09 PM PDT 24 35205735895 ps
T605 /workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.3305549172 Apr 21 01:07:50 PM PDT 24 Apr 21 01:07:52 PM PDT 24 4013947674 ps
T315 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.29033029 Apr 21 01:08:25 PM PDT 24 Apr 21 01:09:12 PM PDT 24 17312642647 ps
T606 /workspace/coverage/default/2.sysrst_ctrl_alert_test.2609197724 Apr 21 01:06:41 PM PDT 24 Apr 21 01:06:43 PM PDT 24 2024837857 ps
T607 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.3915227883 Apr 21 01:06:33 PM PDT 24 Apr 21 01:06:40 PM PDT 24 2416393800 ps
T608 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.1325997103 Apr 21 01:07:01 PM PDT 24 Apr 21 01:07:04 PM PDT 24 2630323552 ps
T609 /workspace/coverage/default/32.sysrst_ctrl_smoke.1922043133 Apr 21 01:07:53 PM PDT 24 Apr 21 01:07:55 PM PDT 24 2129348353 ps
T610 /workspace/coverage/default/15.sysrst_ctrl_smoke.1366778303 Apr 21 01:07:06 PM PDT 24 Apr 21 01:07:10 PM PDT 24 2116929211 ps
T611 /workspace/coverage/default/5.sysrst_ctrl_smoke.4086990962 Apr 21 01:06:48 PM PDT 24 Apr 21 01:06:51 PM PDT 24 2137943844 ps
T612 /workspace/coverage/default/13.sysrst_ctrl_smoke.3945183045 Apr 21 01:07:00 PM PDT 24 Apr 21 01:07:02 PM PDT 24 2125015521 ps
T379 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.2161291394 Apr 21 01:07:25 PM PDT 24 Apr 21 01:11:14 PM PDT 24 84834504363 ps
T613 /workspace/coverage/default/43.sysrst_ctrl_pin_override_test.2343674388 Apr 21 01:08:25 PM PDT 24 Apr 21 01:08:30 PM PDT 24 2513291929 ps
T614 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2007704316 Apr 21 01:08:35 PM PDT 24 Apr 21 01:08:38 PM PDT 24 3818457736 ps
T615 /workspace/coverage/default/27.sysrst_ctrl_pin_access_test.598441921 Apr 21 01:07:37 PM PDT 24 Apr 21 01:07:43 PM PDT 24 2029846204 ps
T616 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.3996354758 Apr 21 01:06:43 PM PDT 24 Apr 21 01:07:19 PM PDT 24 61399136541 ps
T617 /workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.119367879 Apr 21 01:08:27 PM PDT 24 Apr 21 01:08:30 PM PDT 24 2479515661 ps
T129 /workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.2764852924 Apr 21 01:07:41 PM PDT 24 Apr 21 01:07:43 PM PDT 24 3363737620 ps
T618 /workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1160534074 Apr 21 01:08:26 PM PDT 24 Apr 21 01:08:32 PM PDT 24 2095453320 ps
T619 /workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.3679784707 Apr 21 01:07:01 PM PDT 24 Apr 21 01:07:03 PM PDT 24 2481248772 ps
T620 /workspace/coverage/default/37.sysrst_ctrl_smoke.1967762446 Apr 21 01:08:08 PM PDT 24 Apr 21 01:08:11 PM PDT 24 2123233762 ps
T621 /workspace/coverage/default/20.sysrst_ctrl_pin_override_test.1219309574 Apr 21 01:07:18 PM PDT 24 Apr 21 01:07:26 PM PDT 24 2512501707 ps
T622 /workspace/coverage/default/47.sysrst_ctrl_pin_override_test.4071565423 Apr 21 01:08:35 PM PDT 24 Apr 21 01:08:39 PM PDT 24 2513765284 ps
T130 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.2025112746 Apr 21 01:07:05 PM PDT 24 Apr 21 01:08:12 PM PDT 24 28025727368 ps
T623 /workspace/coverage/default/5.sysrst_ctrl_edge_detect.2842999354 Apr 21 01:06:47 PM PDT 24 Apr 21 01:06:58 PM PDT 24 3754758312 ps
T624 /workspace/coverage/default/21.sysrst_ctrl_stress_all.4282353527 Apr 21 01:07:21 PM PDT 24 Apr 21 01:09:46 PM PDT 24 225207456782 ps
T85 /workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1199511753 Apr 21 01:08:40 PM PDT 24 Apr 21 01:08:58 PM PDT 24 38456197926 ps
T90 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.2916813554 Apr 21 01:07:29 PM PDT 24 Apr 21 01:11:38 PM PDT 24 93621969458 ps
T625 /workspace/coverage/default/49.sysrst_ctrl_pin_access_test.3882103477 Apr 21 01:08:38 PM PDT 24 Apr 21 01:08:42 PM PDT 24 2148693828 ps
T282 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.2204298519 Apr 21 01:07:59 PM PDT 24 Apr 21 01:11:22 PM PDT 24 78611123426 ps
T626 /workspace/coverage/default/10.sysrst_ctrl_alert_test.408921418 Apr 21 01:06:57 PM PDT 24 Apr 21 01:07:00 PM PDT 24 2028128165 ps
T368 /workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.489373616 Apr 21 01:08:31 PM PDT 24 Apr 21 01:10:23 PM PDT 24 81068726503 ps
T333 /workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.3190262254 Apr 21 01:08:33 PM PDT 24 Apr 21 01:11:58 PM PDT 24 81342916873 ps
T84 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.1753689811 Apr 21 01:06:38 PM PDT 24 Apr 21 01:07:03 PM PDT 24 37364756672 ps
T627 /workspace/coverage/default/13.sysrst_ctrl_pin_override_test.3594276099 Apr 21 01:06:58 PM PDT 24 Apr 21 01:07:02 PM PDT 24 2521282031 ps
T307 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.765274606 Apr 21 01:06:38 PM PDT 24 Apr 21 01:08:30 PM PDT 24 42012353295 ps
T201 /workspace/coverage/default/11.sysrst_ctrl_edge_detect.4188468276 Apr 21 01:06:56 PM PDT 24 Apr 21 01:07:01 PM PDT 24 3364409776 ps
T628 /workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2333405012 Apr 21 01:08:34 PM PDT 24 Apr 21 01:08:42 PM PDT 24 2615299485 ps
T629 /workspace/coverage/default/46.sysrst_ctrl_alert_test.2469014847 Apr 21 01:08:36 PM PDT 24 Apr 21 01:08:38 PM PDT 24 2035255484 ps
T630 /workspace/coverage/default/44.sysrst_ctrl_alert_test.3000269873 Apr 21 01:08:28 PM PDT 24 Apr 21 01:08:31 PM PDT 24 2025372287 ps
T631 /workspace/coverage/default/3.sysrst_ctrl_edge_detect.714475202 Apr 21 01:06:39 PM PDT 24 Apr 21 01:06:42 PM PDT 24 3379749152 ps
T632 /workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1708843477 Apr 21 01:08:33 PM PDT 24 Apr 21 01:08:38 PM PDT 24 8502404546 ps
T633 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.3941086202 Apr 21 01:07:32 PM PDT 24 Apr 21 01:07:36 PM PDT 24 2520432604 ps
T634 /workspace/coverage/default/33.sysrst_ctrl_smoke.1126666802 Apr 21 01:07:51 PM PDT 24 Apr 21 01:07:54 PM PDT 24 2115604339 ps
T635 /workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.1841772907 Apr 21 01:07:33 PM PDT 24 Apr 21 01:07:41 PM PDT 24 3075074157 ps
T636 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.535333917 Apr 21 01:08:00 PM PDT 24 Apr 21 01:08:05 PM PDT 24 2618352251 ps
T133 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.774315977 Apr 21 01:07:08 PM PDT 24 Apr 21 01:07:11 PM PDT 24 4020462404 ps
T637 /workspace/coverage/default/44.sysrst_ctrl_stress_all.509086764 Apr 21 01:08:34 PM PDT 24 Apr 21 01:08:58 PM PDT 24 8739307388 ps
T638 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.3546697820 Apr 21 01:08:05 PM PDT 24 Apr 21 01:08:07 PM PDT 24 2506900182 ps
T639 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.2067946962 Apr 21 01:08:37 PM PDT 24 Apr 21 01:08:45 PM PDT 24 2460790600 ps
T640 /workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.1268687702 Apr 21 01:07:57 PM PDT 24 Apr 21 01:08:01 PM PDT 24 7450068838 ps
T641 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.103990856 Apr 21 01:08:28 PM PDT 24 Apr 21 01:08:30 PM PDT 24 7406292422 ps
T642 /workspace/coverage/default/20.sysrst_ctrl_pin_access_test.3434401137 Apr 21 01:07:19 PM PDT 24 Apr 21 01:07:21 PM PDT 24 2076267140 ps
T643 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.3226322170 Apr 21 01:06:46 PM PDT 24 Apr 21 01:06:50 PM PDT 24 4031241660 ps
T644 /workspace/coverage/default/18.sysrst_ctrl_stress_all.312776484 Apr 21 01:07:14 PM PDT 24 Apr 21 01:07:30 PM PDT 24 11786719791 ps
T108 /workspace/coverage/default/28.sysrst_ctrl_stress_all.669785062 Apr 21 01:07:40 PM PDT 24 Apr 21 01:10:13 PM PDT 24 57889224199 ps
T645 /workspace/coverage/default/19.sysrst_ctrl_smoke.2131551350 Apr 21 01:07:16 PM PDT 24 Apr 21 01:07:18 PM PDT 24 2142499357 ps
T202 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.1875837947 Apr 21 01:06:56 PM PDT 24 Apr 21 01:07:03 PM PDT 24 4228189997 ps
T646 /workspace/coverage/default/5.sysrst_ctrl_alert_test.3684942968 Apr 21 01:06:48 PM PDT 24 Apr 21 01:06:55 PM PDT 24 2010516088 ps
T647 /workspace/coverage/default/22.sysrst_ctrl_alert_test.256734582 Apr 21 01:07:24 PM PDT 24 Apr 21 01:07:26 PM PDT 24 2040315159 ps
T648 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.2253256005 Apr 21 01:06:45 PM PDT 24 Apr 21 01:06:49 PM PDT 24 2516227295 ps
T649 /workspace/coverage/default/14.sysrst_ctrl_alert_test.4013597432 Apr 21 01:07:03 PM PDT 24 Apr 21 01:07:09 PM PDT 24 2012769220 ps
T650 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.272913102 Apr 21 01:06:56 PM PDT 24 Apr 21 01:06:59 PM PDT 24 2525237536 ps
T651 /workspace/coverage/default/0.sysrst_ctrl_pin_access_test.3448141156 Apr 21 01:06:28 PM PDT 24 Apr 21 01:06:35 PM PDT 24 2181011997 ps
T652 /workspace/coverage/default/46.sysrst_ctrl_stress_all.1360968615 Apr 21 01:08:29 PM PDT 24 Apr 21 01:08:47 PM PDT 24 9630644982 ps
T653 /workspace/coverage/default/3.sysrst_ctrl_pin_override_test.2248472663 Apr 21 01:06:42 PM PDT 24 Apr 21 01:06:46 PM PDT 24 2517256495 ps
T654 /workspace/coverage/default/27.sysrst_ctrl_smoke.3301254307 Apr 21 01:07:38 PM PDT 24 Apr 21 01:07:42 PM PDT 24 2119543019 ps
T655 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.2233615728 Apr 21 01:07:48 PM PDT 24 Apr 21 01:07:54 PM PDT 24 3896672244 ps
T656 /workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.3230163990 Apr 21 01:07:51 PM PDT 24 Apr 21 01:10:56 PM PDT 24 1012302651418 ps
T657 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3433872274 Apr 21 01:08:26 PM PDT 24 Apr 21 01:08:34 PM PDT 24 2512727576 ps
T658 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.2388070397 Apr 21 01:08:34 PM PDT 24 Apr 21 01:08:42 PM PDT 24 2756634785 ps
T659 /workspace/coverage/default/2.sysrst_ctrl_edge_detect.1827963273 Apr 21 01:06:35 PM PDT 24 Apr 21 01:06:38 PM PDT 24 2751424973 ps
T660 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.2766728937 Apr 21 01:08:23 PM PDT 24 Apr 21 01:08:32 PM PDT 24 2455202686 ps
T661 /workspace/coverage/default/15.sysrst_ctrl_pin_override_test.3240222465 Apr 21 01:07:05 PM PDT 24 Apr 21 01:07:13 PM PDT 24 2511451000 ps
T198 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.3216774233 Apr 21 01:07:16 PM PDT 24 Apr 21 01:09:54 PM PDT 24 72006945334 ps
T662 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.3079184662 Apr 21 01:07:39 PM PDT 24 Apr 21 01:08:21 PM PDT 24 29980080209 ps
T663 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.2075264653 Apr 21 01:06:34 PM PDT 24 Apr 21 01:06:45 PM PDT 24 3324800098 ps
T664 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.1686369395 Apr 21 01:07:43 PM PDT 24 Apr 21 01:07:45 PM PDT 24 3161264807 ps
T380 /workspace/coverage/default/4.sysrst_ctrl_combo_detect.1751298337 Apr 21 01:06:45 PM PDT 24 Apr 21 01:07:22 PM PDT 24 54048405818 ps
T665 /workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.4114694906 Apr 21 01:07:13 PM PDT 24 Apr 21 01:07:19 PM PDT 24 3767758123 ps
T666 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.496340663 Apr 21 01:06:37 PM PDT 24 Apr 21 01:06:42 PM PDT 24 2619070132 ps
T667 /workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.1341527340 Apr 21 01:08:01 PM PDT 24 Apr 21 01:08:04 PM PDT 24 3047078506 ps
T668 /workspace/coverage/default/0.sysrst_ctrl_stress_all.2628981433 Apr 21 01:06:35 PM PDT 24 Apr 21 01:19:16 PM PDT 24 324335298251 ps
T669 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.1882903598 Apr 21 01:06:46 PM PDT 24 Apr 21 01:06:56 PM PDT 24 29126061458 ps
T670 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.696934882 Apr 21 01:08:55 PM PDT 24 Apr 21 01:11:01 PM PDT 24 47411163591 ps
T671 /workspace/coverage/default/8.sysrst_ctrl_smoke.1741826119 Apr 21 01:06:49 PM PDT 24 Apr 21 01:06:51 PM PDT 24 2151436455 ps
T672 /workspace/coverage/default/42.sysrst_ctrl_alert_test.316401206 Apr 21 01:08:26 PM PDT 24 Apr 21 01:08:29 PM PDT 24 2038984761 ps
T673 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.1130203196 Apr 21 01:07:34 PM PDT 24 Apr 21 01:07:42 PM PDT 24 2451565060 ps
T674 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.368543301 Apr 21 01:07:48 PM PDT 24 Apr 21 01:07:52 PM PDT 24 3407361411 ps
T675 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.3134221452 Apr 21 01:08:11 PM PDT 24 Apr 21 01:08:20 PM PDT 24 3321990016 ps
T676 /workspace/coverage/default/9.sysrst_ctrl_alert_test.131995443 Apr 21 01:07:01 PM PDT 24 Apr 21 01:07:03 PM PDT 24 2059952436 ps
T677 /workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.2526258550 Apr 21 01:07:36 PM PDT 24 Apr 21 01:07:44 PM PDT 24 2448507530 ps
T678 /workspace/coverage/default/29.sysrst_ctrl_stress_all.2795002572 Apr 21 01:07:43 PM PDT 24 Apr 21 01:07:50 PM PDT 24 9155775304 ps
T143 /workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.3337485483 Apr 21 01:08:35 PM PDT 24 Apr 21 01:08:38 PM PDT 24 7022711278 ps
T679 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.4030889390 Apr 21 01:07:53 PM PDT 24 Apr 21 01:07:57 PM PDT 24 2369455394 ps
T680 /workspace/coverage/default/49.sysrst_ctrl_stress_all.1484677955 Apr 21 01:08:48 PM PDT 24 Apr 21 01:09:30 PM PDT 24 16991401316 ps
T681 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1414388069 Apr 21 01:08:46 PM PDT 24 Apr 21 01:09:42 PM PDT 24 44704945812 ps
T238 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.3628045284 Apr 21 01:06:51 PM PDT 24 Apr 21 01:07:58 PM PDT 24 52455900571 ps
T682 /workspace/coverage/default/43.sysrst_ctrl_stress_all.3757816078 Apr 21 01:08:31 PM PDT 24 Apr 21 01:09:02 PM PDT 24 11129434877 ps
T683 /workspace/coverage/default/11.sysrst_ctrl_pin_access_test.3102572842 Apr 21 01:06:57 PM PDT 24 Apr 21 01:06:59 PM PDT 24 2151948592 ps
T684 /workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.2107605878 Apr 21 01:07:18 PM PDT 24 Apr 21 01:07:22 PM PDT 24 2451959857 ps
T685 /workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.1064976571 Apr 21 01:08:24 PM PDT 24 Apr 21 01:08:26 PM PDT 24 2845123458 ps
T366 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.644927781 Apr 21 01:06:39 PM PDT 24 Apr 21 01:07:18 PM PDT 24 66965735714 ps
T134 /workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.3469097870 Apr 21 01:07:35 PM PDT 24 Apr 21 01:07:39 PM PDT 24 6328224460 ps
T145 /workspace/coverage/default/6.sysrst_ctrl_stress_all.2754946914 Apr 21 01:06:48 PM PDT 24 Apr 21 01:06:59 PM PDT 24 24384437027 ps
T686 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.2603026357 Apr 21 01:07:30 PM PDT 24 Apr 21 01:07:34 PM PDT 24 3968931305 ps
T687 /workspace/coverage/default/23.sysrst_ctrl_edge_detect.1810813299 Apr 21 01:07:29 PM PDT 24 Apr 21 01:07:34 PM PDT 24 2480733161 ps
T688 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2692377093 Apr 21 01:06:54 PM PDT 24 Apr 21 01:06:55 PM PDT 24 3042429054 ps
T689 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1704808396 Apr 21 01:06:48 PM PDT 24 Apr 21 01:06:50 PM PDT 24 2647077742 ps
T690 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.261564355 Apr 21 01:07:04 PM PDT 24 Apr 21 01:13:44 PM PDT 24 155156613445 ps
T691 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.1603775197 Apr 21 01:07:05 PM PDT 24 Apr 21 01:13:44 PM PDT 24 148163033282 ps
T692 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1403398317 Apr 21 01:08:31 PM PDT 24 Apr 21 01:08:39 PM PDT 24 2610597896 ps
T390 /workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1886885366 Apr 21 01:08:54 PM PDT 24 Apr 21 01:12:22 PM PDT 24 167990961025 ps
T693 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.3765001485 Apr 21 01:07:34 PM PDT 24 Apr 21 01:07:59 PM PDT 24 34915597856 ps
T694 /workspace/coverage/default/40.sysrst_ctrl_pin_override_test.1052979044 Apr 21 01:08:13 PM PDT 24 Apr 21 01:08:21 PM PDT 24 2509811734 ps
T695 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.190503664 Apr 21 01:07:48 PM PDT 24 Apr 21 01:09:12 PM PDT 24 88054927621 ps
T696 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.223324717 Apr 21 01:07:30 PM PDT 24 Apr 21 01:08:46 PM PDT 24 132994048219 ps
T355 /workspace/coverage/default/30.sysrst_ctrl_stress_all.1673037499 Apr 21 01:07:54 PM PDT 24 Apr 21 01:12:09 PM PDT 24 103698241792 ps
T697 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.150159568 Apr 21 01:08:25 PM PDT 24 Apr 21 01:08:35 PM PDT 24 3679905620 ps
T698 /workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.1184265190 Apr 21 01:08:05 PM PDT 24 Apr 21 01:08:08 PM PDT 24 8116271541 ps
T699 /workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.3106457545 Apr 21 01:07:55 PM PDT 24 Apr 21 01:07:58 PM PDT 24 2470683998 ps
T700 /workspace/coverage/default/48.sysrst_ctrl_alert_test.914633555 Apr 21 01:08:39 PM PDT 24 Apr 21 01:08:41 PM PDT 24 2044102112 ps
T701 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.4070141480 Apr 21 01:06:58 PM PDT 24 Apr 21 01:07:01 PM PDT 24 2627519102 ps
T702 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.3962196501 Apr 21 01:08:26 PM PDT 24 Apr 21 01:08:31 PM PDT 24 2474628550 ps
T703 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.1569492477 Apr 21 01:08:51 PM PDT 24 Apr 21 01:10:32 PM PDT 24 128464380423 ps
T704 /workspace/coverage/default/35.sysrst_ctrl_smoke.1810218056 Apr 21 01:08:00 PM PDT 24 Apr 21 01:08:01 PM PDT 24 2141639832 ps
T705 /workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2575015645 Apr 21 01:08:54 PM PDT 24 Apr 21 01:10:33 PM PDT 24 42769337897 ps
T706 /workspace/coverage/default/2.sysrst_ctrl_smoke.3879125956 Apr 21 01:06:38 PM PDT 24 Apr 21 01:06:40 PM PDT 24 2132782522 ps
T707 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.4052322721 Apr 21 01:07:37 PM PDT 24 Apr 21 01:07:40 PM PDT 24 2524055045 ps
T708 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.4210539050 Apr 21 01:07:05 PM PDT 24 Apr 21 01:07:10 PM PDT 24 3014299432 ps
T709 /workspace/coverage/default/25.sysrst_ctrl_pin_override_test.2515606832 Apr 21 01:07:31 PM PDT 24 Apr 21 01:07:33 PM PDT 24 2684790173 ps
T710 /workspace/coverage/default/22.sysrst_ctrl_smoke.1133695342 Apr 21 01:07:26 PM PDT 24 Apr 21 01:07:33 PM PDT 24 2114127982 ps
T711 /workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.2960760691 Apr 21 01:07:56 PM PDT 24 Apr 21 01:08:06 PM PDT 24 3285126864 ps
T712 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.3801023725 Apr 21 01:08:55 PM PDT 24 Apr 21 01:10:30 PM PDT 24 163453085380 ps
T713 /workspace/coverage/default/7.sysrst_ctrl_stress_all.733273305 Apr 21 01:06:48 PM PDT 24 Apr 21 01:07:12 PM PDT 24 8425264154 ps
T714 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3738501031 Apr 21 01:07:01 PM PDT 24 Apr 21 01:07:22 PM PDT 24 29600335797 ps
T715 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1200577193 Apr 21 01:08:26 PM PDT 24 Apr 21 01:08:32 PM PDT 24 2105294375 ps
T716 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1414867529 Apr 21 01:06:32 PM PDT 24 Apr 21 01:06:36 PM PDT 24 2535706575 ps
T717 /workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.2755205721 Apr 21 01:07:10 PM PDT 24 Apr 21 01:07:20 PM PDT 24 3324502611 ps
T718 /workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.4208390013 Apr 21 01:07:50 PM PDT 24 Apr 21 01:07:55 PM PDT 24 2480484291 ps
T131 /workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.3828876064 Apr 21 01:06:44 PM PDT 24 Apr 21 01:06:48 PM PDT 24 2922227966 ps
T719 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.4177754524 Apr 21 01:06:45 PM PDT 24 Apr 21 01:07:59 PM PDT 24 41008814246 ps
T720 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.4122982003 Apr 21 01:07:43 PM PDT 24 Apr 21 01:07:51 PM PDT 24 3710994883 ps
T721 /workspace/coverage/default/3.sysrst_ctrl_alert_test.3922907947 Apr 21 01:06:39 PM PDT 24 Apr 21 01:06:41 PM PDT 24 2038930115 ps
T722 /workspace/coverage/default/1.sysrst_ctrl_smoke.3553831630 Apr 21 01:06:34 PM PDT 24 Apr 21 01:06:37 PM PDT 24 2129777001 ps
T723 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.3629479874 Apr 21 01:07:46 PM PDT 24 Apr 21 01:10:38 PM PDT 24 63448249780 ps
T109 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.1205787563 Apr 21 01:07:17 PM PDT 24 Apr 21 01:09:14 PM PDT 24 117411146664 ps
T724 /workspace/coverage/default/25.sysrst_ctrl_alert_test.4061135937 Apr 21 01:07:31 PM PDT 24 Apr 21 01:07:37 PM PDT 24 2011622901 ps
T725 /workspace/coverage/default/26.sysrst_ctrl_alert_test.3930728492 Apr 21 01:07:34 PM PDT 24 Apr 21 01:07:39 PM PDT 24 2015278683 ps
T383 /workspace/coverage/default/10.sysrst_ctrl_stress_all.4158290778 Apr 21 01:06:55 PM PDT 24 Apr 21 01:09:24 PM PDT 24 222150728825 ps
T164 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2392163902 Apr 21 01:06:54 PM PDT 24 Apr 21 01:07:35 PM PDT 24 16031807668 ps
T169 /workspace/coverage/default/43.sysrst_ctrl_alert_test.3938204385 Apr 21 01:08:32 PM PDT 24 Apr 21 01:08:35 PM PDT 24 2023900120 ps
T170 /workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.1087715673 Apr 21 01:07:02 PM PDT 24 Apr 21 01:07:06 PM PDT 24 3070252719 ps
T171 /workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2335234729 Apr 21 01:08:25 PM PDT 24 Apr 21 01:08:27 PM PDT 24 2203967300 ps
T172 /workspace/coverage/default/42.sysrst_ctrl_smoke.606776360 Apr 21 01:08:28 PM PDT 24 Apr 21 01:08:31 PM PDT 24 2117611328 ps
T173 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.4269362377 Apr 21 01:07:49 PM PDT 24 Apr 21 01:07:54 PM PDT 24 2615054086 ps
T174 /workspace/coverage/default/1.sysrst_ctrl_sec_cm.829412773 Apr 21 01:06:37 PM PDT 24 Apr 21 01:07:33 PM PDT 24 22011203913 ps
T175 /workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.706395010 Apr 21 01:06:55 PM PDT 24 Apr 21 01:07:03 PM PDT 24 7704892441 ps
T176 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.477980391 Apr 21 01:08:53 PM PDT 24 Apr 21 01:09:03 PM PDT 24 49550272500 ps
T177 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2149417941 Apr 21 01:08:33 PM PDT 24 Apr 21 01:10:15 PM PDT 24 410868563926 ps
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T727 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.1676637827 Apr 21 01:07:32 PM PDT 24 Apr 21 01:07:35 PM PDT 24 2640191282 ps
T728 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.1611098813 Apr 21 01:07:22 PM PDT 24 Apr 21 01:07:29 PM PDT 24 2141314898 ps
T165 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.1684175476 Apr 21 01:08:04 PM PDT 24 Apr 21 01:09:17 PM PDT 24 95206117610 ps
T729 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2932900253 Apr 21 01:08:56 PM PDT 24 Apr 21 01:09:58 PM PDT 24 22583366344 ps
T730 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2004956722 Apr 21 01:08:38 PM PDT 24 Apr 21 01:08:43 PM PDT 24 3193410706 ps
T110 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.1158125814 Apr 21 01:07:23 PM PDT 24 Apr 21 01:07:26 PM PDT 24 3483545717 ps
T731 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3977471454 Apr 21 01:06:47 PM PDT 24 Apr 21 01:06:51 PM PDT 24 3435146673 ps
T732 /workspace/coverage/default/34.sysrst_ctrl_pin_access_test.3281702132 Apr 21 01:07:56 PM PDT 24 Apr 21 01:07:57 PM PDT 24 2161474343 ps
T203 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.2203524224 Apr 21 01:07:30 PM PDT 24 Apr 21 01:07:52 PM PDT 24 61803408428 ps
T166 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.2121376309 Apr 21 01:07:09 PM PDT 24 Apr 21 01:07:17 PM PDT 24 3772818697 ps
T733 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3800206746 Apr 21 01:08:53 PM PDT 24 Apr 21 01:09:20 PM PDT 24 43866554509 ps
T734 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2581935772 Apr 21 01:08:47 PM PDT 24 Apr 21 01:09:05 PM PDT 24 27114832077 ps
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T736 /workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.1250415710 Apr 21 01:08:48 PM PDT 24 Apr 21 01:09:32 PM PDT 24 82434692925 ps
T737 /workspace/coverage/default/14.sysrst_ctrl_stress_all.4184010371 Apr 21 01:07:05 PM PDT 24 Apr 21 01:07:10 PM PDT 24 8712475440 ps
T738 /workspace/coverage/default/13.sysrst_ctrl_alert_test.1825454432 Apr 21 01:07:03 PM PDT 24 Apr 21 01:07:05 PM PDT 24 2057719878 ps
T739 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.2448127222 Apr 21 01:08:27 PM PDT 24 Apr 21 01:08:35 PM PDT 24 2608667510 ps
T740 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.1889002016 Apr 21 01:07:21 PM PDT 24 Apr 21 01:07:55 PM PDT 24 26333791543 ps
T741 /workspace/coverage/default/12.sysrst_ctrl_pin_access_test.157328680 Apr 21 01:06:58 PM PDT 24 Apr 21 01:07:02 PM PDT 24 2028451379 ps
T742 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.3463009579 Apr 21 01:06:37 PM PDT 24 Apr 21 01:06:38 PM PDT 24 3048104592 ps
T743 /workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.1314670471 Apr 21 01:07:17 PM PDT 24 Apr 21 01:07:20 PM PDT 24 2628602377 ps
T744 /workspace/coverage/default/13.sysrst_ctrl_pin_access_test.1045243538 Apr 21 01:07:00 PM PDT 24 Apr 21 01:07:02 PM PDT 24 2121746293 ps
T144 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.3637831394 Apr 21 01:07:18 PM PDT 24 Apr 21 01:07:22 PM PDT 24 4399073739 ps
T241 /workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.899694196 Apr 21 01:08:25 PM PDT 24 Apr 21 01:08:29 PM PDT 24 4854357432 ps
T242 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3525409248 Apr 21 01:06:46 PM PDT 24 Apr 21 01:06:55 PM PDT 24 2610849810 ps
T243 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.367226814 Apr 21 01:06:48 PM PDT 24 Apr 21 01:07:52 PM PDT 24 75005125035 ps
T244 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.1127788926 Apr 21 01:06:54 PM PDT 24 Apr 21 01:06:57 PM PDT 24 3469832078 ps
T245 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.3295949795 Apr 21 01:06:30 PM PDT 24 Apr 21 01:06:34 PM PDT 24 2522035184 ps
T246 /workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3882607455 Apr 21 01:06:50 PM PDT 24 Apr 21 01:06:53 PM PDT 24 2526185556 ps
T247 /workspace/coverage/default/33.sysrst_ctrl_edge_detect.2716891275 Apr 21 01:07:56 PM PDT 24 Apr 21 01:07:59 PM PDT 24 3093122512 ps
T248 /workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.2733328451 Apr 21 01:08:52 PM PDT 24 Apr 21 01:11:29 PM PDT 24 65717822149 ps
T249 /workspace/coverage/default/26.sysrst_ctrl_combo_detect.1849443332 Apr 21 01:07:36 PM PDT 24 Apr 21 01:08:38 PM PDT 24 97435768790 ps
T745 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.2358696539 Apr 21 01:07:49 PM PDT 24 Apr 21 01:12:48 PM PDT 24 124133869575 ps
T746 /workspace/coverage/default/30.sysrst_ctrl_alert_test.1512919028 Apr 21 01:07:46 PM PDT 24 Apr 21 01:07:48 PM PDT 24 2042984780 ps
T747 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.1426925570 Apr 21 01:07:06 PM PDT 24 Apr 21 01:07:10 PM PDT 24 4310894787 ps
T748 /workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.640632978 Apr 21 01:07:19 PM PDT 24 Apr 21 01:07:26 PM PDT 24 2475291947 ps
T749 /workspace/coverage/default/7.sysrst_ctrl_combo_detect.1811209463 Apr 21 01:06:50 PM PDT 24 Apr 21 01:08:02 PM PDT 24 105264690492 ps
T750 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.166476631 Apr 21 01:08:00 PM PDT 24 Apr 21 01:10:17 PM PDT 24 52573984508 ps
T751 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.1795689797 Apr 21 01:06:38 PM PDT 24 Apr 21 01:06:41 PM PDT 24 2632127977 ps
T752 /workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.2921334155 Apr 21 01:06:31 PM PDT 24 Apr 21 01:06:33 PM PDT 24 2722644528 ps
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T754 /workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.685166570 Apr 21 01:06:59 PM PDT 24 Apr 21 01:07:04 PM PDT 24 2917250620 ps
T135 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.306052623 Apr 21 01:07:28 PM PDT 24 Apr 21 01:08:55 PM PDT 24 936525930609 ps
T755 /workspace/coverage/default/37.sysrst_ctrl_edge_detect.1924823788 Apr 21 01:08:05 PM PDT 24 Apr 21 01:08:09 PM PDT 24 2727751568 ps
T756 /workspace/coverage/default/18.sysrst_ctrl_smoke.2758991348 Apr 21 01:07:12 PM PDT 24 Apr 21 01:07:18 PM PDT 24 2115440253 ps
T757 /workspace/coverage/default/34.sysrst_ctrl_stress_all.3752259742 Apr 21 01:07:56 PM PDT 24 Apr 21 01:08:08 PM PDT 24 15759234487 ps
T758 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.2767509508 Apr 21 01:08:24 PM PDT 24 Apr 21 01:08:31 PM PDT 24 2836224310 ps
T759 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.385167816 Apr 21 01:07:32 PM PDT 24 Apr 21 01:07:49 PM PDT 24 52719631121 ps
T760 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.1761484218 Apr 21 01:07:09 PM PDT 24 Apr 21 01:07:12 PM PDT 24 3281452258 ps
T370 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3926757749 Apr 21 01:08:46 PM PDT 24 Apr 21 01:12:57 PM PDT 24 93526297084 ps
T761 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.246008191 Apr 21 01:07:28 PM PDT 24 Apr 21 01:07:35 PM PDT 24 2454334031 ps
T762 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.2591110369 Apr 21 01:06:55 PM PDT 24 Apr 21 01:08:21 PM PDT 24 115167871256 ps
T763 /workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2035031822 Apr 21 01:06:48 PM PDT 24 Apr 21 01:06:52 PM PDT 24 2537927093 ps
T764 /workspace/coverage/default/29.sysrst_ctrl_alert_test.3706887964 Apr 21 01:07:44 PM PDT 24 Apr 21 01:07:48 PM PDT 24 2023002989 ps
T387 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.4254872084 Apr 21 01:08:50 PM PDT 24 Apr 21 01:11:01 PM PDT 24 119382764127 ps
T765 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.970423288 Apr 21 01:07:34 PM PDT 24 Apr 21 01:08:03 PM PDT 24 38910146361 ps
T384 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.415634384 Apr 21 01:07:18 PM PDT 24 Apr 21 01:09:27 PM PDT 24 79920906659 ps
T766 /workspace/coverage/default/44.sysrst_ctrl_pin_override_test.213239398 Apr 21 01:08:27 PM PDT 24 Apr 21 01:08:32 PM PDT 24 2520799148 ps
T767 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.495651961 Apr 21 01:07:30 PM PDT 24 Apr 21 01:07:35 PM PDT 24 2619349093 ps
T768 /workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.278795802 Apr 21 01:07:21 PM PDT 24 Apr 21 01:07:24 PM PDT 24 4355733618 ps
T769 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.3169481158 Apr 21 01:06:38 PM PDT 24 Apr 21 01:06:45 PM PDT 24 2512748876 ps
T770 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.1134299964 Apr 21 01:06:54 PM PDT 24 Apr 21 01:07:02 PM PDT 24 3279160240 ps
T771 /workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.1615519196 Apr 21 01:06:40 PM PDT 24 Apr 21 01:06:48 PM PDT 24 2464525669 ps
T772 /workspace/coverage/default/6.sysrst_ctrl_combo_detect.1059913619 Apr 21 01:06:46 PM PDT 24 Apr 21 01:14:27 PM PDT 24 185541108592 ps
T377 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1910771396 Apr 21 01:06:47 PM PDT 24 Apr 21 01:07:55 PM PDT 24 101181740867 ps
T773 /workspace/coverage/default/32.sysrst_ctrl_stress_all.3558575955 Apr 21 01:07:51 PM PDT 24 Apr 21 01:08:00 PM PDT 24 12235041793 ps
T774 /workspace/coverage/default/17.sysrst_ctrl_pin_access_test.337731987 Apr 21 01:07:12 PM PDT 24 Apr 21 01:07:18 PM PDT 24 2147917768 ps
T359 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.4061195738 Apr 21 01:08:47 PM PDT 24 Apr 21 01:10:13 PM PDT 24 119385377687 ps
T775 /workspace/coverage/default/22.sysrst_ctrl_pin_override_test.3386496709 Apr 21 01:07:24 PM PDT 24 Apr 21 01:07:32 PM PDT 24 2507276239 ps
T776 /workspace/coverage/default/5.sysrst_ctrl_stress_all.2297357932 Apr 21 01:06:47 PM PDT 24 Apr 21 01:08:13 PM PDT 24 132908263103 ps
T227 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.336153724 Apr 21 01:07:01 PM PDT 24 Apr 21 01:08:09 PM PDT 24 55711001963 ps
T777 /workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.1193918597 Apr 21 01:07:34 PM PDT 24 Apr 21 01:07:43 PM PDT 24 9402450269 ps
T778 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.2835319672 Apr 21 01:07:19 PM PDT 24 Apr 21 01:07:24 PM PDT 24 4072393850 ps
T779 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.411338216 Apr 21 01:08:06 PM PDT 24 Apr 21 01:08:07 PM PDT 24 2582076140 ps
T780 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.4007924836 Apr 21 01:07:50 PM PDT 24 Apr 21 01:08:07 PM PDT 24 28119201902 ps
T781 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.530148807 Apr 21 01:08:14 PM PDT 24 Apr 21 01:08:20 PM PDT 24 2020448895 ps
T782 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.126480126 Apr 21 01:07:05 PM PDT 24 Apr 21 01:07:12 PM PDT 24 2614844785 ps
T783 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.3433462090 Apr 21 01:06:40 PM PDT 24 Apr 21 01:06:48 PM PDT 24 2209337676 ps
T784 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.2970730157 Apr 21 01:07:31 PM PDT 24 Apr 21 01:07:35 PM PDT 24 4421074016 ps
T785 /workspace/coverage/default/43.sysrst_ctrl_smoke.193527722 Apr 21 01:08:26 PM PDT 24 Apr 21 01:08:33 PM PDT 24 2107813775 ps
T786 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.1084875823 Apr 21 01:07:14 PM PDT 24 Apr 21 01:07:24 PM PDT 24 4053003242 ps
T787 /workspace/coverage/default/40.sysrst_ctrl_smoke.3537671361 Apr 21 01:08:11 PM PDT 24 Apr 21 01:08:13 PM PDT 24 2130213027 ps
T788 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.220815230 Apr 21 01:07:34 PM PDT 24 Apr 21 01:08:11 PM PDT 24 60494521049 ps
T789 /workspace/coverage/default/8.sysrst_ctrl_alert_test.2656973225 Apr 21 01:06:54 PM PDT 24 Apr 21 01:06:56 PM PDT 24 2044745042 ps
T790 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.759063628 Apr 21 01:08:09 PM PDT 24 Apr 21 01:08:13 PM PDT 24 2618581880 ps
T386 /workspace/coverage/default/13.sysrst_ctrl_stress_all.3694485397 Apr 21 01:07:01 PM PDT 24 Apr 21 01:12:33 PM PDT 24 132109886232 ps
T791 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.2394874035 Apr 21 01:07:12 PM PDT 24 Apr 21 01:07:36 PM PDT 24 35212009456 ps
T792 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.912956464 Apr 21 01:07:38 PM PDT 24 Apr 21 01:07:43 PM PDT 24 3588392113 ps
T24 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.2943316983 Apr 21 12:44:54 PM PDT 24 Apr 21 12:45:01 PM PDT 24 2035352891 ps
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