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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.41 98.21 96.12 97.44 94.92 98.38 98.21 98.55


Total test records in report: 3901
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T156 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_nak_trans.1175632867 Sep 24 08:58:16 AM UTC 24 Sep 24 08:58:19 AM UTC 24 198877521 ps
T667 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_resume.1695333687 Sep 24 08:57:16 AM UTC 24 Sep 24 08:58:19 AM UTC 24 26376513835 ps
T668 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_out_stall.47747342 Sep 24 08:58:18 AM UTC 24 Sep 24 08:58:21 AM UTC 24 196509557 ps
T186 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_pending_in_trans.2764832711 Sep 24 08:58:20 AM UTC 24 Sep 24 08:58:22 AM UTC 24 153459219 ps
T669 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_pinflip.4074184828 Sep 24 08:58:20 AM UTC 24 Sep 24 08:58:22 AM UTC 24 237138629 ps
T438 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_out_trans_nak.996667736 Sep 24 08:58:20 AM UTC 24 Sep 24 08:58:22 AM UTC 24 197418095 ps
T297 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_freq_phase.1223159532 Sep 24 08:54:45 AM UTC 24 Sep 24 08:58:25 AM UTC 24 100162846494 ps
T670 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_usb_ref_disable.2558983278 Sep 24 08:58:22 AM UTC 24 Sep 24 08:58:25 AM UTC 24 148811823 ps
T671 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_rand_bus_type.1622582248 Sep 24 08:58:22 AM UTC 24 Sep 24 08:58:25 AM UTC 24 221165859 ps
T44 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_phy_pins_sense.1751121544 Sep 24 08:58:23 AM UTC 24 Sep 24 08:58:25 AM UTC 24 39184433 ps
T672 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_received.790014330 Sep 24 08:58:23 AM UTC 24 Sep 24 08:58:26 AM UTC 24 177499325 ps
T673 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_sent.1539476735 Sep 24 08:58:26 AM UTC 24 Sep 24 08:58:28 AM UTC 24 240745513 ps
T674 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_out_transaction.3039871947 Sep 24 08:58:26 AM UTC 24 Sep 24 08:58:29 AM UTC 24 188919391 ps
T675 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_in_transaction.2481320161 Sep 24 08:58:26 AM UTC 24 Sep 24 08:58:29 AM UTC 24 239860868 ps
T676 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_rx_crc_err.450232941 Sep 24 08:58:30 AM UTC 24 Sep 24 08:58:32 AM UTC 24 141567353 ps
T298 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk.2105761662 Sep 24 08:54:05 AM UTC 24 Sep 24 08:58:35 AM UTC 24 109110402034 ps
T60 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_rx_full.169529991 Sep 24 08:58:34 AM UTC 24 Sep 24 08:58:37 AM UTC 24 290536839 ps
T677 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_rx_pid_err.1370417369 Sep 24 08:58:37 AM UTC 24 Sep 24 08:58:39 AM UTC 24 160131932 ps
T678 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk_max.4045435347 Sep 24 08:54:05 AM UTC 24 Sep 24 08:58:42 AM UTC 24 121271265298 ps
T299 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk.2816916952 Sep 24 08:54:45 AM UTC 24 Sep 24 08:58:42 AM UTC 24 97105747985 ps
T679 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority.1201563356 Sep 24 08:58:39 AM UTC 24 Sep 24 08:58:43 AM UTC 24 434064493 ps
T174 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority_over_stall_response.3532876271 Sep 24 08:58:41 AM UTC 24 Sep 24 08:58:44 AM UTC 24 211219587 ps
T680 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_invalid_sync.2477206406 Sep 24 08:57:43 AM UTC 24 Sep 24 08:58:45 AM UTC 24 4712588575 ps
T681 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_min_inter_pkt_delay.596455938 Sep 24 08:58:15 AM UTC 24 Sep 24 08:58:46 AM UTC 24 2001737502 ps
T682 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_setup_trans_ignored.1258601235 Sep 24 08:58:45 AM UTC 24 Sep 24 08:58:48 AM UTC 24 151315146 ps
T683 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_setup_stage.1664673582 Sep 24 08:58:45 AM UTC 24 Sep 24 08:58:48 AM UTC 24 161171423 ps
T684 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_smoke.1238551418 Sep 24 08:58:45 AM UTC 24 Sep 24 08:58:48 AM UTC 24 230108900 ps
T685 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_stall_trans.2837102446 Sep 24 08:58:46 AM UTC 24 Sep 24 08:58:49 AM UTC 24 141272193 ps
T686 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_stall_priority_over_nak.3108370689 Sep 24 08:58:46 AM UTC 24 Sep 24 08:58:49 AM UTC 24 220430097 ps
T687 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_streaming_out.832367770 Sep 24 08:57:05 AM UTC 24 Sep 24 08:59:35 AM UTC 24 4298801282 ps
T688 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_tx_rx_disruption.1585786726 Sep 24 08:58:50 AM UTC 24 Sep 24 08:58:54 AM UTC 24 587575611 ps
T689 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_iso_retraction.894415090 Sep 24 08:57:51 AM UTC 24 Sep 24 08:58:54 AM UTC 24 7538257315 ps
T690 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_stream_len_max.3526965490 Sep 24 08:58:49 AM UTC 24 Sep 24 08:58:56 AM UTC 24 1191173034 ps
T691 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_alert_test.2261768416 Sep 24 08:58:56 AM UTC 24 Sep 24 08:58:58 AM UTC 24 37158751 ps
T692 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_max_usb_traffic.352203803 Sep 24 08:58:15 AM UTC 24 Sep 24 08:58:58 AM UTC 24 3348123832 ps
T220 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_sec_cm.2564282448 Sep 24 08:58:56 AM UTC 24 Sep 24 08:58:59 AM UTC 24 240562182 ps
T693 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk_max.159293738 Sep 24 08:54:45 AM UTC 24 Sep 24 08:58:59 AM UTC 24 103997808051 ps
T466 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_low_speed_traffic.2583813552 Sep 24 08:57:54 AM UTC 24 Sep 24 08:58:59 AM UTC 24 5187881552 ps
T694 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_max_non_iso_usb_traffic.3421912706 Sep 24 08:58:13 AM UTC 24 Sep 24 08:59:03 AM UTC 24 3732953705 ps
T695 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_av_buffer.3156203216 Sep 24 08:59:01 AM UTC 24 Sep 24 08:59:03 AM UTC 24 181777229 ps
T92 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_av_overflow.2269496582 Sep 24 08:59:01 AM UTC 24 Sep 24 08:59:03 AM UTC 24 137323207 ps
T62 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_av_empty.2903316652 Sep 24 08:59:01 AM UTC 24 Sep 24 08:59:03 AM UTC 24 223252954 ps
T696 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_bitstuff_err.4094053556 Sep 24 08:59:01 AM UTC 24 Sep 24 08:59:04 AM UTC 24 170674090 ps
T104 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_link_resume.1482608631 Sep 24 08:57:53 AM UTC 24 Sep 24 08:59:04 AM UTC 24 32934603165 ps
T697 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_freq_phase.2604331094 Sep 24 08:56:04 AM UTC 24 Sep 24 08:59:06 AM UTC 24 88201572106 ps
T698 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_clear.3656572807 Sep 24 08:59:04 AM UTC 24 Sep 24 08:59:08 AM UTC 24 509610997 ps
T441 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_restore.2789502661 Sep 24 08:59:04 AM UTC 24 Sep 24 08:59:09 AM UTC 24 706272052 ps
T699 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_disable_endpoint.57048325 Sep 24 08:59:06 AM UTC 24 Sep 24 08:59:09 AM UTC 24 521200592 ps
T700 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_disconnected.3127016213 Sep 24 08:59:07 AM UTC 24 Sep 24 08:59:10 AM UTC 24 174247866 ps
T701 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_resets.2501675728 Sep 24 08:58:27 AM UTC 24 Sep 24 08:59:10 AM UTC 24 6691901968 ps
T702 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_enable.3677792559 Sep 24 08:59:09 AM UTC 24 Sep 24 08:59:11 AM UTC 24 50651314 ps
T703 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_timeout_missing_host_handshake.289752223 Sep 24 08:59:05 AM UTC 24 Sep 24 08:59:12 AM UTC 24 303004602 ps
T461 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_types.911673727 Sep 24 08:59:10 AM UTC 24 Sep 24 08:59:13 AM UTC 24 298919522 ps
T315 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_levels.4256025045 Sep 24 08:59:11 AM UTC 24 Sep 24 08:59:14 AM UTC 24 279537542 ps
T704 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_rst.3013897121 Sep 24 08:59:11 AM UTC 24 Sep 24 08:59:15 AM UTC 24 276473874 ps
T705 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_access.3116527240 Sep 24 08:59:10 AM UTC 24 Sep 24 08:59:15 AM UTC 24 767075399 ps
T706 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_disconnects.3147646745 Sep 24 08:58:26 AM UTC 24 Sep 24 08:59:15 AM UTC 24 6137868939 ps
T707 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_disconnect.3627595025 Sep 24 08:58:56 AM UTC 24 Sep 24 08:59:18 AM UTC 24 11199568582 ps
T708 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_max_inter_pkt_delay.1261915899 Sep 24 08:57:55 AM UTC 24 Sep 24 08:59:18 AM UTC 24 2219328047 ps
T709 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_in_stall.1571680171 Sep 24 08:59:16 AM UTC 24 Sep 24 08:59:19 AM UTC 24 148619525 ps
T710 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_in_iso.3990328380 Sep 24 08:59:16 AM UTC 24 Sep 24 08:59:19 AM UTC 24 167522465 ps
T711 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk_max.1075241754 Sep 24 08:54:44 AM UTC 24 Sep 24 08:59:21 AM UTC 24 121114268456 ps
T712 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_in_trans.3723271985 Sep 24 08:59:20 AM UTC 24 Sep 24 08:59:22 AM UTC 24 203345146 ps
T713 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_link_in_err.454036750 Sep 24 08:59:20 AM UTC 24 Sep 24 08:59:23 AM UTC 24 215906515 ps
T714 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk.3912577990 Sep 24 08:56:02 AM UTC 24 Sep 24 08:59:27 AM UTC 24 87107334854 ps
T715 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_in_transaction.1472623621 Sep 24 08:59:28 AM UTC 24 Sep 24 08:59:31 AM UTC 24 279033360 ps
T716 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_streaming_out.3943347779 Sep 24 08:58:49 AM UTC 24 Sep 24 08:59:33 AM UTC 24 3872138824 ps
T717 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk_max.2528797268 Sep 24 08:56:02 AM UTC 24 Sep 24 08:59:36 AM UTC 24 92989607334 ps
T718 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_out_transaction.3367537817 Sep 24 08:59:32 AM UTC 24 Sep 24 08:59:35 AM UTC 24 193363754 ps
T287 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_buffer.3698966699 Sep 24 08:58:23 AM UTC 24 Sep 24 08:59:37 AM UTC 24 22374669170 ps
T719 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_device_timeout.1306547549 Sep 24 08:59:05 AM UTC 24 Sep 24 08:59:38 AM UTC 24 1122086859 ps
T720 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_invalid_sync.1152896990 Sep 24 08:59:16 AM UTC 24 Sep 24 08:59:38 AM UTC 24 2866337842 ps
T294 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk.725981965 Sep 24 08:54:43 AM UTC 24 Sep 24 08:59:41 AM UTC 24 111177054034 ps
T721 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_out_transaction.850505150 Sep 24 08:59:39 AM UTC 24 Sep 24 08:59:41 AM UTC 24 181334621 ps
T128 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_nak_trans.1525760656 Sep 24 08:59:39 AM UTC 24 Sep 24 08:59:41 AM UTC 24 180978927 ps
T722 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_in_transaction.172605628 Sep 24 08:59:39 AM UTC 24 Sep 24 08:59:41 AM UTC 24 160343594 ps
T723 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_resume_link_active.4066857474 Sep 24 08:58:30 AM UTC 24 Sep 24 08:59:42 AM UTC 24 20157448459 ps
T724 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_out_iso.1307423796 Sep 24 08:59:40 AM UTC 24 Sep 24 08:59:43 AM UTC 24 166291553 ps
T725 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_link_suspend.668342303 Sep 24 08:59:23 AM UTC 24 Sep 24 08:59:43 AM UTC 24 9281463975 ps
T726 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_disconnects.3509217521 Sep 24 08:56:52 AM UTC 24 Sep 24 08:59:44 AM UTC 24 6430433405 ps
T727 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk.2003808459 Sep 24 08:56:01 AM UTC 24 Sep 24 08:59:46 AM UTC 24 90177485443 ps
T728 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_out_stall.3716257112 Sep 24 08:59:44 AM UTC 24 Sep 24 08:59:46 AM UTC 24 153462125 ps
T729 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_pending_in_trans.3383110938 Sep 24 08:59:44 AM UTC 24 Sep 24 08:59:46 AM UTC 24 151808832 ps
T730 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_out_trans_nak.981846386 Sep 24 08:59:44 AM UTC 24 Sep 24 08:59:46 AM UTC 24 175931314 ps
T731 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_pinflip.2915050181 Sep 24 08:59:44 AM UTC 24 Sep 24 08:59:46 AM UTC 24 172997026 ps
T732 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_usb_ref_disable.1948075858 Sep 24 08:59:44 AM UTC 24 Sep 24 08:59:46 AM UTC 24 146931117 ps
T733 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_rand_bus_type.335709821 Sep 24 08:59:44 AM UTC 24 Sep 24 08:59:47 AM UTC 24 205633517 ps
T47 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_phy_pins_sense.2555699011 Sep 24 08:59:45 AM UTC 24 Sep 24 08:59:47 AM UTC 24 49851203 ps
T212 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_resume.3966385904 Sep 24 08:59:01 AM UTC 24 Sep 24 08:59:48 AM UTC 24 29318351612 ps
T734 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_received.3776950599 Sep 24 08:59:48 AM UTC 24 Sep 24 08:59:51 AM UTC 24 188068963 ps
T735 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_out_transaction.2955884544 Sep 24 08:59:48 AM UTC 24 Sep 24 08:59:51 AM UTC 24 171988484 ps
T736 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_in_transaction.4043441656 Sep 24 08:59:48 AM UTC 24 Sep 24 08:59:51 AM UTC 24 226225836 ps
T737 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_sent.2888572986 Sep 24 08:59:48 AM UTC 24 Sep 24 08:59:51 AM UTC 24 220996890 ps
T738 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_rx_crc_err.2869057909 Sep 24 08:59:50 AM UTC 24 Sep 24 08:59:52 AM UTC 24 150477076 ps
T739 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_max_inter_pkt_delay.1628896665 Sep 24 08:59:23 AM UTC 24 Sep 24 08:59:53 AM UTC 24 2542124846 ps
T740 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_reset.2133946710 Sep 24 08:58:57 AM UTC 24 Sep 24 08:59:55 AM UTC 24 20753632269 ps
T741 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_rx_pid_err.3068511379 Sep 24 08:59:52 AM UTC 24 Sep 24 08:59:55 AM UTC 24 223710496 ps
T742 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority_over_stall_response.1931109225 Sep 24 08:59:52 AM UTC 24 Sep 24 08:59:55 AM UTC 24 178531102 ps
T743 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_rx_full.2791471025 Sep 24 08:59:52 AM UTC 24 Sep 24 08:59:55 AM UTC 24 352029473 ps
T744 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority.3098466541 Sep 24 08:59:52 AM UTC 24 Sep 24 08:59:56 AM UTC 24 397306099 ps
T745 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_setup_stage.2065484160 Sep 24 08:59:54 AM UTC 24 Sep 24 08:59:56 AM UTC 24 145050424 ps
T746 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_setup_trans_ignored.1645234655 Sep 24 08:59:54 AM UTC 24 Sep 24 08:59:56 AM UTC 24 148956563 ps
T747 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_smoke.1319199604 Sep 24 08:59:55 AM UTC 24 Sep 24 08:59:58 AM UTC 24 233286269 ps
T748 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_out_stall.703816527 Sep 24 09:00:44 AM UTC 24 Sep 24 09:00:46 AM UTC 24 168138298 ps
T749 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_stall_trans.2554556748 Sep 24 08:59:57 AM UTC 24 Sep 24 09:00:00 AM UTC 24 183276806 ps
T750 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_stall_priority_over_nak.3345766127 Sep 24 08:59:57 AM UTC 24 Sep 24 09:00:00 AM UTC 24 225435232 ps
T751 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_stream_len_max.373917370 Sep 24 08:59:57 AM UTC 24 Sep 24 09:00:00 AM UTC 24 576310773 ps
T752 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_max_usb_traffic.2671141676 Sep 24 08:59:35 AM UTC 24 Sep 24 09:00:02 AM UTC 24 2651020741 ps
T753 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_alert_test.1624757657 Sep 24 09:00:02 AM UTC 24 Sep 24 09:00:07 AM UTC 24 38846161 ps
T754 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_rand_suspends.3960684215 Sep 24 08:58:29 AM UTC 24 Sep 24 09:00:08 AM UTC 24 6545984544 ps
T221 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_sec_cm.117603803 Sep 24 09:00:01 AM UTC 24 Sep 24 09:00:08 AM UTC 24 357612528 ps
T125 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_tx_rx_disruption.4065821216 Sep 24 09:00:01 AM UTC 24 Sep 24 09:00:09 AM UTC 24 540711307 ps
T755 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_bitstuff_err.460611154 Sep 24 09:00:09 AM UTC 24 Sep 24 09:00:12 AM UTC 24 174259249 ps
T756 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_av_buffer.4016376537 Sep 24 09:00:09 AM UTC 24 Sep 24 09:00:12 AM UTC 24 157194027 ps
T757 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_clear.2773001516 Sep 24 09:00:11 AM UTC 24 Sep 24 09:00:15 AM UTC 24 565045008 ps
T494 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_low_speed_traffic.2657339478 Sep 24 08:59:23 AM UTC 24 Sep 24 09:00:17 AM UTC 24 4953520631 ps
T449 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_restore.2197628209 Sep 24 09:00:13 AM UTC 24 Sep 24 09:00:19 AM UTC 24 847408136 ps
T758 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_max_non_iso_usb_traffic.2030759667 Sep 24 08:59:34 AM UTC 24 Sep 24 09:00:22 AM UTC 24 3788068402 ps
T759 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk_max.2939041964 Sep 24 08:56:01 AM UTC 24 Sep 24 09:00:23 AM UTC 24 93045993532 ps
T430 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_disable_endpoint.4144165884 Sep 24 09:00:20 AM UTC 24 Sep 24 09:00:24 AM UTC 24 918269974 ps
T760 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_resume_link_active.401382941 Sep 24 08:59:48 AM UTC 24 Sep 24 09:00:26 AM UTC 24 20162130253 ps
T761 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_enable.1602073213 Sep 24 09:00:24 AM UTC 24 Sep 24 09:00:26 AM UTC 24 64622126 ps
T762 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_disconnected.1233039587 Sep 24 09:00:24 AM UTC 24 Sep 24 09:00:27 AM UTC 24 149153260 ps
T763 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_link_resume.1308683327 Sep 24 08:59:20 AM UTC 24 Sep 24 09:00:27 AM UTC 24 30361325289 ps
T764 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_spurious_pids_ignored.677204699 Sep 24 08:58:45 AM UTC 24 Sep 24 09:00:28 AM UTC 24 2865702617 ps
T765 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_rand_suspends.1190342314 Sep 24 08:56:52 AM UTC 24 Sep 24 09:00:30 AM UTC 24 10271831181 ps
T766 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_disconnect.2289344765 Sep 24 09:00:06 AM UTC 24 Sep 24 09:00:30 AM UTC 24 8901118954 ps
T316 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_levels.1292259711 Sep 24 09:00:28 AM UTC 24 Sep 24 09:00:31 AM UTC 24 275141990 ps
T767 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_access.3444800 Sep 24 09:00:25 AM UTC 24 Sep 24 09:00:31 AM UTC 24 955465174 ps
T768 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_disconnects.2431341211 Sep 24 08:59:48 AM UTC 24 Sep 24 09:00:32 AM UTC 24 5825293903 ps
T462 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_types.829797609 Sep 24 09:00:28 AM UTC 24 Sep 24 09:00:33 AM UTC 24 627017444 ps
T769 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_in_iso.1236034656 Sep 24 09:00:29 AM UTC 24 Sep 24 09:00:33 AM UTC 24 192336847 ps
T770 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_rst.3803910777 Sep 24 09:00:28 AM UTC 24 Sep 24 09:00:33 AM UTC 24 399088278 ps
T771 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_in_stall.434407519 Sep 24 09:00:31 AM UTC 24 Sep 24 09:00:34 AM UTC 24 161763570 ps
T772 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_in_trans.73410538 Sep 24 09:00:31 AM UTC 24 Sep 24 09:00:34 AM UTC 24 196387824 ps
T773 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_spurious_pids_ignored.3765636402 Sep 24 08:59:57 AM UTC 24 Sep 24 09:00:35 AM UTC 24 2628758409 ps
T774 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_link_in_err.2682060840 Sep 24 09:00:32 AM UTC 24 Sep 24 09:00:35 AM UTC 24 232243639 ps
T775 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_out_transaction.3912257001 Sep 24 09:00:35 AM UTC 24 Sep 24 09:00:37 AM UTC 24 191520268 ps
T776 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_in_transaction.4109582257 Sep 24 09:00:35 AM UTC 24 Sep 24 09:00:38 AM UTC 24 242130352 ps
T777 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_timeout_missing_host_handshake.3239655802 Sep 24 09:00:19 AM UTC 24 Sep 24 09:00:38 AM UTC 24 559602657 ps
T778 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_out_transaction.2976286027 Sep 24 09:00:39 AM UTC 24 Sep 24 09:00:41 AM UTC 24 167088434 ps
T779 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_in_transaction.3209833581 Sep 24 09:00:39 AM UTC 24 Sep 24 09:00:41 AM UTC 24 149837201 ps
T780 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_rand_suspends.1191836507 Sep 24 08:59:48 AM UTC 24 Sep 24 09:00:42 AM UTC 24 7693671203 ps
T143 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_nak_trans.751458925 Sep 24 09:00:42 AM UTC 24 Sep 24 09:00:45 AM UTC 24 170494218 ps
T781 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_out_iso.2145065511 Sep 24 09:00:42 AM UTC 24 Sep 24 09:00:45 AM UTC 24 185014249 ps
T782 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_reset.1866831762 Sep 24 09:00:08 AM UTC 24 Sep 24 09:00:45 AM UTC 24 21241490409 ps
T783 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_out_trans_nak.3971632711 Sep 24 09:00:46 AM UTC 24 Sep 24 09:00:49 AM UTC 24 167997455 ps
T784 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_pending_in_trans.1492317356 Sep 24 09:00:46 AM UTC 24 Sep 24 09:00:49 AM UTC 24 182824451 ps
T785 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_link_suspend.3738682842 Sep 24 09:00:35 AM UTC 24 Sep 24 09:00:49 AM UTC 24 4439860364 ps
T786 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_usb_ref_disable.932137319 Sep 24 09:00:47 AM UTC 24 Sep 24 09:00:50 AM UTC 24 143868286 ps
T787 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_pinflip.139059006 Sep 24 09:00:47 AM UTC 24 Sep 24 09:00:50 AM UTC 24 256960791 ps
T45 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_phy_pins_sense.2987840312 Sep 24 09:00:50 AM UTC 24 Sep 24 09:00:52 AM UTC 24 39270883 ps
T788 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_received.1017904435 Sep 24 09:00:50 AM UTC 24 Sep 24 09:00:53 AM UTC 24 146098586 ps
T789 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_rx_full.1939395981 Sep 24 09:01:55 AM UTC 24 Sep 24 09:01:58 AM UTC 24 337611926 ps
T790 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_device_timeout.3074040142 Sep 24 09:00:16 AM UTC 24 Sep 24 09:00:53 AM UTC 24 3577578267 ps
T791 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_sent.3682029616 Sep 24 09:00:52 AM UTC 24 Sep 24 09:00:54 AM UTC 24 196004258 ps
T792 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_in_transaction.2669396537 Sep 24 09:00:52 AM UTC 24 Sep 24 09:00:55 AM UTC 24 222166294 ps
T793 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_min_inter_pkt_delay.787841796 Sep 24 08:59:36 AM UTC 24 Sep 24 09:00:56 AM UTC 24 2388852008 ps
T794 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_out_transaction.3844249247 Sep 24 09:00:54 AM UTC 24 Sep 24 09:00:57 AM UTC 24 174332870 ps
T300 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_device_address.2927556947 Sep 24 09:00:13 AM UTC 24 Sep 24 09:00:58 AM UTC 24 18899810244 ps
T795 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_rx_crc_err.2344175706 Sep 24 09:00:57 AM UTC 24 Sep 24 09:01:00 AM UTC 24 162829272 ps
T384 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_rx_full.3593257330 Sep 24 09:00:57 AM UTC 24 Sep 24 09:01:01 AM UTC 24 359920052 ps
T796 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_setup_stage.2948780563 Sep 24 09:01:00 AM UTC 24 Sep 24 09:01:03 AM UTC 24 150600951 ps
T797 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_setup_trans_ignored.1677081169 Sep 24 09:01:02 AM UTC 24 Sep 24 09:01:04 AM UTC 24 152135048 ps
T180 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_device_address.4004249915 Sep 24 08:59:04 AM UTC 24 Sep 24 09:01:04 AM UTC 24 44616209831 ps
T798 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk_max.1697268171 Sep 24 08:57:42 AM UTC 24 Sep 24 09:01:05 AM UTC 24 88226873765 ps
T799 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_smoke.1306760148 Sep 24 09:01:03 AM UTC 24 Sep 24 09:01:06 AM UTC 24 211311892 ps
T800 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_max_non_iso_usb_traffic.2774288687 Sep 24 09:00:36 AM UTC 24 Sep 24 09:01:06 AM UTC 24 2667612629 ps
T288 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_buffer.690192214 Sep 24 08:59:45 AM UTC 24 Sep 24 09:01:08 AM UTC 24 20009043570 ps
T801 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_resume.921616453 Sep 24 09:00:09 AM UTC 24 Sep 24 09:01:08 AM UTC 24 29269309248 ps
T802 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_stall_priority_over_nak.2833342839 Sep 24 09:01:07 AM UTC 24 Sep 24 09:01:09 AM UTC 24 236624418 ps
T803 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_stall_trans.3766591462 Sep 24 09:01:07 AM UTC 24 Sep 24 09:01:09 AM UTC 24 170780229 ps
T804 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_setup_trans_ignored.1960492081 Sep 24 09:01:55 AM UTC 24 Sep 24 09:01:57 AM UTC 24 148137336 ps
T805 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_stream_len_max.863098256 Sep 24 09:01:07 AM UTC 24 Sep 24 09:01:12 AM UTC 24 549876699 ps
T806 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_setup_stage.3854685598 Sep 24 09:01:55 AM UTC 24 Sep 24 09:01:57 AM UTC 24 150112675 ps
T807 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_alert_test.3277727113 Sep 24 09:01:11 AM UTC 24 Sep 24 09:01:13 AM UTC 24 140183116 ps
T213 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_tx_rx_disruption.1608155757 Sep 24 09:01:09 AM UTC 24 Sep 24 09:01:14 AM UTC 24 566969906 ps
T808 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_av_buffer.150047192 Sep 24 09:01:14 AM UTC 24 Sep 24 09:01:16 AM UTC 24 146340395 ps
T809 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_bitstuff_err.4163897872 Sep 24 09:01:14 AM UTC 24 Sep 24 09:01:16 AM UTC 24 152838556 ps
T810 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk.2179518670 Sep 24 08:57:37 AM UTC 24 Sep 24 09:01:17 AM UTC 24 95211626516 ps
T811 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_clear.1806639114 Sep 24 09:01:15 AM UTC 24 Sep 24 09:01:19 AM UTC 24 517733766 ps
T450 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_restore.2548988751 Sep 24 09:01:18 AM UTC 24 Sep 24 09:01:21 AM UTC 24 429695552 ps
T493 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_disable_endpoint.3486737317 Sep 24 09:01:22 AM UTC 24 Sep 24 09:01:27 AM UTC 24 725748860 ps
T812 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_spurious_pids_ignored.3239750961 Sep 24 09:01:04 AM UTC 24 Sep 24 09:01:27 AM UTC 24 2451181193 ps
T813 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_disconnected.1391619625 Sep 24 09:01:27 AM UTC 24 Sep 24 09:01:29 AM UTC 24 145821982 ps
T814 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_max_inter_pkt_delay.1253365464 Sep 24 09:00:35 AM UTC 24 Sep 24 09:01:31 AM UTC 24 3966857165 ps
T815 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_iso_retraction.3488471058 Sep 24 09:00:32 AM UTC 24 Sep 24 09:01:31 AM UTC 24 4580401710 ps
T816 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_enable.3463826308 Sep 24 09:01:29 AM UTC 24 Sep 24 09:01:31 AM UTC 24 85439013 ps
T817 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_device_timeout.3730279613 Sep 24 09:01:20 AM UTC 24 Sep 24 09:01:32 AM UTC 24 1156843339 ps
T193 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_types.966125732 Sep 24 09:01:31 AM UTC 24 Sep 24 09:01:35 AM UTC 24 347399068 ps
T818 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_link_resume.1924410285 Sep 24 09:00:34 AM UTC 24 Sep 24 09:01:35 AM UTC 24 24278356474 ps
T819 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_levels.1616988505 Sep 24 09:01:33 AM UTC 24 Sep 24 09:01:35 AM UTC 24 178318426 ps
T820 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_rst.3029370717 Sep 24 09:01:33 AM UTC 24 Sep 24 09:01:37 AM UTC 24 276235339 ps
T821 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_access.340526012 Sep 24 09:01:30 AM UTC 24 Sep 24 09:01:37 AM UTC 24 1073709523 ps
T822 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_in_iso.262776240 Sep 24 09:01:35 AM UTC 24 Sep 24 09:01:38 AM UTC 24 237414013 ps
T823 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_min_inter_pkt_delay.894764471 Sep 24 09:00:39 AM UTC 24 Sep 24 09:01:38 AM UTC 24 4020921243 ps
T824 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_max_usb_traffic.2775232688 Sep 24 09:00:36 AM UTC 24 Sep 24 09:01:39 AM UTC 24 2139687574 ps
T825 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_in_stall.2995196964 Sep 24 09:01:37 AM UTC 24 Sep 24 09:01:40 AM UTC 24 137777382 ps
T826 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_reset.4271079451 Sep 24 09:01:12 AM UTC 24 Sep 24 09:01:40 AM UTC 24 14644708958 ps
T827 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_in_trans.1935038363 Sep 24 09:01:37 AM UTC 24 Sep 24 09:01:40 AM UTC 24 235204917 ps
T828 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_disconnect.2817971198 Sep 24 09:01:12 AM UTC 24 Sep 24 09:01:40 AM UTC 24 11249104141 ps
T829 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_link_in_err.2429269678 Sep 24 09:01:39 AM UTC 24 Sep 24 09:01:42 AM UTC 24 254672260 ps
T429 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_low_speed_traffic.142541532 Sep 24 09:00:35 AM UTC 24 Sep 24 09:01:42 AM UTC 24 4600083875 ps
T830 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_streaming_out.4004677627 Sep 24 08:59:57 AM UTC 24 Sep 24 09:01:42 AM UTC 24 3498394040 ps
T831 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk_max.729519122 Sep 24 08:59:14 AM UTC 24 Sep 24 09:01:43 AM UTC 24 85995522630 ps
T832 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_in_transaction.2498930298 Sep 24 09:01:41 AM UTC 24 Sep 24 09:01:44 AM UTC 24 257220939 ps
T84 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_stress_usb_traffic.1148629806 Sep 24 08:59:59 AM UTC 24 Sep 24 09:01:44 AM UTC 24 6677730270 ps
T833 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_out_transaction.710012379 Sep 24 09:01:41 AM UTC 24 Sep 24 09:01:44 AM UTC 24 187725023 ps
T834 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_resume_link_active.1184246738 Sep 24 09:00:56 AM UTC 24 Sep 24 09:01:45 AM UTC 24 20224082275 ps
T835 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk_max.3957946955 Sep 24 08:57:40 AM UTC 24 Sep 24 09:01:46 AM UTC 24 106164171737 ps
T171 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_resets.30760836 Sep 24 09:00:54 AM UTC 24 Sep 24 09:01:47 AM UTC 24 7588312743 ps
T836 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk.1815543376 Sep 24 08:57:41 AM UTC 24 Sep 24 09:01:47 AM UTC 24 103105196118 ps
T837 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_out_stall.2551168844 Sep 24 09:01:45 AM UTC 24 Sep 24 09:01:48 AM UTC 24 189564291 ps
T838 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_out_transaction.1136641492 Sep 24 09:01:45 AM UTC 24 Sep 24 09:01:48 AM UTC 24 191963206 ps
T839 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_in_transaction.2498619193 Sep 24 09:01:45 AM UTC 24 Sep 24 09:01:48 AM UTC 24 157918379 ps
T129 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_nak_trans.732507904 Sep 24 09:01:45 AM UTC 24 Sep 24 09:01:48 AM UTC 24 215264865 ps
T840 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_out_iso.3514592285 Sep 24 09:01:45 AM UTC 24 Sep 24 09:01:48 AM UTC 24 181375683 ps
T841 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_pending_in_trans.466338050 Sep 24 09:01:47 AM UTC 24 Sep 24 09:01:49 AM UTC 24 160930811 ps
T842 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_out_trans_nak.3690864391 Sep 24 09:01:47 AM UTC 24 Sep 24 09:01:49 AM UTC 24 186661057 ps
T843 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_phy_pins_sense.6575110 Sep 24 09:01:50 AM UTC 24 Sep 24 09:01:53 AM UTC 24 36778102 ps
T844 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_usb_ref_disable.10888586 Sep 24 09:01:50 AM UTC 24 Sep 24 09:01:53 AM UTC 24 146086819 ps
T845 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_pinflip.2526498357 Sep 24 09:01:50 AM UTC 24 Sep 24 09:01:53 AM UTC 24 221639716 ps
T846 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_sent.805424878 Sep 24 09:01:50 AM UTC 24 Sep 24 09:01:53 AM UTC 24 250418807 ps
T847 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_received.822207904 Sep 24 09:01:50 AM UTC 24 Sep 24 09:01:54 AM UTC 24 159211560 ps
T848 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_in_transaction.2681176734 Sep 24 09:01:50 AM UTC 24 Sep 24 09:01:54 AM UTC 24 182088033 ps
T849 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_out_transaction.1649051676 Sep 24 09:01:50 AM UTC 24 Sep 24 09:01:54 AM UTC 24 188392488 ps
T850 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_freq_phase.1081771436 Sep 24 08:57:42 AM UTC 24 Sep 24 09:01:57 AM UTC 24 106120014295 ps
T851 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_rx_crc_err.944317342 Sep 24 09:01:55 AM UTC 24 Sep 24 09:01:57 AM UTC 24 145837547 ps
T105 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_link_suspend.4048383121 Sep 24 09:01:41 AM UTC 24 Sep 24 09:02:00 AM UTC 24 9683567804 ps
T852 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_invalid_sync.3271919918 Sep 24 09:00:28 AM UTC 24 Sep 24 09:02:00 AM UTC 24 2896655236 ps
T853 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_resume.1092300899 Sep 24 09:01:14 AM UTC 24 Sep 24 09:02:01 AM UTC 24 25189568192 ps
T289 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_buffer.2278841500 Sep 24 09:00:50 AM UTC 24 Sep 24 09:02:01 AM UTC 24 19055862111 ps
T854 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_in_iso.1397523159 Sep 24 09:03:52 AM UTC 24 Sep 24 09:03:55 AM UTC 24 239866047 ps
T855 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_max_inter_pkt_delay.2386606346 Sep 24 09:01:41 AM UTC 24 Sep 24 09:02:01 AM UTC 24 2571439754 ps
T856 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_stall_priority_over_nak.1552592973 Sep 24 09:02:00 AM UTC 24 Sep 24 09:02:02 AM UTC 24 185584970 ps
T857 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_stall_trans.3774492047 Sep 24 09:02:00 AM UTC 24 Sep 24 09:02:02 AM UTC 24 183244203 ps
T858 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_smoke.1115190062 Sep 24 09:02:00 AM UTC 24 Sep 24 09:02:03 AM UTC 24 238732640 ps
T859 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_max_non_iso_usb_traffic.1301245759 Sep 24 09:01:42 AM UTC 24 Sep 24 09:02:02 AM UTC 24 2375241645 ps
T860 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_invalid_sync.421167540 Sep 24 09:01:34 AM UTC 24 Sep 24 09:02:03 AM UTC 24 2281322042 ps
T861 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_stream_len_max.3504585123 Sep 24 09:02:01 AM UTC 24 Sep 24 09:02:04 AM UTC 24 514058825 ps
T862 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_stress_usb_traffic.3397181732 Sep 24 09:01:09 AM UTC 24 Sep 24 09:02:07 AM UTC 24 10196825101 ps
T214 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_tx_rx_disruption.94741191 Sep 24 09:02:47 AM UTC 24 Sep 24 09:02:51 AM UTC 24 558473877 ps
T863 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_bitstuff_err.371139511 Sep 24 09:02:52 AM UTC 24 Sep 24 09:02:54 AM UTC 24 148249557 ps
T864 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_alert_test.1604867653 Sep 24 09:02:05 AM UTC 24 Sep 24 09:02:07 AM UTC 24 32833390 ps
T865 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_timeout_missing_host_handshake.3337674575 Sep 24 09:01:20 AM UTC 24 Sep 24 09:02:07 AM UTC 24 3881525166 ps
T866 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_av_buffer.1255738621 Sep 24 09:02:05 AM UTC 24 Sep 24 09:02:08 AM UTC 24 165762037 ps
T867 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_bitstuff_err.3845123107 Sep 24 09:02:05 AM UTC 24 Sep 24 09:02:08 AM UTC 24 150956129 ps
T868 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_tx_rx_disruption.1980813397 Sep 24 09:02:04 AM UTC 24 Sep 24 09:02:08 AM UTC 24 710166285 ps
T869 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_max_usb_traffic.816345938 Sep 24 09:01:42 AM UTC 24 Sep 24 09:02:10 AM UTC 24 1943700376 ps
T870 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_clear.659131178 Sep 24 09:02:06 AM UTC 24 Sep 24 09:02:11 AM UTC 24 581346775 ps
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