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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.41 98.21 96.12 97.44 94.92 98.38 98.21 98.55


Total test records in report: 3901
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T2972 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_device_timeout.114571537 Sep 24 09:29:14 AM UTC 24 Sep 24 09:29:24 AM UTC 24 1071531384 ps
T2973 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_device_address.3088062712 Sep 24 09:28:20 AM UTC 24 Sep 24 09:29:27 AM UTC 24 37285352094 ps
T2974 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_min_inter_pkt_delay.2038106308 Sep 24 09:27:53 AM UTC 24 Sep 24 09:29:29 AM UTC 24 3666698898 ps
T2975 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_low_speed_traffic.1703639447 Sep 24 09:28:43 AM UTC 24 Sep 24 09:29:30 AM UTC 24 4491833657 ps
T2976 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_spurious_pids_ignored.4269062006 Sep 24 09:29:14 AM UTC 24 Sep 24 09:29:33 AM UTC 24 1886070225 ps
T2977 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_reset.105112479 Sep 24 09:29:14 AM UTC 24 Sep 24 09:29:40 AM UTC 24 20917547248 ps
T2978 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_enable.131437634 Sep 24 09:29:39 AM UTC 24 Sep 24 09:29:41 AM UTC 24 51416794 ps
T396 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_levels.653615750 Sep 24 09:29:39 AM UTC 24 Sep 24 09:29:42 AM UTC 24 154438958 ps
T2979 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_in_stall.3757772099 Sep 24 09:29:39 AM UTC 24 Sep 24 09:29:42 AM UTC 24 177203009 ps
T2980 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_streaming_out.1598284211 Sep 24 09:30:07 AM UTC 24 Sep 24 09:30:36 AM UTC 24 2938994957 ps
T2981 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_in_iso.1433793842 Sep 24 09:29:39 AM UTC 24 Sep 24 09:29:42 AM UTC 24 153620174 ps
T2982 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_spurious_pids_ignored.160116845 Sep 24 09:30:07 AM UTC 24 Sep 24 09:30:24 AM UTC 24 1791528822 ps
T2983 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_resume.1614361113 Sep 24 09:30:07 AM UTC 24 Sep 24 09:30:42 AM UTC 24 26312657109 ps
T2984 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_in_trans.3344364810 Sep 24 09:29:39 AM UTC 24 Sep 24 09:29:42 AM UTC 24 198193019 ps
T2985 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_link_in_err.357569797 Sep 24 09:29:39 AM UTC 24 Sep 24 09:29:42 AM UTC 24 181245306 ps
T2986 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_in_transaction.522816654 Sep 24 09:29:40 AM UTC 24 Sep 24 09:29:42 AM UTC 24 161792712 ps
T2987 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_in_transaction.4095311999 Sep 24 09:29:40 AM UTC 24 Sep 24 09:29:42 AM UTC 24 236632203 ps
T2988 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_out_transaction.3323345564 Sep 24 09:29:40 AM UTC 24 Sep 24 09:29:42 AM UTC 24 162476590 ps
T2989 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_out_trans_nak.3632787944 Sep 24 09:29:40 AM UTC 24 Sep 24 09:29:42 AM UTC 24 193572599 ps
T2990 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_out_iso.1863973680 Sep 24 09:29:40 AM UTC 24 Sep 24 09:29:42 AM UTC 24 142679751 ps
T523 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_types.2720706960 Sep 24 09:29:39 AM UTC 24 Sep 24 09:29:42 AM UTC 24 607155465 ps
T2991 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_out_stall.193093042 Sep 24 09:29:40 AM UTC 24 Sep 24 09:29:42 AM UTC 24 165930680 ps
T2992 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_rst.1308307406 Sep 24 09:29:39 AM UTC 24 Sep 24 09:29:42 AM UTC 24 162797838 ps
T2993 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_pending_in_trans.1632312166 Sep 24 09:29:40 AM UTC 24 Sep 24 09:29:42 AM UTC 24 195965210 ps
T2994 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_out_transaction.4187295103 Sep 24 09:29:40 AM UTC 24 Sep 24 09:29:43 AM UTC 24 243843038 ps
T2995 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_iso_retraction.3590379465 Sep 24 09:27:52 AM UTC 24 Sep 24 09:29:43 AM UTC 24 9628954435 ps
T2996 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_nak_trans.3887677477 Sep 24 09:29:40 AM UTC 24 Sep 24 09:29:43 AM UTC 24 211311758 ps
T2997 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_access.1978686033 Sep 24 09:29:39 AM UTC 24 Sep 24 09:29:43 AM UTC 24 854614365 ps
T2998 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_timeout_missing_host_handshake.332927046 Sep 24 09:29:14 AM UTC 24 Sep 24 09:29:44 AM UTC 24 4960583152 ps
T2999 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_link_suspend.2356366488 Sep 24 09:29:40 AM UTC 24 Sep 24 09:29:47 AM UTC 24 3332525170 ps
T3000 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_resume.187002961 Sep 24 09:29:14 AM UTC 24 Sep 24 09:29:53 AM UTC 24 28534852251 ps
T3001 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_buffer.3551057373 Sep 24 09:29:13 AM UTC 24 Sep 24 09:29:54 AM UTC 24 15042252726 ps
T3002 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_streaming_out.2333151087 Sep 24 09:28:20 AM UTC 24 Sep 24 09:29:59 AM UTC 24 3930375446 ps
T3003 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_max_inter_pkt_delay.2489363031 Sep 24 09:29:40 AM UTC 24 Sep 24 09:30:00 AM UTC 24 2912769595 ps
T3004 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_iso_retraction.3679110467 Sep 24 09:28:43 AM UTC 24 Sep 24 09:30:03 AM UTC 24 7631930413 ps
T3005 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_low_speed_traffic.1733055109 Sep 24 09:27:52 AM UTC 24 Sep 24 09:30:03 AM UTC 24 5032327681 ps
T3006 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_phy_pins_sense.3344201314 Sep 24 09:30:06 AM UTC 24 Sep 24 09:30:08 AM UTC 24 32331568 ps
T3007 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_in_iso.764628544 Sep 24 09:30:42 AM UTC 24 Sep 24 09:30:44 AM UTC 24 202786985 ps
T3008 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_usb_ref_disable.1506377500 Sep 24 09:30:06 AM UTC 24 Sep 24 09:30:08 AM UTC 24 155538628 ps
T3009 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_sent.1929740397 Sep 24 09:30:06 AM UTC 24 Sep 24 09:30:08 AM UTC 24 215263693 ps
T3010 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_pinflip.586678540 Sep 24 09:30:06 AM UTC 24 Sep 24 09:30:08 AM UTC 24 215392773 ps
T3011 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_setup_trans_ignored.2727006761 Sep 24 09:30:06 AM UTC 24 Sep 24 09:30:08 AM UTC 24 147463014 ps
T3012 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_received.1946272038 Sep 24 09:30:06 AM UTC 24 Sep 24 09:30:08 AM UTC 24 182925470 ps
T3013 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_in_transaction.3954084736 Sep 24 09:30:06 AM UTC 24 Sep 24 09:30:09 AM UTC 24 251016741 ps
T3014 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_rx_crc_err.2148303984 Sep 24 09:30:06 AM UTC 24 Sep 24 09:30:09 AM UTC 24 170534671 ps
T3015 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_out_transaction.2226650518 Sep 24 09:30:06 AM UTC 24 Sep 24 09:30:09 AM UTC 24 164193646 ps
T3016 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_setup_stage.83858736 Sep 24 09:30:06 AM UTC 24 Sep 24 09:30:09 AM UTC 24 201282448 ps
T3017 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_disconnected.1874457805 Sep 24 09:30:42 AM UTC 24 Sep 24 09:30:43 AM UTC 24 147208616 ps
T3018 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_rx_full.1584612274 Sep 24 09:30:06 AM UTC 24 Sep 24 09:30:09 AM UTC 24 316651203 ps
T3019 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_smoke.3886452681 Sep 24 09:30:07 AM UTC 24 Sep 24 09:30:09 AM UTC 24 254576779 ps
T3020 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_enable.3570405436 Sep 24 09:30:42 AM UTC 24 Sep 24 09:30:44 AM UTC 24 108729464 ps
T3021 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_stall_trans.3390511331 Sep 24 09:30:07 AM UTC 24 Sep 24 09:30:09 AM UTC 24 180695249 ps
T3022 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_stall_priority_over_nak.187947240 Sep 24 09:30:07 AM UTC 24 Sep 24 09:30:09 AM UTC 24 257835176 ps
T3023 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_alert_test.1124429979 Sep 24 09:30:07 AM UTC 24 Sep 24 09:30:09 AM UTC 24 98458491 ps
T3024 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_bitstuff_err.2044257550 Sep 24 09:30:07 AM UTC 24 Sep 24 09:30:09 AM UTC 24 157925704 ps
T3025 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_av_buffer.4244680357 Sep 24 09:30:07 AM UTC 24 Sep 24 09:30:09 AM UTC 24 172909731 ps
T3026 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_device_address.866769558 Sep 24 09:29:14 AM UTC 24 Sep 24 09:30:10 AM UTC 24 33752852224 ps
T3027 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_tx_rx_disruption.1701541797 Sep 24 09:30:07 AM UTC 24 Sep 24 09:30:10 AM UTC 24 509876940 ps
T3028 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_low_speed_traffic.2815624822 Sep 24 09:29:40 AM UTC 24 Sep 24 09:30:10 AM UTC 24 3138938815 ps
T3029 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_stream_len_max.2539837661 Sep 24 09:30:07 AM UTC 24 Sep 24 09:30:10 AM UTC 24 656523025 ps
T3030 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_streaming_out.832505578 Sep 24 09:29:14 AM UTC 24 Sep 24 09:30:12 AM UTC 24 2262234218 ps
T3031 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_min_inter_pkt_delay.1387181043 Sep 24 09:29:40 AM UTC 24 Sep 24 09:30:14 AM UTC 24 3606631371 ps
T3032 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_disconnect.842054251 Sep 24 09:30:07 AM UTC 24 Sep 24 09:30:15 AM UTC 24 4052476831 ps
T3033 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_link_resume.3930480898 Sep 24 09:29:39 AM UTC 24 Sep 24 09:30:27 AM UTC 24 28482411688 ps
T3034 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_sent.1059235813 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:51 AM UTC 24 221337276 ps
T3035 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_disable_endpoint.173861004 Sep 24 09:30:41 AM UTC 24 Sep 24 09:30:44 AM UTC 24 628258338 ps
T3036 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_in_transaction.1755717694 Sep 24 09:30:42 AM UTC 24 Sep 24 09:30:44 AM UTC 24 160959656 ps
T3037 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_link_in_err.526967402 Sep 24 09:30:42 AM UTC 24 Sep 24 09:30:44 AM UTC 24 219393566 ps
T3038 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_out_transaction.2227549456 Sep 24 09:30:42 AM UTC 24 Sep 24 09:30:44 AM UTC 24 230179288 ps
T3039 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_out_iso.1754230451 Sep 24 09:30:42 AM UTC 24 Sep 24 09:30:44 AM UTC 24 159810666 ps
T3040 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_out_transaction.2443524954 Sep 24 09:30:42 AM UTC 24 Sep 24 09:30:44 AM UTC 24 162247965 ps
T3041 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_pending_in_trans.2115276640 Sep 24 09:30:42 AM UTC 24 Sep 24 09:30:44 AM UTC 24 185102489 ps
T155 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_nak_trans.3706224058 Sep 24 09:30:42 AM UTC 24 Sep 24 09:30:44 AM UTC 24 235863486 ps
T3042 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_out_stall.1605230466 Sep 24 09:30:42 AM UTC 24 Sep 24 09:30:45 AM UTC 24 207412216 ps
T3043 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_usb_ref_disable.2538885200 Sep 24 09:30:42 AM UTC 24 Sep 24 09:30:45 AM UTC 24 147401971 ps
T3044 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_in_transaction.2696581484 Sep 24 09:30:42 AM UTC 24 Sep 24 09:30:45 AM UTC 24 247038416 ps
T3045 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_out_trans_nak.4117275762 Sep 24 09:30:42 AM UTC 24 Sep 24 09:30:45 AM UTC 24 173418641 ps
T3046 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_pinflip.2131219759 Sep 24 09:30:42 AM UTC 24 Sep 24 09:30:45 AM UTC 24 254315520 ps
T3047 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_access.608873970 Sep 24 09:30:42 AM UTC 24 Sep 24 09:30:45 AM UTC 24 808353561 ps
T3048 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_rst.2993087484 Sep 24 09:30:42 AM UTC 24 Sep 24 09:30:46 AM UTC 24 489598086 ps
T3049 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_buffer.1952048562 Sep 24 09:30:06 AM UTC 24 Sep 24 09:30:49 AM UTC 24 16908581391 ps
T3050 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_link_suspend.2786828114 Sep 24 09:30:42 AM UTC 24 Sep 24 09:30:50 AM UTC 24 4697942118 ps
T3051 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_timeout_missing_host_handshake.2142100464 Sep 24 09:30:41 AM UTC 24 Sep 24 09:30:50 AM UTC 24 431719816 ps
T3052 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_device_timeout.412590428 Sep 24 09:30:41 AM UTC 24 Sep 24 09:30:51 AM UTC 24 1047318821 ps
T3053 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_min_inter_pkt_delay.836801247 Sep 24 09:30:42 AM UTC 24 Sep 24 09:30:59 AM UTC 24 1819617228 ps
T3054 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_max_inter_pkt_delay.1561481776 Sep 24 09:30:42 AM UTC 24 Sep 24 09:31:09 AM UTC 24 3795921547 ps
T3055 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_invalid_sync.1709735761 Sep 24 09:29:39 AM UTC 24 Sep 24 09:31:09 AM UTC 24 3599643308 ps
T3056 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_low_speed_traffic.1553861856 Sep 24 09:30:42 AM UTC 24 Sep 24 09:31:09 AM UTC 24 3619150869 ps
T3057 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_device_address.1604849057 Sep 24 09:30:41 AM UTC 24 Sep 24 09:31:13 AM UTC 24 17779699050 ps
T3058 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_phy_pins_sense.2028209635 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:14 AM UTC 24 40836933 ps
T3059 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_received.2924116904 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:14 AM UTC 24 183589307 ps
T3060 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_rx_crc_err.654314633 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:14 AM UTC 24 160471089 ps
T3061 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_out_transaction.3486144407 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:14 AM UTC 24 183783828 ps
T3062 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_sent.3548937433 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:14 AM UTC 24 185684707 ps
T3063 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_rst.2520820468 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:51 AM UTC 24 434500658 ps
T3064 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_rx_full.2262501904 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:14 AM UTC 24 274391763 ps
T3065 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_setup_stage.4074732962 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:14 AM UTC 24 198854206 ps
T3066 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_in_transaction.958695392 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:14 AM UTC 24 223988142 ps
T3067 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_smoke.1673238683 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:14 AM UTC 24 240139484 ps
T3068 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_stall_trans.3688117189 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:14 AM UTC 24 153833669 ps
T3069 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_stall_priority_over_nak.582744459 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:14 AM UTC 24 148356625 ps
T3070 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_out_transaction.4109348367 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:51 AM UTC 24 192852787 ps
T3071 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_alert_test.2086617313 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:14 AM UTC 24 90854370 ps
T3072 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_setup_trans_ignored.2743481247 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:14 AM UTC 24 164675179 ps
T3073 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_av_buffer.3105078093 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:14 AM UTC 24 153094504 ps
T3074 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_bitstuff_err.575505991 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:14 AM UTC 24 152048297 ps
T3075 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_tx_rx_disruption.3256221457 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:15 AM UTC 24 448413942 ps
T3076 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_clear.4279969593 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:15 AM UTC 24 368724645 ps
T3077 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_restore.2034625158 Sep 24 09:31:13 AM UTC 24 Sep 24 09:31:15 AM UTC 24 329245111 ps
T3078 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_stream_len_max.3245030587 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:16 AM UTC 24 649771604 ps
T3079 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_disable_endpoint.1568327308 Sep 24 09:31:13 AM UTC 24 Sep 24 09:31:17 AM UTC 24 1209462237 ps
T3080 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_invalid_sync.1144620976 Sep 24 09:30:42 AM UTC 24 Sep 24 09:31:17 AM UTC 24 3784732264 ps
T3081 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_link_resume.3533086903 Sep 24 09:30:42 AM UTC 24 Sep 24 09:31:17 AM UTC 24 22400115868 ps
T3082 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_timeout_missing_host_handshake.2369409843 Sep 24 09:31:13 AM UTC 24 Sep 24 09:31:22 AM UTC 24 1087655460 ps
T3083 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_disconnect.329827484 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:28 AM UTC 24 9816076141 ps
T3084 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_device_address.867067048 Sep 24 09:31:13 AM UTC 24 Sep 24 09:31:39 AM UTC 24 15386940247 ps
T3085 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_reset.370191163 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:42 AM UTC 24 21334825153 ps
T3086 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_buffer.3258940496 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:43 AM UTC 24 11700576232 ps
T3087 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_resume.2693327902 Sep 24 09:31:12 AM UTC 24 Sep 24 09:31:49 AM UTC 24 29186446856 ps
T3088 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_disconnected.3556271390 Sep 24 09:31:47 AM UTC 24 Sep 24 09:31:49 AM UTC 24 141585706 ps
T3089 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_enable.634075069 Sep 24 09:31:47 AM UTC 24 Sep 24 09:31:49 AM UTC 24 30806444 ps
T3090 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_in_iso.2383611454 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:50 AM UTC 24 185588462 ps
T3091 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_link_in_err.784778138 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:50 AM UTC 24 200189853 ps
T3092 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_in_transaction.2437706179 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:51 AM UTC 24 174686526 ps
T3093 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_in_trans.781346698 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:50 AM UTC 24 161275619 ps
T3094 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_in_stall.3716868086 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:50 AM UTC 24 138097473 ps
T482 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_types.3517805448 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:50 AM UTC 24 493739439 ps
T3095 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_out_iso.553455811 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:51 AM UTC 24 161242358 ps
T3096 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_in_transaction.707523059 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:50 AM UTC 24 157901234 ps
T3097 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_phy_pins_sense.2982795444 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:50 AM UTC 24 33540515 ps
T3098 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_out_transaction.3205771205 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:50 AM UTC 24 143821686 ps
T3099 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_in_transaction.4159705258 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:50 AM UTC 24 306273219 ps
T3100 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_out_trans_nak.1118468977 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:50 AM UTC 24 194849160 ps
T3101 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_out_stall.1934861467 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:51 AM UTC 24 185605618 ps
T3102 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_pending_in_trans.890487159 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:51 AM UTC 24 159097349 ps
T3103 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_received.3008413341 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:51 AM UTC 24 185791372 ps
T3104 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_usb_ref_disable.2975490337 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:51 AM UTC 24 203336141 ps
T3105 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_pinflip.820596508 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:51 AM UTC 24 281848353 ps
T3106 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_nak_trans.4151476263 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:51 AM UTC 24 225641068 ps
T340 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_levels.874631823 Sep 24 09:31:48 AM UTC 24 Sep 24 09:31:51 AM UTC 24 268660580 ps
T3107 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_out_transaction.1275543284 Sep 24 09:32:19 AM UTC 24 Sep 24 09:32:21 AM UTC 24 144551282 ps
T3108 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_rx_crc_err.2896377349 Sep 24 09:32:19 AM UTC 24 Sep 24 09:32:21 AM UTC 24 142741386 ps
T3109 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_invalid_sync.475565617 Sep 24 09:31:48 AM UTC 24 Sep 24 09:33:21 AM UTC 24 3652813324 ps
T3110 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_smoke.1345498587 Sep 24 09:32:19 AM UTC 24 Sep 24 09:32:21 AM UTC 24 229783251 ps
T3111 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_rx_full.3602284720 Sep 24 09:32:19 AM UTC 24 Sep 24 09:32:21 AM UTC 24 367555478 ps
T3112 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_setup_trans_ignored.4273945534 Sep 24 09:32:19 AM UTC 24 Sep 24 09:32:21 AM UTC 24 171857113 ps
T3113 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.1912011895 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:22 AM UTC 24 644918077 ps
T3114 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_stall_trans.4005802418 Sep 24 09:32:19 AM UTC 24 Sep 24 09:32:21 AM UTC 24 178830834 ps
T3115 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_alert_test.618994308 Sep 24 09:32:19 AM UTC 24 Sep 24 09:32:21 AM UTC 24 42427402 ps
T3116 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.4138336620 Sep 24 09:38:16 AM UTC 24 Sep 24 09:38:18 AM UTC 24 237891045 ps
T3117 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_stall_priority_over_nak.453610481 Sep 24 09:32:19 AM UTC 24 Sep 24 09:32:21 AM UTC 24 201024144 ps
T3118 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_bitstuff_err.342269222 Sep 24 09:32:19 AM UTC 24 Sep 24 09:32:22 AM UTC 24 179223940 ps
T3119 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_av_buffer.3633221449 Sep 24 09:32:19 AM UTC 24 Sep 24 09:32:22 AM UTC 24 167159526 ps
T3120 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_enable.3118578376 Sep 24 09:32:20 AM UTC 24 Sep 24 09:32:22 AM UTC 24 80049517 ps
T3121 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_disconnected.3709678793 Sep 24 09:32:20 AM UTC 24 Sep 24 09:32:22 AM UTC 24 173568071 ps
T3122 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_buffer.1832864 Sep 24 09:31:48 AM UTC 24 Sep 24 09:32:22 AM UTC 24 13351731193 ps
T3123 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_levels.2050879690 Sep 24 09:32:20 AM UTC 24 Sep 24 09:32:22 AM UTC 24 158826187 ps
T3124 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_tx_rx_disruption.889709758 Sep 24 09:32:19 AM UTC 24 Sep 24 09:32:22 AM UTC 24 507030397 ps
T485 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_types.4042866214 Sep 24 09:32:20 AM UTC 24 Sep 24 09:32:22 AM UTC 24 357623657 ps
T3125 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_clear.2555487966 Sep 24 09:32:20 AM UTC 24 Sep 24 09:32:22 AM UTC 24 197962219 ps
T3126 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_restore.2723500168 Sep 24 09:32:20 AM UTC 24 Sep 24 09:32:23 AM UTC 24 693832408 ps
T3127 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_disable_endpoint.799449422 Sep 24 09:32:20 AM UTC 24 Sep 24 09:32:23 AM UTC 24 673065298 ps
T3128 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_access.1848122418 Sep 24 09:32:20 AM UTC 24 Sep 24 09:32:23 AM UTC 24 834736822 ps
T3129 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_stream_len_max.3354781261 Sep 24 09:32:19 AM UTC 24 Sep 24 09:32:24 AM UTC 24 1276062252 ps
T3130 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_spurious_pids_ignored.1278397439 Sep 24 09:31:12 AM UTC 24 Sep 24 09:32:28 AM UTC 24 3000529428 ps
T3131 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_device_timeout.3395092352 Sep 24 09:32:20 AM UTC 24 Sep 24 09:32:29 AM UTC 24 1349014168 ps
T3132 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_disconnect.1529723831 Sep 24 09:32:19 AM UTC 24 Sep 24 09:32:33 AM UTC 24 10366893079 ps
T3133 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_reset.1804737062 Sep 24 09:32:19 AM UTC 24 Sep 24 09:32:38 AM UTC 24 14087801779 ps
T3134 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_iso_retraction.2737807210 Sep 24 09:30:42 AM UTC 24 Sep 24 09:32:39 AM UTC 24 10837624753 ps
T3135 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_max_inter_pkt_delay.1933458776 Sep 24 09:31:48 AM UTC 24 Sep 24 09:32:42 AM UTC 24 2157347167 ps
T3136 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_timeout_missing_host_handshake.4054259600 Sep 24 09:32:20 AM UTC 24 Sep 24 09:32:45 AM UTC 24 1139084624 ps
T3137 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_in_stall.3698740183 Sep 24 09:32:47 AM UTC 24 Sep 24 09:32:49 AM UTC 24 163347128 ps
T3138 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_in_iso.3771120165 Sep 24 09:32:47 AM UTC 24 Sep 24 09:32:49 AM UTC 24 212187218 ps
T3139 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_in_trans.2049436977 Sep 24 09:32:47 AM UTC 24 Sep 24 09:32:50 AM UTC 24 203967870 ps
T3140 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_out_transaction.1790132397 Sep 24 09:32:48 AM UTC 24 Sep 24 09:32:50 AM UTC 24 219611636 ps
T3141 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_in_transaction.4264755580 Sep 24 09:32:48 AM UTC 24 Sep 24 09:32:50 AM UTC 24 249359103 ps
T3142 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_out_transaction.4139854422 Sep 24 09:32:48 AM UTC 24 Sep 24 09:32:50 AM UTC 24 158097399 ps
T3143 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_link_in_err.2496130189 Sep 24 09:32:47 AM UTC 24 Sep 24 09:32:50 AM UTC 24 199696837 ps
T3144 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_in_transaction.2604705898 Sep 24 09:32:48 AM UTC 24 Sep 24 09:32:50 AM UTC 24 223697006 ps
T3145 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_phy_pins_sense.3115035755 Sep 24 09:32:48 AM UTC 24 Sep 24 09:32:50 AM UTC 24 87072979 ps
T3146 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_pending_in_trans.3216109518 Sep 24 09:32:48 AM UTC 24 Sep 24 09:32:50 AM UTC 24 162244126 ps
T150 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_nak_trans.3220066606 Sep 24 09:32:48 AM UTC 24 Sep 24 09:32:50 AM UTC 24 153848186 ps
T3147 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_out_trans_nak.3553178412 Sep 24 09:32:48 AM UTC 24 Sep 24 09:32:50 AM UTC 24 149184901 ps
T3148 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_out_iso.3315222886 Sep 24 09:32:48 AM UTC 24 Sep 24 09:32:50 AM UTC 24 189197735 ps
T3149 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_out_stall.3604154779 Sep 24 09:32:48 AM UTC 24 Sep 24 09:32:50 AM UTC 24 167573989 ps
T3150 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_received.3439662610 Sep 24 09:32:48 AM UTC 24 Sep 24 09:32:50 AM UTC 24 189001766 ps
T3151 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_usb_ref_disable.5523663 Sep 24 09:32:48 AM UTC 24 Sep 24 09:32:50 AM UTC 24 219307260 ps
T3152 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_min_inter_pkt_delay.2835594573 Sep 24 09:31:48 AM UTC 24 Sep 24 09:32:50 AM UTC 24 2508559750 ps
T3153 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_rst.3511121162 Sep 24 09:32:47 AM UTC 24 Sep 24 09:32:50 AM UTC 24 283960145 ps
T3154 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_pinflip.2804566701 Sep 24 09:32:48 AM UTC 24 Sep 24 09:32:51 AM UTC 24 229671292 ps
T3155 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_sent.109184759 Sep 24 09:32:48 AM UTC 24 Sep 24 09:32:51 AM UTC 24 240036865 ps
T3156 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.3255485246 Sep 24 09:32:19 AM UTC 24 Sep 24 09:32:51 AM UTC 24 24576466498 ps
T3157 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_link_suspend.1269256196 Sep 24 09:32:47 AM UTC 24 Sep 24 09:33:03 AM UTC 24 10778186383 ps
T3158 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.2092688969 Sep 24 09:32:48 AM UTC 24 Sep 24 09:33:05 AM UTC 24 2108543333 ps
T3159 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_invalid_sync.4190692676 Sep 24 09:32:47 AM UTC 24 Sep 24 09:33:06 AM UTC 24 2665621204 ps
T3160 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_iso_retraction.1466110999 Sep 24 09:31:48 AM UTC 24 Sep 24 09:33:07 AM UTC 24 7752112848 ps
T3161 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.2803010277 Sep 24 09:32:20 AM UTC 24 Sep 24 09:33:12 AM UTC 24 33631439888 ps
T3162 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.1026302353 Sep 24 09:32:48 AM UTC 24 Sep 24 09:33:13 AM UTC 24 2751553221 ps
T3163 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_spurious_pids_ignored.3827558260 Sep 24 09:32:19 AM UTC 24 Sep 24 09:33:14 AM UTC 24 2162398503 ps
T3164 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_setup_stage.3481865093 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:18 AM UTC 24 149161883 ps
T3165 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_rx_crc_err.3898023708 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:18 AM UTC 24 153842371 ps
T3166 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_in_transaction.1381507785 Sep 24 09:33:15 AM UTC 24 Sep 24 09:33:18 AM UTC 24 166291908 ps
T3167 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_out_transaction.3221207383 Sep 24 09:33:15 AM UTC 24 Sep 24 09:33:18 AM UTC 24 198327035 ps
T3168 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_setup_trans_ignored.639532458 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:18 AM UTC 24 146423908 ps
T3169 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_stall_trans.4271937762 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:18 AM UTC 24 176912593 ps
T3170 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_stall_priority_over_nak.783294576 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:18 AM UTC 24 182406774 ps
T3171 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_rx_full.1365915314 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:18 AM UTC 24 259612669 ps
T377 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/113.usbdev_fifo_levels.2380839182 Sep 24 09:38:16 AM UTC 24 Sep 24 09:38:18 AM UTC 24 195023731 ps
T3172 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_alert_test.980192084 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:18 AM UTC 24 113625040 ps
T580 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.1144602331 Sep 24 09:38:16 AM UTC 24 Sep 24 09:38:18 AM UTC 24 380576174 ps
T3173 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_smoke.1841912305 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:18 AM UTC 24 256464009 ps
T3174 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_av_buffer.140112418 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:18 AM UTC 24 149669164 ps
T3175 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_bitstuff_err.286692910 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:18 AM UTC 24 147570717 ps
T3176 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_disconnected.3471322655 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:18 AM UTC 24 158102681 ps
T3177 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_clear.3723252425 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:19 AM UTC 24 332524400 ps
T3178 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_tx_rx_disruption.1015017662 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:19 AM UTC 24 600814901 ps
T3179 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_disable_endpoint.1363089408 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:19 AM UTC 24 576068733 ps
T3180 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_stream_len_max.1672209783 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:19 AM UTC 24 948197540 ps
T3181 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_restore.2113681924 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:20 AM UTC 24 1112250878 ps
T3182 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_disconnect.3280851079 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:31 AM UTC 24 9379040519 ps
T3183 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.4193479971 Sep 24 09:32:48 AM UTC 24 Sep 24 09:33:32 AM UTC 24 16651411357 ps
T3184 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_streaming_out.2529516580 Sep 24 09:32:19 AM UTC 24 Sep 24 09:33:33 AM UTC 24 2961157412 ps
T3185 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_timeout_missing_host_handshake.2423819421 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:33 AM UTC 24 2000777821 ps
T3186 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.3255523772 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:41 AM UTC 24 19493791753 ps
T3187 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_low_speed_traffic.1345624809 Sep 24 09:31:48 AM UTC 24 Sep 24 09:33:42 AM UTC 24 4643461554 ps
T3188 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_streaming_out.1038242607 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:44 AM UTC 24 2851723348 ps
T3189 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_link_resume.1144888057 Sep 24 09:32:47 AM UTC 24 Sep 24 09:33:46 AM UTC 24 32414203821 ps
T3190 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.630595296 Sep 24 09:33:16 AM UTC 24 Sep 24 09:33:49 AM UTC 24 26113660986 ps
T3191 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_enable.2441660612 Sep 24 09:33:47 AM UTC 24 Sep 24 09:33:49 AM UTC 24 43315492 ps
T3192 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_levels.2394597080 Sep 24 09:33:47 AM UTC 24 Sep 24 09:33:49 AM UTC 24 186413873 ps
T3193 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_in_stall.2290269934 Sep 24 09:33:47 AM UTC 24 Sep 24 09:33:49 AM UTC 24 182246958 ps
T558 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_types.4074188691 Sep 24 09:33:47 AM UTC 24 Sep 24 09:33:49 AM UTC 24 399989500 ps
T3194 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_in_trans.708822970 Sep 24 09:33:47 AM UTC 24 Sep 24 09:33:49 AM UTC 24 223368675 ps
T3195 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_link_in_err.3468039947 Sep 24 09:33:47 AM UTC 24 Sep 24 09:33:49 AM UTC 24 226259186 ps
T3196 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_out_transaction.1523135796 Sep 24 09:33:47 AM UTC 24 Sep 24 09:33:49 AM UTC 24 163950363 ps
T3197 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_out_transaction.4224321582 Sep 24 09:33:47 AM UTC 24 Sep 24 09:33:49 AM UTC 24 260985925 ps
T3198 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_in_iso.2458062865 Sep 24 09:33:47 AM UTC 24 Sep 24 09:33:49 AM UTC 24 228194640 ps
T3199 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_out_stall.1675997766 Sep 24 09:33:48 AM UTC 24 Sep 24 09:33:49 AM UTC 24 166506308 ps
T3200 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_phy_pins_sense.2747960318 Sep 24 09:33:48 AM UTC 24 Sep 24 09:33:50 AM UTC 24 44278112 ps
T3201 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_out_iso.2949906187 Sep 24 09:33:47 AM UTC 24 Sep 24 09:33:50 AM UTC 24 240733482 ps
T3202 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_nak_trans.3318241546 Sep 24 09:33:47 AM UTC 24 Sep 24 09:33:50 AM UTC 24 230997678 ps
T3203 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_in_transaction.2733651568 Sep 24 09:33:47 AM UTC 24 Sep 24 09:33:50 AM UTC 24 160239421 ps
T3204 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_in_transaction.2998036501 Sep 24 09:33:47 AM UTC 24 Sep 24 09:33:50 AM UTC 24 260726001 ps
T3205 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_usb_ref_disable.1011731614 Sep 24 09:33:48 AM UTC 24 Sep 24 09:33:50 AM UTC 24 151345114 ps
T3206 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_pending_in_trans.2437735007 Sep 24 09:33:48 AM UTC 24 Sep 24 09:33:50 AM UTC 24 153326175 ps
T3207 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_out_trans_nak.4212339750 Sep 24 09:33:48 AM UTC 24 Sep 24 09:33:50 AM UTC 24 191111648 ps
T3208 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_pinflip.646872489 Sep 24 09:33:48 AM UTC 24 Sep 24 09:33:50 AM UTC 24 187574193 ps
T3209 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_access.3974923324 Sep 24 09:33:47 AM UTC 24 Sep 24 09:33:50 AM UTC 24 664820352 ps
T3210 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_rst.1100105451 Sep 24 09:33:47 AM UTC 24 Sep 24 09:33:51 AM UTC 24 383933892 ps
T3211 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_link_suspend.2776842333 Sep 24 09:33:47 AM UTC 24 Sep 24 09:34:02 AM UTC 24 10651955699 ps
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