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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.41 98.21 96.12 97.44 94.92 98.38 98.21 98.55


Total test records in report: 3901
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T2494 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_out_transaction.2879462030 Sep 24 09:21:48 AM UTC 24 Sep 24 09:21:50 AM UTC 24 168907955 ps
T2495 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_pending_in_trans.3909870919 Sep 24 09:21:48 AM UTC 24 Sep 24 09:21:50 AM UTC 24 150900918 ps
T2496 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_out_trans_nak.3731154399 Sep 24 09:21:47 AM UTC 24 Sep 24 09:21:50 AM UTC 24 161831406 ps
T2497 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_phy_pins_sense.3704182057 Sep 24 09:21:48 AM UTC 24 Sep 24 09:21:50 AM UTC 24 32121091 ps
T2498 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_setup_stage.1536458978 Sep 24 09:21:48 AM UTC 24 Sep 24 09:21:50 AM UTC 24 148324168 ps
T154 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_nak_trans.2216519800 Sep 24 09:21:47 AM UTC 24 Sep 24 09:21:50 AM UTC 24 200886720 ps
T2499 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_received.1261007185 Sep 24 09:21:48 AM UTC 24 Sep 24 09:21:50 AM UTC 24 207756137 ps
T2500 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_stall_trans.1147730233 Sep 24 09:21:48 AM UTC 24 Sep 24 09:21:50 AM UTC 24 199946995 ps
T2501 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_in_transaction.3302533116 Sep 24 09:21:48 AM UTC 24 Sep 24 09:21:50 AM UTC 24 199030617 ps
T2502 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_setup_trans_ignored.304789034 Sep 24 09:21:48 AM UTC 24 Sep 24 09:21:51 AM UTC 24 148515760 ps
T2503 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_stall_priority_over_nak.4276381781 Sep 24 09:21:48 AM UTC 24 Sep 24 09:21:51 AM UTC 24 171746348 ps
T2504 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_smoke.2134789268 Sep 24 09:21:48 AM UTC 24 Sep 24 09:21:51 AM UTC 24 253435334 ps
T2505 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_sent.104384604 Sep 24 09:21:48 AM UTC 24 Sep 24 09:21:51 AM UTC 24 202096397 ps
T2506 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_rx_crc_err.1356328187 Sep 24 09:21:48 AM UTC 24 Sep 24 09:21:51 AM UTC 24 171571336 ps
T2507 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_pinflip.361655607 Sep 24 09:21:48 AM UTC 24 Sep 24 09:21:51 AM UTC 24 252050899 ps
T2508 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_alert_test.3132819767 Sep 24 09:21:48 AM UTC 24 Sep 24 09:21:51 AM UTC 24 50258895 ps
T2509 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_usb_ref_disable.957613638 Sep 24 09:21:48 AM UTC 24 Sep 24 09:21:51 AM UTC 24 171211286 ps
T2510 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_rx_full.2567530912 Sep 24 09:21:48 AM UTC 24 Sep 24 09:21:51 AM UTC 24 267886507 ps
T2511 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_stream_len_max.3571844388 Sep 24 09:21:48 AM UTC 24 Sep 24 09:21:51 AM UTC 24 490813585 ps
T2512 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_min_inter_pkt_delay.2764810787 Sep 24 09:20:43 AM UTC 24 Sep 24 09:21:53 AM UTC 24 2797346140 ps
T2513 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_disconnect.3542590175 Sep 24 09:21:48 AM UTC 24 Sep 24 09:22:06 AM UTC 24 10471205155 ps
T2514 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_streaming_out.1993648874 Sep 24 09:21:48 AM UTC 24 Sep 24 09:22:15 AM UTC 24 2831618472 ps
T2515 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_bitstuff_err.3397127948 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:16 AM UTC 24 150355912 ps
T2516 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_av_buffer.3176792635 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:16 AM UTC 24 213534984 ps
T2517 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_disconnected.751921554 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:16 AM UTC 24 144484968 ps
T353 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/140.usbdev_fifo_levels.3923958841 Sep 24 09:39:57 AM UTC 24 Sep 24 09:40:00 AM UTC 24 300273149 ps
T2518 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_enable.2502959902 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:16 AM UTC 24 57138353 ps
T2519 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_spurious_pids_ignored.3070678066 Sep 24 09:21:48 AM UTC 24 Sep 24 09:22:16 AM UTC 24 3743369407 ps
T579 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_types.3523311765 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:16 AM UTC 24 174777765 ps
T2520 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_rst.1855381979 Sep 24 09:23:03 AM UTC 24 Sep 24 09:23:07 AM UTC 24 377685788 ps
T2521 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_in_stall.2855093538 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:16 AM UTC 24 159929117 ps
T2522 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_restore.2448792373 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:16 AM UTC 24 303655171 ps
T2523 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_in_iso.628381256 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:16 AM UTC 24 191420735 ps
T2524 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_in_trans.262901350 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:16 AM UTC 24 172718319 ps
T2525 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_in_transaction.2114169788 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:16 AM UTC 24 241681643 ps
T2526 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_in_transaction.3209211334 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:17 AM UTC 24 187847879 ps
T2527 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_clear.2949717895 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:17 AM UTC 24 318394343 ps
T324 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_levels.1057588903 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:17 AM UTC 24 299594315 ps
T2528 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_rst.2012058974 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:17 AM UTC 24 309357188 ps
T2529 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_link_in_err.2790819442 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:17 AM UTC 24 237825320 ps
T2530 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_disable_endpoint.824388324 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:17 AM UTC 24 729167075 ps
T2531 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_out_transaction.2741624029 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:17 AM UTC 24 186487317 ps
T2532 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_access.289070818 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:18 AM UTC 24 927124673 ps
T2533 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_max_inter_pkt_delay.3262959241 Sep 24 09:21:25 AM UTC 24 Sep 24 09:22:21 AM UTC 24 2195850898 ps
T2534 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_link_suspend.3960964237 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:22 AM UTC 24 4920726839 ps
T2535 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_max_inter_pkt_delay.2571598676 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:29 AM UTC 24 1954757172 ps
T2536 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_timeout_missing_host_handshake.1350563963 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:29 AM UTC 24 744071336 ps
T2537 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_low_speed_traffic.2903426047 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:32 AM UTC 24 2482808181 ps
T2538 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_min_inter_pkt_delay.2208635415 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:33 AM UTC 24 2652289747 ps
T2539 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_device_timeout.2861128523 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:34 AM UTC 24 2511889317 ps
T2540 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_iso_retraction.857900483 Sep 24 09:21:25 AM UTC 24 Sep 24 09:22:35 AM UTC 24 11790779313 ps
T2541 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_out_trans_nak.1352631277 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:39 AM UTC 24 179951529 ps
T2542 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_out_iso.4157796549 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:39 AM UTC 24 158844491 ps
T2543 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_out_transaction.1441129517 Sep 24 09:22:37 AM UTC 24 Sep 24 09:22:39 AM UTC 24 144077895 ps
T2544 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_out_stall.3815710369 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:40 AM UTC 24 175177638 ps
T2545 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_nak_trans.12545331 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:40 AM UTC 24 227715782 ps
T2546 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_pending_in_trans.4111700355 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:40 AM UTC 24 174388515 ps
T2547 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_phy_pins_sense.3867318608 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:40 AM UTC 24 36590476 ps
T2548 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_pinflip.489216323 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:40 AM UTC 24 243674587 ps
T2549 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_usb_ref_disable.3858718858 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:40 AM UTC 24 220808387 ps
T2550 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_setup_stage.1199753286 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:40 AM UTC 24 154805201 ps
T2551 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_received.478775230 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:40 AM UTC 24 191233409 ps
T2552 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_in_transaction.3494112277 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:40 AM UTC 24 201741123 ps
T2553 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_rx_crc_err.3037152474 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:40 AM UTC 24 143233123 ps
T2554 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_out_transaction.3731169741 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:40 AM UTC 24 154973693 ps
T2555 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_setup_trans_ignored.2915398196 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:40 AM UTC 24 154019090 ps
T546 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/140.usbdev_endpoint_types.627941965 Sep 24 09:39:57 AM UTC 24 Sep 24 09:40:00 AM UTC 24 277892675 ps
T2556 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_sent.1573308181 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:40 AM UTC 24 165145295 ps
T2557 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_smoke.2176974102 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:41 AM UTC 24 190358620 ps
T2558 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_stall_trans.1378547850 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:41 AM UTC 24 172195299 ps
T2559 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_alert_test.490835145 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:41 AM UTC 24 100932841 ps
T2560 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_stall_priority_over_nak.4018583949 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:41 AM UTC 24 205103436 ps
T2561 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_rx_full.2223069322 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:41 AM UTC 24 391800388 ps
T2562 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_tx_rx_disruption.317834283 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:41 AM UTC 24 571179152 ps
T2563 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_stream_len_max.12449620 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:42 AM UTC 24 819540053 ps
T2564 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_reset.3962272309 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:42 AM UTC 24 20209506002 ps
T2565 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_resume.3186001124 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:48 AM UTC 24 24616357340 ps
T2566 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_buffer.3178299299 Sep 24 09:21:48 AM UTC 24 Sep 24 09:22:50 AM UTC 24 23324584549 ps
T2567 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_disconnect.2061413207 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:54 AM UTC 24 10291338101 ps
T2568 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_device_address.1889016097 Sep 24 09:22:14 AM UTC 24 Sep 24 09:22:55 AM UTC 24 23623041234 ps
T2569 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_buffer.2832842978 Sep 24 09:22:38 AM UTC 24 Sep 24 09:22:57 AM UTC 24 7559311615 ps
T2570 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_bitstuff_err.284209613 Sep 24 09:23:02 AM UTC 24 Sep 24 09:23:05 AM UTC 24 147103378 ps
T2571 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_av_buffer.3686504249 Sep 24 09:23:02 AM UTC 24 Sep 24 09:23:05 AM UTC 24 153986256 ps
T2572 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_enable.2598367827 Sep 24 09:23:03 AM UTC 24 Sep 24 09:23:05 AM UTC 24 44335182 ps
T2573 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_clear.3829846629 Sep 24 09:23:02 AM UTC 24 Sep 24 09:23:05 AM UTC 24 234763197 ps
T563 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_types.2378825065 Sep 24 09:23:03 AM UTC 24 Sep 24 09:23:05 AM UTC 24 183773739 ps
T2574 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_disconnected.1713102287 Sep 24 09:23:03 AM UTC 24 Sep 24 09:23:05 AM UTC 24 166027351 ps
T2575 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_link_resume.1150686148 Sep 24 09:22:14 AM UTC 24 Sep 24 09:23:06 AM UTC 24 33877200918 ps
T2576 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_disable_endpoint.2008101046 Sep 24 09:23:03 AM UTC 24 Sep 24 09:23:06 AM UTC 24 989027388 ps
T2577 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_levels.664179642 Sep 24 09:23:03 AM UTC 24 Sep 24 09:23:05 AM UTC 24 261583588 ps
T2578 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_in_stall.1835032823 Sep 24 09:23:03 AM UTC 24 Sep 24 09:23:05 AM UTC 24 180893719 ps
T2579 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_in_iso.1040788026 Sep 24 09:23:03 AM UTC 24 Sep 24 09:23:05 AM UTC 24 195868162 ps
T2580 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_in_trans.3858896916 Sep 24 09:23:03 AM UTC 24 Sep 24 09:23:05 AM UTC 24 167229537 ps
T2581 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_in_transaction.3470817539 Sep 24 09:23:03 AM UTC 24 Sep 24 09:23:06 AM UTC 24 293011932 ps
T2582 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_out_transaction.3010744717 Sep 24 09:23:03 AM UTC 24 Sep 24 09:23:06 AM UTC 24 188415865 ps
T2583 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_link_in_err.1389485395 Sep 24 09:23:03 AM UTC 24 Sep 24 09:23:06 AM UTC 24 227434360 ps
T2584 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_min_inter_pkt_delay.923747507 Sep 24 09:21:26 AM UTC 24 Sep 24 09:23:07 AM UTC 24 3950851449 ps
T2585 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_access.4263121502 Sep 24 09:23:03 AM UTC 24 Sep 24 09:23:07 AM UTC 24 939652013 ps
T2586 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_restore.2257695383 Sep 24 09:23:02 AM UTC 24 Sep 24 09:23:07 AM UTC 24 1111861126 ps
T2587 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_link_suspend.2348902374 Sep 24 09:23:03 AM UTC 24 Sep 24 09:23:18 AM UTC 24 9611581935 ps
T2588 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_in_transaction.1577614859 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:26 AM UTC 24 165058991 ps
T2589 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_out_transaction.299875426 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:27 AM UTC 24 206511662 ps
T2590 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_rx_full.4004159845 Sep 24 09:24:10 AM UTC 24 Sep 24 09:24:12 AM UTC 24 280388726 ps
T2591 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_nak_trans.4003849987 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:27 AM UTC 24 228437931 ps
T2592 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_out_transaction.1237586226 Sep 24 09:24:10 AM UTC 24 Sep 24 09:24:12 AM UTC 24 182408971 ps
T2593 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_usb_ref_disable.391277158 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:27 AM UTC 24 136797695 ps
T2594 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_out_iso.4140398580 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:27 AM UTC 24 147414903 ps
T2595 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_phy_pins_sense.2595858635 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:27 AM UTC 24 44575756 ps
T2596 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_out_stall.4178386670 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:27 AM UTC 24 167010595 ps
T2597 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_out_trans_nak.4093091645 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:27 AM UTC 24 184011875 ps
T2598 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_pending_in_trans.3706288011 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:27 AM UTC 24 142912826 ps
T2599 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_rx_crc_err.3521452458 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:27 AM UTC 24 136282354 ps
T2600 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_pinflip.286204016 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:27 AM UTC 24 248255519 ps
T2601 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_received.2396773033 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:27 AM UTC 24 187454504 ps
T2602 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_stall_priority_over_nak.1101226250 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:27 AM UTC 24 270906928 ps
T2603 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_smoke.2369924901 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:27 AM UTC 24 201200913 ps
T2604 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_setup_trans_ignored.2384712205 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:27 AM UTC 24 150716738 ps
T2605 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_setup_stage.618080684 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:27 AM UTC 24 191382379 ps
T2606 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_sent.745453910 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:28 AM UTC 24 235283384 ps
T2607 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_stream_len_max.320190883 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:28 AM UTC 24 260454479 ps
T2608 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_out_transaction.1343830299 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:28 AM UTC 24 167494816 ps
T2609 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_timeout_missing_host_handshake.1459003126 Sep 24 09:23:03 AM UTC 24 Sep 24 09:23:28 AM UTC 24 2949981738 ps
T2610 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_in_transaction.208081064 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:28 AM UTC 24 190829209 ps
T2611 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_stall_trans.1856021873 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:28 AM UTC 24 172081750 ps
T2612 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_rx_full.4166796654 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:28 AM UTC 24 464279661 ps
T2613 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_spurious_pids_ignored.2939078048 Sep 24 09:22:38 AM UTC 24 Sep 24 09:23:31 AM UTC 24 2151705984 ps
T2614 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_device_timeout.3187099299 Sep 24 09:23:02 AM UTC 24 Sep 24 09:23:39 AM UTC 24 1666329296 ps
T2615 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_invalid_sync.3236906384 Sep 24 09:22:14 AM UTC 24 Sep 24 09:23:39 AM UTC 24 3298109710 ps
T2616 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_streaming_out.730404377 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:40 AM UTC 24 1575540407 ps
T2617 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_max_inter_pkt_delay.3766760567 Sep 24 09:23:03 AM UTC 24 Sep 24 09:23:44 AM UTC 24 1601627352 ps
T2618 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_resume.1803848621 Sep 24 09:23:02 AM UTC 24 Sep 24 09:23:45 AM UTC 24 31235848776 ps
T2619 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_link_resume.2151869287 Sep 24 09:23:03 AM UTC 24 Sep 24 09:23:47 AM UTC 24 24235375781 ps
T2620 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/143.usbdev_fifo_levels.435359427 Sep 24 09:39:58 AM UTC 24 Sep 24 09:40:00 AM UTC 24 184463092 ps
T2621 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_alert_test.195130447 Sep 24 09:23:46 AM UTC 24 Sep 24 09:23:47 AM UTC 24 36104577 ps
T2622 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_pinflip.2586091928 Sep 24 09:24:10 AM UTC 24 Sep 24 09:24:12 AM UTC 24 248626235 ps
T2623 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_bitstuff_err.2021647803 Sep 24 09:23:46 AM UTC 24 Sep 24 09:23:48 AM UTC 24 168999625 ps
T2624 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_av_buffer.518860575 Sep 24 09:23:46 AM UTC 24 Sep 24 09:23:48 AM UTC 24 189883879 ps
T2625 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_enable.1591787500 Sep 24 09:23:46 AM UTC 24 Sep 24 09:23:48 AM UTC 24 37239968 ps
T2626 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_clear.2731851671 Sep 24 09:23:46 AM UTC 24 Sep 24 09:23:48 AM UTC 24 278191241 ps
T2627 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_disconnected.1494791625 Sep 24 09:23:46 AM UTC 24 Sep 24 09:23:48 AM UTC 24 150287126 ps
T2628 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_tx_rx_disruption.2501287507 Sep 24 09:23:45 AM UTC 24 Sep 24 09:23:48 AM UTC 24 630507433 ps
T2629 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_in_iso.4018244063 Sep 24 09:23:46 AM UTC 24 Sep 24 09:23:49 AM UTC 24 178525595 ps
T2630 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_levels.818403980 Sep 24 09:23:46 AM UTC 24 Sep 24 09:23:49 AM UTC 24 195209669 ps
T2631 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_in_stall.972784852 Sep 24 09:23:46 AM UTC 24 Sep 24 09:23:49 AM UTC 24 177544461 ps
T570 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_types.607374556 Sep 24 09:23:46 AM UTC 24 Sep 24 09:23:49 AM UTC 24 577330616 ps
T2632 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_in_trans.1927137521 Sep 24 09:23:46 AM UTC 24 Sep 24 09:23:49 AM UTC 24 196579929 ps
T2633 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_disable_endpoint.3744223186 Sep 24 09:23:46 AM UTC 24 Sep 24 09:23:49 AM UTC 24 814678074 ps
T2634 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_restore.2093847174 Sep 24 09:23:46 AM UTC 24 Sep 24 09:23:49 AM UTC 24 673340083 ps
T2635 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_rst.816580463 Sep 24 09:23:46 AM UTC 24 Sep 24 09:23:49 AM UTC 24 279290772 ps
T2636 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_access.269567326 Sep 24 09:23:46 AM UTC 24 Sep 24 09:23:50 AM UTC 24 870887758 ps
T2637 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_spurious_pids_ignored.1615937811 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:53 AM UTC 24 2833283992 ps
T2638 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_disconnect.4057787378 Sep 24 09:23:46 AM UTC 24 Sep 24 09:23:53 AM UTC 24 4621944117 ps
T2639 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_buffer.1061408160 Sep 24 09:23:25 AM UTC 24 Sep 24 09:23:57 AM UTC 24 11134755592 ps
T2640 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_device_address.4193726868 Sep 24 09:23:02 AM UTC 24 Sep 24 09:23:59 AM UTC 24 28423992679 ps
T2641 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_reset.3025129550 Sep 24 09:23:46 AM UTC 24 Sep 24 09:24:05 AM UTC 24 15019556689 ps
T2642 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_streaming_out.3834897754 Sep 24 09:22:38 AM UTC 24 Sep 24 09:24:07 AM UTC 24 3460174519 ps
T2643 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_iso_retraction.4110535179 Sep 24 09:22:14 AM UTC 24 Sep 24 09:24:09 AM UTC 24 10435260413 ps
T2644 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_link_in_err.1475838691 Sep 24 09:24:09 AM UTC 24 Sep 24 09:24:11 AM UTC 24 248828827 ps
T2645 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_in_transaction.90547366 Sep 24 09:24:09 AM UTC 24 Sep 24 09:24:12 AM UTC 24 146066006 ps
T2646 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_in_transaction.495256026 Sep 24 09:24:09 AM UTC 24 Sep 24 09:24:12 AM UTC 24 236482286 ps
T2647 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_out_transaction.216377943 Sep 24 09:24:09 AM UTC 24 Sep 24 09:24:12 AM UTC 24 150463738 ps
T2648 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_phy_pins_sense.2574030733 Sep 24 09:24:10 AM UTC 24 Sep 24 09:24:12 AM UTC 24 33557578 ps
T2649 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_usb_ref_disable.4226524063 Sep 24 09:24:10 AM UTC 24 Sep 24 09:24:12 AM UTC 24 161540690 ps
T2650 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_out_trans_nak.100278156 Sep 24 09:24:10 AM UTC 24 Sep 24 09:24:12 AM UTC 24 160725430 ps
T2651 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_out_transaction.3193931610 Sep 24 09:24:09 AM UTC 24 Sep 24 09:24:12 AM UTC 24 220807602 ps
T2652 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_nak_trans.616708977 Sep 24 09:24:09 AM UTC 24 Sep 24 09:24:12 AM UTC 24 234965288 ps
T2653 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_out_stall.2083314945 Sep 24 09:24:10 AM UTC 24 Sep 24 09:24:12 AM UTC 24 183127747 ps
T2654 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_pending_in_trans.2382170443 Sep 24 09:24:10 AM UTC 24 Sep 24 09:24:12 AM UTC 24 169114764 ps
T2655 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_rx_crc_err.256761473 Sep 24 09:24:10 AM UTC 24 Sep 24 09:24:12 AM UTC 24 136897403 ps
T2656 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_out_iso.2957884663 Sep 24 09:24:10 AM UTC 24 Sep 24 09:24:12 AM UTC 24 167084204 ps
T2657 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_sent.1844541553 Sep 24 09:24:10 AM UTC 24 Sep 24 09:24:12 AM UTC 24 199901998 ps
T2658 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_iso_retraction.2710984743 Sep 24 09:23:03 AM UTC 24 Sep 24 09:24:12 AM UTC 24 11332323256 ps
T2659 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_received.28854182 Sep 24 09:24:10 AM UTC 24 Sep 24 09:24:12 AM UTC 24 184753923 ps
T2660 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_in_transaction.4033977471 Sep 24 09:24:10 AM UTC 24 Sep 24 09:24:12 AM UTC 24 266302630 ps
T2661 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_device_timeout.2697813040 Sep 24 09:23:46 AM UTC 24 Sep 24 09:24:16 AM UTC 24 1413190051 ps
T2662 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_timeout_missing_host_handshake.2063747044 Sep 24 09:23:46 AM UTC 24 Sep 24 09:24:17 AM UTC 24 3857861520 ps
T2663 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_min_inter_pkt_delay.1829914017 Sep 24 09:23:03 AM UTC 24 Sep 24 09:24:20 AM UTC 24 2992072332 ps
T2664 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_link_suspend.2495474058 Sep 24 09:24:09 AM UTC 24 Sep 24 09:24:21 AM UTC 24 8485979118 ps
T2665 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_link_resume.3930689769 Sep 24 09:24:09 AM UTC 24 Sep 24 09:24:26 AM UTC 24 12103903728 ps
T2666 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_resume.2238269598 Sep 24 09:23:46 AM UTC 24 Sep 24 09:24:29 AM UTC 24 30946458149 ps
T2667 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_device_address.1626719721 Sep 24 09:23:46 AM UTC 24 Sep 24 09:24:31 AM UTC 24 22083884942 ps
T2668 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_max_inter_pkt_delay.1185529711 Sep 24 09:24:09 AM UTC 24 Sep 24 09:24:35 AM UTC 24 2728974047 ps
T2669 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_disconnected.2519378014 Sep 24 09:25:31 AM UTC 24 Sep 24 09:25:33 AM UTC 24 141959936 ps
T2670 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_setup_trans_ignored.4237162255 Sep 24 09:24:35 AM UTC 24 Sep 24 09:24:38 AM UTC 24 162874867 ps
T2671 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_stream_len_max.2669532667 Sep 24 09:25:31 AM UTC 24 Sep 24 09:25:33 AM UTC 24 412803427 ps
T2672 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_smoke.1647948659 Sep 24 09:24:35 AM UTC 24 Sep 24 09:24:38 AM UTC 24 188279802 ps
T2673 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_stall_trans.504404304 Sep 24 09:24:36 AM UTC 24 Sep 24 09:24:38 AM UTC 24 229196832 ps
T2674 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_setup_stage.3045455603 Sep 24 09:24:35 AM UTC 24 Sep 24 09:24:38 AM UTC 24 152060028 ps
T2675 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_stall_priority_over_nak.3234085209 Sep 24 09:24:36 AM UTC 24 Sep 24 09:24:38 AM UTC 24 218780402 ps
T370 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/111.usbdev_fifo_levels.3895171626 Sep 24 09:38:16 AM UTC 24 Sep 24 09:38:18 AM UTC 24 294733720 ps
T2676 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_alert_test.272764518 Sep 24 09:24:36 AM UTC 24 Sep 24 09:24:38 AM UTC 24 79938751 ps
T2677 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_enable.168581001 Sep 24 09:25:31 AM UTC 24 Sep 24 09:25:33 AM UTC 24 43604863 ps
T555 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/137.usbdev_endpoint_types.3401099386 Sep 24 09:39:57 AM UTC 24 Sep 24 09:40:00 AM UTC 24 347878913 ps
T2678 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_av_buffer.589621242 Sep 24 09:24:36 AM UTC 24 Sep 24 09:24:38 AM UTC 24 205510379 ps
T2679 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_bitstuff_err.1440449990 Sep 24 09:24:36 AM UTC 24 Sep 24 09:24:38 AM UTC 24 148804819 ps
T2680 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_enable.57293712 Sep 24 09:24:36 AM UTC 24 Sep 24 09:24:38 AM UTC 24 37301040 ps
T2681 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_disconnected.3485492095 Sep 24 09:24:36 AM UTC 24 Sep 24 09:24:38 AM UTC 24 142894944 ps
T2682 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_stream_len_max.1328741427 Sep 24 09:24:36 AM UTC 24 Sep 24 09:24:39 AM UTC 24 331077311 ps
T2683 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_tx_rx_disruption.3986804402 Sep 24 09:24:36 AM UTC 24 Sep 24 09:24:39 AM UTC 24 495123761 ps
T521 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_types.1371101344 Sep 24 09:24:36 AM UTC 24 Sep 24 09:24:39 AM UTC 24 256896506 ps
T2684 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_levels.1779649642 Sep 24 09:24:36 AM UTC 24 Sep 24 09:24:39 AM UTC 24 271695691 ps
T2685 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_restore.3049449406 Sep 24 09:24:36 AM UTC 24 Sep 24 09:24:39 AM UTC 24 436637403 ps
T2686 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_clear.3505464064 Sep 24 09:24:36 AM UTC 24 Sep 24 09:24:39 AM UTC 24 411903513 ps
T2687 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_buffer.413514979 Sep 24 09:24:10 AM UTC 24 Sep 24 09:24:39 AM UTC 24 11469515780 ps
T2688 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_disable_endpoint.136184847 Sep 24 09:24:36 AM UTC 24 Sep 24 09:24:40 AM UTC 24 982236265 ps
T2689 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_access.3760985802 Sep 24 09:24:36 AM UTC 24 Sep 24 09:24:41 AM UTC 24 976560619 ps
T2690 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_device_timeout.1478858745 Sep 24 09:24:36 AM UTC 24 Sep 24 09:24:47 AM UTC 24 1555653331 ps
T2691 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_invalid_sync.2870465746 Sep 24 09:23:03 AM UTC 24 Sep 24 09:24:49 AM UTC 24 4072683332 ps
T2692 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_invalid_sync.3869482032 Sep 24 09:23:46 AM UTC 24 Sep 24 09:24:49 AM UTC 24 2539730896 ps
T2693 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_disconnect.3143590382 Sep 24 09:24:36 AM UTC 24 Sep 24 09:24:50 AM UTC 24 10092995706 ps
T2694 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_timeout_missing_host_handshake.3835089046 Sep 24 09:24:36 AM UTC 24 Sep 24 09:24:51 AM UTC 24 718650510 ps
T2695 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_reset.2791751050 Sep 24 09:24:36 AM UTC 24 Sep 24 09:24:55 AM UTC 24 13404333049 ps
T2696 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_streaming_out.1773932430 Sep 24 09:24:36 AM UTC 24 Sep 24 09:25:02 AM UTC 24 3446649169 ps
T2697 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_low_speed_traffic.3319007528 Sep 24 09:23:03 AM UTC 24 Sep 24 09:25:02 AM UTC 24 4761258883 ps
T2698 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_in_stall.1115817417 Sep 24 09:25:05 AM UTC 24 Sep 24 09:25:07 AM UTC 24 153248901 ps
T2699 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_in_trans.4194735423 Sep 24 09:25:05 AM UTC 24 Sep 24 09:25:07 AM UTC 24 171575200 ps
T2700 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_link_in_err.23154271 Sep 24 09:25:05 AM UTC 24 Sep 24 09:25:07 AM UTC 24 231118155 ps
T2701 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_in_iso.4041564519 Sep 24 09:25:05 AM UTC 24 Sep 24 09:25:07 AM UTC 24 262167422 ps
T481 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/138.usbdev_endpoint_types.1387944797 Sep 24 09:39:57 AM UTC 24 Sep 24 09:40:00 AM UTC 24 405775825 ps
T2702 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_out_transaction.2359256107 Sep 24 09:25:05 AM UTC 24 Sep 24 09:25:07 AM UTC 24 213918781 ps
T2703 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_in_transaction.1561757292 Sep 24 09:25:05 AM UTC 24 Sep 24 09:25:07 AM UTC 24 172010187 ps
T2704 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_usb_ref_disable.1410449360 Sep 24 09:25:05 AM UTC 24 Sep 24 09:25:07 AM UTC 24 149710369 ps
T2705 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_pending_in_trans.572675638 Sep 24 09:25:05 AM UTC 24 Sep 24 09:25:07 AM UTC 24 153529308 ps
T2706 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_nak_trans.2894379166 Sep 24 09:25:05 AM UTC 24 Sep 24 09:25:07 AM UTC 24 217484123 ps
T2707 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_out_trans_nak.2413731035 Sep 24 09:25:05 AM UTC 24 Sep 24 09:25:07 AM UTC 24 173268777 ps
T2708 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_phy_pins_sense.1699914058 Sep 24 09:25:06 AM UTC 24 Sep 24 09:25:07 AM UTC 24 27314317 ps
T2709 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_out_stall.1470013561 Sep 24 09:25:05 AM UTC 24 Sep 24 09:25:08 AM UTC 24 155716955 ps
T2710 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_out_transaction.2184825256 Sep 24 09:25:05 AM UTC 24 Sep 24 09:25:08 AM UTC 24 192424615 ps
T2711 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_received.468798244 Sep 24 09:25:06 AM UTC 24 Sep 24 09:25:08 AM UTC 24 188970437 ps
T2712 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_sent.2407572411 Sep 24 09:25:06 AM UTC 24 Sep 24 09:25:08 AM UTC 24 230006367 ps
T2713 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_pinflip.4041940816 Sep 24 09:25:05 AM UTC 24 Sep 24 09:25:08 AM UTC 24 226804926 ps
T2714 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_in_transaction.1100936009 Sep 24 09:25:05 AM UTC 24 Sep 24 09:25:08 AM UTC 24 240116763 ps
T2715 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_out_transaction.1346157251 Sep 24 09:25:06 AM UTC 24 Sep 24 09:25:08 AM UTC 24 221545344 ps
T2716 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_out_iso.879759437 Sep 24 09:25:05 AM UTC 24 Sep 24 09:25:08 AM UTC 24 239491716 ps
T2717 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_in_transaction.2180614844 Sep 24 09:25:06 AM UTC 24 Sep 24 09:25:08 AM UTC 24 252603356 ps
T2718 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_rst.1597774885 Sep 24 09:25:05 AM UTC 24 Sep 24 09:25:08 AM UTC 24 265740759 ps
T2719 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_resume.909059307 Sep 24 09:24:36 AM UTC 24 Sep 24 09:25:19 AM UTC 24 30255853812 ps
T2720 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_link_suspend.2517693998 Sep 24 09:25:05 AM UTC 24 Sep 24 09:25:21 AM UTC 24 11297426175 ps
T2721 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_device_address.1038774886 Sep 24 09:24:36 AM UTC 24 Sep 24 09:25:29 AM UTC 24 31649315815 ps
T2722 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_setup_trans_ignored.245545267 Sep 24 09:25:30 AM UTC 24 Sep 24 09:25:32 AM UTC 24 155013854 ps
T2723 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_rx_crc_err.533807846 Sep 24 09:25:30 AM UTC 24 Sep 24 09:25:32 AM UTC 24 175204803 ps
T2724 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_setup_stage.1995208294 Sep 24 09:25:30 AM UTC 24 Sep 24 09:25:33 AM UTC 24 166647857 ps
T354 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/138.usbdev_fifo_levels.895294043 Sep 24 09:39:57 AM UTC 24 Sep 24 09:40:00 AM UTC 24 301972495 ps
T2725 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_spurious_pids_ignored.2946569600 Sep 24 09:24:36 AM UTC 24 Sep 24 09:25:33 AM UTC 24 2338071430 ps
T2726 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_alert_test.812049138 Sep 24 09:25:31 AM UTC 24 Sep 24 09:25:33 AM UTC 24 60465082 ps
T2727 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_av_buffer.1242188968 Sep 24 09:25:31 AM UTC 24 Sep 24 09:25:33 AM UTC 24 193009280 ps
T2728 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_stall_trans.2314160249 Sep 24 09:25:30 AM UTC 24 Sep 24 09:25:33 AM UTC 24 192740707 ps
T2729 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_rx_full.2123183376 Sep 24 09:25:30 AM UTC 24 Sep 24 09:25:33 AM UTC 24 274839418 ps
T2730 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/141.usbdev_endpoint_types.2935582810 Sep 24 09:39:58 AM UTC 24 Sep 24 09:40:00 AM UTC 24 301570587 ps
T2731 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_smoke.2308220876 Sep 24 09:25:30 AM UTC 24 Sep 24 09:25:33 AM UTC 24 187858890 ps
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