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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.41 98.21 96.12 97.44 94.92 98.38 98.21 98.55


Total test records in report: 3901
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T1778 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_pending_in_trans.4245124585 Sep 24 09:12:25 AM UTC 24 Sep 24 09:12:27 AM UTC 24 155015526 ps
T1779 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_buffer.3760352036 Sep 24 09:11:52 AM UTC 24 Sep 24 09:12:28 AM UTC 24 12854530520 ps
T1780 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_reset.268801730 Sep 24 09:12:04 AM UTC 24 Sep 24 09:12:32 AM UTC 24 20340822138 ps
T1781 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_resume.440381181 Sep 24 09:12:04 AM UTC 24 Sep 24 09:12:36 AM UTC 24 24806480394 ps
T1782 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_link_suspend.241158040 Sep 24 09:12:24 AM UTC 24 Sep 24 09:12:38 AM UTC 24 9491218737 ps
T1783 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_phy_pins_sense.3734250694 Sep 24 09:12:38 AM UTC 24 Sep 24 09:12:40 AM UTC 24 101996078 ps
T1784 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_sent.3738761964 Sep 24 09:12:38 AM UTC 24 Sep 24 09:12:40 AM UTC 24 189168749 ps
T1785 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_usb_ref_disable.2706962777 Sep 24 09:12:38 AM UTC 24 Sep 24 09:12:40 AM UTC 24 192625982 ps
T1786 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_rx_crc_err.3320574597 Sep 24 09:12:38 AM UTC 24 Sep 24 09:12:40 AM UTC 24 166425229 ps
T1787 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_link_suspend.425048274 Sep 24 09:13:00 AM UTC 24 Sep 24 09:13:20 AM UTC 24 10937321263 ps
T1788 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_in_transaction.984834213 Sep 24 09:12:38 AM UTC 24 Sep 24 09:12:40 AM UTC 24 212277236 ps
T1789 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_out_transaction.2978648467 Sep 24 09:12:38 AM UTC 24 Sep 24 09:12:40 AM UTC 24 213532706 ps
T1790 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_stream_len_max.189437680 Sep 24 09:13:17 AM UTC 24 Sep 24 09:13:20 AM UTC 24 715404926 ps
T1791 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_setup_stage.2598560922 Sep 24 09:12:38 AM UTC 24 Sep 24 09:12:41 AM UTC 24 207398462 ps
T1792 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_stall_trans.3439293392 Sep 24 09:12:38 AM UTC 24 Sep 24 09:12:41 AM UTC 24 193362294 ps
T1793 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_received.930073094 Sep 24 09:12:38 AM UTC 24 Sep 24 09:12:41 AM UTC 24 196397149 ps
T1794 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_rx_full.3611291136 Sep 24 09:12:38 AM UTC 24 Sep 24 09:12:41 AM UTC 24 307930851 ps
T1795 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_setup_trans_ignored.1565417729 Sep 24 09:12:38 AM UTC 24 Sep 24 09:12:41 AM UTC 24 156531362 ps
T1796 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_stall_priority_over_nak.2863930832 Sep 24 09:12:38 AM UTC 24 Sep 24 09:12:41 AM UTC 24 166881767 ps
T1797 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_smoke.4244317262 Sep 24 09:12:38 AM UTC 24 Sep 24 09:12:41 AM UTC 24 229217820 ps
T1798 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_tx_rx_disruption.1588245052 Sep 24 09:12:38 AM UTC 24 Sep 24 09:12:42 AM UTC 24 495313687 ps
T1799 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_stream_len_max.2108612739 Sep 24 09:12:38 AM UTC 24 Sep 24 09:12:43 AM UTC 24 1204521833 ps
T1800 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_max_inter_pkt_delay.2576009613 Sep 24 09:12:24 AM UTC 24 Sep 24 09:12:45 AM UTC 24 2096125081 ps
T1801 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_timeout_missing_host_handshake.4048423759 Sep 24 09:12:15 AM UTC 24 Sep 24 09:12:46 AM UTC 24 3840078091 ps
T1802 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_max_inter_pkt_delay.875728892 Sep 24 09:11:51 AM UTC 24 Sep 24 09:12:48 AM UTC 24 2316536308 ps
T1803 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_alert_test.3809318089 Sep 24 09:12:50 AM UTC 24 Sep 24 09:12:52 AM UTC 24 27461325 ps
T1804 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_bitstuff_err.1690985036 Sep 24 09:12:50 AM UTC 24 Sep 24 09:12:52 AM UTC 24 136545715 ps
T1805 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_disconnected.1075518958 Sep 24 09:12:50 AM UTC 24 Sep 24 09:12:52 AM UTC 24 156635238 ps
T1806 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_enable.2506754440 Sep 24 09:12:50 AM UTC 24 Sep 24 09:12:53 AM UTC 24 47399952 ps
T1807 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_av_buffer.4238869019 Sep 24 09:12:50 AM UTC 24 Sep 24 09:12:53 AM UTC 24 156265360 ps
T1808 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_levels.809298608 Sep 24 09:12:50 AM UTC 24 Sep 24 09:12:53 AM UTC 24 149551999 ps
T586 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_types.3259722553 Sep 24 09:12:50 AM UTC 24 Sep 24 09:12:53 AM UTC 24 221707864 ps
T1809 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_in_iso.3739680348 Sep 24 09:12:51 AM UTC 24 Sep 24 09:12:54 AM UTC 24 226328200 ps
T1810 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_clear.983414161 Sep 24 09:12:50 AM UTC 24 Sep 24 09:12:54 AM UTC 24 371129925 ps
T1811 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_disable_endpoint.3129099092 Sep 24 09:12:50 AM UTC 24 Sep 24 09:12:54 AM UTC 24 760355546 ps
T1812 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_device_address.2403731351 Sep 24 09:12:14 AM UTC 24 Sep 24 09:12:54 AM UTC 24 22871589460 ps
T1813 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_access.286421500 Sep 24 09:12:50 AM UTC 24 Sep 24 09:12:55 AM UTC 24 970355452 ps
T1814 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_rst.2461938889 Sep 24 09:12:50 AM UTC 24 Sep 24 09:12:55 AM UTC 24 387109124 ps
T1815 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_restore.2659850459 Sep 24 09:12:50 AM UTC 24 Sep 24 09:12:56 AM UTC 24 1037569998 ps
T1816 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_alert_test.349272318 Sep 24 09:13:17 AM UTC 24 Sep 24 09:13:19 AM UTC 24 71581605 ps
T1817 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_smoke.1344351624 Sep 24 09:13:17 AM UTC 24 Sep 24 09:13:19 AM UTC 24 210259191 ps
T1818 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_timeout_missing_host_handshake.3068388819 Sep 24 09:12:50 AM UTC 24 Sep 24 09:13:02 AM UTC 24 1593008218 ps
T1819 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_in_transaction.1935967429 Sep 24 09:13:00 AM UTC 24 Sep 24 09:13:02 AM UTC 24 236964220 ps
T1820 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_link_in_err.3673824690 Sep 24 09:13:00 AM UTC 24 Sep 24 09:13:02 AM UTC 24 216679760 ps
T1821 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_in_stall.2913767356 Sep 24 09:12:59 AM UTC 24 Sep 24 09:13:02 AM UTC 24 158006032 ps
T1822 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_in_transaction.3518880806 Sep 24 09:13:00 AM UTC 24 Sep 24 09:13:02 AM UTC 24 156868625 ps
T1823 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_in_trans.2407620207 Sep 24 09:12:59 AM UTC 24 Sep 24 09:13:02 AM UTC 24 230019887 ps
T1824 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_out_transaction.2379225672 Sep 24 09:13:00 AM UTC 24 Sep 24 09:13:02 AM UTC 24 246735404 ps
T134 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_nak_trans.2223508336 Sep 24 09:13:00 AM UTC 24 Sep 24 09:13:03 AM UTC 24 247820379 ps
T1825 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_out_transaction.2725306931 Sep 24 09:13:00 AM UTC 24 Sep 24 09:13:03 AM UTC 24 143883597 ps
T1826 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_buffer.596941677 Sep 24 09:12:38 AM UTC 24 Sep 24 09:13:06 AM UTC 24 9919782972 ps
T1827 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_disconnect.2918907503 Sep 24 09:12:50 AM UTC 24 Sep 24 09:13:08 AM UTC 24 10896431806 ps
T1828 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_usb_ref_disable.629848825 Sep 24 09:13:07 AM UTC 24 Sep 24 09:13:09 AM UTC 24 167073037 ps
T1829 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_out_stall.4119290478 Sep 24 09:13:07 AM UTC 24 Sep 24 09:13:09 AM UTC 24 145062288 ps
T1830 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_pending_in_trans.2077241380 Sep 24 09:13:07 AM UTC 24 Sep 24 09:13:10 AM UTC 24 148166724 ps
T1831 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_out_iso.3791284818 Sep 24 09:13:07 AM UTC 24 Sep 24 09:13:10 AM UTC 24 193384462 ps
T1832 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_phy_pins_sense.3892072059 Sep 24 09:13:07 AM UTC 24 Sep 24 09:13:10 AM UTC 24 88727780 ps
T1833 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_out_trans_nak.595869284 Sep 24 09:13:07 AM UTC 24 Sep 24 09:13:10 AM UTC 24 200829917 ps
T1834 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_sent.1267521740 Sep 24 09:13:07 AM UTC 24 Sep 24 09:13:10 AM UTC 24 217145519 ps
T1835 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_in_transaction.2981441758 Sep 24 09:13:08 AM UTC 24 Sep 24 09:13:10 AM UTC 24 258898649 ps
T1836 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_pinflip.948052369 Sep 24 09:13:07 AM UTC 24 Sep 24 09:13:10 AM UTC 24 237427435 ps
T1837 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_received.282769831 Sep 24 09:13:07 AM UTC 24 Sep 24 09:13:10 AM UTC 24 191558486 ps
T1838 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_max_non_iso_usb_traffic.1482212689 Sep 24 09:12:25 AM UTC 24 Sep 24 09:13:12 AM UTC 24 1782755461 ps
T1839 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_link_resume.681283753 Sep 24 09:12:24 AM UTC 24 Sep 24 09:13:14 AM UTC 24 28232360339 ps
T1840 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_link_resume.4166625544 Sep 24 09:13:00 AM UTC 24 Sep 24 09:13:14 AM UTC 24 6045337531 ps
T1841 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_min_inter_pkt_delay.2087055784 Sep 24 09:11:52 AM UTC 24 Sep 24 09:13:15 AM UTC 24 3035692359 ps
T1842 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_rx_crc_err.2148575955 Sep 24 09:13:16 AM UTC 24 Sep 24 09:13:19 AM UTC 24 176898211 ps
T1843 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_out_transaction.763654836 Sep 24 09:13:16 AM UTC 24 Sep 24 09:13:19 AM UTC 24 182746777 ps
T1844 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_setup_trans_ignored.1642994138 Sep 24 09:13:17 AM UTC 24 Sep 24 09:13:19 AM UTC 24 165057920 ps
T1845 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_rx_full.1008593442 Sep 24 09:13:16 AM UTC 24 Sep 24 09:13:19 AM UTC 24 389862749 ps
T1846 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_setup_stage.983181480 Sep 24 09:13:16 AM UTC 24 Sep 24 09:13:19 AM UTC 24 157224982 ps
T1847 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_stall_trans.757921009 Sep 24 09:13:17 AM UTC 24 Sep 24 09:13:19 AM UTC 24 191534408 ps
T1848 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_stall_priority_over_nak.701809882 Sep 24 09:13:17 AM UTC 24 Sep 24 09:13:19 AM UTC 24 241069423 ps
T1849 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_max_non_iso_usb_traffic.2569696469 Sep 24 09:13:00 AM UTC 24 Sep 24 09:13:21 AM UTC 24 1834503264 ps
T1850 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_min_inter_pkt_delay.2743454537 Sep 24 09:13:00 AM UTC 24 Sep 24 09:13:23 AM UTC 24 1976648294 ps
T1851 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_max_inter_pkt_delay.2710493367 Sep 24 09:13:00 AM UTC 24 Sep 24 09:13:23 AM UTC 24 2866452383 ps
T1852 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_enable.804361822 Sep 24 09:13:28 AM UTC 24 Sep 24 09:13:30 AM UTC 24 34248748 ps
T1853 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_restore.3574631324 Sep 24 09:14:12 AM UTC 24 Sep 24 09:14:16 AM UTC 24 697841189 ps
T1854 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_av_buffer.26703088 Sep 24 09:13:27 AM UTC 24 Sep 24 09:13:30 AM UTC 24 159128431 ps
T1855 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_bitstuff_err.1986920861 Sep 24 09:13:27 AM UTC 24 Sep 24 09:13:30 AM UTC 24 170046756 ps
T1856 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_disconnected.3553334047 Sep 24 09:13:28 AM UTC 24 Sep 24 09:13:30 AM UTC 24 141817275 ps
T1857 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_restore.894833621 Sep 24 09:13:27 AM UTC 24 Sep 24 09:13:30 AM UTC 24 340008070 ps
T1858 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_clear.1903982959 Sep 24 09:13:27 AM UTC 24 Sep 24 09:13:30 AM UTC 24 226051117 ps
T365 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_levels.2851699332 Sep 24 09:13:28 AM UTC 24 Sep 24 09:13:31 AM UTC 24 271092146 ps
T590 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_types.4034321104 Sep 24 09:13:28 AM UTC 24 Sep 24 09:13:31 AM UTC 24 326034825 ps
T1859 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_disable_endpoint.1996287963 Sep 24 09:13:28 AM UTC 24 Sep 24 09:13:32 AM UTC 24 1098439270 ps
T1860 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_rst.743465006 Sep 24 09:13:28 AM UTC 24 Sep 24 09:13:32 AM UTC 24 265779163 ps
T1861 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_access.1047920424 Sep 24 09:13:28 AM UTC 24 Sep 24 09:13:33 AM UTC 24 1003248582 ps
T1862 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_resume.1234828476 Sep 24 09:12:50 AM UTC 24 Sep 24 09:13:33 AM UTC 24 28900794160 ps
T1863 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_disconnect.3985404463 Sep 24 09:13:27 AM UTC 24 Sep 24 09:13:35 AM UTC 24 4877245523 ps
T1864 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_low_speed_traffic.3377644959 Sep 24 09:12:24 AM UTC 24 Sep 24 09:13:39 AM UTC 24 2847406302 ps
T1865 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_link_in_err.4040523535 Sep 24 09:13:38 AM UTC 24 Sep 24 09:13:40 AM UTC 24 250285406 ps
T1866 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_in_stall.1521724847 Sep 24 09:13:38 AM UTC 24 Sep 24 09:13:40 AM UTC 24 168961881 ps
T1867 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_out_transaction.3551873031 Sep 24 09:13:38 AM UTC 24 Sep 24 09:13:40 AM UTC 24 234534376 ps
T1868 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_in_iso.1807207955 Sep 24 09:13:38 AM UTC 24 Sep 24 09:13:40 AM UTC 24 206509663 ps
T1869 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_in_transaction.1450753888 Sep 24 09:13:38 AM UTC 24 Sep 24 09:13:41 AM UTC 24 161557625 ps
T140 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_nak_trans.4097580692 Sep 24 09:13:38 AM UTC 24 Sep 24 09:13:41 AM UTC 24 232225100 ps
T1870 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_in_trans.4023077483 Sep 24 09:13:38 AM UTC 24 Sep 24 09:13:41 AM UTC 24 282922222 ps
T1871 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_out_transaction.2470481435 Sep 24 09:13:38 AM UTC 24 Sep 24 09:13:41 AM UTC 24 199072559 ps
T1872 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_in_transaction.2799656282 Sep 24 09:13:38 AM UTC 24 Sep 24 09:13:41 AM UTC 24 281353599 ps
T1873 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_min_inter_pkt_delay.3307331795 Sep 24 09:12:25 AM UTC 24 Sep 24 09:13:43 AM UTC 24 2855329854 ps
T1874 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_invalid_sync.2822638256 Sep 24 09:12:15 AM UTC 24 Sep 24 09:13:45 AM UTC 24 3191348949 ps
T1875 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_buffer.1069683927 Sep 24 09:13:07 AM UTC 24 Sep 24 09:13:48 AM UTC 24 15523735921 ps
T1876 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_reset.986156220 Sep 24 09:13:27 AM UTC 24 Sep 24 09:13:49 AM UTC 24 14729865258 ps
T433 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_low_speed_traffic.1155011357 Sep 24 09:13:00 AM UTC 24 Sep 24 09:13:50 AM UTC 24 5077508069 ps
T1877 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_out_iso.713129907 Sep 24 09:13:49 AM UTC 24 Sep 24 09:13:51 AM UTC 24 209950238 ps
T1878 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_phy_pins_sense.1615413968 Sep 24 09:13:49 AM UTC 24 Sep 24 09:13:51 AM UTC 24 49080530 ps
T1879 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_out_trans_nak.1382406771 Sep 24 09:13:49 AM UTC 24 Sep 24 09:13:51 AM UTC 24 146819036 ps
T1880 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_out_stall.1410874049 Sep 24 09:13:49 AM UTC 24 Sep 24 09:13:51 AM UTC 24 147282279 ps
T1881 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_in_transaction.4014127335 Sep 24 09:13:49 AM UTC 24 Sep 24 09:13:51 AM UTC 24 191840471 ps
T1882 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_received.2292293544 Sep 24 09:13:49 AM UTC 24 Sep 24 09:13:51 AM UTC 24 178919341 ps
T1883 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_pending_in_trans.2121594335 Sep 24 09:13:49 AM UTC 24 Sep 24 09:13:52 AM UTC 24 240705273 ps
T1884 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_pinflip.878082088 Sep 24 09:13:49 AM UTC 24 Sep 24 09:13:52 AM UTC 24 225794348 ps
T1885 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_usb_ref_disable.3496003965 Sep 24 09:13:49 AM UTC 24 Sep 24 09:13:52 AM UTC 24 216566749 ps
T1886 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_sent.3512182038 Sep 24 09:13:49 AM UTC 24 Sep 24 09:13:52 AM UTC 24 216079725 ps
T1887 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_device_address.2331591789 Sep 24 09:12:50 AM UTC 24 Sep 24 09:13:54 AM UTC 24 35992022941 ps
T1888 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_spurious_pids_ignored.2075038222 Sep 24 09:12:38 AM UTC 24 Sep 24 09:13:57 AM UTC 24 2962388898 ps
T1889 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_link_suspend.4033128090 Sep 24 09:13:38 AM UTC 24 Sep 24 09:13:57 AM UTC 24 9775932353 ps
T1890 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_streaming_out.2561955743 Sep 24 09:12:38 AM UTC 24 Sep 24 09:13:57 AM UTC 24 2873444547 ps
T1891 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_device_address.3441517354 Sep 24 09:13:27 AM UTC 24 Sep 24 09:13:58 AM UTC 24 14315567425 ps
T1892 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_iso_retraction.3831355140 Sep 24 09:12:59 AM UTC 24 Sep 24 09:13:59 AM UTC 24 9211501586 ps
T1893 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_iso_retraction.2485705295 Sep 24 09:11:38 AM UTC 24 Sep 24 09:14:01 AM UTC 24 12304194939 ps
T1894 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_bitstuff_err.527737407 Sep 24 09:18:51 AM UTC 24 Sep 24 09:18:54 AM UTC 24 156493712 ps
T1895 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_smoke.2911286889 Sep 24 09:14:00 AM UTC 24 Sep 24 09:14:02 AM UTC 24 198675996 ps
T1896 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_stall_trans.2573148830 Sep 24 09:14:00 AM UTC 24 Sep 24 09:14:02 AM UTC 24 168345458 ps
T1897 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_disable_endpoint.3441257157 Sep 24 09:14:12 AM UTC 24 Sep 24 09:14:16 AM UTC 24 712368514 ps
T1898 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_setup_stage.4112956688 Sep 24 09:14:00 AM UTC 24 Sep 24 09:14:02 AM UTC 24 149349590 ps
T1899 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_out_transaction.1323149078 Sep 24 09:14:00 AM UTC 24 Sep 24 09:14:02 AM UTC 24 208046542 ps
T1900 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_rx_full.2773808858 Sep 24 09:14:00 AM UTC 24 Sep 24 09:14:02 AM UTC 24 255900454 ps
T1901 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_rx_crc_err.297131249 Sep 24 09:14:00 AM UTC 24 Sep 24 09:14:02 AM UTC 24 139009549 ps
T1902 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_setup_trans_ignored.515878889 Sep 24 09:14:00 AM UTC 24 Sep 24 09:14:02 AM UTC 24 153056405 ps
T1903 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_stall_priority_over_nak.4274059591 Sep 24 09:14:00 AM UTC 24 Sep 24 09:14:02 AM UTC 24 192456558 ps
T1904 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_alert_test.3701540705 Sep 24 09:14:00 AM UTC 24 Sep 24 09:14:02 AM UTC 24 34588446 ps
T1905 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_tx_rx_disruption.3119664330 Sep 24 09:14:00 AM UTC 24 Sep 24 09:14:03 AM UTC 24 514067357 ps
T1906 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_stream_len_max.977203014 Sep 24 09:14:00 AM UTC 24 Sep 24 09:14:04 AM UTC 24 1019797712 ps
T1907 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_timeout_missing_host_handshake.3204695467 Sep 24 09:13:28 AM UTC 24 Sep 24 09:14:07 AM UTC 24 5506293391 ps
T1908 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_resume.3230947542 Sep 24 09:13:27 AM UTC 24 Sep 24 09:14:08 AM UTC 24 31180957678 ps
T1909 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_buffer.232422022 Sep 24 09:13:49 AM UTC 24 Sep 24 09:14:10 AM UTC 24 6849268487 ps
T1910 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_device_timeout.798461579 Sep 24 09:13:28 AM UTC 24 Sep 24 09:14:12 AM UTC 24 1959568271 ps
T1911 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_av_buffer.1807420215 Sep 24 09:14:12 AM UTC 24 Sep 24 09:14:15 AM UTC 24 213847906 ps
T1912 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_enable.2262417798 Sep 24 09:14:12 AM UTC 24 Sep 24 09:14:15 AM UTC 24 39512504 ps
T1913 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_low_speed_traffic.1420126767 Sep 24 09:13:38 AM UTC 24 Sep 24 09:14:15 AM UTC 24 4716452359 ps
T1914 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_bitstuff_err.2893171144 Sep 24 09:14:12 AM UTC 24 Sep 24 09:14:15 AM UTC 24 146535341 ps
T1915 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_disconnected.3607755861 Sep 24 09:14:12 AM UTC 24 Sep 24 09:14:15 AM UTC 24 163392471 ps
T1916 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_clear.1056210327 Sep 24 09:14:12 AM UTC 24 Sep 24 09:14:15 AM UTC 24 302335796 ps
T1917 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_disconnect.906206453 Sep 24 09:14:00 AM UTC 24 Sep 24 09:14:16 AM UTC 24 9146473805 ps
T1918 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_in_stall.2079052566 Sep 24 09:14:12 AM UTC 24 Sep 24 09:14:16 AM UTC 24 174747878 ps
T333 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_levels.1016770743 Sep 24 09:14:12 AM UTC 24 Sep 24 09:14:16 AM UTC 24 249158864 ps
T1919 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_in_iso.2582052863 Sep 24 09:14:12 AM UTC 24 Sep 24 09:14:16 AM UTC 24 251134046 ps
T544 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_types.1898462474 Sep 24 09:14:12 AM UTC 24 Sep 24 09:14:16 AM UTC 24 431185150 ps
T1920 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_streaming_out.307034047 Sep 24 09:14:00 AM UTC 24 Sep 24 09:14:16 AM UTC 24 2106388760 ps
T1921 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_low_speed_traffic.3133251831 Sep 24 09:11:51 AM UTC 24 Sep 24 09:14:16 AM UTC 24 5322317433 ps
T1922 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_rst.3520710975 Sep 24 09:14:12 AM UTC 24 Sep 24 09:14:17 AM UTC 24 263029815 ps
T1923 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_access.2421127980 Sep 24 09:14:12 AM UTC 24 Sep 24 09:14:17 AM UTC 24 903585266 ps
T1924 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_invalid_sync.348846969 Sep 24 09:12:51 AM UTC 24 Sep 24 09:14:19 AM UTC 24 3470292549 ps
T1925 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_spurious_pids_ignored.1191807779 Sep 24 09:14:00 AM UTC 24 Sep 24 09:14:20 AM UTC 24 2822971149 ps
T1926 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_reset.4084865440 Sep 24 09:14:00 AM UTC 24 Sep 24 09:14:24 AM UTC 24 18929729777 ps
T1927 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_in_trans.2750588663 Sep 24 09:14:23 AM UTC 24 Sep 24 09:14:25 AM UTC 24 190493955 ps
T1928 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_link_in_err.904951514 Sep 24 09:14:23 AM UTC 24 Sep 24 09:14:25 AM UTC 24 239551192 ps
T1929 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_link_resume.3380306786 Sep 24 09:13:38 AM UTC 24 Sep 24 09:14:25 AM UTC 24 30224104698 ps
T1930 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_in_transaction.3396174198 Sep 24 09:14:23 AM UTC 24 Sep 24 09:14:26 AM UTC 24 235220549 ps
T1931 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_in_transaction.3239850700 Sep 24 09:14:24 AM UTC 24 Sep 24 09:14:26 AM UTC 24 154758893 ps
T1932 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_out_transaction.137025987 Sep 24 09:14:23 AM UTC 24 Sep 24 09:14:26 AM UTC 24 199837403 ps
T1933 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_out_stall.855495775 Sep 24 09:14:24 AM UTC 24 Sep 24 09:14:26 AM UTC 24 188027072 ps
T1934 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_out_transaction.2986338430 Sep 24 09:14:24 AM UTC 24 Sep 24 09:14:26 AM UTC 24 150011062 ps
T141 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_nak_trans.1594742310 Sep 24 09:14:24 AM UTC 24 Sep 24 09:14:26 AM UTC 24 186168625 ps
T1935 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_usb_ref_disable.4102914330 Sep 24 09:14:24 AM UTC 24 Sep 24 09:14:26 AM UTC 24 140740026 ps
T1936 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_pinflip.1477976892 Sep 24 09:14:24 AM UTC 24 Sep 24 09:14:26 AM UTC 24 238532173 ps
T1937 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_out_trans_nak.3639877287 Sep 24 09:14:24 AM UTC 24 Sep 24 09:14:26 AM UTC 24 175540336 ps
T1938 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_pending_in_trans.3729687012 Sep 24 09:14:24 AM UTC 24 Sep 24 09:14:26 AM UTC 24 155649891 ps
T1939 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_out_iso.3847555146 Sep 24 09:14:24 AM UTC 24 Sep 24 09:14:26 AM UTC 24 250379175 ps
T1940 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_iso_retraction.1351391803 Sep 24 09:13:38 AM UTC 24 Sep 24 09:14:30 AM UTC 24 7741291430 ps
T1941 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_streaming_out.1977311624 Sep 24 09:13:17 AM UTC 24 Sep 24 09:14:35 AM UTC 24 2869903712 ps
T1942 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_link_suspend.366713163 Sep 24 09:14:23 AM UTC 24 Sep 24 09:14:38 AM UTC 24 9381892134 ps
T1943 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_received.1622356300 Sep 24 09:14:36 AM UTC 24 Sep 24 09:14:38 AM UTC 24 175200654 ps
T1944 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_phy_pins_sense.2733687341 Sep 24 09:14:36 AM UTC 24 Sep 24 09:14:38 AM UTC 24 32994743 ps
T1945 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_sent.1226583522 Sep 24 09:14:36 AM UTC 24 Sep 24 09:14:38 AM UTC 24 251834542 ps
T1946 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_rx_crc_err.2540144437 Sep 24 09:14:36 AM UTC 24 Sep 24 09:14:38 AM UTC 24 195299524 ps
T1947 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_reset.1981584426 Sep 24 09:16:36 AM UTC 24 Sep 24 09:17:03 AM UTC 24 20544474360 ps
T1948 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_out_transaction.2977455270 Sep 24 09:14:36 AM UTC 24 Sep 24 09:14:39 AM UTC 24 184554041 ps
T1949 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_alert_test.2798101073 Sep 24 09:14:36 AM UTC 24 Sep 24 09:14:39 AM UTC 24 40254453 ps
T1950 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_setup_stage.3670952995 Sep 24 09:14:36 AM UTC 24 Sep 24 09:14:39 AM UTC 24 157556821 ps
T1951 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_setup_trans_ignored.917165276 Sep 24 09:14:36 AM UTC 24 Sep 24 09:14:39 AM UTC 24 206577469 ps
T1952 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_stall_priority_over_nak.4226021853 Sep 24 09:14:36 AM UTC 24 Sep 24 09:14:39 AM UTC 24 174885575 ps
T1953 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_in_transaction.1587878353 Sep 24 09:14:36 AM UTC 24 Sep 24 09:14:39 AM UTC 24 281178518 ps
T1954 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_smoke.1957258108 Sep 24 09:14:36 AM UTC 24 Sep 24 09:14:39 AM UTC 24 196383968 ps
T1955 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_stall_trans.1938069854 Sep 24 09:14:36 AM UTC 24 Sep 24 09:14:39 AM UTC 24 173662542 ps
T1956 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_spurious_pids_ignored.1979373210 Sep 24 09:13:17 AM UTC 24 Sep 24 09:14:39 AM UTC 24 3035128648 ps
T1957 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_min_inter_pkt_delay.1088496133 Sep 24 09:13:38 AM UTC 24 Sep 24 09:14:39 AM UTC 24 2325888501 ps
T1958 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_rx_full.1016729141 Sep 24 09:14:36 AM UTC 24 Sep 24 09:14:39 AM UTC 24 368791648 ps
T1959 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_stream_len_max.2250194843 Sep 24 09:14:36 AM UTC 24 Sep 24 09:14:40 AM UTC 24 729713920 ps
T1960 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_tx_rx_disruption.2807054666 Sep 24 09:14:36 AM UTC 24 Sep 24 09:14:40 AM UTC 24 553757237 ps
T1961 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_max_inter_pkt_delay.69518399 Sep 24 09:14:23 AM UTC 24 Sep 24 09:14:44 AM UTC 24 2855836134 ps
T1962 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_max_inter_pkt_delay.1715619910 Sep 24 09:13:38 AM UTC 24 Sep 24 09:14:44 AM UTC 24 2415595927 ps
T1963 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_invalid_sync.4186363423 Sep 24 09:13:38 AM UTC 24 Sep 24 09:14:44 AM UTC 24 2447162189 ps
T1964 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_disconnect.1462072121 Sep 24 09:14:36 AM UTC 24 Sep 24 09:14:45 AM UTC 24 4786350124 ps
T1965 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_timeout_missing_host_handshake.3648383788 Sep 24 09:14:12 AM UTC 24 Sep 24 09:14:46 AM UTC 24 1568109212 ps
T1966 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_iso_retraction.2341879174 Sep 24 09:12:15 AM UTC 24 Sep 24 09:14:48 AM UTC 24 13158892771 ps
T1967 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_streaming_out.4071106518 Sep 24 09:14:36 AM UTC 24 Sep 24 09:14:49 AM UTC 24 1621242139 ps
T1968 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_resume.2986604093 Sep 24 09:14:12 AM UTC 24 Sep 24 09:14:50 AM UTC 24 25904657473 ps
T1969 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_av_buffer.3787352894 Sep 24 09:14:48 AM UTC 24 Sep 24 09:14:50 AM UTC 24 153332113 ps
T1970 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_bitstuff_err.3977079970 Sep 24 09:14:49 AM UTC 24 Sep 24 09:14:51 AM UTC 24 195000350 ps
T1971 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_disconnected.1146663469 Sep 24 09:14:49 AM UTC 24 Sep 24 09:14:51 AM UTC 24 151704637 ps
T1972 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_enable.2310340744 Sep 24 09:14:49 AM UTC 24 Sep 24 09:14:51 AM UTC 24 47089509 ps
T1973 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_levels.1605308350 Sep 24 09:14:49 AM UTC 24 Sep 24 09:14:51 AM UTC 24 178727593 ps
T1974 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_invalid_sync.4125215252 Sep 24 09:14:12 AM UTC 24 Sep 24 09:14:51 AM UTC 24 4243907508 ps
T1975 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_in_trans.1076652578 Sep 24 09:14:49 AM UTC 24 Sep 24 09:14:51 AM UTC 24 174371026 ps
T1976 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_in_stall.2011409327 Sep 24 09:14:49 AM UTC 24 Sep 24 09:14:51 AM UTC 24 153060502 ps
T1977 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_clear.268270090 Sep 24 09:14:49 AM UTC 24 Sep 24 09:14:51 AM UTC 24 416279445 ps
T1978 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_types.589657573 Sep 24 09:14:49 AM UTC 24 Sep 24 09:14:51 AM UTC 24 165774585 ps
T1979 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_in_iso.3400677671 Sep 24 09:14:49 AM UTC 24 Sep 24 09:14:51 AM UTC 24 231365853 ps
T1980 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_restore.1888446996 Sep 24 09:14:49 AM UTC 24 Sep 24 09:14:51 AM UTC 24 391106555 ps
T1981 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_disable_endpoint.1823506284 Sep 24 09:14:49 AM UTC 24 Sep 24 09:14:52 AM UTC 24 599293824 ps
T1982 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_rst.3417807003 Sep 24 09:14:49 AM UTC 24 Sep 24 09:14:53 AM UTC 24 319149974 ps
T1983 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_access.3366176221 Sep 24 09:14:49 AM UTC 24 Sep 24 09:14:53 AM UTC 24 850994945 ps
T1984 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_device_timeout.4294724057 Sep 24 09:14:12 AM UTC 24 Sep 24 09:14:53 AM UTC 24 4846122755 ps
T1985 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_device_timeout.331168041 Sep 24 09:14:49 AM UTC 24 Sep 24 09:14:54 AM UTC 24 309301388 ps
T1986 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_low_speed_traffic.3300010021 Sep 24 09:14:23 AM UTC 24 Sep 24 09:14:57 AM UTC 24 4395224406 ps
T1987 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_link_resume.2746525392 Sep 24 09:14:23 AM UTC 24 Sep 24 09:15:07 AM UTC 24 29883243014 ps
T1988 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_link_in_err.3746415873 Sep 24 09:15:06 AM UTC 24 Sep 24 09:15:08 AM UTC 24 272140317 ps
T1989 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_out_transaction.154357427 Sep 24 09:15:06 AM UTC 24 Sep 24 09:15:08 AM UTC 24 269200009 ps
T1990 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_in_transaction.4229602700 Sep 24 09:15:06 AM UTC 24 Sep 24 09:15:08 AM UTC 24 242044116 ps
T1991 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_out_iso.3902963639 Sep 24 09:15:06 AM UTC 24 Sep 24 09:15:08 AM UTC 24 166685044 ps
T1992 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_link_in_err.2957774649 Sep 24 09:17:02 AM UTC 24 Sep 24 09:17:04 AM UTC 24 176565322 ps
T1993 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_in_transaction.2658388432 Sep 24 09:15:06 AM UTC 24 Sep 24 09:15:08 AM UTC 24 148540729 ps
T1994 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_pending_in_trans.442515809 Sep 24 09:15:06 AM UTC 24 Sep 24 09:15:09 AM UTC 24 156385991 ps
T1995 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_phy_pins_sense.19502124 Sep 24 09:15:07 AM UTC 24 Sep 24 09:15:09 AM UTC 24 75454238 ps
T1996 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_received.3604060181 Sep 24 09:15:07 AM UTC 24 Sep 24 09:15:09 AM UTC 24 161561669 ps
T1997 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_sent.2623167196 Sep 24 09:15:07 AM UTC 24 Sep 24 09:15:09 AM UTC 24 205938376 ps
T1998 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_usb_ref_disable.3244368659 Sep 24 09:15:06 AM UTC 24 Sep 24 09:15:09 AM UTC 24 149057522 ps
T1999 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_out_transaction.1292185496 Sep 24 09:15:06 AM UTC 24 Sep 24 09:15:09 AM UTC 24 146550566 ps
T2000 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_out_trans_nak.3495554594 Sep 24 09:15:06 AM UTC 24 Sep 24 09:15:09 AM UTC 24 181365484 ps
T2001 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_pinflip.155338801 Sep 24 09:15:06 AM UTC 24 Sep 24 09:15:09 AM UTC 24 251274628 ps
T2002 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_nak_trans.3267282260 Sep 24 09:15:06 AM UTC 24 Sep 24 09:15:09 AM UTC 24 181198375 ps
T2003 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_out_stall.404953618 Sep 24 09:15:06 AM UTC 24 Sep 24 09:15:09 AM UTC 24 187558915 ps
T2004 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_rx_crc_err.3941482274 Sep 24 09:15:07 AM UTC 24 Sep 24 09:15:09 AM UTC 24 168158421 ps
T2005 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_out_transaction.2343796023 Sep 24 09:15:07 AM UTC 24 Sep 24 09:15:09 AM UTC 24 193540472 ps
T2006 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_setup_stage.2750012568 Sep 24 09:15:07 AM UTC 24 Sep 24 09:15:09 AM UTC 24 148890687 ps
T2007 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_in_transaction.761673398 Sep 24 09:15:07 AM UTC 24 Sep 24 09:15:09 AM UTC 24 214277915 ps
T2008 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_timeout_missing_host_handshake.2359219853 Sep 24 09:14:49 AM UTC 24 Sep 24 09:15:09 AM UTC 24 2453625113 ps
T2009 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_rx_full.2981395272 Sep 24 09:15:07 AM UTC 24 Sep 24 09:15:09 AM UTC 24 306691252 ps
T2010 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_reset.2596447559 Sep 24 09:14:48 AM UTC 24 Sep 24 09:15:16 AM UTC 24 20953835114 ps
T2011 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_min_inter_pkt_delay.2268186655 Sep 24 09:14:23 AM UTC 24 Sep 24 09:15:20 AM UTC 24 2121795108 ps
T2012 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_link_suspend.1482241192 Sep 24 09:15:06 AM UTC 24 Sep 24 09:15:21 AM UTC 24 11397176632 ps
T2013 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_link_resume.1282763903 Sep 24 09:15:06 AM UTC 24 Sep 24 09:15:22 AM UTC 24 11273400223 ps
T2014 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_setup_trans_ignored.3069266444 Sep 24 09:15:21 AM UTC 24 Sep 24 09:15:23 AM UTC 24 145969108 ps
T2015 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_device_address.2841486614 Sep 24 09:16:03 AM UTC 24 Sep 24 09:17:00 AM UTC 24 32850853710 ps
T2016 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_resume.2867402623 Sep 24 09:14:48 AM UTC 24 Sep 24 09:15:23 AM UTC 24 24642735439 ps
T2017 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_alert_test.2335505156 Sep 24 09:15:21 AM UTC 24 Sep 24 09:15:23 AM UTC 24 50381567 ps
T2018 /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_stall_trans.3682784458 Sep 24 09:15:21 AM UTC 24 Sep 24 09:15:23 AM UTC 24 180511608 ps
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