| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
| 97.41 | 98.21 | 96.12 | 97.44 | 94.92 | 98.38 | 98.21 | 98.55 |
| T279 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.3270752140 | Sep 24 08:47:32 AM UTC 24 | Sep 24 08:47:34 AM UTC 24 | 44012806 ps | ||
| T3797 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.44700388 | Sep 24 08:47:32 AM UTC 24 | Sep 24 08:47:34 AM UTC 24 | 87244974 ps | ||
| T248 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.1576140590 | Sep 24 08:47:32 AM UTC 24 | Sep 24 08:47:34 AM UTC 24 | 115855953 ps | ||
| T306 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.1403792432 | Sep 24 08:47:32 AM UTC 24 | Sep 24 08:47:34 AM UTC 24 | 86340697 ps | ||
| T3798 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.420336718 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:35 AM UTC 24 | 66924348 ps | ||
| T280 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.1871752435 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:41 AM UTC 24 | 70026278 ps | ||
| T270 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.1280469097 | Sep 24 08:47:32 AM UTC 24 | Sep 24 08:47:35 AM UTC 24 | 141625107 ps | ||
| T281 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.69206894 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:35 AM UTC 24 | 85315481 ps | ||
| T271 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.3072713357 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:41 AM UTC 24 | 53507015 ps | ||
| T307 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.3203078683 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:35 AM UTC 24 | 57642683 ps | ||
| T3799 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.740327032 | Sep 24 08:47:32 AM UTC 24 | Sep 24 08:47:35 AM UTC 24 | 255118246 ps | ||
| T310 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.3949747259 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:35 AM UTC 24 | 52027966 ps | ||
| T308 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.918070741 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:35 AM UTC 24 | 40929077 ps | ||
| T237 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.290865118 | Sep 24 08:47:32 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 167777937 ps | ||
| T272 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.3950406665 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 144701360 ps | ||
| T274 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.3340823950 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 72919228 ps | ||
| T238 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.637675622 | Sep 24 08:47:32 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 171375351 ps | ||
| T273 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.1417611883 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 49930146 ps | ||
| T3800 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.3630921130 | Sep 24 08:47:32 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 367610213 ps | ||
| T3801 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.4280194473 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 128680541 ps | ||
| T3802 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.2761002930 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 104774877 ps | ||
| T291 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.85541615 | Sep 24 08:47:32 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 208688382 ps | ||
| T249 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.1484862136 | Sep 24 08:47:32 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 99412470 ps | ||
| T292 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.2172429353 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 89988552 ps | ||
| T239 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.2946538163 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 155199379 ps | ||
| T250 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.1907935837 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 124919010 ps | ||
| T235 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.2289166677 | Sep 24 08:47:32 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 503512233 ps | ||
| T3803 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.2756237895 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 110248623 ps | ||
| T251 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.3683074638 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 96933464 ps | ||
| T3804 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.414094441 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 154588292 ps | ||
| T275 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.1122351324 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 89422242 ps | ||
| T3805 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.1650401140 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 216069557 ps | ||
| T243 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.2185102092 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 138193492 ps | ||
| T276 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.3549042824 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 218392824 ps | ||
| T277 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.179209268 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:36 AM UTC 24 | 195486442 ps | ||
| T410 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.3938997677 | Sep 24 08:47:32 AM UTC 24 | Sep 24 08:47:37 AM UTC 24 | 420125353 ps | ||
| T416 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.1527685524 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:37 AM UTC 24 | 367645272 ps | ||
| T244 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.289705938 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:37 AM UTC 24 | 210497396 ps | ||
| T411 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.3162349472 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:37 AM UTC 24 | 804685294 ps | ||
| T3806 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.4087847398 | Sep 24 08:47:35 AM UTC 24 | Sep 24 08:47:37 AM UTC 24 | 110748217 ps | ||
| T3807 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.3423846777 | Sep 24 08:47:32 AM UTC 24 | Sep 24 08:47:37 AM UTC 24 | 159883259 ps | ||
| T412 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.3577686357 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:38 AM UTC 24 | 662877483 ps | ||
| T3808 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.346664766 | Sep 24 08:47:32 AM UTC 24 | Sep 24 08:47:38 AM UTC 24 | 530137260 ps | ||
| T3809 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.2569130122 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:38 AM UTC 24 | 548491808 ps | ||
| T314 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.1563371969 | Sep 24 08:47:36 AM UTC 24 | Sep 24 08:47:38 AM UTC 24 | 84770929 ps | ||
| T3810 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.2074169129 | Sep 24 08:47:36 AM UTC 24 | Sep 24 08:47:39 AM UTC 24 | 100227783 ps | ||
| T3811 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.2823795113 | Sep 24 08:47:36 AM UTC 24 | Sep 24 08:47:39 AM UTC 24 | 153529397 ps | ||
| T3812 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.4075700757 | Sep 24 08:47:36 AM UTC 24 | Sep 24 08:47:39 AM UTC 24 | 91743425 ps | ||
| T311 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.750266537 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:40 AM UTC 24 | 54550015 ps | ||
| T309 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.389473602 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:40 AM UTC 24 | 36136127 ps | ||
| T3813 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.3368078519 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:40 AM UTC 24 | 81336053 ps | ||
| T3814 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.130070411 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:40 AM UTC 24 | 48238005 ps | ||
| T312 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.3618223695 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:40 AM UTC 24 | 45896643 ps | ||
| T240 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.3107136583 | Sep 24 08:47:36 AM UTC 24 | Sep 24 08:47:40 AM UTC 24 | 269593470 ps | ||
| T313 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.3717337833 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:41 AM UTC 24 | 43267054 ps | ||
| T3815 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.1429965352 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:40 AM UTC 24 | 85456833 ps | ||
| T3816 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.1742850447 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:41 AM UTC 24 | 146477615 ps | ||
| T3817 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.1401204350 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:41 AM UTC 24 | 232673329 ps | ||
| T3818 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.979596027 | Sep 24 08:47:39 AM UTC 24 | Sep 24 08:47:41 AM UTC 24 | 63218682 ps | ||
| T3819 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.223702671 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:41 AM UTC 24 | 107772513 ps | ||
| T3820 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.2465089379 | Sep 24 08:47:39 AM UTC 24 | Sep 24 08:47:41 AM UTC 24 | 43529468 ps | ||
| T3821 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.3758871410 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:41 AM UTC 24 | 1763074920 ps | ||
| T241 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.365306347 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:41 AM UTC 24 | 79499158 ps | ||
| T3822 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.903104673 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:41 AM UTC 24 | 175296762 ps | ||
| T3823 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.1819453521 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:41 AM UTC 24 | 107810872 ps | ||
| T3824 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.1432972943 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:41 AM UTC 24 | 117146230 ps | ||
| T3825 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.2371016599 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:41 AM UTC 24 | 86527711 ps | ||
| T3826 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.4142386308 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:42 AM UTC 24 | 93469507 ps | ||
| T3827 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.854205438 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:42 AM UTC 24 | 153141631 ps | ||
| T3828 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.1073074402 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:42 AM UTC 24 | 238076729 ps | ||
| T415 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.2764444753 | Sep 24 08:47:36 AM UTC 24 | Sep 24 08:47:42 AM UTC 24 | 764216721 ps | ||
| T417 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.1811507049 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:43 AM UTC 24 | 440313668 ps | ||
| T3829 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.548236215 | Sep 24 08:47:41 AM UTC 24 | Sep 24 08:47:43 AM UTC 24 | 42938760 ps | ||
| T242 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.2925327664 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:43 AM UTC 24 | 613273494 ps | ||
| T413 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.538248826 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:43 AM UTC 24 | 517998641 ps | ||
| T3830 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.1700182812 | Sep 24 08:47:41 AM UTC 24 | Sep 24 08:47:43 AM UTC 24 | 82075812 ps | ||
| T3831 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.2846626820 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:43 AM UTC 24 | 339368957 ps | ||
| T3832 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.925752261 | Sep 24 08:47:41 AM UTC 24 | Sep 24 08:47:43 AM UTC 24 | 49503564 ps | ||
| T3833 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.1032160929 | Sep 24 08:47:33 AM UTC 24 | Sep 24 08:47:43 AM UTC 24 | 1747930520 ps | ||
| T3834 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.560544548 | Sep 24 08:47:41 AM UTC 24 | Sep 24 08:47:43 AM UTC 24 | 169776719 ps | ||
| T3835 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.1471809703 | Sep 24 08:47:41 AM UTC 24 | Sep 24 08:47:43 AM UTC 24 | 41735931 ps | ||
| T3836 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.3993085421 | Sep 24 08:47:41 AM UTC 24 | Sep 24 08:47:44 AM UTC 24 | 65692684 ps | ||
| T246 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.73549839 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:44 AM UTC 24 | 549975459 ps | ||
| T3837 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.1845540987 | Sep 24 08:47:41 AM UTC 24 | Sep 24 08:47:44 AM UTC 24 | 114838281 ps | ||
| T3838 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.2747437748 | Sep 24 08:47:41 AM UTC 24 | Sep 24 08:47:44 AM UTC 24 | 87410323 ps | ||
| T3839 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.3203350409 | Sep 24 08:47:41 AM UTC 24 | Sep 24 08:47:44 AM UTC 24 | 155826063 ps | ||
| T3840 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.1325557959 | Sep 24 08:47:41 AM UTC 24 | Sep 24 08:47:44 AM UTC 24 | 86287739 ps | ||
| T3841 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.1167030897 | Sep 24 08:47:41 AM UTC 24 | Sep 24 08:47:45 AM UTC 24 | 252153871 ps | ||
| T3842 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.1544478614 | Sep 24 08:47:41 AM UTC 24 | Sep 24 08:47:45 AM UTC 24 | 132514669 ps | ||
| T3843 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.593609388 | Sep 24 08:47:41 AM UTC 24 | Sep 24 08:47:45 AM UTC 24 | 264455423 ps | ||
| T414 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.209616793 | Sep 24 08:47:41 AM UTC 24 | Sep 24 08:47:45 AM UTC 24 | 615442912 ps | ||
| T3844 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.2019897364 | Sep 24 08:47:41 AM UTC 24 | Sep 24 08:47:45 AM UTC 24 | 123382982 ps | ||
| T3845 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.1623381403 | Sep 24 08:47:38 AM UTC 24 | Sep 24 08:47:45 AM UTC 24 | 1183862540 ps | ||
| T3846 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.2281690240 | Sep 24 08:47:47 AM UTC 24 | Sep 24 08:47:49 AM UTC 24 | 55033279 ps | ||
| T3847 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.2603265358 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:46 AM UTC 24 | 76803018 ps | ||
| T3848 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.196978693 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:46 AM UTC 24 | 90150773 ps | ||
| T3849 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.908896768 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:46 AM UTC 24 | 67333059 ps | ||
| T3850 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.2047779058 | Sep 24 08:47:43 AM UTC 24 | Sep 24 08:47:46 AM UTC 24 | 124822608 ps | ||
| T3851 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.3422994515 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:46 AM UTC 24 | 57764702 ps | ||
| T3852 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.4154998407 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:46 AM UTC 24 | 79610206 ps | ||
| T3853 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.3351711698 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:46 AM UTC 24 | 38352582 ps | ||
| T3854 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.2905022071 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:46 AM UTC 24 | 44854613 ps | ||
| T3855 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.388802613 | Sep 24 08:47:43 AM UTC 24 | Sep 24 08:47:47 AM UTC 24 | 127775719 ps | ||
| T3856 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.1738272067 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:47 AM UTC 24 | 71915465 ps | ||
| T3857 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.1213469013 | Sep 24 08:47:43 AM UTC 24 | Sep 24 08:47:47 AM UTC 24 | 94772436 ps | ||
| T3858 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.1160231109 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:47 AM UTC 24 | 210919287 ps | ||
| T3859 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.1035353407 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:47 AM UTC 24 | 100692383 ps | ||
| T3860 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.2819834008 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:47 AM UTC 24 | 177861777 ps | ||
| T3861 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.475261811 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:47 AM UTC 24 | 183379366 ps | ||
| T3862 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.1014273885 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:47 AM UTC 24 | 174953913 ps | ||
| T3863 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.3457796967 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:47 AM UTC 24 | 209348545 ps | ||
| T418 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.1758379699 | Sep 24 08:47:41 AM UTC 24 | Sep 24 08:47:47 AM UTC 24 | 729875676 ps | ||
| T3864 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.2953185177 | Sep 24 08:47:41 AM UTC 24 | Sep 24 08:47:47 AM UTC 24 | 943030276 ps | ||
| T247 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.1502702781 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:48 AM UTC 24 | 541983085 ps | ||
| T3865 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.2588074000 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:48 AM UTC 24 | 145635127 ps | ||
| T3866 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.1395935102 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:48 AM UTC 24 | 221008737 ps | ||
| T3867 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.1719163541 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:48 AM UTC 24 | 275269321 ps | ||
| T3868 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.3877718137 | Sep 24 08:47:46 AM UTC 24 | Sep 24 08:47:48 AM UTC 24 | 34923627 ps | ||
| T3869 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.2549892893 | Sep 24 08:47:47 AM UTC 24 | Sep 24 08:47:49 AM UTC 24 | 56413715 ps | ||
| T3870 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.3918358876 | Sep 24 08:47:46 AM UTC 24 | Sep 24 08:47:48 AM UTC 24 | 40003467 ps | ||
| T3871 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.3785462223 | Sep 24 08:47:47 AM UTC 24 | Sep 24 08:47:49 AM UTC 24 | 73158736 ps | ||
| T3872 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.3217904379 | Sep 24 08:47:46 AM UTC 24 | Sep 24 08:47:48 AM UTC 24 | 76905238 ps | ||
| T3873 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.389541940 | Sep 24 08:47:46 AM UTC 24 | Sep 24 08:47:48 AM UTC 24 | 50908800 ps | ||
| T3874 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.436030418 | Sep 24 08:47:47 AM UTC 24 | Sep 24 08:47:48 AM UTC 24 | 45356222 ps | ||
| T3875 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.1330330953 | Sep 24 08:47:47 AM UTC 24 | Sep 24 08:47:48 AM UTC 24 | 55023129 ps | ||
| T3876 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.1590804485 | Sep 24 08:47:46 AM UTC 24 | Sep 24 08:47:48 AM UTC 24 | 140167395 ps | ||
| T3877 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.1458571749 | Sep 24 08:47:47 AM UTC 24 | Sep 24 08:47:49 AM UTC 24 | 43616434 ps | ||
| T3878 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.308231735 | Sep 24 08:47:47 AM UTC 24 | Sep 24 08:47:49 AM UTC 24 | 59233389 ps | ||
| T3879 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.4111303199 | Sep 24 08:47:47 AM UTC 24 | Sep 24 08:47:49 AM UTC 24 | 64161257 ps | ||
| T3880 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.1554066483 | Sep 24 08:47:47 AM UTC 24 | Sep 24 08:47:49 AM UTC 24 | 38423250 ps | ||
| T3881 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.3406512823 | Sep 24 08:47:47 AM UTC 24 | Sep 24 08:47:49 AM UTC 24 | 32330809 ps | ||
| T3882 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.3430582298 | Sep 24 08:47:47 AM UTC 24 | Sep 24 08:47:49 AM UTC 24 | 59025793 ps | ||
| T3883 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.4138468588 | Sep 24 08:47:47 AM UTC 24 | Sep 24 08:47:49 AM UTC 24 | 59514419 ps | ||
| T3884 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.4220731629 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:49 AM UTC 24 | 273152851 ps | ||
| T3885 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.1623789174 | Sep 24 08:47:47 AM UTC 24 | Sep 24 08:47:49 AM UTC 24 | 41789343 ps | ||
| T3886 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.420430614 | Sep 24 08:47:47 AM UTC 24 | Sep 24 08:47:49 AM UTC 24 | 34991878 ps | ||
| T3887 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.1688667508 | Sep 24 08:47:47 AM UTC 24 | Sep 24 08:47:49 AM UTC 24 | 39556765 ps | ||
| T3888 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.788906683 | Sep 24 08:47:47 AM UTC 24 | Sep 24 08:47:49 AM UTC 24 | 44793237 ps | ||
| T3889 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.573984547 | Sep 24 08:47:46 AM UTC 24 | Sep 24 08:47:49 AM UTC 24 | 89456349 ps | ||
| T3890 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.349883055 | Sep 24 08:47:48 AM UTC 24 | Sep 24 08:47:50 AM UTC 24 | 32198192 ps | ||
| T3891 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.2291587412 | Sep 24 08:47:48 AM UTC 24 | Sep 24 08:47:50 AM UTC 24 | 57288966 ps | ||
| T3892 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.3136365354 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:50 AM UTC 24 | 790151812 ps | ||
| T3893 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.2761267210 | Sep 24 08:47:44 AM UTC 24 | Sep 24 08:47:50 AM UTC 24 | 1089609620 ps | ||
| T3894 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.1215143305 | Sep 24 08:47:49 AM UTC 24 | Sep 24 08:47:51 AM UTC 24 | 46429504 ps | ||
| T3895 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.2575302871 | Sep 24 08:47:49 AM UTC 24 | Sep 24 08:47:51 AM UTC 24 | 38389958 ps | ||
| T3896 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.363804466 | Sep 24 08:47:49 AM UTC 24 | Sep 24 08:47:51 AM UTC 24 | 38016678 ps | ||
| T3897 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.2537131974 | Sep 24 08:47:49 AM UTC 24 | Sep 24 08:47:51 AM UTC 24 | 57141162 ps | ||
| T3898 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.3226178923 | Sep 24 08:47:49 AM UTC 24 | Sep 24 08:47:51 AM UTC 24 | 50162397 ps | ||
| T3899 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.3491289227 | Sep 24 08:47:49 AM UTC 24 | Sep 24 08:47:51 AM UTC 24 | 87498284 ps | ||
| T3900 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.536435275 | Sep 24 08:47:50 AM UTC 24 | Sep 24 08:47:51 AM UTC 24 | 55281982 ps | ||
| T3901 | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.3912082951 | Sep 24 08:47:50 AM UTC 24 | Sep 24 08:47:51 AM UTC 24 | 45617739 ps |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_clear.905611708 |
| Short name | T1 |
| Test name | |
| Test status | |
| Simulation time | 192453889 ps |
| CPU time | 1.12 seconds |
| Started | Sep 24 08:54:03 AM UTC 24 |
| Finished | Sep 24 08:54:05 AM UTC 24 |
| Peak memory | 217120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=905611708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_data_toggle_clear.905611708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.3776405813 |
| Short name | T37 |
| Test name | |
| Test status | |
| Simulation time | 1138619316 ps |
| CPU time | 3.85 seconds |
| Started | Sep 24 08:54:03 AM UTC 24 |
| Finished | Sep 24 08:54:11 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3776405813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_data_toggle_restore.3776405813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_types.2587577911 |
| Short name | T43 |
| Test name | |
| Test status | |
| Simulation time | 570904576 ps |
| CPU time | 1.76 seconds |
| Started | Sep 24 08:54:05 AM UTC 24 |
| Finished | Sep 24 08:54:07 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2587577911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_types.2587577911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.2916818544 |
| Short name | T8 |
| Test name | |
| Test status | |
| Simulation time | 21274132193 ps |
| CPU time | 29.72 seconds |
| Started | Sep 24 08:54:03 AM UTC 24 |
| Finished | Sep 24 08:54:35 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2916818544 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_reset.2916818544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_rand_suspends.3249489062 |
| Short name | T70 |
| Test name | |
| Test status | |
| Simulation time | 4908684471 ps |
| CPU time | 19.23 seconds |
| Started | Sep 24 08:54:20 AM UTC 24 |
| Finished | Sep 24 08:54:40 AM UTC 24 |
| Peak memory | 230388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3249489062 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_suspends.3249489062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.4213449993 |
| Short name | T215 |
| Test name | |
| Test status | |
| Simulation time | 58506240 ps |
| CPU time | 0.78 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:23 AM UTC 24 |
| Peak memory | 216608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4213449993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_intr_test.4213449993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_access.2286179585 |
| Short name | T34 |
| Test name | |
| Test status | |
| Simulation time | 903186102 ps |
| CPU time | 3.65 seconds |
| Started | Sep 24 08:54:04 AM UTC 24 |
| Finished | Sep 24 08:54:09 AM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2286179585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_access.2286179585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.1088784812 |
| Short name | T211 |
| Test name | |
| Test status | |
| Simulation time | 286421427 ps |
| CPU time | 2.73 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:26 AM UTC 24 |
| Peak memory | 217888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1088784812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_errors.1088784812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.2547389797 |
| Short name | T108 |
| Test name | |
| Test status | |
| Simulation time | 27342319681 ps |
| CPU time | 69.25 seconds |
| Started | Sep 24 08:54:03 AM UTC 24 |
| Finished | Sep 24 08:55:17 AM UTC 24 |
| Peak memory | 218484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2547389797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_address.2547389797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.3807642962 |
| Short name | T7 |
| Test name | |
| Test status | |
| Simulation time | 4747048380 ps |
| CPU time | 13.03 seconds |
| Started | Sep 24 08:54:03 AM UTC 24 |
| Finished | Sep 24 08:54:18 AM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3807642962 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_disconnect.3807642962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_max_usb_traffic.2450192079 |
| Short name | T199 |
| Test name | |
| Test status | |
| Simulation time | 3329140372 ps |
| CPU time | 33.56 seconds |
| Started | Sep 24 08:54:59 AM UTC 24 |
| Finished | Sep 24 08:55:34 AM UTC 24 |
| Peak memory | 235084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2450192079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_usb_traffic.2450192079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_sec_cm.2224198806 |
| Short name | T206 |
| Test name | |
| Test status | |
| Simulation time | 657172478 ps |
| CPU time | 3.52 seconds |
| Started | Sep 24 08:54:28 AM UTC 24 |
| Finished | Sep 24 08:54:33 AM UTC 24 |
| Peak memory | 252084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224198806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_sec_cm.2224198806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_link_resume.889928561 |
| Short name | T101 |
| Test name | |
| Test status | |
| Simulation time | 4726059817 ps |
| CPU time | 13.78 seconds |
| Started | Sep 24 09:02:18 AM UTC 24 |
| Finished | Sep 24 09:02:33 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=889928561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_link_resume.889928561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.1285850026 |
| Short name | T17 |
| Test name | |
| Test status | |
| Simulation time | 306423511 ps |
| CPU time | 2.25 seconds |
| Started | Sep 24 08:54:15 AM UTC 24 |
| Finished | Sep 24 08:54:18 AM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1285850026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_tx_osc_test _mode_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_osc_test_mode.1285850026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_phy_config_tx_osc_test_mode/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.4138953095 |
| Short name | T229 |
| Test name | |
| Test status | |
| Simulation time | 865227668 ps |
| CPU time | 3.12 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:26 AM UTC 24 |
| Peak memory | 217580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4138953095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_intg_err.4138953095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/277.usbdev_tx_rx_disruption.1986514914 |
| Short name | T127 |
| Test name | |
| Test status | |
| Simulation time | 521482026 ps |
| CPU time | 1.83 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 215568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1986514914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 277.usbdev_ tx_rx_disruption.1986514914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/277.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.3618223695 |
| Short name | T312 |
| Test name | |
| Test status | |
| Simulation time | 45896643 ps |
| CPU time | 0.94 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:40 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3618223695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_intr_test.3618223695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_phy_pins_sense.1127081074 |
| Short name | T19 |
| Test name | |
| Test status | |
| Simulation time | 50255434 ps |
| CPU time | 1.3 seconds |
| Started | Sep 24 08:54:16 AM UTC 24 |
| Finished | Sep 24 08:54:19 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1127081074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_pins_sense.1127081074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.338054400 |
| Short name | T40 |
| Test name | |
| Test status | |
| Simulation time | 172480575 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 08:54:03 AM UTC 24 |
| Finished | Sep 24 08:54:07 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=338054400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_disconnected.338054400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.835109122 |
| Short name | T81 |
| Test name | |
| Test status | |
| Simulation time | 3503220108 ps |
| CPU time | 113.43 seconds |
| Started | Sep 24 08:54:26 AM UTC 24 |
| Finished | Sep 24 08:56:22 AM UTC 24 |
| Peak memory | 230516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=835109122 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_2 3/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stress_usb_traffic.835109122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_device_address.2846709902 |
| Short name | T122 |
| Test name | |
| Test status | |
| Simulation time | 30056686320 ps |
| CPU time | 68.33 seconds |
| Started | Sep 24 08:55:45 AM UTC 24 |
| Finished | Sep 24 08:56:55 AM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2846709902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_address.2846709902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_tx_rx_disruption.1608155757 |
| Short name | T213 |
| Test name | |
| Test status | |
| Simulation time | 566969906 ps |
| CPU time | 3.81 seconds |
| Started | Sep 24 09:01:09 AM UTC 24 |
| Finished | Sep 24 09:01:14 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1608155757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_tx _rx_disruption.1608155757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_levels.837024789 |
| Short name | T28 |
| Test name | |
| Test status | |
| Simulation time | 253704449 ps |
| CPU time | 1.3 seconds |
| Started | Sep 24 08:54:05 AM UTC 24 |
| Finished | Sep 24 08:54:07 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=837024789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_fifo_levels.837024789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.2539769907 |
| Short name | T123 |
| Test name | |
| Test status | |
| Simulation time | 3646926447 ps |
| CPU time | 29.35 seconds |
| Started | Sep 24 08:54:08 AM UTC 24 |
| Finished | Sep 24 08:54:39 AM UTC 24 |
| Peak memory | 228392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2539769907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_low_speed_traffic.2539769907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_disconnect.2891935607 |
| Short name | T1047 |
| Test name | |
| Test status | |
| Simulation time | 12012691184 ps |
| CPU time | 22.23 seconds |
| Started | Sep 24 09:04:25 AM UTC 24 |
| Finished | Sep 24 09:04:49 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2891935607 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_disconnect.2891935607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/295.usbdev_tx_rx_disruption.311811350 |
| Short name | T226 |
| Test name | |
| Test status | |
| Simulation time | 486692072 ps |
| CPU time | 1.63 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=311811350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 295.usbdev_t x_rx_disruption.311811350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/295.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.3332207924 |
| Short name | T216 |
| Test name | |
| Test status | |
| Simulation time | 87725847 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:23 AM UTC 24 |
| Peak memory | 217120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3332207924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_hw_reset.3332207924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_device_address.3171532776 |
| Short name | T432 |
| Test name | |
| Test status | |
| Simulation time | 48798827667 ps |
| CPU time | 105.18 seconds |
| Started | Sep 24 09:03:42 AM UTC 24 |
| Finished | Sep 24 09:05:30 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3171532776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_address.3171532776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_rx_full.169529991 |
| Short name | T60 |
| Test name | |
| Test status | |
| Simulation time | 290536839 ps |
| CPU time | 2.16 seconds |
| Started | Sep 24 08:58:34 AM UTC 24 |
| Finished | Sep 24 08:58:37 AM UTC 24 |
| Peak memory | 217952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=169529991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 3.usbdev_rx_full.169529991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.790104532 |
| Short name | T76 |
| Test name | |
| Test status | |
| Simulation time | 142722401 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 08:54:20 AM UTC 24 |
| Finished | Sep 24 08:54:23 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=790104532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_rx_crc_err.790104532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/152.usbdev_endpoint_types.2347258020 |
| Short name | T537 |
| Test name | |
| Test status | |
| Simulation time | 916716923 ps |
| CPU time | 2.56 seconds |
| Started | Sep 24 09:40:49 AM UTC 24 |
| Finished | Sep 24 09:40:53 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2347258020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_endpoint_types.2347258020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/152.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_types.829797609 |
| Short name | T462 |
| Test name | |
| Test status | |
| Simulation time | 627017444 ps |
| CPU time | 3.05 seconds |
| Started | Sep 24 09:00:28 AM UTC 24 |
| Finished | Sep 24 09:00:33 AM UTC 24 |
| Peak memory | 217700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=829797609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_types.829797609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.3203078683 |
| Short name | T307 |
| Test name | |
| Test status | |
| Simulation time | 57642683 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:35 AM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3203078683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_intr_test.3203078683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/121.usbdev_endpoint_types.1270501472 |
| Short name | T508 |
| Test name | |
| Test status | |
| Simulation time | 522512416 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:20 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1270501472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_endpoint_types.1270501472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/121.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.1723166063 |
| Short name | T42 |
| Test name | |
| Test status | |
| Simulation time | 213342996 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 08:54:03 AM UTC 24 |
| Finished | Sep 24 08:54:07 AM UTC 24 |
| Peak memory | 215760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1723166063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_bitstuff_err.1723166063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.2925327664 |
| Short name | T242 |
| Test name | |
| Test status | |
| Simulation time | 613273494 ps |
| CPU time | 4 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:43 AM UTC 24 |
| Peak memory | 217528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2925327664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_intg_err.2925327664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.3933472727 |
| Short name | T515 |
| Test name | |
| Test status | |
| Simulation time | 613763863 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 09:37:27 AM UTC 24 |
| Finished | Sep 24 09:37:30 AM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3933472727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_endpoint_types.3933472727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/108.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/172.usbdev_endpoint_types.3434380718 |
| Short name | T468 |
| Test name | |
| Test status | |
| Simulation time | 936330224 ps |
| CPU time | 2.18 seconds |
| Started | Sep 24 09:41:42 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3434380718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_endpoint_types.3434380718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/172.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/180.usbdev_endpoint_types.1041498720 |
| Short name | T499 |
| Test name | |
| Test status | |
| Simulation time | 717132556 ps |
| CPU time | 2.03 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1041498720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_endpoint_types.1041498720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/180.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.2378437055 |
| Short name | T22 |
| Test name | |
| Test status | |
| Simulation time | 181426447 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 08:54:17 AM UTC 24 |
| Finished | Sep 24 08:54:20 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2378437055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_pkt_received.2378437055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/111.usbdev_endpoint_types.1138720865 |
| Short name | T517 |
| Test name | |
| Test status | |
| Simulation time | 899057047 ps |
| CPU time | 2.33 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 217556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1138720865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_endpoint_types.1138720865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/111.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/189.usbdev_endpoint_types.897377862 |
| Short name | T576 |
| Test name | |
| Test status | |
| Simulation time | 518634021 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=897377862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 189.usbdev_endpoint_types.897377862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/189.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_types.1720335340 |
| Short name | T561 |
| Test name | |
| Test status | |
| Simulation time | 397797284 ps |
| CPU time | 1.38 seconds |
| Started | Sep 24 09:19:09 AM UTC 24 |
| Finished | Sep 24 09:19:11 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1720335340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_types.1720335340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_buffer.2646661940 |
| Short name | T107 |
| Test name | |
| Test status | |
| Simulation time | 9921340314 ps |
| CPU time | 30.84 seconds |
| Started | Sep 24 08:54:17 AM UTC 24 |
| Finished | Sep 24 08:54:50 AM UTC 24 |
| Peak memory | 228576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2646661940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_pkt_buffer.2646661940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_levels.2871041055 |
| Short name | T191 |
| Test name | |
| Test status | |
| Simulation time | 273927862 ps |
| CPU time | 2.2 seconds |
| Started | Sep 24 08:57:35 AM UTC 24 |
| Finished | Sep 24 08:57:38 AM UTC 24 |
| Peak memory | 217824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2871041055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_fifo_levels.2871041055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/179.usbdev_endpoint_types.1973383068 |
| Short name | T498 |
| Test name | |
| Test status | |
| Simulation time | 648239141 ps |
| CPU time | 1.98 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1973383068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_endpoint_types.1973383068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/179.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/62.usbdev_endpoint_types.3533098836 |
| Short name | T479 |
| Test name | |
| Test status | |
| Simulation time | 713404207 ps |
| CPU time | 1.86 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3533098836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_endpoint_types.3533098836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/62.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.4086848308 |
| Short name | T265 |
| Test name | |
| Test status | |
| Simulation time | 92932172 ps |
| CPU time | 1.35 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:24 AM UTC 24 |
| Peak memory | 226988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4086848308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_partial_access.4086848308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_resets.4164426842 |
| Short name | T172 |
| Test name | |
| Test status | |
| Simulation time | 1832787108 ps |
| CPU time | 18.35 seconds |
| Started | Sep 24 09:03:18 AM UTC 24 |
| Finished | Sep 24 09:03:38 AM UTC 24 |
| Peak memory | 234780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4164426842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_resets.4164426842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/146.usbdev_endpoint_types.2160832428 |
| Short name | T3408 |
| Test name | |
| Test status | |
| Simulation time | 729861993 ps |
| CPU time | 2.11 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:01 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2160832428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_endpoint_types.2160832428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/146.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/166.usbdev_endpoint_types.3786694446 |
| Short name | T538 |
| Test name | |
| Test status | |
| Simulation time | 601676716 ps |
| CPU time | 1.79 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:53 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3786694446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_endpoint_types.3786694446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/166.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_restore.3140317486 |
| Short name | T443 |
| Test name | |
| Test status | |
| Simulation time | 956976973 ps |
| CPU time | 2.83 seconds |
| Started | Sep 24 09:08:38 AM UTC 24 |
| Finished | Sep 24 09:08:42 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3140317486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_restore.3140317486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_device_address.868289428 |
| Short name | T177 |
| Test name | |
| Test status | |
| Simulation time | 27585030419 ps |
| CPU time | 48.13 seconds |
| Started | Sep 24 08:57:24 AM UTC 24 |
| Finished | Sep 24 08:58:13 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=868289428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_device_address.868289428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.1222094343 |
| Short name | T509 |
| Test name | |
| Test status | |
| Simulation time | 854415723 ps |
| CPU time | 2.22 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:51 AM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1222094343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_endpoint_types.1222094343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/74.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.1034128640 |
| Short name | T526 |
| Test name | |
| Test status | |
| Simulation time | 621754067 ps |
| CPU time | 1.75 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1034128640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_endpoint_types.1034128640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/84.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_nak_trans.751458925 |
| Short name | T143 |
| Test name | |
| Test status | |
| Simulation time | 170494218 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:00:42 AM UTC 24 |
| Finished | Sep 24 09:00:45 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=751458925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_nak_trans.751458925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.3243721873 |
| Short name | T201 |
| Test name | |
| Test status | |
| Simulation time | 39732435 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 08:54:29 AM UTC 24 |
| Finished | Sep 24 08:54:32 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3243721873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 0.usbdev_alert_test.3243721873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.3577686357 |
| Short name | T412 |
| Test name | |
| Test status | |
| Simulation time | 662877483 ps |
| CPU time | 2.98 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:38 AM UTC 24 |
| Peak memory | 217460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3577686357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_intg_err.3577686357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.732394203 |
| Short name | T55 |
| Test name | |
| Test status | |
| Simulation time | 414264063 ps |
| CPU time | 2.99 seconds |
| Started | Sep 24 08:54:21 AM UTC 24 |
| Finished | Sep 24 08:54:25 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=732394203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_setup_priority.732394203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/128.usbdev_endpoint_types.3727362666 |
| Short name | T477 |
| Test name | |
| Test status | |
| Simulation time | 570005905 ps |
| CPU time | 1.74 seconds |
| Started | Sep 24 09:39:08 AM UTC 24 |
| Finished | Sep 24 09:39:11 AM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3727362666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_endpoint_types.3727362666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/128.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.129080923 |
| Short name | T500 |
| Test name | |
| Test status | |
| Simulation time | 641772093 ps |
| CPU time | 2.26 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=129080923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 57.usbdev_endpoint_types.129080923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/57.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/75.usbdev_endpoint_types.760360388 |
| Short name | T487 |
| Test name | |
| Test status | |
| Simulation time | 460954526 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:51 AM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=760360388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 75.usbdev_endpoint_types.760360388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/75.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.593609388 |
| Short name | T3843 |
| Test name | |
| Test status | |
| Simulation time | 264455423 ps |
| CPU time | 2.73 seconds |
| Started | Sep 24 08:47:41 AM UTC 24 |
| Finished | Sep 24 08:47:45 AM UTC 24 |
| Peak memory | 227808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=593609388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_errors.593609388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_device_address.2178377610 |
| Short name | T121 |
| Test name | |
| Test status | |
| Simulation time | 47520967277 ps |
| CPU time | 96.61 seconds |
| Started | Sep 24 08:54:37 AM UTC 24 |
| Finished | Sep 24 08:56:16 AM UTC 24 |
| Peak memory | 218352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2178377610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_address.2178377610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/165.usbdev_endpoint_types.3673418144 |
| Short name | T3433 |
| Test name | |
| Test status | |
| Simulation time | 392115170 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:53 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3673418144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_endpoint_types.3673418144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/165.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.2538155685 |
| Short name | T39 |
| Test name | |
| Test status | |
| Simulation time | 153756235 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 08:54:03 AM UTC 24 |
| Finished | Sep 24 08:54:06 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2538155685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_av_overflow.2538155685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.3779688448 |
| Short name | T217 |
| Test name | |
| Test status | |
| Simulation time | 52936547 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:41 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3779688448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_intr_test.3779688448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.2724550721 |
| Short name | T295 |
| Test name | |
| Test status | |
| Simulation time | 5158221797 ps |
| CPU time | 42.23 seconds |
| Started | Sep 24 08:54:04 AM UTC 24 |
| Finished | Sep 24 08:54:48 AM UTC 24 |
| Peak memory | 228360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2724550721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_dpi_config_host_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_dpi_config_host.2724550721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_dpi_config_host/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.1436359292 |
| Short name | T503 |
| Test name | |
| Test status | |
| Simulation time | 286827504 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:37:27 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1436359292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_endpoint_types.1436359292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/106.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/137.usbdev_endpoint_types.3401099386 |
| Short name | T555 |
| Test name | |
| Test status | |
| Simulation time | 347878913 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 09:39:57 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3401099386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_endpoint_types.3401099386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/137.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/140.usbdev_endpoint_types.627941965 |
| Short name | T546 |
| Test name | |
| Test status | |
| Simulation time | 277892675 ps |
| CPU time | 1.35 seconds |
| Started | Sep 24 09:39:57 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=627941965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 140.usbdev_endpoint_types.627941965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/140.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_types.3492515680 |
| Short name | T471 |
| Test name | |
| Test status | |
| Simulation time | 492110936 ps |
| CPU time | 2.6 seconds |
| Started | Sep 24 09:07:30 AM UTC 24 |
| Finished | Sep 24 09:07:34 AM UTC 24 |
| Peak memory | 217708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3492515680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_types.3492515680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/178.usbdev_endpoint_types.1009904243 |
| Short name | T557 |
| Test name | |
| Test status | |
| Simulation time | 267203646 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:45 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1009904243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_endpoint_types.1009904243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/178.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_types.1372605365 |
| Short name | T525 |
| Test name | |
| Test status | |
| Simulation time | 478995195 ps |
| CPU time | 2.29 seconds |
| Started | Sep 24 09:09:53 AM UTC 24 |
| Finished | Sep 24 09:09:57 AM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1372605365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_types.1372605365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_types.1371101344 |
| Short name | T521 |
| Test name | |
| Test status | |
| Simulation time | 256896506 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:24:39 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1371101344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_types.1371101344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.1658956084 |
| Short name | T506 |
| Test name | |
| Test status | |
| Simulation time | 598581207 ps |
| CPU time | 1.93 seconds |
| Started | Sep 24 09:36:37 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1658956084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_endpoint_types.1658956084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/83.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.1177197251 |
| Short name | T542 |
| Test name | |
| Test status | |
| Simulation time | 574261463 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:41 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1177197251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_endpoint_types.1177197251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/94.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_levels.2652438393 |
| Short name | T189 |
| Test name | |
| Test status | |
| Simulation time | 171684312 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 08:54:42 AM UTC 24 |
| Finished | Sep 24 08:54:45 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2652438393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_fifo_levels.2652438393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.2893025945 |
| Short name | T18 |
| Test name | |
| Test status | |
| Simulation time | 4199767952 ps |
| CPU time | 12.44 seconds |
| Started | Sep 24 08:54:05 AM UTC 24 |
| Finished | Sep 24 08:54:19 AM UTC 24 |
| Peak memory | 218432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2893025945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_host_lost_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_host_lost.2893025945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_host_lost/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_disconnects.4255993549 |
| Short name | T170 |
| Test name | |
| Test status | |
| Simulation time | 5635090174 ps |
| CPU time | 52.44 seconds |
| Started | Sep 24 08:54:18 AM UTC 24 |
| Finished | Sep 24 08:55:13 AM UTC 24 |
| Peak memory | 234788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4255993549 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_disconnects.4255993549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_phy_pins_sense.1731468077 |
| Short name | T1278 |
| Test name | |
| Test status | |
| Simulation time | 40047672 ps |
| CPU time | 1.14 seconds |
| Started | Sep 24 09:07:16 AM UTC 24 |
| Finished | Sep 24 09:07:18 AM UTC 24 |
| Peak memory | 214920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1731468077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_pins_sense.1731468077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.538248826 |
| Short name | T413 |
| Test name | |
| Test status | |
| Simulation time | 517998641 ps |
| CPU time | 3.69 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:43 AM UTC 24 |
| Peak memory | 217588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=538248826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_intg_err.538248826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk_max.2926880740 |
| Short name | T293 |
| Test name | |
| Test status | |
| Simulation time | 87052029970 ps |
| CPU time | 202.46 seconds |
| Started | Sep 24 08:54:05 AM UTC 24 |
| Finished | Sep 24 08:57:31 AM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2926880740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 0.usbdev_freq_loclk_max.2926880740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_stall_priority_over_nak.3486206745 |
| Short name | T192 |
| Test name | |
| Test status | |
| Simulation time | 162757861 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 08:54:24 AM UTC 24 |
| Finished | Sep 24 08:54:26 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3486206745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stall_priority_over_nak.3486206745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_restore.3971605301 |
| Short name | T115 |
| Test name | |
| Test status | |
| Simulation time | 993387711 ps |
| CPU time | 5.84 seconds |
| Started | Sep 24 08:54:36 AM UTC 24 |
| Finished | Sep 24 08:54:43 AM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3971605301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_data_toggle_restore.3971605301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_low_speed_traffic.51898422 |
| Short name | T198 |
| Test name | |
| Test status | |
| Simulation time | 3050103220 ps |
| CPU time | 34.29 seconds |
| Started | Sep 24 08:54:53 AM UTC 24 |
| Finished | Sep 24 08:55:28 AM UTC 24 |
| Peak memory | 234984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=51898422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_low_speed_traffic.51898422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/100.usbdev_fifo_levels.1283452125 |
| Short name | T381 |
| Test name | |
| Test status | |
| Simulation time | 290037606 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1283452125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 100.usbdev_fifo_levels.1283452125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/100.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.1548458056 |
| Short name | T553 |
| Test name | |
| Test status | |
| Simulation time | 209421973 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1548458056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_endpoint_types.1548458056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/101.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/101.usbdev_fifo_levels.1092677096 |
| Short name | T394 |
| Test name | |
| Test status | |
| Simulation time | 260923882 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1092677096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 101.usbdev_fifo_levels.1092677096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/101.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/102.usbdev_fifo_levels.3340742337 |
| Short name | T366 |
| Test name | |
| Test status | |
| Simulation time | 321942790 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:37:27 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3340742337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 102.usbdev_fifo_levels.3340742337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/102.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/103.usbdev_fifo_levels.1622122166 |
| Short name | T364 |
| Test name | |
| Test status | |
| Simulation time | 266471569 ps |
| CPU time | 1.29 seconds |
| Started | Sep 24 09:37:27 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1622122166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 103.usbdev_fifo_levels.1622122166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/103.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/105.usbdev_fifo_levels.201846502 |
| Short name | T323 |
| Test name | |
| Test status | |
| Simulation time | 275838166 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:37:27 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=201846502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 105.usbdev_fifo_levels.201846502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/105.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/108.usbdev_fifo_levels.2991804695 |
| Short name | T3329 |
| Test name | |
| Test status | |
| Simulation time | 333878683 ps |
| CPU time | 1.14 seconds |
| Started | Sep 24 09:37:27 AM UTC 24 |
| Finished | Sep 24 09:37:30 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2991804695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 108.usbdev_fifo_levels.2991804695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/108.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_levels.2839069594 |
| Short name | T389 |
| Test name | |
| Test status | |
| Simulation time | 258861643 ps |
| CPU time | 1.87 seconds |
| Started | Sep 24 09:05:16 AM UTC 24 |
| Finished | Sep 24 09:05:18 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2839069594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_fifo_levels.2839069594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/111.usbdev_fifo_levels.3895171626 |
| Short name | T370 |
| Test name | |
| Test status | |
| Simulation time | 294733720 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:18 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3895171626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 111.usbdev_fifo_levels.3895171626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/111.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/113.usbdev_fifo_levels.2380839182 |
| Short name | T377 |
| Test name | |
| Test status | |
| Simulation time | 195023731 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:18 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2380839182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 113.usbdev_fifo_levels.2380839182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/113.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/114.usbdev_fifo_levels.363874574 |
| Short name | T358 |
| Test name | |
| Test status | |
| Simulation time | 257029278 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=363874574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 114.usbdev_fifo_levels.363874574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/114.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.1435309988 |
| Short name | T472 |
| Test name | |
| Test status | |
| Simulation time | 748254562 ps |
| CPU time | 1.97 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1435309988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_endpoint_types.1435309988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/115.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/117.usbdev_fifo_levels.581257136 |
| Short name | T403 |
| Test name | |
| Test status | |
| Simulation time | 259754482 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=581257136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 117.usbdev_fifo_levels.581257136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/117.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_levels.596146645 |
| Short name | T399 |
| Test name | |
| Test status | |
| Simulation time | 293068423 ps |
| CPU time | 2.05 seconds |
| Started | Sep 24 09:05:56 AM UTC 24 |
| Finished | Sep 24 09:05:59 AM UTC 24 |
| Peak memory | 217700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=596146645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_fifo_levels.596146645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_invalid_sync.2748884234 |
| Short name | T303 |
| Test name | |
| Test status | |
| Simulation time | 5834829596 ps |
| CPU time | 56.91 seconds |
| Started | Sep 24 09:05:56 AM UTC 24 |
| Finished | Sep 24 09:06:54 AM UTC 24 |
| Peak memory | 230472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2748884234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 12.usbdev_invalid_sync.2748884234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/120.usbdev_endpoint_types.1509144642 |
| Short name | T556 |
| Test name | |
| Test status | |
| Simulation time | 240340625 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1509144642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_endpoint_types.1509144642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/120.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/120.usbdev_fifo_levels.504329310 |
| Short name | T3348 |
| Test name | |
| Test status | |
| Simulation time | 264434869 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=504329310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 120.usbdev_fifo_levels.504329310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/120.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/121.usbdev_fifo_levels.2791012050 |
| Short name | T388 |
| Test name | |
| Test status | |
| Simulation time | 185742572 ps |
| CPU time | 0.89 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2791012050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 121.usbdev_fifo_levels.2791012050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/121.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/122.usbdev_fifo_levels.1734483287 |
| Short name | T318 |
| Test name | |
| Test status | |
| Simulation time | 274029103 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1734483287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 122.usbdev_fifo_levels.1734483287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/122.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/123.usbdev_fifo_levels.717878475 |
| Short name | T336 |
| Test name | |
| Test status | |
| Simulation time | 184676920 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:39:07 AM UTC 24 |
| Finished | Sep 24 09:39:09 AM UTC 24 |
| Peak memory | 214336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=717878475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 123.usbdev_fifo_levels.717878475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/123.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/125.usbdev_fifo_levels.514834849 |
| Short name | T3370 |
| Test name | |
| Test status | |
| Simulation time | 251993252 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:39:08 AM UTC 24 |
| Finished | Sep 24 09:39:10 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=514834849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 125.usbdev_fifo_levels.514834849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/125.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/126.usbdev_fifo_levels.2591037655 |
| Short name | T398 |
| Test name | |
| Test status | |
| Simulation time | 174430752 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:39:08 AM UTC 24 |
| Finished | Sep 24 09:39:10 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2591037655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 126.usbdev_fifo_levels.2591037655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/126.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/128.usbdev_fifo_levels.552262089 |
| Short name | T335 |
| Test name | |
| Test status | |
| Simulation time | 245928853 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:39:08 AM UTC 24 |
| Finished | Sep 24 09:39:11 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=552262089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 128.usbdev_fifo_levels.552262089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/128.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/129.usbdev_fifo_levels.3409667001 |
| Short name | T369 |
| Test name | |
| Test status | |
| Simulation time | 280003254 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3409667001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 129.usbdev_fifo_levels.3409667001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/129.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/138.usbdev_fifo_levels.895294043 |
| Short name | T354 |
| Test name | |
| Test status | |
| Simulation time | 301972495 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 09:39:57 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=895294043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 138.usbdev_fifo_levels.895294043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/138.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_levels.1829763655 |
| Short name | T391 |
| Test name | |
| Test status | |
| Simulation time | 269211141 ps |
| CPU time | 2.08 seconds |
| Started | Sep 24 09:06:57 AM UTC 24 |
| Finished | Sep 24 09:07:00 AM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1829763655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_fifo_levels.1829763655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/142.usbdev_fifo_levels.159627881 |
| Short name | T344 |
| Test name | |
| Test status | |
| Simulation time | 259506580 ps |
| CPU time | 1.2 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=159627881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 142.usbdev_fifo_levels.159627881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/142.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/143.usbdev_endpoint_types.3338799519 |
| Short name | T505 |
| Test name | |
| Test status | |
| Simulation time | 432500291 ps |
| CPU time | 1.83 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:01 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3338799519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_endpoint_types.3338799519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/143.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/145.usbdev_endpoint_types.3440542387 |
| Short name | T3403 |
| Test name | |
| Test status | |
| Simulation time | 501462646 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:01 AM UTC 24 |
| Peak memory | 215616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3440542387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_endpoint_types.3440542387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/145.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/146.usbdev_fifo_levels.1223289729 |
| Short name | T350 |
| Test name | |
| Test status | |
| Simulation time | 169310283 ps |
| CPU time | 1.14 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1223289729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 146.usbdev_fifo_levels.1223289729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/146.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/148.usbdev_fifo_levels.2315977878 |
| Short name | T3395 |
| Test name | |
| Test status | |
| Simulation time | 175429098 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2315977878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 148.usbdev_fifo_levels.2315977878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/148.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/151.usbdev_fifo_levels.2025387633 |
| Short name | T339 |
| Test name | |
| Test status | |
| Simulation time | 150258766 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:40:49 AM UTC 24 |
| Finished | Sep 24 09:40:51 AM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2025387633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 151.usbdev_fifo_levels.2025387633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/151.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/155.usbdev_fifo_levels.3850399519 |
| Short name | T361 |
| Test name | |
| Test status | |
| Simulation time | 203703234 ps |
| CPU time | 1.12 seconds |
| Started | Sep 24 09:40:49 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3850399519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 155.usbdev_fifo_levels.3850399519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/155.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_rx_full.1546135862 |
| Short name | T351 |
| Test name | |
| Test status | |
| Simulation time | 298374661 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:08:30 AM UTC 24 |
| Finished | Sep 24 09:08:32 AM UTC 24 |
| Peak memory | 215816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1546135862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_rx_full.1546135862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/173.usbdev_endpoint_types.3243738587 |
| Short name | T596 |
| Test name | |
| Test status | |
| Simulation time | 345659715 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 09:41:42 AM UTC 24 |
| Finished | Sep 24 09:41:45 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3243738587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_endpoint_types.3243738587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/173.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/197.usbdev_endpoint_types.2191381238 |
| Short name | T572 |
| Test name | |
| Test status | |
| Simulation time | 554179671 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:39 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2191381238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_endpoint_types.2191381238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/197.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_levels.4026911004 |
| Short name | T400 |
| Test name | |
| Test status | |
| Simulation time | 315583441 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:10:28 AM UTC 24 |
| Finished | Sep 24 09:10:30 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4026911004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_fifo_levels.4026911004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_levels.2911209779 |
| Short name | T405 |
| Test name | |
| Test status | |
| Simulation time | 321772445 ps |
| CPU time | 2.08 seconds |
| Started | Sep 24 09:10:58 AM UTC 24 |
| Finished | Sep 24 09:11:01 AM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2911209779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_fifo_levels.2911209779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_types.1898462474 |
| Short name | T544 |
| Test name | |
| Test status | |
| Simulation time | 431185150 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 09:14:12 AM UTC 24 |
| Finished | Sep 24 09:14:16 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1898462474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_types.1898462474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_types.911673727 |
| Short name | T461 |
| Test name | |
| Test status | |
| Simulation time | 298919522 ps |
| CPU time | 2.06 seconds |
| Started | Sep 24 08:59:10 AM UTC 24 |
| Finished | Sep 24 08:59:13 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=911673727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_types.911673727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_levels.4256025045 |
| Short name | T315 |
| Test name | |
| Test status | |
| Simulation time | 279537542 ps |
| CPU time | 2.03 seconds |
| Started | Sep 24 08:59:11 AM UTC 24 |
| Finished | Sep 24 08:59:14 AM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4256025045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_fifo_levels.4256025045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_levels.4072424392 |
| Short name | T331 |
| Test name | |
| Test status | |
| Simulation time | 284758390 ps |
| CPU time | 1.12 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:44 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4072424392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_fifo_levels.4072424392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_levels.874631823 |
| Short name | T340 |
| Test name | |
| Test status | |
| Simulation time | 268660580 ps |
| CPU time | 1.8 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:51 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=874631823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_fifo_levels.874631823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_types.4042866214 |
| Short name | T485 |
| Test name | |
| Test status | |
| Simulation time | 357623657 ps |
| CPU time | 1.31 seconds |
| Started | Sep 24 09:32:20 AM UTC 24 |
| Finished | Sep 24 09:32:22 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4042866214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_types.4042866214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/54.usbdev_fifo_levels.3590606866 |
| Short name | T383 |
| Test name | |
| Test status | |
| Simulation time | 273629310 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:25 AM UTC 24 |
| Peak memory | 215880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3590606866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 54.usbdev_fifo_levels.3590606866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/54.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/68.usbdev_endpoint_types.199345695 |
| Short name | T502 |
| Test name | |
| Test status | |
| Simulation time | 477885015 ps |
| CPU time | 1.93 seconds |
| Started | Sep 24 09:35:47 AM UTC 24 |
| Finished | Sep 24 09:35:50 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=199345695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 68.usbdev_endpoint_types.199345695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/68.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/70.usbdev_fifo_levels.3572490532 |
| Short name | T356 |
| Test name | |
| Test status | |
| Simulation time | 271400345 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:50 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3572490532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 70.usbdev_fifo_levels.3572490532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/70.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/72.usbdev_fifo_levels.4182364620 |
| Short name | T382 |
| Test name | |
| Test status | |
| Simulation time | 325667907 ps |
| CPU time | 1.3 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:50 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4182364620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 72.usbdev_fifo_levels.4182364620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/72.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/75.usbdev_fifo_levels.4024756955 |
| Short name | T327 |
| Test name | |
| Test status | |
| Simulation time | 271364339 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:50 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4024756955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 75.usbdev_fifo_levels.4024756955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/75.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.3246339469 |
| Short name | T511 |
| Test name | |
| Test status | |
| Simulation time | 671084585 ps |
| CPU time | 2.14 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:41 AM UTC 24 |
| Peak memory | 217748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3246339469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_endpoint_types.3246339469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/85.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.1468212460 |
| Short name | T20 |
| Test name | |
| Test status | |
| Simulation time | 162864133 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 08:54:16 AM UTC 24 |
| Finished | Sep 24 08:54:19 AM UTC 24 |
| Peak memory | 214900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1468212460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_usb_ref_disable.1468212460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_link_suspend.3320151292 |
| Short name | T63 |
| Test name | |
| Test status | |
| Simulation time | 4792237513 ps |
| CPU time | 9.37 seconds |
| Started | Sep 24 08:54:07 AM UTC 24 |
| Finished | Sep 24 08:54:18 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3320151292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_link_suspend.3320151292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_max_non_iso_usb_traffic.3348575139 |
| Short name | T5 |
| Test name | |
| Test status | |
| Simulation time | 1652349234 ps |
| CPU time | 22.32 seconds |
| Started | Sep 24 08:54:09 AM UTC 24 |
| Finished | Sep 24 08:54:33 AM UTC 24 |
| Peak memory | 234768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3348575139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_non_iso_usb_traffic.3348575139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_stress_usb_traffic.2294767763 |
| Short name | T118 |
| Test name | |
| Test status | |
| Simulation time | 14992947842 ps |
| CPU time | 448.19 seconds |
| Started | Sep 24 08:57:07 AM UTC 24 |
| Finished | Sep 24 09:04:41 AM UTC 24 |
| Peak memory | 228360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2294767763 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stress_usb_traffic.2294767763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_av_overflow.2269496582 |
| Short name | T92 |
| Test name | |
| Test status | |
| Simulation time | 137323207 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 08:59:01 AM UTC 24 |
| Finished | Sep 24 08:59:03 AM UTC 24 |
| Peak memory | 214932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2269496582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_av_overflow.2269496582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.2539082214 |
| Short name | T2 |
| Test name | |
| Test status | |
| Simulation time | 148158770 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 08:54:03 AM UTC 24 |
| Finished | Sep 24 08:54:06 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2539082214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_av_empty.2539082214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.1709012883 |
| Short name | T29 |
| Test name | |
| Test status | |
| Simulation time | 496033605 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 08:54:05 AM UTC 24 |
| Finished | Sep 24 08:54:08 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1709012883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_invalid_data1_data0_toggle_test.1709012883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_invalid_data1_data0_toggle_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.2289266827 |
| Short name | T49 |
| Test name | |
| Test status | |
| Simulation time | 182570107 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 08:54:07 AM UTC 24 |
| Finished | Sep 24 08:54:10 AM UTC 24 |
| Peak memory | 215536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2289266827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_reset_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_link_reset.2289266827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_link_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.580739338 |
| Short name | T79 |
| Test name | |
| Test status | |
| Simulation time | 193077383 ps |
| CPU time | 1.9 seconds |
| Started | Sep 24 08:54:20 AM UTC 24 |
| Finished | Sep 24 08:54:23 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=580739338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_rx_pid_err.580739338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.1915481006 |
| Short name | T52 |
| Test name | |
| Test status | |
| Simulation time | 167701389 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 08:54:34 AM UTC 24 |
| Finished | Sep 24 08:54:36 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1915481006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_av_empty.1915481006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.4142386308 |
| Short name | T3826 |
| Test name | |
| Test status | |
| Simulation time | 93469507 ps |
| CPU time | 2.23 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:42 AM UTC 24 |
| Peak memory | 217636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4142386308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_errors.4142386308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.1502702781 |
| Short name | T247 |
| Test name | |
| Test status | |
| Simulation time | 541983085 ps |
| CPU time | 2.61 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:48 AM UTC 24 |
| Peak memory | 217508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1502702781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_intg_err.1502702781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.2289166677 |
| Short name | T235 |
| Test name | |
| Test status | |
| Simulation time | 503512233 ps |
| CPU time | 2.75 seconds |
| Started | Sep 24 08:47:32 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 217584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2289166677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_intg_err.2289166677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.73549839 |
| Short name | T246 |
| Test name | |
| Test status | |
| Simulation time | 549975459 ps |
| CPU time | 4.26 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:44 AM UTC 24 |
| Peak memory | 217516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=73549839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SE Q=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/covera ge/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_intg_err.73549839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.2844972277 |
| Short name | T75 |
| Test name | |
| Test status | |
| Simulation time | 227010474 ps |
| CPU time | 1.14 seconds |
| Started | Sep 24 08:54:11 AM UTC 24 |
| Finished | Sep 24 08:54:13 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2844972277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_nak_trans.2844972277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_iso_retraction.1444067485 |
| Short name | T93 |
| Test name | |
| Test status | |
| Simulation time | 11230609767 ps |
| CPU time | 117.53 seconds |
| Started | Sep 24 08:54:51 AM UTC 24 |
| Finished | Sep 24 08:56:51 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1444067485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_iso_retraction.1444067485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.455236730 |
| Short name | T146 |
| Test name | |
| Test status | |
| Simulation time | 170691803 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 08:55:09 AM UTC 24 |
| Finished | Sep 24 08:55:11 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=455236730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_nak_trans.455236730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_nak_trans.2122079731 |
| Short name | T157 |
| Test name | |
| Test status | |
| Simulation time | 233417244 ps |
| CPU time | 1.78 seconds |
| Started | Sep 24 09:04:50 AM UTC 24 |
| Finished | Sep 24 09:04:53 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2122079731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_nak_trans.2122079731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_nak_trans.3899550811 |
| Short name | T149 |
| Test name | |
| Test status | |
| Simulation time | 200971278 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:06:34 AM UTC 24 |
| Finished | Sep 24 09:06:37 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3899550811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_nak_trans.3899550811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/137.usbdev_tx_rx_disruption.1397913815 |
| Short name | T3389 |
| Test name | |
| Test status | |
| Simulation time | 619439180 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:39:57 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1397913815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_ tx_rx_disruption.1397913815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/137.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_nak_trans.645754092 |
| Short name | T137 |
| Test name | |
| Test status | |
| Simulation time | 179032148 ps |
| CPU time | 1.28 seconds |
| Started | Sep 24 09:08:23 AM UTC 24 |
| Finished | Sep 24 09:08:25 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=645754092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_nak_trans.645754092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/162.usbdev_tx_rx_disruption.2499200241 |
| Short name | T124 |
| Test name | |
| Test status | |
| Simulation time | 602342404 ps |
| CPU time | 1.76 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:53 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2499200241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_ tx_rx_disruption.2499200241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/162.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_nak_trans.1882139064 |
| Short name | T131 |
| Test name | |
| Test status | |
| Simulation time | 210668073 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:09:29 AM UTC 24 |
| Finished | Sep 24 09:09:31 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1882139064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_nak_trans.1882139064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_nak_trans.68229619 |
| Short name | T159 |
| Test name | |
| Test status | |
| Simulation time | 246990723 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:10:04 AM UTC 24 |
| Finished | Sep 24 09:10:06 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=68229619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_nak_trans.68229619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_nak_trans.2353277404 |
| Short name | T135 |
| Test name | |
| Test status | |
| Simulation time | 216144317 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:11:07 AM UTC 24 |
| Finished | Sep 24 09:11:10 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2353277404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_nak_trans.2353277404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_nak_trans.4097580692 |
| Short name | T140 |
| Test name | |
| Test status | |
| Simulation time | 232225100 ps |
| CPU time | 1.33 seconds |
| Started | Sep 24 09:13:38 AM UTC 24 |
| Finished | Sep 24 09:13:41 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4097580692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_nak_trans.4097580692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_nak_trans.2216519800 |
| Short name | T154 |
| Test name | |
| Test status | |
| Simulation time | 200886720 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:21:47 AM UTC 24 |
| Finished | Sep 24 09:21:50 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2216519800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_nak_trans.2216519800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.943175897 |
| Short name | T267 |
| Test name | |
| Test status | |
| Simulation time | 198502704 ps |
| CPU time | 2.05 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:25 AM UTC 24 |
| Peak memory | 217604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=943175897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_aliasing.943175897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.3045427691 |
| Short name | T3796 |
| Test name | |
| Test status | |
| Simulation time | 1294107925 ps |
| CPU time | 7.37 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:30 AM UTC 24 |
| Peak memory | 217520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3045427691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_bit_bash.3045427691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.2885901145 |
| Short name | T210 |
| Test name | |
| Test status | |
| Simulation time | 137417298 ps |
| CPU time | 1.86 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:25 AM UTC 24 |
| Peak memory | 226872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2885901145 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_mem_rw_with_rand_reset.2885901145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.726538739 |
| Short name | T231 |
| Test name | |
| Test status | |
| Simulation time | 74686234 ps |
| CPU time | 0.96 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:23 AM UTC 24 |
| Peak memory | 217052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=726538739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_rw.726538739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.3955238256 |
| Short name | T266 |
| Test name | |
| Test status | |
| Simulation time | 230681206 ps |
| CPU time | 2.24 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:25 AM UTC 24 |
| Peak memory | 227784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3955238256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_partial_access.3955238256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.710766568 |
| Short name | T3794 |
| Test name | |
| Test status | |
| Simulation time | 256622100 ps |
| CPU time | 2.62 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:25 AM UTC 24 |
| Peak memory | 217832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=710766568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_walk.710766568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.3446359392 |
| Short name | T232 |
| Test name | |
| Test status | |
| Simulation time | 129825301 ps |
| CPU time | 1.29 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:24 AM UTC 24 |
| Peak memory | 217120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3446359392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_same_csr_outstanding.3446359392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.2601564947 |
| Short name | T209 |
| Test name | |
| Test status | |
| Simulation time | 93428718 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:24 AM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2601564947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_errors.2601564947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.3100868224 |
| Short name | T230 |
| Test name | |
| Test status | |
| Simulation time | 1405613594 ps |
| CPU time | 4.7 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:27 AM UTC 24 |
| Peak memory | 217584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3100868224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_intg_err.3100868224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.4164759348 |
| Short name | T290 |
| Test name | |
| Test status | |
| Simulation time | 189772601 ps |
| CPU time | 1.9 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:25 AM UTC 24 |
| Peak memory | 217068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4164759348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_aliasing.4164759348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.149286776 |
| Short name | T268 |
| Test name | |
| Test status | |
| Simulation time | 689826497 ps |
| CPU time | 3.97 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:27 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=149286776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_bit_bash.149286776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_hw_reset.692516197 |
| Short name | T236 |
| Test name | |
| Test status | |
| Simulation time | 93158220 ps |
| CPU time | 0.8 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:24 AM UTC 24 |
| Peak memory | 216992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=692516197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_hw_reset.692516197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.1576140590 |
| Short name | T248 |
| Test name | |
| Test status | |
| Simulation time | 115855953 ps |
| CPU time | 1.31 seconds |
| Started | Sep 24 08:47:32 AM UTC 24 |
| Finished | Sep 24 08:47:34 AM UTC 24 |
| Peak memory | 227016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1576140590 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_mem_rw_with_rand_reset.1576140590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_rw.1113064831 |
| Short name | T233 |
| Test name | |
| Test status | |
| Simulation time | 167915568 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:24 AM UTC 24 |
| Peak memory | 217052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1113064831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_rw.1113064831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.1823982537 |
| Short name | T219 |
| Test name | |
| Test status | |
| Simulation time | 29179379 ps |
| CPU time | 0.7 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:24 AM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1823982537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_intr_test.1823982537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.1466737624 |
| Short name | T3795 |
| Test name | |
| Test status | |
| Simulation time | 733749416 ps |
| CPU time | 4.64 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:28 AM UTC 24 |
| Peak memory | 217448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1466737624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_walk.1466737624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.4133001785 |
| Short name | T278 |
| Test name | |
| Test status | |
| Simulation time | 229149619 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 08:47:21 AM UTC 24 |
| Finished | Sep 24 08:47:25 AM UTC 24 |
| Peak memory | 217120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4133001785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_same_csr_outstanding.4133001785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.1819453521 |
| Short name | T3823 |
| Test name | |
| Test status | |
| Simulation time | 107810872 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:41 AM UTC 24 |
| Peak memory | 226996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1819453521 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_mem_rw_with_rand_reset.1819453521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.1871752435 |
| Short name | T280 |
| Test name | |
| Test status | |
| Simulation time | 70026278 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:41 AM UTC 24 |
| Peak memory | 217056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1871752435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_rw.1871752435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.389473602 |
| Short name | T309 |
| Test name | |
| Test status | |
| Simulation time | 36136127 ps |
| CPU time | 0.75 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:40 AM UTC 24 |
| Peak memory | 215144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=389473602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 10.usbdev_intr_test.389473602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.1401204350 |
| Short name | T3817 |
| Test name | |
| Test status | |
| Simulation time | 232673329 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:41 AM UTC 24 |
| Peak memory | 217120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1401204350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_same_csr_outstanding.1401204350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.854205438 |
| Short name | T3827 |
| Test name | |
| Test status | |
| Simulation time | 153141631 ps |
| CPU time | 1.83 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:42 AM UTC 24 |
| Peak memory | 226988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=854205438 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_mem_rw_with_rand_reset.854205438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.3072713357 |
| Short name | T271 |
| Test name | |
| Test status | |
| Simulation time | 53507015 ps |
| CPU time | 1 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:41 AM UTC 24 |
| Peak memory | 217056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3072713357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_rw.3072713357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.903104673 |
| Short name | T3822 |
| Test name | |
| Test status | |
| Simulation time | 175296762 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:41 AM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=903104673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_same_csr_outstanding.903104673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.2846626820 |
| Short name | T3831 |
| Test name | |
| Test status | |
| Simulation time | 339368957 ps |
| CPU time | 3.48 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:43 AM UTC 24 |
| Peak memory | 227812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2846626820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_errors.2846626820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.1811507049 |
| Short name | T417 |
| Test name | |
| Test status | |
| Simulation time | 440313668 ps |
| CPU time | 2.79 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:43 AM UTC 24 |
| Peak memory | 217844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1811507049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_intg_err.1811507049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.560544548 |
| Short name | T3834 |
| Test name | |
| Test status | |
| Simulation time | 169776719 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 08:47:41 AM UTC 24 |
| Finished | Sep 24 08:47:43 AM UTC 24 |
| Peak memory | 226988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=560544548 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_mem_rw_with_rand_reset.560544548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.979596027 |
| Short name | T3818 |
| Test name | |
| Test status | |
| Simulation time | 63218682 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 08:47:39 AM UTC 24 |
| Finished | Sep 24 08:47:41 AM UTC 24 |
| Peak memory | 217060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=979596027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_rw.979596027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.3717337833 |
| Short name | T313 |
| Test name | |
| Test status | |
| Simulation time | 43267054 ps |
| CPU time | 0.82 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:41 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3717337833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_intr_test.3717337833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.2465089379 |
| Short name | T3820 |
| Test name | |
| Test status | |
| Simulation time | 43529468 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 08:47:39 AM UTC 24 |
| Finished | Sep 24 08:47:41 AM UTC 24 |
| Peak memory | 217056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2465089379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_same_csr_outstanding.2465089379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.1432972943 |
| Short name | T3824 |
| Test name | |
| Test status | |
| Simulation time | 117146230 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:41 AM UTC 24 |
| Peak memory | 217052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1432972943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_errors.1432972943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.1623381403 |
| Short name | T3845 |
| Test name | |
| Test status | |
| Simulation time | 1183862540 ps |
| CPU time | 5.53 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:45 AM UTC 24 |
| Peak memory | 217568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1623381403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_intg_err.1623381403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.1544478614 |
| Short name | T3842 |
| Test name | |
| Test status | |
| Simulation time | 132514669 ps |
| CPU time | 2.44 seconds |
| Started | Sep 24 08:47:41 AM UTC 24 |
| Finished | Sep 24 08:47:45 AM UTC 24 |
| Peak memory | 228088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1544478614 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_mem_rw_with_rand_reset.1544478614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.1700182812 |
| Short name | T3830 |
| Test name | |
| Test status | |
| Simulation time | 82075812 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 08:47:41 AM UTC 24 |
| Finished | Sep 24 08:47:43 AM UTC 24 |
| Peak memory | 217056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1700182812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_rw.1700182812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.548236215 |
| Short name | T3829 |
| Test name | |
| Test status | |
| Simulation time | 42938760 ps |
| CPU time | 0.75 seconds |
| Started | Sep 24 08:47:41 AM UTC 24 |
| Finished | Sep 24 08:47:43 AM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=548236215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 13.usbdev_intr_test.548236215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.2747437748 |
| Short name | T3838 |
| Test name | |
| Test status | |
| Simulation time | 87410323 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 08:47:41 AM UTC 24 |
| Finished | Sep 24 08:47:44 AM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2747437748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_same_csr_outstanding.2747437748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.2953185177 |
| Short name | T3864 |
| Test name | |
| Test status | |
| Simulation time | 943030276 ps |
| CPU time | 5.29 seconds |
| Started | Sep 24 08:47:41 AM UTC 24 |
| Finished | Sep 24 08:47:47 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2953185177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_intg_err.2953185177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.3203350409 |
| Short name | T3839 |
| Test name | |
| Test status | |
| Simulation time | 155826063 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 08:47:41 AM UTC 24 |
| Finished | Sep 24 08:47:44 AM UTC 24 |
| Peak memory | 233608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3203350409 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_mem_rw_with_rand_reset.3203350409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.925752261 |
| Short name | T3832 |
| Test name | |
| Test status | |
| Simulation time | 49503564 ps |
| CPU time | 0.81 seconds |
| Started | Sep 24 08:47:41 AM UTC 24 |
| Finished | Sep 24 08:47:43 AM UTC 24 |
| Peak memory | 217060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=925752261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_rw.925752261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.3993085421 |
| Short name | T3836 |
| Test name | |
| Test status | |
| Simulation time | 65692684 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 08:47:41 AM UTC 24 |
| Finished | Sep 24 08:47:44 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3993085421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_intr_test.3993085421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.1167030897 |
| Short name | T3841 |
| Test name | |
| Test status | |
| Simulation time | 252153871 ps |
| CPU time | 1.79 seconds |
| Started | Sep 24 08:47:41 AM UTC 24 |
| Finished | Sep 24 08:47:45 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1167030897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_same_csr_outstanding.1167030897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.1325557959 |
| Short name | T3840 |
| Test name | |
| Test status | |
| Simulation time | 86287739 ps |
| CPU time | 1.95 seconds |
| Started | Sep 24 08:47:41 AM UTC 24 |
| Finished | Sep 24 08:47:44 AM UTC 24 |
| Peak memory | 233916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1325557959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_errors.1325557959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.209616793 |
| Short name | T414 |
| Test name | |
| Test status | |
| Simulation time | 615442912 ps |
| CPU time | 2.52 seconds |
| Started | Sep 24 08:47:41 AM UTC 24 |
| Finished | Sep 24 08:47:45 AM UTC 24 |
| Peak memory | 217520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=209616793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_intg_err.209616793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.1213469013 |
| Short name | T3857 |
| Test name | |
| Test status | |
| Simulation time | 94772436 ps |
| CPU time | 1.74 seconds |
| Started | Sep 24 08:47:43 AM UTC 24 |
| Finished | Sep 24 08:47:47 AM UTC 24 |
| Peak memory | 226948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1213469013 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_mem_rw_with_rand_reset.1213469013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.1845540987 |
| Short name | T3837 |
| Test name | |
| Test status | |
| Simulation time | 114838281 ps |
| CPU time | 1 seconds |
| Started | Sep 24 08:47:41 AM UTC 24 |
| Finished | Sep 24 08:47:44 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1845540987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_rw.1845540987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.1471809703 |
| Short name | T3835 |
| Test name | |
| Test status | |
| Simulation time | 41735931 ps |
| CPU time | 0.74 seconds |
| Started | Sep 24 08:47:41 AM UTC 24 |
| Finished | Sep 24 08:47:43 AM UTC 24 |
| Peak memory | 216744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1471809703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_intr_test.1471809703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.2047779058 |
| Short name | T3850 |
| Test name | |
| Test status | |
| Simulation time | 124822608 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 08:47:43 AM UTC 24 |
| Finished | Sep 24 08:47:46 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2047779058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_same_csr_outstanding.2047779058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.2019897364 |
| Short name | T3844 |
| Test name | |
| Test status | |
| Simulation time | 123382982 ps |
| CPU time | 2.9 seconds |
| Started | Sep 24 08:47:41 AM UTC 24 |
| Finished | Sep 24 08:47:45 AM UTC 24 |
| Peak memory | 234268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2019897364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_errors.2019897364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.1758379699 |
| Short name | T418 |
| Test name | |
| Test status | |
| Simulation time | 729875676 ps |
| CPU time | 4.64 seconds |
| Started | Sep 24 08:47:41 AM UTC 24 |
| Finished | Sep 24 08:47:47 AM UTC 24 |
| Peak memory | 217840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1758379699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_intg_err.1758379699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.475261811 |
| Short name | T3861 |
| Test name | |
| Test status | |
| Simulation time | 183379366 ps |
| CPU time | 1.94 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:47 AM UTC 24 |
| Peak memory | 226984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=475261811 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_mem_rw_with_rand_reset.475261811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.196978693 |
| Short name | T3848 |
| Test name | |
| Test status | |
| Simulation time | 90150773 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:46 AM UTC 24 |
| Peak memory | 217060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=196978693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_rw.196978693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.2603265358 |
| Short name | T3847 |
| Test name | |
| Test status | |
| Simulation time | 76803018 ps |
| CPU time | 0.76 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:46 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2603265358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_intr_test.2603265358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.1160231109 |
| Short name | T3858 |
| Test name | |
| Test status | |
| Simulation time | 210919287 ps |
| CPU time | 1.76 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:47 AM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1160231109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_same_csr_outstanding.1160231109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.388802613 |
| Short name | T3855 |
| Test name | |
| Test status | |
| Simulation time | 127775719 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 08:47:43 AM UTC 24 |
| Finished | Sep 24 08:47:47 AM UTC 24 |
| Peak memory | 217004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=388802613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_errors.388802613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.2588074000 |
| Short name | T3865 |
| Test name | |
| Test status | |
| Simulation time | 145635127 ps |
| CPU time | 2.36 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:48 AM UTC 24 |
| Peak memory | 227892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2588074000 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_mem_rw_with_rand_reset.2588074000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.3422994515 |
| Short name | T3851 |
| Test name | |
| Test status | |
| Simulation time | 57764702 ps |
| CPU time | 0.84 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:46 AM UTC 24 |
| Peak memory | 217056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3422994515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_rw.3422994515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.908896768 |
| Short name | T3849 |
| Test name | |
| Test status | |
| Simulation time | 67333059 ps |
| CPU time | 0.76 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:46 AM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=908896768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 17.usbdev_intr_test.908896768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.3457796967 |
| Short name | T3863 |
| Test name | |
| Test status | |
| Simulation time | 209348545 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:47 AM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3457796967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_same_csr_outstanding.3457796967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.1395935102 |
| Short name | T3866 |
| Test name | |
| Test status | |
| Simulation time | 221008737 ps |
| CPU time | 2.78 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:48 AM UTC 24 |
| Peak memory | 217588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1395935102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_errors.1395935102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.2761267210 |
| Short name | T3893 |
| Test name | |
| Test status | |
| Simulation time | 1089609620 ps |
| CPU time | 5.06 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:50 AM UTC 24 |
| Peak memory | 217592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2761267210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_intg_err.2761267210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.1035353407 |
| Short name | T3859 |
| Test name | |
| Test status | |
| Simulation time | 100692383 ps |
| CPU time | 1.3 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:47 AM UTC 24 |
| Peak memory | 226888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1035353407 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_mem_rw_with_rand_reset.1035353407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.4154998407 |
| Short name | T3852 |
| Test name | |
| Test status | |
| Simulation time | 79610206 ps |
| CPU time | 0.82 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:46 AM UTC 24 |
| Peak memory | 217056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4154998407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_rw.4154998407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.3351711698 |
| Short name | T3853 |
| Test name | |
| Test status | |
| Simulation time | 38352582 ps |
| CPU time | 0.84 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:46 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3351711698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_intr_test.3351711698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.1014273885 |
| Short name | T3862 |
| Test name | |
| Test status | |
| Simulation time | 174953913 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:47 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1014273885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_same_csr_outstanding.1014273885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.2819834008 |
| Short name | T3860 |
| Test name | |
| Test status | |
| Simulation time | 177861777 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:47 AM UTC 24 |
| Peak memory | 216992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2819834008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_errors.2819834008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.1719163541 |
| Short name | T3867 |
| Test name | |
| Test status | |
| Simulation time | 275269321 ps |
| CPU time | 2.33 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:48 AM UTC 24 |
| Peak memory | 217584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1719163541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_intg_err.1719163541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.573984547 |
| Short name | T3889 |
| Test name | |
| Test status | |
| Simulation time | 89456349 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 08:47:46 AM UTC 24 |
| Finished | Sep 24 08:47:49 AM UTC 24 |
| Peak memory | 226988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=573984547 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_mem_rw_with_rand_reset.573984547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.1738272067 |
| Short name | T3856 |
| Test name | |
| Test status | |
| Simulation time | 71915465 ps |
| CPU time | 0.86 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:47 AM UTC 24 |
| Peak memory | 217056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1738272067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_rw.1738272067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.2905022071 |
| Short name | T3854 |
| Test name | |
| Test status | |
| Simulation time | 44854613 ps |
| CPU time | 0.72 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:46 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2905022071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_intr_test.2905022071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.1590804485 |
| Short name | T3876 |
| Test name | |
| Test status | |
| Simulation time | 140167395 ps |
| CPU time | 1.12 seconds |
| Started | Sep 24 08:47:46 AM UTC 24 |
| Finished | Sep 24 08:47:48 AM UTC 24 |
| Peak memory | 217072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1590804485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_same_csr_outstanding.1590804485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.4220731629 |
| Short name | T3884 |
| Test name | |
| Test status | |
| Simulation time | 273152851 ps |
| CPU time | 3.08 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:49 AM UTC 24 |
| Peak memory | 234828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4220731629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_errors.4220731629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.3136365354 |
| Short name | T3892 |
| Test name | |
| Test status | |
| Simulation time | 790151812 ps |
| CPU time | 4.63 seconds |
| Started | Sep 24 08:47:44 AM UTC 24 |
| Finished | Sep 24 08:47:50 AM UTC 24 |
| Peak memory | 217548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3136365354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_intg_err.3136365354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.85541615 |
| Short name | T291 |
| Test name | |
| Test status | |
| Simulation time | 208688382 ps |
| CPU time | 2.3 seconds |
| Started | Sep 24 08:47:32 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 217580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=85541615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/ cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_aliasing.85541615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.346664766 |
| Short name | T3808 |
| Test name | |
| Test status | |
| Simulation time | 530137260 ps |
| CPU time | 4.22 seconds |
| Started | Sep 24 08:47:32 AM UTC 24 |
| Finished | Sep 24 08:47:38 AM UTC 24 |
| Peak memory | 217604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=346664766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_bit_bash.346664766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.44700388 |
| Short name | T3797 |
| Test name | |
| Test status | |
| Simulation time | 87244974 ps |
| CPU time | 0.87 seconds |
| Started | Sep 24 08:47:32 AM UTC 24 |
| Finished | Sep 24 08:47:34 AM UTC 24 |
| Peak memory | 217056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=44700388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/ cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_hw_reset.44700388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.1484862136 |
| Short name | T249 |
| Test name | |
| Test status | |
| Simulation time | 99412470 ps |
| CPU time | 2.3 seconds |
| Started | Sep 24 08:47:32 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 227876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1484862136 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_mem_rw_with_rand_reset.1484862136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.3270752140 |
| Short name | T279 |
| Test name | |
| Test status | |
| Simulation time | 44012806 ps |
| CPU time | 0.79 seconds |
| Started | Sep 24 08:47:32 AM UTC 24 |
| Finished | Sep 24 08:47:34 AM UTC 24 |
| Peak memory | 217052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3270752140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_rw.3270752140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_intr_test.588304175 |
| Short name | T218 |
| Test name | |
| Test status | |
| Simulation time | 39501147 ps |
| CPU time | 0.68 seconds |
| Started | Sep 24 08:47:32 AM UTC 24 |
| Finished | Sep 24 08:47:34 AM UTC 24 |
| Peak memory | 216732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=588304175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 2.usbdev_intr_test.588304175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.1280469097 |
| Short name | T270 |
| Test name | |
| Test status | |
| Simulation time | 141625107 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 08:47:32 AM UTC 24 |
| Finished | Sep 24 08:47:35 AM UTC 24 |
| Peak memory | 227036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1280469097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_partial_access.1280469097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.3630921130 |
| Short name | T3800 |
| Test name | |
| Test status | |
| Simulation time | 367610213 ps |
| CPU time | 2.42 seconds |
| Started | Sep 24 08:47:32 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3630921130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_walk.3630921130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.740327032 |
| Short name | T3799 |
| Test name | |
| Test status | |
| Simulation time | 255118246 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 08:47:32 AM UTC 24 |
| Finished | Sep 24 08:47:35 AM UTC 24 |
| Peak memory | 216988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=740327032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_same_csr_outstanding.740327032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.637675622 |
| Short name | T238 |
| Test name | |
| Test status | |
| Simulation time | 171375351 ps |
| CPU time | 2.45 seconds |
| Started | Sep 24 08:47:32 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 234720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=637675622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_errors.637675622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.3217904379 |
| Short name | T3872 |
| Test name | |
| Test status | |
| Simulation time | 76905238 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 08:47:46 AM UTC 24 |
| Finished | Sep 24 08:47:48 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3217904379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 20.usbdev_intr_test.3217904379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.3877718137 |
| Short name | T3868 |
| Test name | |
| Test status | |
| Simulation time | 34923627 ps |
| CPU time | 0.74 seconds |
| Started | Sep 24 08:47:46 AM UTC 24 |
| Finished | Sep 24 08:47:48 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3877718137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 21.usbdev_intr_test.3877718137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.3918358876 |
| Short name | T3870 |
| Test name | |
| Test status | |
| Simulation time | 40003467 ps |
| CPU time | 0.78 seconds |
| Started | Sep 24 08:47:46 AM UTC 24 |
| Finished | Sep 24 08:47:48 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3918358876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 22.usbdev_intr_test.3918358876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.389541940 |
| Short name | T3873 |
| Test name | |
| Test status | |
| Simulation time | 50908800 ps |
| CPU time | 0.83 seconds |
| Started | Sep 24 08:47:46 AM UTC 24 |
| Finished | Sep 24 08:47:48 AM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=389541940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 23.usbdev_intr_test.389541940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.1330330953 |
| Short name | T3875 |
| Test name | |
| Test status | |
| Simulation time | 55023129 ps |
| CPU time | 0.84 seconds |
| Started | Sep 24 08:47:47 AM UTC 24 |
| Finished | Sep 24 08:47:48 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1330330953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 24.usbdev_intr_test.1330330953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.436030418 |
| Short name | T3874 |
| Test name | |
| Test status | |
| Simulation time | 45356222 ps |
| CPU time | 0.78 seconds |
| Started | Sep 24 08:47:47 AM UTC 24 |
| Finished | Sep 24 08:47:48 AM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=436030418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 25.usbdev_intr_test.436030418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.308231735 |
| Short name | T3878 |
| Test name | |
| Test status | |
| Simulation time | 59233389 ps |
| CPU time | 0.84 seconds |
| Started | Sep 24 08:47:47 AM UTC 24 |
| Finished | Sep 24 08:47:49 AM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=308231735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 26.usbdev_intr_test.308231735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.4111303199 |
| Short name | T3879 |
| Test name | |
| Test status | |
| Simulation time | 64161257 ps |
| CPU time | 0.86 seconds |
| Started | Sep 24 08:47:47 AM UTC 24 |
| Finished | Sep 24 08:47:49 AM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4111303199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 27.usbdev_intr_test.4111303199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.3430582298 |
| Short name | T3882 |
| Test name | |
| Test status | |
| Simulation time | 59025793 ps |
| CPU time | 0.85 seconds |
| Started | Sep 24 08:47:47 AM UTC 24 |
| Finished | Sep 24 08:47:49 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3430582298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 28.usbdev_intr_test.3430582298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.1458571749 |
| Short name | T3877 |
| Test name | |
| Test status | |
| Simulation time | 43616434 ps |
| CPU time | 0.77 seconds |
| Started | Sep 24 08:47:47 AM UTC 24 |
| Finished | Sep 24 08:47:49 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1458571749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 29.usbdev_intr_test.1458571749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.2761002930 |
| Short name | T3802 |
| Test name | |
| Test status | |
| Simulation time | 104774877 ps |
| CPU time | 1.88 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 216992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2761002930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_aliasing.2761002930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.1032160929 |
| Short name | T3833 |
| Test name | |
| Test status | |
| Simulation time | 1747930520 ps |
| CPU time | 9.47 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:43 AM UTC 24 |
| Peak memory | 217076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1032160929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_bit_bash.1032160929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.420336718 |
| Short name | T3798 |
| Test name | |
| Test status | |
| Simulation time | 66924348 ps |
| CPU time | 0.82 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:35 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=420336718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_hw_reset.420336718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.3683074638 |
| Short name | T251 |
| Test name | |
| Test status | |
| Simulation time | 96933464 ps |
| CPU time | 2.13 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 228148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3683074638 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_mem_rw_with_rand_reset.3683074638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.69206894 |
| Short name | T281 |
| Test name | |
| Test status | |
| Simulation time | 85315481 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:35 AM UTC 24 |
| Peak memory | 217116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=69206894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_ reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_rw.69206894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.1403792432 |
| Short name | T306 |
| Test name | |
| Test status | |
| Simulation time | 86340697 ps |
| CPU time | 0.81 seconds |
| Started | Sep 24 08:47:32 AM UTC 24 |
| Finished | Sep 24 08:47:34 AM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1403792432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_intr_test.1403792432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.3549042824 |
| Short name | T276 |
| Test name | |
| Test status | |
| Simulation time | 218392824 ps |
| CPU time | 2.68 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 227704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3549042824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_partial_access.3549042824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.3423846777 |
| Short name | T3807 |
| Test name | |
| Test status | |
| Simulation time | 159883259 ps |
| CPU time | 3.73 seconds |
| Started | Sep 24 08:47:32 AM UTC 24 |
| Finished | Sep 24 08:47:37 AM UTC 24 |
| Peak memory | 217520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3423846777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_walk.3423846777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.4280194473 |
| Short name | T3801 |
| Test name | |
| Test status | |
| Simulation time | 128680541 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 217060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4280194473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_same_csr_outstanding.4280194473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.290865118 |
| Short name | T237 |
| Test name | |
| Test status | |
| Simulation time | 167777937 ps |
| CPU time | 2.02 seconds |
| Started | Sep 24 08:47:32 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 234832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=290865118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_errors.290865118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.3938997677 |
| Short name | T410 |
| Test name | |
| Test status | |
| Simulation time | 420125353 ps |
| CPU time | 3.03 seconds |
| Started | Sep 24 08:47:32 AM UTC 24 |
| Finished | Sep 24 08:47:37 AM UTC 24 |
| Peak memory | 217584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3938997677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_intg_err.3938997677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.4138468588 |
| Short name | T3883 |
| Test name | |
| Test status | |
| Simulation time | 59514419 ps |
| CPU time | 0.76 seconds |
| Started | Sep 24 08:47:47 AM UTC 24 |
| Finished | Sep 24 08:47:49 AM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4138468588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 30.usbdev_intr_test.4138468588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.420430614 |
| Short name | T3886 |
| Test name | |
| Test status | |
| Simulation time | 34991878 ps |
| CPU time | 0.8 seconds |
| Started | Sep 24 08:47:47 AM UTC 24 |
| Finished | Sep 24 08:47:49 AM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=420430614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 31.usbdev_intr_test.420430614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.2549892893 |
| Short name | T3869 |
| Test name | |
| Test status | |
| Simulation time | 56413715 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 08:47:47 AM UTC 24 |
| Finished | Sep 24 08:47:49 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2549892893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 32.usbdev_intr_test.2549892893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.1554066483 |
| Short name | T3880 |
| Test name | |
| Test status | |
| Simulation time | 38423250 ps |
| CPU time | 0.72 seconds |
| Started | Sep 24 08:47:47 AM UTC 24 |
| Finished | Sep 24 08:47:49 AM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1554066483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 33.usbdev_intr_test.1554066483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.1688667508 |
| Short name | T3887 |
| Test name | |
| Test status | |
| Simulation time | 39556765 ps |
| CPU time | 0.78 seconds |
| Started | Sep 24 08:47:47 AM UTC 24 |
| Finished | Sep 24 08:47:49 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1688667508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 34.usbdev_intr_test.1688667508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.1623789174 |
| Short name | T3885 |
| Test name | |
| Test status | |
| Simulation time | 41789343 ps |
| CPU time | 0.69 seconds |
| Started | Sep 24 08:47:47 AM UTC 24 |
| Finished | Sep 24 08:47:49 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1623789174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 35.usbdev_intr_test.1623789174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.3785462223 |
| Short name | T3871 |
| Test name | |
| Test status | |
| Simulation time | 73158736 ps |
| CPU time | 0.77 seconds |
| Started | Sep 24 08:47:47 AM UTC 24 |
| Finished | Sep 24 08:47:49 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3785462223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 36.usbdev_intr_test.3785462223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.2281690240 |
| Short name | T3846 |
| Test name | |
| Test status | |
| Simulation time | 55033279 ps |
| CPU time | 0.7 seconds |
| Started | Sep 24 08:47:47 AM UTC 24 |
| Finished | Sep 24 08:47:49 AM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2281690240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 37.usbdev_intr_test.2281690240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.788906683 |
| Short name | T3888 |
| Test name | |
| Test status | |
| Simulation time | 44793237 ps |
| CPU time | 0.75 seconds |
| Started | Sep 24 08:47:47 AM UTC 24 |
| Finished | Sep 24 08:47:49 AM UTC 24 |
| Peak memory | 216992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=788906683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 38.usbdev_intr_test.788906683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.3406512823 |
| Short name | T3881 |
| Test name | |
| Test status | |
| Simulation time | 32330809 ps |
| CPU time | 0.68 seconds |
| Started | Sep 24 08:47:47 AM UTC 24 |
| Finished | Sep 24 08:47:49 AM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3406512823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 39.usbdev_intr_test.3406512823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.1122351324 |
| Short name | T275 |
| Test name | |
| Test status | |
| Simulation time | 89422242 ps |
| CPU time | 1.85 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1122351324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_aliasing.1122351324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.3758871410 |
| Short name | T3821 |
| Test name | |
| Test status | |
| Simulation time | 1763074920 ps |
| CPU time | 6.87 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:41 AM UTC 24 |
| Peak memory | 217740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3758871410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_bit_bash.3758871410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.3950406665 |
| Short name | T272 |
| Test name | |
| Test status | |
| Simulation time | 144701360 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 217120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3950406665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_hw_reset.3950406665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.414094441 |
| Short name | T3804 |
| Test name | |
| Test status | |
| Simulation time | 154588292 ps |
| CPU time | 1.88 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 226988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=414094441 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_mem_rw_with_rand_reset.414094441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.3340823950 |
| Short name | T274 |
| Test name | |
| Test status | |
| Simulation time | 72919228 ps |
| CPU time | 1.38 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 217052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3340823950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_rw.3340823950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.179209268 |
| Short name | T277 |
| Test name | |
| Test status | |
| Simulation time | 195486442 ps |
| CPU time | 2.26 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=179209268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vc s/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_partial_access.179209268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.2569130122 |
| Short name | T3809 |
| Test name | |
| Test status | |
| Simulation time | 548491808 ps |
| CPU time | 4.1 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:38 AM UTC 24 |
| Peak memory | 217448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2569130122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_walk.2569130122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.2756237895 |
| Short name | T3803 |
| Test name | |
| Test status | |
| Simulation time | 110248623 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2756237895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_same_csr_outstanding.2756237895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.2946538163 |
| Short name | T239 |
| Test name | |
| Test status | |
| Simulation time | 155199379 ps |
| CPU time | 2.02 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 217888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2946538163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_errors.2946538163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.3162349472 |
| Short name | T411 |
| Test name | |
| Test status | |
| Simulation time | 804685294 ps |
| CPU time | 3.26 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:37 AM UTC 24 |
| Peak memory | 217524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3162349472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_intg_err.3162349472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.349883055 |
| Short name | T3890 |
| Test name | |
| Test status | |
| Simulation time | 32198192 ps |
| CPU time | 0.72 seconds |
| Started | Sep 24 08:47:48 AM UTC 24 |
| Finished | Sep 24 08:47:50 AM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=349883055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 40.usbdev_intr_test.349883055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.2291587412 |
| Short name | T3891 |
| Test name | |
| Test status | |
| Simulation time | 57288966 ps |
| CPU time | 0.79 seconds |
| Started | Sep 24 08:47:48 AM UTC 24 |
| Finished | Sep 24 08:47:50 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2291587412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 41.usbdev_intr_test.2291587412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.363804466 |
| Short name | T3896 |
| Test name | |
| Test status | |
| Simulation time | 38016678 ps |
| CPU time | 0.69 seconds |
| Started | Sep 24 08:47:49 AM UTC 24 |
| Finished | Sep 24 08:47:51 AM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=363804466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 42.usbdev_intr_test.363804466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.2575302871 |
| Short name | T3895 |
| Test name | |
| Test status | |
| Simulation time | 38389958 ps |
| CPU time | 0.76 seconds |
| Started | Sep 24 08:47:49 AM UTC 24 |
| Finished | Sep 24 08:47:51 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2575302871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 43.usbdev_intr_test.2575302871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.1215143305 |
| Short name | T3894 |
| Test name | |
| Test status | |
| Simulation time | 46429504 ps |
| CPU time | 0.71 seconds |
| Started | Sep 24 08:47:49 AM UTC 24 |
| Finished | Sep 24 08:47:51 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1215143305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 44.usbdev_intr_test.1215143305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.2537131974 |
| Short name | T3897 |
| Test name | |
| Test status | |
| Simulation time | 57141162 ps |
| CPU time | 0.69 seconds |
| Started | Sep 24 08:47:49 AM UTC 24 |
| Finished | Sep 24 08:47:51 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2537131974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 45.usbdev_intr_test.2537131974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.3226178923 |
| Short name | T3898 |
| Test name | |
| Test status | |
| Simulation time | 50162397 ps |
| CPU time | 0.68 seconds |
| Started | Sep 24 08:47:49 AM UTC 24 |
| Finished | Sep 24 08:47:51 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3226178923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 46.usbdev_intr_test.3226178923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.3491289227 |
| Short name | T3899 |
| Test name | |
| Test status | |
| Simulation time | 87498284 ps |
| CPU time | 0.72 seconds |
| Started | Sep 24 08:47:49 AM UTC 24 |
| Finished | Sep 24 08:47:51 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3491289227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 47.usbdev_intr_test.3491289227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.3912082951 |
| Short name | T3901 |
| Test name | |
| Test status | |
| Simulation time | 45617739 ps |
| CPU time | 0.79 seconds |
| Started | Sep 24 08:47:50 AM UTC 24 |
| Finished | Sep 24 08:47:51 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3912082951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 48.usbdev_intr_test.3912082951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.536435275 |
| Short name | T3900 |
| Test name | |
| Test status | |
| Simulation time | 55281982 ps |
| CPU time | 0.74 seconds |
| Started | Sep 24 08:47:50 AM UTC 24 |
| Finished | Sep 24 08:47:51 AM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=536435275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 49.usbdev_intr_test.536435275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.1907935837 |
| Short name | T250 |
| Test name | |
| Test status | |
| Simulation time | 124919010 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 226976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1907935837 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_mem_rw_with_rand_reset.1907935837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.2172429353 |
| Short name | T292 |
| Test name | |
| Test status | |
| Simulation time | 89988552 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 217052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2172429353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_rw.2172429353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.918070741 |
| Short name | T308 |
| Test name | |
| Test status | |
| Simulation time | 40929077 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:35 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=918070741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 5.usbdev_intr_test.918070741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.1650401140 |
| Short name | T3805 |
| Test name | |
| Test status | |
| Simulation time | 216069557 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 217068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1650401140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_same_csr_outstanding.1650401140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.289705938 |
| Short name | T244 |
| Test name | |
| Test status | |
| Simulation time | 210497396 ps |
| CPU time | 2.78 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:37 AM UTC 24 |
| Peak memory | 217660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=289705938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_errors.289705938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.1527685524 |
| Short name | T416 |
| Test name | |
| Test status | |
| Simulation time | 367645272 ps |
| CPU time | 2.46 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:37 AM UTC 24 |
| Peak memory | 217568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1527685524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_intg_err.1527685524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.2823795113 |
| Short name | T3811 |
| Test name | |
| Test status | |
| Simulation time | 153529397 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 08:47:36 AM UTC 24 |
| Finished | Sep 24 08:47:39 AM UTC 24 |
| Peak memory | 228916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2823795113 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_mem_rw_with_rand_reset.2823795113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.1417611883 |
| Short name | T273 |
| Test name | |
| Test status | |
| Simulation time | 49930146 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 217004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1417611883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_rw.1417611883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.3949747259 |
| Short name | T310 |
| Test name | |
| Test status | |
| Simulation time | 52027966 ps |
| CPU time | 0.75 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:35 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3949747259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_intr_test.3949747259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.4087847398 |
| Short name | T3806 |
| Test name | |
| Test status | |
| Simulation time | 110748217 ps |
| CPU time | 1.22 seconds |
| Started | Sep 24 08:47:35 AM UTC 24 |
| Finished | Sep 24 08:47:37 AM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4087847398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_same_csr_outstanding.4087847398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.2185102092 |
| Short name | T243 |
| Test name | |
| Test status | |
| Simulation time | 138193492 ps |
| CPU time | 1.91 seconds |
| Started | Sep 24 08:47:33 AM UTC 24 |
| Finished | Sep 24 08:47:36 AM UTC 24 |
| Peak memory | 216988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2185102092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_errors.2185102092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.2074169129 |
| Short name | T3810 |
| Test name | |
| Test status | |
| Simulation time | 100227783 ps |
| CPU time | 1.3 seconds |
| Started | Sep 24 08:47:36 AM UTC 24 |
| Finished | Sep 24 08:47:39 AM UTC 24 |
| Peak memory | 226872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2074169129 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_mem_rw_with_rand_reset.2074169129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.3538151218 |
| Short name | T269 |
| Test name | |
| Test status | |
| Simulation time | 63112497 ps |
| CPU time | 0.89 seconds |
| Started | Sep 24 08:47:36 AM UTC 24 |
| Finished | Sep 24 08:47:38 AM UTC 24 |
| Peak memory | 217052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3538151218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_rw.3538151218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.1563371969 |
| Short name | T314 |
| Test name | |
| Test status | |
| Simulation time | 84770929 ps |
| CPU time | 0.74 seconds |
| Started | Sep 24 08:47:36 AM UTC 24 |
| Finished | Sep 24 08:47:38 AM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1563371969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_intr_test.1563371969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.4075700757 |
| Short name | T3812 |
| Test name | |
| Test status | |
| Simulation time | 91743425 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 08:47:36 AM UTC 24 |
| Finished | Sep 24 08:47:39 AM UTC 24 |
| Peak memory | 217072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4075700757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_same_csr_outstanding.4075700757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.3107136583 |
| Short name | T240 |
| Test name | |
| Test status | |
| Simulation time | 269593470 ps |
| CPU time | 2.96 seconds |
| Started | Sep 24 08:47:36 AM UTC 24 |
| Finished | Sep 24 08:47:40 AM UTC 24 |
| Peak memory | 227824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3107136583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_errors.3107136583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.2764444753 |
| Short name | T415 |
| Test name | |
| Test status | |
| Simulation time | 764216721 ps |
| CPU time | 4.67 seconds |
| Started | Sep 24 08:47:36 AM UTC 24 |
| Finished | Sep 24 08:47:42 AM UTC 24 |
| Peak memory | 217864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2764444753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_intg_err.2764444753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.130070411 |
| Short name | T3814 |
| Test name | |
| Test status | |
| Simulation time | 48238005 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:40 AM UTC 24 |
| Peak memory | 226976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=130070411 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_mem_rw_with_rand_reset.130070411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.3368078519 |
| Short name | T3813 |
| Test name | |
| Test status | |
| Simulation time | 81336053 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:40 AM UTC 24 |
| Peak memory | 217052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3368078519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_rw.3368078519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.750266537 |
| Short name | T311 |
| Test name | |
| Test status | |
| Simulation time | 54550015 ps |
| CPU time | 0.79 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:40 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=750266537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 8.usbdev_intr_test.750266537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.223702671 |
| Short name | T3819 |
| Test name | |
| Test status | |
| Simulation time | 107772513 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:41 AM UTC 24 |
| Peak memory | 216988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=223702671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_same_csr_outstanding.223702671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.1073074402 |
| Short name | T3828 |
| Test name | |
| Test status | |
| Simulation time | 238076729 ps |
| CPU time | 2.89 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:42 AM UTC 24 |
| Peak memory | 231904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1073074402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_errors.1073074402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.2371016599 |
| Short name | T3825 |
| Test name | |
| Test status | |
| Simulation time | 86527711 ps |
| CPU time | 1.95 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:41 AM UTC 24 |
| Peak memory | 226976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2371016599 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_mem_rw_with_rand_reset.2371016599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.1429965352 |
| Short name | T3815 |
| Test name | |
| Test status | |
| Simulation time | 85456833 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:40 AM UTC 24 |
| Peak memory | 215152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1429965352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_rw.1429965352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.1742850447 |
| Short name | T3816 |
| Test name | |
| Test status | |
| Simulation time | 146477615 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:41 AM UTC 24 |
| Peak memory | 217132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1742850447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_same_csr_outstanding.1742850447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.365306347 |
| Short name | T241 |
| Test name | |
| Test status | |
| Simulation time | 79499158 ps |
| CPU time | 1.97 seconds |
| Started | Sep 24 08:47:38 AM UTC 24 |
| Finished | Sep 24 08:47:41 AM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=365306347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_errors.365306347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_resume.1956941103 |
| Short name | T9 |
| Test name | |
| Test status | |
| Simulation time | 29596261335 ps |
| CPU time | 50.9 seconds |
| Started | Sep 24 08:54:03 AM UTC 24 |
| Finished | Sep 24 08:54:57 AM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1956941103 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_resume.1956941103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_av_buffer.1953027059 |
| Short name | T3 |
| Test name | |
| Test status | |
| Simulation time | 156820983 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 08:54:03 AM UTC 24 |
| Finished | Sep 24 08:54:06 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1953027059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_av_buffer.1953027059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_device_timeout.3489604071 |
| Short name | T71 |
| Test name | |
| Test status | |
| Simulation time | 4321346363 ps |
| CPU time | 33.1 seconds |
| Started | Sep 24 08:54:03 AM UTC 24 |
| Finished | Sep 24 08:54:41 AM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3489604071 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_timeout.3489604071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.3658335724 |
| Short name | T87 |
| Test name | |
| Test status | |
| Simulation time | 772154425 ps |
| CPU time | 3.33 seconds |
| Started | Sep 24 08:54:03 AM UTC 24 |
| Finished | Sep 24 08:54:11 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3658335724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_disable_endpoint.3658335724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_enable.2327002838 |
| Short name | T41 |
| Test name | |
| Test status | |
| Simulation time | 77970900 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 08:54:04 AM UTC 24 |
| Finished | Sep 24 08:54:07 AM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2327002838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 0.usbdev_enable.2327002838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.2274041751 |
| Short name | T33 |
| Test name | |
| Test status | |
| Simulation time | 351889409 ps |
| CPU time | 2.86 seconds |
| Started | Sep 24 08:54:05 AM UTC 24 |
| Finished | Sep 24 08:54:09 AM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2274041751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_fifo_rst.2274041751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk.3793383355 |
| Short name | T296 |
| Test name | |
| Test status | |
| Simulation time | 114185175947 ps |
| CPU time | 243.73 seconds |
| Started | Sep 24 08:54:05 AM UTC 24 |
| Finished | Sep 24 08:58:12 AM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3793383355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_hiclk.3793383355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk_max.4045435347 |
| Short name | T678 |
| Test name | |
| Test status | |
| Simulation time | 121271265298 ps |
| CPU time | 272.64 seconds |
| Started | Sep 24 08:54:05 AM UTC 24 |
| Finished | Sep 24 08:58:42 AM UTC 24 |
| Peak memory | 218148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=4045435347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 0.usbdev_freq_hiclk_max.4045435347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk.2105761662 |
| Short name | T298 |
| Test name | |
| Test status | |
| Simulation time | 109110402034 ps |
| CPU time | 266.03 seconds |
| Started | Sep 24 08:54:05 AM UTC 24 |
| Finished | Sep 24 08:58:35 AM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2105761662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_loclk.2105761662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_freq_phase.941342217 |
| Short name | T658 |
| Test name | |
| Test status | |
| Simulation time | 107120600027 ps |
| CPU time | 240.08 seconds |
| Started | Sep 24 08:54:05 AM UTC 24 |
| Finished | Sep 24 08:58:09 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=941342217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_phase.941342217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_in_iso.1477339241 |
| Short name | T30 |
| Test name | |
| Test status | |
| Simulation time | 288180116 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 08:54:05 AM UTC 24 |
| Finished | Sep 24 08:54:08 AM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1477339241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_in_iso.1477339241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_in_stall.4169550547 |
| Short name | T31 |
| Test name | |
| Test status | |
| Simulation time | 176633611 ps |
| CPU time | 1.35 seconds |
| Started | Sep 24 08:54:06 AM UTC 24 |
| Finished | Sep 24 08:54:08 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4169550547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_in_stall.4169550547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_in_trans.879378729 |
| Short name | T32 |
| Test name | |
| Test status | |
| Simulation time | 203118127 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 08:54:06 AM UTC 24 |
| Finished | Sep 24 08:54:08 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=879378729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_in_trans.879378729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_sync.3654590482 |
| Short name | T195 |
| Test name | |
| Test status | |
| Simulation time | 3040822211 ps |
| CPU time | 114.96 seconds |
| Started | Sep 24 08:54:05 AM UTC 24 |
| Finished | Sep 24 08:56:03 AM UTC 24 |
| Peak memory | 234964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3654590482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_invalid_sync.3654590482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_iso_retraction.1905784474 |
| Short name | T6 |
| Test name | |
| Test status | |
| Simulation time | 3987841853 ps |
| CPU time | 29.61 seconds |
| Started | Sep 24 08:54:07 AM UTC 24 |
| Finished | Sep 24 08:54:38 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1905784474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_iso_retraction.1905784474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_link_in_err.1314178811 |
| Short name | T35 |
| Test name | |
| Test status | |
| Simulation time | 267193018 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 08:54:07 AM UTC 24 |
| Finished | Sep 24 08:54:10 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1314178811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_in_err.1314178811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_link_out_err.3867421322 |
| Short name | T36 |
| Test name | |
| Test status | |
| Simulation time | 453585860 ps |
| CPU time | 2.52 seconds |
| Started | Sep 24 08:54:07 AM UTC 24 |
| Finished | Sep 24 08:54:11 AM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3867421322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_link_out_err.3867421322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_link_out_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_link_resume.3210463788 |
| Short name | T64 |
| Test name | |
| Test status | |
| Simulation time | 6831007302 ps |
| CPU time | 13.02 seconds |
| Started | Sep 24 08:54:07 AM UTC 24 |
| Finished | Sep 24 08:54:22 AM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3210463788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_resume.3210463788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_max_inter_pkt_delay.1246063795 |
| Short name | T184 |
| Test name | |
| Test status | |
| Simulation time | 3533149748 ps |
| CPU time | 39.65 seconds |
| Started | Sep 24 08:54:09 AM UTC 24 |
| Finished | Sep 24 08:54:50 AM UTC 24 |
| Peak memory | 228616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1246063795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_inter_pkt_delay.1246063795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_in_transaction.3917109169 |
| Short name | T38 |
| Test name | |
| Test status | |
| Simulation time | 234853128 ps |
| CPU time | 1.63 seconds |
| Started | Sep 24 08:54:09 AM UTC 24 |
| Finished | Sep 24 08:54:12 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3917109169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_in_transaction.3917109169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_out_transaction.1953432588 |
| Short name | T88 |
| Test name | |
| Test status | |
| Simulation time | 191251233 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 08:54:09 AM UTC 24 |
| Finished | Sep 24 08:54:12 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1953432588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_out_transaction.1953432588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_max_usb_traffic.3572258513 |
| Short name | T4 |
| Test name | |
| Test status | |
| Simulation time | 2207672628 ps |
| CPU time | 21.02 seconds |
| Started | Sep 24 08:54:10 AM UTC 24 |
| Finished | Sep 24 08:54:32 AM UTC 24 |
| Peak memory | 235084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3572258513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_usb_traffic.3572258513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_min_inter_pkt_delay.901639361 |
| Short name | T114 |
| Test name | |
| Test status | |
| Simulation time | 1947289524 ps |
| CPU time | 26.97 seconds |
| Started | Sep 24 08:54:10 AM UTC 24 |
| Finished | Sep 24 08:54:38 AM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=901639361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_inter_pkt_delay.901639361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_in_transaction.1605705715 |
| Short name | T162 |
| Test name | |
| Test status | |
| Simulation time | 169855099 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 08:54:10 AM UTC 24 |
| Finished | Sep 24 08:54:13 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1605705715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_in_transaction.1605705715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_out_transaction.1815880736 |
| Short name | T419 |
| Test name | |
| Test status | |
| Simulation time | 157799467 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 08:54:10 AM UTC 24 |
| Finished | Sep 24 08:54:13 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1815880736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_out_transaction.1815880736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.390284023 |
| Short name | T74 |
| Test name | |
| Test status | |
| Simulation time | 496121083 ps |
| CPU time | 2.6 seconds |
| Started | Sep 24 08:54:11 AM UTC 24 |
| Finished | Sep 24 08:54:15 AM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=390284023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.390284023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_out_iso.917317394 |
| Short name | T89 |
| Test name | |
| Test status | |
| Simulation time | 192471878 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 08:54:11 AM UTC 24 |
| Finished | Sep 24 08:54:14 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=917317394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 0.usbdev_out_iso.917317394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_out_stall.2137060151 |
| Short name | T164 |
| Test name | |
| Test status | |
| Simulation time | 164784749 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 08:54:12 AM UTC 24 |
| Finished | Sep 24 08:54:15 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2137060151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_out_stall.2137060151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_out_trans_nak.666138091 |
| Short name | T421 |
| Test name | |
| Test status | |
| Simulation time | 200867813 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 08:54:12 AM UTC 24 |
| Finished | Sep 24 08:54:15 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=666138091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_out_trans_nak.666138091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_pending_in_trans.3530205156 |
| Short name | T91 |
| Test name | |
| Test status | |
| Simulation time | 157334318 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 08:54:14 AM UTC 24 |
| Finished | Sep 24 08:54:16 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3530205156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_pending_in_trans.3530205156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_eop_single_bit_handling.1392100273 |
| Short name | T90 |
| Test name | |
| Test status | |
| Simulation time | 188035734 ps |
| CPU time | 1.29 seconds |
| Started | Sep 24 08:54:14 AM UTC 24 |
| Finished | Sep 24 08:54:16 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1392100273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_eop_single_ bit_handling_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_eop_single_bit_handling.1392100273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_phy_config_eop_single_bit_handling/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_pinflip.2621582310 |
| Short name | T48 |
| Test name | |
| Test status | |
| Simulation time | 233069138 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 08:54:14 AM UTC 24 |
| Finished | Sep 24 08:54:17 AM UTC 24 |
| Peak memory | 215812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2621582310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_pinflip.2621582310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rand_bus_type.2051238349 |
| Short name | T50 |
| Test name | |
| Test status | |
| Simulation time | 210498619 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 08:54:14 AM UTC 24 |
| Finished | Sep 24 08:54:17 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2051238349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 0.usbdev_phy_config_rand_bus_type.2051238349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rx_dp_dn.2253260297 |
| Short name | T51 |
| Test name | |
| Test status | |
| Simulation time | 258558395 ps |
| CPU time | 1.88 seconds |
| Started | Sep 24 08:54:15 AM UTC 24 |
| Finished | Sep 24 08:54:18 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_diff_rcvr=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2253260297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_phy_config_rx_dp_dn.2253260297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_phy_config_rx_dp_dn/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_use_d_se0.2884843349 |
| Short name | T21 |
| Test name | |
| Test status | |
| Simulation time | 259185444 ps |
| CPU time | 1.93 seconds |
| Started | Sep 24 08:54:16 AM UTC 24 |
| Finished | Sep 24 08:54:19 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +tx_use_d_se0=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2884843349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_use_d_se0.2884843349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_phy_config_tx_use_d_se0/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_sent.2924001386 |
| Short name | T24 |
| Test name | |
| Test status | |
| Simulation time | 199257743 ps |
| CPU time | 1.79 seconds |
| Started | Sep 24 08:54:17 AM UTC 24 |
| Finished | Sep 24 08:54:20 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2924001386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_pkt_sent.2924001386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_resets.328515428 |
| Short name | T610 |
| Test name | |
| Test status | |
| Simulation time | 2105602442 ps |
| CPU time | 70.73 seconds |
| Started | Sep 24 08:54:20 AM UTC 24 |
| Finished | Sep 24 08:55:32 AM UTC 24 |
| Peak memory | 234764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=328515428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_resets.328515428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_in_transaction.1622843483 |
| Short name | T23 |
| Test name | |
| Test status | |
| Simulation time | 265646761 ps |
| CPU time | 1.78 seconds |
| Started | Sep 24 08:54:17 AM UTC 24 |
| Finished | Sep 24 08:54:20 AM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1622843483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_random_length_in_transaction.1622843483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_out_transaction.2441145592 |
| Short name | T25 |
| Test name | |
| Test status | |
| Simulation time | 206279806 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 08:54:18 AM UTC 24 |
| Finished | Sep 24 08:54:21 AM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2441145592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_random_length_out_transaction.2441145592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_resume_link_active.108726320 |
| Short name | T97 |
| Test name | |
| Test status | |
| Simulation time | 20168680732 ps |
| CPU time | 44.81 seconds |
| Started | Sep 24 08:54:20 AM UTC 24 |
| Finished | Sep 24 08:55:06 AM UTC 24 |
| Peak memory | 217900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=108726320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 0.usbdev_resume_link_active.108726320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_rx_full.1342581105 |
| Short name | T57 |
| Test name | |
| Test status | |
| Simulation time | 349387776 ps |
| CPU time | 2.46 seconds |
| Started | Sep 24 08:54:20 AM UTC 24 |
| Finished | Sep 24 08:54:23 AM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1342581105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_rx_full.1342581105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority_over_stall_response.3255884794 |
| Short name | T169 |
| Test name | |
| Test status | |
| Simulation time | 309029287 ps |
| CPU time | 2.15 seconds |
| Started | Sep 24 08:54:21 AM UTC 24 |
| Finished | Sep 24 08:54:24 AM UTC 24 |
| Peak memory | 217892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3255884794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority_over_stall_response.3255884794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_setup_stage.2858878574 |
| Short name | T163 |
| Test name | |
| Test status | |
| Simulation time | 176483048 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 08:54:21 AM UTC 24 |
| Finished | Sep 24 08:54:24 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2858878574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_setup_stage.2858878574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_setup_trans_ignored.3110621862 |
| Short name | T196 |
| Test name | |
| Test status | |
| Simulation time | 196134562 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 08:54:22 AM UTC 24 |
| Finished | Sep 24 08:54:25 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3110621862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 0.usbdev_setup_trans_ignored.3110621862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_smoke.863868680 |
| Short name | T166 |
| Test name | |
| Test status | |
| Simulation time | 249978866 ps |
| CPU time | 2.22 seconds |
| Started | Sep 24 08:54:22 AM UTC 24 |
| Finished | Sep 24 08:54:26 AM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=863868680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_smoke.863868680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_spurious_pids_ignored.1785176485 |
| Short name | T175 |
| Test name | |
| Test status | |
| Simulation time | 1944962082 ps |
| CPU time | 23.82 seconds |
| Started | Sep 24 08:54:23 AM UTC 24 |
| Finished | Sep 24 08:54:49 AM UTC 24 |
| Peak memory | 228600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1785176485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_spurious_pids_ignored.1785176485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_stall_trans.3011541943 |
| Short name | T420 |
| Test name | |
| Test status | |
| Simulation time | 151084446 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 08:54:25 AM UTC 24 |
| Finished | Sep 24 08:54:27 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3011541943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_stall_trans.3011541943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_stream_len_max.4247276595 |
| Short name | T96 |
| Test name | |
| Test status | |
| Simulation time | 856426415 ps |
| CPU time | 4.38 seconds |
| Started | Sep 24 08:54:26 AM UTC 24 |
| Finished | Sep 24 08:54:31 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4247276595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stream_len_max.4247276595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_streaming_out.3066713812 |
| Short name | T617 |
| Test name | |
| Test status | |
| Simulation time | 2647477611 ps |
| CPU time | 111.33 seconds |
| Started | Sep 24 08:54:25 AM UTC 24 |
| Finished | Sep 24 08:56:18 AM UTC 24 |
| Peak memory | 228392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3066713812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_streaming_out.3066713812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_timeout_missing_host_handshake.2355285259 |
| Short name | T598 |
| Test name | |
| Test status | |
| Simulation time | 1444504969 ps |
| CPU time | 41.75 seconds |
| Started | Sep 24 08:54:03 AM UTC 24 |
| Finished | Sep 24 08:54:50 AM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2355285259 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_timeout_missing_host_handshake.2355285259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/0.usbdev_tx_rx_disruption.1784407989 |
| Short name | T65 |
| Test name | |
| Test status | |
| Simulation time | 506361769 ps |
| CPU time | 2.58 seconds |
| Started | Sep 24 08:54:27 AM UTC 24 |
| Finished | Sep 24 08:54:31 AM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1784407989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_tx _rx_disruption.1784407989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/0.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_alert_test.3325738206 |
| Short name | T202 |
| Test name | |
| Test status | |
| Simulation time | 33582476 ps |
| CPU time | 1.16 seconds |
| Started | Sep 24 08:55:36 AM UTC 24 |
| Finished | Sep 24 08:55:38 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3325738206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 1.usbdev_alert_test.3325738206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_disconnect.2628480169 |
| Short name | T10 |
| Test name | |
| Test status | |
| Simulation time | 11873288658 ps |
| CPU time | 38.32 seconds |
| Started | Sep 24 08:54:30 AM UTC 24 |
| Finished | Sep 24 08:55:10 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2628480169 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_disconnect.2628480169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_reset.2285572362 |
| Short name | T11 |
| Test name | |
| Test status | |
| Simulation time | 21193250591 ps |
| CPU time | 47.94 seconds |
| Started | Sep 24 08:54:31 AM UTC 24 |
| Finished | Sep 24 08:55:21 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2285572362 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_reset.2285572362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_resume.4022008975 |
| Short name | T12 |
| Test name | |
| Test status | |
| Simulation time | 26280777313 ps |
| CPU time | 69.43 seconds |
| Started | Sep 24 08:54:32 AM UTC 24 |
| Finished | Sep 24 08:55:44 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4022008975 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_resume.4022008975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_av_buffer.1091147666 |
| Short name | T222 |
| Test name | |
| Test status | |
| Simulation time | 151243863 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 08:54:33 AM UTC 24 |
| Finished | Sep 24 08:54:35 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1091147666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_av_buffer.1091147666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_av_overflow.1435090910 |
| Short name | T66 |
| Test name | |
| Test status | |
| Simulation time | 167434574 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 08:54:34 AM UTC 24 |
| Finished | Sep 24 08:54:36 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1435090910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_av_overflow.1435090910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_bitstuff_err.4240769339 |
| Short name | T85 |
| Test name | |
| Test status | |
| Simulation time | 185075404 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 08:54:35 AM UTC 24 |
| Finished | Sep 24 08:54:38 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4240769339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_bitstuff_err.4240769339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_clear.1637596804 |
| Short name | T116 |
| Test name | |
| Test status | |
| Simulation time | 238212990 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 08:54:36 AM UTC 24 |
| Finished | Sep 24 08:54:39 AM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1637596804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 1.usbdev_data_toggle_clear.1637596804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_device_timeout.2946821571 |
| Short name | T599 |
| Test name | |
| Test status | |
| Simulation time | 996109610 ps |
| CPU time | 28.29 seconds |
| Started | Sep 24 08:54:37 AM UTC 24 |
| Finished | Sep 24 08:55:07 AM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2946821571 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_timeout.2946821571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_disable_endpoint.3332180990 |
| Short name | T424 |
| Test name | |
| Test status | |
| Simulation time | 593242154 ps |
| CPU time | 3.45 seconds |
| Started | Sep 24 08:54:40 AM UTC 24 |
| Finished | Sep 24 08:54:44 AM UTC 24 |
| Peak memory | 217712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3332180990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_disable_endpoint.3332180990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_disconnected.1815756721 |
| Short name | T68 |
| Test name | |
| Test status | |
| Simulation time | 147220130 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 08:54:40 AM UTC 24 |
| Finished | Sep 24 08:54:42 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1815756721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_disconnected.1815756721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_enable.3029559647 |
| Short name | T245 |
| Test name | |
| Test status | |
| Simulation time | 39257154 ps |
| CPU time | 1.23 seconds |
| Started | Sep 24 08:54:40 AM UTC 24 |
| Finished | Sep 24 08:54:42 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3029559647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 1.usbdev_enable.3029559647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_access.4051089353 |
| Short name | T428 |
| Test name | |
| Test status | |
| Simulation time | 807974392 ps |
| CPU time | 4.69 seconds |
| Started | Sep 24 08:54:41 AM UTC 24 |
| Finished | Sep 24 08:54:47 AM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4051089353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_access.4051089353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_types.1634280074 |
| Short name | T120 |
| Test name | |
| Test status | |
| Simulation time | 511846005 ps |
| CPU time | 2.67 seconds |
| Started | Sep 24 08:54:41 AM UTC 24 |
| Finished | Sep 24 08:54:45 AM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1634280074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_types.1634280074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_rst.2496755599 |
| Short name | T597 |
| Test name | |
| Test status | |
| Simulation time | 231415415 ps |
| CPU time | 2.9 seconds |
| Started | Sep 24 08:54:43 AM UTC 24 |
| Finished | Sep 24 08:54:47 AM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2496755599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_fifo_rst.2496755599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk.725981965 |
| Short name | T294 |
| Test name | |
| Test status | |
| Simulation time | 111177054034 ps |
| CPU time | 293.5 seconds |
| Started | Sep 24 08:54:43 AM UTC 24 |
| Finished | Sep 24 08:59:41 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=725981965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_hiclk.725981965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk_max.1075241754 |
| Short name | T711 |
| Test name | |
| Test status | |
| Simulation time | 121114268456 ps |
| CPU time | 272.62 seconds |
| Started | Sep 24 08:54:44 AM UTC 24 |
| Finished | Sep 24 08:59:21 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1075241754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 1.usbdev_freq_hiclk_max.1075241754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk.2816916952 |
| Short name | T299 |
| Test name | |
| Test status | |
| Simulation time | 97105747985 ps |
| CPU time | 232.69 seconds |
| Started | Sep 24 08:54:45 AM UTC 24 |
| Finished | Sep 24 08:58:42 AM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2816916952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_loclk.2816916952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk_max.159293738 |
| Short name | T693 |
| Test name | |
| Test status | |
| Simulation time | 103997808051 ps |
| CPU time | 249.48 seconds |
| Started | Sep 24 08:54:45 AM UTC 24 |
| Finished | Sep 24 08:58:59 AM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=159293738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 1.usbdev_freq_loclk_max.159293738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_freq_phase.1223159532 |
| Short name | T297 |
| Test name | |
| Test status | |
| Simulation time | 100162846494 ps |
| CPU time | 215.56 seconds |
| Started | Sep 24 08:54:45 AM UTC 24 |
| Finished | Sep 24 08:58:25 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1223159532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_freq_phase.1223159532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_in_iso.1837590280 |
| Short name | T111 |
| Test name | |
| Test status | |
| Simulation time | 187619158 ps |
| CPU time | 1.86 seconds |
| Started | Sep 24 08:54:48 AM UTC 24 |
| Finished | Sep 24 08:54:50 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1837590280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_in_iso.1837590280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_in_stall.4254524220 |
| Short name | T112 |
| Test name | |
| Test status | |
| Simulation time | 137368219 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 08:54:49 AM UTC 24 |
| Finished | Sep 24 08:54:51 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4254524220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_in_stall.4254524220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_in_trans.826314948 |
| Short name | T282 |
| Test name | |
| Test status | |
| Simulation time | 209339290 ps |
| CPU time | 1.87 seconds |
| Started | Sep 24 08:54:50 AM UTC 24 |
| Finished | Sep 24 08:54:53 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=826314948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_in_trans.826314948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_invalid_sync.3219045184 |
| Short name | T168 |
| Test name | |
| Test status | |
| Simulation time | 2818361058 ps |
| CPU time | 32.04 seconds |
| Started | Sep 24 08:54:48 AM UTC 24 |
| Finished | Sep 24 08:55:21 AM UTC 24 |
| Peak memory | 234988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3219045184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 1.usbdev_invalid_sync.3219045184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_link_in_err.499222762 |
| Short name | T283 |
| Test name | |
| Test status | |
| Simulation time | 204591535 ps |
| CPU time | 1.84 seconds |
| Started | Sep 24 08:54:51 AM UTC 24 |
| Finished | Sep 24 08:54:54 AM UTC 24 |
| Peak memory | 215624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=499222762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_link_in_err.499222762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_link_resume.1523933810 |
| Short name | T72 |
| Test name | |
| Test status | |
| Simulation time | 26138122862 ps |
| CPU time | 101.73 seconds |
| Started | Sep 24 08:54:51 AM UTC 24 |
| Finished | Sep 24 08:56:36 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523933810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_resume.1523933810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_link_suspend.1645991117 |
| Short name | T103 |
| Test name | |
| Test status | |
| Simulation time | 10487718615 ps |
| CPU time | 15.33 seconds |
| Started | Sep 24 08:54:52 AM UTC 24 |
| Finished | Sep 24 08:55:08 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1645991117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_link_suspend.1645991117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_max_inter_pkt_delay.1518718337 |
| Short name | T607 |
| Test name | |
| Test status | |
| Simulation time | 2473859165 ps |
| CPU time | 32.16 seconds |
| Started | Sep 24 08:54:54 AM UTC 24 |
| Finished | Sep 24 08:55:27 AM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1518718337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_inter_pkt_delay.1518718337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_in_transaction.791981292 |
| Short name | T284 |
| Test name | |
| Test status | |
| Simulation time | 242615218 ps |
| CPU time | 2.05 seconds |
| Started | Sep 24 08:54:55 AM UTC 24 |
| Finished | Sep 24 08:54:58 AM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=791981292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_in_transaction.791981292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_out_transaction.998215545 |
| Short name | T285 |
| Test name | |
| Test status | |
| Simulation time | 219571200 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 08:54:57 AM UTC 24 |
| Finished | Sep 24 08:55:00 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=998215545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 1.usbdev_max_length_out_transaction.998215545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_max_non_iso_usb_traffic.2214306520 |
| Short name | T165 |
| Test name | |
| Test status | |
| Simulation time | 2067139012 ps |
| CPU time | 21.42 seconds |
| Started | Sep 24 08:54:58 AM UTC 24 |
| Finished | Sep 24 08:55:21 AM UTC 24 |
| Peak memory | 234876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2214306520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_non_iso_usb_traffic.2214306520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_min_inter_pkt_delay.3094903615 |
| Short name | T256 |
| Test name | |
| Test status | |
| Simulation time | 2054857079 ps |
| CPU time | 68.07 seconds |
| Started | Sep 24 08:55:00 AM UTC 24 |
| Finished | Sep 24 08:56:10 AM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3094903615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_inter_pkt_delay.3094903615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_in_transaction.2060214922 |
| Short name | T600 |
| Test name | |
| Test status | |
| Simulation time | 166714463 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 08:55:07 AM UTC 24 |
| Finished | Sep 24 08:55:10 AM UTC 24 |
| Peak memory | 217132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2060214922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_in_transaction.2060214922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_out_transaction.22214000 |
| Short name | T601 |
| Test name | |
| Test status | |
| Simulation time | 152443593 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 08:55:07 AM UTC 24 |
| Finished | Sep 24 08:55:10 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=22214000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 1.usbdev_min_length_out_transaction.22214000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_out_iso.1179439229 |
| Short name | T602 |
| Test name | |
| Test status | |
| Simulation time | 156187365 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 08:55:11 AM UTC 24 |
| Finished | Sep 24 08:55:13 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1179439229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_out_iso.1179439229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_out_stall.958161637 |
| Short name | T591 |
| Test name | |
| Test status | |
| Simulation time | 196681639 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 08:55:11 AM UTC 24 |
| Finished | Sep 24 08:55:13 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=958161637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_out_stall.958161637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_out_trans_nak.370173386 |
| Short name | T435 |
| Test name | |
| Test status | |
| Simulation time | 227751026 ps |
| CPU time | 2.04 seconds |
| Started | Sep 24 08:55:11 AM UTC 24 |
| Finished | Sep 24 08:55:14 AM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=370173386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_out_trans_nak.370173386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_pending_in_trans.2150066314 |
| Short name | T167 |
| Test name | |
| Test status | |
| Simulation time | 214652920 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 08:55:12 AM UTC 24 |
| Finished | Sep 24 08:55:15 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2150066314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_pending_in_trans.2150066314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_pinflip.2757406383 |
| Short name | T603 |
| Test name | |
| Test status | |
| Simulation time | 222616997 ps |
| CPU time | 2.09 seconds |
| Started | Sep 24 08:55:14 AM UTC 24 |
| Finished | Sep 24 08:55:17 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2757406383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_pinflip.2757406383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_rand_bus_type.1998472251 |
| Short name | T434 |
| Test name | |
| Test status | |
| Simulation time | 238556192 ps |
| CPU time | 1.76 seconds |
| Started | Sep 24 08:55:14 AM UTC 24 |
| Finished | Sep 24 08:55:17 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1998472251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 1.usbdev_phy_config_rand_bus_type.1998472251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_usb_ref_disable.2786089821 |
| Short name | T204 |
| Test name | |
| Test status | |
| Simulation time | 160659006 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 08:55:14 AM UTC 24 |
| Finished | Sep 24 08:55:17 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2786089821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_usb_ref_disable.2786089821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_phy_pins_sense.2717680279 |
| Short name | T26 |
| Test name | |
| Test status | |
| Simulation time | 75967085 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 08:55:15 AM UTC 24 |
| Finished | Sep 24 08:55:18 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2717680279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_pins_sense.2717680279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_buffer.3920352393 |
| Short name | T252 |
| Test name | |
| Test status | |
| Simulation time | 9131359750 ps |
| CPU time | 44.51 seconds |
| Started | Sep 24 08:55:15 AM UTC 24 |
| Finished | Sep 24 08:56:02 AM UTC 24 |
| Peak memory | 228380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3920352393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_pkt_buffer.3920352393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_received.35597321 |
| Short name | T408 |
| Test name | |
| Test status | |
| Simulation time | 177486812 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 08:55:18 AM UTC 24 |
| Finished | Sep 24 08:55:20 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=35597321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_pkt_received.35597321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_sent.2290494820 |
| Short name | T604 |
| Test name | |
| Test status | |
| Simulation time | 181906409 ps |
| CPU time | 1.9 seconds |
| Started | Sep 24 08:55:18 AM UTC 24 |
| Finished | Sep 24 08:55:20 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2290494820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_pkt_sent.2290494820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_disconnects.359234936 |
| Short name | T638 |
| Test name | |
| Test status | |
| Simulation time | 6928067195 ps |
| CPU time | 108.55 seconds |
| Started | Sep 24 08:55:19 AM UTC 24 |
| Finished | Sep 24 08:57:10 AM UTC 24 |
| Peak memory | 230392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=359234936 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_disconnects.359234936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_resets.3138454259 |
| Short name | T632 |
| Test name | |
| Test status | |
| Simulation time | 6451173978 ps |
| CPU time | 95.51 seconds |
| Started | Sep 24 08:55:22 AM UTC 24 |
| Finished | Sep 24 08:56:59 AM UTC 24 |
| Peak memory | 230404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3138454259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_resets.3138454259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_rand_suspends.246928088 |
| Short name | T109 |
| Test name | |
| Test status | |
| Simulation time | 6479236675 ps |
| CPU time | 36.76 seconds |
| Started | Sep 24 08:55:22 AM UTC 24 |
| Finished | Sep 24 08:56:00 AM UTC 24 |
| Peak memory | 235096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=246928088 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_suspends.246928088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_in_transaction.3321195432 |
| Short name | T605 |
| Test name | |
| Test status | |
| Simulation time | 177500488 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 08:55:19 AM UTC 24 |
| Finished | Sep 24 08:55:22 AM UTC 24 |
| Peak memory | 215356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3321195432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_random_length_in_transaction.3321195432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_out_transaction.3333662577 |
| Short name | T606 |
| Test name | |
| Test status | |
| Simulation time | 206809544 ps |
| CPU time | 1.81 seconds |
| Started | Sep 24 08:55:19 AM UTC 24 |
| Finished | Sep 24 08:55:22 AM UTC 24 |
| Peak memory | 215580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3333662577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_random_length_out_transaction.3333662577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_resume_link_active.1319463707 |
| Short name | T98 |
| Test name | |
| Test status | |
| Simulation time | 20175397045 ps |
| CPU time | 73.46 seconds |
| Started | Sep 24 08:55:22 AM UTC 24 |
| Finished | Sep 24 08:56:37 AM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1319463707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 1.usbdev_resume_link_active.1319463707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_rx_crc_err.1129264404 |
| Short name | T77 |
| Test name | |
| Test status | |
| Simulation time | 156748946 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 08:55:22 AM UTC 24 |
| Finished | Sep 24 08:55:25 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1129264404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_crc_err.1129264404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.56244673 |
| Short name | T58 |
| Test name | |
| Test status | |
| Simulation time | 318727092 ps |
| CPU time | 2.25 seconds |
| Started | Sep 24 08:55:22 AM UTC 24 |
| Finished | Sep 24 08:55:25 AM UTC 24 |
| Peak memory | 217692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=56244673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rx_full.56244673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_rx_pid_err.3780003458 |
| Short name | T80 |
| Test name | |
| Test status | |
| Simulation time | 179514450 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 08:55:23 AM UTC 24 |
| Finished | Sep 24 08:55:26 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3780003458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_pid_err.3780003458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_sec_cm.744507201 |
| Short name | T207 |
| Test name | |
| Test status | |
| Simulation time | 1826372296 ps |
| CPU time | 4.74 seconds |
| Started | Sep 24 08:55:35 AM UTC 24 |
| Finished | Sep 24 08:55:40 AM UTC 24 |
| Peak memory | 252160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=744507201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_sec_cm.744507201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority.358813994 |
| Short name | T56 |
| Test name | |
| Test status | |
| Simulation time | 422321199 ps |
| CPU time | 2.99 seconds |
| Started | Sep 24 08:55:23 AM UTC 24 |
| Finished | Sep 24 08:55:27 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=358813994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_setup_priority.358813994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority_over_stall_response.2185719688 |
| Short name | T113 |
| Test name | |
| Test status | |
| Simulation time | 225898349 ps |
| CPU time | 1.88 seconds |
| Started | Sep 24 08:55:25 AM UTC 24 |
| Finished | Sep 24 08:55:28 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2185719688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority_over_stall_response.2185719688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_setup_stage.1222993214 |
| Short name | T608 |
| Test name | |
| Test status | |
| Simulation time | 159838075 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 08:55:26 AM UTC 24 |
| Finished | Sep 24 08:55:29 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1222993214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_setup_stage.1222993214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_setup_trans_ignored.1877570124 |
| Short name | T197 |
| Test name | |
| Test status | |
| Simulation time | 163571974 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 08:55:26 AM UTC 24 |
| Finished | Sep 24 08:55:29 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1877570124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 1.usbdev_setup_trans_ignored.1877570124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_smoke.2971059191 |
| Short name | T609 |
| Test name | |
| Test status | |
| Simulation time | 210218358 ps |
| CPU time | 1.88 seconds |
| Started | Sep 24 08:55:29 AM UTC 24 |
| Finished | Sep 24 08:55:32 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2971059191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_smoke.2971059191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_spurious_pids_ignored.192675790 |
| Short name | T620 |
| Test name | |
| Test status | |
| Simulation time | 2035629268 ps |
| CPU time | 65.05 seconds |
| Started | Sep 24 08:55:29 AM UTC 24 |
| Finished | Sep 24 08:56:36 AM UTC 24 |
| Peak memory | 234476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=192675790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_spurious_pids_ignored.192675790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_stall_priority_over_nak.4245573904 |
| Short name | T592 |
| Test name | |
| Test status | |
| Simulation time | 154600748 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 08:55:30 AM UTC 24 |
| Finished | Sep 24 08:55:33 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4245573904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stall_priority_over_nak.4245573904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_stall_trans.1869608408 |
| Short name | T422 |
| Test name | |
| Test status | |
| Simulation time | 178479430 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 08:55:30 AM UTC 24 |
| Finished | Sep 24 08:55:33 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1869608408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_stall_trans.1869608408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_stream_len_max.2464409524 |
| Short name | T611 |
| Test name | |
| Test status | |
| Simulation time | 1101267081 ps |
| CPU time | 3.94 seconds |
| Started | Sep 24 08:55:30 AM UTC 24 |
| Finished | Sep 24 08:55:35 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2464409524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stream_len_max.2464409524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_streaming_out.1371115691 |
| Short name | T633 |
| Test name | |
| Test status | |
| Simulation time | 4103290825 ps |
| CPU time | 139.91 seconds |
| Started | Sep 24 08:55:30 AM UTC 24 |
| Finished | Sep 24 08:57:53 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1371115691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_streaming_out.1371115691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_stress_usb_traffic.2318874074 |
| Short name | T83 |
| Test name | |
| Test status | |
| Simulation time | 7887461696 ps |
| CPU time | 59.19 seconds |
| Started | Sep 24 08:55:33 AM UTC 24 |
| Finished | Sep 24 08:56:34 AM UTC 24 |
| Peak memory | 235088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2318874074 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stress_usb_traffic.2318874074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_timeout_missing_host_handshake.2656686459 |
| Short name | T185 |
| Test name | |
| Test status | |
| Simulation time | 1384574690 ps |
| CPU time | 16.37 seconds |
| Started | Sep 24 08:54:38 AM UTC 24 |
| Finished | Sep 24 08:54:56 AM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2656686459 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_timeout_missing_host_handshake.2656686459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/1.usbdev_tx_rx_disruption.3854897288 |
| Short name | T228 |
| Test name | |
| Test status | |
| Simulation time | 462670551 ps |
| CPU time | 2.98 seconds |
| Started | Sep 24 08:55:33 AM UTC 24 |
| Finished | Sep 24 08:55:37 AM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3854897288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_tx _rx_disruption.3854897288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/1.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_alert_test.1603054459 |
| Short name | T1076 |
| Test name | |
| Test status | |
| Simulation time | 33102540 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:05:06 AM UTC 24 |
| Finished | Sep 24 09:05:08 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1603054459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 10.usbdev_alert_test.1603054459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_reset.2069505392 |
| Short name | T1054 |
| Test name | |
| Test status | |
| Simulation time | 13685311224 ps |
| CPU time | 26.28 seconds |
| Started | Sep 24 09:04:26 AM UTC 24 |
| Finished | Sep 24 09:04:54 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2069505392 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_reset.2069505392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_resume.2010334556 |
| Short name | T1113 |
| Test name | |
| Test status | |
| Simulation time | 26255863860 ps |
| CPU time | 65.71 seconds |
| Started | Sep 24 09:04:26 AM UTC 24 |
| Finished | Sep 24 09:05:34 AM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2010334556 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_resume.2010334556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_av_buffer.1327649273 |
| Short name | T1025 |
| Test name | |
| Test status | |
| Simulation time | 151778729 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:04:27 AM UTC 24 |
| Finished | Sep 24 09:04:29 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1327649273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_av_buffer.1327649273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_bitstuff_err.1577757098 |
| Short name | T1026 |
| Test name | |
| Test status | |
| Simulation time | 173799759 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:04:28 AM UTC 24 |
| Finished | Sep 24 09:04:31 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1577757098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_bitstuff_err.1577757098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_clear.960788775 |
| Short name | T1027 |
| Test name | |
| Test status | |
| Simulation time | 447205924 ps |
| CPU time | 2.81 seconds |
| Started | Sep 24 09:04:28 AM UTC 24 |
| Finished | Sep 24 09:04:32 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=960788775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_data_toggle_clear.960788775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_restore.3459771094 |
| Short name | T448 |
| Test name | |
| Test status | |
| Simulation time | 1193365660 ps |
| CPU time | 5.43 seconds |
| Started | Sep 24 09:04:28 AM UTC 24 |
| Finished | Sep 24 09:04:35 AM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3459771094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_data_toggle_restore.3459771094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_device_address.1354407022 |
| Short name | T540 |
| Test name | |
| Test status | |
| Simulation time | 27880797263 ps |
| CPU time | 58.47 seconds |
| Started | Sep 24 09:04:29 AM UTC 24 |
| Finished | Sep 24 09:05:30 AM UTC 24 |
| Peak memory | 218224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1354407022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_address.1354407022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_device_timeout.949550368 |
| Short name | T1031 |
| Test name | |
| Test status | |
| Simulation time | 158707506 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 09:04:32 AM UTC 24 |
| Finished | Sep 24 09:04:34 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=949550368 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_timeout.949550368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_disable_endpoint.3633160869 |
| Short name | T1034 |
| Test name | |
| Test status | |
| Simulation time | 527962603 ps |
| CPU time | 2.81 seconds |
| Started | Sep 24 09:04:33 AM UTC 24 |
| Finished | Sep 24 09:04:37 AM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3633160869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_disable_endpoint.3633160869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_disconnected.128852637 |
| Short name | T1035 |
| Test name | |
| Test status | |
| Simulation time | 153478565 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:04:35 AM UTC 24 |
| Finished | Sep 24 09:04:37 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=128852637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_disconnected.128852637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_enable.3627638241 |
| Short name | T1033 |
| Test name | |
| Test status | |
| Simulation time | 37425596 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:04:35 AM UTC 24 |
| Finished | Sep 24 09:04:37 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3627638241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 10.usbdev_enable.3627638241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_access.1206432577 |
| Short name | T1041 |
| Test name | |
| Test status | |
| Simulation time | 865546647 ps |
| CPU time | 5.31 seconds |
| Started | Sep 24 09:04:37 AM UTC 24 |
| Finished | Sep 24 09:04:43 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1206432577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_access.1206432577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_types.1861226584 |
| Short name | T569 |
| Test name | |
| Test status | |
| Simulation time | 192640456 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:04:37 AM UTC 24 |
| Finished | Sep 24 09:04:39 AM UTC 24 |
| Peak memory | 215816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1861226584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_types.1861226584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_levels.1419564967 |
| Short name | T345 |
| Test name | |
| Test status | |
| Simulation time | 271503466 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:04:37 AM UTC 24 |
| Finished | Sep 24 09:04:40 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1419564967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_fifo_levels.1419564967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_rst.904439559 |
| Short name | T1043 |
| Test name | |
| Test status | |
| Simulation time | 480362706 ps |
| CPU time | 4.86 seconds |
| Started | Sep 24 09:04:39 AM UTC 24 |
| Finished | Sep 24 09:04:45 AM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=904439559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_fifo_rst.904439559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_in_iso.2075849575 |
| Short name | T1038 |
| Test name | |
| Test status | |
| Simulation time | 206268051 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 09:04:39 AM UTC 24 |
| Finished | Sep 24 09:04:41 AM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2075849575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_in_iso.2075849575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_in_stall.1584972944 |
| Short name | T1040 |
| Test name | |
| Test status | |
| Simulation time | 199690189 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:04:39 AM UTC 24 |
| Finished | Sep 24 09:04:42 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1584972944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_stall.1584972944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_in_trans.1546970583 |
| Short name | T1042 |
| Test name | |
| Test status | |
| Simulation time | 239289749 ps |
| CPU time | 1.86 seconds |
| Started | Sep 24 09:04:40 AM UTC 24 |
| Finished | Sep 24 09:04:44 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1546970583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_trans.1546970583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_invalid_sync.3859969600 |
| Short name | T1225 |
| Test name | |
| Test status | |
| Simulation time | 4244365613 ps |
| CPU time | 119.85 seconds |
| Started | Sep 24 09:04:39 AM UTC 24 |
| Finished | Sep 24 09:06:41 AM UTC 24 |
| Peak memory | 235088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3859969600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 10.usbdev_invalid_sync.3859969600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_iso_retraction.3002929940 |
| Short name | T1203 |
| Test name | |
| Test status | |
| Simulation time | 13555199756 ps |
| CPU time | 105.61 seconds |
| Started | Sep 24 09:04:40 AM UTC 24 |
| Finished | Sep 24 09:06:29 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3002929940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_iso_retraction.3002929940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_link_in_err.1329337683 |
| Short name | T1045 |
| Test name | |
| Test status | |
| Simulation time | 222431753 ps |
| CPU time | 1.85 seconds |
| Started | Sep 24 09:04:42 AM UTC 24 |
| Finished | Sep 24 09:04:46 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1329337683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_in_err.1329337683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_link_resume.4035499277 |
| Short name | T1088 |
| Test name | |
| Test status | |
| Simulation time | 15781853242 ps |
| CPU time | 33.67 seconds |
| Started | Sep 24 09:04:42 AM UTC 24 |
| Finished | Sep 24 09:05:17 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4035499277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_resume.4035499277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_link_suspend.3840105903 |
| Short name | T1081 |
| Test name | |
| Test status | |
| Simulation time | 8889397050 ps |
| CPU time | 27.46 seconds |
| Started | Sep 24 09:04:42 AM UTC 24 |
| Finished | Sep 24 09:05:11 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3840105903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_link_suspend.3840105903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_low_speed_traffic.3497724489 |
| Short name | T1106 |
| Test name | |
| Test status | |
| Simulation time | 3998843798 ps |
| CPU time | 42.57 seconds |
| Started | Sep 24 09:04:45 AM UTC 24 |
| Finished | Sep 24 09:05:30 AM UTC 24 |
| Peak memory | 235200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3497724489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_low_speed_traffic.3497724489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_max_inter_pkt_delay.785207936 |
| Short name | T1143 |
| Test name | |
| Test status | |
| Simulation time | 2330026651 ps |
| CPU time | 62.67 seconds |
| Started | Sep 24 09:04:45 AM UTC 24 |
| Finished | Sep 24 09:05:50 AM UTC 24 |
| Peak memory | 228124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=785207936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_inter_pkt_delay.785207936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_in_transaction.988542487 |
| Short name | T1048 |
| Test name | |
| Test status | |
| Simulation time | 260411519 ps |
| CPU time | 1.85 seconds |
| Started | Sep 24 09:04:46 AM UTC 24 |
| Finished | Sep 24 09:04:49 AM UTC 24 |
| Peak memory | 215148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=988542487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_in_transaction.988542487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_out_transaction.711093194 |
| Short name | T1046 |
| Test name | |
| Test status | |
| Simulation time | 199846227 ps |
| CPU time | 1.74 seconds |
| Started | Sep 24 09:04:46 AM UTC 24 |
| Finished | Sep 24 09:04:48 AM UTC 24 |
| Peak memory | 215296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=711093194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 10.usbdev_max_length_out_transaction.711093194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_max_non_iso_usb_traffic.2808865360 |
| Short name | T1098 |
| Test name | |
| Test status | |
| Simulation time | 3029385597 ps |
| CPU time | 36.36 seconds |
| Started | Sep 24 09:04:46 AM UTC 24 |
| Finished | Sep 24 09:05:24 AM UTC 24 |
| Peak memory | 235208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2808865360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_non_iso_usb_traffic.2808865360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_max_usb_traffic.3091721698 |
| Short name | T1198 |
| Test name | |
| Test status | |
| Simulation time | 3071548473 ps |
| CPU time | 97.01 seconds |
| Started | Sep 24 09:04:46 AM UTC 24 |
| Finished | Sep 24 09:06:25 AM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3091721698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_usb_traffic.3091721698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_min_inter_pkt_delay.1405687942 |
| Short name | T1085 |
| Test name | |
| Test status | |
| Simulation time | 2116061991 ps |
| CPU time | 24.18 seconds |
| Started | Sep 24 09:04:48 AM UTC 24 |
| Finished | Sep 24 09:05:13 AM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1405687942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_inter_pkt_delay.1405687942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_in_transaction.2350741891 |
| Short name | T1049 |
| Test name | |
| Test status | |
| Simulation time | 158094960 ps |
| CPU time | 1.63 seconds |
| Started | Sep 24 09:04:48 AM UTC 24 |
| Finished | Sep 24 09:04:50 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2350741891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_in_transaction.2350741891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_out_transaction.3272198932 |
| Short name | T1050 |
| Test name | |
| Test status | |
| Simulation time | 172011851 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:04:48 AM UTC 24 |
| Finished | Sep 24 09:04:50 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3272198932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_out_transaction.3272198932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_out_iso.663575064 |
| Short name | T1052 |
| Test name | |
| Test status | |
| Simulation time | 163782048 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:04:50 AM UTC 24 |
| Finished | Sep 24 09:04:53 AM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=663575064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 10.usbdev_out_iso.663575064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_out_stall.3291944592 |
| Short name | T1053 |
| Test name | |
| Test status | |
| Simulation time | 177921075 ps |
| CPU time | 1.47 seconds |
| Started | Sep 24 09:04:50 AM UTC 24 |
| Finished | Sep 24 09:04:53 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3291944592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_out_stall.3291944592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_out_trans_nak.4233004298 |
| Short name | T1056 |
| Test name | |
| Test status | |
| Simulation time | 175219834 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:04:52 AM UTC 24 |
| Finished | Sep 24 09:04:54 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4233004298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_out_trans_nak.4233004298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_pending_in_trans.4070313054 |
| Short name | T1055 |
| Test name | |
| Test status | |
| Simulation time | 190319538 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 09:04:52 AM UTC 24 |
| Finished | Sep 24 09:04:54 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4070313054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_pending_in_trans.4070313054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_pinflip.2976962271 |
| Short name | T1061 |
| Test name | |
| Test status | |
| Simulation time | 201673264 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:04:55 AM UTC 24 |
| Finished | Sep 24 09:04:58 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2976962271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_pinflip.2976962271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_usb_ref_disable.3784073505 |
| Short name | T1060 |
| Test name | |
| Test status | |
| Simulation time | 170788436 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:04:55 AM UTC 24 |
| Finished | Sep 24 09:04:58 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3784073505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_usb_ref_disable.3784073505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_phy_pins_sense.24315348 |
| Short name | T1058 |
| Test name | |
| Test status | |
| Simulation time | 66386168 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:04:56 AM UTC 24 |
| Finished | Sep 24 09:04:58 AM UTC 24 |
| Peak memory | 215592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=24315348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_phy_pins_sense.24315348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_buffer.393492865 |
| Short name | T262 |
| Test name | |
| Test status | |
| Simulation time | 19915402086 ps |
| CPU time | 49.13 seconds |
| Started | Sep 24 09:04:56 AM UTC 24 |
| Finished | Sep 24 09:05:46 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=393492865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_pkt_buffer.393492865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_received.3405342558 |
| Short name | T1059 |
| Test name | |
| Test status | |
| Simulation time | 152849580 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:04:56 AM UTC 24 |
| Finished | Sep 24 09:04:58 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3405342558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_pkt_received.3405342558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_sent.2288089791 |
| Short name | T1063 |
| Test name | |
| Test status | |
| Simulation time | 164797941 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:04:56 AM UTC 24 |
| Finished | Sep 24 09:04:58 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2288089791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_pkt_sent.2288089791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_in_transaction.1337645396 |
| Short name | T1062 |
| Test name | |
| Test status | |
| Simulation time | 175492012 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:04:56 AM UTC 24 |
| Finished | Sep 24 09:04:58 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1337645396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_random_length_in_transaction.1337645396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_out_transaction.2304190472 |
| Short name | T1064 |
| Test name | |
| Test status | |
| Simulation time | 181403813 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:04:57 AM UTC 24 |
| Finished | Sep 24 09:05:00 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2304190472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_random_length_out_transaction.2304190472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_resume_link_active.2207176733 |
| Short name | T1126 |
| Test name | |
| Test status | |
| Simulation time | 20183331400 ps |
| CPU time | 37.61 seconds |
| Started | Sep 24 09:05:00 AM UTC 24 |
| Finished | Sep 24 09:05:39 AM UTC 24 |
| Peak memory | 217824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2207176733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 10.usbdev_resume_link_active.2207176733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_rx_crc_err.35403085 |
| Short name | T1065 |
| Test name | |
| Test status | |
| Simulation time | 141581421 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:05:00 AM UTC 24 |
| Finished | Sep 24 09:05:02 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=35403085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_rx_crc_err.35403085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_rx_full.724329409 |
| Short name | T1068 |
| Test name | |
| Test status | |
| Simulation time | 367858139 ps |
| CPU time | 2.51 seconds |
| Started | Sep 24 09:05:00 AM UTC 24 |
| Finished | Sep 24 09:05:04 AM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=724329409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 10.usbdev_rx_full.724329409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_setup_stage.3604724974 |
| Short name | T1067 |
| Test name | |
| Test status | |
| Simulation time | 154235616 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 09:05:00 AM UTC 24 |
| Finished | Sep 24 09:05:03 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3604724974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_setup_stage.3604724974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_setup_trans_ignored.233765169 |
| Short name | T1066 |
| Test name | |
| Test status | |
| Simulation time | 162009119 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:05:00 AM UTC 24 |
| Finished | Sep 24 09:05:03 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=233765169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 10.usbdev_setup_trans_ignored.233765169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_smoke.1987356731 |
| Short name | T1070 |
| Test name | |
| Test status | |
| Simulation time | 246922863 ps |
| CPU time | 1.95 seconds |
| Started | Sep 24 09:05:02 AM UTC 24 |
| Finished | Sep 24 09:05:05 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1987356731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_smoke.1987356731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_spurious_pids_ignored.1483803010 |
| Short name | T1093 |
| Test name | |
| Test status | |
| Simulation time | 1390421554 ps |
| CPU time | 15.13 seconds |
| Started | Sep 24 09:05:02 AM UTC 24 |
| Finished | Sep 24 09:05:18 AM UTC 24 |
| Peak memory | 234872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1483803010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_spurious_pids_ignored.1483803010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_stall_priority_over_nak.2303427051 |
| Short name | T1069 |
| Test name | |
| Test status | |
| Simulation time | 205093217 ps |
| CPU time | 1.79 seconds |
| Started | Sep 24 09:05:02 AM UTC 24 |
| Finished | Sep 24 09:05:05 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2303427051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stall_priority_over_nak.2303427051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_stall_trans.4154138216 |
| Short name | T1073 |
| Test name | |
| Test status | |
| Simulation time | 199364006 ps |
| CPU time | 1.76 seconds |
| Started | Sep 24 09:05:04 AM UTC 24 |
| Finished | Sep 24 09:05:07 AM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4154138216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_stall_trans.4154138216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_stream_len_max.3079519905 |
| Short name | T1078 |
| Test name | |
| Test status | |
| Simulation time | 808612576 ps |
| CPU time | 4.01 seconds |
| Started | Sep 24 09:05:04 AM UTC 24 |
| Finished | Sep 24 09:05:09 AM UTC 24 |
| Peak memory | 217700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3079519905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stream_len_max.3079519905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_streaming_out.2357213436 |
| Short name | T1214 |
| Test name | |
| Test status | |
| Simulation time | 3278070750 ps |
| CPU time | 90.33 seconds |
| Started | Sep 24 09:05:04 AM UTC 24 |
| Finished | Sep 24 09:06:36 AM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2357213436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_streaming_out.2357213436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_timeout_missing_host_handshake.2315106754 |
| Short name | T1051 |
| Test name | |
| Test status | |
| Simulation time | 841708338 ps |
| CPU time | 18.01 seconds |
| Started | Sep 24 09:04:33 AM UTC 24 |
| Finished | Sep 24 09:04:52 AM UTC 24 |
| Peak memory | 218344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2315106754 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_timeout_missing_host_handshake.2315106754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/10.usbdev_tx_rx_disruption.2424255372 |
| Short name | T1079 |
| Test name | |
| Test status | |
| Simulation time | 621697826 ps |
| CPU time | 2.69 seconds |
| Started | Sep 24 09:05:06 AM UTC 24 |
| Finished | Sep 24 09:05:10 AM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2424255372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_t x_rx_disruption.2424255372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/10.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.3684314858 |
| Short name | T534 |
| Test name | |
| Test status | |
| Simulation time | 534667360 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3684314858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_endpoint_types.3684314858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/100.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.3284552217 |
| Short name | T3326 |
| Test name | |
| Test status | |
| Simulation time | 446988383 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3284552217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_ tx_rx_disruption.3284552217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/100.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.3806948935 |
| Short name | T3327 |
| Test name | |
| Test status | |
| Simulation time | 526657953 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3806948935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_ tx_rx_disruption.3806948935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/101.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.2637623813 |
| Short name | T583 |
| Test name | |
| Test status | |
| Simulation time | 342427265 ps |
| CPU time | 1.25 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2637623813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_endpoint_types.2637623813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/102.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.568797334 |
| Short name | T3330 |
| Test name | |
| Test status | |
| Simulation time | 525004687 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 09:37:27 AM UTC 24 |
| Finished | Sep 24 09:37:30 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=568797334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_t x_rx_disruption.568797334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/102.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.4186991178 |
| Short name | T3319 |
| Test name | |
| Test status | |
| Simulation time | 195972749 ps |
| CPU time | 0.94 seconds |
| Started | Sep 24 09:37:27 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4186991178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_endpoint_types.4186991178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/103.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.2754125046 |
| Short name | T3334 |
| Test name | |
| Test status | |
| Simulation time | 570398185 ps |
| CPU time | 1.88 seconds |
| Started | Sep 24 09:37:27 AM UTC 24 |
| Finished | Sep 24 09:37:30 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2754125046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_ tx_rx_disruption.2754125046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/103.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.3629953087 |
| Short name | T582 |
| Test name | |
| Test status | |
| Simulation time | 278994873 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:37:27 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3629953087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_endpoint_types.3629953087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/104.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/104.usbdev_fifo_levels.3150140437 |
| Short name | T3325 |
| Test name | |
| Test status | |
| Simulation time | 166038233 ps |
| CPU time | 0.96 seconds |
| Started | Sep 24 09:37:27 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3150140437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 104.usbdev_fifo_levels.3150140437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/104.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.1457362442 |
| Short name | T3331 |
| Test name | |
| Test status | |
| Simulation time | 590595670 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:37:27 AM UTC 24 |
| Finished | Sep 24 09:37:30 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1457362442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_ tx_rx_disruption.1457362442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/104.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.4252568499 |
| Short name | T480 |
| Test name | |
| Test status | |
| Simulation time | 559750527 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:37:27 AM UTC 24 |
| Finished | Sep 24 09:37:30 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4252568499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_endpoint_types.4252568499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/105.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.3987535807 |
| Short name | T3333 |
| Test name | |
| Test status | |
| Simulation time | 505766378 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:37:27 AM UTC 24 |
| Finished | Sep 24 09:37:30 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3987535807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_ tx_rx_disruption.3987535807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/105.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/106.usbdev_fifo_levels.4115535653 |
| Short name | T367 |
| Test name | |
| Test status | |
| Simulation time | 254544956 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:37:27 AM UTC 24 |
| Finished | Sep 24 09:37:30 AM UTC 24 |
| Peak memory | 215620 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4115535653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 106.usbdev_fifo_levels.4115535653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/106.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.2749896301 |
| Short name | T3321 |
| Test name | |
| Test status | |
| Simulation time | 556143016 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:37:27 AM UTC 24 |
| Finished | Sep 24 09:37:30 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2749896301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_ tx_rx_disruption.2749896301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/106.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.1235795167 |
| Short name | T530 |
| Test name | |
| Test status | |
| Simulation time | 496455298 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 09:37:27 AM UTC 24 |
| Finished | Sep 24 09:37:30 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1235795167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_endpoint_types.1235795167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/107.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/107.usbdev_fifo_levels.598004566 |
| Short name | T3328 |
| Test name | |
| Test status | |
| Simulation time | 269639244 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:37:27 AM UTC 24 |
| Finished | Sep 24 09:37:30 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=598004566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 107.usbdev_fifo_levels.598004566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/107.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.1702922878 |
| Short name | T3332 |
| Test name | |
| Test status | |
| Simulation time | 462349532 ps |
| CPU time | 1.34 seconds |
| Started | Sep 24 09:37:27 AM UTC 24 |
| Finished | Sep 24 09:37:30 AM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1702922878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_ tx_rx_disruption.1702922878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/107.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.2083024761 |
| Short name | T3335 |
| Test name | |
| Test status | |
| Simulation time | 627513521 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:37:27 AM UTC 24 |
| Finished | Sep 24 09:37:30 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2083024761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_ tx_rx_disruption.2083024761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/108.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.3252839001 |
| Short name | T492 |
| Test name | |
| Test status | |
| Simulation time | 584857219 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3252839001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_endpoint_types.3252839001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/109.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/109.usbdev_fifo_levels.2297079700 |
| Short name | T363 |
| Test name | |
| Test status | |
| Simulation time | 295023370 ps |
| CPU time | 1.23 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:18 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2297079700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 109.usbdev_fifo_levels.2297079700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/109.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.2899404266 |
| Short name | T3345 |
| Test name | |
| Test status | |
| Simulation time | 541564886 ps |
| CPU time | 1.92 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2899404266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_ tx_rx_disruption.2899404266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/109.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_alert_test.638334334 |
| Short name | T1139 |
| Test name | |
| Test status | |
| Simulation time | 50101855 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:05:43 AM UTC 24 |
| Finished | Sep 24 09:05:45 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=638334334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_alert_test.638334334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_disconnect.3095615002 |
| Short name | T1097 |
| Test name | |
| Test status | |
| Simulation time | 6312050816 ps |
| CPU time | 11.52 seconds |
| Started | Sep 24 09:05:10 AM UTC 24 |
| Finished | Sep 24 09:05:23 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3095615002 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_disconnect.3095615002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_reset.4089855330 |
| Short name | T1112 |
| Test name | |
| Test status | |
| Simulation time | 13590002057 ps |
| CPU time | 22.75 seconds |
| Started | Sep 24 09:05:10 AM UTC 24 |
| Finished | Sep 24 09:05:34 AM UTC 24 |
| Peak memory | 228288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4089855330 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_reset.4089855330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_resume.863260149 |
| Short name | T1151 |
| Test name | |
| Test status | |
| Simulation time | 24744817064 ps |
| CPU time | 44.57 seconds |
| Started | Sep 24 09:05:10 AM UTC 24 |
| Finished | Sep 24 09:05:56 AM UTC 24 |
| Peak memory | 227924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=863260149 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_resume.863260149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_av_buffer.2408139401 |
| Short name | T1083 |
| Test name | |
| Test status | |
| Simulation time | 146595456 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:05:10 AM UTC 24 |
| Finished | Sep 24 09:05:13 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2408139401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_av_buffer.2408139401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_bitstuff_err.3554560022 |
| Short name | T1084 |
| Test name | |
| Test status | |
| Simulation time | 205449965 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:05:10 AM UTC 24 |
| Finished | Sep 24 09:05:13 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3554560022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_bitstuff_err.3554560022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_clear.1078152350 |
| Short name | T1086 |
| Test name | |
| Test status | |
| Simulation time | 404136226 ps |
| CPU time | 2.71 seconds |
| Started | Sep 24 09:05:10 AM UTC 24 |
| Finished | Sep 24 09:05:14 AM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1078152350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 11.usbdev_data_toggle_clear.1078152350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_restore.55908418 |
| Short name | T444 |
| Test name | |
| Test status | |
| Simulation time | 409882061 ps |
| CPU time | 2.47 seconds |
| Started | Sep 24 09:05:12 AM UTC 24 |
| Finished | Sep 24 09:05:16 AM UTC 24 |
| Peak memory | 217720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=55908418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_data_toggle_restore.55908418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_device_address.3974505327 |
| Short name | T1180 |
| Test name | |
| Test status | |
| Simulation time | 33375571596 ps |
| CPU time | 58.18 seconds |
| Started | Sep 24 09:05:12 AM UTC 24 |
| Finished | Sep 24 09:06:12 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3974505327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_address.3974505327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_device_timeout.3033407749 |
| Short name | T1158 |
| Test name | |
| Test status | |
| Simulation time | 7741687595 ps |
| CPU time | 46 seconds |
| Started | Sep 24 09:05:12 AM UTC 24 |
| Finished | Sep 24 09:06:00 AM UTC 24 |
| Peak memory | 218408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3033407749 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_timeout.3033407749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_disable_endpoint.1243704272 |
| Short name | T1094 |
| Test name | |
| Test status | |
| Simulation time | 520937699 ps |
| CPU time | 2.9 seconds |
| Started | Sep 24 09:05:15 AM UTC 24 |
| Finished | Sep 24 09:05:19 AM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1243704272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_disable_endpoint.1243704272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_disconnected.2735711108 |
| Short name | T1091 |
| Test name | |
| Test status | |
| Simulation time | 149084731 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:05:15 AM UTC 24 |
| Finished | Sep 24 09:05:18 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2735711108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_disconnected.2735711108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_enable.4006424082 |
| Short name | T1090 |
| Test name | |
| Test status | |
| Simulation time | 44407122 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:05:15 AM UTC 24 |
| Finished | Sep 24 09:05:17 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4006424082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_enable.4006424082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_access.2152975069 |
| Short name | T1095 |
| Test name | |
| Test status | |
| Simulation time | 945961411 ps |
| CPU time | 5.31 seconds |
| Started | Sep 24 09:05:15 AM UTC 24 |
| Finished | Sep 24 09:05:22 AM UTC 24 |
| Peak memory | 217920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2152975069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_access.2152975069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_types.2404838102 |
| Short name | T1092 |
| Test name | |
| Test status | |
| Simulation time | 157949732 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:05:16 AM UTC 24 |
| Finished | Sep 24 09:05:18 AM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2404838102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_types.2404838102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_rst.2770318667 |
| Short name | T1096 |
| Test name | |
| Test status | |
| Simulation time | 406437778 ps |
| CPU time | 4.06 seconds |
| Started | Sep 24 09:05:17 AM UTC 24 |
| Finished | Sep 24 09:05:23 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2770318667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_fifo_rst.2770318667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_in_iso.705750574 |
| Short name | T1100 |
| Test name | |
| Test status | |
| Simulation time | 207517309 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:05:22 AM UTC 24 |
| Finished | Sep 24 09:05:24 AM UTC 24 |
| Peak memory | 225976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=705750574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_in_iso.705750574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_in_stall.1413783227 |
| Short name | T1099 |
| Test name | |
| Test status | |
| Simulation time | 140348943 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:05:22 AM UTC 24 |
| Finished | Sep 24 09:05:24 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1413783227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_stall.1413783227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_in_trans.3930053735 |
| Short name | T1101 |
| Test name | |
| Test status | |
| Simulation time | 220151682 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:05:22 AM UTC 24 |
| Finished | Sep 24 09:05:24 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3930053735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_trans.3930053735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_invalid_sync.1728104601 |
| Short name | T1161 |
| Test name | |
| Test status | |
| Simulation time | 3972542431 ps |
| CPU time | 43.12 seconds |
| Started | Sep 24 09:05:17 AM UTC 24 |
| Finished | Sep 24 09:06:02 AM UTC 24 |
| Peak memory | 235156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1728104601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 11.usbdev_invalid_sync.1728104601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_iso_retraction.3066611865 |
| Short name | T1260 |
| Test name | |
| Test status | |
| Simulation time | 12538658385 ps |
| CPU time | 97.27 seconds |
| Started | Sep 24 09:05:22 AM UTC 24 |
| Finished | Sep 24 09:07:01 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3066611865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_iso_retraction.3066611865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_link_in_err.332211895 |
| Short name | T1102 |
| Test name | |
| Test status | |
| Simulation time | 230957880 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 09:05:22 AM UTC 24 |
| Finished | Sep 24 09:05:25 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=332211895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_link_in_err.332211895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_link_resume.3270370429 |
| Short name | T1191 |
| Test name | |
| Test status | |
| Simulation time | 33336356930 ps |
| CPU time | 55.39 seconds |
| Started | Sep 24 09:05:22 AM UTC 24 |
| Finished | Sep 24 09:06:19 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3270370429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_resume.3270370429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_link_suspend.491153448 |
| Short name | T1124 |
| Test name | |
| Test status | |
| Simulation time | 6084287126 ps |
| CPU time | 14.26 seconds |
| Started | Sep 24 09:05:22 AM UTC 24 |
| Finished | Sep 24 09:05:37 AM UTC 24 |
| Peak memory | 228360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=491153448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_suspend.491153448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_low_speed_traffic.3701428304 |
| Short name | T1142 |
| Test name | |
| Test status | |
| Simulation time | 2750135737 ps |
| CPU time | 26.62 seconds |
| Started | Sep 24 09:05:22 AM UTC 24 |
| Finished | Sep 24 09:05:50 AM UTC 24 |
| Peak memory | 234960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3701428304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_low_speed_traffic.3701428304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_max_inter_pkt_delay.985138537 |
| Short name | T1162 |
| Test name | |
| Test status | |
| Simulation time | 3575314363 ps |
| CPU time | 36.78 seconds |
| Started | Sep 24 09:05:24 AM UTC 24 |
| Finished | Sep 24 09:06:02 AM UTC 24 |
| Peak memory | 230400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=985138537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_inter_pkt_delay.985138537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_in_transaction.866212599 |
| Short name | T1103 |
| Test name | |
| Test status | |
| Simulation time | 238678800 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 09:05:24 AM UTC 24 |
| Finished | Sep 24 09:05:27 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=866212599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_in_transaction.866212599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_out_transaction.554113135 |
| Short name | T1104 |
| Test name | |
| Test status | |
| Simulation time | 190599858 ps |
| CPU time | 1.63 seconds |
| Started | Sep 24 09:05:24 AM UTC 24 |
| Finished | Sep 24 09:05:27 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=554113135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 11.usbdev_max_length_out_transaction.554113135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_max_non_iso_usb_traffic.1923016207 |
| Short name | T1153 |
| Test name | |
| Test status | |
| Simulation time | 2884235901 ps |
| CPU time | 29.48 seconds |
| Started | Sep 24 09:05:27 AM UTC 24 |
| Finished | Sep 24 09:05:58 AM UTC 24 |
| Peak memory | 234980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1923016207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_non_iso_usb_traffic.1923016207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_max_usb_traffic.3982943855 |
| Short name | T1137 |
| Test name | |
| Test status | |
| Simulation time | 1766217562 ps |
| CPU time | 15.89 seconds |
| Started | Sep 24 09:05:27 AM UTC 24 |
| Finished | Sep 24 09:05:44 AM UTC 24 |
| Peak memory | 234888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3982943855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_usb_traffic.3982943855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_min_inter_pkt_delay.989646295 |
| Short name | T1189 |
| Test name | |
| Test status | |
| Simulation time | 4166158598 ps |
| CPU time | 47.76 seconds |
| Started | Sep 24 09:05:27 AM UTC 24 |
| Finished | Sep 24 09:06:16 AM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=989646295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_inter_pkt_delay.989646295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_in_transaction.652062897 |
| Short name | T1108 |
| Test name | |
| Test status | |
| Simulation time | 183530512 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 09:05:27 AM UTC 24 |
| Finished | Sep 24 09:05:30 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=652062897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_in_transaction.652062897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_out_transaction.2850010397 |
| Short name | T1107 |
| Test name | |
| Test status | |
| Simulation time | 145203077 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:05:27 AM UTC 24 |
| Finished | Sep 24 09:05:30 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2850010397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_out_transaction.2850010397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_nak_trans.4269362024 |
| Short name | T133 |
| Test name | |
| Test status | |
| Simulation time | 217975941 ps |
| CPU time | 1.81 seconds |
| Started | Sep 24 09:05:29 AM UTC 24 |
| Finished | Sep 24 09:05:32 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4269362024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_nak_trans.4269362024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_out_iso.103216326 |
| Short name | T1111 |
| Test name | |
| Test status | |
| Simulation time | 253967894 ps |
| CPU time | 1.78 seconds |
| Started | Sep 24 09:05:29 AM UTC 24 |
| Finished | Sep 24 09:05:32 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=103216326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_out_iso.103216326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_out_stall.2489021386 |
| Short name | T1117 |
| Test name | |
| Test status | |
| Simulation time | 178663860 ps |
| CPU time | 1.47 seconds |
| Started | Sep 24 09:05:33 AM UTC 24 |
| Finished | Sep 24 09:05:36 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2489021386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_out_stall.2489021386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_out_trans_nak.3080621053 |
| Short name | T1119 |
| Test name | |
| Test status | |
| Simulation time | 172360015 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:05:33 AM UTC 24 |
| Finished | Sep 24 09:05:36 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3080621053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_out_trans_nak.3080621053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_pending_in_trans.3834843490 |
| Short name | T1115 |
| Test name | |
| Test status | |
| Simulation time | 141135081 ps |
| CPU time | 1.4 seconds |
| Started | Sep 24 09:05:33 AM UTC 24 |
| Finished | Sep 24 09:05:36 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3834843490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_pending_in_trans.3834843490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_pinflip.3871091496 |
| Short name | T1118 |
| Test name | |
| Test status | |
| Simulation time | 191681111 ps |
| CPU time | 1.31 seconds |
| Started | Sep 24 09:05:33 AM UTC 24 |
| Finished | Sep 24 09:05:36 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3871091496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_pinflip.3871091496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_usb_ref_disable.2620396412 |
| Short name | T1122 |
| Test name | |
| Test status | |
| Simulation time | 176974137 ps |
| CPU time | 1.76 seconds |
| Started | Sep 24 09:05:34 AM UTC 24 |
| Finished | Sep 24 09:05:36 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2620396412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_usb_ref_disable.2620396412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_phy_pins_sense.4286315603 |
| Short name | T1116 |
| Test name | |
| Test status | |
| Simulation time | 38105871 ps |
| CPU time | 1.22 seconds |
| Started | Sep 24 09:05:34 AM UTC 24 |
| Finished | Sep 24 09:05:36 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4286315603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_pins_sense.4286315603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_buffer.2839684099 |
| Short name | T264 |
| Test name | |
| Test status | |
| Simulation time | 7757445535 ps |
| CPU time | 18.97 seconds |
| Started | Sep 24 09:05:34 AM UTC 24 |
| Finished | Sep 24 09:05:54 AM UTC 24 |
| Peak memory | 235164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2839684099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_pkt_buffer.2839684099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_received.1658940477 |
| Short name | T1120 |
| Test name | |
| Test status | |
| Simulation time | 199226897 ps |
| CPU time | 1.35 seconds |
| Started | Sep 24 09:05:34 AM UTC 24 |
| Finished | Sep 24 09:05:36 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1658940477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_pkt_received.1658940477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_sent.2469505138 |
| Short name | T1123 |
| Test name | |
| Test status | |
| Simulation time | 209802847 ps |
| CPU time | 1.63 seconds |
| Started | Sep 24 09:05:34 AM UTC 24 |
| Finished | Sep 24 09:05:36 AM UTC 24 |
| Peak memory | 215616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2469505138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_pkt_sent.2469505138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_in_transaction.1830648424 |
| Short name | T1121 |
| Test name | |
| Test status | |
| Simulation time | 223106195 ps |
| CPU time | 1.47 seconds |
| Started | Sep 24 09:05:34 AM UTC 24 |
| Finished | Sep 24 09:05:36 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1830648424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_random_length_in_transaction.1830648424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_out_transaction.210671420 |
| Short name | T1125 |
| Test name | |
| Test status | |
| Simulation time | 200143307 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 09:05:36 AM UTC 24 |
| Finished | Sep 24 09:05:38 AM UTC 24 |
| Peak memory | 215412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=210671420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 11.usbdev_random_length_out_transaction.210671420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_resume_link_active.3183983318 |
| Short name | T1167 |
| Test name | |
| Test status | |
| Simulation time | 20161876832 ps |
| CPU time | 29.61 seconds |
| Started | Sep 24 09:05:36 AM UTC 24 |
| Finished | Sep 24 09:06:06 AM UTC 24 |
| Peak memory | 217532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3183983318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 11.usbdev_resume_link_active.3183983318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_rx_crc_err.2919072868 |
| Short name | T1132 |
| Test name | |
| Test status | |
| Simulation time | 156751516 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:05:41 AM UTC 24 |
| Finished | Sep 24 09:05:43 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2919072868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_rx_crc_err.2919072868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_rx_full.4119604477 |
| Short name | T1133 |
| Test name | |
| Test status | |
| Simulation time | 256453442 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 09:05:41 AM UTC 24 |
| Finished | Sep 24 09:05:43 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4119604477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_rx_full.4119604477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_setup_stage.575164117 |
| Short name | T1129 |
| Test name | |
| Test status | |
| Simulation time | 155268652 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:05:41 AM UTC 24 |
| Finished | Sep 24 09:05:43 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=575164117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_setup_stage.575164117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_setup_trans_ignored.3943060546 |
| Short name | T1131 |
| Test name | |
| Test status | |
| Simulation time | 200861919 ps |
| CPU time | 1.33 seconds |
| Started | Sep 24 09:05:41 AM UTC 24 |
| Finished | Sep 24 09:05:43 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3943060546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 11.usbdev_setup_trans_ignored.3943060546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_smoke.374451749 |
| Short name | T1134 |
| Test name | |
| Test status | |
| Simulation time | 242152593 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 09:05:41 AM UTC 24 |
| Finished | Sep 24 09:05:43 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=374451749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_smoke.374451749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_spurious_pids_ignored.416121135 |
| Short name | T1195 |
| Test name | |
| Test status | |
| Simulation time | 3613329278 ps |
| CPU time | 39.84 seconds |
| Started | Sep 24 09:05:41 AM UTC 24 |
| Finished | Sep 24 09:06:22 AM UTC 24 |
| Peak memory | 235156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=416121135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_spurious_pids_ignored.416121135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_stall_priority_over_nak.3824379256 |
| Short name | T1136 |
| Test name | |
| Test status | |
| Simulation time | 172621772 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:05:41 AM UTC 24 |
| Finished | Sep 24 09:05:43 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3824379256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stall_priority_over_nak.3824379256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_stall_trans.2537296171 |
| Short name | T1135 |
| Test name | |
| Test status | |
| Simulation time | 153342103 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:05:41 AM UTC 24 |
| Finished | Sep 24 09:05:43 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2537296171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_stall_trans.2537296171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_stream_len_max.3303993373 |
| Short name | T1138 |
| Test name | |
| Test status | |
| Simulation time | 458116064 ps |
| CPU time | 2.36 seconds |
| Started | Sep 24 09:05:41 AM UTC 24 |
| Finished | Sep 24 09:05:45 AM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3303993373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stream_len_max.3303993373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_streaming_out.627047612 |
| Short name | T1178 |
| Test name | |
| Test status | |
| Simulation time | 3692719740 ps |
| CPU time | 27.6 seconds |
| Started | Sep 24 09:05:41 AM UTC 24 |
| Finished | Sep 24 09:06:10 AM UTC 24 |
| Peak memory | 228324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=627047612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_streaming_out.627047612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_timeout_missing_host_handshake.3209940690 |
| Short name | T1110 |
| Test name | |
| Test status | |
| Simulation time | 1970995029 ps |
| CPU time | 17.66 seconds |
| Started | Sep 24 09:05:12 AM UTC 24 |
| Finished | Sep 24 09:05:31 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3209940690 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_timeout_missing_host_handshake.3209940690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/11.usbdev_tx_rx_disruption.3535288749 |
| Short name | T1140 |
| Test name | |
| Test status | |
| Simulation time | 591813330 ps |
| CPU time | 2.9 seconds |
| Started | Sep 24 09:05:41 AM UTC 24 |
| Finished | Sep 24 09:05:45 AM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3535288749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_t x_rx_disruption.3535288749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/11.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.1144602331 |
| Short name | T580 |
| Test name | |
| Test status | |
| Simulation time | 380576174 ps |
| CPU time | 1.33 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:18 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1144602331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_endpoint_types.1144602331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/110.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/110.usbdev_fifo_levels.3956254326 |
| Short name | T326 |
| Test name | |
| Test status | |
| Simulation time | 247427144 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:18 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3956254326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 110.usbdev_fifo_levels.3956254326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/110.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/110.usbdev_tx_rx_disruption.3519113237 |
| Short name | T3336 |
| Test name | |
| Test status | |
| Simulation time | 478183864 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:18 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3519113237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_ tx_rx_disruption.3519113237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/110.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.2791459822 |
| Short name | T3343 |
| Test name | |
| Test status | |
| Simulation time | 467494591 ps |
| CPU time | 1.47 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2791459822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_ tx_rx_disruption.2791459822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/111.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.4138336620 |
| Short name | T3116 |
| Test name | |
| Test status | |
| Simulation time | 237891045 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:18 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4138336620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_endpoint_types.4138336620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/112.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/112.usbdev_fifo_levels.1235226896 |
| Short name | T3318 |
| Test name | |
| Test status | |
| Simulation time | 149136476 ps |
| CPU time | 0.83 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:18 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1235226896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 112.usbdev_fifo_levels.1235226896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/112.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/112.usbdev_tx_rx_disruption.1727553625 |
| Short name | T3354 |
| Test name | |
| Test status | |
| Simulation time | 509164122 ps |
| CPU time | 1.9 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1727553625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_ tx_rx_disruption.1727553625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/112.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.3160688854 |
| Short name | T567 |
| Test name | |
| Test status | |
| Simulation time | 325178960 ps |
| CPU time | 1.29 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3160688854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_endpoint_types.3160688854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/113.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/113.usbdev_tx_rx_disruption.3283665389 |
| Short name | T3353 |
| Test name | |
| Test status | |
| Simulation time | 593520145 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3283665389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_ tx_rx_disruption.3283665389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/113.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.849962955 |
| Short name | T3339 |
| Test name | |
| Test status | |
| Simulation time | 286806367 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=849962955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 114.usbdev_endpoint_types.849962955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/114.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/114.usbdev_tx_rx_disruption.30325397 |
| Short name | T3355 |
| Test name | |
| Test status | |
| Simulation time | 460105767 ps |
| CPU time | 1.75 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=30325397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_tx _rx_disruption.30325397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/114.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/115.usbdev_fifo_levels.1589000020 |
| Short name | T3341 |
| Test name | |
| Test status | |
| Simulation time | 153628718 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1589000020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 115.usbdev_fifo_levels.1589000020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/115.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/115.usbdev_tx_rx_disruption.3950169901 |
| Short name | T3350 |
| Test name | |
| Test status | |
| Simulation time | 455464528 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 09:38:16 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3950169901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_ tx_rx_disruption.3950169901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/115.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.199025315 |
| Short name | T516 |
| Test name | |
| Test status | |
| Simulation time | 365023619 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=199025315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 116.usbdev_endpoint_types.199025315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/116.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/116.usbdev_fifo_levels.3046460960 |
| Short name | T3337 |
| Test name | |
| Test status | |
| Simulation time | 148528058 ps |
| CPU time | 0.92 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:18 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3046460960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 116.usbdev_fifo_levels.3046460960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/116.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/116.usbdev_tx_rx_disruption.1377411368 |
| Short name | T3352 |
| Test name | |
| Test status | |
| Simulation time | 452365578 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1377411368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_ tx_rx_disruption.1377411368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/116.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.3630291038 |
| Short name | T3346 |
| Test name | |
| Test status | |
| Simulation time | 237772751 ps |
| CPU time | 1.2 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3630291038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_endpoint_types.3630291038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/117.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/117.usbdev_tx_rx_disruption.1037212968 |
| Short name | T3357 |
| Test name | |
| Test status | |
| Simulation time | 644264475 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1037212968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_ tx_rx_disruption.1037212968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/117.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/118.usbdev_endpoint_types.1450451801 |
| Short name | T577 |
| Test name | |
| Test status | |
| Simulation time | 444989497 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1450451801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_endpoint_types.1450451801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/118.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/118.usbdev_fifo_levels.2666554842 |
| Short name | T3351 |
| Test name | |
| Test status | |
| Simulation time | 279423771 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2666554842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 118.usbdev_fifo_levels.2666554842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/118.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/118.usbdev_tx_rx_disruption.2503684084 |
| Short name | T3356 |
| Test name | |
| Test status | |
| Simulation time | 470837069 ps |
| CPU time | 1.63 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2503684084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_ tx_rx_disruption.2503684084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/118.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.79022292 |
| Short name | T3347 |
| Test name | |
| Test status | |
| Simulation time | 175354835 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=79022292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 119.usbdev_endpoint_types.79022292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/119.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/119.usbdev_fifo_levels.4272923363 |
| Short name | T3349 |
| Test name | |
| Test status | |
| Simulation time | 182804043 ps |
| CPU time | 1.14 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:19 AM UTC 24 |
| Peak memory | 215596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4272923363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 119.usbdev_fifo_levels.4272923363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/119.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/119.usbdev_tx_rx_disruption.1337886868 |
| Short name | T3360 |
| Test name | |
| Test status | |
| Simulation time | 582291433 ps |
| CPU time | 1.98 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:20 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1337886868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_ tx_rx_disruption.1337886868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/119.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_alert_test.3941600826 |
| Short name | T1128 |
| Test name | |
| Test status | |
| Simulation time | 43697983 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:06:18 AM UTC 24 |
| Finished | Sep 24 09:06:20 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3941600826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 12.usbdev_alert_test.3941600826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_disconnect.3386654826 |
| Short name | T1148 |
| Test name | |
| Test status | |
| Simulation time | 4598353903 ps |
| CPU time | 8.77 seconds |
| Started | Sep 24 09:05:43 AM UTC 24 |
| Finished | Sep 24 09:05:53 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3386654826 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_disconnect.3386654826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_reset.1281684384 |
| Short name | T1127 |
| Test name | |
| Test status | |
| Simulation time | 18384428759 ps |
| CPU time | 30.45 seconds |
| Started | Sep 24 09:05:48 AM UTC 24 |
| Finished | Sep 24 09:06:20 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1281684384 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_reset.1281684384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_resume.3174697957 |
| Short name | T1236 |
| Test name | |
| Test status | |
| Simulation time | 28557504351 ps |
| CPU time | 55.8 seconds |
| Started | Sep 24 09:05:48 AM UTC 24 |
| Finished | Sep 24 09:06:45 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3174697957 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_resume.3174697957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_av_buffer.4276681676 |
| Short name | T1145 |
| Test name | |
| Test status | |
| Simulation time | 199849145 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:05:48 AM UTC 24 |
| Finished | Sep 24 09:05:51 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4276681676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_av_buffer.4276681676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_bitstuff_err.3364614759 |
| Short name | T1144 |
| Test name | |
| Test status | |
| Simulation time | 146758430 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:05:48 AM UTC 24 |
| Finished | Sep 24 09:05:50 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3364614759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_bitstuff_err.3364614759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_clear.1771265961 |
| Short name | T1147 |
| Test name | |
| Test status | |
| Simulation time | 380784859 ps |
| CPU time | 2.55 seconds |
| Started | Sep 24 09:05:48 AM UTC 24 |
| Finished | Sep 24 09:05:52 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1771265961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 12.usbdev_data_toggle_clear.1771265961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_restore.900087036 |
| Short name | T445 |
| Test name | |
| Test status | |
| Simulation time | 1185950293 ps |
| CPU time | 3.92 seconds |
| Started | Sep 24 09:05:48 AM UTC 24 |
| Finished | Sep 24 09:05:53 AM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=900087036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_restore.900087036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_device_address.1724693368 |
| Short name | T1285 |
| Test name | |
| Test status | |
| Simulation time | 49646146999 ps |
| CPU time | 89.18 seconds |
| Started | Sep 24 09:05:48 AM UTC 24 |
| Finished | Sep 24 09:07:19 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1724693368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_address.1724693368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_device_timeout.97718321 |
| Short name | T1150 |
| Test name | |
| Test status | |
| Simulation time | 762610126 ps |
| CPU time | 5.21 seconds |
| Started | Sep 24 09:05:48 AM UTC 24 |
| Finished | Sep 24 09:05:54 AM UTC 24 |
| Peak memory | 217984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=97718321 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_timeout.97718321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_disable_endpoint.2668440172 |
| Short name | T1149 |
| Test name | |
| Test status | |
| Simulation time | 1165115617 ps |
| CPU time | 4.9 seconds |
| Started | Sep 24 09:05:48 AM UTC 24 |
| Finished | Sep 24 09:05:54 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2668440172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_disable_endpoint.2668440172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_disconnected.3306221410 |
| Short name | T1146 |
| Test name | |
| Test status | |
| Simulation time | 207399368 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 09:05:48 AM UTC 24 |
| Finished | Sep 24 09:05:51 AM UTC 24 |
| Peak memory | 215104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3306221410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_disconnected.3306221410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_enable.3524608238 |
| Short name | T1152 |
| Test name | |
| Test status | |
| Simulation time | 58689582 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:05:56 AM UTC 24 |
| Finished | Sep 24 09:05:58 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3524608238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 12.usbdev_enable.3524608238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_access.3432909563 |
| Short name | T1160 |
| Test name | |
| Test status | |
| Simulation time | 771454837 ps |
| CPU time | 4.03 seconds |
| Started | Sep 24 09:05:56 AM UTC 24 |
| Finished | Sep 24 09:06:01 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3432909563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_access.3432909563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_types.1857143892 |
| Short name | T475 |
| Test name | |
| Test status | |
| Simulation time | 481562344 ps |
| CPU time | 2.47 seconds |
| Started | Sep 24 09:05:56 AM UTC 24 |
| Finished | Sep 24 09:05:59 AM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1857143892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_types.1857143892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_rst.391778791 |
| Short name | T1159 |
| Test name | |
| Test status | |
| Simulation time | 280716080 ps |
| CPU time | 3.51 seconds |
| Started | Sep 24 09:05:56 AM UTC 24 |
| Finished | Sep 24 09:06:00 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=391778791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_fifo_rst.391778791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_in_iso.3778674625 |
| Short name | T1155 |
| Test name | |
| Test status | |
| Simulation time | 199159451 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 09:05:56 AM UTC 24 |
| Finished | Sep 24 09:05:58 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3778674625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 12.usbdev_in_iso.3778674625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_in_stall.731589938 |
| Short name | T1154 |
| Test name | |
| Test status | |
| Simulation time | 144205892 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 09:05:56 AM UTC 24 |
| Finished | Sep 24 09:05:58 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=731589938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_in_stall.731589938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_in_trans.1708975094 |
| Short name | T1157 |
| Test name | |
| Test status | |
| Simulation time | 233305209 ps |
| CPU time | 1.96 seconds |
| Started | Sep 24 09:05:56 AM UTC 24 |
| Finished | Sep 24 09:05:59 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1708975094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_in_trans.1708975094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_iso_retraction.913094558 |
| Short name | T1366 |
| Test name | |
| Test status | |
| Simulation time | 11817878975 ps |
| CPU time | 136.71 seconds |
| Started | Sep 24 09:05:56 AM UTC 24 |
| Finished | Sep 24 09:08:15 AM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=913094558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 12.usbdev_iso_retraction.913094558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_link_in_err.96784461 |
| Short name | T1156 |
| Test name | |
| Test status | |
| Simulation time | 219848382 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:05:56 AM UTC 24 |
| Finished | Sep 24 09:05:59 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=96784461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_link_in_err.96784461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_link_resume.1073520324 |
| Short name | T1254 |
| Test name | |
| Test status | |
| Simulation time | 31456446492 ps |
| CPU time | 59.58 seconds |
| Started | Sep 24 09:05:56 AM UTC 24 |
| Finished | Sep 24 09:06:57 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1073520324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_resume.1073520324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_link_suspend.3370104255 |
| Short name | T1177 |
| Test name | |
| Test status | |
| Simulation time | 8544525788 ps |
| CPU time | 12.1 seconds |
| Started | Sep 24 09:05:56 AM UTC 24 |
| Finished | Sep 24 09:06:09 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3370104255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_link_suspend.3370104255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_low_speed_traffic.392346061 |
| Short name | T1221 |
| Test name | |
| Test status | |
| Simulation time | 3511487561 ps |
| CPU time | 36.24 seconds |
| Started | Sep 24 09:06:01 AM UTC 24 |
| Finished | Sep 24 09:06:39 AM UTC 24 |
| Peak memory | 230468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=392346061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_low_speed_traffic.392346061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_max_inter_pkt_delay.1946273858 |
| Short name | T1196 |
| Test name | |
| Test status | |
| Simulation time | 2449571292 ps |
| CPU time | 20.15 seconds |
| Started | Sep 24 09:06:01 AM UTC 24 |
| Finished | Sep 24 09:06:22 AM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1946273858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_inter_pkt_delay.1946273858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_in_transaction.3740696164 |
| Short name | T1166 |
| Test name | |
| Test status | |
| Simulation time | 249676222 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 09:06:01 AM UTC 24 |
| Finished | Sep 24 09:06:04 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3740696164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_in_transaction.3740696164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_out_transaction.2720538318 |
| Short name | T1164 |
| Test name | |
| Test status | |
| Simulation time | 201919191 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 09:06:01 AM UTC 24 |
| Finished | Sep 24 09:06:04 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2720538318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_out_transaction.2720538318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_max_non_iso_usb_traffic.3892712893 |
| Short name | T1197 |
| Test name | |
| Test status | |
| Simulation time | 2783304601 ps |
| CPU time | 21.53 seconds |
| Started | Sep 24 09:06:01 AM UTC 24 |
| Finished | Sep 24 09:06:24 AM UTC 24 |
| Peak memory | 234816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3892712893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_non_iso_usb_traffic.3892712893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_max_usb_traffic.1607681259 |
| Short name | T1327 |
| Test name | |
| Test status | |
| Simulation time | 3670316795 ps |
| CPU time | 105.7 seconds |
| Started | Sep 24 09:06:01 AM UTC 24 |
| Finished | Sep 24 09:07:49 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1607681259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_usb_traffic.1607681259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_min_inter_pkt_delay.4081276586 |
| Short name | T1206 |
| Test name | |
| Test status | |
| Simulation time | 3353201990 ps |
| CPU time | 27.31 seconds |
| Started | Sep 24 09:06:01 AM UTC 24 |
| Finished | Sep 24 09:06:30 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4081276586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_inter_pkt_delay.4081276586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_in_transaction.145339571 |
| Short name | T1165 |
| Test name | |
| Test status | |
| Simulation time | 170933138 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:06:01 AM UTC 24 |
| Finished | Sep 24 09:06:04 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=145339571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_in_transaction.145339571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_out_transaction.4122725932 |
| Short name | T1163 |
| Test name | |
| Test status | |
| Simulation time | 154675229 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:06:01 AM UTC 24 |
| Finished | Sep 24 09:06:04 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4122725932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_out_transaction.4122725932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_nak_trans.1901674579 |
| Short name | T152 |
| Test name | |
| Test status | |
| Simulation time | 209198795 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:06:06 AM UTC 24 |
| Finished | Sep 24 09:06:08 AM UTC 24 |
| Peak memory | 215576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1901674579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_nak_trans.1901674579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_out_iso.2425992654 |
| Short name | T1170 |
| Test name | |
| Test status | |
| Simulation time | 175200090 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:06:06 AM UTC 24 |
| Finished | Sep 24 09:06:08 AM UTC 24 |
| Peak memory | 215640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2425992654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_out_iso.2425992654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_out_stall.565179335 |
| Short name | T1168 |
| Test name | |
| Test status | |
| Simulation time | 184461606 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 09:06:06 AM UTC 24 |
| Finished | Sep 24 09:06:08 AM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=565179335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_out_stall.565179335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_out_trans_nak.3763816126 |
| Short name | T1171 |
| Test name | |
| Test status | |
| Simulation time | 160774391 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:06:06 AM UTC 24 |
| Finished | Sep 24 09:06:08 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3763816126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_out_trans_nak.3763816126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_pending_in_trans.3377372200 |
| Short name | T1172 |
| Test name | |
| Test status | |
| Simulation time | 185941498 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:06:06 AM UTC 24 |
| Finished | Sep 24 09:06:08 AM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3377372200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_pending_in_trans.3377372200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_pinflip.2395910526 |
| Short name | T1174 |
| Test name | |
| Test status | |
| Simulation time | 233395060 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:06:06 AM UTC 24 |
| Finished | Sep 24 09:06:09 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2395910526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_pinflip.2395910526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_usb_ref_disable.981418348 |
| Short name | T1173 |
| Test name | |
| Test status | |
| Simulation time | 158412654 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:06:06 AM UTC 24 |
| Finished | Sep 24 09:06:08 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=981418348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 12.usbdev_phy_config_usb_ref_disable.981418348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_phy_pins_sense.146942687 |
| Short name | T1169 |
| Test name | |
| Test status | |
| Simulation time | 54331533 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 09:06:06 AM UTC 24 |
| Finished | Sep 24 09:06:08 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=146942687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_phy_pins_sense.146942687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_buffer.504057559 |
| Short name | T1202 |
| Test name | |
| Test status | |
| Simulation time | 7676728486 ps |
| CPU time | 20.9 seconds |
| Started | Sep 24 09:06:06 AM UTC 24 |
| Finished | Sep 24 09:06:28 AM UTC 24 |
| Peak memory | 232764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=504057559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_pkt_buffer.504057559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_received.1710101928 |
| Short name | T1175 |
| Test name | |
| Test status | |
| Simulation time | 219262568 ps |
| CPU time | 1.75 seconds |
| Started | Sep 24 09:06:06 AM UTC 24 |
| Finished | Sep 24 09:06:09 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1710101928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_pkt_received.1710101928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_sent.2348378525 |
| Short name | T1176 |
| Test name | |
| Test status | |
| Simulation time | 240264132 ps |
| CPU time | 1.81 seconds |
| Started | Sep 24 09:06:06 AM UTC 24 |
| Finished | Sep 24 09:06:09 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2348378525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_pkt_sent.2348378525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_in_transaction.1599996186 |
| Short name | T1179 |
| Test name | |
| Test status | |
| Simulation time | 171202857 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:06:08 AM UTC 24 |
| Finished | Sep 24 09:06:11 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1599996186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_random_length_in_transaction.1599996186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_out_transaction.3898198329 |
| Short name | T1182 |
| Test name | |
| Test status | |
| Simulation time | 168345606 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:06:12 AM UTC 24 |
| Finished | Sep 24 09:06:15 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3898198329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_random_length_out_transaction.3898198329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_resume_link_active.1856705944 |
| Short name | T1237 |
| Test name | |
| Test status | |
| Simulation time | 20179602324 ps |
| CPU time | 31.43 seconds |
| Started | Sep 24 09:06:12 AM UTC 24 |
| Finished | Sep 24 09:06:45 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1856705944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 12.usbdev_resume_link_active.1856705944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_rx_crc_err.762673891 |
| Short name | T1181 |
| Test name | |
| Test status | |
| Simulation time | 141107502 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:06:12 AM UTC 24 |
| Finished | Sep 24 09:06:15 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=762673891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_rx_crc_err.762673891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_rx_full.4278022623 |
| Short name | T1188 |
| Test name | |
| Test status | |
| Simulation time | 411224576 ps |
| CPU time | 2.4 seconds |
| Started | Sep 24 09:06:12 AM UTC 24 |
| Finished | Sep 24 09:06:16 AM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4278022623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_rx_full.4278022623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_setup_stage.3149957808 |
| Short name | T1186 |
| Test name | |
| Test status | |
| Simulation time | 204855999 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:06:12 AM UTC 24 |
| Finished | Sep 24 09:06:15 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3149957808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_setup_stage.3149957808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_setup_trans_ignored.3107984207 |
| Short name | T1183 |
| Test name | |
| Test status | |
| Simulation time | 154082239 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 09:06:12 AM UTC 24 |
| Finished | Sep 24 09:06:15 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3107984207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 12.usbdev_setup_trans_ignored.3107984207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_smoke.1999050984 |
| Short name | T1187 |
| Test name | |
| Test status | |
| Simulation time | 229554577 ps |
| CPU time | 1.8 seconds |
| Started | Sep 24 09:06:12 AM UTC 24 |
| Finished | Sep 24 09:06:15 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1999050984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_smoke.1999050984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_spurious_pids_ignored.3145955587 |
| Short name | T1224 |
| Test name | |
| Test status | |
| Simulation time | 2161005464 ps |
| CPU time | 25.32 seconds |
| Started | Sep 24 09:06:13 AM UTC 24 |
| Finished | Sep 24 09:06:39 AM UTC 24 |
| Peak memory | 234884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3145955587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 12.usbdev_spurious_pids_ignored.3145955587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_stall_priority_over_nak.859532408 |
| Short name | T1185 |
| Test name | |
| Test status | |
| Simulation time | 180535736 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:06:13 AM UTC 24 |
| Finished | Sep 24 09:06:15 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=859532408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stall_priority_over_nak.859532408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_stall_trans.3649286027 |
| Short name | T1184 |
| Test name | |
| Test status | |
| Simulation time | 183295893 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:06:13 AM UTC 24 |
| Finished | Sep 24 09:06:15 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3649286027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_stall_trans.3649286027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_stream_len_max.2530630185 |
| Short name | T1075 |
| Test name | |
| Test status | |
| Simulation time | 575733271 ps |
| CPU time | 1.95 seconds |
| Started | Sep 24 09:06:18 AM UTC 24 |
| Finished | Sep 24 09:06:21 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2530630185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stream_len_max.2530630185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_streaming_out.2917699612 |
| Short name | T1287 |
| Test name | |
| Test status | |
| Simulation time | 2507794615 ps |
| CPU time | 65.68 seconds |
| Started | Sep 24 09:06:13 AM UTC 24 |
| Finished | Sep 24 09:07:20 AM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2917699612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_streaming_out.2917699612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_timeout_missing_host_handshake.539878065 |
| Short name | T1190 |
| Test name | |
| Test status | |
| Simulation time | 1310696027 ps |
| CPU time | 27.85 seconds |
| Started | Sep 24 09:05:48 AM UTC 24 |
| Finished | Sep 24 09:06:17 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=539878065 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_timeout_missing_host_handshake.539878065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/12.usbdev_tx_rx_disruption.2517918905 |
| Short name | T1194 |
| Test name | |
| Test status | |
| Simulation time | 445259054 ps |
| CPU time | 2.84 seconds |
| Started | Sep 24 09:06:18 AM UTC 24 |
| Finished | Sep 24 09:06:22 AM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2517918905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_t x_rx_disruption.2517918905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/12.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/120.usbdev_tx_rx_disruption.935906247 |
| Short name | T3361 |
| Test name | |
| Test status | |
| Simulation time | 660968866 ps |
| CPU time | 1.92 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:20 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=935906247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_t x_rx_disruption.935906247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/120.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/121.usbdev_tx_rx_disruption.3289675449 |
| Short name | T3358 |
| Test name | |
| Test status | |
| Simulation time | 446883599 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:20 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3289675449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_ tx_rx_disruption.3289675449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/121.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.561168847 |
| Short name | T531 |
| Test name | |
| Test status | |
| Simulation time | 427749677 ps |
| CPU time | 1.33 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:20 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=561168847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 122.usbdev_endpoint_types.561168847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/122.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/122.usbdev_tx_rx_disruption.163013522 |
| Short name | T3359 |
| Test name | |
| Test status | |
| Simulation time | 527783893 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 09:38:17 AM UTC 24 |
| Finished | Sep 24 09:38:20 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=163013522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_t x_rx_disruption.163013522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/122.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/123.usbdev_endpoint_types.3619986907 |
| Short name | T488 |
| Test name | |
| Test status | |
| Simulation time | 251606431 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:39:07 AM UTC 24 |
| Finished | Sep 24 09:39:09 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3619986907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_endpoint_types.3619986907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/123.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/123.usbdev_tx_rx_disruption.2213503186 |
| Short name | T3362 |
| Test name | |
| Test status | |
| Simulation time | 440287295 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 09:39:07 AM UTC 24 |
| Finished | Sep 24 09:39:09 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2213503186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_ tx_rx_disruption.2213503186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/123.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/124.usbdev_endpoint_types.1985027419 |
| Short name | T595 |
| Test name | |
| Test status | |
| Simulation time | 198851604 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:39:07 AM UTC 24 |
| Finished | Sep 24 09:39:09 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1985027419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_endpoint_types.1985027419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/124.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/124.usbdev_fifo_levels.1923682885 |
| Short name | T3367 |
| Test name | |
| Test status | |
| Simulation time | 261986362 ps |
| CPU time | 1.14 seconds |
| Started | Sep 24 09:39:08 AM UTC 24 |
| Finished | Sep 24 09:39:10 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1923682885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 124.usbdev_fifo_levels.1923682885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/124.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/124.usbdev_tx_rx_disruption.2507102691 |
| Short name | T3381 |
| Test name | |
| Test status | |
| Simulation time | 604063365 ps |
| CPU time | 2.11 seconds |
| Started | Sep 24 09:39:08 AM UTC 24 |
| Finished | Sep 24 09:39:11 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2507102691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_ tx_rx_disruption.2507102691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/124.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/125.usbdev_endpoint_types.642963059 |
| Short name | T3366 |
| Test name | |
| Test status | |
| Simulation time | 268317107 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:39:08 AM UTC 24 |
| Finished | Sep 24 09:39:10 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=642963059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 125.usbdev_endpoint_types.642963059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/125.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/125.usbdev_tx_rx_disruption.3732249349 |
| Short name | T3371 |
| Test name | |
| Test status | |
| Simulation time | 450426190 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:39:08 AM UTC 24 |
| Finished | Sep 24 09:39:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3732249349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_ tx_rx_disruption.3732249349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/125.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/126.usbdev_endpoint_types.2394863736 |
| Short name | T3363 |
| Test name | |
| Test status | |
| Simulation time | 153784250 ps |
| CPU time | 0.79 seconds |
| Started | Sep 24 09:39:08 AM UTC 24 |
| Finished | Sep 24 09:39:10 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2394863736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_endpoint_types.2394863736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/126.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/126.usbdev_tx_rx_disruption.891699854 |
| Short name | T3373 |
| Test name | |
| Test status | |
| Simulation time | 467999223 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:39:08 AM UTC 24 |
| Finished | Sep 24 09:39:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=891699854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_t x_rx_disruption.891699854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/126.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/127.usbdev_endpoint_types.1391370814 |
| Short name | T3365 |
| Test name | |
| Test status | |
| Simulation time | 178162266 ps |
| CPU time | 0.83 seconds |
| Started | Sep 24 09:39:08 AM UTC 24 |
| Finished | Sep 24 09:39:10 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1391370814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_endpoint_types.1391370814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/127.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/127.usbdev_fifo_levels.2294571712 |
| Short name | T3369 |
| Test name | |
| Test status | |
| Simulation time | 170929836 ps |
| CPU time | 0.84 seconds |
| Started | Sep 24 09:39:08 AM UTC 24 |
| Finished | Sep 24 09:39:10 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2294571712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 127.usbdev_fifo_levels.2294571712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/127.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/127.usbdev_tx_rx_disruption.1413120377 |
| Short name | T3379 |
| Test name | |
| Test status | |
| Simulation time | 503039446 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:39:08 AM UTC 24 |
| Finished | Sep 24 09:39:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1413120377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_ tx_rx_disruption.1413120377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/127.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/128.usbdev_tx_rx_disruption.3519799881 |
| Short name | T3380 |
| Test name | |
| Test status | |
| Simulation time | 544719187 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:39:08 AM UTC 24 |
| Finished | Sep 24 09:39:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3519799881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_ tx_rx_disruption.3519799881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/128.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/129.usbdev_endpoint_types.4166320399 |
| Short name | T575 |
| Test name | |
| Test status | |
| Simulation time | 435075567 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:11 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4166320399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_endpoint_types.4166320399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/129.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/129.usbdev_tx_rx_disruption.3046756271 |
| Short name | T3368 |
| Test name | |
| Test status | |
| Simulation time | 526942696 ps |
| CPU time | 2.19 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:12 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3046756271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_ tx_rx_disruption.3046756271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/129.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_alert_test.1008418233 |
| Short name | T1241 |
| Test name | |
| Test status | |
| Simulation time | 65399550 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:06:47 AM UTC 24 |
| Finished | Sep 24 09:06:49 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1008418233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 13.usbdev_alert_test.1008418233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_disconnect.3395672061 |
| Short name | T1212 |
| Test name | |
| Test status | |
| Simulation time | 5010888981 ps |
| CPU time | 12.83 seconds |
| Started | Sep 24 09:06:18 AM UTC 24 |
| Finished | Sep 24 09:06:32 AM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3395672061 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_disconnect.3395672061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_reset.3070819468 |
| Short name | T1246 |
| Test name | |
| Test status | |
| Simulation time | 15705853236 ps |
| CPU time | 32.33 seconds |
| Started | Sep 24 09:06:18 AM UTC 24 |
| Finished | Sep 24 09:06:52 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3070819468 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_reset.3070819468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_resume.3166379152 |
| Short name | T1255 |
| Test name | |
| Test status | |
| Simulation time | 29857933663 ps |
| CPU time | 38.01 seconds |
| Started | Sep 24 09:06:18 AM UTC 24 |
| Finished | Sep 24 09:06:57 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3166379152 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_resume.3166379152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_av_buffer.1938810762 |
| Short name | T1021 |
| Test name | |
| Test status | |
| Simulation time | 173816034 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:06:18 AM UTC 24 |
| Finished | Sep 24 09:06:21 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1938810762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_av_buffer.1938810762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_bitstuff_err.64356975 |
| Short name | T1130 |
| Test name | |
| Test status | |
| Simulation time | 148521789 ps |
| CPU time | 1.35 seconds |
| Started | Sep 24 09:06:18 AM UTC 24 |
| Finished | Sep 24 09:06:21 AM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=64356975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_bitstuff_err.64356975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_clear.754406457 |
| Short name | T1193 |
| Test name | |
| Test status | |
| Simulation time | 297417380 ps |
| CPU time | 1.94 seconds |
| Started | Sep 24 09:06:18 AM UTC 24 |
| Finished | Sep 24 09:06:21 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=754406457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_data_toggle_clear.754406457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_restore.1662079220 |
| Short name | T446 |
| Test name | |
| Test status | |
| Simulation time | 1156689175 ps |
| CPU time | 5.52 seconds |
| Started | Sep 24 09:06:25 AM UTC 24 |
| Finished | Sep 24 09:06:32 AM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1662079220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_data_toggle_restore.1662079220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_device_address.768132517 |
| Short name | T535 |
| Test name | |
| Test status | |
| Simulation time | 20607332283 ps |
| CPU time | 36.57 seconds |
| Started | Sep 24 09:06:25 AM UTC 24 |
| Finished | Sep 24 09:07:03 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=768132517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_device_address.768132517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_device_timeout.769418024 |
| Short name | T1231 |
| Test name | |
| Test status | |
| Simulation time | 1999030614 ps |
| CPU time | 17.46 seconds |
| Started | Sep 24 09:06:25 AM UTC 24 |
| Finished | Sep 24 09:06:44 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=769418024 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_timeout.769418024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_disable_endpoint.4105219105 |
| Short name | T1205 |
| Test name | |
| Test status | |
| Simulation time | 1009085843 ps |
| CPU time | 3.62 seconds |
| Started | Sep 24 09:06:25 AM UTC 24 |
| Finished | Sep 24 09:06:30 AM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4105219105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_disable_endpoint.4105219105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_disconnected.3968998721 |
| Short name | T1200 |
| Test name | |
| Test status | |
| Simulation time | 182340904 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:06:25 AM UTC 24 |
| Finished | Sep 24 09:06:27 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3968998721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_disconnected.3968998721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_enable.288854895 |
| Short name | T1199 |
| Test name | |
| Test status | |
| Simulation time | 52460829 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:06:25 AM UTC 24 |
| Finished | Sep 24 09:06:27 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=288854895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_enable.288854895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_access.3810132641 |
| Short name | T1207 |
| Test name | |
| Test status | |
| Simulation time | 784748469 ps |
| CPU time | 4.28 seconds |
| Started | Sep 24 09:06:25 AM UTC 24 |
| Finished | Sep 24 09:06:31 AM UTC 24 |
| Peak memory | 217920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3810132641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_access.3810132641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_types.1595095255 |
| Short name | T513 |
| Test name | |
| Test status | |
| Simulation time | 561034690 ps |
| CPU time | 2.91 seconds |
| Started | Sep 24 09:06:25 AM UTC 24 |
| Finished | Sep 24 09:06:29 AM UTC 24 |
| Peak memory | 217708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1595095255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_types.1595095255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_levels.237129210 |
| Short name | T373 |
| Test name | |
| Test status | |
| Simulation time | 289303392 ps |
| CPU time | 2.05 seconds |
| Started | Sep 24 09:06:25 AM UTC 24 |
| Finished | Sep 24 09:06:28 AM UTC 24 |
| Peak memory | 217688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=237129210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_fifo_levels.237129210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_rst.2801771548 |
| Short name | T1204 |
| Test name | |
| Test status | |
| Simulation time | 302723767 ps |
| CPU time | 2.44 seconds |
| Started | Sep 24 09:06:25 AM UTC 24 |
| Finished | Sep 24 09:06:29 AM UTC 24 |
| Peak memory | 218284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2801771548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_fifo_rst.2801771548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_in_iso.1096354337 |
| Short name | T1209 |
| Test name | |
| Test status | |
| Simulation time | 202546306 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 09:06:28 AM UTC 24 |
| Finished | Sep 24 09:06:31 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1096354337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_in_iso.1096354337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_in_stall.488655804 |
| Short name | T1208 |
| Test name | |
| Test status | |
| Simulation time | 146616950 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:06:28 AM UTC 24 |
| Finished | Sep 24 09:06:31 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=488655804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_in_stall.488655804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_in_trans.3449950936 |
| Short name | T1210 |
| Test name | |
| Test status | |
| Simulation time | 188061285 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:06:29 AM UTC 24 |
| Finished | Sep 24 09:06:31 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3449950936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_trans.3449950936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_invalid_sync.2417521676 |
| Short name | T1276 |
| Test name | |
| Test status | |
| Simulation time | 5309721200 ps |
| CPU time | 43.85 seconds |
| Started | Sep 24 09:06:28 AM UTC 24 |
| Finished | Sep 24 09:07:14 AM UTC 24 |
| Peak memory | 234944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2417521676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 13.usbdev_invalid_sync.2417521676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_iso_retraction.2023648424 |
| Short name | T1364 |
| Test name | |
| Test status | |
| Simulation time | 9147117323 ps |
| CPU time | 101.81 seconds |
| Started | Sep 24 09:06:29 AM UTC 24 |
| Finished | Sep 24 09:08:13 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2023648424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_iso_retraction.2023648424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_link_in_err.1557938470 |
| Short name | T1211 |
| Test name | |
| Test status | |
| Simulation time | 185643928 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:06:29 AM UTC 24 |
| Finished | Sep 24 09:06:31 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1557938470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_in_err.1557938470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_link_resume.3136589016 |
| Short name | T1289 |
| Test name | |
| Test status | |
| Simulation time | 31848507760 ps |
| CPU time | 53.29 seconds |
| Started | Sep 24 09:06:29 AM UTC 24 |
| Finished | Sep 24 09:07:24 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3136589016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_resume.3136589016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_link_suspend.1594156995 |
| Short name | T1238 |
| Test name | |
| Test status | |
| Simulation time | 9724801472 ps |
| CPU time | 17.16 seconds |
| Started | Sep 24 09:06:29 AM UTC 24 |
| Finished | Sep 24 09:06:47 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1594156995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_link_suspend.1594156995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_low_speed_traffic.4252487207 |
| Short name | T1192 |
| Test name | |
| Test status | |
| Simulation time | 2990993694 ps |
| CPU time | 29.53 seconds |
| Started | Sep 24 09:06:34 AM UTC 24 |
| Finished | Sep 24 09:07:05 AM UTC 24 |
| Peak memory | 235004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4252487207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_low_speed_traffic.4252487207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_max_inter_pkt_delay.3104050679 |
| Short name | T1407 |
| Test name | |
| Test status | |
| Simulation time | 4020560129 ps |
| CPU time | 121.36 seconds |
| Started | Sep 24 09:06:34 AM UTC 24 |
| Finished | Sep 24 09:08:38 AM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3104050679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_inter_pkt_delay.3104050679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_in_transaction.738254295 |
| Short name | T1217 |
| Test name | |
| Test status | |
| Simulation time | 255915414 ps |
| CPU time | 1.89 seconds |
| Started | Sep 24 09:06:34 AM UTC 24 |
| Finished | Sep 24 09:06:37 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=738254295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_in_transaction.738254295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_out_transaction.3107205156 |
| Short name | T1215 |
| Test name | |
| Test status | |
| Simulation time | 199475620 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:06:34 AM UTC 24 |
| Finished | Sep 24 09:06:37 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3107205156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_out_transaction.3107205156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_max_non_iso_usb_traffic.3483567259 |
| Short name | T1341 |
| Test name | |
| Test status | |
| Simulation time | 3152791997 ps |
| CPU time | 79.71 seconds |
| Started | Sep 24 09:06:34 AM UTC 24 |
| Finished | Sep 24 09:07:56 AM UTC 24 |
| Peak memory | 235140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3483567259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_non_iso_usb_traffic.3483567259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_max_usb_traffic.505736370 |
| Short name | T1354 |
| Test name | |
| Test status | |
| Simulation time | 3229867654 ps |
| CPU time | 92.23 seconds |
| Started | Sep 24 09:06:34 AM UTC 24 |
| Finished | Sep 24 09:08:08 AM UTC 24 |
| Peak memory | 234820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=505736370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_usb_traffic.505736370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_min_inter_pkt_delay.3816779162 |
| Short name | T1325 |
| Test name | |
| Test status | |
| Simulation time | 2559971079 ps |
| CPU time | 71.97 seconds |
| Started | Sep 24 09:06:34 AM UTC 24 |
| Finished | Sep 24 09:07:48 AM UTC 24 |
| Peak memory | 228460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3816779162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_inter_pkt_delay.3816779162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_in_transaction.903145321 |
| Short name | T1213 |
| Test name | |
| Test status | |
| Simulation time | 153771118 ps |
| CPU time | 1.16 seconds |
| Started | Sep 24 09:06:34 AM UTC 24 |
| Finished | Sep 24 09:06:36 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=903145321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_in_transaction.903145321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_out_transaction.2487990081 |
| Short name | T1218 |
| Test name | |
| Test status | |
| Simulation time | 180792573 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:06:34 AM UTC 24 |
| Finished | Sep 24 09:06:37 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2487990081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_out_transaction.2487990081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_out_iso.3818880117 |
| Short name | T1216 |
| Test name | |
| Test status | |
| Simulation time | 201123951 ps |
| CPU time | 1.35 seconds |
| Started | Sep 24 09:06:34 AM UTC 24 |
| Finished | Sep 24 09:06:37 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3818880117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_out_iso.3818880117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_out_stall.3648217136 |
| Short name | T1219 |
| Test name | |
| Test status | |
| Simulation time | 156392087 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 09:06:34 AM UTC 24 |
| Finished | Sep 24 09:06:37 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3648217136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_out_stall.3648217136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_out_trans_nak.221366761 |
| Short name | T1220 |
| Test name | |
| Test status | |
| Simulation time | 166758051 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:06:34 AM UTC 24 |
| Finished | Sep 24 09:06:37 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=221366761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_out_trans_nak.221366761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_pending_in_trans.3544243981 |
| Short name | T1222 |
| Test name | |
| Test status | |
| Simulation time | 211471256 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 09:06:36 AM UTC 24 |
| Finished | Sep 24 09:06:39 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3544243981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_pending_in_trans.3544243981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_pinflip.1357324495 |
| Short name | T1223 |
| Test name | |
| Test status | |
| Simulation time | 215380494 ps |
| CPU time | 1.78 seconds |
| Started | Sep 24 09:06:36 AM UTC 24 |
| Finished | Sep 24 09:06:39 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1357324495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_pinflip.1357324495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_usb_ref_disable.2098304625 |
| Short name | T1227 |
| Test name | |
| Test status | |
| Simulation time | 156405426 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:06:41 AM UTC 24 |
| Finished | Sep 24 09:06:43 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2098304625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_usb_ref_disable.2098304625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_phy_pins_sense.2706505052 |
| Short name | T1226 |
| Test name | |
| Test status | |
| Simulation time | 46385840 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:06:41 AM UTC 24 |
| Finished | Sep 24 09:06:43 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2706505052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_pins_sense.2706505052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_buffer.2183365139 |
| Short name | T1309 |
| Test name | |
| Test status | |
| Simulation time | 19406330693 ps |
| CPU time | 53.72 seconds |
| Started | Sep 24 09:06:41 AM UTC 24 |
| Finished | Sep 24 09:07:36 AM UTC 24 |
| Peak memory | 228128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2183365139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_pkt_buffer.2183365139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_received.3557550934 |
| Short name | T1229 |
| Test name | |
| Test status | |
| Simulation time | 182817816 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:06:41 AM UTC 24 |
| Finished | Sep 24 09:06:44 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3557550934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_pkt_received.3557550934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_sent.1631740864 |
| Short name | T1230 |
| Test name | |
| Test status | |
| Simulation time | 202171144 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:06:41 AM UTC 24 |
| Finished | Sep 24 09:06:44 AM UTC 24 |
| Peak memory | 215468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1631740864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_pkt_sent.1631740864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_in_transaction.2317435368 |
| Short name | T1234 |
| Test name | |
| Test status | |
| Simulation time | 233547872 ps |
| CPU time | 1.63 seconds |
| Started | Sep 24 09:06:41 AM UTC 24 |
| Finished | Sep 24 09:06:44 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2317435368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_random_length_in_transaction.2317435368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_out_transaction.1584265002 |
| Short name | T1232 |
| Test name | |
| Test status | |
| Simulation time | 164269641 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:06:41 AM UTC 24 |
| Finished | Sep 24 09:06:44 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1584265002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_random_length_out_transaction.1584265002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_resume_link_active.1421409649 |
| Short name | T1275 |
| Test name | |
| Test status | |
| Simulation time | 20166675631 ps |
| CPU time | 30.7 seconds |
| Started | Sep 24 09:06:41 AM UTC 24 |
| Finished | Sep 24 09:07:13 AM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1421409649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 13.usbdev_resume_link_active.1421409649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_rx_crc_err.3986417067 |
| Short name | T1233 |
| Test name | |
| Test status | |
| Simulation time | 170121504 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:06:41 AM UTC 24 |
| Finished | Sep 24 09:06:44 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3986417067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_rx_crc_err.3986417067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_rx_full.978196591 |
| Short name | T1235 |
| Test name | |
| Test status | |
| Simulation time | 266448546 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:06:41 AM UTC 24 |
| Finished | Sep 24 09:06:44 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=978196591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 13.usbdev_rx_full.978196591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_setup_stage.1469218897 |
| Short name | T1228 |
| Test name | |
| Test status | |
| Simulation time | 147916679 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:06:41 AM UTC 24 |
| Finished | Sep 24 09:06:44 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1469218897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_setup_stage.1469218897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_setup_trans_ignored.2987659164 |
| Short name | T1239 |
| Test name | |
| Test status | |
| Simulation time | 154599477 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:06:46 AM UTC 24 |
| Finished | Sep 24 09:06:49 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2987659164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 13.usbdev_setup_trans_ignored.2987659164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_smoke.4281116337 |
| Short name | T1244 |
| Test name | |
| Test status | |
| Simulation time | 210416018 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 09:06:46 AM UTC 24 |
| Finished | Sep 24 09:06:50 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4281116337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_smoke.4281116337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_spurious_pids_ignored.1018693718 |
| Short name | T1380 |
| Test name | |
| Test status | |
| Simulation time | 3413237526 ps |
| CPU time | 95.58 seconds |
| Started | Sep 24 09:06:46 AM UTC 24 |
| Finished | Sep 24 09:08:24 AM UTC 24 |
| Peak memory | 234800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1018693718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_spurious_pids_ignored.1018693718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_stall_priority_over_nak.1344534055 |
| Short name | T1240 |
| Test name | |
| Test status | |
| Simulation time | 164432910 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:06:46 AM UTC 24 |
| Finished | Sep 24 09:06:49 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1344534055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stall_priority_over_nak.1344534055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_stall_trans.1950241017 |
| Short name | T1243 |
| Test name | |
| Test status | |
| Simulation time | 154862741 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:06:47 AM UTC 24 |
| Finished | Sep 24 09:06:49 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1950241017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_stall_trans.1950241017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_stream_len_max.4196500308 |
| Short name | T1247 |
| Test name | |
| Test status | |
| Simulation time | 673827012 ps |
| CPU time | 3.68 seconds |
| Started | Sep 24 09:06:47 AM UTC 24 |
| Finished | Sep 24 09:06:52 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4196500308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stream_len_max.4196500308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_streaming_out.2697705184 |
| Short name | T1272 |
| Test name | |
| Test status | |
| Simulation time | 2018374179 ps |
| CPU time | 21.38 seconds |
| Started | Sep 24 09:06:47 AM UTC 24 |
| Finished | Sep 24 09:07:10 AM UTC 24 |
| Peak memory | 234788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2697705184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_streaming_out.2697705184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_timeout_missing_host_handshake.690199021 |
| Short name | T1242 |
| Test name | |
| Test status | |
| Simulation time | 1021714037 ps |
| CPU time | 22.79 seconds |
| Started | Sep 24 09:06:25 AM UTC 24 |
| Finished | Sep 24 09:06:49 AM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=690199021 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_timeout_missing_host_handshake.690199021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/13.usbdev_tx_rx_disruption.1095222940 |
| Short name | T1245 |
| Test name | |
| Test status | |
| Simulation time | 563510044 ps |
| CPU time | 3.25 seconds |
| Started | Sep 24 09:06:47 AM UTC 24 |
| Finished | Sep 24 09:06:51 AM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1095222940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_t x_rx_disruption.1095222940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/13.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/130.usbdev_endpoint_types.1768648974 |
| Short name | T574 |
| Test name | |
| Test status | |
| Simulation time | 260173274 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:11 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1768648974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_endpoint_types.1768648974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/130.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/130.usbdev_fifo_levels.4232168673 |
| Short name | T3378 |
| Test name | |
| Test status | |
| Simulation time | 257870430 ps |
| CPU time | 1.35 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4232168673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 130.usbdev_fifo_levels.4232168673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/130.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/130.usbdev_tx_rx_disruption.1526007689 |
| Short name | T3383 |
| Test name | |
| Test status | |
| Simulation time | 646973580 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1526007689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_ tx_rx_disruption.1526007689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/130.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/131.usbdev_endpoint_types.2034380500 |
| Short name | T504 |
| Test name | |
| Test status | |
| Simulation time | 451816968 ps |
| CPU time | 1.34 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:11 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2034380500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_endpoint_types.2034380500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/131.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/131.usbdev_fifo_levels.1885552046 |
| Short name | T404 |
| Test name | |
| Test status | |
| Simulation time | 288257381 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1885552046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 131.usbdev_fifo_levels.1885552046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/131.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/131.usbdev_tx_rx_disruption.2096528634 |
| Short name | T3385 |
| Test name | |
| Test status | |
| Simulation time | 473826092 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:12 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2096528634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_ tx_rx_disruption.2096528634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/131.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/132.usbdev_endpoint_types.64301276 |
| Short name | T3372 |
| Test name | |
| Test status | |
| Simulation time | 238516035 ps |
| CPU time | 1.05 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:11 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=64301276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 132.usbdev_endpoint_types.64301276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/132.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/132.usbdev_fifo_levels.4172751588 |
| Short name | T3377 |
| Test name | |
| Test status | |
| Simulation time | 321708776 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:11 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4172751588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 132.usbdev_fifo_levels.4172751588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/132.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/132.usbdev_tx_rx_disruption.3388442220 |
| Short name | T3342 |
| Test name | |
| Test status | |
| Simulation time | 717713511 ps |
| CPU time | 1.94 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:12 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3388442220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_ tx_rx_disruption.3388442220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/132.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/133.usbdev_endpoint_types.3153948258 |
| Short name | T486 |
| Test name | |
| Test status | |
| Simulation time | 457852042 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:12 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3153948258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_endpoint_types.3153948258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/133.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/133.usbdev_fifo_levels.135807629 |
| Short name | T3374 |
| Test name | |
| Test status | |
| Simulation time | 206606521 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:11 AM UTC 24 |
| Peak memory | 215700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=135807629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 133.usbdev_fifo_levels.135807629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/133.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/133.usbdev_tx_rx_disruption.1704779371 |
| Short name | T3338 |
| Test name | |
| Test status | |
| Simulation time | 562959991 ps |
| CPU time | 1.79 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:12 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1704779371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_ tx_rx_disruption.1704779371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/133.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/134.usbdev_endpoint_types.1554673042 |
| Short name | T3376 |
| Test name | |
| Test status | |
| Simulation time | 278650080 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:11 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1554673042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_endpoint_types.1554673042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/134.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/134.usbdev_fifo_levels.3743523284 |
| Short name | T3375 |
| Test name | |
| Test status | |
| Simulation time | 160771521 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3743523284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 134.usbdev_fifo_levels.3743523284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/134.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/134.usbdev_tx_rx_disruption.2228261247 |
| Short name | T3387 |
| Test name | |
| Test status | |
| Simulation time | 518966830 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:12 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2228261247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_ tx_rx_disruption.2228261247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/134.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/135.usbdev_endpoint_types.453680015 |
| Short name | T512 |
| Test name | |
| Test status | |
| Simulation time | 669887639 ps |
| CPU time | 2.06 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:12 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=453680015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 135.usbdev_endpoint_types.453680015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/135.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/135.usbdev_fifo_levels.1268055972 |
| Short name | T3382 |
| Test name | |
| Test status | |
| Simulation time | 163398692 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1268055972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 135.usbdev_fifo_levels.1268055972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/135.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/135.usbdev_tx_rx_disruption.1671386805 |
| Short name | T3388 |
| Test name | |
| Test status | |
| Simulation time | 516128864 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:12 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1671386805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_ tx_rx_disruption.1671386805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/135.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/136.usbdev_endpoint_types.2003860389 |
| Short name | T3384 |
| Test name | |
| Test status | |
| Simulation time | 373202132 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:12 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2003860389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_endpoint_types.2003860389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/136.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/136.usbdev_fifo_levels.3335608343 |
| Short name | T3386 |
| Test name | |
| Test status | |
| Simulation time | 263550843 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:12 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3335608343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 136.usbdev_fifo_levels.3335608343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/136.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/136.usbdev_tx_rx_disruption.1785987481 |
| Short name | T3364 |
| Test name | |
| Test status | |
| Simulation time | 519616588 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:39:09 AM UTC 24 |
| Finished | Sep 24 09:39:12 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1785987481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_ tx_rx_disruption.1785987481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/136.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/137.usbdev_fifo_levels.2414271643 |
| Short name | T3340 |
| Test name | |
| Test status | |
| Simulation time | 268603889 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:39:57 AM UTC 24 |
| Finished | Sep 24 09:39:59 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2414271643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 137.usbdev_fifo_levels.2414271643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/137.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/138.usbdev_endpoint_types.1387944797 |
| Short name | T481 |
| Test name | |
| Test status | |
| Simulation time | 405775825 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:39:57 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1387944797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_endpoint_types.1387944797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/138.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/138.usbdev_tx_rx_disruption.4173568431 |
| Short name | T3399 |
| Test name | |
| Test status | |
| Simulation time | 525008346 ps |
| CPU time | 2.12 seconds |
| Started | Sep 24 09:39:57 AM UTC 24 |
| Finished | Sep 24 09:40:01 AM UTC 24 |
| Peak memory | 217712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4173568431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_ tx_rx_disruption.4173568431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/138.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/139.usbdev_endpoint_types.942263792 |
| Short name | T549 |
| Test name | |
| Test status | |
| Simulation time | 539398823 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 09:39:57 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=942263792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 139.usbdev_endpoint_types.942263792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/139.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/139.usbdev_fifo_levels.469293364 |
| Short name | T3344 |
| Test name | |
| Test status | |
| Simulation time | 160171958 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:39:57 AM UTC 24 |
| Finished | Sep 24 09:39:59 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=469293364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 139.usbdev_fifo_levels.469293364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/139.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/139.usbdev_tx_rx_disruption.1254953763 |
| Short name | T3391 |
| Test name | |
| Test status | |
| Simulation time | 576838130 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:39:57 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1254953763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_ tx_rx_disruption.1254953763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/139.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_alert_test.3304608859 |
| Short name | T1291 |
| Test name | |
| Test status | |
| Simulation time | 83261677 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:07:22 AM UTC 24 |
| Finished | Sep 24 09:07:24 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3304608859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 14.usbdev_alert_test.3304608859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_disconnect.3547565959 |
| Short name | T234 |
| Test name | |
| Test status | |
| Simulation time | 5626552600 ps |
| CPU time | 8.15 seconds |
| Started | Sep 24 09:06:47 AM UTC 24 |
| Finished | Sep 24 09:06:57 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3547565959 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_disconnect.3547565959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_reset.3136156546 |
| Short name | T1277 |
| Test name | |
| Test status | |
| Simulation time | 19603726326 ps |
| CPU time | 28.15 seconds |
| Started | Sep 24 09:06:47 AM UTC 24 |
| Finished | Sep 24 09:07:17 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3136156546 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_reset.3136156546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_resume.438929317 |
| Short name | T1300 |
| Test name | |
| Test status | |
| Simulation time | 26323228121 ps |
| CPU time | 36.54 seconds |
| Started | Sep 24 09:06:52 AM UTC 24 |
| Finished | Sep 24 09:07:30 AM UTC 24 |
| Peak memory | 228092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=438929317 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_resume.438929317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_av_buffer.1148876075 |
| Short name | T1250 |
| Test name | |
| Test status | |
| Simulation time | 188346375 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:06:52 AM UTC 24 |
| Finished | Sep 24 09:06:55 AM UTC 24 |
| Peak memory | 215336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1148876075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_av_buffer.1148876075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_bitstuff_err.2657362432 |
| Short name | T1248 |
| Test name | |
| Test status | |
| Simulation time | 175291052 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:06:52 AM UTC 24 |
| Finished | Sep 24 09:06:54 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2657362432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_bitstuff_err.2657362432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_clear.2714003304 |
| Short name | T1249 |
| Test name | |
| Test status | |
| Simulation time | 175352762 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:06:52 AM UTC 24 |
| Finished | Sep 24 09:06:55 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2714003304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 14.usbdev_data_toggle_clear.2714003304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_restore.3150077488 |
| Short name | T1253 |
| Test name | |
| Test status | |
| Simulation time | 557394365 ps |
| CPU time | 2.99 seconds |
| Started | Sep 24 09:06:52 AM UTC 24 |
| Finished | Sep 24 09:06:56 AM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3150077488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_data_toggle_restore.3150077488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_device_address.1366361805 |
| Short name | T427 |
| Test name | |
| Test status | |
| Simulation time | 34991917053 ps |
| CPU time | 73.85 seconds |
| Started | Sep 24 09:06:52 AM UTC 24 |
| Finished | Sep 24 09:08:08 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1366361805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_address.1366361805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_disable_endpoint.1980777249 |
| Short name | T1252 |
| Test name | |
| Test status | |
| Simulation time | 596552049 ps |
| CPU time | 2.4 seconds |
| Started | Sep 24 09:06:52 AM UTC 24 |
| Finished | Sep 24 09:06:56 AM UTC 24 |
| Peak memory | 217700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1980777249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_disable_endpoint.1980777249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_disconnected.3526269157 |
| Short name | T1251 |
| Test name | |
| Test status | |
| Simulation time | 211573313 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:06:52 AM UTC 24 |
| Finished | Sep 24 09:06:55 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3526269157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_disconnected.3526269157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_enable.4276113887 |
| Short name | T1256 |
| Test name | |
| Test status | |
| Simulation time | 47770131 ps |
| CPU time | 1.14 seconds |
| Started | Sep 24 09:06:57 AM UTC 24 |
| Finished | Sep 24 09:06:59 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4276113887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 14.usbdev_enable.4276113887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_access.3198590337 |
| Short name | T1261 |
| Test name | |
| Test status | |
| Simulation time | 914911064 ps |
| CPU time | 4.54 seconds |
| Started | Sep 24 09:06:57 AM UTC 24 |
| Finished | Sep 24 09:07:03 AM UTC 24 |
| Peak memory | 218420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3198590337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_access.3198590337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_types.2258557585 |
| Short name | T484 |
| Test name | |
| Test status | |
| Simulation time | 574656064 ps |
| CPU time | 2.97 seconds |
| Started | Sep 24 09:06:57 AM UTC 24 |
| Finished | Sep 24 09:07:01 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2258557585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_types.2258557585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_rst.4164644590 |
| Short name | T1259 |
| Test name | |
| Test status | |
| Simulation time | 198408766 ps |
| CPU time | 2.38 seconds |
| Started | Sep 24 09:06:57 AM UTC 24 |
| Finished | Sep 24 09:07:01 AM UTC 24 |
| Peak memory | 218348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4164644590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_fifo_rst.4164644590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_in_iso.820941526 |
| Short name | T1258 |
| Test name | |
| Test status | |
| Simulation time | 220189295 ps |
| CPU time | 2.15 seconds |
| Started | Sep 24 09:06:57 AM UTC 24 |
| Finished | Sep 24 09:07:01 AM UTC 24 |
| Peak memory | 228156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=820941526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_in_iso.820941526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_in_stall.2832432021 |
| Short name | T1257 |
| Test name | |
| Test status | |
| Simulation time | 170715470 ps |
| CPU time | 1.47 seconds |
| Started | Sep 24 09:06:57 AM UTC 24 |
| Finished | Sep 24 09:07:00 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2832432021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_stall.2832432021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_in_trans.287031050 |
| Short name | T1262 |
| Test name | |
| Test status | |
| Simulation time | 186167875 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:07:02 AM UTC 24 |
| Finished | Sep 24 09:07:05 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=287031050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_in_trans.287031050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_invalid_sync.1701702843 |
| Short name | T1408 |
| Test name | |
| Test status | |
| Simulation time | 3861230909 ps |
| CPU time | 99.66 seconds |
| Started | Sep 24 09:06:57 AM UTC 24 |
| Finished | Sep 24 09:08:39 AM UTC 24 |
| Peak memory | 228616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1701702843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 14.usbdev_invalid_sync.1701702843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_link_in_err.3236301020 |
| Short name | T1264 |
| Test name | |
| Test status | |
| Simulation time | 249824675 ps |
| CPU time | 2.01 seconds |
| Started | Sep 24 09:07:02 AM UTC 24 |
| Finished | Sep 24 09:07:05 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3236301020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_in_err.3236301020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_link_resume.1527451550 |
| Short name | T1340 |
| Test name | |
| Test status | |
| Simulation time | 29658323907 ps |
| CPU time | 51.66 seconds |
| Started | Sep 24 09:07:02 AM UTC 24 |
| Finished | Sep 24 09:07:55 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1527451550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_resume.1527451550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_link_suspend.3983899217 |
| Short name | T1283 |
| Test name | |
| Test status | |
| Simulation time | 3835331195 ps |
| CPU time | 15.15 seconds |
| Started | Sep 24 09:07:02 AM UTC 24 |
| Finished | Sep 24 09:07:19 AM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3983899217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_link_suspend.3983899217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_low_speed_traffic.1578557724 |
| Short name | T1295 |
| Test name | |
| Test status | |
| Simulation time | 2817794506 ps |
| CPU time | 21.45 seconds |
| Started | Sep 24 09:07:02 AM UTC 24 |
| Finished | Sep 24 09:07:25 AM UTC 24 |
| Peak memory | 230404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1578557724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_low_speed_traffic.1578557724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_max_inter_pkt_delay.1318270480 |
| Short name | T1301 |
| Test name | |
| Test status | |
| Simulation time | 2704694832 ps |
| CPU time | 26.83 seconds |
| Started | Sep 24 09:07:03 AM UTC 24 |
| Finished | Sep 24 09:07:31 AM UTC 24 |
| Peak memory | 228656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1318270480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_inter_pkt_delay.1318270480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_in_transaction.1803361515 |
| Short name | T1265 |
| Test name | |
| Test status | |
| Simulation time | 288374472 ps |
| CPU time | 1.84 seconds |
| Started | Sep 24 09:07:03 AM UTC 24 |
| Finished | Sep 24 09:07:05 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1803361515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_in_transaction.1803361515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_out_transaction.2262145325 |
| Short name | T1263 |
| Test name | |
| Test status | |
| Simulation time | 198418320 ps |
| CPU time | 1.63 seconds |
| Started | Sep 24 09:07:03 AM UTC 24 |
| Finished | Sep 24 09:07:05 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2262145325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_out_transaction.2262145325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_max_non_iso_usb_traffic.1354373714 |
| Short name | T1391 |
| Test name | |
| Test status | |
| Simulation time | 3015589965 ps |
| CPU time | 82.91 seconds |
| Started | Sep 24 09:07:03 AM UTC 24 |
| Finished | Sep 24 09:08:28 AM UTC 24 |
| Peak memory | 228460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1354373714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_non_iso_usb_traffic.1354373714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_max_usb_traffic.442018071 |
| Short name | T1316 |
| Test name | |
| Test status | |
| Simulation time | 2577461459 ps |
| CPU time | 38.34 seconds |
| Started | Sep 24 09:07:03 AM UTC 24 |
| Finished | Sep 24 09:07:43 AM UTC 24 |
| Peak memory | 230724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=442018071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_usb_traffic.442018071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_min_inter_pkt_delay.2632018310 |
| Short name | T1319 |
| Test name | |
| Test status | |
| Simulation time | 3567880337 ps |
| CPU time | 38.45 seconds |
| Started | Sep 24 09:07:07 AM UTC 24 |
| Finished | Sep 24 09:07:46 AM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2632018310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_inter_pkt_delay.2632018310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_in_transaction.177722320 |
| Short name | T1266 |
| Test name | |
| Test status | |
| Simulation time | 182344898 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:07:07 AM UTC 24 |
| Finished | Sep 24 09:07:09 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=177722320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_in_transaction.177722320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_out_transaction.640424526 |
| Short name | T1267 |
| Test name | |
| Test status | |
| Simulation time | 175635799 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:07:07 AM UTC 24 |
| Finished | Sep 24 09:07:09 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=640424526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 14.usbdev_min_length_out_transaction.640424526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_nak_trans.884588596 |
| Short name | T147 |
| Test name | |
| Test status | |
| Simulation time | 195154446 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:07:07 AM UTC 24 |
| Finished | Sep 24 09:07:09 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=884588596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_nak_trans.884588596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_out_iso.2833632987 |
| Short name | T1271 |
| Test name | |
| Test status | |
| Simulation time | 206040459 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:07:07 AM UTC 24 |
| Finished | Sep 24 09:07:09 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2833632987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_out_iso.2833632987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_out_stall.1882044276 |
| Short name | T1270 |
| Test name | |
| Test status | |
| Simulation time | 192038508 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:07:07 AM UTC 24 |
| Finished | Sep 24 09:07:09 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1882044276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_out_stall.1882044276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_out_trans_nak.2284369575 |
| Short name | T1269 |
| Test name | |
| Test status | |
| Simulation time | 171755236 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 09:07:07 AM UTC 24 |
| Finished | Sep 24 09:07:09 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2284369575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_out_trans_nak.2284369575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_pending_in_trans.4035749094 |
| Short name | T1268 |
| Test name | |
| Test status | |
| Simulation time | 178710614 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 09:07:07 AM UTC 24 |
| Finished | Sep 24 09:07:09 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4035749094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_pending_in_trans.4035749094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_pinflip.3733277815 |
| Short name | T1274 |
| Test name | |
| Test status | |
| Simulation time | 216913075 ps |
| CPU time | 1.94 seconds |
| Started | Sep 24 09:07:09 AM UTC 24 |
| Finished | Sep 24 09:07:12 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3733277815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_pinflip.3733277815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_usb_ref_disable.2058684042 |
| Short name | T1273 |
| Test name | |
| Test status | |
| Simulation time | 138367978 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:07:09 AM UTC 24 |
| Finished | Sep 24 09:07:12 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2058684042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_usb_ref_disable.2058684042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_buffer.829146089 |
| Short name | T1353 |
| Test name | |
| Test status | |
| Simulation time | 15776347023 ps |
| CPU time | 50.55 seconds |
| Started | Sep 24 09:07:16 AM UTC 24 |
| Finished | Sep 24 09:08:08 AM UTC 24 |
| Peak memory | 231860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=829146089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_pkt_buffer.829146089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_received.3114428719 |
| Short name | T1279 |
| Test name | |
| Test status | |
| Simulation time | 149430435 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 09:07:16 AM UTC 24 |
| Finished | Sep 24 09:07:18 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3114428719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_pkt_received.3114428719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_sent.2753525210 |
| Short name | T1284 |
| Test name | |
| Test status | |
| Simulation time | 247580940 ps |
| CPU time | 2.01 seconds |
| Started | Sep 24 09:07:16 AM UTC 24 |
| Finished | Sep 24 09:07:19 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2753525210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_pkt_sent.2753525210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_in_transaction.23009902 |
| Short name | T1281 |
| Test name | |
| Test status | |
| Simulation time | 237622641 ps |
| CPU time | 1.78 seconds |
| Started | Sep 24 09:07:16 AM UTC 24 |
| Finished | Sep 24 09:07:19 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=23009902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_random_length_in_transaction.23009902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_out_transaction.3089022038 |
| Short name | T1280 |
| Test name | |
| Test status | |
| Simulation time | 156137536 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:07:16 AM UTC 24 |
| Finished | Sep 24 09:07:19 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3089022038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_random_length_out_transaction.3089022038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_resume_link_active.3378062937 |
| Short name | T1342 |
| Test name | |
| Test status | |
| Simulation time | 20167011796 ps |
| CPU time | 41.72 seconds |
| Started | Sep 24 09:07:16 AM UTC 24 |
| Finished | Sep 24 09:07:59 AM UTC 24 |
| Peak memory | 217896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3378062937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 14.usbdev_resume_link_active.3378062937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_rx_crc_err.1728116747 |
| Short name | T301 |
| Test name | |
| Test status | |
| Simulation time | 157333643 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:07:16 AM UTC 24 |
| Finished | Sep 24 09:07:19 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1728116747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_rx_crc_err.1728116747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_rx_full.3443583241 |
| Short name | T1286 |
| Test name | |
| Test status | |
| Simulation time | 324254319 ps |
| CPU time | 2.22 seconds |
| Started | Sep 24 09:07:16 AM UTC 24 |
| Finished | Sep 24 09:07:20 AM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3443583241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_rx_full.3443583241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_setup_stage.31327799 |
| Short name | T1282 |
| Test name | |
| Test status | |
| Simulation time | 148988161 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:07:16 AM UTC 24 |
| Finished | Sep 24 09:07:19 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=31327799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_setup_stage.31327799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_setup_trans_ignored.414223792 |
| Short name | T1293 |
| Test name | |
| Test status | |
| Simulation time | 153091572 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:07:22 AM UTC 24 |
| Finished | Sep 24 09:07:25 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=414223792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 14.usbdev_setup_trans_ignored.414223792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_smoke.905718581 |
| Short name | T1296 |
| Test name | |
| Test status | |
| Simulation time | 227913622 ps |
| CPU time | 2.01 seconds |
| Started | Sep 24 09:07:22 AM UTC 24 |
| Finished | Sep 24 09:07:25 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=905718581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_smoke.905718581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_spurious_pids_ignored.400629875 |
| Short name | T1318 |
| Test name | |
| Test status | |
| Simulation time | 1662927674 ps |
| CPU time | 21.86 seconds |
| Started | Sep 24 09:07:22 AM UTC 24 |
| Finished | Sep 24 09:07:45 AM UTC 24 |
| Peak memory | 234764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=400629875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_spurious_pids_ignored.400629875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_stall_priority_over_nak.1123849120 |
| Short name | T1294 |
| Test name | |
| Test status | |
| Simulation time | 171849466 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:07:22 AM UTC 24 |
| Finished | Sep 24 09:07:25 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1123849120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stall_priority_over_nak.1123849120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_stall_trans.3604281313 |
| Short name | T1292 |
| Test name | |
| Test status | |
| Simulation time | 168473558 ps |
| CPU time | 1.3 seconds |
| Started | Sep 24 09:07:22 AM UTC 24 |
| Finished | Sep 24 09:07:24 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3604281313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_stall_trans.3604281313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_stream_len_max.2472737325 |
| Short name | T1297 |
| Test name | |
| Test status | |
| Simulation time | 317132774 ps |
| CPU time | 2.31 seconds |
| Started | Sep 24 09:07:22 AM UTC 24 |
| Finished | Sep 24 09:07:26 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2472737325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stream_len_max.2472737325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_streaming_out.1884613342 |
| Short name | T1326 |
| Test name | |
| Test status | |
| Simulation time | 2993603917 ps |
| CPU time | 24.55 seconds |
| Started | Sep 24 09:07:22 AM UTC 24 |
| Finished | Sep 24 09:07:48 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1884613342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_streaming_out.1884613342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_timeout_missing_host_handshake.493895272 |
| Short name | T1288 |
| Test name | |
| Test status | |
| Simulation time | 1155609072 ps |
| CPU time | 29.73 seconds |
| Started | Sep 24 09:06:52 AM UTC 24 |
| Finished | Sep 24 09:07:23 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=493895272 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_timeout_missing_host_handshake.493895272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/14.usbdev_tx_rx_disruption.1713378489 |
| Short name | T1298 |
| Test name | |
| Test status | |
| Simulation time | 579223301 ps |
| CPU time | 3.24 seconds |
| Started | Sep 24 09:07:22 AM UTC 24 |
| Finished | Sep 24 09:07:27 AM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1713378489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_t x_rx_disruption.1713378489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/14.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/140.usbdev_fifo_levels.3923958841 |
| Short name | T353 |
| Test name | |
| Test status | |
| Simulation time | 300273149 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:39:57 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3923958841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 140.usbdev_fifo_levels.3923958841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/140.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/140.usbdev_tx_rx_disruption.1479054339 |
| Short name | T3392 |
| Test name | |
| Test status | |
| Simulation time | 468819628 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1479054339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_ tx_rx_disruption.1479054339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/140.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/141.usbdev_endpoint_types.2935582810 |
| Short name | T2730 |
| Test name | |
| Test status | |
| Simulation time | 301570587 ps |
| CPU time | 1.12 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2935582810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_endpoint_types.2935582810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/141.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/141.usbdev_fifo_levels.807698916 |
| Short name | T395 |
| Test name | |
| Test status | |
| Simulation time | 256295395 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=807698916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 141.usbdev_fifo_levels.807698916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/141.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/141.usbdev_tx_rx_disruption.3598193259 |
| Short name | T3400 |
| Test name | |
| Test status | |
| Simulation time | 503124180 ps |
| CPU time | 1.9 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:01 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3598193259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_ tx_rx_disruption.3598193259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/141.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/142.usbdev_endpoint_types.827475722 |
| Short name | T578 |
| Test name | |
| Test status | |
| Simulation time | 515944889 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=827475722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 142.usbdev_endpoint_types.827475722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/142.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/142.usbdev_tx_rx_disruption.2558159649 |
| Short name | T3396 |
| Test name | |
| Test status | |
| Simulation time | 445571773 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2558159649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_ tx_rx_disruption.2558159649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/142.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/143.usbdev_fifo_levels.435359427 |
| Short name | T2620 |
| Test name | |
| Test status | |
| Simulation time | 184463092 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=435359427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 143.usbdev_fifo_levels.435359427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/143.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/143.usbdev_tx_rx_disruption.3131785678 |
| Short name | T3405 |
| Test name | |
| Test status | |
| Simulation time | 542536666 ps |
| CPU time | 1.94 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:01 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3131785678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_ tx_rx_disruption.3131785678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/143.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/144.usbdev_endpoint_types.4100557245 |
| Short name | T510 |
| Test name | |
| Test status | |
| Simulation time | 470463935 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:01 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4100557245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_endpoint_types.4100557245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/144.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/144.usbdev_fifo_levels.209463380 |
| Short name | T3398 |
| Test name | |
| Test status | |
| Simulation time | 268768804 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:01 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=209463380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 144.usbdev_fifo_levels.209463380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/144.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/144.usbdev_tx_rx_disruption.2349734331 |
| Short name | T3401 |
| Test name | |
| Test status | |
| Simulation time | 463592328 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:01 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2349734331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_ tx_rx_disruption.2349734331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/144.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/145.usbdev_fifo_levels.1099301664 |
| Short name | T3390 |
| Test name | |
| Test status | |
| Simulation time | 183670782 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1099301664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 145.usbdev_fifo_levels.1099301664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/145.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/145.usbdev_tx_rx_disruption.2555516029 |
| Short name | T3402 |
| Test name | |
| Test status | |
| Simulation time | 502886858 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:01 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2555516029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_ tx_rx_disruption.2555516029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/145.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/146.usbdev_tx_rx_disruption.1672211113 |
| Short name | T3404 |
| Test name | |
| Test status | |
| Simulation time | 522941803 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:01 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1672211113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_ tx_rx_disruption.1672211113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/146.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/147.usbdev_endpoint_types.1494755823 |
| Short name | T565 |
| Test name | |
| Test status | |
| Simulation time | 601216959 ps |
| CPU time | 1.78 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:01 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1494755823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_endpoint_types.1494755823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/147.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/147.usbdev_fifo_levels.3240183535 |
| Short name | T3394 |
| Test name | |
| Test status | |
| Simulation time | 150393260 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3240183535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 147.usbdev_fifo_levels.3240183535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/147.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/147.usbdev_tx_rx_disruption.1370380217 |
| Short name | T3407 |
| Test name | |
| Test status | |
| Simulation time | 492031133 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:01 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1370380217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_ tx_rx_disruption.1370380217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/147.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/148.usbdev_endpoint_types.4127595353 |
| Short name | T588 |
| Test name | |
| Test status | |
| Simulation time | 208353398 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4127595353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_endpoint_types.4127595353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/148.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/148.usbdev_tx_rx_disruption.4214314017 |
| Short name | T3406 |
| Test name | |
| Test status | |
| Simulation time | 505738962 ps |
| CPU time | 1.47 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:01 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4214314017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_ tx_rx_disruption.4214314017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/148.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/149.usbdev_endpoint_types.1274960723 |
| Short name | T3397 |
| Test name | |
| Test status | |
| Simulation time | 189935963 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1274960723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_endpoint_types.1274960723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/149.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/149.usbdev_fifo_levels.1561330740 |
| Short name | T3393 |
| Test name | |
| Test status | |
| Simulation time | 182489926 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1561330740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 149.usbdev_fifo_levels.1561330740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/149.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/149.usbdev_tx_rx_disruption.2773251334 |
| Short name | T3409 |
| Test name | |
| Test status | |
| Simulation time | 632057616 ps |
| CPU time | 1.8 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:01 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2773251334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_ tx_rx_disruption.2773251334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/149.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_alert_test.37863725 |
| Short name | T1357 |
| Test name | |
| Test status | |
| Simulation time | 51841974 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:08:07 AM UTC 24 |
| Finished | Sep 24 09:08:09 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=37863725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_alert_test.37863725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_disconnect.2220840004 |
| Short name | T1310 |
| Test name | |
| Test status | |
| Simulation time | 5905902415 ps |
| CPU time | 13.04 seconds |
| Started | Sep 24 09:07:23 AM UTC 24 |
| Finished | Sep 24 09:07:37 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2220840004 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_disconnect.2220840004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_reset.1972854558 |
| Short name | T1348 |
| Test name | |
| Test status | |
| Simulation time | 18887643887 ps |
| CPU time | 30.95 seconds |
| Started | Sep 24 09:07:29 AM UTC 24 |
| Finished | Sep 24 09:08:02 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1972854558 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_reset.1972854558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_resume.911966426 |
| Short name | T1376 |
| Test name | |
| Test status | |
| Simulation time | 24678575397 ps |
| CPU time | 48.1 seconds |
| Started | Sep 24 09:07:29 AM UTC 24 |
| Finished | Sep 24 09:08:19 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=911966426 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_resume.911966426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_av_buffer.3017954132 |
| Short name | T1302 |
| Test name | |
| Test status | |
| Simulation time | 149917021 ps |
| CPU time | 1.31 seconds |
| Started | Sep 24 09:07:29 AM UTC 24 |
| Finished | Sep 24 09:07:32 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3017954132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_av_buffer.3017954132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_bitstuff_err.3422200921 |
| Short name | T1303 |
| Test name | |
| Test status | |
| Simulation time | 153882041 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 09:07:29 AM UTC 24 |
| Finished | Sep 24 09:07:32 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3422200921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_bitstuff_err.3422200921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_clear.3066659497 |
| Short name | T1307 |
| Test name | |
| Test status | |
| Simulation time | 441554029 ps |
| CPU time | 2.79 seconds |
| Started | Sep 24 09:07:30 AM UTC 24 |
| Finished | Sep 24 09:07:33 AM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3066659497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 15.usbdev_data_toggle_clear.3066659497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_restore.2422556694 |
| Short name | T442 |
| Test name | |
| Test status | |
| Simulation time | 816672079 ps |
| CPU time | 4.09 seconds |
| Started | Sep 24 09:07:30 AM UTC 24 |
| Finished | Sep 24 09:07:35 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2422556694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_restore.2422556694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_device_address.726702843 |
| Short name | T1468 |
| Test name | |
| Test status | |
| Simulation time | 48966338707 ps |
| CPU time | 98.11 seconds |
| Started | Sep 24 09:07:30 AM UTC 24 |
| Finished | Sep 24 09:09:10 AM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=726702843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_device_address.726702843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_device_timeout.3707680403 |
| Short name | T1375 |
| Test name | |
| Test status | |
| Simulation time | 6131728421 ps |
| CPU time | 47.38 seconds |
| Started | Sep 24 09:07:30 AM UTC 24 |
| Finished | Sep 24 09:08:19 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3707680403 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_timeout.3707680403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_disable_endpoint.2531164731 |
| Short name | T1306 |
| Test name | |
| Test status | |
| Simulation time | 624782727 ps |
| CPU time | 2.27 seconds |
| Started | Sep 24 09:07:30 AM UTC 24 |
| Finished | Sep 24 09:07:33 AM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2531164731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_disable_endpoint.2531164731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_disconnected.3275473101 |
| Short name | T1305 |
| Test name | |
| Test status | |
| Simulation time | 195694565 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:07:30 AM UTC 24 |
| Finished | Sep 24 09:07:33 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3275473101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_disconnected.3275473101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_enable.775580069 |
| Short name | T1304 |
| Test name | |
| Test status | |
| Simulation time | 92028536 ps |
| CPU time | 1.25 seconds |
| Started | Sep 24 09:07:30 AM UTC 24 |
| Finished | Sep 24 09:07:32 AM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=775580069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_enable.775580069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_access.1875717887 |
| Short name | T1308 |
| Test name | |
| Test status | |
| Simulation time | 799707871 ps |
| CPU time | 2.46 seconds |
| Started | Sep 24 09:07:30 AM UTC 24 |
| Finished | Sep 24 09:07:34 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1875717887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_access.1875717887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_levels.246924514 |
| Short name | T346 |
| Test name | |
| Test status | |
| Simulation time | 255642981 ps |
| CPU time | 1.92 seconds |
| Started | Sep 24 09:07:32 AM UTC 24 |
| Finished | Sep 24 09:07:35 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=246924514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_fifo_levels.246924514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_rst.2322665723 |
| Short name | T1311 |
| Test name | |
| Test status | |
| Simulation time | 419840487 ps |
| CPU time | 3.65 seconds |
| Started | Sep 24 09:07:32 AM UTC 24 |
| Finished | Sep 24 09:07:37 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2322665723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_fifo_rst.2322665723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_in_iso.206590104 |
| Short name | T1314 |
| Test name | |
| Test status | |
| Simulation time | 174798594 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:07:39 AM UTC 24 |
| Finished | Sep 24 09:07:42 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=206590104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_in_iso.206590104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_in_stall.3516535966 |
| Short name | T1312 |
| Test name | |
| Test status | |
| Simulation time | 139758840 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 09:07:39 AM UTC 24 |
| Finished | Sep 24 09:07:42 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3516535966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_in_stall.3516535966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_in_trans.2193071380 |
| Short name | T1315 |
| Test name | |
| Test status | |
| Simulation time | 242547560 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 09:07:39 AM UTC 24 |
| Finished | Sep 24 09:07:42 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2193071380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_in_trans.2193071380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_invalid_sync.2760741533 |
| Short name | T1339 |
| Test name | |
| Test status | |
| Simulation time | 2721105460 ps |
| CPU time | 21.68 seconds |
| Started | Sep 24 09:07:32 AM UTC 24 |
| Finished | Sep 24 09:07:55 AM UTC 24 |
| Peak memory | 234984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2760741533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 15.usbdev_invalid_sync.2760741533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_iso_retraction.2391647322 |
| Short name | T1475 |
| Test name | |
| Test status | |
| Simulation time | 14856645867 ps |
| CPU time | 90.14 seconds |
| Started | Sep 24 09:07:40 AM UTC 24 |
| Finished | Sep 24 09:09:12 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2391647322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_iso_retraction.2391647322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_link_in_err.346861873 |
| Short name | T1313 |
| Test name | |
| Test status | |
| Simulation time | 241642508 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:07:40 AM UTC 24 |
| Finished | Sep 24 09:07:42 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=346861873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_link_in_err.346861873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_link_resume.1073547055 |
| Short name | T1381 |
| Test name | |
| Test status | |
| Simulation time | 23594607406 ps |
| CPU time | 51.48 seconds |
| Started | Sep 24 09:07:40 AM UTC 24 |
| Finished | Sep 24 09:08:33 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1073547055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_resume.1073547055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_link_suspend.884738038 |
| Short name | T1330 |
| Test name | |
| Test status | |
| Simulation time | 4739711060 ps |
| CPU time | 8.56 seconds |
| Started | Sep 24 09:07:40 AM UTC 24 |
| Finished | Sep 24 09:07:49 AM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=884738038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_suspend.884738038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_low_speed_traffic.1673760537 |
| Short name | T1419 |
| Test name | |
| Test status | |
| Simulation time | 2671652492 ps |
| CPU time | 65.27 seconds |
| Started | Sep 24 09:07:40 AM UTC 24 |
| Finished | Sep 24 09:08:47 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1673760537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_low_speed_traffic.1673760537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_max_inter_pkt_delay.1842844324 |
| Short name | T1378 |
| Test name | |
| Test status | |
| Simulation time | 3837594104 ps |
| CPU time | 40.3 seconds |
| Started | Sep 24 09:07:40 AM UTC 24 |
| Finished | Sep 24 09:08:22 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1842844324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_inter_pkt_delay.1842844324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_in_transaction.3697882598 |
| Short name | T1317 |
| Test name | |
| Test status | |
| Simulation time | 243580479 ps |
| CPU time | 1.83 seconds |
| Started | Sep 24 09:07:40 AM UTC 24 |
| Finished | Sep 24 09:07:43 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3697882598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_in_transaction.3697882598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_out_transaction.1301764033 |
| Short name | T1321 |
| Test name | |
| Test status | |
| Simulation time | 238594973 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:07:44 AM UTC 24 |
| Finished | Sep 24 09:07:47 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1301764033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_out_transaction.1301764033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_max_non_iso_usb_traffic.883626560 |
| Short name | T1355 |
| Test name | |
| Test status | |
| Simulation time | 2879259157 ps |
| CPU time | 22.83 seconds |
| Started | Sep 24 09:07:44 AM UTC 24 |
| Finished | Sep 24 09:08:08 AM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=883626560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_non_iso_usb_traffic.883626560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_min_inter_pkt_delay.816648722 |
| Short name | T1352 |
| Test name | |
| Test status | |
| Simulation time | 2295747055 ps |
| CPU time | 21.18 seconds |
| Started | Sep 24 09:07:44 AM UTC 24 |
| Finished | Sep 24 09:08:07 AM UTC 24 |
| Peak memory | 234956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=816648722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_inter_pkt_delay.816648722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_in_transaction.4056589650 |
| Short name | T1323 |
| Test name | |
| Test status | |
| Simulation time | 152252613 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:07:44 AM UTC 24 |
| Finished | Sep 24 09:07:47 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4056589650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_in_transaction.4056589650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_out_transaction.1828028317 |
| Short name | T1322 |
| Test name | |
| Test status | |
| Simulation time | 187532099 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:07:44 AM UTC 24 |
| Finished | Sep 24 09:07:47 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1828028317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_out_transaction.1828028317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_nak_trans.1045283235 |
| Short name | T158 |
| Test name | |
| Test status | |
| Simulation time | 196590263 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:07:44 AM UTC 24 |
| Finished | Sep 24 09:07:47 AM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1045283235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_nak_trans.1045283235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_out_iso.3442097308 |
| Short name | T1320 |
| Test name | |
| Test status | |
| Simulation time | 193736478 ps |
| CPU time | 1.22 seconds |
| Started | Sep 24 09:07:44 AM UTC 24 |
| Finished | Sep 24 09:07:47 AM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3442097308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_out_iso.3442097308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_out_stall.3827489478 |
| Short name | T1324 |
| Test name | |
| Test status | |
| Simulation time | 186113044 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:07:44 AM UTC 24 |
| Finished | Sep 24 09:07:47 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3827489478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_out_stall.3827489478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_out_trans_nak.721476336 |
| Short name | T1328 |
| Test name | |
| Test status | |
| Simulation time | 193361975 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:07:47 AM UTC 24 |
| Finished | Sep 24 09:07:49 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=721476336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_out_trans_nak.721476336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_pending_in_trans.3977421835 |
| Short name | T1329 |
| Test name | |
| Test status | |
| Simulation time | 156221509 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:07:47 AM UTC 24 |
| Finished | Sep 24 09:07:49 AM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3977421835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_pending_in_trans.3977421835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_pinflip.4277751416 |
| Short name | T1337 |
| Test name | |
| Test status | |
| Simulation time | 228208479 ps |
| CPU time | 1.96 seconds |
| Started | Sep 24 09:07:52 AM UTC 24 |
| Finished | Sep 24 09:07:55 AM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4277751416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_pinflip.4277751416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_usb_ref_disable.2557378800 |
| Short name | T1332 |
| Test name | |
| Test status | |
| Simulation time | 158109217 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 09:07:52 AM UTC 24 |
| Finished | Sep 24 09:07:54 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2557378800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_usb_ref_disable.2557378800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_phy_pins_sense.863494088 |
| Short name | T1331 |
| Test name | |
| Test status | |
| Simulation time | 30165260 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:07:52 AM UTC 24 |
| Finished | Sep 24 09:07:54 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=863494088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_phy_pins_sense.863494088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_buffer.4165834754 |
| Short name | T1365 |
| Test name | |
| Test status | |
| Simulation time | 6942264756 ps |
| CPU time | 21.95 seconds |
| Started | Sep 24 09:07:52 AM UTC 24 |
| Finished | Sep 24 09:08:15 AM UTC 24 |
| Peak memory | 228384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4165834754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_pkt_buffer.4165834754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_received.2944448647 |
| Short name | T1290 |
| Test name | |
| Test status | |
| Simulation time | 178394172 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:07:52 AM UTC 24 |
| Finished | Sep 24 09:07:55 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2944448647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_pkt_received.2944448647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_sent.3506420541 |
| Short name | T1333 |
| Test name | |
| Test status | |
| Simulation time | 168070312 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:07:52 AM UTC 24 |
| Finished | Sep 24 09:07:54 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3506420541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_pkt_sent.3506420541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_in_transaction.178670799 |
| Short name | T1335 |
| Test name | |
| Test status | |
| Simulation time | 188009967 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:07:52 AM UTC 24 |
| Finished | Sep 24 09:07:55 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=178670799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_random_length_in_transaction.178670799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_out_transaction.2393023618 |
| Short name | T1338 |
| Test name | |
| Test status | |
| Simulation time | 178659302 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:07:52 AM UTC 24 |
| Finished | Sep 24 09:07:55 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2393023618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_random_length_out_transaction.2393023618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_resume_link_active.1648671292 |
| Short name | T1377 |
| Test name | |
| Test status | |
| Simulation time | 20168005538 ps |
| CPU time | 27.42 seconds |
| Started | Sep 24 09:07:52 AM UTC 24 |
| Finished | Sep 24 09:08:21 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1648671292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 15.usbdev_resume_link_active.1648671292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_rx_crc_err.1123352706 |
| Short name | T1336 |
| Test name | |
| Test status | |
| Simulation time | 149449699 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:07:52 AM UTC 24 |
| Finished | Sep 24 09:07:55 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1123352706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_rx_crc_err.1123352706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_rx_full.588443013 |
| Short name | T385 |
| Test name | |
| Test status | |
| Simulation time | 347722672 ps |
| CPU time | 2.25 seconds |
| Started | Sep 24 09:07:58 AM UTC 24 |
| Finished | Sep 24 09:08:01 AM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=588443013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 15.usbdev_rx_full.588443013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_setup_stage.4028945286 |
| Short name | T1343 |
| Test name | |
| Test status | |
| Simulation time | 165530065 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 09:07:58 AM UTC 24 |
| Finished | Sep 24 09:08:00 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4028945286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_setup_stage.4028945286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_setup_trans_ignored.3653396360 |
| Short name | T1345 |
| Test name | |
| Test status | |
| Simulation time | 170390560 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 09:07:58 AM UTC 24 |
| Finished | Sep 24 09:08:00 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3653396360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 15.usbdev_setup_trans_ignored.3653396360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_smoke.121717346 |
| Short name | T1346 |
| Test name | |
| Test status | |
| Simulation time | 253022503 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 09:07:58 AM UTC 24 |
| Finished | Sep 24 09:08:00 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=121717346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_smoke.121717346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_spurious_pids_ignored.3798916954 |
| Short name | T1393 |
| Test name | |
| Test status | |
| Simulation time | 3239025140 ps |
| CPU time | 31.91 seconds |
| Started | Sep 24 09:07:58 AM UTC 24 |
| Finished | Sep 24 09:08:31 AM UTC 24 |
| Peak memory | 230512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3798916954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 15.usbdev_spurious_pids_ignored.3798916954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_stall_priority_over_nak.3080715029 |
| Short name | T1347 |
| Test name | |
| Test status | |
| Simulation time | 193792828 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 09:07:58 AM UTC 24 |
| Finished | Sep 24 09:08:00 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3080715029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stall_priority_over_nak.3080715029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_stall_trans.2134713530 |
| Short name | T1344 |
| Test name | |
| Test status | |
| Simulation time | 162033713 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:07:58 AM UTC 24 |
| Finished | Sep 24 09:08:00 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2134713530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_stall_trans.2134713530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_stream_len_max.1591377941 |
| Short name | T1350 |
| Test name | |
| Test status | |
| Simulation time | 967166907 ps |
| CPU time | 3.21 seconds |
| Started | Sep 24 09:07:58 AM UTC 24 |
| Finished | Sep 24 09:08:02 AM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1591377941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stream_len_max.1591377941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_streaming_out.1241280950 |
| Short name | T1363 |
| Test name | |
| Test status | |
| Simulation time | 1784693917 ps |
| CPU time | 13.58 seconds |
| Started | Sep 24 09:07:58 AM UTC 24 |
| Finished | Sep 24 09:08:13 AM UTC 24 |
| Peak memory | 234832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1241280950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_streaming_out.1241280950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_timeout_missing_host_handshake.1947815685 |
| Short name | T1351 |
| Test name | |
| Test status | |
| Simulation time | 5032128575 ps |
| CPU time | 33.27 seconds |
| Started | Sep 24 09:07:30 AM UTC 24 |
| Finished | Sep 24 09:08:04 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1947815685 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_timeout_missing_host_handshake.1947815685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/15.usbdev_tx_rx_disruption.3389050259 |
| Short name | T1349 |
| Test name | |
| Test status | |
| Simulation time | 586945777 ps |
| CPU time | 2.94 seconds |
| Started | Sep 24 09:07:58 AM UTC 24 |
| Finished | Sep 24 09:08:02 AM UTC 24 |
| Peak memory | 217832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3389050259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_t x_rx_disruption.3389050259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/15.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/150.usbdev_endpoint_types.3464911218 |
| Short name | T551 |
| Test name | |
| Test status | |
| Simulation time | 515179767 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:01 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464911218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_endpoint_types.3464911218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/150.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/150.usbdev_fifo_levels.1931047859 |
| Short name | T379 |
| Test name | |
| Test status | |
| Simulation time | 161809560 ps |
| CPU time | 0.89 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:00 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1931047859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 150.usbdev_fifo_levels.1931047859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/150.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/150.usbdev_tx_rx_disruption.1024268673 |
| Short name | T3410 |
| Test name | |
| Test status | |
| Simulation time | 607434177 ps |
| CPU time | 2.03 seconds |
| Started | Sep 24 09:39:58 AM UTC 24 |
| Finished | Sep 24 09:40:02 AM UTC 24 |
| Peak memory | 217840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1024268673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_ tx_rx_disruption.1024268673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/150.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/151.usbdev_endpoint_types.1400748752 |
| Short name | T3412 |
| Test name | |
| Test status | |
| Simulation time | 326621805 ps |
| CPU time | 1.16 seconds |
| Started | Sep 24 09:40:49 AM UTC 24 |
| Finished | Sep 24 09:40:51 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1400748752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_endpoint_types.1400748752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/151.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/151.usbdev_tx_rx_disruption.2546927109 |
| Short name | T3419 |
| Test name | |
| Test status | |
| Simulation time | 582466164 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:40:49 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2546927109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_ tx_rx_disruption.2546927109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/151.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/152.usbdev_fifo_levels.779023609 |
| Short name | T3411 |
| Test name | |
| Test status | |
| Simulation time | 147307184 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:40:49 AM UTC 24 |
| Finished | Sep 24 09:40:51 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=779023609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 152.usbdev_fifo_levels.779023609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/152.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/152.usbdev_tx_rx_disruption.2905052663 |
| Short name | T3432 |
| Test name | |
| Test status | |
| Simulation time | 630929470 ps |
| CPU time | 2.15 seconds |
| Started | Sep 24 09:40:49 AM UTC 24 |
| Finished | Sep 24 09:40:53 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2905052663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_ tx_rx_disruption.2905052663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/152.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/153.usbdev_endpoint_types.3805763546 |
| Short name | T3414 |
| Test name | |
| Test status | |
| Simulation time | 425292342 ps |
| CPU time | 1.31 seconds |
| Started | Sep 24 09:40:49 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3805763546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_endpoint_types.3805763546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/153.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/153.usbdev_fifo_levels.1856378067 |
| Short name | T3413 |
| Test name | |
| Test status | |
| Simulation time | 262924899 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:40:49 AM UTC 24 |
| Finished | Sep 24 09:40:51 AM UTC 24 |
| Peak memory | 215636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1856378067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 153.usbdev_fifo_levels.1856378067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/153.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/153.usbdev_tx_rx_disruption.1170321216 |
| Short name | T3424 |
| Test name | |
| Test status | |
| Simulation time | 477382440 ps |
| CPU time | 1.85 seconds |
| Started | Sep 24 09:40:49 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1170321216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_ tx_rx_disruption.1170321216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/153.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/154.usbdev_endpoint_types.3138271600 |
| Short name | T489 |
| Test name | |
| Test status | |
| Simulation time | 466925019 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 09:40:49 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3138271600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_endpoint_types.3138271600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/154.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/154.usbdev_fifo_levels.2929235837 |
| Short name | T3417 |
| Test name | |
| Test status | |
| Simulation time | 340039667 ps |
| CPU time | 1.28 seconds |
| Started | Sep 24 09:40:49 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2929235837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 154.usbdev_fifo_levels.2929235837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/154.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/154.usbdev_tx_rx_disruption.3974970429 |
| Short name | T3443 |
| Test name | |
| Test status | |
| Simulation time | 643849256 ps |
| CPU time | 2.42 seconds |
| Started | Sep 24 09:40:49 AM UTC 24 |
| Finished | Sep 24 09:40:53 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3974970429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_ tx_rx_disruption.3974970429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/154.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/155.usbdev_endpoint_types.437417408 |
| Short name | T3416 |
| Test name | |
| Test status | |
| Simulation time | 247242452 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:40:49 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=437417408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 155.usbdev_endpoint_types.437417408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/155.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/155.usbdev_tx_rx_disruption.2391402217 |
| Short name | T3427 |
| Test name | |
| Test status | |
| Simulation time | 495612204 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 09:40:49 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2391402217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_ tx_rx_disruption.2391402217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/155.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/156.usbdev_endpoint_types.3450523389 |
| Short name | T3415 |
| Test name | |
| Test status | |
| Simulation time | 272551922 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:40:49 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3450523389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_endpoint_types.3450523389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/156.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/156.usbdev_fifo_levels.1977093414 |
| Short name | T3423 |
| Test name | |
| Test status | |
| Simulation time | 272104766 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:40:49 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1977093414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 156.usbdev_fifo_levels.1977093414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/156.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/156.usbdev_tx_rx_disruption.2475277510 |
| Short name | T3442 |
| Test name | |
| Test status | |
| Simulation time | 585752599 ps |
| CPU time | 2.18 seconds |
| Started | Sep 24 09:40:49 AM UTC 24 |
| Finished | Sep 24 09:40:53 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2475277510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_ tx_rx_disruption.2475277510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/156.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/157.usbdev_endpoint_types.1034639473 |
| Short name | T3428 |
| Test name | |
| Test status | |
| Simulation time | 528386345 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 09:40:49 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1034639473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_endpoint_types.1034639473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/157.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/157.usbdev_fifo_levels.2716545654 |
| Short name | T3418 |
| Test name | |
| Test status | |
| Simulation time | 180497062 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2716545654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 157.usbdev_fifo_levels.2716545654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/157.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/157.usbdev_tx_rx_disruption.2711234536 |
| Short name | T3445 |
| Test name | |
| Test status | |
| Simulation time | 615636318 ps |
| CPU time | 2.33 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:53 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2711234536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_ tx_rx_disruption.2711234536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/157.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/158.usbdev_endpoint_types.1852710685 |
| Short name | T589 |
| Test name | |
| Test status | |
| Simulation time | 312232100 ps |
| CPU time | 1.2 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1852710685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_endpoint_types.1852710685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/158.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/158.usbdev_fifo_levels.502773269 |
| Short name | T3421 |
| Test name | |
| Test status | |
| Simulation time | 219634192 ps |
| CPU time | 1.14 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=502773269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 158.usbdev_fifo_levels.502773269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/158.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/158.usbdev_tx_rx_disruption.153872976 |
| Short name | T3435 |
| Test name | |
| Test status | |
| Simulation time | 611962115 ps |
| CPU time | 1.76 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:53 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=153872976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_t x_rx_disruption.153872976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/158.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/159.usbdev_endpoint_types.801615676 |
| Short name | T552 |
| Test name | |
| Test status | |
| Simulation time | 525841122 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=801615676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 159.usbdev_endpoint_types.801615676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/159.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/159.usbdev_fifo_levels.133979526 |
| Short name | T3420 |
| Test name | |
| Test status | |
| Simulation time | 293059045 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=133979526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 159.usbdev_fifo_levels.133979526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/159.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/159.usbdev_tx_rx_disruption.2833142319 |
| Short name | T3434 |
| Test name | |
| Test status | |
| Simulation time | 485873612 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:53 AM UTC 24 |
| Peak memory | 215576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2833142319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_ tx_rx_disruption.2833142319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/159.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_alert_test.1178442619 |
| Short name | T1410 |
| Test name | |
| Test status | |
| Simulation time | 66765719 ps |
| CPU time | 0.81 seconds |
| Started | Sep 24 09:08:38 AM UTC 24 |
| Finished | Sep 24 09:08:40 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1178442619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 16.usbdev_alert_test.1178442619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_disconnect.2993981406 |
| Short name | T1379 |
| Test name | |
| Test status | |
| Simulation time | 9883404466 ps |
| CPU time | 14.82 seconds |
| Started | Sep 24 09:08:07 AM UTC 24 |
| Finished | Sep 24 09:08:23 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2993981406 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_disconnect.2993981406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_reset.2093073419 |
| Short name | T1409 |
| Test name | |
| Test status | |
| Simulation time | 21337920906 ps |
| CPU time | 31.11 seconds |
| Started | Sep 24 09:08:07 AM UTC 24 |
| Finished | Sep 24 09:08:39 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2093073419 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_reset.2093073419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_resume.1164926426 |
| Short name | T1412 |
| Test name | |
| Test status | |
| Simulation time | 25911128364 ps |
| CPU time | 32.44 seconds |
| Started | Sep 24 09:08:07 AM UTC 24 |
| Finished | Sep 24 09:08:41 AM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1164926426 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_resume.1164926426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_av_buffer.3517975739 |
| Short name | T1358 |
| Test name | |
| Test status | |
| Simulation time | 170917397 ps |
| CPU time | 1.38 seconds |
| Started | Sep 24 09:08:07 AM UTC 24 |
| Finished | Sep 24 09:08:09 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3517975739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_av_buffer.3517975739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_bitstuff_err.1964591505 |
| Short name | T1359 |
| Test name | |
| Test status | |
| Simulation time | 148585059 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:08:07 AM UTC 24 |
| Finished | Sep 24 09:08:10 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1964591505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_bitstuff_err.1964591505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_clear.1669750605 |
| Short name | T1360 |
| Test name | |
| Test status | |
| Simulation time | 537989355 ps |
| CPU time | 2.43 seconds |
| Started | Sep 24 09:08:07 AM UTC 24 |
| Finished | Sep 24 09:08:10 AM UTC 24 |
| Peak memory | 217708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1669750605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 16.usbdev_data_toggle_clear.1669750605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_restore.471737647 |
| Short name | T1361 |
| Test name | |
| Test status | |
| Simulation time | 528833319 ps |
| CPU time | 2.87 seconds |
| Started | Sep 24 09:08:07 AM UTC 24 |
| Finished | Sep 24 09:08:11 AM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=471737647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_restore.471737647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_device_address.3402485278 |
| Short name | T1430 |
| Test name | |
| Test status | |
| Simulation time | 21991343690 ps |
| CPU time | 42.15 seconds |
| Started | Sep 24 09:08:07 AM UTC 24 |
| Finished | Sep 24 09:08:51 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3402485278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_address.3402485278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_device_timeout.4121592200 |
| Short name | T1356 |
| Test name | |
| Test status | |
| Simulation time | 3399095968 ps |
| CPU time | 27.91 seconds |
| Started | Sep 24 09:08:07 AM UTC 24 |
| Finished | Sep 24 09:08:36 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4121592200 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_timeout.4121592200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_disable_endpoint.4230814057 |
| Short name | T1362 |
| Test name | |
| Test status | |
| Simulation time | 714185101 ps |
| CPU time | 3.71 seconds |
| Started | Sep 24 09:08:07 AM UTC 24 |
| Finished | Sep 24 09:08:12 AM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4230814057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_disable_endpoint.4230814057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_disconnected.4021923337 |
| Short name | T1368 |
| Test name | |
| Test status | |
| Simulation time | 160040283 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:08:14 AM UTC 24 |
| Finished | Sep 24 09:08:17 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4021923337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_disconnected.4021923337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_enable.2071882079 |
| Short name | T1367 |
| Test name | |
| Test status | |
| Simulation time | 33089012 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:08:14 AM UTC 24 |
| Finished | Sep 24 09:08:16 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2071882079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 16.usbdev_enable.2071882079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_access.1099809434 |
| Short name | T1374 |
| Test name | |
| Test status | |
| Simulation time | 985269836 ps |
| CPU time | 2.85 seconds |
| Started | Sep 24 09:08:14 AM UTC 24 |
| Finished | Sep 24 09:08:18 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1099809434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_access.1099809434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_types.1943161635 |
| Short name | T497 |
| Test name | |
| Test status | |
| Simulation time | 292570801 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 09:08:14 AM UTC 24 |
| Finished | Sep 24 09:08:17 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1943161635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_types.1943161635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_levels.3255479387 |
| Short name | T390 |
| Test name | |
| Test status | |
| Simulation time | 291146207 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 09:08:15 AM UTC 24 |
| Finished | Sep 24 09:08:17 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3255479387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_fifo_levels.3255479387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_rst.558329591 |
| Short name | T1372 |
| Test name | |
| Test status | |
| Simulation time | 191590654 ps |
| CPU time | 2.22 seconds |
| Started | Sep 24 09:08:15 AM UTC 24 |
| Finished | Sep 24 09:08:18 AM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=558329591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_fifo_rst.558329591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_in_iso.369394533 |
| Short name | T1373 |
| Test name | |
| Test status | |
| Simulation time | 215120448 ps |
| CPU time | 2.1 seconds |
| Started | Sep 24 09:08:15 AM UTC 24 |
| Finished | Sep 24 09:08:18 AM UTC 24 |
| Peak memory | 228156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=369394533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_in_iso.369394533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_in_stall.3392210425 |
| Short name | T1369 |
| Test name | |
| Test status | |
| Simulation time | 144795863 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 09:08:15 AM UTC 24 |
| Finished | Sep 24 09:08:17 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3392210425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_stall.3392210425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_in_trans.2475241400 |
| Short name | T1371 |
| Test name | |
| Test status | |
| Simulation time | 203188297 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:08:15 AM UTC 24 |
| Finished | Sep 24 09:08:18 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2475241400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_trans.2475241400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_invalid_sync.3663954453 |
| Short name | T1438 |
| Test name | |
| Test status | |
| Simulation time | 4670672672 ps |
| CPU time | 41.42 seconds |
| Started | Sep 24 09:08:15 AM UTC 24 |
| Finished | Sep 24 09:08:57 AM UTC 24 |
| Peak memory | 234900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3663954453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 16.usbdev_invalid_sync.3663954453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_iso_retraction.3259783782 |
| Short name | T1598 |
| Test name | |
| Test status | |
| Simulation time | 11320227547 ps |
| CPU time | 133.13 seconds |
| Started | Sep 24 09:08:15 AM UTC 24 |
| Finished | Sep 24 09:10:30 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259783782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_iso_retraction.3259783782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_link_in_err.1794730812 |
| Short name | T1370 |
| Test name | |
| Test status | |
| Simulation time | 220694447 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:08:15 AM UTC 24 |
| Finished | Sep 24 09:08:18 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1794730812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_in_err.1794730812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_link_resume.640578612 |
| Short name | T1443 |
| Test name | |
| Test status | |
| Simulation time | 24118307456 ps |
| CPU time | 43.63 seconds |
| Started | Sep 24 09:08:15 AM UTC 24 |
| Finished | Sep 24 09:09:00 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=640578612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_link_resume.640578612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_link_suspend.3323418024 |
| Short name | T1395 |
| Test name | |
| Test status | |
| Simulation time | 5454454285 ps |
| CPU time | 8 seconds |
| Started | Sep 24 09:08:22 AM UTC 24 |
| Finished | Sep 24 09:08:32 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3323418024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_link_suspend.3323418024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_low_speed_traffic.1774106830 |
| Short name | T1431 |
| Test name | |
| Test status | |
| Simulation time | 2922274064 ps |
| CPU time | 27.14 seconds |
| Started | Sep 24 09:08:22 AM UTC 24 |
| Finished | Sep 24 09:08:51 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1774106830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_low_speed_traffic.1774106830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_max_inter_pkt_delay.3268342416 |
| Short name | T1435 |
| Test name | |
| Test status | |
| Simulation time | 3023673124 ps |
| CPU time | 28.9 seconds |
| Started | Sep 24 09:08:22 AM UTC 24 |
| Finished | Sep 24 09:08:53 AM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3268342416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_inter_pkt_delay.3268342416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_in_transaction.2480600357 |
| Short name | T1387 |
| Test name | |
| Test status | |
| Simulation time | 265145421 ps |
| CPU time | 1.89 seconds |
| Started | Sep 24 09:08:23 AM UTC 24 |
| Finished | Sep 24 09:08:26 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2480600357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_in_transaction.2480600357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_out_transaction.2809589949 |
| Short name | T1383 |
| Test name | |
| Test status | |
| Simulation time | 193607982 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:08:23 AM UTC 24 |
| Finished | Sep 24 09:08:25 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2809589949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_out_transaction.2809589949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_max_non_iso_usb_traffic.1757145820 |
| Short name | T1522 |
| Test name | |
| Test status | |
| Simulation time | 3125890299 ps |
| CPU time | 77.92 seconds |
| Started | Sep 24 09:08:23 AM UTC 24 |
| Finished | Sep 24 09:09:42 AM UTC 24 |
| Peak memory | 234952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1757145820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_non_iso_usb_traffic.1757145820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_min_inter_pkt_delay.1552337717 |
| Short name | T1440 |
| Test name | |
| Test status | |
| Simulation time | 3396602812 ps |
| CPU time | 34.19 seconds |
| Started | Sep 24 09:08:23 AM UTC 24 |
| Finished | Sep 24 09:08:58 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1552337717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_inter_pkt_delay.1552337717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_in_transaction.1458467461 |
| Short name | T1382 |
| Test name | |
| Test status | |
| Simulation time | 154911525 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:08:23 AM UTC 24 |
| Finished | Sep 24 09:08:25 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1458467461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_in_transaction.1458467461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_out_transaction.858344146 |
| Short name | T1385 |
| Test name | |
| Test status | |
| Simulation time | 150836688 ps |
| CPU time | 1.28 seconds |
| Started | Sep 24 09:08:23 AM UTC 24 |
| Finished | Sep 24 09:08:25 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=858344146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 16.usbdev_min_length_out_transaction.858344146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_out_iso.415904304 |
| Short name | T1384 |
| Test name | |
| Test status | |
| Simulation time | 182953310 ps |
| CPU time | 1.4 seconds |
| Started | Sep 24 09:08:23 AM UTC 24 |
| Finished | Sep 24 09:08:25 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=415904304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 16.usbdev_out_iso.415904304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_out_stall.3660981289 |
| Short name | T1389 |
| Test name | |
| Test status | |
| Simulation time | 148205854 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:08:23 AM UTC 24 |
| Finished | Sep 24 09:08:26 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3660981289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_out_stall.3660981289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_out_trans_nak.478434285 |
| Short name | T1388 |
| Test name | |
| Test status | |
| Simulation time | 157258807 ps |
| CPU time | 1.34 seconds |
| Started | Sep 24 09:08:23 AM UTC 24 |
| Finished | Sep 24 09:08:26 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=478434285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_out_trans_nak.478434285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_pending_in_trans.4019942513 |
| Short name | T1386 |
| Test name | |
| Test status | |
| Simulation time | 225011753 ps |
| CPU time | 1.2 seconds |
| Started | Sep 24 09:08:23 AM UTC 24 |
| Finished | Sep 24 09:08:25 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4019942513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_pending_in_trans.4019942513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_pinflip.3385602828 |
| Short name | T1390 |
| Test name | |
| Test status | |
| Simulation time | 236292372 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 09:08:23 AM UTC 24 |
| Finished | Sep 24 09:08:26 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3385602828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_pinflip.3385602828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_usb_ref_disable.1923294323 |
| Short name | T1397 |
| Test name | |
| Test status | |
| Simulation time | 141987373 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 09:08:29 AM UTC 24 |
| Finished | Sep 24 09:08:32 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1923294323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_usb_ref_disable.1923294323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_phy_pins_sense.3996631473 |
| Short name | T1394 |
| Test name | |
| Test status | |
| Simulation time | 35924360 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:08:29 AM UTC 24 |
| Finished | Sep 24 09:08:32 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3996631473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_pins_sense.3996631473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_buffer.3867247080 |
| Short name | T1478 |
| Test name | |
| Test status | |
| Simulation time | 15047890990 ps |
| CPU time | 42.57 seconds |
| Started | Sep 24 09:08:29 AM UTC 24 |
| Finished | Sep 24 09:09:13 AM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3867247080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_pkt_buffer.3867247080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_received.3651125674 |
| Short name | T1396 |
| Test name | |
| Test status | |
| Simulation time | 213983653 ps |
| CPU time | 1.25 seconds |
| Started | Sep 24 09:08:29 AM UTC 24 |
| Finished | Sep 24 09:08:32 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3651125674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_pkt_received.3651125674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_sent.3326375064 |
| Short name | T1404 |
| Test name | |
| Test status | |
| Simulation time | 238517648 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:08:29 AM UTC 24 |
| Finished | Sep 24 09:08:32 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3326375064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_pkt_sent.3326375064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_in_transaction.3101329783 |
| Short name | T1400 |
| Test name | |
| Test status | |
| Simulation time | 242490468 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:08:29 AM UTC 24 |
| Finished | Sep 24 09:08:32 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3101329783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_random_length_in_transaction.3101329783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_out_transaction.2125591132 |
| Short name | T1401 |
| Test name | |
| Test status | |
| Simulation time | 196941857 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:08:29 AM UTC 24 |
| Finished | Sep 24 09:08:32 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2125591132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_random_length_out_transaction.2125591132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_resume_link_active.2162716832 |
| Short name | T1456 |
| Test name | |
| Test status | |
| Simulation time | 20202812085 ps |
| CPU time | 31.31 seconds |
| Started | Sep 24 09:08:29 AM UTC 24 |
| Finished | Sep 24 09:09:02 AM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2162716832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 16.usbdev_resume_link_active.2162716832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_rx_crc_err.1748315548 |
| Short name | T1399 |
| Test name | |
| Test status | |
| Simulation time | 137880507 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:08:30 AM UTC 24 |
| Finished | Sep 24 09:08:32 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1748315548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_rx_crc_err.1748315548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_setup_stage.1136542122 |
| Short name | T1402 |
| Test name | |
| Test status | |
| Simulation time | 175888585 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 09:08:30 AM UTC 24 |
| Finished | Sep 24 09:08:32 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1136542122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_setup_stage.1136542122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_setup_trans_ignored.3087226315 |
| Short name | T1403 |
| Test name | |
| Test status | |
| Simulation time | 174835496 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 09:08:30 AM UTC 24 |
| Finished | Sep 24 09:08:32 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3087226315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 16.usbdev_setup_trans_ignored.3087226315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_smoke.4144778841 |
| Short name | T1398 |
| Test name | |
| Test status | |
| Simulation time | 223753987 ps |
| CPU time | 1.14 seconds |
| Started | Sep 24 09:08:30 AM UTC 24 |
| Finished | Sep 24 09:08:32 AM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4144778841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_smoke.4144778841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_spurious_pids_ignored.3709527465 |
| Short name | T1427 |
| Test name | |
| Test status | |
| Simulation time | 1952901337 ps |
| CPU time | 18.39 seconds |
| Started | Sep 24 09:08:30 AM UTC 24 |
| Finished | Sep 24 09:08:50 AM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3709527465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_spurious_pids_ignored.3709527465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_stall_priority_over_nak.3321629814 |
| Short name | T1405 |
| Test name | |
| Test status | |
| Simulation time | 193006523 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:08:30 AM UTC 24 |
| Finished | Sep 24 09:08:33 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3321629814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stall_priority_over_nak.3321629814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_stall_trans.2222520736 |
| Short name | T1411 |
| Test name | |
| Test status | |
| Simulation time | 197813745 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:08:38 AM UTC 24 |
| Finished | Sep 24 09:08:40 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2222520736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_stall_trans.2222520736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_stream_len_max.3215230757 |
| Short name | T1417 |
| Test name | |
| Test status | |
| Simulation time | 1305393284 ps |
| CPU time | 3.44 seconds |
| Started | Sep 24 09:08:38 AM UTC 24 |
| Finished | Sep 24 09:08:42 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3215230757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stream_len_max.3215230757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_streaming_out.1228259256 |
| Short name | T1474 |
| Test name | |
| Test status | |
| Simulation time | 3226377150 ps |
| CPU time | 32.58 seconds |
| Started | Sep 24 09:08:38 AM UTC 24 |
| Finished | Sep 24 09:09:12 AM UTC 24 |
| Peak memory | 234892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1228259256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_streaming_out.1228259256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_timeout_missing_host_handshake.3731619951 |
| Short name | T1392 |
| Test name | |
| Test status | |
| Simulation time | 2439082188 ps |
| CPU time | 20.77 seconds |
| Started | Sep 24 09:08:07 AM UTC 24 |
| Finished | Sep 24 09:08:29 AM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3731619951 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_timeout_missing_host_handshake.3731619951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/16.usbdev_tx_rx_disruption.3052571235 |
| Short name | T1415 |
| Test name | |
| Test status | |
| Simulation time | 576311666 ps |
| CPU time | 2.12 seconds |
| Started | Sep 24 09:08:38 AM UTC 24 |
| Finished | Sep 24 09:08:41 AM UTC 24 |
| Peak memory | 217896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3052571235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_t x_rx_disruption.3052571235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/16.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/160.usbdev_endpoint_types.1535418158 |
| Short name | T3431 |
| Test name | |
| Test status | |
| Simulation time | 488557683 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:53 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1535418158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_endpoint_types.1535418158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/160.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/160.usbdev_tx_rx_disruption.2652490683 |
| Short name | T3438 |
| Test name | |
| Test status | |
| Simulation time | 636295854 ps |
| CPU time | 1.87 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:53 AM UTC 24 |
| Peak memory | 215572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2652490683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_ tx_rx_disruption.2652490683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/160.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/161.usbdev_endpoint_types.3192740698 |
| Short name | T3422 |
| Test name | |
| Test status | |
| Simulation time | 225611753 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3192740698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_endpoint_types.3192740698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/161.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/161.usbdev_tx_rx_disruption.3334239024 |
| Short name | T3429 |
| Test name | |
| Test status | |
| Simulation time | 445495737 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3334239024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_ tx_rx_disruption.3334239024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/161.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/162.usbdev_endpoint_types.2324352068 |
| Short name | T3430 |
| Test name | |
| Test status | |
| Simulation time | 437577727 ps |
| CPU time | 1.47 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2324352068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_endpoint_types.2324352068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/162.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/163.usbdev_endpoint_types.2819591177 |
| Short name | T3426 |
| Test name | |
| Test status | |
| Simulation time | 336821709 ps |
| CPU time | 1.33 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2819591177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_endpoint_types.2819591177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/163.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/163.usbdev_tx_rx_disruption.38066367 |
| Short name | T3437 |
| Test name | |
| Test status | |
| Simulation time | 520169727 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:53 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=38066367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_tx _rx_disruption.38066367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/163.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/164.usbdev_endpoint_types.1541819502 |
| Short name | T3425 |
| Test name | |
| Test status | |
| Simulation time | 217474232 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:52 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1541819502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_endpoint_types.1541819502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/164.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/164.usbdev_tx_rx_disruption.1479048097 |
| Short name | T3441 |
| Test name | |
| Test status | |
| Simulation time | 490279094 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:53 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1479048097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_ tx_rx_disruption.1479048097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/164.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/165.usbdev_tx_rx_disruption.804225539 |
| Short name | T3444 |
| Test name | |
| Test status | |
| Simulation time | 648044322 ps |
| CPU time | 1.89 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:53 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=804225539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_t x_rx_disruption.804225539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/165.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/166.usbdev_tx_rx_disruption.2775098097 |
| Short name | T3439 |
| Test name | |
| Test status | |
| Simulation time | 531580452 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:53 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2775098097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_ tx_rx_disruption.2775098097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/166.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/167.usbdev_endpoint_types.2228270870 |
| Short name | T3436 |
| Test name | |
| Test status | |
| Simulation time | 478070453 ps |
| CPU time | 1.38 seconds |
| Started | Sep 24 09:40:50 AM UTC 24 |
| Finished | Sep 24 09:40:53 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2228270870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_endpoint_types.2228270870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/167.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/167.usbdev_tx_rx_disruption.1324810840 |
| Short name | T3446 |
| Test name | |
| Test status | |
| Simulation time | 567082426 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 09:40:51 AM UTC 24 |
| Finished | Sep 24 09:40:54 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1324810840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_ tx_rx_disruption.1324810840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/167.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/168.usbdev_endpoint_types.3686983594 |
| Short name | T529 |
| Test name | |
| Test status | |
| Simulation time | 530398406 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 09:41:42 AM UTC 24 |
| Finished | Sep 24 09:41:45 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3686983594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_endpoint_types.3686983594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/168.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/168.usbdev_tx_rx_disruption.1424813691 |
| Short name | T3447 |
| Test name | |
| Test status | |
| Simulation time | 552719634 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:41:42 AM UTC 24 |
| Finished | Sep 24 09:41:45 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1424813691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_ tx_rx_disruption.1424813691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/168.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/169.usbdev_endpoint_types.713561420 |
| Short name | T3440 |
| Test name | |
| Test status | |
| Simulation time | 343124936 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 09:41:42 AM UTC 24 |
| Finished | Sep 24 09:41:45 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=713561420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 169.usbdev_endpoint_types.713561420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/169.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/169.usbdev_tx_rx_disruption.2425872196 |
| Short name | T3456 |
| Test name | |
| Test status | |
| Simulation time | 609275075 ps |
| CPU time | 1.87 seconds |
| Started | Sep 24 09:41:42 AM UTC 24 |
| Finished | Sep 24 09:41:45 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2425872196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_ tx_rx_disruption.2425872196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/169.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_alert_test.929494189 |
| Short name | T1467 |
| Test name | |
| Test status | |
| Simulation time | 41738598 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:09:08 AM UTC 24 |
| Finished | Sep 24 09:09:10 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=929494189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_alert_test.929494189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_disconnect.2919641682 |
| Short name | T1437 |
| Test name | |
| Test status | |
| Simulation time | 11234549420 ps |
| CPU time | 16.91 seconds |
| Started | Sep 24 09:08:38 AM UTC 24 |
| Finished | Sep 24 09:08:56 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2919641682 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_disconnect.2919641682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_reset.3335040299 |
| Short name | T1442 |
| Test name | |
| Test status | |
| Simulation time | 14320510955 ps |
| CPU time | 20.7 seconds |
| Started | Sep 24 09:08:38 AM UTC 24 |
| Finished | Sep 24 09:09:00 AM UTC 24 |
| Peak memory | 227620 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3335040299 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_reset.3335040299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_resume.646684470 |
| Short name | T1486 |
| Test name | |
| Test status | |
| Simulation time | 30173303486 ps |
| CPU time | 40.3 seconds |
| Started | Sep 24 09:08:38 AM UTC 24 |
| Finished | Sep 24 09:09:20 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=646684470 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_resume.646684470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_av_buffer.696279076 |
| Short name | T1414 |
| Test name | |
| Test status | |
| Simulation time | 192517177 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:08:38 AM UTC 24 |
| Finished | Sep 24 09:08:41 AM UTC 24 |
| Peak memory | 216868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=696279076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_av_buffer.696279076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_bitstuff_err.2141159998 |
| Short name | T1413 |
| Test name | |
| Test status | |
| Simulation time | 155163844 ps |
| CPU time | 1.38 seconds |
| Started | Sep 24 09:08:38 AM UTC 24 |
| Finished | Sep 24 09:08:41 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2141159998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_bitstuff_err.2141159998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_clear.2009545770 |
| Short name | T1416 |
| Test name | |
| Test status | |
| Simulation time | 485296200 ps |
| CPU time | 1.92 seconds |
| Started | Sep 24 09:08:38 AM UTC 24 |
| Finished | Sep 24 09:08:41 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2009545770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 17.usbdev_data_toggle_clear.2009545770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_device_address.3675429021 |
| Short name | T1459 |
| Test name | |
| Test status | |
| Simulation time | 16008469786 ps |
| CPU time | 28.74 seconds |
| Started | Sep 24 09:08:38 AM UTC 24 |
| Finished | Sep 24 09:09:09 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3675429021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_address.3675429021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_device_timeout.526501032 |
| Short name | T1480 |
| Test name | |
| Test status | |
| Simulation time | 5618578373 ps |
| CPU time | 38.39 seconds |
| Started | Sep 24 09:08:38 AM UTC 24 |
| Finished | Sep 24 09:09:18 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=526501032 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_timeout.526501032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_disable_endpoint.1704416852 |
| Short name | T1418 |
| Test name | |
| Test status | |
| Simulation time | 884483568 ps |
| CPU time | 2.69 seconds |
| Started | Sep 24 09:08:38 AM UTC 24 |
| Finished | Sep 24 09:08:42 AM UTC 24 |
| Peak memory | 217832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1704416852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_disable_endpoint.1704416852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_disconnected.1193076719 |
| Short name | T1421 |
| Test name | |
| Test status | |
| Simulation time | 140861540 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:08:45 AM UTC 24 |
| Finished | Sep 24 09:08:47 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1193076719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_disconnected.1193076719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_enable.2260765098 |
| Short name | T1420 |
| Test name | |
| Test status | |
| Simulation time | 40178888 ps |
| CPU time | 1.12 seconds |
| Started | Sep 24 09:08:45 AM UTC 24 |
| Finished | Sep 24 09:08:47 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2260765098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_enable.2260765098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_access.3402393684 |
| Short name | T1428 |
| Test name | |
| Test status | |
| Simulation time | 893722459 ps |
| CPU time | 4.09 seconds |
| Started | Sep 24 09:08:45 AM UTC 24 |
| Finished | Sep 24 09:08:50 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3402393684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_access.3402393684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_types.2903151818 |
| Short name | T1426 |
| Test name | |
| Test status | |
| Simulation time | 326787360 ps |
| CPU time | 2.1 seconds |
| Started | Sep 24 09:08:45 AM UTC 24 |
| Finished | Sep 24 09:08:48 AM UTC 24 |
| Peak memory | 217708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2903151818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_types.2903151818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_levels.2301440672 |
| Short name | T349 |
| Test name | |
| Test status | |
| Simulation time | 173360183 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:08:45 AM UTC 24 |
| Finished | Sep 24 09:08:47 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2301440672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_fifo_levels.2301440672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_rst.939711936 |
| Short name | T1429 |
| Test name | |
| Test status | |
| Simulation time | 540624902 ps |
| CPU time | 4.26 seconds |
| Started | Sep 24 09:08:45 AM UTC 24 |
| Finished | Sep 24 09:08:50 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=939711936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_fifo_rst.939711936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_in_iso.237435400 |
| Short name | T1424 |
| Test name | |
| Test status | |
| Simulation time | 239926949 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:08:45 AM UTC 24 |
| Finished | Sep 24 09:08:48 AM UTC 24 |
| Peak memory | 225976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=237435400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_in_iso.237435400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_in_stall.2126092294 |
| Short name | T1423 |
| Test name | |
| Test status | |
| Simulation time | 140866676 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:08:45 AM UTC 24 |
| Finished | Sep 24 09:08:48 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2126092294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_in_stall.2126092294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_in_trans.3954005995 |
| Short name | T1425 |
| Test name | |
| Test status | |
| Simulation time | 224697864 ps |
| CPU time | 1.75 seconds |
| Started | Sep 24 09:08:45 AM UTC 24 |
| Finished | Sep 24 09:08:48 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3954005995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_in_trans.3954005995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_invalid_sync.3442923005 |
| Short name | T1506 |
| Test name | |
| Test status | |
| Simulation time | 5209789027 ps |
| CPU time | 45.6 seconds |
| Started | Sep 24 09:08:45 AM UTC 24 |
| Finished | Sep 24 09:09:32 AM UTC 24 |
| Peak memory | 234824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3442923005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 17.usbdev_invalid_sync.3442923005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_iso_retraction.349410472 |
| Short name | T1531 |
| Test name | |
| Test status | |
| Simulation time | 5505150293 ps |
| CPU time | 61.47 seconds |
| Started | Sep 24 09:08:45 AM UTC 24 |
| Finished | Sep 24 09:09:49 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=349410472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 17.usbdev_iso_retraction.349410472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_link_in_err.2472065381 |
| Short name | T1422 |
| Test name | |
| Test status | |
| Simulation time | 170560974 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 09:08:46 AM UTC 24 |
| Finished | Sep 24 09:08:48 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2472065381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_in_err.2472065381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_link_resume.1583695225 |
| Short name | T1441 |
| Test name | |
| Test status | |
| Simulation time | 6358054841 ps |
| CPU time | 13 seconds |
| Started | Sep 24 09:08:46 AM UTC 24 |
| Finished | Sep 24 09:09:00 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1583695225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_resume.1583695225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_link_suspend.3369109095 |
| Short name | T1457 |
| Test name | |
| Test status | |
| Simulation time | 10388305146 ps |
| CPU time | 16.53 seconds |
| Started | Sep 24 09:08:46 AM UTC 24 |
| Finished | Sep 24 09:09:03 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3369109095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_link_suspend.3369109095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_low_speed_traffic.2942180932 |
| Short name | T1545 |
| Test name | |
| Test status | |
| Simulation time | 2761296101 ps |
| CPU time | 74.31 seconds |
| Started | Sep 24 09:08:46 AM UTC 24 |
| Finished | Sep 24 09:10:02 AM UTC 24 |
| Peak memory | 234844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2942180932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_low_speed_traffic.2942180932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_max_inter_pkt_delay.2107525662 |
| Short name | T1556 |
| Test name | |
| Test status | |
| Simulation time | 2852899194 ps |
| CPU time | 75.76 seconds |
| Started | Sep 24 09:08:50 AM UTC 24 |
| Finished | Sep 24 09:10:07 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2107525662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_inter_pkt_delay.2107525662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_in_transaction.4167552729 |
| Short name | T1436 |
| Test name | |
| Test status | |
| Simulation time | 292130812 ps |
| CPU time | 1.88 seconds |
| Started | Sep 24 09:08:50 AM UTC 24 |
| Finished | Sep 24 09:08:53 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4167552729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_in_transaction.4167552729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_out_transaction.2140833143 |
| Short name | T1433 |
| Test name | |
| Test status | |
| Simulation time | 187510300 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 09:08:50 AM UTC 24 |
| Finished | Sep 24 09:08:53 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2140833143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_out_transaction.2140833143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_max_non_iso_usb_traffic.2537696532 |
| Short name | T1477 |
| Test name | |
| Test status | |
| Simulation time | 2921795180 ps |
| CPU time | 21.31 seconds |
| Started | Sep 24 09:08:50 AM UTC 24 |
| Finished | Sep 24 09:09:12 AM UTC 24 |
| Peak memory | 234952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2537696532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_non_iso_usb_traffic.2537696532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_min_inter_pkt_delay.190521751 |
| Short name | T1458 |
| Test name | |
| Test status | |
| Simulation time | 1525279916 ps |
| CPU time | 15.77 seconds |
| Started | Sep 24 09:08:50 AM UTC 24 |
| Finished | Sep 24 09:09:07 AM UTC 24 |
| Peak memory | 228292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=190521751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_inter_pkt_delay.190521751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_in_transaction.2331863979 |
| Short name | T1434 |
| Test name | |
| Test status | |
| Simulation time | 169409720 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:08:50 AM UTC 24 |
| Finished | Sep 24 09:08:53 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2331863979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_in_transaction.2331863979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_out_transaction.4487694 |
| Short name | T1432 |
| Test name | |
| Test status | |
| Simulation time | 144024403 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:08:50 AM UTC 24 |
| Finished | Sep 24 09:08:52 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4487694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transactio n_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_out_transaction.4487694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_nak_trans.3513482800 |
| Short name | T1448 |
| Test name | |
| Test status | |
| Simulation time | 212701232 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:08:59 AM UTC 24 |
| Finished | Sep 24 09:09:01 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3513482800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_nak_trans.3513482800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_out_iso.151016914 |
| Short name | T1445 |
| Test name | |
| Test status | |
| Simulation time | 191438913 ps |
| CPU time | 1.29 seconds |
| Started | Sep 24 09:08:59 AM UTC 24 |
| Finished | Sep 24 09:09:01 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=151016914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_out_iso.151016914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_out_stall.912150668 |
| Short name | T1446 |
| Test name | |
| Test status | |
| Simulation time | 215059182 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:08:59 AM UTC 24 |
| Finished | Sep 24 09:09:01 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=912150668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_out_stall.912150668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_out_trans_nak.2943283068 |
| Short name | T1447 |
| Test name | |
| Test status | |
| Simulation time | 163799810 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 09:08:59 AM UTC 24 |
| Finished | Sep 24 09:09:01 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2943283068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_out_trans_nak.2943283068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_pending_in_trans.1896298704 |
| Short name | T1449 |
| Test name | |
| Test status | |
| Simulation time | 159534547 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:08:59 AM UTC 24 |
| Finished | Sep 24 09:09:01 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1896298704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_pending_in_trans.1896298704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_pinflip.3626060884 |
| Short name | T1452 |
| Test name | |
| Test status | |
| Simulation time | 220420438 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 09:08:59 AM UTC 24 |
| Finished | Sep 24 09:09:01 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3626060884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_pinflip.3626060884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_usb_ref_disable.3904994221 |
| Short name | T1450 |
| Test name | |
| Test status | |
| Simulation time | 161451519 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 09:08:59 AM UTC 24 |
| Finished | Sep 24 09:09:01 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3904994221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_usb_ref_disable.3904994221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_phy_pins_sense.1262392562 |
| Short name | T1444 |
| Test name | |
| Test status | |
| Simulation time | 37852719 ps |
| CPU time | 0.76 seconds |
| Started | Sep 24 09:08:59 AM UTC 24 |
| Finished | Sep 24 09:09:01 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1262392562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_pins_sense.1262392562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_buffer.3703329660 |
| Short name | T1490 |
| Test name | |
| Test status | |
| Simulation time | 8875566902 ps |
| CPU time | 21.42 seconds |
| Started | Sep 24 09:08:59 AM UTC 24 |
| Finished | Sep 24 09:09:22 AM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3703329660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_pkt_buffer.3703329660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_received.889818548 |
| Short name | T1454 |
| Test name | |
| Test status | |
| Simulation time | 230253350 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:08:59 AM UTC 24 |
| Finished | Sep 24 09:09:02 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=889818548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_pkt_received.889818548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_sent.223237130 |
| Short name | T1453 |
| Test name | |
| Test status | |
| Simulation time | 206480258 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:08:59 AM UTC 24 |
| Finished | Sep 24 09:09:01 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=223237130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_pkt_sent.223237130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_in_transaction.52166988 |
| Short name | T1455 |
| Test name | |
| Test status | |
| Simulation time | 211347331 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 09:08:59 AM UTC 24 |
| Finished | Sep 24 09:09:02 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=52166988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_random_length_in_transaction.52166988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_out_transaction.3468523227 |
| Short name | T1451 |
| Test name | |
| Test status | |
| Simulation time | 218086775 ps |
| CPU time | 1.22 seconds |
| Started | Sep 24 09:08:59 AM UTC 24 |
| Finished | Sep 24 09:09:01 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3468523227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_random_length_out_transaction.3468523227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_resume_link_active.952039072 |
| Short name | T1509 |
| Test name | |
| Test status | |
| Simulation time | 20196254597 ps |
| CPU time | 26.29 seconds |
| Started | Sep 24 09:09:07 AM UTC 24 |
| Finished | Sep 24 09:09:35 AM UTC 24 |
| Peak memory | 217896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=952039072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 17.usbdev_resume_link_active.952039072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_rx_crc_err.2753581248 |
| Short name | T1461 |
| Test name | |
| Test status | |
| Simulation time | 160470801 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:09:07 AM UTC 24 |
| Finished | Sep 24 09:09:09 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2753581248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_rx_crc_err.2753581248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_rx_full.4020429620 |
| Short name | T1472 |
| Test name | |
| Test status | |
| Simulation time | 379889337 ps |
| CPU time | 1.97 seconds |
| Started | Sep 24 09:09:07 AM UTC 24 |
| Finished | Sep 24 09:09:10 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4020429620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_rx_full.4020429620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_setup_stage.1565455671 |
| Short name | T1462 |
| Test name | |
| Test status | |
| Simulation time | 167479865 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:09:07 AM UTC 24 |
| Finished | Sep 24 09:09:09 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1565455671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_setup_stage.1565455671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_setup_trans_ignored.2418834306 |
| Short name | T1460 |
| Test name | |
| Test status | |
| Simulation time | 164757790 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:09:07 AM UTC 24 |
| Finished | Sep 24 09:09:09 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2418834306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 17.usbdev_setup_trans_ignored.2418834306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_smoke.4287086036 |
| Short name | T1469 |
| Test name | |
| Test status | |
| Simulation time | 208924828 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:09:07 AM UTC 24 |
| Finished | Sep 24 09:09:10 AM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4287086036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_smoke.4287086036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_spurious_pids_ignored.1790932712 |
| Short name | T1577 |
| Test name | |
| Test status | |
| Simulation time | 2738311504 ps |
| CPU time | 72.49 seconds |
| Started | Sep 24 09:09:07 AM UTC 24 |
| Finished | Sep 24 09:10:22 AM UTC 24 |
| Peak memory | 230512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1790932712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_spurious_pids_ignored.1790932712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_stall_priority_over_nak.2889464002 |
| Short name | T1466 |
| Test name | |
| Test status | |
| Simulation time | 198414586 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:09:08 AM UTC 24 |
| Finished | Sep 24 09:09:10 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2889464002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stall_priority_over_nak.2889464002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_stall_trans.2988359095 |
| Short name | T1465 |
| Test name | |
| Test status | |
| Simulation time | 177293738 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:09:08 AM UTC 24 |
| Finished | Sep 24 09:09:10 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2988359095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_stall_trans.2988359095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_stream_len_max.180180896 |
| Short name | T1476 |
| Test name | |
| Test status | |
| Simulation time | 1250783545 ps |
| CPU time | 3.52 seconds |
| Started | Sep 24 09:09:08 AM UTC 24 |
| Finished | Sep 24 09:09:12 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=180180896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_stream_len_max.180180896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_streaming_out.769404480 |
| Short name | T1492 |
| Test name | |
| Test status | |
| Simulation time | 2002874810 ps |
| CPU time | 18.93 seconds |
| Started | Sep 24 09:09:08 AM UTC 24 |
| Finished | Sep 24 09:09:28 AM UTC 24 |
| Peak memory | 234756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=769404480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_streaming_out.769404480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_timeout_missing_host_handshake.414611804 |
| Short name | T1439 |
| Test name | |
| Test status | |
| Simulation time | 870203509 ps |
| CPU time | 18.01 seconds |
| Started | Sep 24 09:08:38 AM UTC 24 |
| Finished | Sep 24 09:08:58 AM UTC 24 |
| Peak memory | 217984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=414611804 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_timeout_missing_host_handshake.414611804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/17.usbdev_tx_rx_disruption.680637828 |
| Short name | T1473 |
| Test name | |
| Test status | |
| Simulation time | 574034982 ps |
| CPU time | 2.08 seconds |
| Started | Sep 24 09:09:08 AM UTC 24 |
| Finished | Sep 24 09:09:11 AM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=680637828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_tx _rx_disruption.680637828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/17.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/170.usbdev_endpoint_types.4004829892 |
| Short name | T3451 |
| Test name | |
| Test status | |
| Simulation time | 583613052 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:41:42 AM UTC 24 |
| Finished | Sep 24 09:41:45 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4004829892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_endpoint_types.4004829892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/170.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/170.usbdev_tx_rx_disruption.3715173911 |
| Short name | T3455 |
| Test name | |
| Test status | |
| Simulation time | 654878731 ps |
| CPU time | 1.9 seconds |
| Started | Sep 24 09:41:42 AM UTC 24 |
| Finished | Sep 24 09:41:45 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3715173911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_ tx_rx_disruption.3715173911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/170.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/171.usbdev_endpoint_types.3911924350 |
| Short name | T3452 |
| Test name | |
| Test status | |
| Simulation time | 657771293 ps |
| CPU time | 1.82 seconds |
| Started | Sep 24 09:41:42 AM UTC 24 |
| Finished | Sep 24 09:41:45 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3911924350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_endpoint_types.3911924350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/171.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/171.usbdev_tx_rx_disruption.1271334815 |
| Short name | T3454 |
| Test name | |
| Test status | |
| Simulation time | 549433478 ps |
| CPU time | 1.86 seconds |
| Started | Sep 24 09:41:42 AM UTC 24 |
| Finished | Sep 24 09:41:45 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1271334815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_ tx_rx_disruption.1271334815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/171.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/172.usbdev_tx_rx_disruption.3907486062 |
| Short name | T3449 |
| Test name | |
| Test status | |
| Simulation time | 511793625 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:41:42 AM UTC 24 |
| Finished | Sep 24 09:41:45 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3907486062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_ tx_rx_disruption.3907486062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/172.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/173.usbdev_tx_rx_disruption.875399470 |
| Short name | T3453 |
| Test name | |
| Test status | |
| Simulation time | 617567182 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 09:41:42 AM UTC 24 |
| Finished | Sep 24 09:41:45 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=875399470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_t x_rx_disruption.875399470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/173.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/174.usbdev_endpoint_types.3687959463 |
| Short name | T560 |
| Test name | |
| Test status | |
| Simulation time | 327502555 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:45 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3687959463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_endpoint_types.3687959463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/174.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/174.usbdev_tx_rx_disruption.1721011332 |
| Short name | T3457 |
| Test name | |
| Test status | |
| Simulation time | 513439121 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:45 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1721011332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_ tx_rx_disruption.1721011332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/174.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/175.usbdev_endpoint_types.3494011906 |
| Short name | T3473 |
| Test name | |
| Test status | |
| Simulation time | 516767433 ps |
| CPU time | 2.35 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3494011906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_endpoint_types.3494011906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/175.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/175.usbdev_tx_rx_disruption.2744213780 |
| Short name | T3460 |
| Test name | |
| Test status | |
| Simulation time | 606375034 ps |
| CPU time | 1.81 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2744213780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_ tx_rx_disruption.2744213780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/175.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/176.usbdev_endpoint_types.3687720904 |
| Short name | T533 |
| Test name | |
| Test status | |
| Simulation time | 363027622 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:45 AM UTC 24 |
| Peak memory | 215760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3687720904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_endpoint_types.3687720904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/176.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/176.usbdev_tx_rx_disruption.2108769556 |
| Short name | T3463 |
| Test name | |
| Test status | |
| Simulation time | 595268007 ps |
| CPU time | 1.84 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2108769556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_ tx_rx_disruption.2108769556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/176.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/177.usbdev_endpoint_types.2907505812 |
| Short name | T3448 |
| Test name | |
| Test status | |
| Simulation time | 271725606 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:45 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2907505812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_endpoint_types.2907505812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/177.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/177.usbdev_tx_rx_disruption.3530278569 |
| Short name | T3466 |
| Test name | |
| Test status | |
| Simulation time | 490569136 ps |
| CPU time | 1.88 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3530278569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_ tx_rx_disruption.3530278569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/177.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/178.usbdev_tx_rx_disruption.3504830929 |
| Short name | T3464 |
| Test name | |
| Test status | |
| Simulation time | 617236297 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3504830929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_ tx_rx_disruption.3504830929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/178.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/179.usbdev_tx_rx_disruption.3267758510 |
| Short name | T3472 |
| Test name | |
| Test status | |
| Simulation time | 583844287 ps |
| CPU time | 1.94 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3267758510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_ tx_rx_disruption.3267758510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/179.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_alert_test.1644458973 |
| Short name | T1525 |
| Test name | |
| Test status | |
| Simulation time | 60259601 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:09:45 AM UTC 24 |
| Finished | Sep 24 09:09:47 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1644458973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 18.usbdev_alert_test.1644458973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_disconnect.1464308922 |
| Short name | T1479 |
| Test name | |
| Test status | |
| Simulation time | 4353977352 ps |
| CPU time | 6.9 seconds |
| Started | Sep 24 09:09:08 AM UTC 24 |
| Finished | Sep 24 09:09:16 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1464308922 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_disconnect.1464308922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_reset.2246092293 |
| Short name | T1508 |
| Test name | |
| Test status | |
| Simulation time | 19170320704 ps |
| CPU time | 24.08 seconds |
| Started | Sep 24 09:09:08 AM UTC 24 |
| Finished | Sep 24 09:09:33 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2246092293 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_reset.2246092293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_resume.592454323 |
| Short name | T1537 |
| Test name | |
| Test status | |
| Simulation time | 30748368304 ps |
| CPU time | 45.58 seconds |
| Started | Sep 24 09:09:08 AM UTC 24 |
| Finished | Sep 24 09:09:55 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=592454323 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_resume.592454323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_av_buffer.398575509 |
| Short name | T1471 |
| Test name | |
| Test status | |
| Simulation time | 151596657 ps |
| CPU time | 1.29 seconds |
| Started | Sep 24 09:09:08 AM UTC 24 |
| Finished | Sep 24 09:09:10 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=398575509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_av_buffer.398575509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_bitstuff_err.3848227076 |
| Short name | T1470 |
| Test name | |
| Test status | |
| Simulation time | 147831294 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 09:09:08 AM UTC 24 |
| Finished | Sep 24 09:09:10 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3848227076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_bitstuff_err.3848227076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_clear.3997864382 |
| Short name | T1482 |
| Test name | |
| Test status | |
| Simulation time | 348478984 ps |
| CPU time | 1.33 seconds |
| Started | Sep 24 09:09:17 AM UTC 24 |
| Finished | Sep 24 09:09:19 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3997864382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 18.usbdev_data_toggle_clear.3997864382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_restore.1832201969 |
| Short name | T452 |
| Test name | |
| Test status | |
| Simulation time | 649985046 ps |
| CPU time | 2.32 seconds |
| Started | Sep 24 09:09:17 AM UTC 24 |
| Finished | Sep 24 09:09:20 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1832201969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_data_toggle_restore.1832201969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_device_address.2610184959 |
| Short name | T1544 |
| Test name | |
| Test status | |
| Simulation time | 22541543270 ps |
| CPU time | 41.28 seconds |
| Started | Sep 24 09:09:17 AM UTC 24 |
| Finished | Sep 24 09:10:00 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2610184959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_address.2610184959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_device_timeout.1994691687 |
| Short name | T1510 |
| Test name | |
| Test status | |
| Simulation time | 848672026 ps |
| CPU time | 17.06 seconds |
| Started | Sep 24 09:09:17 AM UTC 24 |
| Finished | Sep 24 09:09:35 AM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1994691687 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_timeout.1994691687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_disable_endpoint.449785266 |
| Short name | T1488 |
| Test name | |
| Test status | |
| Simulation time | 871880897 ps |
| CPU time | 2.33 seconds |
| Started | Sep 24 09:09:17 AM UTC 24 |
| Finished | Sep 24 09:09:21 AM UTC 24 |
| Peak memory | 217648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=449785266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_disable_endpoint.449785266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_disconnected.2616866376 |
| Short name | T1483 |
| Test name | |
| Test status | |
| Simulation time | 202672718 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:09:17 AM UTC 24 |
| Finished | Sep 24 09:09:19 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2616866376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_disconnected.2616866376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_enable.3879993377 |
| Short name | T1481 |
| Test name | |
| Test status | |
| Simulation time | 34294492 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:09:17 AM UTC 24 |
| Finished | Sep 24 09:09:19 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3879993377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 18.usbdev_enable.3879993377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_access.20396618 |
| Short name | T1489 |
| Test name | |
| Test status | |
| Simulation time | 835025080 ps |
| CPU time | 2.85 seconds |
| Started | Sep 24 09:09:17 AM UTC 24 |
| Finished | Sep 24 09:09:21 AM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=20396618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_endpoint_access.20396618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_types.2456851272 |
| Short name | T1463 |
| Test name | |
| Test status | |
| Simulation time | 151627365 ps |
| CPU time | 0.84 seconds |
| Started | Sep 24 09:09:17 AM UTC 24 |
| Finished | Sep 24 09:09:19 AM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2456851272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_types.2456851272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_levels.830798095 |
| Short name | T337 |
| Test name | |
| Test status | |
| Simulation time | 151204228 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:09:17 AM UTC 24 |
| Finished | Sep 24 09:09:19 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=830798095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_fifo_levels.830798095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_rst.3441873019 |
| Short name | T1491 |
| Test name | |
| Test status | |
| Simulation time | 446046814 ps |
| CPU time | 3.86 seconds |
| Started | Sep 24 09:09:17 AM UTC 24 |
| Finished | Sep 24 09:09:22 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3441873019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_fifo_rst.3441873019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_in_iso.1569285027 |
| Short name | T1487 |
| Test name | |
| Test status | |
| Simulation time | 229102280 ps |
| CPU time | 1.98 seconds |
| Started | Sep 24 09:09:17 AM UTC 24 |
| Finished | Sep 24 09:09:21 AM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1569285027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_in_iso.1569285027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_in_stall.3427506629 |
| Short name | T1484 |
| Test name | |
| Test status | |
| Simulation time | 156681253 ps |
| CPU time | 0.84 seconds |
| Started | Sep 24 09:09:18 AM UTC 24 |
| Finished | Sep 24 09:09:19 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3427506629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_in_stall.3427506629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_in_trans.753571491 |
| Short name | T1485 |
| Test name | |
| Test status | |
| Simulation time | 215400987 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:09:18 AM UTC 24 |
| Finished | Sep 24 09:09:20 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=753571491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_in_trans.753571491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_invalid_sync.2372650619 |
| Short name | T1532 |
| Test name | |
| Test status | |
| Simulation time | 4058191775 ps |
| CPU time | 29.99 seconds |
| Started | Sep 24 09:09:17 AM UTC 24 |
| Finished | Sep 24 09:09:49 AM UTC 24 |
| Peak memory | 235004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2372650619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 18.usbdev_invalid_sync.2372650619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_iso_retraction.650677512 |
| Short name | T1605 |
| Test name | |
| Test status | |
| Simulation time | 6815056429 ps |
| CPU time | 78.06 seconds |
| Started | Sep 24 09:09:18 AM UTC 24 |
| Finished | Sep 24 09:10:38 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=650677512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 18.usbdev_iso_retraction.650677512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_link_in_err.3388190545 |
| Short name | T1494 |
| Test name | |
| Test status | |
| Simulation time | 188396217 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:09:28 AM UTC 24 |
| Finished | Sep 24 09:09:31 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3388190545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_link_in_err.3388190545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_link_resume.2400513512 |
| Short name | T1573 |
| Test name | |
| Test status | |
| Simulation time | 28639684165 ps |
| CPU time | 46.24 seconds |
| Started | Sep 24 09:09:28 AM UTC 24 |
| Finished | Sep 24 09:10:16 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2400513512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_link_resume.2400513512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_link_suspend.3261019421 |
| Short name | T1523 |
| Test name | |
| Test status | |
| Simulation time | 9205853439 ps |
| CPU time | 14.14 seconds |
| Started | Sep 24 09:09:28 AM UTC 24 |
| Finished | Sep 24 09:09:44 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3261019421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_link_suspend.3261019421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_low_speed_traffic.2995471896 |
| Short name | T1546 |
| Test name | |
| Test status | |
| Simulation time | 3858694645 ps |
| CPU time | 32.33 seconds |
| Started | Sep 24 09:09:28 AM UTC 24 |
| Finished | Sep 24 09:10:02 AM UTC 24 |
| Peak memory | 230396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2995471896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_low_speed_traffic.2995471896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_max_inter_pkt_delay.3453480780 |
| Short name | T1613 |
| Test name | |
| Test status | |
| Simulation time | 2763497155 ps |
| CPU time | 69.37 seconds |
| Started | Sep 24 09:09:28 AM UTC 24 |
| Finished | Sep 24 09:10:40 AM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3453480780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_inter_pkt_delay.3453480780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_in_transaction.391268606 |
| Short name | T1498 |
| Test name | |
| Test status | |
| Simulation time | 234470229 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:09:28 AM UTC 24 |
| Finished | Sep 24 09:09:31 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=391268606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_in_transaction.391268606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_out_transaction.898223649 |
| Short name | T1495 |
| Test name | |
| Test status | |
| Simulation time | 193820073 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 09:09:28 AM UTC 24 |
| Finished | Sep 24 09:09:31 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=898223649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 18.usbdev_max_length_out_transaction.898223649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_max_non_iso_usb_traffic.3387491900 |
| Short name | T1536 |
| Test name | |
| Test status | |
| Simulation time | 2995654604 ps |
| CPU time | 23.1 seconds |
| Started | Sep 24 09:09:28 AM UTC 24 |
| Finished | Sep 24 09:09:53 AM UTC 24 |
| Peak memory | 234884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3387491900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_non_iso_usb_traffic.3387491900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_min_inter_pkt_delay.839666127 |
| Short name | T1524 |
| Test name | |
| Test status | |
| Simulation time | 1543915566 ps |
| CPU time | 14.37 seconds |
| Started | Sep 24 09:09:28 AM UTC 24 |
| Finished | Sep 24 09:09:44 AM UTC 24 |
| Peak memory | 228292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=839666127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_inter_pkt_delay.839666127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_in_transaction.4291630113 |
| Short name | T1493 |
| Test name | |
| Test status | |
| Simulation time | 146156046 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:09:28 AM UTC 24 |
| Finished | Sep 24 09:09:31 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4291630113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_in_transaction.4291630113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_out_transaction.392650893 |
| Short name | T1499 |
| Test name | |
| Test status | |
| Simulation time | 185307339 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:09:28 AM UTC 24 |
| Finished | Sep 24 09:09:31 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=392650893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 18.usbdev_min_length_out_transaction.392650893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_out_iso.394344311 |
| Short name | T1500 |
| Test name | |
| Test status | |
| Simulation time | 173484013 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 09:09:29 AM UTC 24 |
| Finished | Sep 24 09:09:31 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=394344311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 18.usbdev_out_iso.394344311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_out_stall.4275017051 |
| Short name | T1496 |
| Test name | |
| Test status | |
| Simulation time | 194450747 ps |
| CPU time | 1.14 seconds |
| Started | Sep 24 09:09:29 AM UTC 24 |
| Finished | Sep 24 09:09:31 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4275017051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_out_stall.4275017051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_out_trans_nak.917873115 |
| Short name | T1502 |
| Test name | |
| Test status | |
| Simulation time | 206629510 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:09:29 AM UTC 24 |
| Finished | Sep 24 09:09:32 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=917873115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_out_trans_nak.917873115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_pending_in_trans.1186320089 |
| Short name | T1503 |
| Test name | |
| Test status | |
| Simulation time | 207063772 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:09:29 AM UTC 24 |
| Finished | Sep 24 09:09:32 AM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1186320089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_pending_in_trans.1186320089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_pinflip.224541352 |
| Short name | T1505 |
| Test name | |
| Test status | |
| Simulation time | 217251693 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 09:09:29 AM UTC 24 |
| Finished | Sep 24 09:09:32 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=224541352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_pinflip.224541352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_usb_ref_disable.464153044 |
| Short name | T1501 |
| Test name | |
| Test status | |
| Simulation time | 153044972 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:09:29 AM UTC 24 |
| Finished | Sep 24 09:09:31 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=464153044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 18.usbdev_phy_config_usb_ref_disable.464153044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_phy_pins_sense.3795418032 |
| Short name | T1497 |
| Test name | |
| Test status | |
| Simulation time | 78872061 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:09:29 AM UTC 24 |
| Finished | Sep 24 09:09:31 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3795418032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_pins_sense.3795418032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_buffer.1559595303 |
| Short name | T1590 |
| Test name | |
| Test status | |
| Simulation time | 20555143344 ps |
| CPU time | 56.1 seconds |
| Started | Sep 24 09:09:29 AM UTC 24 |
| Finished | Sep 24 09:10:27 AM UTC 24 |
| Peak memory | 228324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1559595303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_pkt_buffer.1559595303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_received.1761410607 |
| Short name | T1504 |
| Test name | |
| Test status | |
| Simulation time | 197529564 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 09:09:29 AM UTC 24 |
| Finished | Sep 24 09:09:32 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1761410607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_pkt_received.1761410607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_sent.3296420300 |
| Short name | T1507 |
| Test name | |
| Test status | |
| Simulation time | 152086165 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:09:30 AM UTC 24 |
| Finished | Sep 24 09:09:33 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3296420300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_pkt_sent.3296420300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_in_transaction.2766049850 |
| Short name | T1516 |
| Test name | |
| Test status | |
| Simulation time | 166371730 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:09:38 AM UTC 24 |
| Finished | Sep 24 09:09:41 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2766049850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_random_length_in_transaction.2766049850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_out_transaction.65768785 |
| Short name | T1511 |
| Test name | |
| Test status | |
| Simulation time | 197602475 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:09:38 AM UTC 24 |
| Finished | Sep 24 09:09:40 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=65768785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transa ction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 18.usbdev_random_length_out_transaction.65768785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_resume_link_active.1146274960 |
| Short name | T1574 |
| Test name | |
| Test status | |
| Simulation time | 20181823011 ps |
| CPU time | 36.75 seconds |
| Started | Sep 24 09:09:38 AM UTC 24 |
| Finished | Sep 24 09:10:16 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1146274960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 18.usbdev_resume_link_active.1146274960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_rx_crc_err.612229163 |
| Short name | T1515 |
| Test name | |
| Test status | |
| Simulation time | 201490272 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:09:38 AM UTC 24 |
| Finished | Sep 24 09:09:41 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=612229163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_rx_crc_err.612229163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_rx_full.2978986323 |
| Short name | T1521 |
| Test name | |
| Test status | |
| Simulation time | 400863596 ps |
| CPU time | 2.54 seconds |
| Started | Sep 24 09:09:38 AM UTC 24 |
| Finished | Sep 24 09:09:42 AM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2978986323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_rx_full.2978986323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_setup_stage.2736235871 |
| Short name | T1514 |
| Test name | |
| Test status | |
| Simulation time | 146830674 ps |
| CPU time | 1.38 seconds |
| Started | Sep 24 09:09:38 AM UTC 24 |
| Finished | Sep 24 09:09:41 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2736235871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_setup_stage.2736235871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_setup_trans_ignored.3487697269 |
| Short name | T1513 |
| Test name | |
| Test status | |
| Simulation time | 184581657 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:09:38 AM UTC 24 |
| Finished | Sep 24 09:09:41 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3487697269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 18.usbdev_setup_trans_ignored.3487697269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_smoke.3609595254 |
| Short name | T1519 |
| Test name | |
| Test status | |
| Simulation time | 260974014 ps |
| CPU time | 1.83 seconds |
| Started | Sep 24 09:09:38 AM UTC 24 |
| Finished | Sep 24 09:09:41 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3609595254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_smoke.3609595254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_spurious_pids_ignored.1214556603 |
| Short name | T1622 |
| Test name | |
| Test status | |
| Simulation time | 2554218232 ps |
| CPU time | 66.36 seconds |
| Started | Sep 24 09:09:38 AM UTC 24 |
| Finished | Sep 24 09:10:47 AM UTC 24 |
| Peak memory | 234860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1214556603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_spurious_pids_ignored.1214556603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_stall_priority_over_nak.3284123979 |
| Short name | T1518 |
| Test name | |
| Test status | |
| Simulation time | 195035735 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:09:38 AM UTC 24 |
| Finished | Sep 24 09:09:41 AM UTC 24 |
| Peak memory | 215372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3284123979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stall_priority_over_nak.3284123979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_stall_trans.3187496527 |
| Short name | T1517 |
| Test name | |
| Test status | |
| Simulation time | 165044331 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:09:38 AM UTC 24 |
| Finished | Sep 24 09:09:41 AM UTC 24 |
| Peak memory | 215604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3187496527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_stall_trans.3187496527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_stream_len_max.2944644124 |
| Short name | T1520 |
| Test name | |
| Test status | |
| Simulation time | 308363735 ps |
| CPU time | 2.03 seconds |
| Started | Sep 24 09:09:38 AM UTC 24 |
| Finished | Sep 24 09:09:42 AM UTC 24 |
| Peak memory | 217736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2944644124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stream_len_max.2944644124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_streaming_out.1408428834 |
| Short name | T1558 |
| Test name | |
| Test status | |
| Simulation time | 3792756564 ps |
| CPU time | 29.75 seconds |
| Started | Sep 24 09:09:38 AM UTC 24 |
| Finished | Sep 24 09:10:10 AM UTC 24 |
| Peak memory | 228360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1408428834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_streaming_out.1408428834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_timeout_missing_host_handshake.162166553 |
| Short name | T1535 |
| Test name | |
| Test status | |
| Simulation time | 3857242940 ps |
| CPU time | 30.96 seconds |
| Started | Sep 24 09:09:17 AM UTC 24 |
| Finished | Sep 24 09:09:49 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=162166553 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_timeout_missing_host_handshake.162166553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/18.usbdev_tx_rx_disruption.3273885611 |
| Short name | T224 |
| Test name | |
| Test status | |
| Simulation time | 504560696 ps |
| CPU time | 2.7 seconds |
| Started | Sep 24 09:09:38 AM UTC 24 |
| Finished | Sep 24 09:09:42 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3273885611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_t x_rx_disruption.3273885611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/18.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/180.usbdev_tx_rx_disruption.3375176468 |
| Short name | T3465 |
| Test name | |
| Test status | |
| Simulation time | 441660476 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3375176468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_ tx_rx_disruption.3375176468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/180.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/181.usbdev_endpoint_types.1142129150 |
| Short name | T3461 |
| Test name | |
| Test status | |
| Simulation time | 352705102 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1142129150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_endpoint_types.1142129150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/181.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/181.usbdev_tx_rx_disruption.1842634404 |
| Short name | T3458 |
| Test name | |
| Test status | |
| Simulation time | 462144862 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:45 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1842634404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_ tx_rx_disruption.1842634404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/181.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/182.usbdev_endpoint_types.459300726 |
| Short name | T3450 |
| Test name | |
| Test status | |
| Simulation time | 174488947 ps |
| CPU time | 0.96 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:45 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=459300726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 182.usbdev_endpoint_types.459300726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/182.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/182.usbdev_tx_rx_disruption.2360728601 |
| Short name | T3467 |
| Test name | |
| Test status | |
| Simulation time | 548902592 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2360728601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_ tx_rx_disruption.2360728601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/182.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/183.usbdev_endpoint_types.2802607716 |
| Short name | T3462 |
| Test name | |
| Test status | |
| Simulation time | 420044123 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2802607716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_endpoint_types.2802607716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/183.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/183.usbdev_tx_rx_disruption.782685205 |
| Short name | T3470 |
| Test name | |
| Test status | |
| Simulation time | 538165868 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=782685205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_t x_rx_disruption.782685205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/183.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/184.usbdev_endpoint_types.2952470909 |
| Short name | T3459 |
| Test name | |
| Test status | |
| Simulation time | 355985010 ps |
| CPU time | 1.23 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:45 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2952470909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_endpoint_types.2952470909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/184.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/184.usbdev_tx_rx_disruption.648416352 |
| Short name | T3475 |
| Test name | |
| Test status | |
| Simulation time | 753109103 ps |
| CPU time | 2.04 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=648416352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_t x_rx_disruption.648416352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/184.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/185.usbdev_endpoint_types.445673251 |
| Short name | T501 |
| Test name | |
| Test status | |
| Simulation time | 731261390 ps |
| CPU time | 2.11 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=445673251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 185.usbdev_endpoint_types.445673251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/185.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/185.usbdev_tx_rx_disruption.508933080 |
| Short name | T3477 |
| Test name | |
| Test status | |
| Simulation time | 599875541 ps |
| CPU time | 1.97 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=508933080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_t x_rx_disruption.508933080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/185.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/186.usbdev_endpoint_types.3210414029 |
| Short name | T3468 |
| Test name | |
| Test status | |
| Simulation time | 423053697 ps |
| CPU time | 1.34 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3210414029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_endpoint_types.3210414029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/186.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/186.usbdev_tx_rx_disruption.3110529580 |
| Short name | T3476 |
| Test name | |
| Test status | |
| Simulation time | 535822305 ps |
| CPU time | 1.87 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3110529580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_ tx_rx_disruption.3110529580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/186.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/187.usbdev_endpoint_types.3665950637 |
| Short name | T3469 |
| Test name | |
| Test status | |
| Simulation time | 328770698 ps |
| CPU time | 1.4 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3665950637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_endpoint_types.3665950637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/187.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/187.usbdev_tx_rx_disruption.1953501207 |
| Short name | T3478 |
| Test name | |
| Test status | |
| Simulation time | 597644723 ps |
| CPU time | 1.84 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1953501207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_ tx_rx_disruption.1953501207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/187.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/188.usbdev_endpoint_types.1890351568 |
| Short name | T3471 |
| Test name | |
| Test status | |
| Simulation time | 290949945 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1890351568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_endpoint_types.1890351568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/188.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/188.usbdev_tx_rx_disruption.29527462 |
| Short name | T3474 |
| Test name | |
| Test status | |
| Simulation time | 531588136 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:41:43 AM UTC 24 |
| Finished | Sep 24 09:41:46 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=29527462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_tx _rx_disruption.29527462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/188.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/189.usbdev_tx_rx_disruption.4125997499 |
| Short name | T3489 |
| Test name | |
| Test status | |
| Simulation time | 477567037 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:42:35 AM UTC 24 |
| Finished | Sep 24 09:42:39 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4125997499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_ tx_rx_disruption.4125997499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/189.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_alert_test.1564601783 |
| Short name | T1580 |
| Test name | |
| Test status | |
| Simulation time | 39806472 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:10:20 AM UTC 24 |
| Finished | Sep 24 09:10:22 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1564601783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 19.usbdev_alert_test.1564601783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_disconnect.2370352459 |
| Short name | T1547 |
| Test name | |
| Test status | |
| Simulation time | 9575945013 ps |
| CPU time | 17.32 seconds |
| Started | Sep 24 09:09:45 AM UTC 24 |
| Finished | Sep 24 09:10:04 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2370352459 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_disconnect.2370352459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_reset.1495097962 |
| Short name | T1572 |
| Test name | |
| Test status | |
| Simulation time | 20980760101 ps |
| CPU time | 28.97 seconds |
| Started | Sep 24 09:09:45 AM UTC 24 |
| Finished | Sep 24 09:10:15 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1495097962 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_reset.1495097962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_resume.3409608413 |
| Short name | T1592 |
| Test name | |
| Test status | |
| Simulation time | 26032940933 ps |
| CPU time | 42.19 seconds |
| Started | Sep 24 09:09:45 AM UTC 24 |
| Finished | Sep 24 09:10:29 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3409608413 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_resume.3409608413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_av_buffer.1274932845 |
| Short name | T1528 |
| Test name | |
| Test status | |
| Simulation time | 174530797 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:09:45 AM UTC 24 |
| Finished | Sep 24 09:09:48 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1274932845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_av_buffer.1274932845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_bitstuff_err.241237710 |
| Short name | T1527 |
| Test name | |
| Test status | |
| Simulation time | 156315717 ps |
| CPU time | 1.38 seconds |
| Started | Sep 24 09:09:45 AM UTC 24 |
| Finished | Sep 24 09:09:48 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=241237710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_bitstuff_err.241237710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_clear.2031287496 |
| Short name | T1530 |
| Test name | |
| Test status | |
| Simulation time | 273601809 ps |
| CPU time | 2.01 seconds |
| Started | Sep 24 09:09:45 AM UTC 24 |
| Finished | Sep 24 09:09:48 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2031287496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 19.usbdev_data_toggle_clear.2031287496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_restore.945015480 |
| Short name | T1533 |
| Test name | |
| Test status | |
| Simulation time | 840091709 ps |
| CPU time | 2.47 seconds |
| Started | Sep 24 09:09:45 AM UTC 24 |
| Finished | Sep 24 09:09:49 AM UTC 24 |
| Peak memory | 217916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=945015480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_restore.945015480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_device_address.3252466458 |
| Short name | T302 |
| Test name | |
| Test status | |
| Simulation time | 50540725382 ps |
| CPU time | 95.13 seconds |
| Started | Sep 24 09:09:45 AM UTC 24 |
| Finished | Sep 24 09:11:23 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3252466458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_address.3252466458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_device_timeout.1158016950 |
| Short name | T1559 |
| Test name | |
| Test status | |
| Simulation time | 971779587 ps |
| CPU time | 23.83 seconds |
| Started | Sep 24 09:09:46 AM UTC 24 |
| Finished | Sep 24 09:10:11 AM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1158016950 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_timeout.1158016950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_disable_endpoint.3737976785 |
| Short name | T1534 |
| Test name | |
| Test status | |
| Simulation time | 713810080 ps |
| CPU time | 2.6 seconds |
| Started | Sep 24 09:09:46 AM UTC 24 |
| Finished | Sep 24 09:09:49 AM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3737976785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_disable_endpoint.3737976785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_disconnected.3517614652 |
| Short name | T1529 |
| Test name | |
| Test status | |
| Simulation time | 150048042 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 09:09:46 AM UTC 24 |
| Finished | Sep 24 09:09:48 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3517614652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_disconnected.3517614652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_enable.3503817687 |
| Short name | T1526 |
| Test name | |
| Test status | |
| Simulation time | 33928541 ps |
| CPU time | 0.83 seconds |
| Started | Sep 24 09:09:46 AM UTC 24 |
| Finished | Sep 24 09:09:48 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3503817687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 19.usbdev_enable.3503817687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_access.2576104043 |
| Short name | T1543 |
| Test name | |
| Test status | |
| Simulation time | 940712679 ps |
| CPU time | 4.66 seconds |
| Started | Sep 24 09:09:53 AM UTC 24 |
| Finished | Sep 24 09:09:59 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2576104043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_access.2576104043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_levels.2861373522 |
| Short name | T374 |
| Test name | |
| Test status | |
| Simulation time | 249467394 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:09:53 AM UTC 24 |
| Finished | Sep 24 09:09:56 AM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2861373522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_fifo_levels.2861373522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_rst.600869116 |
| Short name | T1542 |
| Test name | |
| Test status | |
| Simulation time | 288072120 ps |
| CPU time | 3.05 seconds |
| Started | Sep 24 09:09:53 AM UTC 24 |
| Finished | Sep 24 09:09:57 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=600869116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_fifo_rst.600869116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_in_iso.1153510636 |
| Short name | T1538 |
| Test name | |
| Test status | |
| Simulation time | 198664422 ps |
| CPU time | 1.29 seconds |
| Started | Sep 24 09:09:53 AM UTC 24 |
| Finished | Sep 24 09:09:56 AM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1153510636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_in_iso.1153510636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_in_stall.2675649279 |
| Short name | T1539 |
| Test name | |
| Test status | |
| Simulation time | 160257541 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 09:09:53 AM UTC 24 |
| Finished | Sep 24 09:09:56 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2675649279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_stall.2675649279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_in_trans.3913902231 |
| Short name | T1540 |
| Test name | |
| Test status | |
| Simulation time | 168944437 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:09:53 AM UTC 24 |
| Finished | Sep 24 09:09:56 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3913902231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_trans.3913902231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_invalid_sync.4241260297 |
| Short name | T1576 |
| Test name | |
| Test status | |
| Simulation time | 2972420988 ps |
| CPU time | 25.22 seconds |
| Started | Sep 24 09:09:53 AM UTC 24 |
| Finished | Sep 24 09:10:20 AM UTC 24 |
| Peak memory | 234960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4241260297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 19.usbdev_invalid_sync.4241260297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_iso_retraction.3069253483 |
| Short name | T1682 |
| Test name | |
| Test status | |
| Simulation time | 12919922320 ps |
| CPU time | 88.24 seconds |
| Started | Sep 24 09:09:53 AM UTC 24 |
| Finished | Sep 24 09:11:24 AM UTC 24 |
| Peak memory | 218316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3069253483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_iso_retraction.3069253483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_link_in_err.762419978 |
| Short name | T1541 |
| Test name | |
| Test status | |
| Simulation time | 184337071 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:09:53 AM UTC 24 |
| Finished | Sep 24 09:09:56 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=762419978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_link_in_err.762419978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_link_resume.1029823336 |
| Short name | T1575 |
| Test name | |
| Test status | |
| Simulation time | 13604670731 ps |
| CPU time | 22.07 seconds |
| Started | Sep 24 09:09:54 AM UTC 24 |
| Finished | Sep 24 09:10:17 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1029823336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_link_resume.1029823336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_link_suspend.2609348550 |
| Short name | T110 |
| Test name | |
| Test status | |
| Simulation time | 5107567730 ps |
| CPU time | 7.67 seconds |
| Started | Sep 24 09:09:54 AM UTC 24 |
| Finished | Sep 24 09:10:02 AM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2609348550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_link_suspend.2609348550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_low_speed_traffic.760982097 |
| Short name | T1582 |
| Test name | |
| Test status | |
| Simulation time | 2881089668 ps |
| CPU time | 27.26 seconds |
| Started | Sep 24 09:09:54 AM UTC 24 |
| Finished | Sep 24 09:10:22 AM UTC 24 |
| Peak memory | 235220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=760982097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_low_speed_traffic.760982097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_max_inter_pkt_delay.1875463048 |
| Short name | T1591 |
| Test name | |
| Test status | |
| Simulation time | 2305245599 ps |
| CPU time | 22.72 seconds |
| Started | Sep 24 09:10:03 AM UTC 24 |
| Finished | Sep 24 09:10:27 AM UTC 24 |
| Peak memory | 230440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1875463048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_inter_pkt_delay.1875463048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_in_transaction.2771492949 |
| Short name | T1551 |
| Test name | |
| Test status | |
| Simulation time | 242859260 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 09:10:03 AM UTC 24 |
| Finished | Sep 24 09:10:06 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2771492949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_in_transaction.2771492949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_out_transaction.1888013792 |
| Short name | T1550 |
| Test name | |
| Test status | |
| Simulation time | 216824274 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:10:03 AM UTC 24 |
| Finished | Sep 24 09:10:06 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1888013792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_out_transaction.1888013792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_max_non_iso_usb_traffic.3596080440 |
| Short name | T1589 |
| Test name | |
| Test status | |
| Simulation time | 2410797315 ps |
| CPU time | 20.65 seconds |
| Started | Sep 24 09:10:04 AM UTC 24 |
| Finished | Sep 24 09:10:25 AM UTC 24 |
| Peak memory | 235252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3596080440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_non_iso_usb_traffic.3596080440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_min_inter_pkt_delay.717058086 |
| Short name | T1659 |
| Test name | |
| Test status | |
| Simulation time | 2482410460 ps |
| CPU time | 64.73 seconds |
| Started | Sep 24 09:10:04 AM UTC 24 |
| Finished | Sep 24 09:11:10 AM UTC 24 |
| Peak memory | 228464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=717058086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_inter_pkt_delay.717058086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_in_transaction.2480599334 |
| Short name | T1548 |
| Test name | |
| Test status | |
| Simulation time | 179492164 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:10:04 AM UTC 24 |
| Finished | Sep 24 09:10:06 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2480599334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_in_transaction.2480599334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_out_transaction.686347208 |
| Short name | T1552 |
| Test name | |
| Test status | |
| Simulation time | 183931521 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:10:04 AM UTC 24 |
| Finished | Sep 24 09:10:06 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=686347208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 19.usbdev_min_length_out_transaction.686347208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_out_iso.2270986392 |
| Short name | T1549 |
| Test name | |
| Test status | |
| Simulation time | 148726650 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:10:04 AM UTC 24 |
| Finished | Sep 24 09:10:06 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2270986392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_out_iso.2270986392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_out_stall.3265448962 |
| Short name | T1553 |
| Test name | |
| Test status | |
| Simulation time | 161309309 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 09:10:04 AM UTC 24 |
| Finished | Sep 24 09:10:06 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3265448962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_out_stall.3265448962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_out_trans_nak.725057414 |
| Short name | T1512 |
| Test name | |
| Test status | |
| Simulation time | 182189403 ps |
| CPU time | 1.3 seconds |
| Started | Sep 24 09:10:04 AM UTC 24 |
| Finished | Sep 24 09:10:06 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=725057414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_out_trans_nak.725057414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_pending_in_trans.3252068500 |
| Short name | T1554 |
| Test name | |
| Test status | |
| Simulation time | 152286252 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:10:04 AM UTC 24 |
| Finished | Sep 24 09:10:06 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3252068500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_pending_in_trans.3252068500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_pinflip.2840860382 |
| Short name | T1555 |
| Test name | |
| Test status | |
| Simulation time | 288545567 ps |
| CPU time | 1.84 seconds |
| Started | Sep 24 09:10:04 AM UTC 24 |
| Finished | Sep 24 09:10:07 AM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2840860382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_pinflip.2840860382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_usb_ref_disable.1551636435 |
| Short name | T1561 |
| Test name | |
| Test status | |
| Simulation time | 146838564 ps |
| CPU time | 1.31 seconds |
| Started | Sep 24 09:10:11 AM UTC 24 |
| Finished | Sep 24 09:10:14 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1551636435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_usb_ref_disable.1551636435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_phy_pins_sense.2099438354 |
| Short name | T1560 |
| Test name | |
| Test status | |
| Simulation time | 43794134 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:10:11 AM UTC 24 |
| Finished | Sep 24 09:10:13 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2099438354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_pins_sense.2099438354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_buffer.2396716746 |
| Short name | T1606 |
| Test name | |
| Test status | |
| Simulation time | 9728656164 ps |
| CPU time | 26.57 seconds |
| Started | Sep 24 09:10:11 AM UTC 24 |
| Finished | Sep 24 09:10:39 AM UTC 24 |
| Peak memory | 228516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2396716746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_pkt_buffer.2396716746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_received.4250712979 |
| Short name | T1563 |
| Test name | |
| Test status | |
| Simulation time | 179703472 ps |
| CPU time | 1.34 seconds |
| Started | Sep 24 09:10:12 AM UTC 24 |
| Finished | Sep 24 09:10:14 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4250712979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_pkt_received.4250712979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_sent.1062480653 |
| Short name | T1568 |
| Test name | |
| Test status | |
| Simulation time | 297453060 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:10:12 AM UTC 24 |
| Finished | Sep 24 09:10:14 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1062480653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_pkt_sent.1062480653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_in_transaction.2223275294 |
| Short name | T1566 |
| Test name | |
| Test status | |
| Simulation time | 189362935 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:10:12 AM UTC 24 |
| Finished | Sep 24 09:10:14 AM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2223275294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_random_length_in_transaction.2223275294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_out_transaction.1229187421 |
| Short name | T1564 |
| Test name | |
| Test status | |
| Simulation time | 235350625 ps |
| CPU time | 1.25 seconds |
| Started | Sep 24 09:10:12 AM UTC 24 |
| Finished | Sep 24 09:10:14 AM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1229187421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_random_length_out_transaction.1229187421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_resume_link_active.825901124 |
| Short name | T1620 |
| Test name | |
| Test status | |
| Simulation time | 20177179418 ps |
| CPU time | 29.8 seconds |
| Started | Sep 24 09:10:12 AM UTC 24 |
| Finished | Sep 24 09:10:43 AM UTC 24 |
| Peak memory | 217896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=825901124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 19.usbdev_resume_link_active.825901124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_rx_crc_err.2259924404 |
| Short name | T1565 |
| Test name | |
| Test status | |
| Simulation time | 159569191 ps |
| CPU time | 1.28 seconds |
| Started | Sep 24 09:10:12 AM UTC 24 |
| Finished | Sep 24 09:10:14 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2259924404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_rx_crc_err.2259924404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_rx_full.3942231709 |
| Short name | T386 |
| Test name | |
| Test status | |
| Simulation time | 352882936 ps |
| CPU time | 2.32 seconds |
| Started | Sep 24 09:10:12 AM UTC 24 |
| Finished | Sep 24 09:10:15 AM UTC 24 |
| Peak memory | 217952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3942231709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_rx_full.3942231709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_setup_stage.3825785457 |
| Short name | T1567 |
| Test name | |
| Test status | |
| Simulation time | 148483931 ps |
| CPU time | 1.35 seconds |
| Started | Sep 24 09:10:12 AM UTC 24 |
| Finished | Sep 24 09:10:14 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3825785457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_setup_stage.3825785457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_setup_trans_ignored.1318055980 |
| Short name | T1569 |
| Test name | |
| Test status | |
| Simulation time | 193096007 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 09:10:12 AM UTC 24 |
| Finished | Sep 24 09:10:14 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1318055980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 19.usbdev_setup_trans_ignored.1318055980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_smoke.459136271 |
| Short name | T1571 |
| Test name | |
| Test status | |
| Simulation time | 218217066 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:10:12 AM UTC 24 |
| Finished | Sep 24 09:10:15 AM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=459136271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_smoke.459136271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_spurious_pids_ignored.2618137512 |
| Short name | T1635 |
| Test name | |
| Test status | |
| Simulation time | 1535541803 ps |
| CPU time | 39.65 seconds |
| Started | Sep 24 09:10:12 AM UTC 24 |
| Finished | Sep 24 09:10:53 AM UTC 24 |
| Peak memory | 228292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2618137512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_spurious_pids_ignored.2618137512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_stall_priority_over_nak.1002454685 |
| Short name | T1570 |
| Test name | |
| Test status | |
| Simulation time | 176634332 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:10:12 AM UTC 24 |
| Finished | Sep 24 09:10:15 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1002454685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stall_priority_over_nak.1002454685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_stall_trans.3882971254 |
| Short name | T1578 |
| Test name | |
| Test status | |
| Simulation time | 158989754 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:10:20 AM UTC 24 |
| Finished | Sep 24 09:10:22 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3882971254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_stall_trans.3882971254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_stream_len_max.2874151917 |
| Short name | T1584 |
| Test name | |
| Test status | |
| Simulation time | 413742360 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 09:10:20 AM UTC 24 |
| Finished | Sep 24 09:10:23 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2874151917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stream_len_max.2874151917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_streaming_out.2285441530 |
| Short name | T1678 |
| Test name | |
| Test status | |
| Simulation time | 2274369623 ps |
| CPU time | 58.48 seconds |
| Started | Sep 24 09:10:20 AM UTC 24 |
| Finished | Sep 24 09:11:20 AM UTC 24 |
| Peak memory | 234888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2285441530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_streaming_out.2285441530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_timeout_missing_host_handshake.3915968653 |
| Short name | T1557 |
| Test name | |
| Test status | |
| Simulation time | 948137123 ps |
| CPU time | 21.46 seconds |
| Started | Sep 24 09:09:46 AM UTC 24 |
| Finished | Sep 24 09:10:08 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3915968653 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_timeout_missing_host_handshake.3915968653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/19.usbdev_tx_rx_disruption.249762295 |
| Short name | T1586 |
| Test name | |
| Test status | |
| Simulation time | 464083474 ps |
| CPU time | 2 seconds |
| Started | Sep 24 09:10:20 AM UTC 24 |
| Finished | Sep 24 09:10:23 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=249762295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_tx _rx_disruption.249762295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/19.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/190.usbdev_endpoint_types.1072484912 |
| Short name | T3479 |
| Test name | |
| Test status | |
| Simulation time | 197470121 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:42:35 AM UTC 24 |
| Finished | Sep 24 09:42:38 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1072484912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_endpoint_types.1072484912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/190.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/190.usbdev_tx_rx_disruption.2928735453 |
| Short name | T3487 |
| Test name | |
| Test status | |
| Simulation time | 484060696 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:42:35 AM UTC 24 |
| Finished | Sep 24 09:42:39 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2928735453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_ tx_rx_disruption.2928735453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/190.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/191.usbdev_endpoint_types.300713396 |
| Short name | T3481 |
| Test name | |
| Test status | |
| Simulation time | 840033403 ps |
| CPU time | 2.13 seconds |
| Started | Sep 24 09:42:35 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=300713396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 191.usbdev_endpoint_types.300713396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/191.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/191.usbdev_tx_rx_disruption.3750215498 |
| Short name | T3498 |
| Test name | |
| Test status | |
| Simulation time | 470847915 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 09:42:35 AM UTC 24 |
| Finished | Sep 24 09:42:39 AM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3750215498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_ tx_rx_disruption.3750215498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/191.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/192.usbdev_endpoint_types.4207292970 |
| Short name | T3484 |
| Test name | |
| Test status | |
| Simulation time | 144457134 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:42:35 AM UTC 24 |
| Finished | Sep 24 09:42:39 AM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4207292970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_endpoint_types.4207292970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/192.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/192.usbdev_tx_rx_disruption.6603685 |
| Short name | T3495 |
| Test name | |
| Test status | |
| Simulation time | 596594747 ps |
| CPU time | 1.76 seconds |
| Started | Sep 24 09:42:35 AM UTC 24 |
| Finished | Sep 24 09:42:39 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=6603685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_tx_ rx_disruption.6603685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/192.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/193.usbdev_endpoint_types.1308218161 |
| Short name | T3497 |
| Test name | |
| Test status | |
| Simulation time | 545149417 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:42:35 AM UTC 24 |
| Finished | Sep 24 09:42:39 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1308218161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_endpoint_types.1308218161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/193.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/193.usbdev_tx_rx_disruption.154320518 |
| Short name | T3504 |
| Test name | |
| Test status | |
| Simulation time | 547096637 ps |
| CPU time | 1.91 seconds |
| Started | Sep 24 09:42:35 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=154320518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_t x_rx_disruption.154320518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/193.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/194.usbdev_endpoint_types.2765912632 |
| Short name | T550 |
| Test name | |
| Test status | |
| Simulation time | 178368154 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 09:42:35 AM UTC 24 |
| Finished | Sep 24 09:42:39 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2765912632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_endpoint_types.2765912632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/194.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/194.usbdev_tx_rx_disruption.1010965724 |
| Short name | T3492 |
| Test name | |
| Test status | |
| Simulation time | 488300029 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:39 AM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1010965724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_ tx_rx_disruption.1010965724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/194.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/195.usbdev_endpoint_types.2605029458 |
| Short name | T3486 |
| Test name | |
| Test status | |
| Simulation time | 173950450 ps |
| CPU time | 0.89 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:39 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2605029458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_endpoint_types.2605029458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/195.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/195.usbdev_tx_rx_disruption.1156426140 |
| Short name | T3501 |
| Test name | |
| Test status | |
| Simulation time | 510862024 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 215504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1156426140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_ tx_rx_disruption.1156426140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/195.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/196.usbdev_endpoint_types.983166333 |
| Short name | T3491 |
| Test name | |
| Test status | |
| Simulation time | 474852526 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:39 AM UTC 24 |
| Peak memory | 215476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=983166333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 196.usbdev_endpoint_types.983166333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/196.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/196.usbdev_tx_rx_disruption.3449495279 |
| Short name | T3499 |
| Test name | |
| Test status | |
| Simulation time | 500093841 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:39 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3449495279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_ tx_rx_disruption.3449495279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/196.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/197.usbdev_tx_rx_disruption.2468545425 |
| Short name | T3493 |
| Test name | |
| Test status | |
| Simulation time | 619290085 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:39 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2468545425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_ tx_rx_disruption.2468545425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/197.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/198.usbdev_endpoint_types.63580062 |
| Short name | T3490 |
| Test name | |
| Test status | |
| Simulation time | 432266402 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:39 AM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=63580062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 198.usbdev_endpoint_types.63580062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/198.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/198.usbdev_tx_rx_disruption.2822470854 |
| Short name | T3494 |
| Test name | |
| Test status | |
| Simulation time | 610559894 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:39 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2822470854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_ tx_rx_disruption.2822470854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/198.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/199.usbdev_endpoint_types.2286656895 |
| Short name | T3488 |
| Test name | |
| Test status | |
| Simulation time | 391748765 ps |
| CPU time | 1.22 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:39 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2286656895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_endpoint_types.2286656895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/199.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/199.usbdev_tx_rx_disruption.1760297447 |
| Short name | T3496 |
| Test name | |
| Test status | |
| Simulation time | 575423870 ps |
| CPU time | 1.63 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:39 AM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1760297447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_ tx_rx_disruption.1760297447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/199.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_alert_test.1387323697 |
| Short name | T203 |
| Test name | |
| Test status | |
| Simulation time | 56141419 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 08:57:12 AM UTC 24 |
| Finished | Sep 24 08:57:15 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1387323697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 2.usbdev_alert_test.1387323697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_disconnect.652720773 |
| Short name | T13 |
| Test name | |
| Test status | |
| Simulation time | 5553721346 ps |
| CPU time | 12.93 seconds |
| Started | Sep 24 08:55:36 AM UTC 24 |
| Finished | Sep 24 08:55:50 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=652720773 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_disconnect.652720773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_reset.125398602 |
| Short name | T15 |
| Test name | |
| Test status | |
| Simulation time | 20533082117 ps |
| CPU time | 62.98 seconds |
| Started | Sep 24 08:55:36 AM UTC 24 |
| Finished | Sep 24 08:56:41 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=125398602 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_reset.125398602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_resume.177861114 |
| Short name | T14 |
| Test name | |
| Test status | |
| Simulation time | 30909358738 ps |
| CPU time | 47.08 seconds |
| Started | Sep 24 08:55:38 AM UTC 24 |
| Finished | Sep 24 08:56:27 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=177861114 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_resume.177861114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_av_buffer.443846897 |
| Short name | T612 |
| Test name | |
| Test status | |
| Simulation time | 160025435 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 08:55:39 AM UTC 24 |
| Finished | Sep 24 08:55:42 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=443846897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_av_buffer.443846897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_av_empty.954512100 |
| Short name | T53 |
| Test name | |
| Test status | |
| Simulation time | 200208781 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 08:55:41 AM UTC 24 |
| Finished | Sep 24 08:55:44 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=954512100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_av_empty.954512100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_av_overflow.283518853 |
| Short name | T67 |
| Test name | |
| Test status | |
| Simulation time | 164111350 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 08:55:41 AM UTC 24 |
| Finished | Sep 24 08:55:43 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=283518853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_av_overflow.283518853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_bitstuff_err.3394211743 |
| Short name | T86 |
| Test name | |
| Test status | |
| Simulation time | 169184454 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 08:55:42 AM UTC 24 |
| Finished | Sep 24 08:55:45 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3394211743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_bitstuff_err.3394211743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_clear.2240956973 |
| Short name | T613 |
| Test name | |
| Test status | |
| Simulation time | 184068168 ps |
| CPU time | 1.74 seconds |
| Started | Sep 24 08:55:45 AM UTC 24 |
| Finished | Sep 24 08:55:47 AM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2240956973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 2.usbdev_data_toggle_clear.2240956973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_restore.434384810 |
| Short name | T119 |
| Test name | |
| Test status | |
| Simulation time | 758464599 ps |
| CPU time | 3.61 seconds |
| Started | Sep 24 08:55:45 AM UTC 24 |
| Finished | Sep 24 08:55:49 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=434384810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_data_toggle_restore.434384810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_device_timeout.3636729477 |
| Short name | T259 |
| Test name | |
| Test status | |
| Simulation time | 4270186852 ps |
| CPU time | 26.55 seconds |
| Started | Sep 24 08:55:46 AM UTC 24 |
| Finished | Sep 24 08:56:14 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3636729477 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_timeout.3636729477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_disable_endpoint.3106623777 |
| Short name | T453 |
| Test name | |
| Test status | |
| Simulation time | 561322941 ps |
| CPU time | 3.28 seconds |
| Started | Sep 24 08:55:50 AM UTC 24 |
| Finished | Sep 24 08:55:54 AM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3106623777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_disable_endpoint.3106623777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_disconnected.2587836056 |
| Short name | T69 |
| Test name | |
| Test status | |
| Simulation time | 156386606 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 08:55:51 AM UTC 24 |
| Finished | Sep 24 08:55:54 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2587836056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_disconnected.2587836056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_enable.3996592430 |
| Short name | T614 |
| Test name | |
| Test status | |
| Simulation time | 47704680 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 08:55:54 AM UTC 24 |
| Finished | Sep 24 08:55:56 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3996592430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 2.usbdev_enable.3996592430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_access.3554626813 |
| Short name | T615 |
| Test name | |
| Test status | |
| Simulation time | 842140008 ps |
| CPU time | 5.03 seconds |
| Started | Sep 24 08:55:54 AM UTC 24 |
| Finished | Sep 24 08:56:00 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3554626813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_access.3554626813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_types.609583349 |
| Short name | T423 |
| Test name | |
| Test status | |
| Simulation time | 641519597 ps |
| CPU time | 3.52 seconds |
| Started | Sep 24 08:55:55 AM UTC 24 |
| Finished | Sep 24 08:56:00 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=609583349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_types.609583349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_levels.2492911646 |
| Short name | T190 |
| Test name | |
| Test status | |
| Simulation time | 206979983 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 08:55:57 AM UTC 24 |
| Finished | Sep 24 08:56:00 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2492911646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_fifo_levels.2492911646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_rst.3319780627 |
| Short name | T254 |
| Test name | |
| Test status | |
| Simulation time | 274185749 ps |
| CPU time | 3.37 seconds |
| Started | Sep 24 08:56:01 AM UTC 24 |
| Finished | Sep 24 08:56:05 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3319780627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_fifo_rst.3319780627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk.2003808459 |
| Short name | T727 |
| Test name | |
| Test status | |
| Simulation time | 90177485443 ps |
| CPU time | 221.28 seconds |
| Started | Sep 24 08:56:01 AM UTC 24 |
| Finished | Sep 24 08:59:46 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2003808459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_hiclk.2003808459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk_max.2939041964 |
| Short name | T759 |
| Test name | |
| Test status | |
| Simulation time | 93045993532 ps |
| CPU time | 257.68 seconds |
| Started | Sep 24 08:56:01 AM UTC 24 |
| Finished | Sep 24 09:00:23 AM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2939041964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 2.usbdev_freq_hiclk_max.2939041964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk.3912577990 |
| Short name | T714 |
| Test name | |
| Test status | |
| Simulation time | 87107334854 ps |
| CPU time | 201.19 seconds |
| Started | Sep 24 08:56:02 AM UTC 24 |
| Finished | Sep 24 08:59:27 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3912577990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_loclk.3912577990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk_max.2528797268 |
| Short name | T717 |
| Test name | |
| Test status | |
| Simulation time | 92989607334 ps |
| CPU time | 210.65 seconds |
| Started | Sep 24 08:56:02 AM UTC 24 |
| Finished | Sep 24 08:59:36 AM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2528797268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 2.usbdev_freq_loclk_max.2528797268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_freq_phase.2604331094 |
| Short name | T697 |
| Test name | |
| Test status | |
| Simulation time | 88201572106 ps |
| CPU time | 179.59 seconds |
| Started | Sep 24 08:56:04 AM UTC 24 |
| Finished | Sep 24 08:59:06 AM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2604331094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_freq_phase.2604331094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_in_iso.4219508656 |
| Short name | T255 |
| Test name | |
| Test status | |
| Simulation time | 296376176 ps |
| CPU time | 2.21 seconds |
| Started | Sep 24 08:56:06 AM UTC 24 |
| Finished | Sep 24 08:56:09 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4219508656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_in_iso.4219508656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_in_stall.2648572291 |
| Short name | T257 |
| Test name | |
| Test status | |
| Simulation time | 181654091 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 08:56:10 AM UTC 24 |
| Finished | Sep 24 08:56:13 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2648572291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_stall.2648572291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_in_trans.791256700 |
| Short name | T258 |
| Test name | |
| Test status | |
| Simulation time | 229248987 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 08:56:11 AM UTC 24 |
| Finished | Sep 24 08:56:14 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=791256700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_in_trans.791256700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_invalid_sync.68523752 |
| Short name | T660 |
| Test name | |
| Test status | |
| Simulation time | 3519447236 ps |
| CPU time | 125.03 seconds |
| Started | Sep 24 08:56:04 AM UTC 24 |
| Finished | Sep 24 08:58:11 AM UTC 24 |
| Peak memory | 235024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=68523752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 2.usbdev_invalid_sync.68523752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_iso_retraction.2145929765 |
| Short name | T627 |
| Test name | |
| Test status | |
| Simulation time | 5049000353 ps |
| CPU time | 36.84 seconds |
| Started | Sep 24 08:56:13 AM UTC 24 |
| Finished | Sep 24 08:56:51 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2145929765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_iso_retraction.2145929765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_link_in_err.3822817828 |
| Short name | T616 |
| Test name | |
| Test status | |
| Simulation time | 256036602 ps |
| CPU time | 2.05 seconds |
| Started | Sep 24 08:56:14 AM UTC 24 |
| Finished | Sep 24 08:56:17 AM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3822817828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_in_err.3822817828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_link_resume.3128405098 |
| Short name | T73 |
| Test name | |
| Test status | |
| Simulation time | 29817104124 ps |
| CPU time | 67.53 seconds |
| Started | Sep 24 08:56:14 AM UTC 24 |
| Finished | Sep 24 08:57:24 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3128405098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_resume.3128405098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_link_suspend.210023373 |
| Short name | T630 |
| Test name | |
| Test status | |
| Simulation time | 9794642117 ps |
| CPU time | 33.44 seconds |
| Started | Sep 24 08:56:17 AM UTC 24 |
| Finished | Sep 24 08:56:52 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=210023373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_suspend.210023373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_low_speed_traffic.3357594156 |
| Short name | T454 |
| Test name | |
| Test status | |
| Simulation time | 4426186372 ps |
| CPU time | 43.38 seconds |
| Started | Sep 24 08:56:18 AM UTC 24 |
| Finished | Sep 24 08:57:03 AM UTC 24 |
| Peak memory | 234884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3357594156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_low_speed_traffic.3357594156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_max_inter_pkt_delay.1682180285 |
| Short name | T650 |
| Test name | |
| Test status | |
| Simulation time | 2443170643 ps |
| CPU time | 74.96 seconds |
| Started | Sep 24 08:56:20 AM UTC 24 |
| Finished | Sep 24 08:57:36 AM UTC 24 |
| Peak memory | 228616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1682180285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_inter_pkt_delay.1682180285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_in_transaction.2249058913 |
| Short name | T618 |
| Test name | |
| Test status | |
| Simulation time | 280166464 ps |
| CPU time | 2.07 seconds |
| Started | Sep 24 08:56:23 AM UTC 24 |
| Finished | Sep 24 08:56:26 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2249058913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_in_transaction.2249058913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_out_transaction.2163191806 |
| Short name | T619 |
| Test name | |
| Test status | |
| Simulation time | 208000040 ps |
| CPU time | 1.92 seconds |
| Started | Sep 24 08:56:27 AM UTC 24 |
| Finished | Sep 24 08:56:30 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2163191806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_out_transaction.2163191806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_max_non_iso_usb_traffic.4104208052 |
| Short name | T648 |
| Test name | |
| Test status | |
| Simulation time | 2080265591 ps |
| CPU time | 64.62 seconds |
| Started | Sep 24 08:56:28 AM UTC 24 |
| Finished | Sep 24 08:57:34 AM UTC 24 |
| Peak memory | 234756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4104208052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_non_iso_usb_traffic.4104208052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_max_usb_traffic.2122385105 |
| Short name | T94 |
| Test name | |
| Test status | |
| Simulation time | 2353787175 ps |
| CPU time | 26.3 seconds |
| Started | Sep 24 08:56:31 AM UTC 24 |
| Finished | Sep 24 08:56:59 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2122385105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_usb_traffic.2122385105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_min_inter_pkt_delay.3388044766 |
| Short name | T642 |
| Test name | |
| Test status | |
| Simulation time | 2717157599 ps |
| CPU time | 40.07 seconds |
| Started | Sep 24 08:56:35 AM UTC 24 |
| Finished | Sep 24 08:57:17 AM UTC 24 |
| Peak memory | 235004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3388044766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_inter_pkt_delay.3388044766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_in_transaction.2452664839 |
| Short name | T621 |
| Test name | |
| Test status | |
| Simulation time | 156273359 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 08:56:37 AM UTC 24 |
| Finished | Sep 24 08:56:39 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2452664839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_in_transaction.2452664839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_out_transaction.699233404 |
| Short name | T622 |
| Test name | |
| Test status | |
| Simulation time | 156732808 ps |
| CPU time | 1.75 seconds |
| Started | Sep 24 08:56:37 AM UTC 24 |
| Finished | Sep 24 08:56:39 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=699233404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 2.usbdev_min_length_out_transaction.699233404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_nak_trans.4101996974 |
| Short name | T151 |
| Test name | |
| Test status | |
| Simulation time | 169387791 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 08:56:38 AM UTC 24 |
| Finished | Sep 24 08:56:40 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4101996974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_nak_trans.4101996974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_out_iso.2109374224 |
| Short name | T624 |
| Test name | |
| Test status | |
| Simulation time | 228014540 ps |
| CPU time | 2.12 seconds |
| Started | Sep 24 08:56:40 AM UTC 24 |
| Finished | Sep 24 08:56:44 AM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2109374224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_out_iso.2109374224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_out_stall.3420044558 |
| Short name | T623 |
| Test name | |
| Test status | |
| Simulation time | 207511589 ps |
| CPU time | 1.84 seconds |
| Started | Sep 24 08:56:40 AM UTC 24 |
| Finished | Sep 24 08:56:43 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3420044558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_out_stall.3420044558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_out_trans_nak.3101272592 |
| Short name | T436 |
| Test name | |
| Test status | |
| Simulation time | 189337540 ps |
| CPU time | 1.8 seconds |
| Started | Sep 24 08:56:41 AM UTC 24 |
| Finished | Sep 24 08:56:44 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3101272592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_out_trans_nak.3101272592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_pending_in_trans.220867546 |
| Short name | T182 |
| Test name | |
| Test status | |
| Simulation time | 153134213 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 08:56:41 AM UTC 24 |
| Finished | Sep 24 08:56:44 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=220867546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_pending_in_trans.220867546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_pinflip.670703177 |
| Short name | T626 |
| Test name | |
| Test status | |
| Simulation time | 241265762 ps |
| CPU time | 2.13 seconds |
| Started | Sep 24 08:56:44 AM UTC 24 |
| Finished | Sep 24 08:56:48 AM UTC 24 |
| Peak memory | 217788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=670703177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_pinflip.670703177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_rand_bus_type.2966889833 |
| Short name | T625 |
| Test name | |
| Test status | |
| Simulation time | 247981429 ps |
| CPU time | 2.06 seconds |
| Started | Sep 24 08:56:44 AM UTC 24 |
| Finished | Sep 24 08:56:48 AM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2966889833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 2.usbdev_phy_config_rand_bus_type.2966889833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_usb_ref_disable.3986106813 |
| Short name | T205 |
| Test name | |
| Test status | |
| Simulation time | 168458442 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 08:56:44 AM UTC 24 |
| Finished | Sep 24 08:56:48 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3986106813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_usb_ref_disable.3986106813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_phy_pins_sense.272335078 |
| Short name | T27 |
| Test name | |
| Test status | |
| Simulation time | 50592861 ps |
| CPU time | 1.22 seconds |
| Started | Sep 24 08:56:46 AM UTC 24 |
| Finished | Sep 24 08:56:48 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=272335078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_phy_pins_sense.272335078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_buffer.3285078138 |
| Short name | T286 |
| Test name | |
| Test status | |
| Simulation time | 8429594273 ps |
| CPU time | 25.37 seconds |
| Started | Sep 24 08:56:49 AM UTC 24 |
| Finished | Sep 24 08:57:16 AM UTC 24 |
| Peak memory | 232368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3285078138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_pkt_buffer.3285078138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_received.799142591 |
| Short name | T409 |
| Test name | |
| Test status | |
| Simulation time | 162751084 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 08:56:49 AM UTC 24 |
| Finished | Sep 24 08:56:51 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=799142591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_pkt_received.799142591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_sent.3675535013 |
| Short name | T628 |
| Test name | |
| Test status | |
| Simulation time | 229671580 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 08:56:49 AM UTC 24 |
| Finished | Sep 24 08:56:52 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3675535013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_pkt_sent.3675535013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_disconnects.3509217521 |
| Short name | T726 |
| Test name | |
| Test status | |
| Simulation time | 6430433405 ps |
| CPU time | 168.78 seconds |
| Started | Sep 24 08:56:52 AM UTC 24 |
| Finished | Sep 24 08:59:44 AM UTC 24 |
| Peak memory | 230724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509217521 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_disconnects.3509217521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_resets.1869659838 |
| Short name | T181 |
| Test name | |
| Test status | |
| Simulation time | 5678520864 ps |
| CPU time | 40.37 seconds |
| Started | Sep 24 08:56:52 AM UTC 24 |
| Finished | Sep 24 08:57:34 AM UTC 24 |
| Peak memory | 235008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1869659838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_resets.1869659838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_rand_suspends.1190342314 |
| Short name | T765 |
| Test name | |
| Test status | |
| Simulation time | 10271831181 ps |
| CPU time | 213.67 seconds |
| Started | Sep 24 08:56:52 AM UTC 24 |
| Finished | Sep 24 09:00:30 AM UTC 24 |
| Peak memory | 234948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1190342314 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_suspends.1190342314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_in_transaction.3932619234 |
| Short name | T629 |
| Test name | |
| Test status | |
| Simulation time | 208237934 ps |
| CPU time | 1.8 seconds |
| Started | Sep 24 08:56:49 AM UTC 24 |
| Finished | Sep 24 08:56:52 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3932619234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_random_length_in_transaction.3932619234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_out_transaction.790405247 |
| Short name | T631 |
| Test name | |
| Test status | |
| Simulation time | 164710507 ps |
| CPU time | 1.88 seconds |
| Started | Sep 24 08:56:52 AM UTC 24 |
| Finished | Sep 24 08:56:55 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=790405247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 2.usbdev_random_length_out_transaction.790405247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_resume_link_active.2773335430 |
| Short name | T99 |
| Test name | |
| Test status | |
| Simulation time | 20165298563 ps |
| CPU time | 53.51 seconds |
| Started | Sep 24 08:56:53 AM UTC 24 |
| Finished | Sep 24 08:57:48 AM UTC 24 |
| Peak memory | 217832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2773335430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 2.usbdev_resume_link_active.2773335430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_rx_crc_err.1927915252 |
| Short name | T78 |
| Test name | |
| Test status | |
| Simulation time | 139384923 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 08:56:54 AM UTC 24 |
| Finished | Sep 24 08:56:56 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1927915252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_crc_err.1927915252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_rx_full.567535995 |
| Short name | T59 |
| Test name | |
| Test status | |
| Simulation time | 278005600 ps |
| CPU time | 1.95 seconds |
| Started | Sep 24 08:56:56 AM UTC 24 |
| Finished | Sep 24 08:56:59 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=567535995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 2.usbdev_rx_full.567535995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_rx_pid_err.1998037438 |
| Short name | T82 |
| Test name | |
| Test status | |
| Simulation time | 194546098 ps |
| CPU time | 1.3 seconds |
| Started | Sep 24 08:56:56 AM UTC 24 |
| Finished | Sep 24 08:56:59 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1998037438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_pid_err.1998037438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_sec_cm.3042051795 |
| Short name | T208 |
| Test name | |
| Test status | |
| Simulation time | 943387537 ps |
| CPU time | 3.64 seconds |
| Started | Sep 24 08:57:11 AM UTC 24 |
| Finished | Sep 24 08:57:16 AM UTC 24 |
| Peak memory | 252092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3042051795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_sec_cm.3042051795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority.3979069449 |
| Short name | T359 |
| Test name | |
| Test status | |
| Simulation time | 434568951 ps |
| CPU time | 2.97 seconds |
| Started | Sep 24 08:56:58 AM UTC 24 |
| Finished | Sep 24 08:57:02 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3979069449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority.3979069449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority_over_stall_response.1609857048 |
| Short name | T183 |
| Test name | |
| Test status | |
| Simulation time | 193014995 ps |
| CPU time | 1.86 seconds |
| Started | Sep 24 08:57:00 AM UTC 24 |
| Finished | Sep 24 08:57:03 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1609857048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority_over_stall_response.1609857048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_setup_stage.518171304 |
| Short name | T635 |
| Test name | |
| Test status | |
| Simulation time | 160381810 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 08:57:00 AM UTC 24 |
| Finished | Sep 24 08:57:03 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=518171304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_setup_stage.518171304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_setup_trans_ignored.3032180940 |
| Short name | T634 |
| Test name | |
| Test status | |
| Simulation time | 149054252 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 08:57:00 AM UTC 24 |
| Finished | Sep 24 08:57:03 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3032180940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 2.usbdev_setup_trans_ignored.3032180940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_smoke.3231614817 |
| Short name | T636 |
| Test name | |
| Test status | |
| Simulation time | 200883256 ps |
| CPU time | 1.87 seconds |
| Started | Sep 24 08:57:01 AM UTC 24 |
| Finished | Sep 24 08:57:04 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3231614817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_smoke.3231614817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_spurious_pids_ignored.2417577135 |
| Short name | T656 |
| Test name | |
| Test status | |
| Simulation time | 3152899552 ps |
| CPU time | 46.51 seconds |
| Started | Sep 24 08:57:03 AM UTC 24 |
| Finished | Sep 24 08:57:52 AM UTC 24 |
| Peak memory | 235200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2417577135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_spurious_pids_ignored.2417577135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_stall_priority_over_nak.2169561927 |
| Short name | T593 |
| Test name | |
| Test status | |
| Simulation time | 171789735 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 08:57:03 AM UTC 24 |
| Finished | Sep 24 08:57:06 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2169561927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stall_priority_over_nak.2169561927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_stall_trans.3149096344 |
| Short name | T637 |
| Test name | |
| Test status | |
| Simulation time | 157373656 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 08:57:03 AM UTC 24 |
| Finished | Sep 24 08:57:06 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3149096344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_stall_trans.3149096344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_stream_len_max.3194844391 |
| Short name | T641 |
| Test name | |
| Test status | |
| Simulation time | 1421996241 ps |
| CPU time | 7.1 seconds |
| Started | Sep 24 08:57:05 AM UTC 24 |
| Finished | Sep 24 08:57:13 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3194844391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stream_len_max.3194844391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_streaming_out.832367770 |
| Short name | T687 |
| Test name | |
| Test status | |
| Simulation time | 4298801282 ps |
| CPU time | 147.69 seconds |
| Started | Sep 24 08:57:05 AM UTC 24 |
| Finished | Sep 24 08:59:35 AM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=832367770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_streaming_out.832367770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_timeout_missing_host_handshake.1372940347 |
| Short name | T253 |
| Test name | |
| Test status | |
| Simulation time | 1082762288 ps |
| CPU time | 13.92 seconds |
| Started | Sep 24 08:55:48 AM UTC 24 |
| Finished | Sep 24 08:56:03 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1372940347 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_timeout_missing_host_handshake.1372940347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.1119900823 |
| Short name | T640 |
| Test name | |
| Test status | |
| Simulation time | 580340271 ps |
| CPU time | 3.32 seconds |
| Started | Sep 24 08:57:07 AM UTC 24 |
| Finished | Sep 24 08:57:11 AM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1119900823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_tx _rx_disruption.1119900823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/2.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_alert_test.4027887995 |
| Short name | T1562 |
| Test name | |
| Test status | |
| Simulation time | 35728320 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:10:47 AM UTC 24 |
| Finished | Sep 24 09:10:49 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4027887995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 20.usbdev_alert_test.4027887995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_disconnect.2013325361 |
| Short name | T1595 |
| Test name | |
| Test status | |
| Simulation time | 5752024963 ps |
| CPU time | 8.55 seconds |
| Started | Sep 24 09:10:20 AM UTC 24 |
| Finished | Sep 24 09:10:30 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2013325361 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_disconnect.2013325361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_reset.1992716787 |
| Short name | T200 |
| Test name | |
| Test status | |
| Simulation time | 15242796955 ps |
| CPU time | 21.14 seconds |
| Started | Sep 24 09:10:20 AM UTC 24 |
| Finished | Sep 24 09:10:42 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1992716787 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_reset.1992716787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_resume.3512123828 |
| Short name | T1647 |
| Test name | |
| Test status | |
| Simulation time | 25641941455 ps |
| CPU time | 40.22 seconds |
| Started | Sep 24 09:10:20 AM UTC 24 |
| Finished | Sep 24 09:11:02 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3512123828 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_resume.3512123828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_av_buffer.2992529845 |
| Short name | T1583 |
| Test name | |
| Test status | |
| Simulation time | 157973096 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:10:20 AM UTC 24 |
| Finished | Sep 24 09:10:22 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2992529845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_av_buffer.2992529845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_bitstuff_err.753108940 |
| Short name | T1585 |
| Test name | |
| Test status | |
| Simulation time | 145344519 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 09:10:20 AM UTC 24 |
| Finished | Sep 24 09:10:23 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=753108940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_bitstuff_err.753108940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_clear.1124807203 |
| Short name | T1588 |
| Test name | |
| Test status | |
| Simulation time | 465685461 ps |
| CPU time | 2.6 seconds |
| Started | Sep 24 09:10:20 AM UTC 24 |
| Finished | Sep 24 09:10:24 AM UTC 24 |
| Peak memory | 217912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1124807203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 20.usbdev_data_toggle_clear.1124807203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_restore.3628294366 |
| Short name | T1587 |
| Test name | |
| Test status | |
| Simulation time | 469504639 ps |
| CPU time | 1.79 seconds |
| Started | Sep 24 09:10:20 AM UTC 24 |
| Finished | Sep 24 09:10:23 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3628294366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_data_toggle_restore.3628294366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_device_address.86483855 |
| Short name | T1660 |
| Test name | |
| Test status | |
| Simulation time | 41533945351 ps |
| CPU time | 74.48 seconds |
| Started | Sep 24 09:10:20 AM UTC 24 |
| Finished | Sep 24 09:11:37 AM UTC 24 |
| Peak memory | 218224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=86483855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_device_address.86483855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_device_timeout.775443289 |
| Short name | T1596 |
| Test name | |
| Test status | |
| Simulation time | 1099372605 ps |
| CPU time | 8.67 seconds |
| Started | Sep 24 09:10:20 AM UTC 24 |
| Finished | Sep 24 09:10:30 AM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=775443289 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_timeout.775443289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_disable_endpoint.3313823740 |
| Short name | T1602 |
| Test name | |
| Test status | |
| Simulation time | 716449370 ps |
| CPU time | 2.79 seconds |
| Started | Sep 24 09:10:28 AM UTC 24 |
| Finished | Sep 24 09:10:31 AM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3313823740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_disable_endpoint.3313823740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_disconnected.840232827 |
| Short name | T1594 |
| Test name | |
| Test status | |
| Simulation time | 163998522 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:10:28 AM UTC 24 |
| Finished | Sep 24 09:10:30 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=840232827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_disconnected.840232827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_enable.1652281188 |
| Short name | T1593 |
| Test name | |
| Test status | |
| Simulation time | 35332233 ps |
| CPU time | 1.05 seconds |
| Started | Sep 24 09:10:28 AM UTC 24 |
| Finished | Sep 24 09:10:30 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1652281188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 20.usbdev_enable.1652281188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_access.3204432564 |
| Short name | T1604 |
| Test name | |
| Test status | |
| Simulation time | 862449249 ps |
| CPU time | 3.2 seconds |
| Started | Sep 24 09:10:28 AM UTC 24 |
| Finished | Sep 24 09:10:32 AM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3204432564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_access.3204432564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_types.985691933 |
| Short name | T554 |
| Test name | |
| Test status | |
| Simulation time | 204734924 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:10:28 AM UTC 24 |
| Finished | Sep 24 09:10:30 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=985691933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_types.985691933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_rst.2463423338 |
| Short name | T1603 |
| Test name | |
| Test status | |
| Simulation time | 322650720 ps |
| CPU time | 2.96 seconds |
| Started | Sep 24 09:10:28 AM UTC 24 |
| Finished | Sep 24 09:10:32 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2463423338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_fifo_rst.2463423338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_in_iso.662521373 |
| Short name | T1600 |
| Test name | |
| Test status | |
| Simulation time | 169574099 ps |
| CPU time | 1.63 seconds |
| Started | Sep 24 09:10:28 AM UTC 24 |
| Finished | Sep 24 09:10:31 AM UTC 24 |
| Peak memory | 225976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=662521373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_in_iso.662521373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_in_stall.2153993 |
| Short name | T1597 |
| Test name | |
| Test status | |
| Simulation time | 144643081 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:10:28 AM UTC 24 |
| Finished | Sep 24 09:10:30 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2153993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_in_stall.2153993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_in_trans.1651401113 |
| Short name | T1599 |
| Test name | |
| Test status | |
| Simulation time | 278857986 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:10:28 AM UTC 24 |
| Finished | Sep 24 09:10:30 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1651401113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_trans.1651401113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_invalid_sync.2805933986 |
| Short name | T1642 |
| Test name | |
| Test status | |
| Simulation time | 3983969051 ps |
| CPU time | 31.45 seconds |
| Started | Sep 24 09:10:28 AM UTC 24 |
| Finished | Sep 24 09:11:01 AM UTC 24 |
| Peak memory | 230664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2805933986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 20.usbdev_invalid_sync.2805933986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_iso_retraction.2073424075 |
| Short name | T1664 |
| Test name | |
| Test status | |
| Simulation time | 8981571755 ps |
| CPU time | 65.61 seconds |
| Started | Sep 24 09:10:28 AM UTC 24 |
| Finished | Sep 24 09:11:35 AM UTC 24 |
| Peak memory | 218316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2073424075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_iso_retraction.2073424075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_link_in_err.4005182789 |
| Short name | T1601 |
| Test name | |
| Test status | |
| Simulation time | 241349609 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:10:28 AM UTC 24 |
| Finished | Sep 24 09:10:31 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4005182789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_in_err.4005182789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_link_resume.974229640 |
| Short name | T1634 |
| Test name | |
| Test status | |
| Simulation time | 13697673361 ps |
| CPU time | 22.91 seconds |
| Started | Sep 24 09:10:28 AM UTC 24 |
| Finished | Sep 24 09:10:52 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=974229640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_link_resume.974229640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_link_suspend.1155635557 |
| Short name | T1621 |
| Test name | |
| Test status | |
| Simulation time | 11230161024 ps |
| CPU time | 16.02 seconds |
| Started | Sep 24 09:10:28 AM UTC 24 |
| Finished | Sep 24 09:10:45 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1155635557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_link_suspend.1155635557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_low_speed_traffic.394293408 |
| Short name | T1663 |
| Test name | |
| Test status | |
| Simulation time | 5034160016 ps |
| CPU time | 37.57 seconds |
| Started | Sep 24 09:10:37 AM UTC 24 |
| Finished | Sep 24 09:11:16 AM UTC 24 |
| Peak memory | 234916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=394293408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_low_speed_traffic.394293408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_max_inter_pkt_delay.587538960 |
| Short name | T1636 |
| Test name | |
| Test status | |
| Simulation time | 2052942082 ps |
| CPU time | 15.83 seconds |
| Started | Sep 24 09:10:37 AM UTC 24 |
| Finished | Sep 24 09:10:54 AM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=587538960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_inter_pkt_delay.587538960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_in_transaction.1060065281 |
| Short name | T1614 |
| Test name | |
| Test status | |
| Simulation time | 245393606 ps |
| CPU time | 1.8 seconds |
| Started | Sep 24 09:10:37 AM UTC 24 |
| Finished | Sep 24 09:10:40 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1060065281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_in_transaction.1060065281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_out_transaction.2698907198 |
| Short name | T1618 |
| Test name | |
| Test status | |
| Simulation time | 242307529 ps |
| CPU time | 1.97 seconds |
| Started | Sep 24 09:10:37 AM UTC 24 |
| Finished | Sep 24 09:10:40 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2698907198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_out_transaction.2698907198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_max_non_iso_usb_traffic.2935219004 |
| Short name | T1681 |
| Test name | |
| Test status | |
| Simulation time | 1709203159 ps |
| CPU time | 44.95 seconds |
| Started | Sep 24 09:10:37 AM UTC 24 |
| Finished | Sep 24 09:11:23 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2935219004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_non_iso_usb_traffic.2935219004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_min_inter_pkt_delay.487597238 |
| Short name | T1676 |
| Test name | |
| Test status | |
| Simulation time | 1526462096 ps |
| CPU time | 40.94 seconds |
| Started | Sep 24 09:10:37 AM UTC 24 |
| Finished | Sep 24 09:11:19 AM UTC 24 |
| Peak memory | 228588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=487597238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_inter_pkt_delay.487597238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_in_transaction.4253519745 |
| Short name | T1611 |
| Test name | |
| Test status | |
| Simulation time | 161731845 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:10:37 AM UTC 24 |
| Finished | Sep 24 09:10:40 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4253519745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_in_transaction.4253519745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_out_transaction.2585819781 |
| Short name | T1610 |
| Test name | |
| Test status | |
| Simulation time | 153987734 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:10:37 AM UTC 24 |
| Finished | Sep 24 09:10:40 AM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2585819781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_out_transaction.2585819781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_nak_trans.3661798474 |
| Short name | T138 |
| Test name | |
| Test status | |
| Simulation time | 195626898 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:10:37 AM UTC 24 |
| Finished | Sep 24 09:10:40 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3661798474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_nak_trans.3661798474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_out_iso.3155478845 |
| Short name | T1615 |
| Test name | |
| Test status | |
| Simulation time | 242130079 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:10:37 AM UTC 24 |
| Finished | Sep 24 09:10:40 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3155478845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_out_iso.3155478845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_out_stall.2079445939 |
| Short name | T1608 |
| Test name | |
| Test status | |
| Simulation time | 205985824 ps |
| CPU time | 1.16 seconds |
| Started | Sep 24 09:10:37 AM UTC 24 |
| Finished | Sep 24 09:10:39 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2079445939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_out_stall.2079445939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_out_trans_nak.4253840252 |
| Short name | T1612 |
| Test name | |
| Test status | |
| Simulation time | 191466930 ps |
| CPU time | 1.3 seconds |
| Started | Sep 24 09:10:37 AM UTC 24 |
| Finished | Sep 24 09:10:40 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4253840252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_out_trans_nak.4253840252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_pending_in_trans.2367477032 |
| Short name | T1607 |
| Test name | |
| Test status | |
| Simulation time | 147418768 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:10:37 AM UTC 24 |
| Finished | Sep 24 09:10:39 AM UTC 24 |
| Peak memory | 215624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2367477032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_pending_in_trans.2367477032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_pinflip.3222362248 |
| Short name | T1617 |
| Test name | |
| Test status | |
| Simulation time | 206811327 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:10:37 AM UTC 24 |
| Finished | Sep 24 09:10:40 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3222362248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_pinflip.3222362248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_usb_ref_disable.4220731166 |
| Short name | T1616 |
| Test name | |
| Test status | |
| Simulation time | 138187242 ps |
| CPU time | 1.33 seconds |
| Started | Sep 24 09:10:37 AM UTC 24 |
| Finished | Sep 24 09:10:40 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4220731166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_usb_ref_disable.4220731166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_phy_pins_sense.1768518030 |
| Short name | T1609 |
| Test name | |
| Test status | |
| Simulation time | 36835375 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 09:10:38 AM UTC 24 |
| Finished | Sep 24 09:10:40 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1768518030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_pins_sense.1768518030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_buffer.3877106498 |
| Short name | T1696 |
| Test name | |
| Test status | |
| Simulation time | 17626151138 ps |
| CPU time | 53.22 seconds |
| Started | Sep 24 09:10:38 AM UTC 24 |
| Finished | Sep 24 09:11:32 AM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3877106498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_pkt_buffer.3877106498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_received.919338617 |
| Short name | T1619 |
| Test name | |
| Test status | |
| Simulation time | 162823229 ps |
| CPU time | 1.35 seconds |
| Started | Sep 24 09:10:38 AM UTC 24 |
| Finished | Sep 24 09:10:40 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=919338617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_pkt_received.919338617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_sent.896573377 |
| Short name | T1630 |
| Test name | |
| Test status | |
| Simulation time | 211715058 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 09:10:46 AM UTC 24 |
| Finished | Sep 24 09:10:49 AM UTC 24 |
| Peak memory | 215764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=896573377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_pkt_sent.896573377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_in_transaction.3250477500 |
| Short name | T1626 |
| Test name | |
| Test status | |
| Simulation time | 248120738 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 09:10:46 AM UTC 24 |
| Finished | Sep 24 09:10:49 AM UTC 24 |
| Peak memory | 215816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3250477500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_random_length_in_transaction.3250477500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_out_transaction.3541345060 |
| Short name | T1627 |
| Test name | |
| Test status | |
| Simulation time | 171255006 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 09:10:46 AM UTC 24 |
| Finished | Sep 24 09:10:49 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3541345060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_random_length_out_transaction.3541345060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_rx_crc_err.1575494151 |
| Short name | T1624 |
| Test name | |
| Test status | |
| Simulation time | 202131573 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:10:46 AM UTC 24 |
| Finished | Sep 24 09:10:48 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1575494151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_rx_crc_err.1575494151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_rx_full.168304672 |
| Short name | T352 |
| Test name | |
| Test status | |
| Simulation time | 262270817 ps |
| CPU time | 1.87 seconds |
| Started | Sep 24 09:10:46 AM UTC 24 |
| Finished | Sep 24 09:10:49 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=168304672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 20.usbdev_rx_full.168304672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_setup_stage.2083124890 |
| Short name | T1623 |
| Test name | |
| Test status | |
| Simulation time | 151774269 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:10:46 AM UTC 24 |
| Finished | Sep 24 09:10:48 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2083124890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_setup_stage.2083124890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_setup_trans_ignored.2226392888 |
| Short name | T1628 |
| Test name | |
| Test status | |
| Simulation time | 158248360 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:10:46 AM UTC 24 |
| Finished | Sep 24 09:10:49 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2226392888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 20.usbdev_setup_trans_ignored.2226392888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_smoke.3591596510 |
| Short name | T1629 |
| Test name | |
| Test status | |
| Simulation time | 234169472 ps |
| CPU time | 1.4 seconds |
| Started | Sep 24 09:10:46 AM UTC 24 |
| Finished | Sep 24 09:10:49 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3591596510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_smoke.3591596510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_spurious_pids_ignored.2036404921 |
| Short name | T1650 |
| Test name | |
| Test status | |
| Simulation time | 2198582504 ps |
| CPU time | 15.73 seconds |
| Started | Sep 24 09:10:46 AM UTC 24 |
| Finished | Sep 24 09:11:03 AM UTC 24 |
| Peak memory | 234884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2036404921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_spurious_pids_ignored.2036404921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_stall_priority_over_nak.1686900205 |
| Short name | T1631 |
| Test name | |
| Test status | |
| Simulation time | 210975222 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:10:46 AM UTC 24 |
| Finished | Sep 24 09:10:49 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1686900205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stall_priority_over_nak.1686900205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_stall_trans.2220360613 |
| Short name | T1625 |
| Test name | |
| Test status | |
| Simulation time | 183272857 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:10:46 AM UTC 24 |
| Finished | Sep 24 09:10:49 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2220360613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_stall_trans.2220360613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_stream_len_max.514409991 |
| Short name | T1633 |
| Test name | |
| Test status | |
| Simulation time | 1270427715 ps |
| CPU time | 3.51 seconds |
| Started | Sep 24 09:10:47 AM UTC 24 |
| Finished | Sep 24 09:10:51 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=514409991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_stream_len_max.514409991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_streaming_out.336171712 |
| Short name | T1662 |
| Test name | |
| Test status | |
| Simulation time | 1947812738 ps |
| CPU time | 50.63 seconds |
| Started | Sep 24 09:10:47 AM UTC 24 |
| Finished | Sep 24 09:11:39 AM UTC 24 |
| Peak memory | 228156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=336171712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_streaming_out.336171712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_timeout_missing_host_handshake.3053461382 |
| Short name | T1637 |
| Test name | |
| Test status | |
| Simulation time | 1508769513 ps |
| CPU time | 34.44 seconds |
| Started | Sep 24 09:10:20 AM UTC 24 |
| Finished | Sep 24 09:10:56 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3053461382 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_timeout_missing_host_handshake.3053461382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/20.usbdev_tx_rx_disruption.2039716032 |
| Short name | T1632 |
| Test name | |
| Test status | |
| Simulation time | 460539454 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:10:47 AM UTC 24 |
| Finished | Sep 24 09:10:49 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2039716032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_t x_rx_disruption.2039716032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/20.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/200.usbdev_tx_rx_disruption.1534189703 |
| Short name | T3500 |
| Test name | |
| Test status | |
| Simulation time | 533128747 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1534189703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 200.usbdev_ tx_rx_disruption.1534189703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/200.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/201.usbdev_tx_rx_disruption.3005000176 |
| Short name | T3502 |
| Test name | |
| Test status | |
| Simulation time | 505175934 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3005000176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 201.usbdev_ tx_rx_disruption.3005000176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/201.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/202.usbdev_tx_rx_disruption.1845482885 |
| Short name | T3482 |
| Test name | |
| Test status | |
| Simulation time | 454846462 ps |
| CPU time | 1.94 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1845482885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 202.usbdev_ tx_rx_disruption.1845482885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/202.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/203.usbdev_tx_rx_disruption.2439523985 |
| Short name | T3503 |
| Test name | |
| Test status | |
| Simulation time | 498457749 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 215684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2439523985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 203.usbdev_ tx_rx_disruption.2439523985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/203.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/204.usbdev_tx_rx_disruption.2996876828 |
| Short name | T3480 |
| Test name | |
| Test status | |
| Simulation time | 646273497 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2996876828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 204.usbdev_ tx_rx_disruption.2996876828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/204.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/205.usbdev_tx_rx_disruption.1587813995 |
| Short name | T3508 |
| Test name | |
| Test status | |
| Simulation time | 598035014 ps |
| CPU time | 1.94 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 216388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1587813995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 205.usbdev_ tx_rx_disruption.1587813995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/205.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/206.usbdev_tx_rx_disruption.895187995 |
| Short name | T3505 |
| Test name | |
| Test status | |
| Simulation time | 569258457 ps |
| CPU time | 1.81 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=895187995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 206.usbdev_t x_rx_disruption.895187995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/206.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/207.usbdev_tx_rx_disruption.3202620040 |
| Short name | T3483 |
| Test name | |
| Test status | |
| Simulation time | 480590205 ps |
| CPU time | 1.97 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 216512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3202620040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 207.usbdev_ tx_rx_disruption.3202620040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/207.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/208.usbdev_tx_rx_disruption.1308474737 |
| Short name | T3512 |
| Test name | |
| Test status | |
| Simulation time | 531217731 ps |
| CPU time | 2.06 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1308474737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 208.usbdev_ tx_rx_disruption.1308474737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/208.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/209.usbdev_tx_rx_disruption.319219997 |
| Short name | T3506 |
| Test name | |
| Test status | |
| Simulation time | 688068790 ps |
| CPU time | 1.84 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=319219997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 209.usbdev_t x_rx_disruption.319219997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/209.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_alert_test.2794150690 |
| Short name | T1689 |
| Test name | |
| Test status | |
| Simulation time | 50006670 ps |
| CPU time | 0.82 seconds |
| Started | Sep 24 09:11:24 AM UTC 24 |
| Finished | Sep 24 09:11:27 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2794150690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 21.usbdev_alert_test.2794150690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_disconnect.1379318517 |
| Short name | T1661 |
| Test name | |
| Test status | |
| Simulation time | 10937702348 ps |
| CPU time | 17.01 seconds |
| Started | Sep 24 09:10:57 AM UTC 24 |
| Finished | Sep 24 09:11:15 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379318517 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_disconnect.1379318517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_reset.1220047775 |
| Short name | T1679 |
| Test name | |
| Test status | |
| Simulation time | 14558958468 ps |
| CPU time | 21.48 seconds |
| Started | Sep 24 09:10:57 AM UTC 24 |
| Finished | Sep 24 09:11:20 AM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1220047775 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_reset.1220047775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_resume.339136239 |
| Short name | T1709 |
| Test name | |
| Test status | |
| Simulation time | 31027076784 ps |
| CPU time | 50.33 seconds |
| Started | Sep 24 09:10:57 AM UTC 24 |
| Finished | Sep 24 09:11:49 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=339136239 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_resume.339136239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_av_buffer.3385375151 |
| Short name | T1639 |
| Test name | |
| Test status | |
| Simulation time | 167346284 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 09:10:57 AM UTC 24 |
| Finished | Sep 24 09:11:00 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3385375151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_av_buffer.3385375151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_bitstuff_err.4037700782 |
| Short name | T1638 |
| Test name | |
| Test status | |
| Simulation time | 150083672 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:10:57 AM UTC 24 |
| Finished | Sep 24 09:11:00 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4037700782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_bitstuff_err.4037700782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_clear.3629422181 |
| Short name | T1645 |
| Test name | |
| Test status | |
| Simulation time | 439462058 ps |
| CPU time | 2.76 seconds |
| Started | Sep 24 09:10:57 AM UTC 24 |
| Finished | Sep 24 09:11:01 AM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3629422181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 21.usbdev_data_toggle_clear.3629422181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_restore.655964374 |
| Short name | T1648 |
| Test name | |
| Test status | |
| Simulation time | 1003380221 ps |
| CPU time | 3.63 seconds |
| Started | Sep 24 09:10:57 AM UTC 24 |
| Finished | Sep 24 09:11:02 AM UTC 24 |
| Peak memory | 217920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=655964374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_data_toggle_restore.655964374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_device_address.3842541580 |
| Short name | T1729 |
| Test name | |
| Test status | |
| Simulation time | 38285171800 ps |
| CPU time | 63.34 seconds |
| Started | Sep 24 09:10:57 AM UTC 24 |
| Finished | Sep 24 09:12:03 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3842541580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_address.3842541580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_device_timeout.60560847 |
| Short name | T1698 |
| Test name | |
| Test status | |
| Simulation time | 4413515342 ps |
| CPU time | 36.85 seconds |
| Started | Sep 24 09:10:58 AM UTC 24 |
| Finished | Sep 24 09:11:36 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=60560847 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_timeout.60560847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_disable_endpoint.462686622 |
| Short name | T1644 |
| Test name | |
| Test status | |
| Simulation time | 705829146 ps |
| CPU time | 2.33 seconds |
| Started | Sep 24 09:10:58 AM UTC 24 |
| Finished | Sep 24 09:11:01 AM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=462686622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_disable_endpoint.462686622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_disconnected.3900061949 |
| Short name | T1641 |
| Test name | |
| Test status | |
| Simulation time | 134487438 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:10:58 AM UTC 24 |
| Finished | Sep 24 09:11:00 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3900061949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_disconnected.3900061949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_enable.2694065670 |
| Short name | T1640 |
| Test name | |
| Test status | |
| Simulation time | 87281074 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:10:58 AM UTC 24 |
| Finished | Sep 24 09:11:00 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2694065670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 21.usbdev_enable.2694065670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_access.2355336017 |
| Short name | T1649 |
| Test name | |
| Test status | |
| Simulation time | 949289344 ps |
| CPU time | 3.71 seconds |
| Started | Sep 24 09:10:58 AM UTC 24 |
| Finished | Sep 24 09:11:03 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2355336017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_access.2355336017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_types.2112834268 |
| Short name | T536 |
| Test name | |
| Test status | |
| Simulation time | 467814811 ps |
| CPU time | 2.42 seconds |
| Started | Sep 24 09:10:58 AM UTC 24 |
| Finished | Sep 24 09:11:01 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2112834268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_types.2112834268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_rst.3517060553 |
| Short name | T1646 |
| Test name | |
| Test status | |
| Simulation time | 265352223 ps |
| CPU time | 2.18 seconds |
| Started | Sep 24 09:10:58 AM UTC 24 |
| Finished | Sep 24 09:11:01 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3517060553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_fifo_rst.3517060553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_in_iso.3510742760 |
| Short name | T1643 |
| Test name | |
| Test status | |
| Simulation time | 182462334 ps |
| CPU time | 1.4 seconds |
| Started | Sep 24 09:10:58 AM UTC 24 |
| Finished | Sep 24 09:11:01 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3510742760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_in_iso.3510742760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_in_stall.2018735308 |
| Short name | T1653 |
| Test name | |
| Test status | |
| Simulation time | 148681511 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:11:06 AM UTC 24 |
| Finished | Sep 24 09:11:09 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2018735308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_in_stall.2018735308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_in_trans.250281484 |
| Short name | T1654 |
| Test name | |
| Test status | |
| Simulation time | 178449271 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:11:06 AM UTC 24 |
| Finished | Sep 24 09:11:09 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=250281484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_in_trans.250281484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_invalid_sync.2635506652 |
| Short name | T1680 |
| Test name | |
| Test status | |
| Simulation time | 2665037056 ps |
| CPU time | 23.15 seconds |
| Started | Sep 24 09:10:58 AM UTC 24 |
| Finished | Sep 24 09:11:23 AM UTC 24 |
| Peak memory | 235200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2635506652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 21.usbdev_invalid_sync.2635506652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_iso_retraction.2524658325 |
| Short name | T1727 |
| Test name | |
| Test status | |
| Simulation time | 4463781167 ps |
| CPU time | 48.46 seconds |
| Started | Sep 24 09:11:06 AM UTC 24 |
| Finished | Sep 24 09:11:56 AM UTC 24 |
| Peak memory | 218380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2524658325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_iso_retraction.2524658325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_link_in_err.1658100922 |
| Short name | T1652 |
| Test name | |
| Test status | |
| Simulation time | 166814148 ps |
| CPU time | 1.16 seconds |
| Started | Sep 24 09:11:06 AM UTC 24 |
| Finished | Sep 24 09:11:09 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1658100922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_in_err.1658100922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_link_resume.3605465994 |
| Short name | T1677 |
| Test name | |
| Test status | |
| Simulation time | 6555066023 ps |
| CPU time | 12.15 seconds |
| Started | Sep 24 09:11:06 AM UTC 24 |
| Finished | Sep 24 09:11:20 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3605465994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_resume.3605465994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_link_suspend.3662381786 |
| Short name | T1683 |
| Test name | |
| Test status | |
| Simulation time | 8681192002 ps |
| CPU time | 16.27 seconds |
| Started | Sep 24 09:11:06 AM UTC 24 |
| Finished | Sep 24 09:11:24 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3662381786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_link_suspend.3662381786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_max_inter_pkt_delay.2168766768 |
| Short name | T1693 |
| Test name | |
| Test status | |
| Simulation time | 2167751367 ps |
| CPU time | 18.94 seconds |
| Started | Sep 24 09:11:06 AM UTC 24 |
| Finished | Sep 24 09:11:27 AM UTC 24 |
| Peak memory | 234956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2168766768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_inter_pkt_delay.2168766768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_in_transaction.215871833 |
| Short name | T1655 |
| Test name | |
| Test status | |
| Simulation time | 270161332 ps |
| CPU time | 1.47 seconds |
| Started | Sep 24 09:11:06 AM UTC 24 |
| Finished | Sep 24 09:11:09 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=215871833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_in_transaction.215871833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_out_transaction.196950588 |
| Short name | T1657 |
| Test name | |
| Test status | |
| Simulation time | 187179860 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:11:07 AM UTC 24 |
| Finished | Sep 24 09:11:10 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=196950588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 21.usbdev_max_length_out_transaction.196950588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_max_non_iso_usb_traffic.2636332715 |
| Short name | T1581 |
| Test name | |
| Test status | |
| Simulation time | 2932964444 ps |
| CPU time | 28.24 seconds |
| Started | Sep 24 09:11:07 AM UTC 24 |
| Finished | Sep 24 09:11:37 AM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2636332715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_non_iso_usb_traffic.2636332715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_min_inter_pkt_delay.3445481542 |
| Short name | T1765 |
| Test name | |
| Test status | |
| Simulation time | 2935534762 ps |
| CPU time | 76.96 seconds |
| Started | Sep 24 09:11:07 AM UTC 24 |
| Finished | Sep 24 09:12:26 AM UTC 24 |
| Peak memory | 234880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3445481542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_inter_pkt_delay.3445481542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_in_transaction.3203633983 |
| Short name | T1656 |
| Test name | |
| Test status | |
| Simulation time | 178035714 ps |
| CPU time | 1.22 seconds |
| Started | Sep 24 09:11:07 AM UTC 24 |
| Finished | Sep 24 09:11:09 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3203633983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_in_transaction.3203633983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_out_transaction.3248332350 |
| Short name | T1658 |
| Test name | |
| Test status | |
| Simulation time | 157555240 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:11:07 AM UTC 24 |
| Finished | Sep 24 09:11:10 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3248332350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_out_transaction.3248332350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_out_iso.3089184672 |
| Short name | T1665 |
| Test name | |
| Test status | |
| Simulation time | 189601833 ps |
| CPU time | 1.2 seconds |
| Started | Sep 24 09:11:14 AM UTC 24 |
| Finished | Sep 24 09:11:16 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3089184672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_out_iso.3089184672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_out_stall.623252148 |
| Short name | T1667 |
| Test name | |
| Test status | |
| Simulation time | 176180265 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:11:14 AM UTC 24 |
| Finished | Sep 24 09:11:16 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=623252148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_out_stall.623252148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_out_trans_nak.4170831588 |
| Short name | T1668 |
| Test name | |
| Test status | |
| Simulation time | 152833873 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:11:14 AM UTC 24 |
| Finished | Sep 24 09:11:16 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4170831588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_out_trans_nak.4170831588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_pending_in_trans.2936933776 |
| Short name | T1669 |
| Test name | |
| Test status | |
| Simulation time | 154957843 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:11:14 AM UTC 24 |
| Finished | Sep 24 09:11:16 AM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2936933776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_pending_in_trans.2936933776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_pinflip.33954556 |
| Short name | T1672 |
| Test name | |
| Test status | |
| Simulation time | 197822378 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:11:14 AM UTC 24 |
| Finished | Sep 24 09:11:17 AM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=33954556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_p inflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_pinflip.33954556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_usb_ref_disable.3250428615 |
| Short name | T1670 |
| Test name | |
| Test status | |
| Simulation time | 139742368 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 09:11:14 AM UTC 24 |
| Finished | Sep 24 09:11:16 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3250428615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_usb_ref_disable.3250428615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_phy_pins_sense.2929631174 |
| Short name | T1666 |
| Test name | |
| Test status | |
| Simulation time | 73845689 ps |
| CPU time | 1.12 seconds |
| Started | Sep 24 09:11:14 AM UTC 24 |
| Finished | Sep 24 09:11:16 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2929631174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_pins_sense.2929631174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_buffer.575212760 |
| Short name | T1746 |
| Test name | |
| Test status | |
| Simulation time | 22289168593 ps |
| CPU time | 55.89 seconds |
| Started | Sep 24 09:11:14 AM UTC 24 |
| Finished | Sep 24 09:12:11 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=575212760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_pkt_buffer.575212760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_received.654250466 |
| Short name | T1673 |
| Test name | |
| Test status | |
| Simulation time | 202003491 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:11:14 AM UTC 24 |
| Finished | Sep 24 09:11:17 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=654250466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_pkt_received.654250466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_sent.3303038208 |
| Short name | T1674 |
| Test name | |
| Test status | |
| Simulation time | 232301685 ps |
| CPU time | 1.76 seconds |
| Started | Sep 24 09:11:14 AM UTC 24 |
| Finished | Sep 24 09:11:17 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3303038208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_pkt_sent.3303038208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_in_transaction.630744492 |
| Short name | T1671 |
| Test name | |
| Test status | |
| Simulation time | 190487502 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:11:14 AM UTC 24 |
| Finished | Sep 24 09:11:17 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=630744492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_random_length_in_transaction.630744492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_out_transaction.65360588 |
| Short name | T1675 |
| Test name | |
| Test status | |
| Simulation time | 200623707 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:11:14 AM UTC 24 |
| Finished | Sep 24 09:11:17 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=65360588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transa ction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 21.usbdev_random_length_out_transaction.65360588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_rx_crc_err.1922702628 |
| Short name | T1686 |
| Test name | |
| Test status | |
| Simulation time | 202837749 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 09:11:24 AM UTC 24 |
| Finished | Sep 24 09:11:26 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1922702628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_rx_crc_err.1922702628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_rx_full.1789257102 |
| Short name | T1688 |
| Test name | |
| Test status | |
| Simulation time | 261206585 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 09:11:24 AM UTC 24 |
| Finished | Sep 24 09:11:26 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1789257102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_rx_full.1789257102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_setup_stage.1646445744 |
| Short name | T1685 |
| Test name | |
| Test status | |
| Simulation time | 141249180 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 09:11:24 AM UTC 24 |
| Finished | Sep 24 09:11:26 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1646445744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_setup_stage.1646445744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_setup_trans_ignored.1841837373 |
| Short name | T1684 |
| Test name | |
| Test status | |
| Simulation time | 149033916 ps |
| CPU time | 1.05 seconds |
| Started | Sep 24 09:11:24 AM UTC 24 |
| Finished | Sep 24 09:11:26 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1841837373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 21.usbdev_setup_trans_ignored.1841837373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_smoke.3979337778 |
| Short name | T1692 |
| Test name | |
| Test status | |
| Simulation time | 263746293 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:11:24 AM UTC 24 |
| Finished | Sep 24 09:11:27 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3979337778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_smoke.3979337778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_spurious_pids_ignored.3523862564 |
| Short name | T1708 |
| Test name | |
| Test status | |
| Simulation time | 2292203236 ps |
| CPU time | 17.08 seconds |
| Started | Sep 24 09:11:24 AM UTC 24 |
| Finished | Sep 24 09:11:43 AM UTC 24 |
| Peak memory | 234884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3523862564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_spurious_pids_ignored.3523862564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_stall_priority_over_nak.1336290756 |
| Short name | T1691 |
| Test name | |
| Test status | |
| Simulation time | 203665351 ps |
| CPU time | 1.35 seconds |
| Started | Sep 24 09:11:24 AM UTC 24 |
| Finished | Sep 24 09:11:27 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1336290756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stall_priority_over_nak.1336290756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_stall_trans.334901343 |
| Short name | T1690 |
| Test name | |
| Test status | |
| Simulation time | 170352936 ps |
| CPU time | 1.29 seconds |
| Started | Sep 24 09:11:24 AM UTC 24 |
| Finished | Sep 24 09:11:27 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=334901343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_stall_trans.334901343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_stream_len_max.1445535940 |
| Short name | T1695 |
| Test name | |
| Test status | |
| Simulation time | 1403863194 ps |
| CPU time | 3.54 seconds |
| Started | Sep 24 09:11:24 AM UTC 24 |
| Finished | Sep 24 09:11:29 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1445535940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stream_len_max.1445535940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_streaming_out.3162394505 |
| Short name | T1763 |
| Test name | |
| Test status | |
| Simulation time | 2163185700 ps |
| CPU time | 54.84 seconds |
| Started | Sep 24 09:11:24 AM UTC 24 |
| Finished | Sep 24 09:12:21 AM UTC 24 |
| Peak memory | 228228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3162394505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_streaming_out.3162394505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_timeout_missing_host_handshake.1349329311 |
| Short name | T1697 |
| Test name | |
| Test status | |
| Simulation time | 5537284977 ps |
| CPU time | 34.28 seconds |
| Started | Sep 24 09:10:58 AM UTC 24 |
| Finished | Sep 24 09:11:33 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1349329311 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_timeout_missing_host_handshake.1349329311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/21.usbdev_tx_rx_disruption.895491658 |
| Short name | T1694 |
| Test name | |
| Test status | |
| Simulation time | 486820938 ps |
| CPU time | 2.29 seconds |
| Started | Sep 24 09:11:24 AM UTC 24 |
| Finished | Sep 24 09:11:28 AM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=895491658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_tx _rx_disruption.895491658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/21.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/210.usbdev_tx_rx_disruption.3909270774 |
| Short name | T3514 |
| Test name | |
| Test status | |
| Simulation time | 611212683 ps |
| CPU time | 2.12 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 217824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3909270774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 210.usbdev_ tx_rx_disruption.3909270774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/210.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/211.usbdev_tx_rx_disruption.2675522339 |
| Short name | T3485 |
| Test name | |
| Test status | |
| Simulation time | 495037987 ps |
| CPU time | 1.95 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2675522339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 211.usbdev_ tx_rx_disruption.2675522339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/211.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/212.usbdev_tx_rx_disruption.2678971271 |
| Short name | T3509 |
| Test name | |
| Test status | |
| Simulation time | 655356510 ps |
| CPU time | 2.01 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2678971271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 212.usbdev_ tx_rx_disruption.2678971271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/212.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/213.usbdev_tx_rx_disruption.1955724116 |
| Short name | T3507 |
| Test name | |
| Test status | |
| Simulation time | 545833995 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 215588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1955724116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 213.usbdev_ tx_rx_disruption.1955724116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/213.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/214.usbdev_tx_rx_disruption.914491160 |
| Short name | T3517 |
| Test name | |
| Test status | |
| Simulation time | 660628559 ps |
| CPU time | 1.94 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 215512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=914491160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 214.usbdev_t x_rx_disruption.914491160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/214.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/215.usbdev_tx_rx_disruption.1938799514 |
| Short name | T3516 |
| Test name | |
| Test status | |
| Simulation time | 522614261 ps |
| CPU time | 1.89 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1938799514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 215.usbdev_ tx_rx_disruption.1938799514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/215.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/216.usbdev_tx_rx_disruption.4126142760 |
| Short name | T3511 |
| Test name | |
| Test status | |
| Simulation time | 515255245 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4126142760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 216.usbdev_ tx_rx_disruption.4126142760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/216.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/217.usbdev_tx_rx_disruption.3642175635 |
| Short name | T3519 |
| Test name | |
| Test status | |
| Simulation time | 617858134 ps |
| CPU time | 2.17 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 217584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3642175635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 217.usbdev_ tx_rx_disruption.3642175635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/217.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/218.usbdev_tx_rx_disruption.385658349 |
| Short name | T3518 |
| Test name | |
| Test status | |
| Simulation time | 560193530 ps |
| CPU time | 1.97 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 215192 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=385658349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 218.usbdev_t x_rx_disruption.385658349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/218.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/219.usbdev_tx_rx_disruption.1010161488 |
| Short name | T3510 |
| Test name | |
| Test status | |
| Simulation time | 494505554 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1010161488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 219.usbdev_ tx_rx_disruption.1010161488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/219.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_alert_test.1143598257 |
| Short name | T1736 |
| Test name | |
| Test status | |
| Simulation time | 53001157 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:12:04 AM UTC 24 |
| Finished | Sep 24 09:12:06 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1143598257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 22.usbdev_alert_test.1143598257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_disconnect.3377146089 |
| Short name | T1651 |
| Test name | |
| Test status | |
| Simulation time | 6515178369 ps |
| CPU time | 8.86 seconds |
| Started | Sep 24 09:11:24 AM UTC 24 |
| Finished | Sep 24 09:11:35 AM UTC 24 |
| Peak memory | 228384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3377146089 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_disconnect.3377146089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_reset.3595525313 |
| Short name | T1730 |
| Test name | |
| Test status | |
| Simulation time | 20369445361 ps |
| CPU time | 26.2 seconds |
| Started | Sep 24 09:11:37 AM UTC 24 |
| Finished | Sep 24 09:12:04 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3595525313 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_reset.3595525313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_resume.1150438707 |
| Short name | T1759 |
| Test name | |
| Test status | |
| Simulation time | 30747129751 ps |
| CPU time | 40.17 seconds |
| Started | Sep 24 09:11:37 AM UTC 24 |
| Finished | Sep 24 09:12:18 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1150438707 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_resume.1150438707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_av_buffer.3190125654 |
| Short name | T1687 |
| Test name | |
| Test status | |
| Simulation time | 151308519 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:11:37 AM UTC 24 |
| Finished | Sep 24 09:11:39 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3190125654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_av_buffer.3190125654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_bitstuff_err.2367099144 |
| Short name | T1579 |
| Test name | |
| Test status | |
| Simulation time | 190854819 ps |
| CPU time | 0.96 seconds |
| Started | Sep 24 09:11:37 AM UTC 24 |
| Finished | Sep 24 09:11:39 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2367099144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_bitstuff_err.2367099144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_clear.3685541578 |
| Short name | T1703 |
| Test name | |
| Test status | |
| Simulation time | 238816164 ps |
| CPU time | 1.9 seconds |
| Started | Sep 24 09:11:37 AM UTC 24 |
| Finished | Sep 24 09:11:40 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3685541578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 22.usbdev_data_toggle_clear.3685541578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_restore.3362083293 |
| Short name | T1707 |
| Test name | |
| Test status | |
| Simulation time | 920983079 ps |
| CPU time | 3.21 seconds |
| Started | Sep 24 09:11:37 AM UTC 24 |
| Finished | Sep 24 09:11:41 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3362083293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_data_toggle_restore.3362083293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_device_address.4128928076 |
| Short name | T1768 |
| Test name | |
| Test status | |
| Simulation time | 27190048657 ps |
| CPU time | 48.11 seconds |
| Started | Sep 24 09:11:37 AM UTC 24 |
| Finished | Sep 24 09:12:27 AM UTC 24 |
| Peak memory | 218284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4128928076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_address.4128928076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_device_timeout.953081592 |
| Short name | T1722 |
| Test name | |
| Test status | |
| Simulation time | 847476540 ps |
| CPU time | 16.16 seconds |
| Started | Sep 24 09:11:37 AM UTC 24 |
| Finished | Sep 24 09:11:54 AM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=953081592 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_timeout.953081592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_disable_endpoint.852190787 |
| Short name | T1700 |
| Test name | |
| Test status | |
| Simulation time | 534881261 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 09:11:37 AM UTC 24 |
| Finished | Sep 24 09:11:40 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=852190787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_disable_endpoint.852190787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_disconnected.2811110660 |
| Short name | T1464 |
| Test name | |
| Test status | |
| Simulation time | 140643211 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:11:37 AM UTC 24 |
| Finished | Sep 24 09:11:39 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2811110660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_disconnected.2811110660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_enable.1472701907 |
| Short name | T1406 |
| Test name | |
| Test status | |
| Simulation time | 49750394 ps |
| CPU time | 0.83 seconds |
| Started | Sep 24 09:11:37 AM UTC 24 |
| Finished | Sep 24 09:11:39 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1472701907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_enable.1472701907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_access.102124252 |
| Short name | T1705 |
| Test name | |
| Test status | |
| Simulation time | 798392983 ps |
| CPU time | 2.55 seconds |
| Started | Sep 24 09:11:37 AM UTC 24 |
| Finished | Sep 24 09:11:41 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=102124252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_access.102124252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_types.3872030572 |
| Short name | T1701 |
| Test name | |
| Test status | |
| Simulation time | 341480127 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:11:37 AM UTC 24 |
| Finished | Sep 24 09:11:40 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3872030572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_types.3872030572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_levels.88200508 |
| Short name | T1299 |
| Test name | |
| Test status | |
| Simulation time | 143804762 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:11:37 AM UTC 24 |
| Finished | Sep 24 09:11:39 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=88200508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_fifo_levels.88200508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_rst.497393498 |
| Short name | T1706 |
| Test name | |
| Test status | |
| Simulation time | 287085143 ps |
| CPU time | 2.64 seconds |
| Started | Sep 24 09:11:37 AM UTC 24 |
| Finished | Sep 24 09:11:41 AM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=497393498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_fifo_rst.497393498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_in_iso.4252173006 |
| Short name | T1702 |
| Test name | |
| Test status | |
| Simulation time | 220473356 ps |
| CPU time | 1.31 seconds |
| Started | Sep 24 09:11:37 AM UTC 24 |
| Finished | Sep 24 09:11:40 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4252173006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_in_iso.4252173006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_in_stall.4112291100 |
| Short name | T1699 |
| Test name | |
| Test status | |
| Simulation time | 196730692 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:11:38 AM UTC 24 |
| Finished | Sep 24 09:11:40 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4112291100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_stall.4112291100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_in_trans.495716812 |
| Short name | T1704 |
| Test name | |
| Test status | |
| Simulation time | 233127633 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 09:11:38 AM UTC 24 |
| Finished | Sep 24 09:11:40 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=495716812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_in_trans.495716812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_invalid_sync.998375310 |
| Short name | T1748 |
| Test name | |
| Test status | |
| Simulation time | 4974726825 ps |
| CPU time | 36.36 seconds |
| Started | Sep 24 09:11:37 AM UTC 24 |
| Finished | Sep 24 09:12:15 AM UTC 24 |
| Peak memory | 235028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=998375310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_invalid_sync.998375310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_iso_retraction.2485705295 |
| Short name | T1893 |
| Test name | |
| Test status | |
| Simulation time | 12304194939 ps |
| CPU time | 141.25 seconds |
| Started | Sep 24 09:11:38 AM UTC 24 |
| Finished | Sep 24 09:14:01 AM UTC 24 |
| Peak memory | 218188 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2485705295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_iso_retraction.2485705295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_link_in_err.33152728 |
| Short name | T1334 |
| Test name | |
| Test status | |
| Simulation time | 231362544 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:11:38 AM UTC 24 |
| Finished | Sep 24 09:11:40 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=33152728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_link_in_err.33152728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_link_resume.3189341547 |
| Short name | T1745 |
| Test name | |
| Test status | |
| Simulation time | 9594462149 ps |
| CPU time | 15.82 seconds |
| Started | Sep 24 09:11:51 AM UTC 24 |
| Finished | Sep 24 09:12:08 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3189341547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_resume.3189341547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_link_suspend.2521855387 |
| Short name | T1728 |
| Test name | |
| Test status | |
| Simulation time | 5605728166 ps |
| CPU time | 8.24 seconds |
| Started | Sep 24 09:11:51 AM UTC 24 |
| Finished | Sep 24 09:12:01 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2521855387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_link_suspend.2521855387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_low_speed_traffic.3133251831 |
| Short name | T1921 |
| Test name | |
| Test status | |
| Simulation time | 5322317433 ps |
| CPU time | 142.52 seconds |
| Started | Sep 24 09:11:51 AM UTC 24 |
| Finished | Sep 24 09:14:16 AM UTC 24 |
| Peak memory | 230660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3133251831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_low_speed_traffic.3133251831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_max_inter_pkt_delay.875728892 |
| Short name | T1802 |
| Test name | |
| Test status | |
| Simulation time | 2316536308 ps |
| CPU time | 55.26 seconds |
| Started | Sep 24 09:11:51 AM UTC 24 |
| Finished | Sep 24 09:12:48 AM UTC 24 |
| Peak memory | 228744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=875728892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_inter_pkt_delay.875728892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_in_transaction.2350481448 |
| Short name | T1711 |
| Test name | |
| Test status | |
| Simulation time | 242239583 ps |
| CPU time | 1.2 seconds |
| Started | Sep 24 09:11:51 AM UTC 24 |
| Finished | Sep 24 09:11:54 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2350481448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_in_transaction.2350481448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_out_transaction.211205883 |
| Short name | T1713 |
| Test name | |
| Test status | |
| Simulation time | 179702428 ps |
| CPU time | 1.28 seconds |
| Started | Sep 24 09:11:51 AM UTC 24 |
| Finished | Sep 24 09:11:54 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=211205883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 22.usbdev_max_length_out_transaction.211205883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_max_non_iso_usb_traffic.4197036453 |
| Short name | T1761 |
| Test name | |
| Test status | |
| Simulation time | 2962806589 ps |
| CPU time | 27.51 seconds |
| Started | Sep 24 09:11:52 AM UTC 24 |
| Finished | Sep 24 09:12:20 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4197036453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_non_iso_usb_traffic.4197036453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_min_inter_pkt_delay.2087055784 |
| Short name | T1841 |
| Test name | |
| Test status | |
| Simulation time | 3035692359 ps |
| CPU time | 81.83 seconds |
| Started | Sep 24 09:11:52 AM UTC 24 |
| Finished | Sep 24 09:13:15 AM UTC 24 |
| Peak memory | 228460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2087055784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_inter_pkt_delay.2087055784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_in_transaction.775154561 |
| Short name | T1715 |
| Test name | |
| Test status | |
| Simulation time | 155830649 ps |
| CPU time | 1.3 seconds |
| Started | Sep 24 09:11:52 AM UTC 24 |
| Finished | Sep 24 09:11:54 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=775154561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_in_transaction.775154561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_out_transaction.500853801 |
| Short name | T1718 |
| Test name | |
| Test status | |
| Simulation time | 175303767 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 09:11:52 AM UTC 24 |
| Finished | Sep 24 09:11:54 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=500853801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 22.usbdev_min_length_out_transaction.500853801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_nak_trans.2380290024 |
| Short name | T145 |
| Test name | |
| Test status | |
| Simulation time | 205586704 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:11:52 AM UTC 24 |
| Finished | Sep 24 09:11:54 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2380290024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_nak_trans.2380290024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_out_iso.985845497 |
| Short name | T1712 |
| Test name | |
| Test status | |
| Simulation time | 203752584 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:11:52 AM UTC 24 |
| Finished | Sep 24 09:11:54 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=985845497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_out_iso.985845497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_out_stall.239135586 |
| Short name | T1716 |
| Test name | |
| Test status | |
| Simulation time | 185116958 ps |
| CPU time | 1.3 seconds |
| Started | Sep 24 09:11:52 AM UTC 24 |
| Finished | Sep 24 09:11:54 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=239135586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_out_stall.239135586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_out_trans_nak.133810267 |
| Short name | T1714 |
| Test name | |
| Test status | |
| Simulation time | 167172918 ps |
| CPU time | 1.14 seconds |
| Started | Sep 24 09:11:52 AM UTC 24 |
| Finished | Sep 24 09:11:54 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=133810267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_out_trans_nak.133810267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_pending_in_trans.2251819226 |
| Short name | T1719 |
| Test name | |
| Test status | |
| Simulation time | 172507447 ps |
| CPU time | 1.35 seconds |
| Started | Sep 24 09:11:52 AM UTC 24 |
| Finished | Sep 24 09:11:54 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2251819226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_pending_in_trans.2251819226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_pinflip.666812839 |
| Short name | T1720 |
| Test name | |
| Test status | |
| Simulation time | 238313727 ps |
| CPU time | 1.31 seconds |
| Started | Sep 24 09:11:52 AM UTC 24 |
| Finished | Sep 24 09:11:54 AM UTC 24 |
| Peak memory | 215924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=666812839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_pinflip.666812839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_usb_ref_disable.3104187100 |
| Short name | T1721 |
| Test name | |
| Test status | |
| Simulation time | 194220371 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 09:11:52 AM UTC 24 |
| Finished | Sep 24 09:11:54 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3104187100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_usb_ref_disable.3104187100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_phy_pins_sense.523288212 |
| Short name | T1717 |
| Test name | |
| Test status | |
| Simulation time | 53470386 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:11:52 AM UTC 24 |
| Finished | Sep 24 09:11:54 AM UTC 24 |
| Peak memory | 215696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=523288212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_phy_pins_sense.523288212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_buffer.3760352036 |
| Short name | T1779 |
| Test name | |
| Test status | |
| Simulation time | 12854530520 ps |
| CPU time | 34.68 seconds |
| Started | Sep 24 09:11:52 AM UTC 24 |
| Finished | Sep 24 09:12:28 AM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3760352036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_pkt_buffer.3760352036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_received.1792857198 |
| Short name | T1724 |
| Test name | |
| Test status | |
| Simulation time | 186518219 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:11:52 AM UTC 24 |
| Finished | Sep 24 09:11:55 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1792857198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_pkt_received.1792857198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_sent.1321730176 |
| Short name | T1723 |
| Test name | |
| Test status | |
| Simulation time | 172357963 ps |
| CPU time | 1.33 seconds |
| Started | Sep 24 09:11:52 AM UTC 24 |
| Finished | Sep 24 09:11:54 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1321730176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_pkt_sent.1321730176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_in_transaction.2873013331 |
| Short name | T1726 |
| Test name | |
| Test status | |
| Simulation time | 243515815 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:11:52 AM UTC 24 |
| Finished | Sep 24 09:11:55 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2873013331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_random_length_in_transaction.2873013331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_out_transaction.4093572978 |
| Short name | T1725 |
| Test name | |
| Test status | |
| Simulation time | 199119817 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 09:11:52 AM UTC 24 |
| Finished | Sep 24 09:11:55 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4093572978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_random_length_out_transaction.4093572978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_rx_crc_err.3929731470 |
| Short name | T1731 |
| Test name | |
| Test status | |
| Simulation time | 158100681 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 09:12:03 AM UTC 24 |
| Finished | Sep 24 09:12:05 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3929731470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_rx_crc_err.3929731470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_rx_full.2074451370 |
| Short name | T1737 |
| Test name | |
| Test status | |
| Simulation time | 346804752 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:12:03 AM UTC 24 |
| Finished | Sep 24 09:12:06 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2074451370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_rx_full.2074451370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_setup_stage.3009236222 |
| Short name | T1738 |
| Test name | |
| Test status | |
| Simulation time | 180643379 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:12:03 AM UTC 24 |
| Finished | Sep 24 09:12:06 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3009236222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_setup_stage.3009236222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_setup_trans_ignored.3655075264 |
| Short name | T1733 |
| Test name | |
| Test status | |
| Simulation time | 153829436 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:12:03 AM UTC 24 |
| Finished | Sep 24 09:12:05 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3655075264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 22.usbdev_setup_trans_ignored.3655075264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_smoke.3546515973 |
| Short name | T1734 |
| Test name | |
| Test status | |
| Simulation time | 235963322 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:12:03 AM UTC 24 |
| Finished | Sep 24 09:12:05 AM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3546515973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_smoke.3546515973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_spurious_pids_ignored.3120604092 |
| Short name | T1764 |
| Test name | |
| Test status | |
| Simulation time | 2582359855 ps |
| CPU time | 19.14 seconds |
| Started | Sep 24 09:12:03 AM UTC 24 |
| Finished | Sep 24 09:12:24 AM UTC 24 |
| Peak memory | 234956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3120604092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_spurious_pids_ignored.3120604092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_stall_priority_over_nak.2673351911 |
| Short name | T1739 |
| Test name | |
| Test status | |
| Simulation time | 175630577 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:12:03 AM UTC 24 |
| Finished | Sep 24 09:12:06 AM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2673351911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stall_priority_over_nak.2673351911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_stall_trans.3030335848 |
| Short name | T1742 |
| Test name | |
| Test status | |
| Simulation time | 203866146 ps |
| CPU time | 1.76 seconds |
| Started | Sep 24 09:12:03 AM UTC 24 |
| Finished | Sep 24 09:12:06 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3030335848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_stall_trans.3030335848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_stream_len_max.2937729649 |
| Short name | T1744 |
| Test name | |
| Test status | |
| Simulation time | 602366368 ps |
| CPU time | 2.5 seconds |
| Started | Sep 24 09:12:03 AM UTC 24 |
| Finished | Sep 24 09:12:07 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2937729649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stream_len_max.2937729649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_streaming_out.4268737513 |
| Short name | T1769 |
| Test name | |
| Test status | |
| Simulation time | 2401581316 ps |
| CPU time | 22.2 seconds |
| Started | Sep 24 09:12:03 AM UTC 24 |
| Finished | Sep 24 09:12:27 AM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4268737513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_streaming_out.4268737513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_timeout_missing_host_handshake.3557912629 |
| Short name | T1710 |
| Test name | |
| Test status | |
| Simulation time | 719779072 ps |
| CPU time | 13.55 seconds |
| Started | Sep 24 09:11:37 AM UTC 24 |
| Finished | Sep 24 09:11:52 AM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3557912629 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_timeout_missing_host_handshake.3557912629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/22.usbdev_tx_rx_disruption.2240422701 |
| Short name | T1743 |
| Test name | |
| Test status | |
| Simulation time | 553244949 ps |
| CPU time | 1.95 seconds |
| Started | Sep 24 09:12:03 AM UTC 24 |
| Finished | Sep 24 09:12:06 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2240422701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_t x_rx_disruption.2240422701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/22.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/220.usbdev_tx_rx_disruption.1388005165 |
| Short name | T3515 |
| Test name | |
| Test status | |
| Simulation time | 590242268 ps |
| CPU time | 1.83 seconds |
| Started | Sep 24 09:42:36 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 217688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1388005165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 220.usbdev_ tx_rx_disruption.1388005165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/220.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/221.usbdev_tx_rx_disruption.2956606198 |
| Short name | T3513 |
| Test name | |
| Test status | |
| Simulation time | 469187551 ps |
| CPU time | 1.75 seconds |
| Started | Sep 24 09:42:37 AM UTC 24 |
| Finished | Sep 24 09:42:40 AM UTC 24 |
| Peak memory | 215624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2956606198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 221.usbdev_ tx_rx_disruption.2956606198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/221.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/222.usbdev_tx_rx_disruption.2042452446 |
| Short name | T3524 |
| Test name | |
| Test status | |
| Simulation time | 544807829 ps |
| CPU time | 1.63 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:30 AM UTC 24 |
| Peak memory | 216684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2042452446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 222.usbdev_ tx_rx_disruption.2042452446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/222.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/223.usbdev_tx_rx_disruption.288678622 |
| Short name | T3523 |
| Test name | |
| Test status | |
| Simulation time | 526266515 ps |
| CPU time | 1.63 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:30 AM UTC 24 |
| Peak memory | 216496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=288678622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 223.usbdev_t x_rx_disruption.288678622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/223.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/224.usbdev_tx_rx_disruption.3179387652 |
| Short name | T3521 |
| Test name | |
| Test status | |
| Simulation time | 467349847 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:30 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3179387652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 224.usbdev_ tx_rx_disruption.3179387652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/224.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/225.usbdev_tx_rx_disruption.2828187015 |
| Short name | T3529 |
| Test name | |
| Test status | |
| Simulation time | 583685130 ps |
| CPU time | 2.06 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 217712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2828187015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 225.usbdev_ tx_rx_disruption.2828187015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/225.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/226.usbdev_tx_rx_disruption.3688613994 |
| Short name | T3522 |
| Test name | |
| Test status | |
| Simulation time | 559779842 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:30 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3688613994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 226.usbdev_ tx_rx_disruption.3688613994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/226.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/227.usbdev_tx_rx_disruption.2866760421 |
| Short name | T3525 |
| Test name | |
| Test status | |
| Simulation time | 506917030 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:30 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2866760421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 227.usbdev_ tx_rx_disruption.2866760421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/227.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/228.usbdev_tx_rx_disruption.114570350 |
| Short name | T3528 |
| Test name | |
| Test status | |
| Simulation time | 703876932 ps |
| CPU time | 1.93 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=114570350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 228.usbdev_t x_rx_disruption.114570350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/228.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/229.usbdev_tx_rx_disruption.3966645425 |
| Short name | T3540 |
| Test name | |
| Test status | |
| Simulation time | 622184774 ps |
| CPU time | 2.14 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3966645425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 229.usbdev_ tx_rx_disruption.3966645425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/229.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_alert_test.3809318089 |
| Short name | T1803 |
| Test name | |
| Test status | |
| Simulation time | 27461325 ps |
| CPU time | 0.73 seconds |
| Started | Sep 24 09:12:50 AM UTC 24 |
| Finished | Sep 24 09:12:52 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3809318089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 23.usbdev_alert_test.3809318089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_disconnect.2981629506 |
| Short name | T1747 |
| Test name | |
| Test status | |
| Simulation time | 4885383739 ps |
| CPU time | 8.63 seconds |
| Started | Sep 24 09:12:04 AM UTC 24 |
| Finished | Sep 24 09:12:13 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2981629506 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_disconnect.2981629506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_reset.268801730 |
| Short name | T1780 |
| Test name | |
| Test status | |
| Simulation time | 20340822138 ps |
| CPU time | 26.87 seconds |
| Started | Sep 24 09:12:04 AM UTC 24 |
| Finished | Sep 24 09:12:32 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=268801730 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_reset.268801730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_resume.440381181 |
| Short name | T1781 |
| Test name | |
| Test status | |
| Simulation time | 24806480394 ps |
| CPU time | 31.13 seconds |
| Started | Sep 24 09:12:04 AM UTC 24 |
| Finished | Sep 24 09:12:36 AM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=440381181 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_resume.440381181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_av_buffer.4102111436 |
| Short name | T1741 |
| Test name | |
| Test status | |
| Simulation time | 154433302 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:12:04 AM UTC 24 |
| Finished | Sep 24 09:12:06 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4102111436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_av_buffer.4102111436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_bitstuff_err.1451879628 |
| Short name | T1740 |
| Test name | |
| Test status | |
| Simulation time | 150963239 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:12:04 AM UTC 24 |
| Finished | Sep 24 09:12:06 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1451879628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_bitstuff_err.1451879628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_clear.2847349395 |
| Short name | T1758 |
| Test name | |
| Test status | |
| Simulation time | 500743172 ps |
| CPU time | 2.86 seconds |
| Started | Sep 24 09:12:14 AM UTC 24 |
| Finished | Sep 24 09:12:18 AM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2847349395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 23.usbdev_data_toggle_clear.2847349395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_restore.705615862 |
| Short name | T1751 |
| Test name | |
| Test status | |
| Simulation time | 507594190 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:12:14 AM UTC 24 |
| Finished | Sep 24 09:12:17 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=705615862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_data_toggle_restore.705615862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_device_address.2403731351 |
| Short name | T1812 |
| Test name | |
| Test status | |
| Simulation time | 22871589460 ps |
| CPU time | 37.71 seconds |
| Started | Sep 24 09:12:14 AM UTC 24 |
| Finished | Sep 24 09:12:54 AM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2403731351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_address.2403731351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_device_timeout.1875733201 |
| Short name | T1762 |
| Test name | |
| Test status | |
| Simulation time | 635509050 ps |
| CPU time | 5.07 seconds |
| Started | Sep 24 09:12:15 AM UTC 24 |
| Finished | Sep 24 09:12:21 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1875733201 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_timeout.1875733201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_disable_endpoint.501633345 |
| Short name | T1754 |
| Test name | |
| Test status | |
| Simulation time | 666204171 ps |
| CPU time | 1.88 seconds |
| Started | Sep 24 09:12:15 AM UTC 24 |
| Finished | Sep 24 09:12:17 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=501633345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_disable_endpoint.501633345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_disconnected.2856082690 |
| Short name | T1750 |
| Test name | |
| Test status | |
| Simulation time | 177349585 ps |
| CPU time | 1.31 seconds |
| Started | Sep 24 09:12:15 AM UTC 24 |
| Finished | Sep 24 09:12:17 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2856082690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_disconnected.2856082690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_enable.2429404977 |
| Short name | T1749 |
| Test name | |
| Test status | |
| Simulation time | 36420113 ps |
| CPU time | 0.89 seconds |
| Started | Sep 24 09:12:15 AM UTC 24 |
| Finished | Sep 24 09:12:17 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2429404977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 23.usbdev_enable.2429404977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_access.1756208208 |
| Short name | T1760 |
| Test name | |
| Test status | |
| Simulation time | 865873450 ps |
| CPU time | 3.5 seconds |
| Started | Sep 24 09:12:15 AM UTC 24 |
| Finished | Sep 24 09:12:19 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1756208208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_access.1756208208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_types.74447714 |
| Short name | T518 |
| Test name | |
| Test status | |
| Simulation time | 341367947 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:12:15 AM UTC 24 |
| Finished | Sep 24 09:12:17 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=74447714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_types.74447714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_levels.4189281617 |
| Short name | T406 |
| Test name | |
| Test status | |
| Simulation time | 250666350 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:12:15 AM UTC 24 |
| Finished | Sep 24 09:12:17 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4189281617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_fifo_levels.4189281617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_rst.2344756352 |
| Short name | T1757 |
| Test name | |
| Test status | |
| Simulation time | 321333356 ps |
| CPU time | 2.19 seconds |
| Started | Sep 24 09:12:15 AM UTC 24 |
| Finished | Sep 24 09:12:18 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2344756352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_fifo_rst.2344756352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_in_iso.33166637 |
| Short name | T1756 |
| Test name | |
| Test status | |
| Simulation time | 219945910 ps |
| CPU time | 1.78 seconds |
| Started | Sep 24 09:12:15 AM UTC 24 |
| Finished | Sep 24 09:12:18 AM UTC 24 |
| Peak memory | 226040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=33166637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_in_iso.33166637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_in_stall.2005542129 |
| Short name | T1752 |
| Test name | |
| Test status | |
| Simulation time | 138915489 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 09:12:15 AM UTC 24 |
| Finished | Sep 24 09:12:17 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2005542129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_in_stall.2005542129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_in_trans.2961478839 |
| Short name | T1753 |
| Test name | |
| Test status | |
| Simulation time | 200404895 ps |
| CPU time | 1.35 seconds |
| Started | Sep 24 09:12:15 AM UTC 24 |
| Finished | Sep 24 09:12:17 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2961478839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_in_trans.2961478839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_invalid_sync.2822638256 |
| Short name | T1874 |
| Test name | |
| Test status | |
| Simulation time | 3191348949 ps |
| CPU time | 88.6 seconds |
| Started | Sep 24 09:12:15 AM UTC 24 |
| Finished | Sep 24 09:13:45 AM UTC 24 |
| Peak memory | 235000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2822638256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 23.usbdev_invalid_sync.2822638256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_iso_retraction.2341879174 |
| Short name | T1966 |
| Test name | |
| Test status | |
| Simulation time | 13158892771 ps |
| CPU time | 150.21 seconds |
| Started | Sep 24 09:12:15 AM UTC 24 |
| Finished | Sep 24 09:14:48 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2341879174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_iso_retraction.2341879174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_link_in_err.3619492621 |
| Short name | T1755 |
| Test name | |
| Test status | |
| Simulation time | 186691234 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 09:12:15 AM UTC 24 |
| Finished | Sep 24 09:12:18 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3619492621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_in_err.3619492621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_link_resume.681283753 |
| Short name | T1839 |
| Test name | |
| Test status | |
| Simulation time | 28232360339 ps |
| CPU time | 47.94 seconds |
| Started | Sep 24 09:12:24 AM UTC 24 |
| Finished | Sep 24 09:13:14 AM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=681283753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_link_resume.681283753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_link_suspend.241158040 |
| Short name | T1782 |
| Test name | |
| Test status | |
| Simulation time | 9491218737 ps |
| CPU time | 12.27 seconds |
| Started | Sep 24 09:12:24 AM UTC 24 |
| Finished | Sep 24 09:12:38 AM UTC 24 |
| Peak memory | 218316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=241158040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_suspend.241158040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_low_speed_traffic.3377644959 |
| Short name | T1864 |
| Test name | |
| Test status | |
| Simulation time | 2847406302 ps |
| CPU time | 72.91 seconds |
| Started | Sep 24 09:12:24 AM UTC 24 |
| Finished | Sep 24 09:13:39 AM UTC 24 |
| Peak memory | 230336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3377644959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_low_speed_traffic.3377644959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_max_inter_pkt_delay.2576009613 |
| Short name | T1800 |
| Test name | |
| Test status | |
| Simulation time | 2096125081 ps |
| CPU time | 19.26 seconds |
| Started | Sep 24 09:12:24 AM UTC 24 |
| Finished | Sep 24 09:12:45 AM UTC 24 |
| Peak memory | 226784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2576009613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_inter_pkt_delay.2576009613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_in_transaction.2106866652 |
| Short name | T1776 |
| Test name | |
| Test status | |
| Simulation time | 252357809 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:12:24 AM UTC 24 |
| Finished | Sep 24 09:12:27 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2106866652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_in_transaction.2106866652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_out_transaction.3057434681 |
| Short name | T1766 |
| Test name | |
| Test status | |
| Simulation time | 194241962 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:12:25 AM UTC 24 |
| Finished | Sep 24 09:12:27 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3057434681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_out_transaction.3057434681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_max_non_iso_usb_traffic.1482212689 |
| Short name | T1838 |
| Test name | |
| Test status | |
| Simulation time | 1782755461 ps |
| CPU time | 45.53 seconds |
| Started | Sep 24 09:12:25 AM UTC 24 |
| Finished | Sep 24 09:13:12 AM UTC 24 |
| Peak memory | 234868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1482212689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_non_iso_usb_traffic.1482212689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_min_inter_pkt_delay.3307331795 |
| Short name | T1873 |
| Test name | |
| Test status | |
| Simulation time | 2855329854 ps |
| CPU time | 76.26 seconds |
| Started | Sep 24 09:12:25 AM UTC 24 |
| Finished | Sep 24 09:13:43 AM UTC 24 |
| Peak memory | 228456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3307331795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_inter_pkt_delay.3307331795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_in_transaction.4239258766 |
| Short name | T1775 |
| Test name | |
| Test status | |
| Simulation time | 162405440 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 09:12:25 AM UTC 24 |
| Finished | Sep 24 09:12:27 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4239258766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_in_transaction.4239258766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_out_transaction.1182793231 |
| Short name | T1770 |
| Test name | |
| Test status | |
| Simulation time | 165492858 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:12:25 AM UTC 24 |
| Finished | Sep 24 09:12:27 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1182793231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_out_transaction.1182793231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_nak_trans.249127516 |
| Short name | T1773 |
| Test name | |
| Test status | |
| Simulation time | 213580761 ps |
| CPU time | 1.38 seconds |
| Started | Sep 24 09:12:25 AM UTC 24 |
| Finished | Sep 24 09:12:27 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=249127516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_nak_trans.249127516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_out_iso.2323772368 |
| Short name | T1771 |
| Test name | |
| Test status | |
| Simulation time | 167093063 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:12:25 AM UTC 24 |
| Finished | Sep 24 09:12:27 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2323772368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_out_iso.2323772368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_out_stall.2725580274 |
| Short name | T1777 |
| Test name | |
| Test status | |
| Simulation time | 200059011 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:12:25 AM UTC 24 |
| Finished | Sep 24 09:12:27 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2725580274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_out_stall.2725580274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_out_trans_nak.2357045111 |
| Short name | T1772 |
| Test name | |
| Test status | |
| Simulation time | 156890849 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:12:25 AM UTC 24 |
| Finished | Sep 24 09:12:27 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2357045111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_out_trans_nak.2357045111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_pending_in_trans.4245124585 |
| Short name | T1778 |
| Test name | |
| Test status | |
| Simulation time | 155015526 ps |
| CPU time | 1.28 seconds |
| Started | Sep 24 09:12:25 AM UTC 24 |
| Finished | Sep 24 09:12:27 AM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4245124585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_pending_in_trans.4245124585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_pinflip.1033085565 |
| Short name | T1774 |
| Test name | |
| Test status | |
| Simulation time | 229651656 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:12:25 AM UTC 24 |
| Finished | Sep 24 09:12:27 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1033085565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_pinflip.1033085565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_usb_ref_disable.2706962777 |
| Short name | T1785 |
| Test name | |
| Test status | |
| Simulation time | 192625982 ps |
| CPU time | 1.23 seconds |
| Started | Sep 24 09:12:38 AM UTC 24 |
| Finished | Sep 24 09:12:40 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2706962777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_usb_ref_disable.2706962777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_phy_pins_sense.3734250694 |
| Short name | T1783 |
| Test name | |
| Test status | |
| Simulation time | 101996078 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:12:38 AM UTC 24 |
| Finished | Sep 24 09:12:40 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3734250694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_pins_sense.3734250694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_buffer.596941677 |
| Short name | T1826 |
| Test name | |
| Test status | |
| Simulation time | 9919782972 ps |
| CPU time | 26.51 seconds |
| Started | Sep 24 09:12:38 AM UTC 24 |
| Finished | Sep 24 09:13:06 AM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=596941677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_pkt_buffer.596941677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_received.930073094 |
| Short name | T1793 |
| Test name | |
| Test status | |
| Simulation time | 196397149 ps |
| CPU time | 1.8 seconds |
| Started | Sep 24 09:12:38 AM UTC 24 |
| Finished | Sep 24 09:12:41 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=930073094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_pkt_received.930073094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_sent.3738761964 |
| Short name | T1784 |
| Test name | |
| Test status | |
| Simulation time | 189168749 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:12:38 AM UTC 24 |
| Finished | Sep 24 09:12:40 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3738761964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_pkt_sent.3738761964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_in_transaction.984834213 |
| Short name | T1788 |
| Test name | |
| Test status | |
| Simulation time | 212277236 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:12:38 AM UTC 24 |
| Finished | Sep 24 09:12:40 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=984834213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_random_length_in_transaction.984834213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_out_transaction.2978648467 |
| Short name | T1789 |
| Test name | |
| Test status | |
| Simulation time | 213532706 ps |
| CPU time | 1.29 seconds |
| Started | Sep 24 09:12:38 AM UTC 24 |
| Finished | Sep 24 09:12:40 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2978648467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_random_length_out_transaction.2978648467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_rx_crc_err.3320574597 |
| Short name | T1786 |
| Test name | |
| Test status | |
| Simulation time | 166425229 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:12:38 AM UTC 24 |
| Finished | Sep 24 09:12:40 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3320574597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_rx_crc_err.3320574597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_rx_full.3611291136 |
| Short name | T1794 |
| Test name | |
| Test status | |
| Simulation time | 307930851 ps |
| CPU time | 1.47 seconds |
| Started | Sep 24 09:12:38 AM UTC 24 |
| Finished | Sep 24 09:12:41 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3611291136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_rx_full.3611291136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_setup_stage.2598560922 |
| Short name | T1791 |
| Test name | |
| Test status | |
| Simulation time | 207398462 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:12:38 AM UTC 24 |
| Finished | Sep 24 09:12:41 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2598560922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_setup_stage.2598560922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_setup_trans_ignored.1565417729 |
| Short name | T1795 |
| Test name | |
| Test status | |
| Simulation time | 156531362 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 09:12:38 AM UTC 24 |
| Finished | Sep 24 09:12:41 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1565417729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 23.usbdev_setup_trans_ignored.1565417729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_smoke.4244317262 |
| Short name | T1797 |
| Test name | |
| Test status | |
| Simulation time | 229217820 ps |
| CPU time | 1.83 seconds |
| Started | Sep 24 09:12:38 AM UTC 24 |
| Finished | Sep 24 09:12:41 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4244317262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_smoke.4244317262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_spurious_pids_ignored.2075038222 |
| Short name | T1888 |
| Test name | |
| Test status | |
| Simulation time | 2962388898 ps |
| CPU time | 76.27 seconds |
| Started | Sep 24 09:12:38 AM UTC 24 |
| Finished | Sep 24 09:13:57 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2075038222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_spurious_pids_ignored.2075038222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_stall_priority_over_nak.2863930832 |
| Short name | T1796 |
| Test name | |
| Test status | |
| Simulation time | 166881767 ps |
| CPU time | 1.31 seconds |
| Started | Sep 24 09:12:38 AM UTC 24 |
| Finished | Sep 24 09:12:41 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2863930832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stall_priority_over_nak.2863930832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_stall_trans.3439293392 |
| Short name | T1792 |
| Test name | |
| Test status | |
| Simulation time | 193362294 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:12:38 AM UTC 24 |
| Finished | Sep 24 09:12:41 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3439293392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_stall_trans.3439293392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_stream_len_max.2108612739 |
| Short name | T1799 |
| Test name | |
| Test status | |
| Simulation time | 1204521833 ps |
| CPU time | 3.32 seconds |
| Started | Sep 24 09:12:38 AM UTC 24 |
| Finished | Sep 24 09:12:43 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2108612739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stream_len_max.2108612739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_streaming_out.2561955743 |
| Short name | T1890 |
| Test name | |
| Test status | |
| Simulation time | 2873444547 ps |
| CPU time | 76.97 seconds |
| Started | Sep 24 09:12:38 AM UTC 24 |
| Finished | Sep 24 09:13:57 AM UTC 24 |
| Peak memory | 234960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2561955743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_streaming_out.2561955743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_timeout_missing_host_handshake.4048423759 |
| Short name | T1801 |
| Test name | |
| Test status | |
| Simulation time | 3840078091 ps |
| CPU time | 30.37 seconds |
| Started | Sep 24 09:12:15 AM UTC 24 |
| Finished | Sep 24 09:12:46 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4048423759 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_timeout_missing_host_handshake.4048423759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/23.usbdev_tx_rx_disruption.1588245052 |
| Short name | T1798 |
| Test name | |
| Test status | |
| Simulation time | 495313687 ps |
| CPU time | 1.91 seconds |
| Started | Sep 24 09:12:38 AM UTC 24 |
| Finished | Sep 24 09:12:42 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1588245052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_t x_rx_disruption.1588245052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/23.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/230.usbdev_tx_rx_disruption.3795079856 |
| Short name | T3544 |
| Test name | |
| Test status | |
| Simulation time | 603810112 ps |
| CPU time | 2.11 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3795079856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 230.usbdev_ tx_rx_disruption.3795079856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/230.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/231.usbdev_tx_rx_disruption.1242529346 |
| Short name | T3531 |
| Test name | |
| Test status | |
| Simulation time | 539279654 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1242529346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 231.usbdev_ tx_rx_disruption.1242529346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/231.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/232.usbdev_tx_rx_disruption.2532120321 |
| Short name | T3530 |
| Test name | |
| Test status | |
| Simulation time | 591096145 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2532120321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 232.usbdev_ tx_rx_disruption.2532120321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/232.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/233.usbdev_tx_rx_disruption.2434317737 |
| Short name | T3539 |
| Test name | |
| Test status | |
| Simulation time | 592223221 ps |
| CPU time | 1.88 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2434317737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 233.usbdev_ tx_rx_disruption.2434317737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/233.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/234.usbdev_tx_rx_disruption.3344640908 |
| Short name | T3536 |
| Test name | |
| Test status | |
| Simulation time | 585980401 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3344640908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 234.usbdev_ tx_rx_disruption.3344640908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/234.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/235.usbdev_tx_rx_disruption.3527377661 |
| Short name | T3532 |
| Test name | |
| Test status | |
| Simulation time | 519036833 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3527377661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 235.usbdev_ tx_rx_disruption.3527377661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/235.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/236.usbdev_tx_rx_disruption.2490696009 |
| Short name | T3526 |
| Test name | |
| Test status | |
| Simulation time | 467563157 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2490696009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 236.usbdev_ tx_rx_disruption.2490696009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/236.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/237.usbdev_tx_rx_disruption.4171235411 |
| Short name | T3534 |
| Test name | |
| Test status | |
| Simulation time | 462437600 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4171235411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 237.usbdev_ tx_rx_disruption.4171235411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/237.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/238.usbdev_tx_rx_disruption.1127527266 |
| Short name | T3541 |
| Test name | |
| Test status | |
| Simulation time | 624614320 ps |
| CPU time | 1.93 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1127527266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 238.usbdev_ tx_rx_disruption.1127527266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/238.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/239.usbdev_tx_rx_disruption.2891103458 |
| Short name | T3538 |
| Test name | |
| Test status | |
| Simulation time | 477116712 ps |
| CPU time | 1.88 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2891103458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 239.usbdev_ tx_rx_disruption.2891103458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/239.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_alert_test.349272318 |
| Short name | T1816 |
| Test name | |
| Test status | |
| Simulation time | 71581605 ps |
| CPU time | 1.16 seconds |
| Started | Sep 24 09:13:17 AM UTC 24 |
| Finished | Sep 24 09:13:19 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=349272318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_alert_test.349272318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_disconnect.2918907503 |
| Short name | T1827 |
| Test name | |
| Test status | |
| Simulation time | 10896431806 ps |
| CPU time | 16.29 seconds |
| Started | Sep 24 09:12:50 AM UTC 24 |
| Finished | Sep 24 09:13:08 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2918907503 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_disconnect.2918907503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_reset.74054792 |
| Short name | T1767 |
| Test name | |
| Test status | |
| Simulation time | 20019266899 ps |
| CPU time | 29.65 seconds |
| Started | Sep 24 09:12:50 AM UTC 24 |
| Finished | Sep 24 09:13:21 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=74054792 -assert nopostproc +UVM_TESTNAME=usbdev_base_te st +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbd ev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_reset.74054792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_resume.1234828476 |
| Short name | T1862 |
| Test name | |
| Test status | |
| Simulation time | 28900794160 ps |
| CPU time | 41.09 seconds |
| Started | Sep 24 09:12:50 AM UTC 24 |
| Finished | Sep 24 09:13:33 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1234828476 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_resume.1234828476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_av_buffer.4238869019 |
| Short name | T1807 |
| Test name | |
| Test status | |
| Simulation time | 156265360 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:12:50 AM UTC 24 |
| Finished | Sep 24 09:12:53 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4238869019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_av_buffer.4238869019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_bitstuff_err.1690985036 |
| Short name | T1804 |
| Test name | |
| Test status | |
| Simulation time | 136545715 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:12:50 AM UTC 24 |
| Finished | Sep 24 09:12:52 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1690985036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_bitstuff_err.1690985036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_clear.983414161 |
| Short name | T1810 |
| Test name | |
| Test status | |
| Simulation time | 371129925 ps |
| CPU time | 2.24 seconds |
| Started | Sep 24 09:12:50 AM UTC 24 |
| Finished | Sep 24 09:12:54 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=983414161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_data_toggle_clear.983414161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_restore.2659850459 |
| Short name | T1815 |
| Test name | |
| Test status | |
| Simulation time | 1037569998 ps |
| CPU time | 4.92 seconds |
| Started | Sep 24 09:12:50 AM UTC 24 |
| Finished | Sep 24 09:12:56 AM UTC 24 |
| Peak memory | 217908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2659850459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_restore.2659850459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_device_address.2331591789 |
| Short name | T1887 |
| Test name | |
| Test status | |
| Simulation time | 35992022941 ps |
| CPU time | 61.92 seconds |
| Started | Sep 24 09:12:50 AM UTC 24 |
| Finished | Sep 24 09:13:54 AM UTC 24 |
| Peak memory | 218416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2331591789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_address.2331591789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_device_timeout.984058160 |
| Short name | T1735 |
| Test name | |
| Test status | |
| Simulation time | 3520812867 ps |
| CPU time | 29.36 seconds |
| Started | Sep 24 09:12:50 AM UTC 24 |
| Finished | Sep 24 09:13:21 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=984058160 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_timeout.984058160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_disable_endpoint.3129099092 |
| Short name | T1811 |
| Test name | |
| Test status | |
| Simulation time | 760355546 ps |
| CPU time | 2.01 seconds |
| Started | Sep 24 09:12:50 AM UTC 24 |
| Finished | Sep 24 09:12:54 AM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3129099092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_disable_endpoint.3129099092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_disconnected.1075518958 |
| Short name | T1805 |
| Test name | |
| Test status | |
| Simulation time | 156635238 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:12:50 AM UTC 24 |
| Finished | Sep 24 09:12:52 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1075518958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_disconnected.1075518958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_enable.2506754440 |
| Short name | T1806 |
| Test name | |
| Test status | |
| Simulation time | 47399952 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:12:50 AM UTC 24 |
| Finished | Sep 24 09:12:53 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2506754440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_enable.2506754440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_access.286421500 |
| Short name | T1813 |
| Test name | |
| Test status | |
| Simulation time | 970355452 ps |
| CPU time | 3.03 seconds |
| Started | Sep 24 09:12:50 AM UTC 24 |
| Finished | Sep 24 09:12:55 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=286421500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_access.286421500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_types.3259722553 |
| Short name | T586 |
| Test name | |
| Test status | |
| Simulation time | 221707864 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:12:50 AM UTC 24 |
| Finished | Sep 24 09:12:53 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259722553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_types.3259722553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_levels.809298608 |
| Short name | T1808 |
| Test name | |
| Test status | |
| Simulation time | 149551999 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:12:50 AM UTC 24 |
| Finished | Sep 24 09:12:53 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=809298608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_fifo_levels.809298608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_rst.2461938889 |
| Short name | T1814 |
| Test name | |
| Test status | |
| Simulation time | 387109124 ps |
| CPU time | 3.38 seconds |
| Started | Sep 24 09:12:50 AM UTC 24 |
| Finished | Sep 24 09:12:55 AM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2461938889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_fifo_rst.2461938889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_in_iso.3739680348 |
| Short name | T1809 |
| Test name | |
| Test status | |
| Simulation time | 226328200 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 09:12:51 AM UTC 24 |
| Finished | Sep 24 09:12:54 AM UTC 24 |
| Peak memory | 225908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3739680348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_in_iso.3739680348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_in_stall.2913767356 |
| Short name | T1821 |
| Test name | |
| Test status | |
| Simulation time | 158006032 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:12:59 AM UTC 24 |
| Finished | Sep 24 09:13:02 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2913767356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_in_stall.2913767356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_in_trans.2407620207 |
| Short name | T1823 |
| Test name | |
| Test status | |
| Simulation time | 230019887 ps |
| CPU time | 1.75 seconds |
| Started | Sep 24 09:12:59 AM UTC 24 |
| Finished | Sep 24 09:13:02 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2407620207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_in_trans.2407620207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_invalid_sync.348846969 |
| Short name | T1924 |
| Test name | |
| Test status | |
| Simulation time | 3470292549 ps |
| CPU time | 86.36 seconds |
| Started | Sep 24 09:12:51 AM UTC 24 |
| Finished | Sep 24 09:14:19 AM UTC 24 |
| Peak memory | 234852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=348846969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_invalid_sync.348846969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_iso_retraction.3831355140 |
| Short name | T1892 |
| Test name | |
| Test status | |
| Simulation time | 9211501586 ps |
| CPU time | 57.85 seconds |
| Started | Sep 24 09:12:59 AM UTC 24 |
| Finished | Sep 24 09:13:59 AM UTC 24 |
| Peak memory | 218316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3831355140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_iso_retraction.3831355140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_link_in_err.3673824690 |
| Short name | T1820 |
| Test name | |
| Test status | |
| Simulation time | 216679760 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:13:00 AM UTC 24 |
| Finished | Sep 24 09:13:02 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3673824690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_link_in_err.3673824690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_link_resume.4166625544 |
| Short name | T1840 |
| Test name | |
| Test status | |
| Simulation time | 6045337531 ps |
| CPU time | 13.7 seconds |
| Started | Sep 24 09:13:00 AM UTC 24 |
| Finished | Sep 24 09:13:14 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4166625544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_link_resume.4166625544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_link_suspend.425048274 |
| Short name | T1787 |
| Test name | |
| Test status | |
| Simulation time | 10937321263 ps |
| CPU time | 18.76 seconds |
| Started | Sep 24 09:13:00 AM UTC 24 |
| Finished | Sep 24 09:13:20 AM UTC 24 |
| Peak memory | 218316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=425048274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_link_suspend.425048274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_low_speed_traffic.1155011357 |
| Short name | T433 |
| Test name | |
| Test status | |
| Simulation time | 5077508069 ps |
| CPU time | 49.4 seconds |
| Started | Sep 24 09:13:00 AM UTC 24 |
| Finished | Sep 24 09:13:50 AM UTC 24 |
| Peak memory | 230660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1155011357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_low_speed_traffic.1155011357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_max_inter_pkt_delay.2710493367 |
| Short name | T1851 |
| Test name | |
| Test status | |
| Simulation time | 2866452383 ps |
| CPU time | 22.51 seconds |
| Started | Sep 24 09:13:00 AM UTC 24 |
| Finished | Sep 24 09:13:23 AM UTC 24 |
| Peak memory | 234820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2710493367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_inter_pkt_delay.2710493367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_in_transaction.1935967429 |
| Short name | T1819 |
| Test name | |
| Test status | |
| Simulation time | 236964220 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:13:00 AM UTC 24 |
| Finished | Sep 24 09:13:02 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1935967429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_in_transaction.1935967429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_out_transaction.2379225672 |
| Short name | T1824 |
| Test name | |
| Test status | |
| Simulation time | 246735404 ps |
| CPU time | 1.47 seconds |
| Started | Sep 24 09:13:00 AM UTC 24 |
| Finished | Sep 24 09:13:02 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2379225672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_out_transaction.2379225672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_max_non_iso_usb_traffic.2569696469 |
| Short name | T1849 |
| Test name | |
| Test status | |
| Simulation time | 1834503264 ps |
| CPU time | 20.33 seconds |
| Started | Sep 24 09:13:00 AM UTC 24 |
| Finished | Sep 24 09:13:21 AM UTC 24 |
| Peak memory | 230336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2569696469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_non_iso_usb_traffic.2569696469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_min_inter_pkt_delay.2743454537 |
| Short name | T1850 |
| Test name | |
| Test status | |
| Simulation time | 1976648294 ps |
| CPU time | 21.57 seconds |
| Started | Sep 24 09:13:00 AM UTC 24 |
| Finished | Sep 24 09:13:23 AM UTC 24 |
| Peak memory | 234760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2743454537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_inter_pkt_delay.2743454537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_in_transaction.3518880806 |
| Short name | T1822 |
| Test name | |
| Test status | |
| Simulation time | 156868625 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:13:00 AM UTC 24 |
| Finished | Sep 24 09:13:02 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3518880806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_in_transaction.3518880806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_out_transaction.2725306931 |
| Short name | T1825 |
| Test name | |
| Test status | |
| Simulation time | 143883597 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:13:00 AM UTC 24 |
| Finished | Sep 24 09:13:03 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2725306931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_out_transaction.2725306931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_nak_trans.2223508336 |
| Short name | T134 |
| Test name | |
| Test status | |
| Simulation time | 247820379 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:13:00 AM UTC 24 |
| Finished | Sep 24 09:13:03 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2223508336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_nak_trans.2223508336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_out_iso.3791284818 |
| Short name | T1831 |
| Test name | |
| Test status | |
| Simulation time | 193384462 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:13:07 AM UTC 24 |
| Finished | Sep 24 09:13:10 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3791284818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_out_iso.3791284818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_out_stall.4119290478 |
| Short name | T1829 |
| Test name | |
| Test status | |
| Simulation time | 145062288 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:13:07 AM UTC 24 |
| Finished | Sep 24 09:13:09 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4119290478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_out_stall.4119290478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_out_trans_nak.595869284 |
| Short name | T1833 |
| Test name | |
| Test status | |
| Simulation time | 200829917 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:13:07 AM UTC 24 |
| Finished | Sep 24 09:13:10 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=595869284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_out_trans_nak.595869284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_pending_in_trans.2077241380 |
| Short name | T1830 |
| Test name | |
| Test status | |
| Simulation time | 148166724 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 09:13:07 AM UTC 24 |
| Finished | Sep 24 09:13:10 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2077241380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_pending_in_trans.2077241380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_pinflip.948052369 |
| Short name | T1836 |
| Test name | |
| Test status | |
| Simulation time | 237427435 ps |
| CPU time | 1.92 seconds |
| Started | Sep 24 09:13:07 AM UTC 24 |
| Finished | Sep 24 09:13:10 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=948052369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_pinflip.948052369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_usb_ref_disable.629848825 |
| Short name | T1828 |
| Test name | |
| Test status | |
| Simulation time | 167073037 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:13:07 AM UTC 24 |
| Finished | Sep 24 09:13:09 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=629848825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 24.usbdev_phy_config_usb_ref_disable.629848825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_phy_pins_sense.3892072059 |
| Short name | T1832 |
| Test name | |
| Test status | |
| Simulation time | 88727780 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:13:07 AM UTC 24 |
| Finished | Sep 24 09:13:10 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3892072059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_pins_sense.3892072059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_buffer.1069683927 |
| Short name | T1875 |
| Test name | |
| Test status | |
| Simulation time | 15523735921 ps |
| CPU time | 38.9 seconds |
| Started | Sep 24 09:13:07 AM UTC 24 |
| Finished | Sep 24 09:13:48 AM UTC 24 |
| Peak memory | 228452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1069683927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_pkt_buffer.1069683927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_received.282769831 |
| Short name | T1837 |
| Test name | |
| Test status | |
| Simulation time | 191558486 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 09:13:07 AM UTC 24 |
| Finished | Sep 24 09:13:10 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=282769831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_pkt_received.282769831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_sent.1267521740 |
| Short name | T1834 |
| Test name | |
| Test status | |
| Simulation time | 217145519 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:13:07 AM UTC 24 |
| Finished | Sep 24 09:13:10 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1267521740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_pkt_sent.1267521740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_in_transaction.2981441758 |
| Short name | T1835 |
| Test name | |
| Test status | |
| Simulation time | 258898649 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 09:13:08 AM UTC 24 |
| Finished | Sep 24 09:13:10 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2981441758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_random_length_in_transaction.2981441758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_out_transaction.763654836 |
| Short name | T1843 |
| Test name | |
| Test status | |
| Simulation time | 182746777 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:13:16 AM UTC 24 |
| Finished | Sep 24 09:13:19 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=763654836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 24.usbdev_random_length_out_transaction.763654836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_rx_crc_err.2148575955 |
| Short name | T1842 |
| Test name | |
| Test status | |
| Simulation time | 176898211 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:13:16 AM UTC 24 |
| Finished | Sep 24 09:13:19 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2148575955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_rx_crc_err.2148575955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_rx_full.1008593442 |
| Short name | T1845 |
| Test name | |
| Test status | |
| Simulation time | 389862749 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:13:16 AM UTC 24 |
| Finished | Sep 24 09:13:19 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1008593442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_rx_full.1008593442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_setup_stage.983181480 |
| Short name | T1846 |
| Test name | |
| Test status | |
| Simulation time | 157224982 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:13:16 AM UTC 24 |
| Finished | Sep 24 09:13:19 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=983181480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_setup_stage.983181480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_setup_trans_ignored.1642994138 |
| Short name | T1844 |
| Test name | |
| Test status | |
| Simulation time | 165057920 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:13:17 AM UTC 24 |
| Finished | Sep 24 09:13:19 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1642994138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 24.usbdev_setup_trans_ignored.1642994138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_smoke.1344351624 |
| Short name | T1817 |
| Test name | |
| Test status | |
| Simulation time | 210259191 ps |
| CPU time | 1.75 seconds |
| Started | Sep 24 09:13:17 AM UTC 24 |
| Finished | Sep 24 09:13:19 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1344351624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_smoke.1344351624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_spurious_pids_ignored.1979373210 |
| Short name | T1956 |
| Test name | |
| Test status | |
| Simulation time | 3035128648 ps |
| CPU time | 80.55 seconds |
| Started | Sep 24 09:13:17 AM UTC 24 |
| Finished | Sep 24 09:14:39 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1979373210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_spurious_pids_ignored.1979373210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_stall_priority_over_nak.701809882 |
| Short name | T1848 |
| Test name | |
| Test status | |
| Simulation time | 241069423 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 09:13:17 AM UTC 24 |
| Finished | Sep 24 09:13:19 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=701809882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stall_priority_over_nak.701809882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_stall_trans.757921009 |
| Short name | T1847 |
| Test name | |
| Test status | |
| Simulation time | 191534408 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:13:17 AM UTC 24 |
| Finished | Sep 24 09:13:19 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=757921009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_stall_trans.757921009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_stream_len_max.189437680 |
| Short name | T1790 |
| Test name | |
| Test status | |
| Simulation time | 715404926 ps |
| CPU time | 2.45 seconds |
| Started | Sep 24 09:13:17 AM UTC 24 |
| Finished | Sep 24 09:13:20 AM UTC 24 |
| Peak memory | 217784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=189437680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_stream_len_max.189437680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_streaming_out.1977311624 |
| Short name | T1941 |
| Test name | |
| Test status | |
| Simulation time | 2869903712 ps |
| CPU time | 76.12 seconds |
| Started | Sep 24 09:13:17 AM UTC 24 |
| Finished | Sep 24 09:14:35 AM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1977311624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_streaming_out.1977311624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_timeout_missing_host_handshake.3068388819 |
| Short name | T1818 |
| Test name | |
| Test status | |
| Simulation time | 1593008218 ps |
| CPU time | 10.05 seconds |
| Started | Sep 24 09:12:50 AM UTC 24 |
| Finished | Sep 24 09:13:02 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3068388819 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_timeout_missing_host_handshake.3068388819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/24.usbdev_tx_rx_disruption.1629371368 |
| Short name | T1732 |
| Test name | |
| Test status | |
| Simulation time | 505217456 ps |
| CPU time | 2.96 seconds |
| Started | Sep 24 09:13:17 AM UTC 24 |
| Finished | Sep 24 09:13:21 AM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1629371368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_t x_rx_disruption.1629371368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/24.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/240.usbdev_tx_rx_disruption.3048937103 |
| Short name | T3543 |
| Test name | |
| Test status | |
| Simulation time | 666870620 ps |
| CPU time | 1.92 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3048937103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 240.usbdev_ tx_rx_disruption.3048937103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/240.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/241.usbdev_tx_rx_disruption.171966299 |
| Short name | T3550 |
| Test name | |
| Test status | |
| Simulation time | 640498769 ps |
| CPU time | 2.14 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:32 AM UTC 24 |
| Peak memory | 217712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=171966299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 241.usbdev_t x_rx_disruption.171966299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/241.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/242.usbdev_tx_rx_disruption.3308505963 |
| Short name | T3533 |
| Test name | |
| Test status | |
| Simulation time | 480500492 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3308505963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 242.usbdev_ tx_rx_disruption.3308505963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/242.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/243.usbdev_tx_rx_disruption.1515285031 |
| Short name | T3537 |
| Test name | |
| Test status | |
| Simulation time | 600502941 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1515285031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 243.usbdev_ tx_rx_disruption.1515285031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/243.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/244.usbdev_tx_rx_disruption.1111896174 |
| Short name | T3542 |
| Test name | |
| Test status | |
| Simulation time | 517573019 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1111896174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 244.usbdev_ tx_rx_disruption.1111896174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/244.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/245.usbdev_tx_rx_disruption.2200479649 |
| Short name | T3535 |
| Test name | |
| Test status | |
| Simulation time | 479740427 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2200479649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 245.usbdev_ tx_rx_disruption.2200479649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/245.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/246.usbdev_tx_rx_disruption.3011618251 |
| Short name | T3546 |
| Test name | |
| Test status | |
| Simulation time | 506956411 ps |
| CPU time | 1.78 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3011618251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 246.usbdev_ tx_rx_disruption.3011618251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/246.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/247.usbdev_tx_rx_disruption.1317265630 |
| Short name | T3554 |
| Test name | |
| Test status | |
| Simulation time | 516396648 ps |
| CPU time | 2.05 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:32 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1317265630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 247.usbdev_ tx_rx_disruption.1317265630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/247.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/248.usbdev_tx_rx_disruption.1730916322 |
| Short name | T3548 |
| Test name | |
| Test status | |
| Simulation time | 497850354 ps |
| CPU time | 1.88 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 215524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1730916322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 248.usbdev_ tx_rx_disruption.1730916322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/248.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/249.usbdev_tx_rx_disruption.1420155263 |
| Short name | T3551 |
| Test name | |
| Test status | |
| Simulation time | 522677327 ps |
| CPU time | 1.99 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:32 AM UTC 24 |
| Peak memory | 215604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1420155263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 249.usbdev_ tx_rx_disruption.1420155263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/249.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_alert_test.3701540705 |
| Short name | T1904 |
| Test name | |
| Test status | |
| Simulation time | 34588446 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:14:00 AM UTC 24 |
| Finished | Sep 24 09:14:02 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3701540705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 25.usbdev_alert_test.3701540705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_disconnect.3985404463 |
| Short name | T1863 |
| Test name | |
| Test status | |
| Simulation time | 4877245523 ps |
| CPU time | 7.14 seconds |
| Started | Sep 24 09:13:27 AM UTC 24 |
| Finished | Sep 24 09:13:35 AM UTC 24 |
| Peak memory | 227708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3985404463 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_disconnect.3985404463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_reset.986156220 |
| Short name | T1876 |
| Test name | |
| Test status | |
| Simulation time | 14729865258 ps |
| CPU time | 20.15 seconds |
| Started | Sep 24 09:13:27 AM UTC 24 |
| Finished | Sep 24 09:13:49 AM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=986156220 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_reset.986156220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_resume.3230947542 |
| Short name | T1908 |
| Test name | |
| Test status | |
| Simulation time | 31180957678 ps |
| CPU time | 39.62 seconds |
| Started | Sep 24 09:13:27 AM UTC 24 |
| Finished | Sep 24 09:14:08 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3230947542 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_resume.3230947542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_av_buffer.26703088 |
| Short name | T1854 |
| Test name | |
| Test status | |
| Simulation time | 159128431 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:13:27 AM UTC 24 |
| Finished | Sep 24 09:13:30 AM UTC 24 |
| Peak memory | 215120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=26703088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_av_buffer.26703088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_bitstuff_err.1986920861 |
| Short name | T1855 |
| Test name | |
| Test status | |
| Simulation time | 170046756 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:13:27 AM UTC 24 |
| Finished | Sep 24 09:13:30 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1986920861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_bitstuff_err.1986920861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_clear.1903982959 |
| Short name | T1858 |
| Test name | |
| Test status | |
| Simulation time | 226051117 ps |
| CPU time | 1.82 seconds |
| Started | Sep 24 09:13:27 AM UTC 24 |
| Finished | Sep 24 09:13:30 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1903982959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 25.usbdev_data_toggle_clear.1903982959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_restore.894833621 |
| Short name | T1857 |
| Test name | |
| Test status | |
| Simulation time | 340008070 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 09:13:27 AM UTC 24 |
| Finished | Sep 24 09:13:30 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=894833621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_data_toggle_restore.894833621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_device_address.3441517354 |
| Short name | T1891 |
| Test name | |
| Test status | |
| Simulation time | 14315567425 ps |
| CPU time | 28.71 seconds |
| Started | Sep 24 09:13:27 AM UTC 24 |
| Finished | Sep 24 09:13:58 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3441517354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_address.3441517354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_device_timeout.798461579 |
| Short name | T1910 |
| Test name | |
| Test status | |
| Simulation time | 1959568271 ps |
| CPU time | 42.98 seconds |
| Started | Sep 24 09:13:28 AM UTC 24 |
| Finished | Sep 24 09:14:12 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=798461579 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_timeout.798461579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_disable_endpoint.1996287963 |
| Short name | T1859 |
| Test name | |
| Test status | |
| Simulation time | 1098439270 ps |
| CPU time | 2.88 seconds |
| Started | Sep 24 09:13:28 AM UTC 24 |
| Finished | Sep 24 09:13:32 AM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1996287963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_disable_endpoint.1996287963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_disconnected.3553334047 |
| Short name | T1856 |
| Test name | |
| Test status | |
| Simulation time | 141817275 ps |
| CPU time | 1.16 seconds |
| Started | Sep 24 09:13:28 AM UTC 24 |
| Finished | Sep 24 09:13:30 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3553334047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_disconnected.3553334047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_enable.804361822 |
| Short name | T1852 |
| Test name | |
| Test status | |
| Simulation time | 34248748 ps |
| CPU time | 0.76 seconds |
| Started | Sep 24 09:13:28 AM UTC 24 |
| Finished | Sep 24 09:13:30 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=804361822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_enable.804361822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_access.1047920424 |
| Short name | T1861 |
| Test name | |
| Test status | |
| Simulation time | 1003248582 ps |
| CPU time | 3.46 seconds |
| Started | Sep 24 09:13:28 AM UTC 24 |
| Finished | Sep 24 09:13:33 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1047920424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_access.1047920424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_types.4034321104 |
| Short name | T590 |
| Test name | |
| Test status | |
| Simulation time | 326034825 ps |
| CPU time | 1.99 seconds |
| Started | Sep 24 09:13:28 AM UTC 24 |
| Finished | Sep 24 09:13:31 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4034321104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_types.4034321104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_levels.2851699332 |
| Short name | T365 |
| Test name | |
| Test status | |
| Simulation time | 271092146 ps |
| CPU time | 1.47 seconds |
| Started | Sep 24 09:13:28 AM UTC 24 |
| Finished | Sep 24 09:13:31 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2851699332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_fifo_levels.2851699332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_rst.743465006 |
| Short name | T1860 |
| Test name | |
| Test status | |
| Simulation time | 265779163 ps |
| CPU time | 2.76 seconds |
| Started | Sep 24 09:13:28 AM UTC 24 |
| Finished | Sep 24 09:13:32 AM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=743465006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_fifo_rst.743465006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_in_iso.1807207955 |
| Short name | T1868 |
| Test name | |
| Test status | |
| Simulation time | 206509663 ps |
| CPU time | 1.78 seconds |
| Started | Sep 24 09:13:38 AM UTC 24 |
| Finished | Sep 24 09:13:40 AM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1807207955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 25.usbdev_in_iso.1807207955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_in_stall.1521724847 |
| Short name | T1866 |
| Test name | |
| Test status | |
| Simulation time | 168961881 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:13:38 AM UTC 24 |
| Finished | Sep 24 09:13:40 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1521724847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_stall.1521724847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_in_trans.4023077483 |
| Short name | T1870 |
| Test name | |
| Test status | |
| Simulation time | 282922222 ps |
| CPU time | 2.04 seconds |
| Started | Sep 24 09:13:38 AM UTC 24 |
| Finished | Sep 24 09:13:41 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4023077483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_trans.4023077483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_invalid_sync.4186363423 |
| Short name | T1963 |
| Test name | |
| Test status | |
| Simulation time | 2447162189 ps |
| CPU time | 65.19 seconds |
| Started | Sep 24 09:13:38 AM UTC 24 |
| Finished | Sep 24 09:14:44 AM UTC 24 |
| Peak memory | 230516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4186363423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 25.usbdev_invalid_sync.4186363423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_iso_retraction.1351391803 |
| Short name | T1940 |
| Test name | |
| Test status | |
| Simulation time | 7741291430 ps |
| CPU time | 50.92 seconds |
| Started | Sep 24 09:13:38 AM UTC 24 |
| Finished | Sep 24 09:14:30 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1351391803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_iso_retraction.1351391803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_link_in_err.4040523535 |
| Short name | T1865 |
| Test name | |
| Test status | |
| Simulation time | 250285406 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:13:38 AM UTC 24 |
| Finished | Sep 24 09:13:40 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4040523535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_in_err.4040523535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_link_resume.3380306786 |
| Short name | T1929 |
| Test name | |
| Test status | |
| Simulation time | 30224104698 ps |
| CPU time | 46.37 seconds |
| Started | Sep 24 09:13:38 AM UTC 24 |
| Finished | Sep 24 09:14:25 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3380306786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_resume.3380306786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_link_suspend.4033128090 |
| Short name | T1889 |
| Test name | |
| Test status | |
| Simulation time | 9775932353 ps |
| CPU time | 17.58 seconds |
| Started | Sep 24 09:13:38 AM UTC 24 |
| Finished | Sep 24 09:13:57 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4033128090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_link_suspend.4033128090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_low_speed_traffic.1420126767 |
| Short name | T1913 |
| Test name | |
| Test status | |
| Simulation time | 4716452359 ps |
| CPU time | 36.03 seconds |
| Started | Sep 24 09:13:38 AM UTC 24 |
| Finished | Sep 24 09:14:15 AM UTC 24 |
| Peak memory | 234988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1420126767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_low_speed_traffic.1420126767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_max_inter_pkt_delay.1715619910 |
| Short name | T1962 |
| Test name | |
| Test status | |
| Simulation time | 2415595927 ps |
| CPU time | 64.27 seconds |
| Started | Sep 24 09:13:38 AM UTC 24 |
| Finished | Sep 24 09:14:44 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1715619910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_inter_pkt_delay.1715619910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_in_transaction.2799656282 |
| Short name | T1872 |
| Test name | |
| Test status | |
| Simulation time | 281353599 ps |
| CPU time | 2.11 seconds |
| Started | Sep 24 09:13:38 AM UTC 24 |
| Finished | Sep 24 09:13:41 AM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2799656282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_in_transaction.2799656282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_out_transaction.3551873031 |
| Short name | T1867 |
| Test name | |
| Test status | |
| Simulation time | 234534376 ps |
| CPU time | 1.25 seconds |
| Started | Sep 24 09:13:38 AM UTC 24 |
| Finished | Sep 24 09:13:40 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3551873031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_out_transaction.3551873031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_min_inter_pkt_delay.1088496133 |
| Short name | T1957 |
| Test name | |
| Test status | |
| Simulation time | 2325888501 ps |
| CPU time | 59.3 seconds |
| Started | Sep 24 09:13:38 AM UTC 24 |
| Finished | Sep 24 09:14:39 AM UTC 24 |
| Peak memory | 234924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1088496133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_inter_pkt_delay.1088496133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_in_transaction.1450753888 |
| Short name | T1869 |
| Test name | |
| Test status | |
| Simulation time | 161557625 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 09:13:38 AM UTC 24 |
| Finished | Sep 24 09:13:41 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1450753888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_in_transaction.1450753888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_out_transaction.2470481435 |
| Short name | T1871 |
| Test name | |
| Test status | |
| Simulation time | 199072559 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 09:13:38 AM UTC 24 |
| Finished | Sep 24 09:13:41 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2470481435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_out_transaction.2470481435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_out_iso.713129907 |
| Short name | T1877 |
| Test name | |
| Test status | |
| Simulation time | 209950238 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 09:13:49 AM UTC 24 |
| Finished | Sep 24 09:13:51 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=713129907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 25.usbdev_out_iso.713129907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_out_stall.1410874049 |
| Short name | T1880 |
| Test name | |
| Test status | |
| Simulation time | 147282279 ps |
| CPU time | 1.35 seconds |
| Started | Sep 24 09:13:49 AM UTC 24 |
| Finished | Sep 24 09:13:51 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1410874049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_out_stall.1410874049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_out_trans_nak.1382406771 |
| Short name | T1879 |
| Test name | |
| Test status | |
| Simulation time | 146819036 ps |
| CPU time | 1.29 seconds |
| Started | Sep 24 09:13:49 AM UTC 24 |
| Finished | Sep 24 09:13:51 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1382406771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_out_trans_nak.1382406771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_pending_in_trans.2121594335 |
| Short name | T1883 |
| Test name | |
| Test status | |
| Simulation time | 240705273 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:13:49 AM UTC 24 |
| Finished | Sep 24 09:13:52 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2121594335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_pending_in_trans.2121594335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_pinflip.878082088 |
| Short name | T1884 |
| Test name | |
| Test status | |
| Simulation time | 225794348 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:13:49 AM UTC 24 |
| Finished | Sep 24 09:13:52 AM UTC 24 |
| Peak memory | 215984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=878082088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_pinflip.878082088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_usb_ref_disable.3496003965 |
| Short name | T1885 |
| Test name | |
| Test status | |
| Simulation time | 216566749 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 09:13:49 AM UTC 24 |
| Finished | Sep 24 09:13:52 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3496003965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_usb_ref_disable.3496003965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_phy_pins_sense.1615413968 |
| Short name | T1878 |
| Test name | |
| Test status | |
| Simulation time | 49080530 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:13:49 AM UTC 24 |
| Finished | Sep 24 09:13:51 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1615413968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_pins_sense.1615413968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_buffer.232422022 |
| Short name | T1909 |
| Test name | |
| Test status | |
| Simulation time | 6849268487 ps |
| CPU time | 19.55 seconds |
| Started | Sep 24 09:13:49 AM UTC 24 |
| Finished | Sep 24 09:14:10 AM UTC 24 |
| Peak memory | 228388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=232422022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_pkt_buffer.232422022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_received.2292293544 |
| Short name | T1882 |
| Test name | |
| Test status | |
| Simulation time | 178919341 ps |
| CPU time | 1.28 seconds |
| Started | Sep 24 09:13:49 AM UTC 24 |
| Finished | Sep 24 09:13:51 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2292293544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_pkt_received.2292293544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_sent.3512182038 |
| Short name | T1886 |
| Test name | |
| Test status | |
| Simulation time | 216079725 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 09:13:49 AM UTC 24 |
| Finished | Sep 24 09:13:52 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3512182038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_pkt_sent.3512182038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_in_transaction.4014127335 |
| Short name | T1881 |
| Test name | |
| Test status | |
| Simulation time | 191840471 ps |
| CPU time | 1.14 seconds |
| Started | Sep 24 09:13:49 AM UTC 24 |
| Finished | Sep 24 09:13:51 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4014127335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_random_length_in_transaction.4014127335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_out_transaction.1323149078 |
| Short name | T1899 |
| Test name | |
| Test status | |
| Simulation time | 208046542 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:14:00 AM UTC 24 |
| Finished | Sep 24 09:14:02 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1323149078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_random_length_out_transaction.1323149078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_rx_crc_err.297131249 |
| Short name | T1901 |
| Test name | |
| Test status | |
| Simulation time | 139009549 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:14:00 AM UTC 24 |
| Finished | Sep 24 09:14:02 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=297131249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_rx_crc_err.297131249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_rx_full.2773808858 |
| Short name | T1900 |
| Test name | |
| Test status | |
| Simulation time | 255900454 ps |
| CPU time | 1.34 seconds |
| Started | Sep 24 09:14:00 AM UTC 24 |
| Finished | Sep 24 09:14:02 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2773808858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_rx_full.2773808858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_setup_stage.4112956688 |
| Short name | T1898 |
| Test name | |
| Test status | |
| Simulation time | 149349590 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:14:00 AM UTC 24 |
| Finished | Sep 24 09:14:02 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4112956688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_setup_stage.4112956688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_setup_trans_ignored.515878889 |
| Short name | T1902 |
| Test name | |
| Test status | |
| Simulation time | 153056405 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 09:14:00 AM UTC 24 |
| Finished | Sep 24 09:14:02 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=515878889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 25.usbdev_setup_trans_ignored.515878889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_smoke.2911286889 |
| Short name | T1895 |
| Test name | |
| Test status | |
| Simulation time | 198675996 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:14:00 AM UTC 24 |
| Finished | Sep 24 09:14:02 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2911286889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_smoke.2911286889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_spurious_pids_ignored.1191807779 |
| Short name | T1925 |
| Test name | |
| Test status | |
| Simulation time | 2822971149 ps |
| CPU time | 19.56 seconds |
| Started | Sep 24 09:14:00 AM UTC 24 |
| Finished | Sep 24 09:14:20 AM UTC 24 |
| Peak memory | 234972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1191807779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 25.usbdev_spurious_pids_ignored.1191807779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_stall_priority_over_nak.4274059591 |
| Short name | T1903 |
| Test name | |
| Test status | |
| Simulation time | 192456558 ps |
| CPU time | 1.35 seconds |
| Started | Sep 24 09:14:00 AM UTC 24 |
| Finished | Sep 24 09:14:02 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4274059591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stall_priority_over_nak.4274059591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_stall_trans.2573148830 |
| Short name | T1896 |
| Test name | |
| Test status | |
| Simulation time | 168345458 ps |
| CPU time | 0.96 seconds |
| Started | Sep 24 09:14:00 AM UTC 24 |
| Finished | Sep 24 09:14:02 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2573148830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_stall_trans.2573148830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_stream_len_max.977203014 |
| Short name | T1906 |
| Test name | |
| Test status | |
| Simulation time | 1019797712 ps |
| CPU time | 3.01 seconds |
| Started | Sep 24 09:14:00 AM UTC 24 |
| Finished | Sep 24 09:14:04 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=977203014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_stream_len_max.977203014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_streaming_out.307034047 |
| Short name | T1920 |
| Test name | |
| Test status | |
| Simulation time | 2106388760 ps |
| CPU time | 15.23 seconds |
| Started | Sep 24 09:14:00 AM UTC 24 |
| Finished | Sep 24 09:14:16 AM UTC 24 |
| Peak memory | 234872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=307034047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_streaming_out.307034047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_timeout_missing_host_handshake.3204695467 |
| Short name | T1907 |
| Test name | |
| Test status | |
| Simulation time | 5506293391 ps |
| CPU time | 38.09 seconds |
| Started | Sep 24 09:13:28 AM UTC 24 |
| Finished | Sep 24 09:14:07 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3204695467 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_timeout_missing_host_handshake.3204695467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/25.usbdev_tx_rx_disruption.3119664330 |
| Short name | T1905 |
| Test name | |
| Test status | |
| Simulation time | 514067357 ps |
| CPU time | 1.99 seconds |
| Started | Sep 24 09:14:00 AM UTC 24 |
| Finished | Sep 24 09:14:03 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3119664330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_t x_rx_disruption.3119664330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/25.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/250.usbdev_tx_rx_disruption.144494143 |
| Short name | T3545 |
| Test name | |
| Test status | |
| Simulation time | 521215879 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=144494143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 250.usbdev_t x_rx_disruption.144494143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/250.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/251.usbdev_tx_rx_disruption.715026180 |
| Short name | T3547 |
| Test name | |
| Test status | |
| Simulation time | 496924599 ps |
| CPU time | 1.75 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:31 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=715026180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 251.usbdev_t x_rx_disruption.715026180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/251.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/252.usbdev_tx_rx_disruption.351445517 |
| Short name | T3556 |
| Test name | |
| Test status | |
| Simulation time | 543980484 ps |
| CPU time | 1.93 seconds |
| Started | Sep 24 09:43:28 AM UTC 24 |
| Finished | Sep 24 09:43:32 AM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=351445517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 252.usbdev_t x_rx_disruption.351445517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/252.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/253.usbdev_tx_rx_disruption.1121320597 |
| Short name | T3557 |
| Test name | |
| Test status | |
| Simulation time | 470484833 ps |
| CPU time | 2.01 seconds |
| Started | Sep 24 09:43:29 AM UTC 24 |
| Finished | Sep 24 09:43:32 AM UTC 24 |
| Peak memory | 215692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1121320597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 253.usbdev_ tx_rx_disruption.1121320597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/253.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/254.usbdev_tx_rx_disruption.2223694559 |
| Short name | T3549 |
| Test name | |
| Test status | |
| Simulation time | 500027420 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:43:29 AM UTC 24 |
| Finished | Sep 24 09:43:32 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2223694559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 254.usbdev_ tx_rx_disruption.2223694559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/254.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/255.usbdev_tx_rx_disruption.3154052441 |
| Short name | T3562 |
| Test name | |
| Test status | |
| Simulation time | 643280663 ps |
| CPU time | 2.34 seconds |
| Started | Sep 24 09:43:29 AM UTC 24 |
| Finished | Sep 24 09:43:32 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3154052441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 255.usbdev_ tx_rx_disruption.3154052441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/255.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/256.usbdev_tx_rx_disruption.2963577245 |
| Short name | T3558 |
| Test name | |
| Test status | |
| Simulation time | 457715750 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 09:43:29 AM UTC 24 |
| Finished | Sep 24 09:43:32 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2963577245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 256.usbdev_ tx_rx_disruption.2963577245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/256.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/257.usbdev_tx_rx_disruption.647058960 |
| Short name | T3553 |
| Test name | |
| Test status | |
| Simulation time | 446566735 ps |
| CPU time | 1.85 seconds |
| Started | Sep 24 09:43:29 AM UTC 24 |
| Finished | Sep 24 09:43:32 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=647058960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 257.usbdev_t x_rx_disruption.647058960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/257.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/258.usbdev_tx_rx_disruption.3966797334 |
| Short name | T3561 |
| Test name | |
| Test status | |
| Simulation time | 549265418 ps |
| CPU time | 1.84 seconds |
| Started | Sep 24 09:43:29 AM UTC 24 |
| Finished | Sep 24 09:43:32 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3966797334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 258.usbdev_ tx_rx_disruption.3966797334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/258.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/259.usbdev_tx_rx_disruption.3392027992 |
| Short name | T3560 |
| Test name | |
| Test status | |
| Simulation time | 462890387 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:43:29 AM UTC 24 |
| Finished | Sep 24 09:43:32 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3392027992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 259.usbdev_ tx_rx_disruption.3392027992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/259.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_alert_test.2798101073 |
| Short name | T1949 |
| Test name | |
| Test status | |
| Simulation time | 40254453 ps |
| CPU time | 0.85 seconds |
| Started | Sep 24 09:14:36 AM UTC 24 |
| Finished | Sep 24 09:14:39 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2798101073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 26.usbdev_alert_test.2798101073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_disconnect.906206453 |
| Short name | T1917 |
| Test name | |
| Test status | |
| Simulation time | 9146473805 ps |
| CPU time | 14.45 seconds |
| Started | Sep 24 09:14:00 AM UTC 24 |
| Finished | Sep 24 09:14:16 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=906206453 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_disconnect.906206453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_reset.4084865440 |
| Short name | T1926 |
| Test name | |
| Test status | |
| Simulation time | 18929729777 ps |
| CPU time | 23.07 seconds |
| Started | Sep 24 09:14:00 AM UTC 24 |
| Finished | Sep 24 09:14:24 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4084865440 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_reset.4084865440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_resume.2986604093 |
| Short name | T1968 |
| Test name | |
| Test status | |
| Simulation time | 25904657473 ps |
| CPU time | 35.34 seconds |
| Started | Sep 24 09:14:12 AM UTC 24 |
| Finished | Sep 24 09:14:50 AM UTC 24 |
| Peak memory | 228204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2986604093 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_resume.2986604093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_av_buffer.1807420215 |
| Short name | T1911 |
| Test name | |
| Test status | |
| Simulation time | 213847906 ps |
| CPU time | 1.22 seconds |
| Started | Sep 24 09:14:12 AM UTC 24 |
| Finished | Sep 24 09:14:15 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1807420215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_av_buffer.1807420215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_bitstuff_err.2893171144 |
| Short name | T1914 |
| Test name | |
| Test status | |
| Simulation time | 146535341 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 09:14:12 AM UTC 24 |
| Finished | Sep 24 09:14:15 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2893171144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_bitstuff_err.2893171144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_clear.1056210327 |
| Short name | T1916 |
| Test name | |
| Test status | |
| Simulation time | 302335796 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:14:12 AM UTC 24 |
| Finished | Sep 24 09:14:15 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1056210327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 26.usbdev_data_toggle_clear.1056210327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_restore.3574631324 |
| Short name | T1853 |
| Test name | |
| Test status | |
| Simulation time | 697841189 ps |
| CPU time | 2.13 seconds |
| Started | Sep 24 09:14:12 AM UTC 24 |
| Finished | Sep 24 09:14:16 AM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3574631324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_restore.3574631324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_device_address.2716806518 |
| Short name | T2059 |
| Test name | |
| Test status | |
| Simulation time | 52169699101 ps |
| CPU time | 94.81 seconds |
| Started | Sep 24 09:14:12 AM UTC 24 |
| Finished | Sep 24 09:15:50 AM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2716806518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_address.2716806518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_device_timeout.4294724057 |
| Short name | T1984 |
| Test name | |
| Test status | |
| Simulation time | 4846122755 ps |
| CPU time | 38.44 seconds |
| Started | Sep 24 09:14:12 AM UTC 24 |
| Finished | Sep 24 09:14:53 AM UTC 24 |
| Peak memory | 218340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4294724057 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_timeout.4294724057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_disable_endpoint.3441257157 |
| Short name | T1897 |
| Test name | |
| Test status | |
| Simulation time | 712368514 ps |
| CPU time | 2.08 seconds |
| Started | Sep 24 09:14:12 AM UTC 24 |
| Finished | Sep 24 09:14:16 AM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3441257157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_disable_endpoint.3441257157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_disconnected.3607755861 |
| Short name | T1915 |
| Test name | |
| Test status | |
| Simulation time | 163392471 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:14:12 AM UTC 24 |
| Finished | Sep 24 09:14:15 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3607755861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_disconnected.3607755861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_enable.2262417798 |
| Short name | T1912 |
| Test name | |
| Test status | |
| Simulation time | 39512504 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:14:12 AM UTC 24 |
| Finished | Sep 24 09:14:15 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2262417798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 26.usbdev_enable.2262417798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_access.2421127980 |
| Short name | T1923 |
| Test name | |
| Test status | |
| Simulation time | 903585266 ps |
| CPU time | 2.53 seconds |
| Started | Sep 24 09:14:12 AM UTC 24 |
| Finished | Sep 24 09:14:17 AM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2421127980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_access.2421127980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_levels.1016770743 |
| Short name | T333 |
| Test name | |
| Test status | |
| Simulation time | 249158864 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:14:12 AM UTC 24 |
| Finished | Sep 24 09:14:16 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1016770743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_fifo_levels.1016770743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_rst.3520710975 |
| Short name | T1922 |
| Test name | |
| Test status | |
| Simulation time | 263029815 ps |
| CPU time | 2.39 seconds |
| Started | Sep 24 09:14:12 AM UTC 24 |
| Finished | Sep 24 09:14:17 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3520710975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_fifo_rst.3520710975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_in_iso.2582052863 |
| Short name | T1919 |
| Test name | |
| Test status | |
| Simulation time | 251134046 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 09:14:12 AM UTC 24 |
| Finished | Sep 24 09:14:16 AM UTC 24 |
| Peak memory | 225992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2582052863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_in_iso.2582052863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_in_stall.2079052566 |
| Short name | T1918 |
| Test name | |
| Test status | |
| Simulation time | 174747878 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 09:14:12 AM UTC 24 |
| Finished | Sep 24 09:14:16 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2079052566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_stall.2079052566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_in_trans.2750588663 |
| Short name | T1927 |
| Test name | |
| Test status | |
| Simulation time | 190493955 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:14:23 AM UTC 24 |
| Finished | Sep 24 09:14:25 AM UTC 24 |
| Peak memory | 215600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2750588663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_trans.2750588663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_invalid_sync.4125215252 |
| Short name | T1974 |
| Test name | |
| Test status | |
| Simulation time | 4243907508 ps |
| CPU time | 36.47 seconds |
| Started | Sep 24 09:14:12 AM UTC 24 |
| Finished | Sep 24 09:14:51 AM UTC 24 |
| Peak memory | 235044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4125215252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 26.usbdev_invalid_sync.4125215252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_iso_retraction.3383563799 |
| Short name | T2071 |
| Test name | |
| Test status | |
| Simulation time | 9226770138 ps |
| CPU time | 98.86 seconds |
| Started | Sep 24 09:14:23 AM UTC 24 |
| Finished | Sep 24 09:16:04 AM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3383563799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_iso_retraction.3383563799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_link_in_err.904951514 |
| Short name | T1928 |
| Test name | |
| Test status | |
| Simulation time | 239551192 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:14:23 AM UTC 24 |
| Finished | Sep 24 09:14:25 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=904951514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_link_in_err.904951514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_link_resume.2746525392 |
| Short name | T1987 |
| Test name | |
| Test status | |
| Simulation time | 29883243014 ps |
| CPU time | 42.35 seconds |
| Started | Sep 24 09:14:23 AM UTC 24 |
| Finished | Sep 24 09:15:07 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2746525392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_resume.2746525392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_link_suspend.366713163 |
| Short name | T1942 |
| Test name | |
| Test status | |
| Simulation time | 9381892134 ps |
| CPU time | 13.42 seconds |
| Started | Sep 24 09:14:23 AM UTC 24 |
| Finished | Sep 24 09:14:38 AM UTC 24 |
| Peak memory | 217828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=366713163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_suspend.366713163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_low_speed_traffic.3300010021 |
| Short name | T1986 |
| Test name | |
| Test status | |
| Simulation time | 4395224406 ps |
| CPU time | 32.75 seconds |
| Started | Sep 24 09:14:23 AM UTC 24 |
| Finished | Sep 24 09:14:57 AM UTC 24 |
| Peak memory | 235016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3300010021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_low_speed_traffic.3300010021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_max_inter_pkt_delay.69518399 |
| Short name | T1961 |
| Test name | |
| Test status | |
| Simulation time | 2855836134 ps |
| CPU time | 19.12 seconds |
| Started | Sep 24 09:14:23 AM UTC 24 |
| Finished | Sep 24 09:14:44 AM UTC 24 |
| Peak memory | 217784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=69518399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_inter_pkt_delay.69518399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_in_transaction.3396174198 |
| Short name | T1930 |
| Test name | |
| Test status | |
| Simulation time | 235220549 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:14:23 AM UTC 24 |
| Finished | Sep 24 09:14:26 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3396174198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_in_transaction.3396174198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_out_transaction.137025987 |
| Short name | T1932 |
| Test name | |
| Test status | |
| Simulation time | 199837403 ps |
| CPU time | 1.22 seconds |
| Started | Sep 24 09:14:23 AM UTC 24 |
| Finished | Sep 24 09:14:26 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=137025987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 26.usbdev_max_length_out_transaction.137025987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_min_inter_pkt_delay.2268186655 |
| Short name | T2011 |
| Test name | |
| Test status | |
| Simulation time | 2121795108 ps |
| CPU time | 55.17 seconds |
| Started | Sep 24 09:14:23 AM UTC 24 |
| Finished | Sep 24 09:15:20 AM UTC 24 |
| Peak memory | 228288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2268186655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_inter_pkt_delay.2268186655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_in_transaction.3239850700 |
| Short name | T1931 |
| Test name | |
| Test status | |
| Simulation time | 154758893 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:14:24 AM UTC 24 |
| Finished | Sep 24 09:14:26 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3239850700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_in_transaction.3239850700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_out_transaction.2986338430 |
| Short name | T1934 |
| Test name | |
| Test status | |
| Simulation time | 150011062 ps |
| CPU time | 1.05 seconds |
| Started | Sep 24 09:14:24 AM UTC 24 |
| Finished | Sep 24 09:14:26 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2986338430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_out_transaction.2986338430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_nak_trans.1594742310 |
| Short name | T141 |
| Test name | |
| Test status | |
| Simulation time | 186168625 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:14:24 AM UTC 24 |
| Finished | Sep 24 09:14:26 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1594742310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_nak_trans.1594742310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_out_iso.3847555146 |
| Short name | T1939 |
| Test name | |
| Test status | |
| Simulation time | 250379175 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 09:14:24 AM UTC 24 |
| Finished | Sep 24 09:14:26 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847555146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_out_iso.3847555146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_out_stall.855495775 |
| Short name | T1933 |
| Test name | |
| Test status | |
| Simulation time | 188027072 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:14:24 AM UTC 24 |
| Finished | Sep 24 09:14:26 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=855495775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_out_stall.855495775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_out_trans_nak.3639877287 |
| Short name | T1937 |
| Test name | |
| Test status | |
| Simulation time | 175540336 ps |
| CPU time | 1.28 seconds |
| Started | Sep 24 09:14:24 AM UTC 24 |
| Finished | Sep 24 09:14:26 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3639877287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_out_trans_nak.3639877287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_pending_in_trans.3729687012 |
| Short name | T1938 |
| Test name | |
| Test status | |
| Simulation time | 155649891 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:14:24 AM UTC 24 |
| Finished | Sep 24 09:14:26 AM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3729687012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_pending_in_trans.3729687012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_pinflip.1477976892 |
| Short name | T1936 |
| Test name | |
| Test status | |
| Simulation time | 238532173 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:14:24 AM UTC 24 |
| Finished | Sep 24 09:14:26 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1477976892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_pinflip.1477976892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_usb_ref_disable.4102914330 |
| Short name | T1935 |
| Test name | |
| Test status | |
| Simulation time | 140740026 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:14:24 AM UTC 24 |
| Finished | Sep 24 09:14:26 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4102914330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_usb_ref_disable.4102914330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_phy_pins_sense.2733687341 |
| Short name | T1944 |
| Test name | |
| Test status | |
| Simulation time | 32994743 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:14:36 AM UTC 24 |
| Finished | Sep 24 09:14:38 AM UTC 24 |
| Peak memory | 215464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2733687341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_pins_sense.2733687341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_buffer.1016127908 |
| Short name | T2031 |
| Test name | |
| Test status | |
| Simulation time | 22417541565 ps |
| CPU time | 56.11 seconds |
| Started | Sep 24 09:14:36 AM UTC 24 |
| Finished | Sep 24 09:15:34 AM UTC 24 |
| Peak memory | 227960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1016127908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_pkt_buffer.1016127908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_received.1622356300 |
| Short name | T1943 |
| Test name | |
| Test status | |
| Simulation time | 175200654 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:14:36 AM UTC 24 |
| Finished | Sep 24 09:14:38 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1622356300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_pkt_received.1622356300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_sent.1226583522 |
| Short name | T1945 |
| Test name | |
| Test status | |
| Simulation time | 251834542 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:14:36 AM UTC 24 |
| Finished | Sep 24 09:14:38 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1226583522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_pkt_sent.1226583522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_in_transaction.1587878353 |
| Short name | T1953 |
| Test name | |
| Test status | |
| Simulation time | 281178518 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 09:14:36 AM UTC 24 |
| Finished | Sep 24 09:14:39 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1587878353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_random_length_in_transaction.1587878353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_out_transaction.2977455270 |
| Short name | T1948 |
| Test name | |
| Test status | |
| Simulation time | 184554041 ps |
| CPU time | 1.38 seconds |
| Started | Sep 24 09:14:36 AM UTC 24 |
| Finished | Sep 24 09:14:39 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2977455270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_random_length_out_transaction.2977455270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_rx_crc_err.2540144437 |
| Short name | T1946 |
| Test name | |
| Test status | |
| Simulation time | 195299524 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:14:36 AM UTC 24 |
| Finished | Sep 24 09:14:38 AM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2540144437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_rx_crc_err.2540144437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_rx_full.1016729141 |
| Short name | T1958 |
| Test name | |
| Test status | |
| Simulation time | 368791648 ps |
| CPU time | 1.9 seconds |
| Started | Sep 24 09:14:36 AM UTC 24 |
| Finished | Sep 24 09:14:39 AM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1016729141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_rx_full.1016729141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_setup_stage.3670952995 |
| Short name | T1950 |
| Test name | |
| Test status | |
| Simulation time | 157556821 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:14:36 AM UTC 24 |
| Finished | Sep 24 09:14:39 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3670952995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_setup_stage.3670952995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_setup_trans_ignored.917165276 |
| Short name | T1951 |
| Test name | |
| Test status | |
| Simulation time | 206577469 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:14:36 AM UTC 24 |
| Finished | Sep 24 09:14:39 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=917165276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 26.usbdev_setup_trans_ignored.917165276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_smoke.1957258108 |
| Short name | T1954 |
| Test name | |
| Test status | |
| Simulation time | 196383968 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:14:36 AM UTC 24 |
| Finished | Sep 24 09:14:39 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1957258108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_smoke.1957258108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_spurious_pids_ignored.743537942 |
| Short name | T2050 |
| Test name | |
| Test status | |
| Simulation time | 2760623814 ps |
| CPU time | 70.58 seconds |
| Started | Sep 24 09:14:36 AM UTC 24 |
| Finished | Sep 24 09:15:49 AM UTC 24 |
| Peak memory | 230776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=743537942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_spurious_pids_ignored.743537942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_stall_priority_over_nak.4226021853 |
| Short name | T1952 |
| Test name | |
| Test status | |
| Simulation time | 174885575 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 09:14:36 AM UTC 24 |
| Finished | Sep 24 09:14:39 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4226021853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stall_priority_over_nak.4226021853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_stall_trans.1938069854 |
| Short name | T1955 |
| Test name | |
| Test status | |
| Simulation time | 173662542 ps |
| CPU time | 1.4 seconds |
| Started | Sep 24 09:14:36 AM UTC 24 |
| Finished | Sep 24 09:14:39 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1938069854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_stall_trans.1938069854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_stream_len_max.2250194843 |
| Short name | T1959 |
| Test name | |
| Test status | |
| Simulation time | 729713920 ps |
| CPU time | 2.02 seconds |
| Started | Sep 24 09:14:36 AM UTC 24 |
| Finished | Sep 24 09:14:40 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2250194843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stream_len_max.2250194843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_streaming_out.4071106518 |
| Short name | T1967 |
| Test name | |
| Test status | |
| Simulation time | 1621242139 ps |
| CPU time | 11.38 seconds |
| Started | Sep 24 09:14:36 AM UTC 24 |
| Finished | Sep 24 09:14:49 AM UTC 24 |
| Peak memory | 228532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4071106518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_streaming_out.4071106518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_timeout_missing_host_handshake.3648383788 |
| Short name | T1965 |
| Test name | |
| Test status | |
| Simulation time | 1568109212 ps |
| CPU time | 31.43 seconds |
| Started | Sep 24 09:14:12 AM UTC 24 |
| Finished | Sep 24 09:14:46 AM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3648383788 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_timeout_missing_host_handshake.3648383788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/26.usbdev_tx_rx_disruption.2807054666 |
| Short name | T1960 |
| Test name | |
| Test status | |
| Simulation time | 553757237 ps |
| CPU time | 2.09 seconds |
| Started | Sep 24 09:14:36 AM UTC 24 |
| Finished | Sep 24 09:14:40 AM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2807054666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_t x_rx_disruption.2807054666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/26.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/260.usbdev_tx_rx_disruption.3071950451 |
| Short name | T3559 |
| Test name | |
| Test status | |
| Simulation time | 435654521 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 09:43:29 AM UTC 24 |
| Finished | Sep 24 09:43:32 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3071950451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 260.usbdev_ tx_rx_disruption.3071950451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/260.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/261.usbdev_tx_rx_disruption.2655577615 |
| Short name | T3552 |
| Test name | |
| Test status | |
| Simulation time | 574234858 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:43:29 AM UTC 24 |
| Finished | Sep 24 09:43:32 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2655577615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 261.usbdev_ tx_rx_disruption.2655577615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/261.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/262.usbdev_tx_rx_disruption.4252407754 |
| Short name | T3555 |
| Test name | |
| Test status | |
| Simulation time | 562552254 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 09:43:29 AM UTC 24 |
| Finished | Sep 24 09:43:32 AM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4252407754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 262.usbdev_ tx_rx_disruption.4252407754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/262.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/263.usbdev_tx_rx_disruption.829236390 |
| Short name | T3563 |
| Test name | |
| Test status | |
| Simulation time | 686552511 ps |
| CPU time | 1.88 seconds |
| Started | Sep 24 09:43:29 AM UTC 24 |
| Finished | Sep 24 09:43:32 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=829236390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 263.usbdev_t x_rx_disruption.829236390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/263.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/264.usbdev_tx_rx_disruption.3774163900 |
| Short name | T3565 |
| Test name | |
| Test status | |
| Simulation time | 518299618 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 09:44:21 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3774163900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 264.usbdev_ tx_rx_disruption.3774163900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/264.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/265.usbdev_tx_rx_disruption.3539207955 |
| Short name | T3564 |
| Test name | |
| Test status | |
| Simulation time | 559748186 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 09:44:21 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3539207955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 265.usbdev_ tx_rx_disruption.3539207955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/265.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/266.usbdev_tx_rx_disruption.865606819 |
| Short name | T3571 |
| Test name | |
| Test status | |
| Simulation time | 576000452 ps |
| CPU time | 1.78 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 215508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=865606819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 266.usbdev_t x_rx_disruption.865606819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/266.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/267.usbdev_tx_rx_disruption.3025759928 |
| Short name | T3566 |
| Test name | |
| Test status | |
| Simulation time | 419533941 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3025759928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 267.usbdev_ tx_rx_disruption.3025759928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/267.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/268.usbdev_tx_rx_disruption.1836062184 |
| Short name | T3568 |
| Test name | |
| Test status | |
| Simulation time | 701922593 ps |
| CPU time | 2.03 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1836062184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 268.usbdev_ tx_rx_disruption.1836062184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/268.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/269.usbdev_tx_rx_disruption.2754704758 |
| Short name | T3570 |
| Test name | |
| Test status | |
| Simulation time | 500130455 ps |
| CPU time | 1.97 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 215568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2754704758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 269.usbdev_ tx_rx_disruption.2754704758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/269.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_alert_test.2335505156 |
| Short name | T2017 |
| Test name | |
| Test status | |
| Simulation time | 50381567 ps |
| CPU time | 0.79 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:15:23 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2335505156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 27.usbdev_alert_test.2335505156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_disconnect.1462072121 |
| Short name | T1964 |
| Test name | |
| Test status | |
| Simulation time | 4786350124 ps |
| CPU time | 7.18 seconds |
| Started | Sep 24 09:14:36 AM UTC 24 |
| Finished | Sep 24 09:14:45 AM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1462072121 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_disconnect.1462072121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_reset.2596447559 |
| Short name | T2010 |
| Test name | |
| Test status | |
| Simulation time | 20953835114 ps |
| CPU time | 26.42 seconds |
| Started | Sep 24 09:14:48 AM UTC 24 |
| Finished | Sep 24 09:15:16 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2596447559 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_reset.2596447559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_resume.2867402623 |
| Short name | T2016 |
| Test name | |
| Test status | |
| Simulation time | 24642735439 ps |
| CPU time | 32.9 seconds |
| Started | Sep 24 09:14:48 AM UTC 24 |
| Finished | Sep 24 09:15:23 AM UTC 24 |
| Peak memory | 228108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2867402623 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_resume.2867402623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_av_buffer.3787352894 |
| Short name | T1969 |
| Test name | |
| Test status | |
| Simulation time | 153332113 ps |
| CPU time | 0.94 seconds |
| Started | Sep 24 09:14:48 AM UTC 24 |
| Finished | Sep 24 09:14:50 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3787352894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_av_buffer.3787352894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_bitstuff_err.3977079970 |
| Short name | T1970 |
| Test name | |
| Test status | |
| Simulation time | 195000350 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:14:49 AM UTC 24 |
| Finished | Sep 24 09:14:51 AM UTC 24 |
| Peak memory | 215440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3977079970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_bitstuff_err.3977079970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_clear.268270090 |
| Short name | T1977 |
| Test name | |
| Test status | |
| Simulation time | 416279445 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:14:49 AM UTC 24 |
| Finished | Sep 24 09:14:51 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=268270090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_data_toggle_clear.268270090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_restore.1888446996 |
| Short name | T1980 |
| Test name | |
| Test status | |
| Simulation time | 391106555 ps |
| CPU time | 1.81 seconds |
| Started | Sep 24 09:14:49 AM UTC 24 |
| Finished | Sep 24 09:14:51 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1888446996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_data_toggle_restore.1888446996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_device_address.3659616926 |
| Short name | T2066 |
| Test name | |
| Test status | |
| Simulation time | 40459528867 ps |
| CPU time | 60.17 seconds |
| Started | Sep 24 09:14:49 AM UTC 24 |
| Finished | Sep 24 09:15:50 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3659616926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_address.3659616926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_device_timeout.331168041 |
| Short name | T1985 |
| Test name | |
| Test status | |
| Simulation time | 309301388 ps |
| CPU time | 4.15 seconds |
| Started | Sep 24 09:14:49 AM UTC 24 |
| Finished | Sep 24 09:14:54 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=331168041 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_timeout.331168041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_disable_endpoint.1823506284 |
| Short name | T1981 |
| Test name | |
| Test status | |
| Simulation time | 599293824 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:14:49 AM UTC 24 |
| Finished | Sep 24 09:14:52 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1823506284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_disable_endpoint.1823506284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_disconnected.1146663469 |
| Short name | T1971 |
| Test name | |
| Test status | |
| Simulation time | 151704637 ps |
| CPU time | 0.94 seconds |
| Started | Sep 24 09:14:49 AM UTC 24 |
| Finished | Sep 24 09:14:51 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1146663469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_disconnected.1146663469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_enable.2310340744 |
| Short name | T1972 |
| Test name | |
| Test status | |
| Simulation time | 47089509 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:14:49 AM UTC 24 |
| Finished | Sep 24 09:14:51 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2310340744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 27.usbdev_enable.2310340744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_access.3366176221 |
| Short name | T1983 |
| Test name | |
| Test status | |
| Simulation time | 850994945 ps |
| CPU time | 2.88 seconds |
| Started | Sep 24 09:14:49 AM UTC 24 |
| Finished | Sep 24 09:14:53 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3366176221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_access.3366176221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_types.589657573 |
| Short name | T1978 |
| Test name | |
| Test status | |
| Simulation time | 165774585 ps |
| CPU time | 1.4 seconds |
| Started | Sep 24 09:14:49 AM UTC 24 |
| Finished | Sep 24 09:14:51 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=589657573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_types.589657573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_levels.1605308350 |
| Short name | T1973 |
| Test name | |
| Test status | |
| Simulation time | 178727593 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:14:49 AM UTC 24 |
| Finished | Sep 24 09:14:51 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1605308350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_fifo_levels.1605308350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_rst.3417807003 |
| Short name | T1982 |
| Test name | |
| Test status | |
| Simulation time | 319149974 ps |
| CPU time | 2.69 seconds |
| Started | Sep 24 09:14:49 AM UTC 24 |
| Finished | Sep 24 09:14:53 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3417807003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_fifo_rst.3417807003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_in_iso.3400677671 |
| Short name | T1979 |
| Test name | |
| Test status | |
| Simulation time | 231365853 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:14:49 AM UTC 24 |
| Finished | Sep 24 09:14:51 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3400677671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 27.usbdev_in_iso.3400677671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_in_stall.2011409327 |
| Short name | T1976 |
| Test name | |
| Test status | |
| Simulation time | 153060502 ps |
| CPU time | 1.25 seconds |
| Started | Sep 24 09:14:49 AM UTC 24 |
| Finished | Sep 24 09:14:51 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2011409327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_stall.2011409327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_in_trans.1076652578 |
| Short name | T1975 |
| Test name | |
| Test status | |
| Simulation time | 174371026 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:14:49 AM UTC 24 |
| Finished | Sep 24 09:14:51 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1076652578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_trans.1076652578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_invalid_sync.3930242532 |
| Short name | T2138 |
| Test name | |
| Test status | |
| Simulation time | 4624188797 ps |
| CPU time | 114.7 seconds |
| Started | Sep 24 09:14:49 AM UTC 24 |
| Finished | Sep 24 09:16:46 AM UTC 24 |
| Peak memory | 234988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3930242532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 27.usbdev_invalid_sync.3930242532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_iso_retraction.1910906782 |
| Short name | T2045 |
| Test name | |
| Test status | |
| Simulation time | 5725088589 ps |
| CPU time | 33.5 seconds |
| Started | Sep 24 09:15:06 AM UTC 24 |
| Finished | Sep 24 09:15:41 AM UTC 24 |
| Peak memory | 218380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1910906782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_iso_retraction.1910906782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_link_in_err.3746415873 |
| Short name | T1988 |
| Test name | |
| Test status | |
| Simulation time | 272140317 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:15:06 AM UTC 24 |
| Finished | Sep 24 09:15:08 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3746415873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_in_err.3746415873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_link_resume.1282763903 |
| Short name | T2013 |
| Test name | |
| Test status | |
| Simulation time | 11273400223 ps |
| CPU time | 14.54 seconds |
| Started | Sep 24 09:15:06 AM UTC 24 |
| Finished | Sep 24 09:15:22 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1282763903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_resume.1282763903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_link_suspend.1482241192 |
| Short name | T2012 |
| Test name | |
| Test status | |
| Simulation time | 11397176632 ps |
| CPU time | 14.02 seconds |
| Started | Sep 24 09:15:06 AM UTC 24 |
| Finished | Sep 24 09:15:21 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1482241192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_link_suspend.1482241192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_low_speed_traffic.3472018797 |
| Short name | T2046 |
| Test name | |
| Test status | |
| Simulation time | 4724425877 ps |
| CPU time | 33.3 seconds |
| Started | Sep 24 09:15:06 AM UTC 24 |
| Finished | Sep 24 09:15:41 AM UTC 24 |
| Peak memory | 234764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3472018797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_low_speed_traffic.3472018797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_max_inter_pkt_delay.2234699017 |
| Short name | T2135 |
| Test name | |
| Test status | |
| Simulation time | 3761976744 ps |
| CPU time | 91.39 seconds |
| Started | Sep 24 09:15:06 AM UTC 24 |
| Finished | Sep 24 09:16:39 AM UTC 24 |
| Peak memory | 228216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2234699017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_inter_pkt_delay.2234699017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_in_transaction.4229602700 |
| Short name | T1990 |
| Test name | |
| Test status | |
| Simulation time | 242044116 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:15:06 AM UTC 24 |
| Finished | Sep 24 09:15:08 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4229602700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_in_transaction.4229602700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_out_transaction.154357427 |
| Short name | T1989 |
| Test name | |
| Test status | |
| Simulation time | 269200009 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:15:06 AM UTC 24 |
| Finished | Sep 24 09:15:08 AM UTC 24 |
| Peak memory | 215940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=154357427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 27.usbdev_max_length_out_transaction.154357427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_min_inter_pkt_delay.21628022 |
| Short name | T2093 |
| Test name | |
| Test status | |
| Simulation time | 2897694213 ps |
| CPU time | 71.49 seconds |
| Started | Sep 24 09:15:06 AM UTC 24 |
| Finished | Sep 24 09:16:19 AM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=21628022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TE ST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_inter_pkt_delay.21628022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_in_transaction.2658388432 |
| Short name | T1993 |
| Test name | |
| Test status | |
| Simulation time | 148540729 ps |
| CPU time | 1.05 seconds |
| Started | Sep 24 09:15:06 AM UTC 24 |
| Finished | Sep 24 09:15:08 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2658388432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_in_transaction.2658388432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_out_transaction.1292185496 |
| Short name | T1999 |
| Test name | |
| Test status | |
| Simulation time | 146550566 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:15:06 AM UTC 24 |
| Finished | Sep 24 09:15:09 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1292185496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_out_transaction.1292185496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_nak_trans.3267282260 |
| Short name | T2002 |
| Test name | |
| Test status | |
| Simulation time | 181198375 ps |
| CPU time | 1.47 seconds |
| Started | Sep 24 09:15:06 AM UTC 24 |
| Finished | Sep 24 09:15:09 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3267282260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_nak_trans.3267282260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_out_iso.3902963639 |
| Short name | T1991 |
| Test name | |
| Test status | |
| Simulation time | 166685044 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:15:06 AM UTC 24 |
| Finished | Sep 24 09:15:08 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3902963639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_out_iso.3902963639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_out_stall.404953618 |
| Short name | T2003 |
| Test name | |
| Test status | |
| Simulation time | 187558915 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:15:06 AM UTC 24 |
| Finished | Sep 24 09:15:09 AM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=404953618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_out_stall.404953618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_out_trans_nak.3495554594 |
| Short name | T2000 |
| Test name | |
| Test status | |
| Simulation time | 181365484 ps |
| CPU time | 1.4 seconds |
| Started | Sep 24 09:15:06 AM UTC 24 |
| Finished | Sep 24 09:15:09 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3495554594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_out_trans_nak.3495554594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_pending_in_trans.442515809 |
| Short name | T1994 |
| Test name | |
| Test status | |
| Simulation time | 156385991 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:15:06 AM UTC 24 |
| Finished | Sep 24 09:15:09 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=442515809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_pending_in_trans.442515809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_pinflip.155338801 |
| Short name | T2001 |
| Test name | |
| Test status | |
| Simulation time | 251274628 ps |
| CPU time | 1.29 seconds |
| Started | Sep 24 09:15:06 AM UTC 24 |
| Finished | Sep 24 09:15:09 AM UTC 24 |
| Peak memory | 215628 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=155338801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_pinflip.155338801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_usb_ref_disable.3244368659 |
| Short name | T1998 |
| Test name | |
| Test status | |
| Simulation time | 149057522 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:15:06 AM UTC 24 |
| Finished | Sep 24 09:15:09 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3244368659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_usb_ref_disable.3244368659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_phy_pins_sense.19502124 |
| Short name | T1995 |
| Test name | |
| Test status | |
| Simulation time | 75454238 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:15:07 AM UTC 24 |
| Finished | Sep 24 09:15:09 AM UTC 24 |
| Peak memory | 215568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=19502124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_phy_pins_sense.19502124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_buffer.2805225191 |
| Short name | T2047 |
| Test name | |
| Test status | |
| Simulation time | 14188991479 ps |
| CPU time | 32.94 seconds |
| Started | Sep 24 09:15:07 AM UTC 24 |
| Finished | Sep 24 09:15:41 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2805225191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_pkt_buffer.2805225191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_received.3604060181 |
| Short name | T1996 |
| Test name | |
| Test status | |
| Simulation time | 161561669 ps |
| CPU time | 1.05 seconds |
| Started | Sep 24 09:15:07 AM UTC 24 |
| Finished | Sep 24 09:15:09 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3604060181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_pkt_received.3604060181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_sent.2623167196 |
| Short name | T1997 |
| Test name | |
| Test status | |
| Simulation time | 205938376 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:15:07 AM UTC 24 |
| Finished | Sep 24 09:15:09 AM UTC 24 |
| Peak memory | 215700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2623167196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_pkt_sent.2623167196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_in_transaction.761673398 |
| Short name | T2007 |
| Test name | |
| Test status | |
| Simulation time | 214277915 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:15:07 AM UTC 24 |
| Finished | Sep 24 09:15:09 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=761673398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_random_length_in_transaction.761673398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_out_transaction.2343796023 |
| Short name | T2005 |
| Test name | |
| Test status | |
| Simulation time | 193540472 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:15:07 AM UTC 24 |
| Finished | Sep 24 09:15:09 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2343796023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_random_length_out_transaction.2343796023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_rx_crc_err.3941482274 |
| Short name | T2004 |
| Test name | |
| Test status | |
| Simulation time | 168158421 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:15:07 AM UTC 24 |
| Finished | Sep 24 09:15:09 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3941482274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_rx_crc_err.3941482274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_rx_full.2981395272 |
| Short name | T2009 |
| Test name | |
| Test status | |
| Simulation time | 306691252 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 09:15:07 AM UTC 24 |
| Finished | Sep 24 09:15:09 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2981395272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_rx_full.2981395272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_setup_stage.2750012568 |
| Short name | T2006 |
| Test name | |
| Test status | |
| Simulation time | 148890687 ps |
| CPU time | 1.05 seconds |
| Started | Sep 24 09:15:07 AM UTC 24 |
| Finished | Sep 24 09:15:09 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2750012568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_setup_stage.2750012568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_setup_trans_ignored.3069266444 |
| Short name | T2014 |
| Test name | |
| Test status | |
| Simulation time | 145969108 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:15:23 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3069266444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 27.usbdev_setup_trans_ignored.3069266444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_smoke.3924322535 |
| Short name | T2019 |
| Test name | |
| Test status | |
| Simulation time | 276183464 ps |
| CPU time | 1.28 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:15:23 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3924322535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_smoke.3924322535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_spurious_pids_ignored.725979577 |
| Short name | T2043 |
| Test name | |
| Test status | |
| Simulation time | 2051908374 ps |
| CPU time | 17.03 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:15:39 AM UTC 24 |
| Peak memory | 234836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=725979577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_spurious_pids_ignored.725979577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_stall_priority_over_nak.2333933675 |
| Short name | T2020 |
| Test name | |
| Test status | |
| Simulation time | 220990633 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:15:23 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2333933675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stall_priority_over_nak.2333933675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_stall_trans.3682784458 |
| Short name | T2018 |
| Test name | |
| Test status | |
| Simulation time | 180511608 ps |
| CPU time | 1.05 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:15:23 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3682784458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_stall_trans.3682784458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_stream_len_max.50921947 |
| Short name | T2028 |
| Test name | |
| Test status | |
| Simulation time | 1402449345 ps |
| CPU time | 3.44 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:15:25 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=50921947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_stream_len_max.50921947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_streaming_out.1250035386 |
| Short name | T2048 |
| Test name | |
| Test status | |
| Simulation time | 2559685459 ps |
| CPU time | 23.72 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:15:46 AM UTC 24 |
| Peak memory | 228288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1250035386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_streaming_out.1250035386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_timeout_missing_host_handshake.2359219853 |
| Short name | T2008 |
| Test name | |
| Test status | |
| Simulation time | 2453625113 ps |
| CPU time | 19.31 seconds |
| Started | Sep 24 09:14:49 AM UTC 24 |
| Finished | Sep 24 09:15:09 AM UTC 24 |
| Peak memory | 218408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2359219853 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_timeout_missing_host_handshake.2359219853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/27.usbdev_tx_rx_disruption.3656483394 |
| Short name | T2026 |
| Test name | |
| Test status | |
| Simulation time | 484749823 ps |
| CPU time | 2.65 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:15:25 AM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3656483394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_t x_rx_disruption.3656483394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/27.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/270.usbdev_tx_rx_disruption.3468949450 |
| Short name | T3573 |
| Test name | |
| Test status | |
| Simulation time | 528322215 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3468949450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 270.usbdev_ tx_rx_disruption.3468949450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/270.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/271.usbdev_tx_rx_disruption.1376594521 |
| Short name | T3580 |
| Test name | |
| Test status | |
| Simulation time | 487546549 ps |
| CPU time | 2.01 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1376594521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 271.usbdev_ tx_rx_disruption.1376594521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/271.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/272.usbdev_tx_rx_disruption.1717930779 |
| Short name | T3569 |
| Test name | |
| Test status | |
| Simulation time | 620538027 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1717930779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 272.usbdev_ tx_rx_disruption.1717930779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/272.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/273.usbdev_tx_rx_disruption.3989075248 |
| Short name | T3567 |
| Test name | |
| Test status | |
| Simulation time | 456201524 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3989075248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 273.usbdev_ tx_rx_disruption.3989075248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/273.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/274.usbdev_tx_rx_disruption.4143690862 |
| Short name | T3575 |
| Test name | |
| Test status | |
| Simulation time | 612383912 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 215588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4143690862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 274.usbdev_ tx_rx_disruption.4143690862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/274.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/275.usbdev_tx_rx_disruption.1681951307 |
| Short name | T3574 |
| Test name | |
| Test status | |
| Simulation time | 497948912 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1681951307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 275.usbdev_ tx_rx_disruption.1681951307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/275.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/276.usbdev_tx_rx_disruption.4177889300 |
| Short name | T3576 |
| Test name | |
| Test status | |
| Simulation time | 525701094 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4177889300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 276.usbdev_ tx_rx_disruption.4177889300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/276.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/278.usbdev_tx_rx_disruption.2643609480 |
| Short name | T3572 |
| Test name | |
| Test status | |
| Simulation time | 464740590 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2643609480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 278.usbdev_ tx_rx_disruption.2643609480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/278.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/279.usbdev_tx_rx_disruption.2003904480 |
| Short name | T3587 |
| Test name | |
| Test status | |
| Simulation time | 513937783 ps |
| CPU time | 2.37 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2003904480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 279.usbdev_ tx_rx_disruption.2003904480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/279.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_alert_test.4019722760 |
| Short name | T2073 |
| Test name | |
| Test status | |
| Simulation time | 59327736 ps |
| CPU time | 0.7 seconds |
| Started | Sep 24 09:16:02 AM UTC 24 |
| Finished | Sep 24 09:16:04 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4019722760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 28.usbdev_alert_test.4019722760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_disconnect.2499003152 |
| Short name | T2029 |
| Test name | |
| Test status | |
| Simulation time | 5641461587 ps |
| CPU time | 8.44 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:15:31 AM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2499003152 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_disconnect.2499003152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_reset.2648244219 |
| Short name | T2049 |
| Test name | |
| Test status | |
| Simulation time | 19212454168 ps |
| CPU time | 24.46 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:15:47 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2648244219 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_reset.2648244219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_resume.537661777 |
| Short name | T2070 |
| Test name | |
| Test status | |
| Simulation time | 25389547838 ps |
| CPU time | 31.26 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:15:53 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=537661777 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_resume.537661777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_av_buffer.2977211853 |
| Short name | T2022 |
| Test name | |
| Test status | |
| Simulation time | 176736017 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:15:23 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2977211853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_av_buffer.2977211853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_bitstuff_err.1304902271 |
| Short name | T2021 |
| Test name | |
| Test status | |
| Simulation time | 192469215 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:15:23 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1304902271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_bitstuff_err.1304902271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_clear.2664571428 |
| Short name | T2024 |
| Test name | |
| Test status | |
| Simulation time | 533881565 ps |
| CPU time | 1.86 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:15:24 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2664571428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 28.usbdev_data_toggle_clear.2664571428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_restore.3332012848 |
| Short name | T2027 |
| Test name | |
| Test status | |
| Simulation time | 852081007 ps |
| CPU time | 2.74 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:15:25 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3332012848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_restore.3332012848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_device_address.3018142276 |
| Short name | T2122 |
| Test name | |
| Test status | |
| Simulation time | 50837190756 ps |
| CPU time | 91.31 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:16:54 AM UTC 24 |
| Peak memory | 218436 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3018142276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_address.3018142276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_device_timeout.2085485154 |
| Short name | T2030 |
| Test name | |
| Test status | |
| Simulation time | 1057680956 ps |
| CPU time | 8.62 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:15:31 AM UTC 24 |
| Peak memory | 217940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2085485154 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_timeout.2085485154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_disable_endpoint.1414793501 |
| Short name | T2025 |
| Test name | |
| Test status | |
| Simulation time | 612508885 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:15:24 AM UTC 24 |
| Peak memory | 215596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1414793501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_disable_endpoint.1414793501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_disconnected.2502917701 |
| Short name | T2023 |
| Test name | |
| Test status | |
| Simulation time | 145747145 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:15:23 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2502917701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_disconnected.2502917701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_enable.3096126955 |
| Short name | T2033 |
| Test name | |
| Test status | |
| Simulation time | 36039565 ps |
| CPU time | 0.84 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:15:36 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3096126955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 28.usbdev_enable.3096126955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_access.82189867 |
| Short name | T2042 |
| Test name | |
| Test status | |
| Simulation time | 856534730 ps |
| CPU time | 2.41 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:15:38 AM UTC 24 |
| Peak memory | 217988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=82189867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_endpoint_access.82189867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_types.2896285622 |
| Short name | T469 |
| Test name | |
| Test status | |
| Simulation time | 646979494 ps |
| CPU time | 1.98 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:15:38 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2896285622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_types.2896285622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_levels.3941697906 |
| Short name | T387 |
| Test name | |
| Test status | |
| Simulation time | 195292438 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:15:37 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3941697906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_fifo_levels.3941697906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_rst.870751616 |
| Short name | T2044 |
| Test name | |
| Test status | |
| Simulation time | 368811059 ps |
| CPU time | 4.36 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:15:40 AM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=870751616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_fifo_rst.870751616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_in_iso.2437805982 |
| Short name | T2034 |
| Test name | |
| Test status | |
| Simulation time | 174953369 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:15:37 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2437805982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_in_iso.2437805982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_in_stall.4004468598 |
| Short name | T2036 |
| Test name | |
| Test status | |
| Simulation time | 169404178 ps |
| CPU time | 1.29 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:15:37 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4004468598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_stall.4004468598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_in_trans.999632383 |
| Short name | T2039 |
| Test name | |
| Test status | |
| Simulation time | 221714134 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:15:38 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=999632383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_in_trans.999632383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_invalid_sync.2134580363 |
| Short name | T2094 |
| Test name | |
| Test status | |
| Simulation time | 4938483719 ps |
| CPU time | 43.47 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:16:20 AM UTC 24 |
| Peak memory | 234928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2134580363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 28.usbdev_invalid_sync.2134580363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_iso_retraction.275564372 |
| Short name | T2089 |
| Test name | |
| Test status | |
| Simulation time | 5691326183 ps |
| CPU time | 34.16 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:16:10 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=275564372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 28.usbdev_iso_retraction.275564372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_link_in_err.2895251201 |
| Short name | T2037 |
| Test name | |
| Test status | |
| Simulation time | 182609276 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:15:37 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2895251201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_in_err.2895251201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_link_resume.4179265188 |
| Short name | T2113 |
| Test name | |
| Test status | |
| Simulation time | 32589976897 ps |
| CPU time | 51.59 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:16:28 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4179265188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_resume.4179265188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_link_suspend.2816228618 |
| Short name | T2069 |
| Test name | |
| Test status | |
| Simulation time | 10090859786 ps |
| CPU time | 15.46 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:15:52 AM UTC 24 |
| Peak memory | 217724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2816228618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_link_suspend.2816228618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_low_speed_traffic.1737199166 |
| Short name | T2187 |
| Test name | |
| Test status | |
| Simulation time | 4517067476 ps |
| CPU time | 114 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:17:31 AM UTC 24 |
| Peak memory | 235004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1737199166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_low_speed_traffic.1737199166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_max_inter_pkt_delay.2347022499 |
| Short name | T2158 |
| Test name | |
| Test status | |
| Simulation time | 3598910765 ps |
| CPU time | 91.5 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:17:09 AM UTC 24 |
| Peak memory | 228500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2347022499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_inter_pkt_delay.2347022499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_in_transaction.1341395251 |
| Short name | T2035 |
| Test name | |
| Test status | |
| Simulation time | 244142012 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:15:37 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1341395251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_in_transaction.1341395251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_out_transaction.4001118240 |
| Short name | T2040 |
| Test name | |
| Test status | |
| Simulation time | 194339860 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:15:38 AM UTC 24 |
| Peak memory | 215564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4001118240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_out_transaction.4001118240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_min_inter_pkt_delay.3357506304 |
| Short name | T2086 |
| Test name | |
| Test status | |
| Simulation time | 3009757542 ps |
| CPU time | 29.92 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:16:07 AM UTC 24 |
| Peak memory | 228124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3357506304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_inter_pkt_delay.3357506304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_in_transaction.240635626 |
| Short name | T2038 |
| Test name | |
| Test status | |
| Simulation time | 178290980 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:15:38 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=240635626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_in_transaction.240635626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_out_transaction.296682055 |
| Short name | T2041 |
| Test name | |
| Test status | |
| Simulation time | 186505992 ps |
| CPU time | 1.34 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:15:38 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=296682055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 28.usbdev_min_length_out_transaction.296682055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_nak_trans.2264357989 |
| Short name | T136 |
| Test name | |
| Test status | |
| Simulation time | 225084717 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:15:35 AM UTC 24 |
| Finished | Sep 24 09:15:38 AM UTC 24 |
| Peak memory | 215884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2264357989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_nak_trans.2264357989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_out_iso.912992351 |
| Short name | T2051 |
| Test name | |
| Test status | |
| Simulation time | 185958316 ps |
| CPU time | 0.94 seconds |
| Started | Sep 24 09:15:47 AM UTC 24 |
| Finished | Sep 24 09:15:49 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=912992351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 28.usbdev_out_iso.912992351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_out_stall.1625662261 |
| Short name | T2057 |
| Test name | |
| Test status | |
| Simulation time | 172948494 ps |
| CPU time | 1.25 seconds |
| Started | Sep 24 09:15:47 AM UTC 24 |
| Finished | Sep 24 09:15:49 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1625662261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_out_stall.1625662261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_out_trans_nak.518685737 |
| Short name | T2053 |
| Test name | |
| Test status | |
| Simulation time | 180927625 ps |
| CPU time | 1.05 seconds |
| Started | Sep 24 09:15:47 AM UTC 24 |
| Finished | Sep 24 09:15:49 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=518685737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_out_trans_nak.518685737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_pending_in_trans.3621752411 |
| Short name | T2052 |
| Test name | |
| Test status | |
| Simulation time | 151948620 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:15:47 AM UTC 24 |
| Finished | Sep 24 09:15:49 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3621752411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_pending_in_trans.3621752411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_pinflip.3464872382 |
| Short name | T2055 |
| Test name | |
| Test status | |
| Simulation time | 208260868 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:15:47 AM UTC 24 |
| Finished | Sep 24 09:15:49 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464872382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_pinflip.3464872382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_usb_ref_disable.648442078 |
| Short name | T2054 |
| Test name | |
| Test status | |
| Simulation time | 155963277 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:15:47 AM UTC 24 |
| Finished | Sep 24 09:15:49 AM UTC 24 |
| Peak memory | 215968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=648442078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 28.usbdev_phy_config_usb_ref_disable.648442078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_phy_pins_sense.4128652870 |
| Short name | T2056 |
| Test name | |
| Test status | |
| Simulation time | 48118101 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:15:47 AM UTC 24 |
| Finished | Sep 24 09:15:49 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4128652870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_pins_sense.4128652870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_buffer.228909924 |
| Short name | T2091 |
| Test name | |
| Test status | |
| Simulation time | 9315687852 ps |
| CPU time | 21.67 seconds |
| Started | Sep 24 09:15:47 AM UTC 24 |
| Finished | Sep 24 09:16:11 AM UTC 24 |
| Peak memory | 232504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=228909924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_pkt_buffer.228909924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_received.635893389 |
| Short name | T2058 |
| Test name | |
| Test status | |
| Simulation time | 173874391 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:15:47 AM UTC 24 |
| Finished | Sep 24 09:15:50 AM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=635893389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_pkt_received.635893389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_sent.629343099 |
| Short name | T2060 |
| Test name | |
| Test status | |
| Simulation time | 207987319 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:15:47 AM UTC 24 |
| Finished | Sep 24 09:15:50 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=629343099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_pkt_sent.629343099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_in_transaction.2065025155 |
| Short name | T2061 |
| Test name | |
| Test status | |
| Simulation time | 243370076 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:15:47 AM UTC 24 |
| Finished | Sep 24 09:15:50 AM UTC 24 |
| Peak memory | 215568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2065025155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_random_length_in_transaction.2065025155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_out_transaction.106615935 |
| Short name | T2062 |
| Test name | |
| Test status | |
| Simulation time | 245338455 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:15:47 AM UTC 24 |
| Finished | Sep 24 09:15:50 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=106615935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 28.usbdev_random_length_out_transaction.106615935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_rx_crc_err.2077055972 |
| Short name | T2067 |
| Test name | |
| Test status | |
| Simulation time | 171152038 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:15:47 AM UTC 24 |
| Finished | Sep 24 09:15:50 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2077055972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_rx_crc_err.2077055972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_rx_full.1834968287 |
| Short name | T2068 |
| Test name | |
| Test status | |
| Simulation time | 356960937 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:15:47 AM UTC 24 |
| Finished | Sep 24 09:15:51 AM UTC 24 |
| Peak memory | 215588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1834968287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_rx_full.1834968287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_setup_stage.926366873 |
| Short name | T2065 |
| Test name | |
| Test status | |
| Simulation time | 149394240 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 09:15:47 AM UTC 24 |
| Finished | Sep 24 09:15:50 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=926366873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_setup_stage.926366873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_setup_trans_ignored.3328092777 |
| Short name | T2063 |
| Test name | |
| Test status | |
| Simulation time | 159501433 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:15:47 AM UTC 24 |
| Finished | Sep 24 09:15:50 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3328092777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 28.usbdev_setup_trans_ignored.3328092777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_smoke.3303618066 |
| Short name | T2064 |
| Test name | |
| Test status | |
| Simulation time | 234386544 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:15:47 AM UTC 24 |
| Finished | Sep 24 09:15:50 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3303618066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_smoke.3303618066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_spurious_pids_ignored.636532381 |
| Short name | T2161 |
| Test name | |
| Test status | |
| Simulation time | 2967007612 ps |
| CPU time | 73.63 seconds |
| Started | Sep 24 09:16:02 AM UTC 24 |
| Finished | Sep 24 09:17:18 AM UTC 24 |
| Peak memory | 230384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=636532381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_spurious_pids_ignored.636532381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_stall_priority_over_nak.3446746087 |
| Short name | T2077 |
| Test name | |
| Test status | |
| Simulation time | 229680898 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:16:02 AM UTC 24 |
| Finished | Sep 24 09:16:05 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3446746087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stall_priority_over_nak.3446746087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_stall_trans.3278767332 |
| Short name | T2079 |
| Test name | |
| Test status | |
| Simulation time | 205979984 ps |
| CPU time | 1.14 seconds |
| Started | Sep 24 09:16:02 AM UTC 24 |
| Finished | Sep 24 09:16:05 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3278767332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_stall_trans.3278767332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_stream_len_max.3339003291 |
| Short name | T2083 |
| Test name | |
| Test status | |
| Simulation time | 450080111 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:16:02 AM UTC 24 |
| Finished | Sep 24 09:16:05 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3339003291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stream_len_max.3339003291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_streaming_out.3258119970 |
| Short name | T304 |
| Test name | |
| Test status | |
| Simulation time | 2777843485 ps |
| CPU time | 67.6 seconds |
| Started | Sep 24 09:16:02 AM UTC 24 |
| Finished | Sep 24 09:17:12 AM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3258119970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_streaming_out.3258119970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_timeout_missing_host_handshake.38726935 |
| Short name | T2032 |
| Test name | |
| Test status | |
| Simulation time | 1993878939 ps |
| CPU time | 12.31 seconds |
| Started | Sep 24 09:15:21 AM UTC 24 |
| Finished | Sep 24 09:15:35 AM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=38726935 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_timeout_missing_host_handshake.38726935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/28.usbdev_tx_rx_disruption.704029933 |
| Short name | T187 |
| Test name | |
| Test status | |
| Simulation time | 613753714 ps |
| CPU time | 2.13 seconds |
| Started | Sep 24 09:16:02 AM UTC 24 |
| Finished | Sep 24 09:16:06 AM UTC 24 |
| Peak memory | 217664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=704029933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_tx _rx_disruption.704029933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/28.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/280.usbdev_tx_rx_disruption.2115644806 |
| Short name | T3579 |
| Test name | |
| Test status | |
| Simulation time | 598089813 ps |
| CPU time | 1.92 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2115644806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 280.usbdev_ tx_rx_disruption.2115644806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/280.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/281.usbdev_tx_rx_disruption.3454353925 |
| Short name | T3578 |
| Test name | |
| Test status | |
| Simulation time | 516058262 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3454353925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 281.usbdev_ tx_rx_disruption.3454353925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/281.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/282.usbdev_tx_rx_disruption.1480399826 |
| Short name | T3581 |
| Test name | |
| Test status | |
| Simulation time | 671886363 ps |
| CPU time | 2.02 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1480399826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 282.usbdev_ tx_rx_disruption.1480399826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/282.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/283.usbdev_tx_rx_disruption.3068707172 |
| Short name | T3577 |
| Test name | |
| Test status | |
| Simulation time | 501729093 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3068707172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 283.usbdev_ tx_rx_disruption.3068707172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/283.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/284.usbdev_tx_rx_disruption.165551433 |
| Short name | T3527 |
| Test name | |
| Test status | |
| Simulation time | 607373844 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=165551433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 284.usbdev_t x_rx_disruption.165551433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/284.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/285.usbdev_tx_rx_disruption.58104676 |
| Short name | T3586 |
| Test name | |
| Test status | |
| Simulation time | 488935448 ps |
| CPU time | 2.19 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=58104676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 285.usbdev_tx _rx_disruption.58104676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/285.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/286.usbdev_tx_rx_disruption.355798633 |
| Short name | T3520 |
| Test name | |
| Test status | |
| Simulation time | 529426413 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=355798633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 286.usbdev_t x_rx_disruption.355798633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/286.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/287.usbdev_tx_rx_disruption.2778455201 |
| Short name | T3582 |
| Test name | |
| Test status | |
| Simulation time | 662818345 ps |
| CPU time | 1.9 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:25 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2778455201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 287.usbdev_ tx_rx_disruption.2778455201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/287.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/288.usbdev_tx_rx_disruption.427031327 |
| Short name | T3584 |
| Test name | |
| Test status | |
| Simulation time | 540809805 ps |
| CPU time | 1.83 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=427031327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 288.usbdev_t x_rx_disruption.427031327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/288.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/289.usbdev_tx_rx_disruption.3964277645 |
| Short name | T3583 |
| Test name | |
| Test status | |
| Simulation time | 657261844 ps |
| CPU time | 2.03 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3964277645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 289.usbdev_ tx_rx_disruption.3964277645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/289.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_alert_test.2138521745 |
| Short name | T2128 |
| Test name | |
| Test status | |
| Simulation time | 41687525 ps |
| CPU time | 0.96 seconds |
| Started | Sep 24 09:16:36 AM UTC 24 |
| Finished | Sep 24 09:16:38 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2138521745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 29.usbdev_alert_test.2138521745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_disconnect.3649838153 |
| Short name | T2090 |
| Test name | |
| Test status | |
| Simulation time | 4233284178 ps |
| CPU time | 6.85 seconds |
| Started | Sep 24 09:16:02 AM UTC 24 |
| Finished | Sep 24 09:16:11 AM UTC 24 |
| Peak memory | 227736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3649838153 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_disconnect.3649838153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_reset.2681514447 |
| Short name | T2112 |
| Test name | |
| Test status | |
| Simulation time | 15301769034 ps |
| CPU time | 20.5 seconds |
| Started | Sep 24 09:16:02 AM UTC 24 |
| Finished | Sep 24 09:16:24 AM UTC 24 |
| Peak memory | 227992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2681514447 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_reset.2681514447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_resume.255017713 |
| Short name | T2133 |
| Test name | |
| Test status | |
| Simulation time | 29442481164 ps |
| CPU time | 34.32 seconds |
| Started | Sep 24 09:16:02 AM UTC 24 |
| Finished | Sep 24 09:16:38 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=255017713 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_resume.255017713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_av_buffer.3791005795 |
| Short name | T2080 |
| Test name | |
| Test status | |
| Simulation time | 151396421 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:16:03 AM UTC 24 |
| Finished | Sep 24 09:16:05 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3791005795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_av_buffer.3791005795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_bitstuff_err.1136504447 |
| Short name | T2082 |
| Test name | |
| Test status | |
| Simulation time | 136718536 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:16:03 AM UTC 24 |
| Finished | Sep 24 09:16:05 AM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1136504447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_bitstuff_err.1136504447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_clear.1937998690 |
| Short name | T2084 |
| Test name | |
| Test status | |
| Simulation time | 516453836 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:16:03 AM UTC 24 |
| Finished | Sep 24 09:16:06 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1937998690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 29.usbdev_data_toggle_clear.1937998690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_restore.1703453746 |
| Short name | T2088 |
| Test name | |
| Test status | |
| Simulation time | 1273450418 ps |
| CPU time | 3.64 seconds |
| Started | Sep 24 09:16:03 AM UTC 24 |
| Finished | Sep 24 09:16:08 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1703453746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_data_toggle_restore.1703453746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_device_address.2841486614 |
| Short name | T2015 |
| Test name | |
| Test status | |
| Simulation time | 32850853710 ps |
| CPU time | 55.34 seconds |
| Started | Sep 24 09:16:03 AM UTC 24 |
| Finished | Sep 24 09:17:00 AM UTC 24 |
| Peak memory | 218416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2841486614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_address.2841486614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_device_timeout.4178443844 |
| Short name | T2092 |
| Test name | |
| Test status | |
| Simulation time | 1532694955 ps |
| CPU time | 12.07 seconds |
| Started | Sep 24 09:16:03 AM UTC 24 |
| Finished | Sep 24 09:16:16 AM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4178443844 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_timeout.4178443844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_disable_endpoint.3612686634 |
| Short name | T2085 |
| Test name | |
| Test status | |
| Simulation time | 680630232 ps |
| CPU time | 1.85 seconds |
| Started | Sep 24 09:16:03 AM UTC 24 |
| Finished | Sep 24 09:16:06 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3612686634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_disable_endpoint.3612686634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_disconnected.2302130727 |
| Short name | T2081 |
| Test name | |
| Test status | |
| Simulation time | 154100498 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 09:16:03 AM UTC 24 |
| Finished | Sep 24 09:16:05 AM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2302130727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_disconnected.2302130727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_enable.1709504177 |
| Short name | T2076 |
| Test name | |
| Test status | |
| Simulation time | 66754032 ps |
| CPU time | 0.77 seconds |
| Started | Sep 24 09:16:03 AM UTC 24 |
| Finished | Sep 24 09:16:05 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1709504177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 29.usbdev_enable.1709504177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_access.3852727705 |
| Short name | T2087 |
| Test name | |
| Test status | |
| Simulation time | 841701355 ps |
| CPU time | 2.52 seconds |
| Started | Sep 24 09:16:03 AM UTC 24 |
| Finished | Sep 24 09:16:07 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3852727705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_access.3852727705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_types.1893581944 |
| Short name | T459 |
| Test name | |
| Test status | |
| Simulation time | 254831277 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:16:03 AM UTC 24 |
| Finished | Sep 24 09:16:05 AM UTC 24 |
| Peak memory | 215816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1893581944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_types.1893581944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_levels.534869637 |
| Short name | T392 |
| Test name | |
| Test status | |
| Simulation time | 255225757 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 09:16:19 AM UTC 24 |
| Finished | Sep 24 09:16:22 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=534869637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_fifo_levels.534869637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_rst.2894957917 |
| Short name | T2111 |
| Test name | |
| Test status | |
| Simulation time | 492441162 ps |
| CPU time | 3.12 seconds |
| Started | Sep 24 09:16:19 AM UTC 24 |
| Finished | Sep 24 09:16:23 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2894957917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_fifo_rst.2894957917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_in_iso.1081647385 |
| Short name | T2098 |
| Test name | |
| Test status | |
| Simulation time | 219939186 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 09:16:19 AM UTC 24 |
| Finished | Sep 24 09:16:21 AM UTC 24 |
| Peak memory | 226032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1081647385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_in_iso.1081647385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_in_stall.2093021929 |
| Short name | T2097 |
| Test name | |
| Test status | |
| Simulation time | 136780596 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:16:19 AM UTC 24 |
| Finished | Sep 24 09:16:21 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2093021929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_stall.2093021929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_in_trans.3746287807 |
| Short name | T2096 |
| Test name | |
| Test status | |
| Simulation time | 217253502 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:16:19 AM UTC 24 |
| Finished | Sep 24 09:16:21 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3746287807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_trans.3746287807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_invalid_sync.1676013893 |
| Short name | T2237 |
| Test name | |
| Test status | |
| Simulation time | 4031658430 ps |
| CPU time | 100.95 seconds |
| Started | Sep 24 09:16:19 AM UTC 24 |
| Finished | Sep 24 09:18:02 AM UTC 24 |
| Peak memory | 230700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1676013893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 29.usbdev_invalid_sync.1676013893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_iso_retraction.2127994786 |
| Short name | T2258 |
| Test name | |
| Test status | |
| Simulation time | 11788362591 ps |
| CPU time | 126.24 seconds |
| Started | Sep 24 09:16:19 AM UTC 24 |
| Finished | Sep 24 09:18:28 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2127994786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_iso_retraction.2127994786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_link_in_err.480673133 |
| Short name | T2099 |
| Test name | |
| Test status | |
| Simulation time | 190848265 ps |
| CPU time | 1.28 seconds |
| Started | Sep 24 09:16:19 AM UTC 24 |
| Finished | Sep 24 09:16:22 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=480673133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_link_in_err.480673133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_link_resume.2649724780 |
| Short name | T2145 |
| Test name | |
| Test status | |
| Simulation time | 23392568258 ps |
| CPU time | 36.81 seconds |
| Started | Sep 24 09:16:19 AM UTC 24 |
| Finished | Sep 24 09:16:58 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2649724780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_resume.2649724780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_link_suspend.1394210128 |
| Short name | T2114 |
| Test name | |
| Test status | |
| Simulation time | 9920390432 ps |
| CPU time | 13.67 seconds |
| Started | Sep 24 09:16:19 AM UTC 24 |
| Finished | Sep 24 09:16:34 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1394210128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_link_suspend.1394210128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_low_speed_traffic.2024793297 |
| Short name | T2157 |
| Test name | |
| Test status | |
| Simulation time | 4954169088 ps |
| CPU time | 45.91 seconds |
| Started | Sep 24 09:16:19 AM UTC 24 |
| Finished | Sep 24 09:17:07 AM UTC 24 |
| Peak memory | 234984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2024793297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_low_speed_traffic.2024793297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_max_inter_pkt_delay.2789890159 |
| Short name | T2186 |
| Test name | |
| Test status | |
| Simulation time | 2641535992 ps |
| CPU time | 67.29 seconds |
| Started | Sep 24 09:16:19 AM UTC 24 |
| Finished | Sep 24 09:17:28 AM UTC 24 |
| Peak memory | 228676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2789890159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_inter_pkt_delay.2789890159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_in_transaction.519149279 |
| Short name | T2103 |
| Test name | |
| Test status | |
| Simulation time | 256735776 ps |
| CPU time | 1.2 seconds |
| Started | Sep 24 09:16:19 AM UTC 24 |
| Finished | Sep 24 09:16:22 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=519149279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_in_transaction.519149279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_out_transaction.2092439801 |
| Short name | T2102 |
| Test name | |
| Test status | |
| Simulation time | 193751900 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:16:20 AM UTC 24 |
| Finished | Sep 24 09:16:22 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2092439801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_out_transaction.2092439801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_min_inter_pkt_delay.2950357910 |
| Short name | T2137 |
| Test name | |
| Test status | |
| Simulation time | 2521861715 ps |
| CPU time | 22.82 seconds |
| Started | Sep 24 09:16:20 AM UTC 24 |
| Finished | Sep 24 09:16:44 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2950357910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_inter_pkt_delay.2950357910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_in_transaction.3505481893 |
| Short name | T2101 |
| Test name | |
| Test status | |
| Simulation time | 154647584 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:16:20 AM UTC 24 |
| Finished | Sep 24 09:16:22 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3505481893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_in_transaction.3505481893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_out_transaction.3146667675 |
| Short name | T2108 |
| Test name | |
| Test status | |
| Simulation time | 142613651 ps |
| CPU time | 1.23 seconds |
| Started | Sep 24 09:16:20 AM UTC 24 |
| Finished | Sep 24 09:16:22 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3146667675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_out_transaction.3146667675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_nak_trans.1827036087 |
| Short name | T139 |
| Test name | |
| Test status | |
| Simulation time | 217808435 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:16:20 AM UTC 24 |
| Finished | Sep 24 09:16:22 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1827036087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_nak_trans.1827036087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_out_iso.2671075788 |
| Short name | T2105 |
| Test name | |
| Test status | |
| Simulation time | 161162819 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:16:20 AM UTC 24 |
| Finished | Sep 24 09:16:22 AM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2671075788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_out_iso.2671075788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_out_stall.1122419449 |
| Short name | T2107 |
| Test name | |
| Test status | |
| Simulation time | 182040459 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:16:20 AM UTC 24 |
| Finished | Sep 24 09:16:22 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1122419449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_out_stall.1122419449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_out_trans_nak.4003970819 |
| Short name | T2104 |
| Test name | |
| Test status | |
| Simulation time | 215101227 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:16:20 AM UTC 24 |
| Finished | Sep 24 09:16:22 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4003970819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_out_trans_nak.4003970819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_pending_in_trans.2378971765 |
| Short name | T2109 |
| Test name | |
| Test status | |
| Simulation time | 187498860 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:16:20 AM UTC 24 |
| Finished | Sep 24 09:16:22 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2378971765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_pending_in_trans.2378971765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_pinflip.1428188267 |
| Short name | T2110 |
| Test name | |
| Test status | |
| Simulation time | 185294347 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:16:20 AM UTC 24 |
| Finished | Sep 24 09:16:22 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1428188267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_pinflip.1428188267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_usb_ref_disable.116110556 |
| Short name | T2106 |
| Test name | |
| Test status | |
| Simulation time | 153136020 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:16:20 AM UTC 24 |
| Finished | Sep 24 09:16:22 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=116110556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 29.usbdev_phy_config_usb_ref_disable.116110556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_phy_pins_sense.2676699937 |
| Short name | T2115 |
| Test name | |
| Test status | |
| Simulation time | 39640350 ps |
| CPU time | 0.75 seconds |
| Started | Sep 24 09:16:35 AM UTC 24 |
| Finished | Sep 24 09:16:37 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2676699937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_pins_sense.2676699937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_buffer.1983051098 |
| Short name | T2124 |
| Test name | |
| Test status | |
| Simulation time | 7669995605 ps |
| CPU time | 19.8 seconds |
| Started | Sep 24 09:16:35 AM UTC 24 |
| Finished | Sep 24 09:16:56 AM UTC 24 |
| Peak memory | 228528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1983051098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_pkt_buffer.1983051098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_received.1202382375 |
| Short name | T2116 |
| Test name | |
| Test status | |
| Simulation time | 152608596 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:16:35 AM UTC 24 |
| Finished | Sep 24 09:16:37 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1202382375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_pkt_received.1202382375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_sent.1466828690 |
| Short name | T2121 |
| Test name | |
| Test status | |
| Simulation time | 270000893 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:16:35 AM UTC 24 |
| Finished | Sep 24 09:16:37 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1466828690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_pkt_sent.1466828690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_in_transaction.4206981992 |
| Short name | T2125 |
| Test name | |
| Test status | |
| Simulation time | 210336939 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 09:16:35 AM UTC 24 |
| Finished | Sep 24 09:16:38 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4206981992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_random_length_in_transaction.4206981992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_out_transaction.3826429938 |
| Short name | T2130 |
| Test name | |
| Test status | |
| Simulation time | 195968273 ps |
| CPU time | 1.47 seconds |
| Started | Sep 24 09:16:35 AM UTC 24 |
| Finished | Sep 24 09:16:38 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3826429938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_random_length_out_transaction.3826429938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_rx_crc_err.1442377356 |
| Short name | T2126 |
| Test name | |
| Test status | |
| Simulation time | 207406046 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:16:35 AM UTC 24 |
| Finished | Sep 24 09:16:38 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1442377356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_rx_crc_err.1442377356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_rx_full.2232913495 |
| Short name | T2132 |
| Test name | |
| Test status | |
| Simulation time | 358236558 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:16:35 AM UTC 24 |
| Finished | Sep 24 09:16:38 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2232913495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_rx_full.2232913495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_setup_stage.602542404 |
| Short name | T2117 |
| Test name | |
| Test status | |
| Simulation time | 155002592 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:16:35 AM UTC 24 |
| Finished | Sep 24 09:16:37 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=602542404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_setup_stage.602542404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_setup_trans_ignored.3544167026 |
| Short name | T2129 |
| Test name | |
| Test status | |
| Simulation time | 159432128 ps |
| CPU time | 1.4 seconds |
| Started | Sep 24 09:16:35 AM UTC 24 |
| Finished | Sep 24 09:16:38 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3544167026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 29.usbdev_setup_trans_ignored.3544167026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_smoke.3704907271 |
| Short name | T2127 |
| Test name | |
| Test status | |
| Simulation time | 197663123 ps |
| CPU time | 1.3 seconds |
| Started | Sep 24 09:16:35 AM UTC 24 |
| Finished | Sep 24 09:16:38 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3704907271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_smoke.3704907271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_spurious_pids_ignored.925809401 |
| Short name | T2184 |
| Test name | |
| Test status | |
| Simulation time | 2041408916 ps |
| CPU time | 50.06 seconds |
| Started | Sep 24 09:16:35 AM UTC 24 |
| Finished | Sep 24 09:17:27 AM UTC 24 |
| Peak memory | 228276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=925809401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_spurious_pids_ignored.925809401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_stall_priority_over_nak.107002205 |
| Short name | T2123 |
| Test name | |
| Test status | |
| Simulation time | 166804595 ps |
| CPU time | 0.94 seconds |
| Started | Sep 24 09:16:35 AM UTC 24 |
| Finished | Sep 24 09:16:37 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=107002205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stall_priority_over_nak.107002205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_stall_trans.4010174067 |
| Short name | T2131 |
| Test name | |
| Test status | |
| Simulation time | 152167040 ps |
| CPU time | 1.31 seconds |
| Started | Sep 24 09:16:35 AM UTC 24 |
| Finished | Sep 24 09:16:38 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4010174067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_stall_trans.4010174067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_stream_len_max.108688294 |
| Short name | T2136 |
| Test name | |
| Test status | |
| Simulation time | 1274583123 ps |
| CPU time | 3.48 seconds |
| Started | Sep 24 09:16:36 AM UTC 24 |
| Finished | Sep 24 09:16:40 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=108688294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_stream_len_max.108688294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_streaming_out.4261495638 |
| Short name | T2182 |
| Test name | |
| Test status | |
| Simulation time | 1902015942 ps |
| CPU time | 48.01 seconds |
| Started | Sep 24 09:16:36 AM UTC 24 |
| Finished | Sep 24 09:17:25 AM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4261495638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_streaming_out.4261495638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_timeout_missing_host_handshake.2753173457 |
| Short name | T2078 |
| Test name | |
| Test status | |
| Simulation time | 180648933 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:16:03 AM UTC 24 |
| Finished | Sep 24 09:16:05 AM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2753173457 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_timeout_missing_host_handshake.2753173457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/29.usbdev_tx_rx_disruption.212442083 |
| Short name | T2134 |
| Test name | |
| Test status | |
| Simulation time | 495124148 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:16:36 AM UTC 24 |
| Finished | Sep 24 09:16:38 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=212442083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_tx _rx_disruption.212442083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/29.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/290.usbdev_tx_rx_disruption.2078634291 |
| Short name | T3592 |
| Test name | |
| Test status | |
| Simulation time | 684165794 ps |
| CPU time | 1.99 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2078634291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 290.usbdev_ tx_rx_disruption.2078634291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/290.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/291.usbdev_tx_rx_disruption.2049895219 |
| Short name | T3594 |
| Test name | |
| Test status | |
| Simulation time | 641836138 ps |
| CPU time | 1.97 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2049895219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 291.usbdev_ tx_rx_disruption.2049895219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/291.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/292.usbdev_tx_rx_disruption.2350271913 |
| Short name | T3591 |
| Test name | |
| Test status | |
| Simulation time | 519132981 ps |
| CPU time | 1.99 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2350271913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 292.usbdev_ tx_rx_disruption.2350271913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/292.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/293.usbdev_tx_rx_disruption.3728751966 |
| Short name | T3588 |
| Test name | |
| Test status | |
| Simulation time | 603532559 ps |
| CPU time | 1.85 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3728751966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 293.usbdev_ tx_rx_disruption.3728751966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/293.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/294.usbdev_tx_rx_disruption.1222770834 |
| Short name | T3590 |
| Test name | |
| Test status | |
| Simulation time | 568418458 ps |
| CPU time | 1.94 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1222770834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 294.usbdev_ tx_rx_disruption.1222770834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/294.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/296.usbdev_tx_rx_disruption.1557091590 |
| Short name | T3593 |
| Test name | |
| Test status | |
| Simulation time | 451911875 ps |
| CPU time | 1.87 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1557091590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 296.usbdev_ tx_rx_disruption.1557091590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/296.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/297.usbdev_tx_rx_disruption.3384379735 |
| Short name | T3589 |
| Test name | |
| Test status | |
| Simulation time | 501685819 ps |
| CPU time | 1.79 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3384379735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 297.usbdev_ tx_rx_disruption.3384379735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/297.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/298.usbdev_tx_rx_disruption.407830207 |
| Short name | T3602 |
| Test name | |
| Test status | |
| Simulation time | 596794561 ps |
| CPU time | 2 seconds |
| Started | Sep 24 09:44:22 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 217840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=407830207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 298.usbdev_t x_rx_disruption.407830207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/298.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/299.usbdev_tx_rx_disruption.2234197536 |
| Short name | T3600 |
| Test name | |
| Test status | |
| Simulation time | 641724480 ps |
| CPU time | 1.99 seconds |
| Started | Sep 24 09:44:23 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2234197536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 299.usbdev_ tx_rx_disruption.2234197536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/299.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_alert_test.2261768416 |
| Short name | T691 |
| Test name | |
| Test status | |
| Simulation time | 37158751 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 08:58:56 AM UTC 24 |
| Finished | Sep 24 08:58:58 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2261768416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 3.usbdev_alert_test.2261768416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_disconnect.4000217215 |
| Short name | T16 |
| Test name | |
| Test status | |
| Simulation time | 11544519248 ps |
| CPU time | 27.48 seconds |
| Started | Sep 24 08:57:12 AM UTC 24 |
| Finished | Sep 24 08:57:41 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4000217215 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_disconnect.4000217215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_reset.756472703 |
| Short name | T666 |
| Test name | |
| Test status | |
| Simulation time | 20946831091 ps |
| CPU time | 63.39 seconds |
| Started | Sep 24 08:57:13 AM UTC 24 |
| Finished | Sep 24 08:58:19 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=756472703 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_reset.756472703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_resume.1695333687 |
| Short name | T667 |
| Test name | |
| Test status | |
| Simulation time | 26376513835 ps |
| CPU time | 61.66 seconds |
| Started | Sep 24 08:57:16 AM UTC 24 |
| Finished | Sep 24 08:58:19 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1695333687 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_resume.1695333687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_av_buffer.1323064472 |
| Short name | T643 |
| Test name | |
| Test status | |
| Simulation time | 182126290 ps |
| CPU time | 1.78 seconds |
| Started | Sep 24 08:57:17 AM UTC 24 |
| Finished | Sep 24 08:57:20 AM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1323064472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_av_buffer.1323064472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_av_empty.2698059803 |
| Short name | T54 |
| Test name | |
| Test status | |
| Simulation time | 220044430 ps |
| CPU time | 1.85 seconds |
| Started | Sep 24 08:57:17 AM UTC 24 |
| Finished | Sep 24 08:57:20 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2698059803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_av_empty.2698059803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_av_overflow.3649522893 |
| Short name | T644 |
| Test name | |
| Test status | |
| Simulation time | 140638582 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 08:57:18 AM UTC 24 |
| Finished | Sep 24 08:57:21 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3649522893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_av_overflow.3649522893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_bitstuff_err.1571945942 |
| Short name | T645 |
| Test name | |
| Test status | |
| Simulation time | 146538653 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 08:57:20 AM UTC 24 |
| Finished | Sep 24 08:57:23 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1571945942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_bitstuff_err.1571945942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_clear.3426363870 |
| Short name | T646 |
| Test name | |
| Test status | |
| Simulation time | 437837870 ps |
| CPU time | 2.63 seconds |
| Started | Sep 24 08:57:20 AM UTC 24 |
| Finished | Sep 24 08:57:24 AM UTC 24 |
| Peak memory | 217700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3426363870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 3.usbdev_data_toggle_clear.3426363870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_restore.3729847129 |
| Short name | T447 |
| Test name | |
| Test status | |
| Simulation time | 376383020 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 08:57:21 AM UTC 24 |
| Finished | Sep 24 08:57:24 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3729847129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_restore.3729847129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_device_timeout.1912006354 |
| Short name | T655 |
| Test name | |
| Test status | |
| Simulation time | 2036990561 ps |
| CPU time | 25.44 seconds |
| Started | Sep 24 08:57:25 AM UTC 24 |
| Finished | Sep 24 08:57:52 AM UTC 24 |
| Peak memory | 217912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1912006354 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_timeout.1912006354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_disable_endpoint.4252291461 |
| Short name | T458 |
| Test name | |
| Test status | |
| Simulation time | 783317361 ps |
| CPU time | 3.79 seconds |
| Started | Sep 24 08:57:25 AM UTC 24 |
| Finished | Sep 24 08:57:30 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4252291461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_disable_endpoint.4252291461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_disconnected.3678889460 |
| Short name | T647 |
| Test name | |
| Test status | |
| Simulation time | 164022020 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 08:57:31 AM UTC 24 |
| Finished | Sep 24 08:57:34 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3678889460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_disconnected.3678889460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_enable.2700049172 |
| Short name | T649 |
| Test name | |
| Test status | |
| Simulation time | 33661241 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 08:57:33 AM UTC 24 |
| Finished | Sep 24 08:57:35 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2700049172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 3.usbdev_enable.2700049172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_access.1729153917 |
| Short name | T651 |
| Test name | |
| Test status | |
| Simulation time | 762913198 ps |
| CPU time | 4.46 seconds |
| Started | Sep 24 08:57:35 AM UTC 24 |
| Finished | Sep 24 08:57:41 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1729153917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_access.1729153917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_types.835493779 |
| Short name | T463 |
| Test name | |
| Test status | |
| Simulation time | 632394238 ps |
| CPU time | 3.31 seconds |
| Started | Sep 24 08:57:35 AM UTC 24 |
| Finished | Sep 24 08:57:39 AM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=835493779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_types.835493779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_rst.2989876053 |
| Short name | T376 |
| Test name | |
| Test status | |
| Simulation time | 318583027 ps |
| CPU time | 3.5 seconds |
| Started | Sep 24 08:57:36 AM UTC 24 |
| Finished | Sep 24 08:57:41 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2989876053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_fifo_rst.2989876053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk.2179518670 |
| Short name | T810 |
| Test name | |
| Test status | |
| Simulation time | 95211626516 ps |
| CPU time | 216.28 seconds |
| Started | Sep 24 08:57:37 AM UTC 24 |
| Finished | Sep 24 09:01:17 AM UTC 24 |
| Peak memory | 218496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2179518670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_hiclk.2179518670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk_max.3957946955 |
| Short name | T835 |
| Test name | |
| Test status | |
| Simulation time | 106164171737 ps |
| CPU time | 242.14 seconds |
| Started | Sep 24 08:57:40 AM UTC 24 |
| Finished | Sep 24 09:01:46 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3957946955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_hiclk_max.3957946955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk.1815543376 |
| Short name | T836 |
| Test name | |
| Test status | |
| Simulation time | 103105196118 ps |
| CPU time | 242.31 seconds |
| Started | Sep 24 08:57:41 AM UTC 24 |
| Finished | Sep 24 09:01:47 AM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1815543376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_loclk.1815543376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk_max.1697268171 |
| Short name | T798 |
| Test name | |
| Test status | |
| Simulation time | 88226873765 ps |
| CPU time | 199.52 seconds |
| Started | Sep 24 08:57:42 AM UTC 24 |
| Finished | Sep 24 09:01:05 AM UTC 24 |
| Peak memory | 218148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1697268171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_loclk_max.1697268171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_freq_phase.1081771436 |
| Short name | T850 |
| Test name | |
| Test status | |
| Simulation time | 106120014295 ps |
| CPU time | 251.47 seconds |
| Started | Sep 24 08:57:42 AM UTC 24 |
| Finished | Sep 24 09:01:57 AM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1081771436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_freq_phase.1081771436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_in_iso.1345832068 |
| Short name | T652 |
| Test name | |
| Test status | |
| Simulation time | 177664492 ps |
| CPU time | 1.75 seconds |
| Started | Sep 24 08:57:43 AM UTC 24 |
| Finished | Sep 24 08:57:46 AM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1345832068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_in_iso.1345832068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_in_stall.3304396919 |
| Short name | T653 |
| Test name | |
| Test status | |
| Simulation time | 138384357 ps |
| CPU time | 1.74 seconds |
| Started | Sep 24 08:57:47 AM UTC 24 |
| Finished | Sep 24 08:57:50 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3304396919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_in_stall.3304396919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_in_trans.840604918 |
| Short name | T654 |
| Test name | |
| Test status | |
| Simulation time | 222690552 ps |
| CPU time | 1.81 seconds |
| Started | Sep 24 08:57:48 AM UTC 24 |
| Finished | Sep 24 08:57:51 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=840604918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_in_trans.840604918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_invalid_sync.2477206406 |
| Short name | T680 |
| Test name | |
| Test status | |
| Simulation time | 4712588575 ps |
| CPU time | 59.64 seconds |
| Started | Sep 24 08:57:43 AM UTC 24 |
| Finished | Sep 24 08:58:45 AM UTC 24 |
| Peak memory | 230400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2477206406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 3.usbdev_invalid_sync.2477206406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_iso_retraction.894415090 |
| Short name | T689 |
| Test name | |
| Test status | |
| Simulation time | 7538257315 ps |
| CPU time | 62.25 seconds |
| Started | Sep 24 08:57:51 AM UTC 24 |
| Finished | Sep 24 08:58:54 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=894415090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 3.usbdev_iso_retraction.894415090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_link_in_err.1712812224 |
| Short name | T657 |
| Test name | |
| Test status | |
| Simulation time | 209623633 ps |
| CPU time | 1.81 seconds |
| Started | Sep 24 08:57:52 AM UTC 24 |
| Finished | Sep 24 08:57:54 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1712812224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_in_err.1712812224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_link_resume.1482608631 |
| Short name | T104 |
| Test name | |
| Test status | |
| Simulation time | 32934603165 ps |
| CPU time | 69.28 seconds |
| Started | Sep 24 08:57:53 AM UTC 24 |
| Finished | Sep 24 08:59:04 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1482608631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_resume.1482608631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_link_suspend.2114095677 |
| Short name | T663 |
| Test name | |
| Test status | |
| Simulation time | 6186444323 ps |
| CPU time | 21.41 seconds |
| Started | Sep 24 08:57:53 AM UTC 24 |
| Finished | Sep 24 08:58:16 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2114095677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_link_suspend.2114095677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_low_speed_traffic.2583813552 |
| Short name | T466 |
| Test name | |
| Test status | |
| Simulation time | 5187881552 ps |
| CPU time | 63.14 seconds |
| Started | Sep 24 08:57:54 AM UTC 24 |
| Finished | Sep 24 08:58:59 AM UTC 24 |
| Peak memory | 230404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2583813552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_low_speed_traffic.2583813552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_max_inter_pkt_delay.1261915899 |
| Short name | T708 |
| Test name | |
| Test status | |
| Simulation time | 2219328047 ps |
| CPU time | 81.09 seconds |
| Started | Sep 24 08:57:55 AM UTC 24 |
| Finished | Sep 24 08:59:18 AM UTC 24 |
| Peak memory | 228660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1261915899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_inter_pkt_delay.1261915899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_in_transaction.3251965347 |
| Short name | T661 |
| Test name | |
| Test status | |
| Simulation time | 248210559 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 08:58:10 AM UTC 24 |
| Finished | Sep 24 08:58:13 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3251965347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_in_transaction.3251965347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_out_transaction.3119663235 |
| Short name | T662 |
| Test name | |
| Test status | |
| Simulation time | 208621799 ps |
| CPU time | 1.97 seconds |
| Started | Sep 24 08:58:11 AM UTC 24 |
| Finished | Sep 24 08:58:14 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3119663235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_out_transaction.3119663235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_max_non_iso_usb_traffic.3421912706 |
| Short name | T694 |
| Test name | |
| Test status | |
| Simulation time | 3732953705 ps |
| CPU time | 48.69 seconds |
| Started | Sep 24 08:58:13 AM UTC 24 |
| Finished | Sep 24 08:59:03 AM UTC 24 |
| Peak memory | 230836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3421912706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_non_iso_usb_traffic.3421912706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_max_usb_traffic.352203803 |
| Short name | T692 |
| Test name | |
| Test status | |
| Simulation time | 3348123832 ps |
| CPU time | 41.41 seconds |
| Started | Sep 24 08:58:15 AM UTC 24 |
| Finished | Sep 24 08:58:58 AM UTC 24 |
| Peak memory | 235156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=352203803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_usb_traffic.352203803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_min_inter_pkt_delay.596455938 |
| Short name | T681 |
| Test name | |
| Test status | |
| Simulation time | 2001737502 ps |
| CPU time | 28.91 seconds |
| Started | Sep 24 08:58:15 AM UTC 24 |
| Finished | Sep 24 08:58:46 AM UTC 24 |
| Peak memory | 228228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=596455938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_inter_pkt_delay.596455938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_in_transaction.1056396856 |
| Short name | T665 |
| Test name | |
| Test status | |
| Simulation time | 154653032 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 08:58:15 AM UTC 24 |
| Finished | Sep 24 08:58:18 AM UTC 24 |
| Peak memory | 215604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1056396856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_in_transaction.1056396856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_out_transaction.357493717 |
| Short name | T664 |
| Test name | |
| Test status | |
| Simulation time | 167201195 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 08:58:15 AM UTC 24 |
| Finished | Sep 24 08:58:18 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=357493717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 3.usbdev_min_length_out_transaction.357493717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_nak_trans.1175632867 |
| Short name | T156 |
| Test name | |
| Test status | |
| Simulation time | 198877521 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 08:58:16 AM UTC 24 |
| Finished | Sep 24 08:58:19 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1175632867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_nak_trans.1175632867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_out_iso.3138176464 |
| Short name | T639 |
| Test name | |
| Test status | |
| Simulation time | 198735784 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 08:58:18 AM UTC 24 |
| Finished | Sep 24 08:58:21 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3138176464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_out_iso.3138176464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_out_stall.47747342 |
| Short name | T668 |
| Test name | |
| Test status | |
| Simulation time | 196509557 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 08:58:18 AM UTC 24 |
| Finished | Sep 24 08:58:21 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=47747342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_out_stall.47747342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_out_trans_nak.996667736 |
| Short name | T438 |
| Test name | |
| Test status | |
| Simulation time | 197418095 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 08:58:20 AM UTC 24 |
| Finished | Sep 24 08:58:22 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=996667736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_out_trans_nak.996667736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_pending_in_trans.2764832711 |
| Short name | T186 |
| Test name | |
| Test status | |
| Simulation time | 153459219 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 08:58:20 AM UTC 24 |
| Finished | Sep 24 08:58:22 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2764832711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_pending_in_trans.2764832711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_pinflip.4074184828 |
| Short name | T669 |
| Test name | |
| Test status | |
| Simulation time | 237138629 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 08:58:20 AM UTC 24 |
| Finished | Sep 24 08:58:22 AM UTC 24 |
| Peak memory | 215812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4074184828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_pinflip.4074184828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_rand_bus_type.1622582248 |
| Short name | T671 |
| Test name | |
| Test status | |
| Simulation time | 221165859 ps |
| CPU time | 1.88 seconds |
| Started | Sep 24 08:58:22 AM UTC 24 |
| Finished | Sep 24 08:58:25 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1622582248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 3.usbdev_phy_config_rand_bus_type.1622582248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_usb_ref_disable.2558983278 |
| Short name | T670 |
| Test name | |
| Test status | |
| Simulation time | 148811823 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 08:58:22 AM UTC 24 |
| Finished | Sep 24 08:58:25 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2558983278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_usb_ref_disable.2558983278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_phy_pins_sense.1751121544 |
| Short name | T44 |
| Test name | |
| Test status | |
| Simulation time | 39184433 ps |
| CPU time | 1.25 seconds |
| Started | Sep 24 08:58:23 AM UTC 24 |
| Finished | Sep 24 08:58:25 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1751121544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_pins_sense.1751121544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_buffer.3698966699 |
| Short name | T287 |
| Test name | |
| Test status | |
| Simulation time | 22374669170 ps |
| CPU time | 71.76 seconds |
| Started | Sep 24 08:58:23 AM UTC 24 |
| Finished | Sep 24 08:59:37 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3698966699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_pkt_buffer.3698966699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_received.790014330 |
| Short name | T672 |
| Test name | |
| Test status | |
| Simulation time | 177499325 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 08:58:23 AM UTC 24 |
| Finished | Sep 24 08:58:26 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=790014330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_pkt_received.790014330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_sent.1539476735 |
| Short name | T673 |
| Test name | |
| Test status | |
| Simulation time | 240745513 ps |
| CPU time | 1.33 seconds |
| Started | Sep 24 08:58:26 AM UTC 24 |
| Finished | Sep 24 08:58:28 AM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1539476735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_pkt_sent.1539476735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_disconnects.3147646745 |
| Short name | T706 |
| Test name | |
| Test status | |
| Simulation time | 6137868939 ps |
| CPU time | 47.29 seconds |
| Started | Sep 24 08:58:26 AM UTC 24 |
| Finished | Sep 24 08:59:15 AM UTC 24 |
| Peak memory | 235216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3147646745 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_disconnects.3147646745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_resets.2501675728 |
| Short name | T701 |
| Test name | |
| Test status | |
| Simulation time | 6691901968 ps |
| CPU time | 41.08 seconds |
| Started | Sep 24 08:58:27 AM UTC 24 |
| Finished | Sep 24 08:59:10 AM UTC 24 |
| Peak memory | 235012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2501675728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_resets.2501675728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_rand_suspends.3960684215 |
| Short name | T754 |
| Test name | |
| Test status | |
| Simulation time | 6545984544 ps |
| CPU time | 96.23 seconds |
| Started | Sep 24 08:58:29 AM UTC 24 |
| Finished | Sep 24 09:00:08 AM UTC 24 |
| Peak memory | 230400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960684215 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_suspends.3960684215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_in_transaction.2481320161 |
| Short name | T675 |
| Test name | |
| Test status | |
| Simulation time | 239860868 ps |
| CPU time | 1.83 seconds |
| Started | Sep 24 08:58:26 AM UTC 24 |
| Finished | Sep 24 08:58:29 AM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2481320161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_random_length_in_transaction.2481320161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_out_transaction.3039871947 |
| Short name | T674 |
| Test name | |
| Test status | |
| Simulation time | 188919391 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 08:58:26 AM UTC 24 |
| Finished | Sep 24 08:58:29 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3039871947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_random_length_out_transaction.3039871947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_resume_link_active.4066857474 |
| Short name | T723 |
| Test name | |
| Test status | |
| Simulation time | 20157448459 ps |
| CPU time | 70.76 seconds |
| Started | Sep 24 08:58:30 AM UTC 24 |
| Finished | Sep 24 08:59:42 AM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4066857474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 3.usbdev_resume_link_active.4066857474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_rx_crc_err.450232941 |
| Short name | T676 |
| Test name | |
| Test status | |
| Simulation time | 141567353 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 08:58:30 AM UTC 24 |
| Finished | Sep 24 08:58:32 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=450232941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_rx_crc_err.450232941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_rx_pid_err.1370417369 |
| Short name | T677 |
| Test name | |
| Test status | |
| Simulation time | 160131932 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 08:58:37 AM UTC 24 |
| Finished | Sep 24 08:58:39 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1370417369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_pid_err.1370417369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_sec_cm.2564282448 |
| Short name | T220 |
| Test name | |
| Test status | |
| Simulation time | 240562182 ps |
| CPU time | 1.89 seconds |
| Started | Sep 24 08:58:56 AM UTC 24 |
| Finished | Sep 24 08:58:59 AM UTC 24 |
| Peak memory | 250624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2564282448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_sec_cm.2564282448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority.1201563356 |
| Short name | T679 |
| Test name | |
| Test status | |
| Simulation time | 434064493 ps |
| CPU time | 3.1 seconds |
| Started | Sep 24 08:58:39 AM UTC 24 |
| Finished | Sep 24 08:58:43 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1201563356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority.1201563356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority_over_stall_response.3532876271 |
| Short name | T174 |
| Test name | |
| Test status | |
| Simulation time | 211219587 ps |
| CPU time | 1.79 seconds |
| Started | Sep 24 08:58:41 AM UTC 24 |
| Finished | Sep 24 08:58:44 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3532876271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority_over_stall_response.3532876271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_setup_stage.1664673582 |
| Short name | T683 |
| Test name | |
| Test status | |
| Simulation time | 161171423 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 08:58:45 AM UTC 24 |
| Finished | Sep 24 08:58:48 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1664673582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_setup_stage.1664673582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_setup_trans_ignored.1258601235 |
| Short name | T682 |
| Test name | |
| Test status | |
| Simulation time | 151315146 ps |
| CPU time | 1.75 seconds |
| Started | Sep 24 08:58:45 AM UTC 24 |
| Finished | Sep 24 08:58:48 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1258601235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 3.usbdev_setup_trans_ignored.1258601235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_smoke.1238551418 |
| Short name | T684 |
| Test name | |
| Test status | |
| Simulation time | 230108900 ps |
| CPU time | 1.97 seconds |
| Started | Sep 24 08:58:45 AM UTC 24 |
| Finished | Sep 24 08:58:48 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1238551418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_smoke.1238551418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_spurious_pids_ignored.677204699 |
| Short name | T764 |
| Test name | |
| Test status | |
| Simulation time | 2865702617 ps |
| CPU time | 100.41 seconds |
| Started | Sep 24 08:58:45 AM UTC 24 |
| Finished | Sep 24 09:00:28 AM UTC 24 |
| Peak memory | 234936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=677204699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_spurious_pids_ignored.677204699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_stall_priority_over_nak.3108370689 |
| Short name | T686 |
| Test name | |
| Test status | |
| Simulation time | 220430097 ps |
| CPU time | 1.78 seconds |
| Started | Sep 24 08:58:46 AM UTC 24 |
| Finished | Sep 24 08:58:49 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3108370689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stall_priority_over_nak.3108370689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_stall_trans.2837102446 |
| Short name | T685 |
| Test name | |
| Test status | |
| Simulation time | 141272193 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 08:58:46 AM UTC 24 |
| Finished | Sep 24 08:58:49 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2837102446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_stall_trans.2837102446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_stream_len_max.3526965490 |
| Short name | T690 |
| Test name | |
| Test status | |
| Simulation time | 1191173034 ps |
| CPU time | 5.92 seconds |
| Started | Sep 24 08:58:49 AM UTC 24 |
| Finished | Sep 24 08:58:56 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3526965490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stream_len_max.3526965490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_streaming_out.3943347779 |
| Short name | T716 |
| Test name | |
| Test status | |
| Simulation time | 3872138824 ps |
| CPU time | 42.45 seconds |
| Started | Sep 24 08:58:49 AM UTC 24 |
| Finished | Sep 24 08:59:33 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3943347779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_streaming_out.3943347779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_stress_usb_traffic.410498534 |
| Short name | T176 |
| Test name | |
| Test status | |
| Simulation time | 11496889043 ps |
| CPU time | 243.18 seconds |
| Started | Sep 24 08:58:50 AM UTC 24 |
| Finished | Sep 24 09:02:57 AM UTC 24 |
| Peak memory | 228396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=410498534 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_2 3/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stress_usb_traffic.410498534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_timeout_missing_host_handshake.1914262492 |
| Short name | T659 |
| Test name | |
| Test status | |
| Simulation time | 3866754461 ps |
| CPU time | 44.21 seconds |
| Started | Sep 24 08:57:25 AM UTC 24 |
| Finished | Sep 24 08:58:10 AM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1914262492 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_timeout_missing_host_handshake.1914262492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/3.usbdev_tx_rx_disruption.1585786726 |
| Short name | T688 |
| Test name | |
| Test status | |
| Simulation time | 587575611 ps |
| CPU time | 2.95 seconds |
| Started | Sep 24 08:58:50 AM UTC 24 |
| Finished | Sep 24 08:58:54 AM UTC 24 |
| Peak memory | 217832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1585786726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_tx _rx_disruption.1585786726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/3.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_alert_test.3016016300 |
| Short name | T2172 |
| Test name | |
| Test status | |
| Simulation time | 39443271 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 09:17:17 AM UTC 24 |
| Finished | Sep 24 09:17:19 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3016016300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 30.usbdev_alert_test.3016016300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_disconnect.480256748 |
| Short name | T2118 |
| Test name | |
| Test status | |
| Simulation time | 10900907466 ps |
| CPU time | 14.28 seconds |
| Started | Sep 24 09:16:36 AM UTC 24 |
| Finished | Sep 24 09:16:51 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=480256748 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_disconnect.480256748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_reset.1981584426 |
| Short name | T1947 |
| Test name | |
| Test status | |
| Simulation time | 20544474360 ps |
| CPU time | 25.7 seconds |
| Started | Sep 24 09:16:36 AM UTC 24 |
| Finished | Sep 24 09:17:03 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1981584426 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_reset.1981584426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_resume.3627161752 |
| Short name | T2177 |
| Test name | |
| Test status | |
| Simulation time | 29096746560 ps |
| CPU time | 42.17 seconds |
| Started | Sep 24 09:16:36 AM UTC 24 |
| Finished | Sep 24 09:17:19 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3627161752 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_resume.3627161752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_av_buffer.1676573838 |
| Short name | T2139 |
| Test name | |
| Test status | |
| Simulation time | 159333220 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:16:49 AM UTC 24 |
| Finished | Sep 24 09:16:51 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1676573838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_av_buffer.1676573838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_bitstuff_err.1962291342 |
| Short name | T2140 |
| Test name | |
| Test status | |
| Simulation time | 163758769 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:16:49 AM UTC 24 |
| Finished | Sep 24 09:16:51 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1962291342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_bitstuff_err.1962291342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_clear.4142786534 |
| Short name | T2142 |
| Test name | |
| Test status | |
| Simulation time | 242225572 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:16:49 AM UTC 24 |
| Finished | Sep 24 09:16:51 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4142786534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 30.usbdev_data_toggle_clear.4142786534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_restore.2659994931 |
| Short name | T2144 |
| Test name | |
| Test status | |
| Simulation time | 297878154 ps |
| CPU time | 1.75 seconds |
| Started | Sep 24 09:16:49 AM UTC 24 |
| Finished | Sep 24 09:16:52 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2659994931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_data_toggle_restore.2659994931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_device_address.3113034548 |
| Short name | T2210 |
| Test name | |
| Test status | |
| Simulation time | 43963536743 ps |
| CPU time | 64.46 seconds |
| Started | Sep 24 09:16:49 AM UTC 24 |
| Finished | Sep 24 09:17:55 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3113034548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_address.3113034548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_device_timeout.2137473668 |
| Short name | T2185 |
| Test name | |
| Test status | |
| Simulation time | 1817604960 ps |
| CPU time | 38.24 seconds |
| Started | Sep 24 09:16:49 AM UTC 24 |
| Finished | Sep 24 09:17:28 AM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2137473668 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_timeout.2137473668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_disable_endpoint.2492844947 |
| Short name | T2075 |
| Test name | |
| Test status | |
| Simulation time | 786741984 ps |
| CPU time | 2.11 seconds |
| Started | Sep 24 09:16:49 AM UTC 24 |
| Finished | Sep 24 09:16:52 AM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2492844947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_disable_endpoint.2492844947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_disconnected.112482875 |
| Short name | T2143 |
| Test name | |
| Test status | |
| Simulation time | 138036374 ps |
| CPU time | 1.33 seconds |
| Started | Sep 24 09:16:49 AM UTC 24 |
| Finished | Sep 24 09:16:51 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=112482875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_disconnected.112482875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_enable.2065198225 |
| Short name | T2141 |
| Test name | |
| Test status | |
| Simulation time | 32034489 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:16:49 AM UTC 24 |
| Finished | Sep 24 09:16:51 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2065198225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 30.usbdev_enable.2065198225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_access.3781366516 |
| Short name | T2120 |
| Test name | |
| Test status | |
| Simulation time | 946487478 ps |
| CPU time | 2.85 seconds |
| Started | Sep 24 09:16:49 AM UTC 24 |
| Finished | Sep 24 09:16:53 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3781366516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_access.3781366516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_types.1379786205 |
| Short name | T562 |
| Test name | |
| Test status | |
| Simulation time | 542569801 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:16:49 AM UTC 24 |
| Finished | Sep 24 09:16:52 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379786205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_types.1379786205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_levels.3091196290 |
| Short name | T2119 |
| Test name | |
| Test status | |
| Simulation time | 273487567 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 09:16:49 AM UTC 24 |
| Finished | Sep 24 09:16:52 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3091196290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_fifo_levels.3091196290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_rst.3445867131 |
| Short name | T2100 |
| Test name | |
| Test status | |
| Simulation time | 287069794 ps |
| CPU time | 2.5 seconds |
| Started | Sep 24 09:16:49 AM UTC 24 |
| Finished | Sep 24 09:16:53 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3445867131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_fifo_rst.3445867131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_in_iso.313151891 |
| Short name | T2095 |
| Test name | |
| Test status | |
| Simulation time | 252875148 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:16:49 AM UTC 24 |
| Finished | Sep 24 09:16:52 AM UTC 24 |
| Peak memory | 225976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=313151891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_in_iso.313151891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_in_stall.282637042 |
| Short name | T2074 |
| Test name | |
| Test status | |
| Simulation time | 140057565 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:16:49 AM UTC 24 |
| Finished | Sep 24 09:16:52 AM UTC 24 |
| Peak memory | 215700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=282637042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_in_stall.282637042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_in_trans.1033466611 |
| Short name | T2072 |
| Test name | |
| Test status | |
| Simulation time | 247307877 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:16:49 AM UTC 24 |
| Finished | Sep 24 09:16:52 AM UTC 24 |
| Peak memory | 215640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1033466611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_in_trans.1033466611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_invalid_sync.1736579253 |
| Short name | T2234 |
| Test name | |
| Test status | |
| Simulation time | 2773090583 ps |
| CPU time | 67.48 seconds |
| Started | Sep 24 09:16:49 AM UTC 24 |
| Finished | Sep 24 09:17:58 AM UTC 24 |
| Peak memory | 234932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1736579253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 30.usbdev_invalid_sync.1736579253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_iso_retraction.1656823478 |
| Short name | T2190 |
| Test name | |
| Test status | |
| Simulation time | 6626746477 ps |
| CPU time | 43.25 seconds |
| Started | Sep 24 09:16:49 AM UTC 24 |
| Finished | Sep 24 09:17:34 AM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1656823478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_iso_retraction.1656823478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_link_in_err.2957774649 |
| Short name | T1992 |
| Test name | |
| Test status | |
| Simulation time | 176565322 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 09:17:02 AM UTC 24 |
| Finished | Sep 24 09:17:04 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2957774649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_in_err.2957774649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_link_resume.3590420920 |
| Short name | T2181 |
| Test name | |
| Test status | |
| Simulation time | 11814461140 ps |
| CPU time | 17.55 seconds |
| Started | Sep 24 09:17:02 AM UTC 24 |
| Finished | Sep 24 09:17:21 AM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3590420920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_resume.3590420920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_link_suspend.3408705346 |
| Short name | T2159 |
| Test name | |
| Test status | |
| Simulation time | 6084569503 ps |
| CPU time | 9.54 seconds |
| Started | Sep 24 09:17:02 AM UTC 24 |
| Finished | Sep 24 09:17:13 AM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3408705346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_link_suspend.3408705346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_low_speed_traffic.3049931497 |
| Short name | T2183 |
| Test name | |
| Test status | |
| Simulation time | 3326627267 ps |
| CPU time | 23.24 seconds |
| Started | Sep 24 09:17:02 AM UTC 24 |
| Finished | Sep 24 09:17:27 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3049931497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_low_speed_traffic.3049931497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_max_inter_pkt_delay.1316426743 |
| Short name | T2238 |
| Test name | |
| Test status | |
| Simulation time | 2326029912 ps |
| CPU time | 58.79 seconds |
| Started | Sep 24 09:17:02 AM UTC 24 |
| Finished | Sep 24 09:18:03 AM UTC 24 |
| Peak memory | 234920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1316426743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_inter_pkt_delay.1316426743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_in_transaction.3535868390 |
| Short name | T2154 |
| Test name | |
| Test status | |
| Simulation time | 242863141 ps |
| CPU time | 1.86 seconds |
| Started | Sep 24 09:17:02 AM UTC 24 |
| Finished | Sep 24 09:17:05 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3535868390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_in_transaction.3535868390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_out_transaction.2826175062 |
| Short name | T2153 |
| Test name | |
| Test status | |
| Simulation time | 220416911 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:17:02 AM UTC 24 |
| Finished | Sep 24 09:17:05 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2826175062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_out_transaction.2826175062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_min_inter_pkt_delay.766207653 |
| Short name | T2180 |
| Test name | |
| Test status | |
| Simulation time | 1687394202 ps |
| CPU time | 16.74 seconds |
| Started | Sep 24 09:17:03 AM UTC 24 |
| Finished | Sep 24 09:17:20 AM UTC 24 |
| Peak memory | 234744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=766207653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_inter_pkt_delay.766207653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_in_transaction.3874615367 |
| Short name | T2146 |
| Test name | |
| Test status | |
| Simulation time | 152052851 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:17:03 AM UTC 24 |
| Finished | Sep 24 09:17:05 AM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3874615367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_in_transaction.3874615367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_out_transaction.2470391935 |
| Short name | T2151 |
| Test name | |
| Test status | |
| Simulation time | 158607915 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:17:03 AM UTC 24 |
| Finished | Sep 24 09:17:05 AM UTC 24 |
| Peak memory | 215596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2470391935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_out_transaction.2470391935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_nak_trans.487221037 |
| Short name | T148 |
| Test name | |
| Test status | |
| Simulation time | 262779202 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:17:03 AM UTC 24 |
| Finished | Sep 24 09:17:05 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=487221037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_nak_trans.487221037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_out_iso.3709400792 |
| Short name | T2149 |
| Test name | |
| Test status | |
| Simulation time | 174397915 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:17:03 AM UTC 24 |
| Finished | Sep 24 09:17:05 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3709400792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_out_iso.3709400792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_out_stall.650148488 |
| Short name | T2155 |
| Test name | |
| Test status | |
| Simulation time | 205710072 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:17:03 AM UTC 24 |
| Finished | Sep 24 09:17:05 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=650148488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_out_stall.650148488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_out_trans_nak.4116180982 |
| Short name | T2150 |
| Test name | |
| Test status | |
| Simulation time | 177638893 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 09:17:03 AM UTC 24 |
| Finished | Sep 24 09:17:05 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4116180982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_out_trans_nak.4116180982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_pending_in_trans.1400668002 |
| Short name | T2147 |
| Test name | |
| Test status | |
| Simulation time | 158033708 ps |
| CPU time | 0.87 seconds |
| Started | Sep 24 09:17:03 AM UTC 24 |
| Finished | Sep 24 09:17:05 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1400668002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_pending_in_trans.1400668002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_pinflip.870816767 |
| Short name | T2156 |
| Test name | |
| Test status | |
| Simulation time | 295136768 ps |
| CPU time | 1.92 seconds |
| Started | Sep 24 09:17:03 AM UTC 24 |
| Finished | Sep 24 09:17:06 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=870816767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_pinflip.870816767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_usb_ref_disable.3965834067 |
| Short name | T2152 |
| Test name | |
| Test status | |
| Simulation time | 159246745 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:17:03 AM UTC 24 |
| Finished | Sep 24 09:17:05 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3965834067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_usb_ref_disable.3965834067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_phy_pins_sense.3209045505 |
| Short name | T2148 |
| Test name | |
| Test status | |
| Simulation time | 35443822 ps |
| CPU time | 0.78 seconds |
| Started | Sep 24 09:17:03 AM UTC 24 |
| Finished | Sep 24 09:17:05 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3209045505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_pins_sense.3209045505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_buffer.2037802017 |
| Short name | T2235 |
| Test name | |
| Test status | |
| Simulation time | 23141602473 ps |
| CPU time | 54.98 seconds |
| Started | Sep 24 09:17:03 AM UTC 24 |
| Finished | Sep 24 09:17:59 AM UTC 24 |
| Peak memory | 228664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037802017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_pkt_buffer.2037802017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_received.2518481242 |
| Short name | T2168 |
| Test name | |
| Test status | |
| Simulation time | 211416531 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:17:16 AM UTC 24 |
| Finished | Sep 24 09:17:19 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2518481242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_pkt_received.2518481242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_sent.2256724637 |
| Short name | T2170 |
| Test name | |
| Test status | |
| Simulation time | 236393234 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 09:17:16 AM UTC 24 |
| Finished | Sep 24 09:17:19 AM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2256724637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_pkt_sent.2256724637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_in_transaction.3159653674 |
| Short name | T2166 |
| Test name | |
| Test status | |
| Simulation time | 189504482 ps |
| CPU time | 1.22 seconds |
| Started | Sep 24 09:17:16 AM UTC 24 |
| Finished | Sep 24 09:17:18 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3159653674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_random_length_in_transaction.3159653674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_out_transaction.3129337509 |
| Short name | T2164 |
| Test name | |
| Test status | |
| Simulation time | 191074368 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:17:16 AM UTC 24 |
| Finished | Sep 24 09:17:18 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3129337509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_random_length_out_transaction.3129337509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_rx_crc_err.1517655807 |
| Short name | T2167 |
| Test name | |
| Test status | |
| Simulation time | 158607710 ps |
| CPU time | 1.23 seconds |
| Started | Sep 24 09:17:16 AM UTC 24 |
| Finished | Sep 24 09:17:19 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1517655807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_rx_crc_err.1517655807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_rx_full.1639139403 |
| Short name | T2173 |
| Test name | |
| Test status | |
| Simulation time | 343174841 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 09:17:16 AM UTC 24 |
| Finished | Sep 24 09:17:19 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1639139403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_rx_full.1639139403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_setup_stage.2740898450 |
| Short name | T2171 |
| Test name | |
| Test status | |
| Simulation time | 152590808 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 09:17:16 AM UTC 24 |
| Finished | Sep 24 09:17:19 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2740898450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_setup_stage.2740898450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_setup_trans_ignored.754037359 |
| Short name | T2163 |
| Test name | |
| Test status | |
| Simulation time | 176533178 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:17:16 AM UTC 24 |
| Finished | Sep 24 09:17:18 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=754037359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 30.usbdev_setup_trans_ignored.754037359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_smoke.3565604004 |
| Short name | T2176 |
| Test name | |
| Test status | |
| Simulation time | 223628245 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 09:17:17 AM UTC 24 |
| Finished | Sep 24 09:17:19 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3565604004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_smoke.3565604004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_spurious_pids_ignored.1787298783 |
| Short name | T2205 |
| Test name | |
| Test status | |
| Simulation time | 2530988395 ps |
| CPU time | 22.09 seconds |
| Started | Sep 24 09:17:17 AM UTC 24 |
| Finished | Sep 24 09:17:40 AM UTC 24 |
| Peak memory | 235220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1787298783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_spurious_pids_ignored.1787298783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_stall_priority_over_nak.3728099553 |
| Short name | T2174 |
| Test name | |
| Test status | |
| Simulation time | 142536711 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:17:17 AM UTC 24 |
| Finished | Sep 24 09:17:19 AM UTC 24 |
| Peak memory | 215552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3728099553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stall_priority_over_nak.3728099553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_stall_trans.3586439090 |
| Short name | T2175 |
| Test name | |
| Test status | |
| Simulation time | 179100830 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:17:17 AM UTC 24 |
| Finished | Sep 24 09:17:19 AM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3586439090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_stall_trans.3586439090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_stream_len_max.2925579274 |
| Short name | T2179 |
| Test name | |
| Test status | |
| Simulation time | 1081866846 ps |
| CPU time | 2.62 seconds |
| Started | Sep 24 09:17:17 AM UTC 24 |
| Finished | Sep 24 09:17:20 AM UTC 24 |
| Peak memory | 217988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2925579274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stream_len_max.2925579274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_streaming_out.993660329 |
| Short name | T2188 |
| Test name | |
| Test status | |
| Simulation time | 1587904208 ps |
| CPU time | 13.7 seconds |
| Started | Sep 24 09:17:17 AM UTC 24 |
| Finished | Sep 24 09:17:32 AM UTC 24 |
| Peak memory | 228156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=993660329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_streaming_out.993660329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_timeout_missing_host_handshake.361319979 |
| Short name | T2160 |
| Test name | |
| Test status | |
| Simulation time | 1273008896 ps |
| CPU time | 25.45 seconds |
| Started | Sep 24 09:16:49 AM UTC 24 |
| Finished | Sep 24 09:17:16 AM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=361319979 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_timeout_missing_host_handshake.361319979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/30.usbdev_tx_rx_disruption.2019832341 |
| Short name | T2178 |
| Test name | |
| Test status | |
| Simulation time | 465436510 ps |
| CPU time | 1.81 seconds |
| Started | Sep 24 09:17:17 AM UTC 24 |
| Finished | Sep 24 09:17:20 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2019832341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_t x_rx_disruption.2019832341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/30.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/300.usbdev_tx_rx_disruption.2384689471 |
| Short name | T3585 |
| Test name | |
| Test status | |
| Simulation time | 460486880 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:44:23 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2384689471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 300.usbdev_ tx_rx_disruption.2384689471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/300.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/301.usbdev_tx_rx_disruption.2865948769 |
| Short name | T3597 |
| Test name | |
| Test status | |
| Simulation time | 633849875 ps |
| CPU time | 1.84 seconds |
| Started | Sep 24 09:44:23 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2865948769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 301.usbdev_ tx_rx_disruption.2865948769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/301.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/302.usbdev_tx_rx_disruption.1104714078 |
| Short name | T3596 |
| Test name | |
| Test status | |
| Simulation time | 508478571 ps |
| CPU time | 1.78 seconds |
| Started | Sep 24 09:44:23 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1104714078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 302.usbdev_ tx_rx_disruption.1104714078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/302.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/303.usbdev_tx_rx_disruption.2767986864 |
| Short name | T3598 |
| Test name | |
| Test status | |
| Simulation time | 546809029 ps |
| CPU time | 1.83 seconds |
| Started | Sep 24 09:44:23 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2767986864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 303.usbdev_ tx_rx_disruption.2767986864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/303.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/304.usbdev_tx_rx_disruption.2552704518 |
| Short name | T3601 |
| Test name | |
| Test status | |
| Simulation time | 592463205 ps |
| CPU time | 2 seconds |
| Started | Sep 24 09:44:23 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2552704518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 304.usbdev_ tx_rx_disruption.2552704518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/304.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/305.usbdev_tx_rx_disruption.2225750653 |
| Short name | T3599 |
| Test name | |
| Test status | |
| Simulation time | 548258990 ps |
| CPU time | 1.9 seconds |
| Started | Sep 24 09:44:23 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2225750653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 305.usbdev_ tx_rx_disruption.2225750653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/305.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/306.usbdev_tx_rx_disruption.3189340320 |
| Short name | T3595 |
| Test name | |
| Test status | |
| Simulation time | 617174752 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:44:23 AM UTC 24 |
| Finished | Sep 24 09:44:26 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3189340320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 306.usbdev_ tx_rx_disruption.3189340320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/306.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/307.usbdev_tx_rx_disruption.3306279413 |
| Short name | T3604 |
| Test name | |
| Test status | |
| Simulation time | 482490450 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:20 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3306279413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 307.usbdev_ tx_rx_disruption.3306279413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/307.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/308.usbdev_tx_rx_disruption.2546296068 |
| Short name | T3605 |
| Test name | |
| Test status | |
| Simulation time | 560497626 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:20 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2546296068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 308.usbdev_ tx_rx_disruption.2546296068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/308.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/309.usbdev_tx_rx_disruption.1423638250 |
| Short name | T3603 |
| Test name | |
| Test status | |
| Simulation time | 529250354 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:20 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1423638250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 309.usbdev_ tx_rx_disruption.1423638250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/309.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_alert_test.3410432452 |
| Short name | T2243 |
| Test name | |
| Test status | |
| Simulation time | 80994997 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:18:12 AM UTC 24 |
| Finished | Sep 24 09:18:14 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3410432452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 31.usbdev_alert_test.3410432452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_disconnect.1626559114 |
| Short name | T2189 |
| Test name | |
| Test status | |
| Simulation time | 10924403132 ps |
| CPU time | 15.41 seconds |
| Started | Sep 24 09:17:17 AM UTC 24 |
| Finished | Sep 24 09:17:33 AM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1626559114 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_disconnect.1626559114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_reset.451335574 |
| Short name | T2233 |
| Test name | |
| Test status | |
| Simulation time | 19062525825 ps |
| CPU time | 21.78 seconds |
| Started | Sep 24 09:17:34 AM UTC 24 |
| Finished | Sep 24 09:17:58 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=451335574 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_reset.451335574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_resume.3200359244 |
| Short name | T2239 |
| Test name | |
| Test status | |
| Simulation time | 24198915214 ps |
| CPU time | 31.64 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:18:07 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3200359244 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_resume.3200359244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_av_buffer.2744816642 |
| Short name | T2191 |
| Test name | |
| Test status | |
| Simulation time | 178690697 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:17:36 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2744816642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_av_buffer.2744816642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_bitstuff_err.3830904375 |
| Short name | T2196 |
| Test name | |
| Test status | |
| Simulation time | 158429820 ps |
| CPU time | 1.28 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:17:37 AM UTC 24 |
| Peak memory | 215548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3830904375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_bitstuff_err.3830904375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_clear.141693998 |
| Short name | T2198 |
| Test name | |
| Test status | |
| Simulation time | 359650848 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:17:37 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=141693998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_data_toggle_clear.141693998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_restore.4048701299 |
| Short name | T2193 |
| Test name | |
| Test status | |
| Simulation time | 356410914 ps |
| CPU time | 1.12 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:17:37 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4048701299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_data_toggle_restore.4048701299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_device_address.2265103624 |
| Short name | T2236 |
| Test name | |
| Test status | |
| Simulation time | 14796130917 ps |
| CPU time | 25.37 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:18:01 AM UTC 24 |
| Peak memory | 218412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2265103624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_address.2265103624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_device_timeout.1020610635 |
| Short name | T2207 |
| Test name | |
| Test status | |
| Simulation time | 1524956916 ps |
| CPU time | 8.5 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:17:44 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1020610635 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_timeout.1020610635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_disable_endpoint.1223540883 |
| Short name | T2200 |
| Test name | |
| Test status | |
| Simulation time | 734247307 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:17:38 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1223540883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_disable_endpoint.1223540883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_disconnected.1081361505 |
| Short name | T2195 |
| Test name | |
| Test status | |
| Simulation time | 182518471 ps |
| CPU time | 0.94 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:17:37 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1081361505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_disconnected.1081361505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_enable.1007734933 |
| Short name | T2192 |
| Test name | |
| Test status | |
| Simulation time | 32222014 ps |
| CPU time | 0.62 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:17:36 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1007734933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 31.usbdev_enable.1007734933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_access.3352739382 |
| Short name | T2204 |
| Test name | |
| Test status | |
| Simulation time | 897892152 ps |
| CPU time | 2.43 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:17:38 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3352739382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_access.3352739382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_types.3101027463 |
| Short name | T467 |
| Test name | |
| Test status | |
| Simulation time | 577051337 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:17:38 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3101027463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_types.3101027463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_levels.2339669119 |
| Short name | T375 |
| Test name | |
| Test status | |
| Simulation time | 262816295 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:17:38 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2339669119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_fifo_levels.2339669119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_rst.1534334968 |
| Short name | T2203 |
| Test name | |
| Test status | |
| Simulation time | 291427520 ps |
| CPU time | 2.09 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:17:38 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1534334968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_fifo_rst.1534334968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_in_iso.1901616193 |
| Short name | T2201 |
| Test name | |
| Test status | |
| Simulation time | 260949101 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:17:38 AM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1901616193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_in_iso.1901616193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_in_stall.2006796848 |
| Short name | T2197 |
| Test name | |
| Test status | |
| Simulation time | 168150902 ps |
| CPU time | 0.92 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:17:37 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2006796848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_stall.2006796848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_in_trans.1245540758 |
| Short name | T2202 |
| Test name | |
| Test status | |
| Simulation time | 253112274 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:17:38 AM UTC 24 |
| Peak memory | 215496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1245540758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_trans.1245540758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_invalid_sync.2121022823 |
| Short name | T2318 |
| Test name | |
| Test status | |
| Simulation time | 4397416234 ps |
| CPU time | 106.56 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:19:24 AM UTC 24 |
| Peak memory | 234768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2121022823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 31.usbdev_invalid_sync.2121022823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_iso_retraction.442647152 |
| Short name | T2317 |
| Test name | |
| Test status | |
| Simulation time | 9515430519 ps |
| CPU time | 103.94 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:19:21 AM UTC 24 |
| Peak memory | 217688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=442647152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 31.usbdev_iso_retraction.442647152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_link_in_err.917433516 |
| Short name | T2199 |
| Test name | |
| Test status | |
| Simulation time | 256222128 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:17:37 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=917433516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_link_in_err.917433516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_link_resume.913768716 |
| Short name | T2209 |
| Test name | |
| Test status | |
| Simulation time | 13249922792 ps |
| CPU time | 16.42 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:17:53 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=913768716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_link_resume.913768716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_link_suspend.4285926774 |
| Short name | T2206 |
| Test name | |
| Test status | |
| Simulation time | 3961703126 ps |
| CPU time | 6.05 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:17:42 AM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4285926774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_link_suspend.4285926774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_low_speed_traffic.2509407829 |
| Short name | T2260 |
| Test name | |
| Test status | |
| Simulation time | 5833242660 ps |
| CPU time | 54.41 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:18:31 AM UTC 24 |
| Peak memory | 230512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2509407829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_low_speed_traffic.2509407829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_max_inter_pkt_delay.1279846705 |
| Short name | T2240 |
| Test name | |
| Test status | |
| Simulation time | 2092986597 ps |
| CPU time | 18.34 seconds |
| Started | Sep 24 09:17:53 AM UTC 24 |
| Finished | Sep 24 09:18:13 AM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1279846705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_inter_pkt_delay.1279846705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_in_transaction.195518162 |
| Short name | T2215 |
| Test name | |
| Test status | |
| Simulation time | 240561834 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:17:53 AM UTC 24 |
| Finished | Sep 24 09:17:56 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=195518162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_in_transaction.195518162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_out_transaction.3409567910 |
| Short name | T2213 |
| Test name | |
| Test status | |
| Simulation time | 197133732 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:56 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3409567910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_out_transaction.3409567910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_min_inter_pkt_delay.3232443028 |
| Short name | T2256 |
| Test name | |
| Test status | |
| Simulation time | 2732920201 ps |
| CPU time | 23.31 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:18:18 AM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3232443028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_inter_pkt_delay.3232443028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_in_transaction.1321848916 |
| Short name | T2211 |
| Test name | |
| Test status | |
| Simulation time | 166876823 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:56 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1321848916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_in_transaction.1321848916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_out_transaction.1385436993 |
| Short name | T2214 |
| Test name | |
| Test status | |
| Simulation time | 147356065 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:56 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1385436993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_out_transaction.1385436993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_nak_trans.2204623576 |
| Short name | T132 |
| Test name | |
| Test status | |
| Simulation time | 176914861 ps |
| CPU time | 0.96 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:56 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2204623576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_nak_trans.2204623576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_out_iso.1391699833 |
| Short name | T2216 |
| Test name | |
| Test status | |
| Simulation time | 155837745 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:56 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1391699833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_out_iso.1391699833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_out_stall.1890507694 |
| Short name | T2219 |
| Test name | |
| Test status | |
| Simulation time | 178866273 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:56 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1890507694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_out_stall.1890507694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_out_trans_nak.2357768376 |
| Short name | T2221 |
| Test name | |
| Test status | |
| Simulation time | 183750226 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:56 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2357768376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_out_trans_nak.2357768376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_pending_in_trans.3179118258 |
| Short name | T2217 |
| Test name | |
| Test status | |
| Simulation time | 150606839 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:56 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3179118258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_pending_in_trans.3179118258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_pinflip.3129699991 |
| Short name | T2225 |
| Test name | |
| Test status | |
| Simulation time | 235186530 ps |
| CPU time | 1.3 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:56 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3129699991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_pinflip.3129699991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_usb_ref_disable.44320940 |
| Short name | T2218 |
| Test name | |
| Test status | |
| Simulation time | 153559066 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:56 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=44320940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disab le_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 31.usbdev_phy_config_usb_ref_disable.44320940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_phy_pins_sense.2270621576 |
| Short name | T2220 |
| Test name | |
| Test status | |
| Simulation time | 93475626 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:56 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2270621576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_pins_sense.2270621576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_buffer.4151498785 |
| Short name | T305 |
| Test name | |
| Test status | |
| Simulation time | 11017266069 ps |
| CPU time | 28.91 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:18:24 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4151498785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_pkt_buffer.4151498785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_received.2469653769 |
| Short name | T2222 |
| Test name | |
| Test status | |
| Simulation time | 164909595 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:56 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2469653769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_pkt_received.2469653769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_sent.2010796791 |
| Short name | T2226 |
| Test name | |
| Test status | |
| Simulation time | 205479773 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:56 AM UTC 24 |
| Peak memory | 215556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2010796791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_pkt_sent.2010796791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_in_transaction.1491908779 |
| Short name | T2232 |
| Test name | |
| Test status | |
| Simulation time | 251738268 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:57 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1491908779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_random_length_in_transaction.1491908779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_out_transaction.2276019223 |
| Short name | T2224 |
| Test name | |
| Test status | |
| Simulation time | 206486922 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:56 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2276019223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_random_length_out_transaction.2276019223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_rx_crc_err.3183213242 |
| Short name | T2227 |
| Test name | |
| Test status | |
| Simulation time | 136578586 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:56 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3183213242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_rx_crc_err.3183213242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_rx_full.1834264919 |
| Short name | T2230 |
| Test name | |
| Test status | |
| Simulation time | 335324837 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:57 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1834264919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_rx_full.1834264919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_setup_stage.1674697162 |
| Short name | T2228 |
| Test name | |
| Test status | |
| Simulation time | 156334804 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:56 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1674697162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_setup_stage.1674697162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_setup_trans_ignored.3977509107 |
| Short name | T2223 |
| Test name | |
| Test status | |
| Simulation time | 151193304 ps |
| CPU time | 0.94 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:56 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3977509107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 31.usbdev_setup_trans_ignored.3977509107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_smoke.2608747649 |
| Short name | T2231 |
| Test name | |
| Test status | |
| Simulation time | 224122101 ps |
| CPU time | 1.28 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:57 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2608747649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_smoke.2608747649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_spurious_pids_ignored.1949546392 |
| Short name | T2262 |
| Test name | |
| Test status | |
| Simulation time | 2183720517 ps |
| CPU time | 54.1 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:18:50 AM UTC 24 |
| Peak memory | 228464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1949546392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_spurious_pids_ignored.1949546392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_stall_priority_over_nak.1290693283 |
| Short name | T2229 |
| Test name | |
| Test status | |
| Simulation time | 172099796 ps |
| CPU time | 0.94 seconds |
| Started | Sep 24 09:17:54 AM UTC 24 |
| Finished | Sep 24 09:17:56 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1290693283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stall_priority_over_nak.1290693283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_stall_trans.3539887393 |
| Short name | T2242 |
| Test name | |
| Test status | |
| Simulation time | 189063955 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 09:18:12 AM UTC 24 |
| Finished | Sep 24 09:18:14 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3539887393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_stall_trans.3539887393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_stream_len_max.1215007120 |
| Short name | T2251 |
| Test name | |
| Test status | |
| Simulation time | 455047950 ps |
| CPU time | 2.03 seconds |
| Started | Sep 24 09:18:12 AM UTC 24 |
| Finished | Sep 24 09:18:15 AM UTC 24 |
| Peak memory | 217836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1215007120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stream_len_max.1215007120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_streaming_out.3631808932 |
| Short name | T2286 |
| Test name | |
| Test status | |
| Simulation time | 2951626978 ps |
| CPU time | 25.15 seconds |
| Started | Sep 24 09:18:12 AM UTC 24 |
| Finished | Sep 24 09:18:39 AM UTC 24 |
| Peak memory | 230664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3631808932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_streaming_out.3631808932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_timeout_missing_host_handshake.301686814 |
| Short name | T2208 |
| Test name | |
| Test status | |
| Simulation time | 2218130840 ps |
| CPU time | 12.34 seconds |
| Started | Sep 24 09:17:35 AM UTC 24 |
| Finished | Sep 24 09:17:48 AM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=301686814 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_timeout_missing_host_handshake.301686814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/31.usbdev_tx_rx_disruption.1481476611 |
| Short name | T2248 |
| Test name | |
| Test status | |
| Simulation time | 639214090 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:18:12 AM UTC 24 |
| Finished | Sep 24 09:18:15 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1481476611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_t x_rx_disruption.1481476611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/31.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/310.usbdev_tx_rx_disruption.88393104 |
| Short name | T3610 |
| Test name | |
| Test status | |
| Simulation time | 527509665 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=88393104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 310.usbdev_tx _rx_disruption.88393104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/310.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/311.usbdev_tx_rx_disruption.784513322 |
| Short name | T3609 |
| Test name | |
| Test status | |
| Simulation time | 517984461 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=784513322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 311.usbdev_t x_rx_disruption.784513322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/311.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/312.usbdev_tx_rx_disruption.1877712495 |
| Short name | T3606 |
| Test name | |
| Test status | |
| Simulation time | 592177996 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:20 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1877712495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 312.usbdev_ tx_rx_disruption.1877712495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/312.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/313.usbdev_tx_rx_disruption.1873137983 |
| Short name | T3625 |
| Test name | |
| Test status | |
| Simulation time | 508438363 ps |
| CPU time | 2.22 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1873137983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 313.usbdev_ tx_rx_disruption.1873137983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/313.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/314.usbdev_tx_rx_disruption.1382230919 |
| Short name | T3616 |
| Test name | |
| Test status | |
| Simulation time | 531964951 ps |
| CPU time | 1.8 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1382230919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 314.usbdev_ tx_rx_disruption.1382230919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/314.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/315.usbdev_tx_rx_disruption.2640524122 |
| Short name | T3623 |
| Test name | |
| Test status | |
| Simulation time | 596980602 ps |
| CPU time | 2.11 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2640524122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 315.usbdev_ tx_rx_disruption.2640524122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/315.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/316.usbdev_tx_rx_disruption.2965631845 |
| Short name | T3611 |
| Test name | |
| Test status | |
| Simulation time | 547771418 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2965631845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 316.usbdev_ tx_rx_disruption.2965631845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/316.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/317.usbdev_tx_rx_disruption.3046913637 |
| Short name | T3613 |
| Test name | |
| Test status | |
| Simulation time | 473907496 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3046913637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 317.usbdev_ tx_rx_disruption.3046913637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/317.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/318.usbdev_tx_rx_disruption.173562201 |
| Short name | T3621 |
| Test name | |
| Test status | |
| Simulation time | 572208787 ps |
| CPU time | 1.98 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=173562201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 318.usbdev_t x_rx_disruption.173562201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/318.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/319.usbdev_tx_rx_disruption.4226625693 |
| Short name | T3615 |
| Test name | |
| Test status | |
| Simulation time | 546455937 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4226625693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 319.usbdev_ tx_rx_disruption.4226625693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/319.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_alert_test.442757118 |
| Short name | T2270 |
| Test name | |
| Test status | |
| Simulation time | 36117147 ps |
| CPU time | 0.76 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:18:53 AM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=442757118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_alert_test.442757118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_disconnect.1388635862 |
| Short name | T2257 |
| Test name | |
| Test status | |
| Simulation time | 4390697295 ps |
| CPU time | 6.25 seconds |
| Started | Sep 24 09:18:12 AM UTC 24 |
| Finished | Sep 24 09:18:20 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1388635862 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_disconnect.1388635862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_reset.3470658831 |
| Short name | T2285 |
| Test name | |
| Test status | |
| Simulation time | 20529271787 ps |
| CPU time | 23.21 seconds |
| Started | Sep 24 09:18:12 AM UTC 24 |
| Finished | Sep 24 09:18:37 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3470658831 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_reset.3470658831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_resume.3862842071 |
| Short name | T2295 |
| Test name | |
| Test status | |
| Simulation time | 31232074925 ps |
| CPU time | 42.3 seconds |
| Started | Sep 24 09:18:12 AM UTC 24 |
| Finished | Sep 24 09:18:56 AM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3862842071 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_resume.3862842071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_av_buffer.1663247018 |
| Short name | T2246 |
| Test name | |
| Test status | |
| Simulation time | 160693528 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:18:12 AM UTC 24 |
| Finished | Sep 24 09:18:15 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1663247018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_av_buffer.1663247018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_bitstuff_err.3012726701 |
| Short name | T2245 |
| Test name | |
| Test status | |
| Simulation time | 149049455 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:18:12 AM UTC 24 |
| Finished | Sep 24 09:18:14 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3012726701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_bitstuff_err.3012726701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_clear.1933445018 |
| Short name | T2252 |
| Test name | |
| Test status | |
| Simulation time | 451339283 ps |
| CPU time | 2.13 seconds |
| Started | Sep 24 09:18:12 AM UTC 24 |
| Finished | Sep 24 09:18:16 AM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1933445018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 32.usbdev_data_toggle_clear.1933445018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_restore.3611640887 |
| Short name | T2255 |
| Test name | |
| Test status | |
| Simulation time | 1129988908 ps |
| CPU time | 3.27 seconds |
| Started | Sep 24 09:18:12 AM UTC 24 |
| Finished | Sep 24 09:18:17 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3611640887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_data_toggle_restore.3611640887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_device_address.3915593797 |
| Short name | T2288 |
| Test name | |
| Test status | |
| Simulation time | 16348294020 ps |
| CPU time | 31.2 seconds |
| Started | Sep 24 09:18:12 AM UTC 24 |
| Finished | Sep 24 09:18:45 AM UTC 24 |
| Peak memory | 218224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3915593797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_address.3915593797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_device_timeout.751818258 |
| Short name | T2269 |
| Test name | |
| Test status | |
| Simulation time | 4835507409 ps |
| CPU time | 35.77 seconds |
| Started | Sep 24 09:18:12 AM UTC 24 |
| Finished | Sep 24 09:18:50 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=751818258 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_timeout.751818258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_disable_endpoint.2277007462 |
| Short name | T2250 |
| Test name | |
| Test status | |
| Simulation time | 650248106 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 09:18:13 AM UTC 24 |
| Finished | Sep 24 09:18:15 AM UTC 24 |
| Peak memory | 215904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2277007462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_disable_endpoint.2277007462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_disconnected.3358203811 |
| Short name | T2247 |
| Test name | |
| Test status | |
| Simulation time | 153282595 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:18:13 AM UTC 24 |
| Finished | Sep 24 09:18:15 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3358203811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_disconnected.3358203811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_enable.850336114 |
| Short name | T2244 |
| Test name | |
| Test status | |
| Simulation time | 63776546 ps |
| CPU time | 0.73 seconds |
| Started | Sep 24 09:18:13 AM UTC 24 |
| Finished | Sep 24 09:18:14 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=850336114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_enable.850336114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_access.4199316905 |
| Short name | T2253 |
| Test name | |
| Test status | |
| Simulation time | 921723097 ps |
| CPU time | 2.64 seconds |
| Started | Sep 24 09:18:13 AM UTC 24 |
| Finished | Sep 24 09:18:17 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4199316905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_access.4199316905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_types.2229358147 |
| Short name | T543 |
| Test name | |
| Test status | |
| Simulation time | 307556519 ps |
| CPU time | 1.3 seconds |
| Started | Sep 24 09:18:13 AM UTC 24 |
| Finished | Sep 24 09:18:15 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2229358147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_types.2229358147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_levels.3408707039 |
| Short name | T401 |
| Test name | |
| Test status | |
| Simulation time | 284776130 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:18:13 AM UTC 24 |
| Finished | Sep 24 09:18:15 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3408707039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_fifo_levels.3408707039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_rst.2861407733 |
| Short name | T2254 |
| Test name | |
| Test status | |
| Simulation time | 210147153 ps |
| CPU time | 2.75 seconds |
| Started | Sep 24 09:18:13 AM UTC 24 |
| Finished | Sep 24 09:18:17 AM UTC 24 |
| Peak memory | 217912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2861407733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_fifo_rst.2861407733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_in_iso.3691457788 |
| Short name | T2249 |
| Test name | |
| Test status | |
| Simulation time | 234594079 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:18:13 AM UTC 24 |
| Finished | Sep 24 09:18:15 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3691457788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_in_iso.3691457788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_in_stall.928674773 |
| Short name | T2264 |
| Test name | |
| Test status | |
| Simulation time | 148126879 ps |
| CPU time | 0.89 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:18:34 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=928674773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_in_stall.928674773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_in_trans.1945991526 |
| Short name | T2261 |
| Test name | |
| Test status | |
| Simulation time | 207546348 ps |
| CPU time | 0.94 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:18:34 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1945991526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_trans.1945991526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_invalid_sync.123511797 |
| Short name | T2382 |
| Test name | |
| Test status | |
| Simulation time | 4469854995 ps |
| CPU time | 112.49 seconds |
| Started | Sep 24 09:18:13 AM UTC 24 |
| Finished | Sep 24 09:20:07 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=123511797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_invalid_sync.123511797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_iso_retraction.1615382605 |
| Short name | T2339 |
| Test name | |
| Test status | |
| Simulation time | 8516228399 ps |
| CPU time | 60 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:19:33 AM UTC 24 |
| Peak memory | 218316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1615382605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_iso_retraction.1615382605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_link_in_err.3572668867 |
| Short name | T2265 |
| Test name | |
| Test status | |
| Simulation time | 205531012 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:18:34 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3572668867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_in_err.3572668867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_link_resume.2653659016 |
| Short name | T2319 |
| Test name | |
| Test status | |
| Simulation time | 32158637147 ps |
| CPU time | 51.26 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:19:25 AM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2653659016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_resume.2653659016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_link_suspend.2568937145 |
| Short name | T2287 |
| Test name | |
| Test status | |
| Simulation time | 5716119858 ps |
| CPU time | 9.82 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:18:43 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2568937145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_link_suspend.2568937145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_low_speed_traffic.3869956566 |
| Short name | T2359 |
| Test name | |
| Test status | |
| Simulation time | 3136698126 ps |
| CPU time | 76.75 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:19:51 AM UTC 24 |
| Peak memory | 230660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3869956566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_low_speed_traffic.3869956566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_max_inter_pkt_delay.2519353958 |
| Short name | T2341 |
| Test name | |
| Test status | |
| Simulation time | 2765947855 ps |
| CPU time | 65.59 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:19:39 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2519353958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_inter_pkt_delay.2519353958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_in_transaction.1529806717 |
| Short name | T2268 |
| Test name | |
| Test status | |
| Simulation time | 235309829 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:18:34 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1529806717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_in_transaction.1529806717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_out_transaction.1967666479 |
| Short name | T2276 |
| Test name | |
| Test status | |
| Simulation time | 188140346 ps |
| CPU time | 1.33 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:18:35 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1967666479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_out_transaction.1967666479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_min_inter_pkt_delay.3241855606 |
| Short name | T2289 |
| Test name | |
| Test status | |
| Simulation time | 2388472988 ps |
| CPU time | 15.96 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:18:49 AM UTC 24 |
| Peak memory | 228736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3241855606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_inter_pkt_delay.3241855606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_in_transaction.1296479606 |
| Short name | T2274 |
| Test name | |
| Test status | |
| Simulation time | 193360616 ps |
| CPU time | 1.2 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:18:35 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1296479606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_in_transaction.1296479606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_out_transaction.1657433717 |
| Short name | T2266 |
| Test name | |
| Test status | |
| Simulation time | 165899877 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:18:34 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1657433717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_out_transaction.1657433717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_nak_trans.1958650155 |
| Short name | T160 |
| Test name | |
| Test status | |
| Simulation time | 215174394 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:18:35 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1958650155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_nak_trans.1958650155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_out_iso.1298281945 |
| Short name | T2277 |
| Test name | |
| Test status | |
| Simulation time | 196826489 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:18:35 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1298281945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_out_iso.1298281945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_out_stall.4246489125 |
| Short name | T2272 |
| Test name | |
| Test status | |
| Simulation time | 184673384 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:18:34 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4246489125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_out_stall.4246489125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_out_trans_nak.3907443501 |
| Short name | T2278 |
| Test name | |
| Test status | |
| Simulation time | 174910073 ps |
| CPU time | 1.31 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:18:35 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3907443501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_out_trans_nak.3907443501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_pending_in_trans.176867722 |
| Short name | T2284 |
| Test name | |
| Test status | |
| Simulation time | 215250000 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:18:35 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=176867722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_pending_in_trans.176867722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_pinflip.1038848808 |
| Short name | T2275 |
| Test name | |
| Test status | |
| Simulation time | 257098995 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:18:35 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1038848808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_pinflip.1038848808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_usb_ref_disable.1135016118 |
| Short name | T2267 |
| Test name | |
| Test status | |
| Simulation time | 145592891 ps |
| CPU time | 0.84 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:18:34 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1135016118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_usb_ref_disable.1135016118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_phy_pins_sense.4073771103 |
| Short name | T2273 |
| Test name | |
| Test status | |
| Simulation time | 46098231 ps |
| CPU time | 0.96 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:18:35 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4073771103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_pins_sense.4073771103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_buffer.3080402595 |
| Short name | T2312 |
| Test name | |
| Test status | |
| Simulation time | 14831881562 ps |
| CPU time | 38.81 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:19:13 AM UTC 24 |
| Peak memory | 228560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3080402595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_pkt_buffer.3080402595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_received.2375473994 |
| Short name | T2283 |
| Test name | |
| Test status | |
| Simulation time | 172760573 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:18:32 AM UTC 24 |
| Finished | Sep 24 09:18:35 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2375473994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_pkt_received.2375473994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_sent.2886734648 |
| Short name | T2282 |
| Test name | |
| Test status | |
| Simulation time | 214263765 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:18:33 AM UTC 24 |
| Finished | Sep 24 09:18:35 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2886734648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_pkt_sent.2886734648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_in_transaction.3226332081 |
| Short name | T2281 |
| Test name | |
| Test status | |
| Simulation time | 220691949 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:18:33 AM UTC 24 |
| Finished | Sep 24 09:18:35 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3226332081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_random_length_in_transaction.3226332081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_out_transaction.2851697196 |
| Short name | T2280 |
| Test name | |
| Test status | |
| Simulation time | 196678817 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:18:33 AM UTC 24 |
| Finished | Sep 24 09:18:35 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2851697196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_random_length_out_transaction.2851697196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_rx_crc_err.561109996 |
| Short name | T2279 |
| Test name | |
| Test status | |
| Simulation time | 148633530 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 09:18:33 AM UTC 24 |
| Finished | Sep 24 09:18:35 AM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=561109996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_rx_crc_err.561109996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_rx_full.2442281507 |
| Short name | T2169 |
| Test name | |
| Test status | |
| Simulation time | 259079310 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:18:50 AM UTC 24 |
| Finished | Sep 24 09:18:53 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2442281507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_rx_full.2442281507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_setup_stage.2333916008 |
| Short name | T2263 |
| Test name | |
| Test status | |
| Simulation time | 173491947 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:18:53 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2333916008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_setup_stage.2333916008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_setup_trans_ignored.2993270264 |
| Short name | T2290 |
| Test name | |
| Test status | |
| Simulation time | 161039261 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:18:53 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2993270264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 32.usbdev_setup_trans_ignored.2993270264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_smoke.2653904020 |
| Short name | T2271 |
| Test name | |
| Test status | |
| Simulation time | 207460945 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:18:53 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2653904020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_smoke.2653904020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_spurious_pids_ignored.3174280450 |
| Short name | T2383 |
| Test name | |
| Test status | |
| Simulation time | 3153329145 ps |
| CPU time | 76.12 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:20:09 AM UTC 24 |
| Peak memory | 230660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3174280450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_spurious_pids_ignored.3174280450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_stall_priority_over_nak.69711086 |
| Short name | T2212 |
| Test name | |
| Test status | |
| Simulation time | 166212195 ps |
| CPU time | 1.14 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:18:53 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=69711086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 32.usbdev_stall_priority_over_nak.69711086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_stall_trans.2180317131 |
| Short name | T2241 |
| Test name | |
| Test status | |
| Simulation time | 218326851 ps |
| CPU time | 0.94 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:18:53 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2180317131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_stall_trans.2180317131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_stream_len_max.1467000665 |
| Short name | T2165 |
| Test name | |
| Test status | |
| Simulation time | 209324016 ps |
| CPU time | 0.96 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:18:53 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1467000665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stream_len_max.1467000665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_streaming_out.2315000747 |
| Short name | T2298 |
| Test name | |
| Test status | |
| Simulation time | 2067589577 ps |
| CPU time | 18.26 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:19:10 AM UTC 24 |
| Peak memory | 228160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2315000747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_streaming_out.2315000747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_timeout_missing_host_handshake.3858985824 |
| Short name | T2259 |
| Test name | |
| Test status | |
| Simulation time | 897492661 ps |
| CPU time | 17.01 seconds |
| Started | Sep 24 09:18:13 AM UTC 24 |
| Finished | Sep 24 09:18:31 AM UTC 24 |
| Peak memory | 217908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3858985824 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_timeout_missing_host_handshake.3858985824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/32.usbdev_tx_rx_disruption.1020030587 |
| Short name | T2291 |
| Test name | |
| Test status | |
| Simulation time | 523567628 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:18:54 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1020030587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_t x_rx_disruption.1020030587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/32.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/320.usbdev_tx_rx_disruption.2490451300 |
| Short name | T3612 |
| Test name | |
| Test status | |
| Simulation time | 517651039 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2490451300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 320.usbdev_ tx_rx_disruption.2490451300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/320.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/321.usbdev_tx_rx_disruption.2125488099 |
| Short name | T3618 |
| Test name | |
| Test status | |
| Simulation time | 597144706 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2125488099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 321.usbdev_ tx_rx_disruption.2125488099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/321.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/322.usbdev_tx_rx_disruption.2587169392 |
| Short name | T3614 |
| Test name | |
| Test status | |
| Simulation time | 580964179 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2587169392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 322.usbdev_ tx_rx_disruption.2587169392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/322.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/323.usbdev_tx_rx_disruption.1393595131 |
| Short name | T3619 |
| Test name | |
| Test status | |
| Simulation time | 545107246 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1393595131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 323.usbdev_ tx_rx_disruption.1393595131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/323.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/324.usbdev_tx_rx_disruption.3286995509 |
| Short name | T3617 |
| Test name | |
| Test status | |
| Simulation time | 532999067 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3286995509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 324.usbdev_ tx_rx_disruption.3286995509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/324.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/325.usbdev_tx_rx_disruption.4153483264 |
| Short name | T3620 |
| Test name | |
| Test status | |
| Simulation time | 514063863 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4153483264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 325.usbdev_ tx_rx_disruption.4153483264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/325.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/326.usbdev_tx_rx_disruption.3368681399 |
| Short name | T3624 |
| Test name | |
| Test status | |
| Simulation time | 527118267 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3368681399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 326.usbdev_ tx_rx_disruption.3368681399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/326.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/327.usbdev_tx_rx_disruption.1069772667 |
| Short name | T3622 |
| Test name | |
| Test status | |
| Simulation time | 538694842 ps |
| CPU time | 1.63 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1069772667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 327.usbdev_ tx_rx_disruption.1069772667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/327.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/328.usbdev_tx_rx_disruption.2742544660 |
| Short name | T3635 |
| Test name | |
| Test status | |
| Simulation time | 480310058 ps |
| CPU time | 2.08 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:22 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2742544660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 328.usbdev_ tx_rx_disruption.2742544660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/328.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/329.usbdev_tx_rx_disruption.568128331 |
| Short name | T3631 |
| Test name | |
| Test status | |
| Simulation time | 544724860 ps |
| CPU time | 1.97 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=568128331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 329.usbdev_t x_rx_disruption.568128331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/329.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_alert_test.1564378131 |
| Short name | T2344 |
| Test name | |
| Test status | |
| Simulation time | 35806669 ps |
| CPU time | 0.71 seconds |
| Started | Sep 24 09:19:45 AM UTC 24 |
| Finished | Sep 24 09:19:47 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1564378131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 33.usbdev_alert_test.1564378131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_disconnect.1643171021 |
| Short name | T2297 |
| Test name | |
| Test status | |
| Simulation time | 8735239965 ps |
| CPU time | 14.06 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:19:06 AM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1643171021 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_disconnect.1643171021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_reset.562293377 |
| Short name | T2315 |
| Test name | |
| Test status | |
| Simulation time | 20284196094 ps |
| CPU time | 24.79 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:19:17 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=562293377 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_reset.562293377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_resume.305243429 |
| Short name | T2333 |
| Test name | |
| Test status | |
| Simulation time | 29757295907 ps |
| CPU time | 35.39 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:19:28 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=305243429 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_resume.305243429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_av_buffer.4270222573 |
| Short name | T2194 |
| Test name | |
| Test status | |
| Simulation time | 236966580 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:18:53 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4270222573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_av_buffer.4270222573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_bitstuff_err.527737407 |
| Short name | T1894 |
| Test name | |
| Test status | |
| Simulation time | 156493712 ps |
| CPU time | 1.33 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:18:54 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=527737407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_bitstuff_err.527737407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_clear.4214181066 |
| Short name | T2292 |
| Test name | |
| Test status | |
| Simulation time | 243004479 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:18:54 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4214181066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 33.usbdev_data_toggle_clear.4214181066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_restore.514008119 |
| Short name | T2293 |
| Test name | |
| Test status | |
| Simulation time | 299516210 ps |
| CPU time | 1.47 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:18:54 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=514008119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_restore.514008119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_device_address.3032145713 |
| Short name | T2340 |
| Test name | |
| Test status | |
| Simulation time | 25743702122 ps |
| CPU time | 42.75 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:19:35 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3032145713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_address.3032145713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_device_timeout.399998167 |
| Short name | T2311 |
| Test name | |
| Test status | |
| Simulation time | 2465081247 ps |
| CPU time | 19.83 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:19:12 AM UTC 24 |
| Peak memory | 218412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=399998167 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_timeout.399998167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_disable_endpoint.3117982191 |
| Short name | T2294 |
| Test name | |
| Test status | |
| Simulation time | 756335071 ps |
| CPU time | 1.87 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:18:54 AM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3117982191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_disable_endpoint.3117982191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_disconnected.1931752312 |
| Short name | T2162 |
| Test name | |
| Test status | |
| Simulation time | 136970756 ps |
| CPU time | 0.79 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:18:53 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1931752312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_disconnected.1931752312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_enable.1405121430 |
| Short name | T2299 |
| Test name | |
| Test status | |
| Simulation time | 32205263 ps |
| CPU time | 0.86 seconds |
| Started | Sep 24 09:19:09 AM UTC 24 |
| Finished | Sep 24 09:19:11 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1405121430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 33.usbdev_enable.1405121430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_access.205983106 |
| Short name | T2314 |
| Test name | |
| Test status | |
| Simulation time | 939835482 ps |
| CPU time | 3.3 seconds |
| Started | Sep 24 09:19:09 AM UTC 24 |
| Finished | Sep 24 09:19:13 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=205983106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_access.205983106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_levels.3164944693 |
| Short name | T357 |
| Test name | |
| Test status | |
| Simulation time | 263479955 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 09:19:09 AM UTC 24 |
| Finished | Sep 24 09:19:11 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3164944693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_fifo_levels.3164944693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_rst.783891592 |
| Short name | T2313 |
| Test name | |
| Test status | |
| Simulation time | 345911604 ps |
| CPU time | 3.14 seconds |
| Started | Sep 24 09:19:09 AM UTC 24 |
| Finished | Sep 24 09:19:13 AM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=783891592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_fifo_rst.783891592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_in_iso.3855123130 |
| Short name | T2301 |
| Test name | |
| Test status | |
| Simulation time | 217983206 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:19:09 AM UTC 24 |
| Finished | Sep 24 09:19:11 AM UTC 24 |
| Peak memory | 225892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3855123130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_in_iso.3855123130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_in_stall.975850217 |
| Short name | T2302 |
| Test name | |
| Test status | |
| Simulation time | 145042719 ps |
| CPU time | 1.38 seconds |
| Started | Sep 24 09:19:09 AM UTC 24 |
| Finished | Sep 24 09:19:12 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=975850217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_in_stall.975850217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_in_trans.4132912366 |
| Short name | T2300 |
| Test name | |
| Test status | |
| Simulation time | 210655009 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 09:19:09 AM UTC 24 |
| Finished | Sep 24 09:19:11 AM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4132912366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_trans.4132912366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_invalid_sync.2824070001 |
| Short name | T2343 |
| Test name | |
| Test status | |
| Simulation time | 4902175971 ps |
| CPU time | 33.18 seconds |
| Started | Sep 24 09:19:09 AM UTC 24 |
| Finished | Sep 24 09:19:44 AM UTC 24 |
| Peak memory | 234940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2824070001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 33.usbdev_invalid_sync.2824070001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_iso_retraction.1705417036 |
| Short name | T2439 |
| Test name | |
| Test status | |
| Simulation time | 11059074924 ps |
| CPU time | 108.37 seconds |
| Started | Sep 24 09:19:09 AM UTC 24 |
| Finished | Sep 24 09:21:00 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1705417036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_iso_retraction.1705417036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_link_in_err.875878532 |
| Short name | T2304 |
| Test name | |
| Test status | |
| Simulation time | 287021422 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:19:09 AM UTC 24 |
| Finished | Sep 24 09:19:12 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=875878532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_link_in_err.875878532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_link_resume.2897997350 |
| Short name | T2362 |
| Test name | |
| Test status | |
| Simulation time | 31651006359 ps |
| CPU time | 49.27 seconds |
| Started | Sep 24 09:19:09 AM UTC 24 |
| Finished | Sep 24 09:20:00 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2897997350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_resume.2897997350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_link_suspend.319185828 |
| Short name | T2316 |
| Test name | |
| Test status | |
| Simulation time | 6267207904 ps |
| CPU time | 9.2 seconds |
| Started | Sep 24 09:19:09 AM UTC 24 |
| Finished | Sep 24 09:19:20 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=319185828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_suspend.319185828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_low_speed_traffic.2495854234 |
| Short name | T2342 |
| Test name | |
| Test status | |
| Simulation time | 4517186739 ps |
| CPU time | 31.97 seconds |
| Started | Sep 24 09:19:09 AM UTC 24 |
| Finished | Sep 24 09:19:43 AM UTC 24 |
| Peak memory | 234672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2495854234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_low_speed_traffic.2495854234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_max_inter_pkt_delay.1360939894 |
| Short name | T2338 |
| Test name | |
| Test status | |
| Simulation time | 3004912107 ps |
| CPU time | 20.44 seconds |
| Started | Sep 24 09:19:09 AM UTC 24 |
| Finished | Sep 24 09:19:31 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1360939894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_inter_pkt_delay.1360939894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_in_transaction.3316326315 |
| Short name | T2309 |
| Test name | |
| Test status | |
| Simulation time | 238200305 ps |
| CPU time | 1.63 seconds |
| Started | Sep 24 09:19:09 AM UTC 24 |
| Finished | Sep 24 09:19:12 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3316326315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_in_transaction.3316326315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_out_transaction.2442521461 |
| Short name | T2306 |
| Test name | |
| Test status | |
| Simulation time | 191800618 ps |
| CPU time | 1.3 seconds |
| Started | Sep 24 09:19:09 AM UTC 24 |
| Finished | Sep 24 09:19:12 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2442521461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_out_transaction.2442521461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_min_inter_pkt_delay.2867283247 |
| Short name | T2389 |
| Test name | |
| Test status | |
| Simulation time | 2862358820 ps |
| CPU time | 71.04 seconds |
| Started | Sep 24 09:19:09 AM UTC 24 |
| Finished | Sep 24 09:20:22 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2867283247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_inter_pkt_delay.2867283247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_in_transaction.248385928 |
| Short name | T2307 |
| Test name | |
| Test status | |
| Simulation time | 187595466 ps |
| CPU time | 1.25 seconds |
| Started | Sep 24 09:19:09 AM UTC 24 |
| Finished | Sep 24 09:19:12 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=248385928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_in_transaction.248385928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_out_transaction.209088770 |
| Short name | T2308 |
| Test name | |
| Test status | |
| Simulation time | 152172702 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:19:09 AM UTC 24 |
| Finished | Sep 24 09:19:12 AM UTC 24 |
| Peak memory | 215968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=209088770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 33.usbdev_min_length_out_transaction.209088770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_nak_trans.2918207885 |
| Short name | T142 |
| Test name | |
| Test status | |
| Simulation time | 255759425 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:19:10 AM UTC 24 |
| Finished | Sep 24 09:19:12 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2918207885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_nak_trans.2918207885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_out_iso.327760620 |
| Short name | T2303 |
| Test name | |
| Test status | |
| Simulation time | 153643103 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:19:10 AM UTC 24 |
| Finished | Sep 24 09:19:12 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=327760620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 33.usbdev_out_iso.327760620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_out_stall.1222129341 |
| Short name | T2305 |
| Test name | |
| Test status | |
| Simulation time | 198613427 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:19:10 AM UTC 24 |
| Finished | Sep 24 09:19:12 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1222129341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_out_stall.1222129341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_out_trans_nak.3575060478 |
| Short name | T2310 |
| Test name | |
| Test status | |
| Simulation time | 165571595 ps |
| CPU time | 1.33 seconds |
| Started | Sep 24 09:19:10 AM UTC 24 |
| Finished | Sep 24 09:19:12 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3575060478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_out_trans_nak.3575060478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_pending_in_trans.718622919 |
| Short name | T2320 |
| Test name | |
| Test status | |
| Simulation time | 157050439 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:19:25 AM UTC 24 |
| Finished | Sep 24 09:19:27 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=718622919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_pending_in_trans.718622919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_pinflip.643070473 |
| Short name | T2325 |
| Test name | |
| Test status | |
| Simulation time | 224775733 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:19:25 AM UTC 24 |
| Finished | Sep 24 09:19:27 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=643070473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_pinflip.643070473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_usb_ref_disable.1847738475 |
| Short name | T2322 |
| Test name | |
| Test status | |
| Simulation time | 142390395 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:19:25 AM UTC 24 |
| Finished | Sep 24 09:19:27 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1847738475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_usb_ref_disable.1847738475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_phy_pins_sense.1937232849 |
| Short name | T2321 |
| Test name | |
| Test status | |
| Simulation time | 38982513 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:19:25 AM UTC 24 |
| Finished | Sep 24 09:19:27 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1937232849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_pins_sense.1937232849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_buffer.2918823667 |
| Short name | T2360 |
| Test name | |
| Test status | |
| Simulation time | 10051941219 ps |
| CPU time | 26.95 seconds |
| Started | Sep 24 09:19:25 AM UTC 24 |
| Finished | Sep 24 09:19:54 AM UTC 24 |
| Peak memory | 235140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2918823667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_pkt_buffer.2918823667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_received.1036944472 |
| Short name | T2323 |
| Test name | |
| Test status | |
| Simulation time | 232799832 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:19:25 AM UTC 24 |
| Finished | Sep 24 09:19:27 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1036944472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_pkt_received.1036944472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_sent.1712361529 |
| Short name | T2329 |
| Test name | |
| Test status | |
| Simulation time | 180624514 ps |
| CPU time | 1.16 seconds |
| Started | Sep 24 09:19:25 AM UTC 24 |
| Finished | Sep 24 09:19:28 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1712361529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_pkt_sent.1712361529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_in_transaction.2524187280 |
| Short name | T2326 |
| Test name | |
| Test status | |
| Simulation time | 203866679 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:19:25 AM UTC 24 |
| Finished | Sep 24 09:19:27 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2524187280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_random_length_in_transaction.2524187280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_out_transaction.1376395271 |
| Short name | T2328 |
| Test name | |
| Test status | |
| Simulation time | 179438820 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:19:25 AM UTC 24 |
| Finished | Sep 24 09:19:28 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1376395271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_random_length_out_transaction.1376395271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_rx_crc_err.2476923147 |
| Short name | T2324 |
| Test name | |
| Test status | |
| Simulation time | 174310605 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 09:19:25 AM UTC 24 |
| Finished | Sep 24 09:19:27 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2476923147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_rx_crc_err.2476923147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_rx_full.2955965512 |
| Short name | T2336 |
| Test name | |
| Test status | |
| Simulation time | 428915187 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:19:26 AM UTC 24 |
| Finished | Sep 24 09:19:28 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2955965512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_rx_full.2955965512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_setup_stage.3821050384 |
| Short name | T2330 |
| Test name | |
| Test status | |
| Simulation time | 172207322 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:19:26 AM UTC 24 |
| Finished | Sep 24 09:19:28 AM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3821050384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_setup_stage.3821050384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_setup_trans_ignored.3149098755 |
| Short name | T2327 |
| Test name | |
| Test status | |
| Simulation time | 148650967 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:19:26 AM UTC 24 |
| Finished | Sep 24 09:19:27 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3149098755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 33.usbdev_setup_trans_ignored.3149098755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_smoke.952165475 |
| Short name | T2334 |
| Test name | |
| Test status | |
| Simulation time | 241128269 ps |
| CPU time | 1.31 seconds |
| Started | Sep 24 09:19:26 AM UTC 24 |
| Finished | Sep 24 09:19:28 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=952165475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_smoke.952165475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_spurious_pids_ignored.1628725004 |
| Short name | T2412 |
| Test name | |
| Test status | |
| Simulation time | 2593132411 ps |
| CPU time | 63.99 seconds |
| Started | Sep 24 09:19:26 AM UTC 24 |
| Finished | Sep 24 09:20:31 AM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1628725004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_spurious_pids_ignored.1628725004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_stall_priority_over_nak.1429414480 |
| Short name | T2332 |
| Test name | |
| Test status | |
| Simulation time | 183966818 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:19:26 AM UTC 24 |
| Finished | Sep 24 09:19:28 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1429414480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stall_priority_over_nak.1429414480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_stall_trans.470861745 |
| Short name | T2331 |
| Test name | |
| Test status | |
| Simulation time | 173495229 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 09:19:26 AM UTC 24 |
| Finished | Sep 24 09:19:28 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=470861745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_stall_trans.470861745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_stream_len_max.3729721561 |
| Short name | T2335 |
| Test name | |
| Test status | |
| Simulation time | 310570402 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:19:26 AM UTC 24 |
| Finished | Sep 24 09:19:28 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3729721561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stream_len_max.3729721561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_streaming_out.529874743 |
| Short name | T2402 |
| Test name | |
| Test status | |
| Simulation time | 2330910301 ps |
| CPU time | 56.91 seconds |
| Started | Sep 24 09:19:26 AM UTC 24 |
| Finished | Sep 24 09:20:24 AM UTC 24 |
| Peak memory | 234932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=529874743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_streaming_out.529874743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_timeout_missing_host_handshake.701508250 |
| Short name | T2296 |
| Test name | |
| Test status | |
| Simulation time | 577340291 ps |
| CPU time | 9.81 seconds |
| Started | Sep 24 09:18:51 AM UTC 24 |
| Finished | Sep 24 09:19:02 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=701508250 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_timeout_missing_host_handshake.701508250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/33.usbdev_tx_rx_disruption.2915945860 |
| Short name | T2337 |
| Test name | |
| Test status | |
| Simulation time | 550893528 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:19:26 AM UTC 24 |
| Finished | Sep 24 09:19:29 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2915945860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_t x_rx_disruption.2915945860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/33.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/330.usbdev_tx_rx_disruption.2929697696 |
| Short name | T3641 |
| Test name | |
| Test status | |
| Simulation time | 650621565 ps |
| CPU time | 2.19 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:22 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2929697696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 330.usbdev_ tx_rx_disruption.2929697696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/330.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/331.usbdev_tx_rx_disruption.1558806 |
| Short name | T3627 |
| Test name | |
| Test status | |
| Simulation time | 578975834 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1558806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 331.usbdev_tx_ rx_disruption.1558806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/331.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/332.usbdev_tx_rx_disruption.3489026253 |
| Short name | T3633 |
| Test name | |
| Test status | |
| Simulation time | 453443516 ps |
| CPU time | 1.91 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:22 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3489026253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 332.usbdev_ tx_rx_disruption.3489026253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/332.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/333.usbdev_tx_rx_disruption.178479294 |
| Short name | T3628 |
| Test name | |
| Test status | |
| Simulation time | 452011680 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=178479294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 333.usbdev_t x_rx_disruption.178479294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/333.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/334.usbdev_tx_rx_disruption.3703715691 |
| Short name | T3629 |
| Test name | |
| Test status | |
| Simulation time | 515790639 ps |
| CPU time | 1.76 seconds |
| Started | Sep 24 09:45:18 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3703715691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 334.usbdev_ tx_rx_disruption.3703715691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/334.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/335.usbdev_tx_rx_disruption.3763741789 |
| Short name | T3626 |
| Test name | |
| Test status | |
| Simulation time | 508879682 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 09:45:19 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3763741789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 335.usbdev_ tx_rx_disruption.3763741789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/335.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/336.usbdev_tx_rx_disruption.1425344148 |
| Short name | T3637 |
| Test name | |
| Test status | |
| Simulation time | 615403397 ps |
| CPU time | 1.82 seconds |
| Started | Sep 24 09:45:19 AM UTC 24 |
| Finished | Sep 24 09:45:22 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1425344148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 336.usbdev_ tx_rx_disruption.1425344148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/336.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/337.usbdev_tx_rx_disruption.3576886948 |
| Short name | T3632 |
| Test name | |
| Test status | |
| Simulation time | 441137302 ps |
| CPU time | 1.76 seconds |
| Started | Sep 24 09:45:19 AM UTC 24 |
| Finished | Sep 24 09:45:22 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3576886948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 337.usbdev_ tx_rx_disruption.3576886948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/337.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/338.usbdev_tx_rx_disruption.2887063250 |
| Short name | T3630 |
| Test name | |
| Test status | |
| Simulation time | 451379666 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 09:45:19 AM UTC 24 |
| Finished | Sep 24 09:45:21 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2887063250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 338.usbdev_ tx_rx_disruption.2887063250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/338.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/339.usbdev_tx_rx_disruption.3010697569 |
| Short name | T3645 |
| Test name | |
| Test status | |
| Simulation time | 543477057 ps |
| CPU time | 1.97 seconds |
| Started | Sep 24 09:45:19 AM UTC 24 |
| Finished | Sep 24 09:45:22 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3010697569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 339.usbdev_ tx_rx_disruption.3010697569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/339.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_alert_test.3050289454 |
| Short name | T2398 |
| Test name | |
| Test status | |
| Simulation time | 62788577 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:24 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3050289454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 34.usbdev_alert_test.3050289454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_disconnect.758074608 |
| Short name | T2363 |
| Test name | |
| Test status | |
| Simulation time | 10739086391 ps |
| CPU time | 16.75 seconds |
| Started | Sep 24 09:19:45 AM UTC 24 |
| Finished | Sep 24 09:20:03 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=758074608 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_disconnect.758074608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_reset.3993443316 |
| Short name | T2365 |
| Test name | |
| Test status | |
| Simulation time | 14536326894 ps |
| CPU time | 18.83 seconds |
| Started | Sep 24 09:19:45 AM UTC 24 |
| Finished | Sep 24 09:20:05 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3993443316 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_reset.3993443316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_resume.808399163 |
| Short name | T2388 |
| Test name | |
| Test status | |
| Simulation time | 23351086355 ps |
| CPU time | 34.23 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:20:21 AM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=808399163 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_resume.808399163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_av_buffer.280849415 |
| Short name | T2345 |
| Test name | |
| Test status | |
| Simulation time | 152821626 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:19:48 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=280849415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_av_buffer.280849415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_bitstuff_err.1397224364 |
| Short name | T2346 |
| Test name | |
| Test status | |
| Simulation time | 143749841 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:19:48 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1397224364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_bitstuff_err.1397224364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_clear.3957862739 |
| Short name | T2347 |
| Test name | |
| Test status | |
| Simulation time | 160569854 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:19:48 AM UTC 24 |
| Peak memory | 213964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3957862739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 34.usbdev_data_toggle_clear.3957862739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_restore.1163785795 |
| Short name | T2355 |
| Test name | |
| Test status | |
| Simulation time | 803847435 ps |
| CPU time | 2.36 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:19:49 AM UTC 24 |
| Peak memory | 218016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1163785795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_restore.1163785795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_device_address.901711531 |
| Short name | T2386 |
| Test name | |
| Test status | |
| Simulation time | 17677584932 ps |
| CPU time | 28.46 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:20:16 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=901711531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_device_address.901711531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_device_timeout.1245065788 |
| Short name | T2385 |
| Test name | |
| Test status | |
| Simulation time | 1415032809 ps |
| CPU time | 27.26 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:20:14 AM UTC 24 |
| Peak memory | 217908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1245065788 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_timeout.1245065788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_disable_endpoint.1411936145 |
| Short name | T2357 |
| Test name | |
| Test status | |
| Simulation time | 823807815 ps |
| CPU time | 2.5 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:19:49 AM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1411936145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_disable_endpoint.1411936145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_disconnected.1841164555 |
| Short name | T2348 |
| Test name | |
| Test status | |
| Simulation time | 150448339 ps |
| CPU time | 0.89 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:19:48 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1841164555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_disconnected.1841164555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_enable.4274890837 |
| Short name | T2351 |
| Test name | |
| Test status | |
| Simulation time | 75875502 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:19:48 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4274890837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 34.usbdev_enable.4274890837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_access.1323939622 |
| Short name | T2358 |
| Test name | |
| Test status | |
| Simulation time | 843567807 ps |
| CPU time | 2.63 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:19:50 AM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1323939622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_access.1323939622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_types.2452972973 |
| Short name | T519 |
| Test name | |
| Test status | |
| Simulation time | 299664475 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:19:48 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2452972973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_types.2452972973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_levels.153389756 |
| Short name | T2349 |
| Test name | |
| Test status | |
| Simulation time | 183165912 ps |
| CPU time | 0.96 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:19:48 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=153389756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_fifo_levels.153389756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_rst.192021694 |
| Short name | T2356 |
| Test name | |
| Test status | |
| Simulation time | 282517112 ps |
| CPU time | 2.05 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:19:49 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=192021694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_fifo_rst.192021694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_in_iso.3848592011 |
| Short name | T2352 |
| Test name | |
| Test status | |
| Simulation time | 161799387 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:19:48 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3848592011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_in_iso.3848592011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_in_stall.45482269 |
| Short name | T2350 |
| Test name | |
| Test status | |
| Simulation time | 139400448 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:19:48 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=45482269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 34.usbdev_in_stall.45482269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_in_trans.2479212315 |
| Short name | T2354 |
| Test name | |
| Test status | |
| Simulation time | 253819692 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:19:48 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2479212315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_trans.2479212315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_invalid_sync.3136789663 |
| Short name | T2484 |
| Test name | |
| Test status | |
| Simulation time | 4082829800 ps |
| CPU time | 106.64 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:21:35 AM UTC 24 |
| Peak memory | 230664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3136789663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 34.usbdev_invalid_sync.3136789663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_iso_retraction.766167441 |
| Short name | T2464 |
| Test name | |
| Test status | |
| Simulation time | 9069853114 ps |
| CPU time | 94.39 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:21:23 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=766167441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 34.usbdev_iso_retraction.766167441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_link_in_err.1439347080 |
| Short name | T2353 |
| Test name | |
| Test status | |
| Simulation time | 208704623 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:19:48 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1439347080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_in_err.1439347080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_link_resume.1495381777 |
| Short name | T2411 |
| Test name | |
| Test status | |
| Simulation time | 28286880260 ps |
| CPU time | 43.17 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:20:31 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1495381777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_resume.1495381777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_link_suspend.547633534 |
| Short name | T2361 |
| Test name | |
| Test status | |
| Simulation time | 4816285167 ps |
| CPU time | 6.83 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:19:54 AM UTC 24 |
| Peak memory | 228360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=547633534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_suspend.547633534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_low_speed_traffic.1890381346 |
| Short name | T2436 |
| Test name | |
| Test status | |
| Simulation time | 4985969702 ps |
| CPU time | 44.98 seconds |
| Started | Sep 24 09:20:03 AM UTC 24 |
| Finished | Sep 24 09:20:50 AM UTC 24 |
| Peak memory | 230664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1890381346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_low_speed_traffic.1890381346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_max_inter_pkt_delay.3587679143 |
| Short name | T2387 |
| Test name | |
| Test status | |
| Simulation time | 1894247895 ps |
| CPU time | 15.42 seconds |
| Started | Sep 24 09:20:03 AM UTC 24 |
| Finished | Sep 24 09:20:20 AM UTC 24 |
| Peak memory | 228220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3587679143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_inter_pkt_delay.3587679143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_in_transaction.267677914 |
| Short name | T2366 |
| Test name | |
| Test status | |
| Simulation time | 289522421 ps |
| CPU time | 1.16 seconds |
| Started | Sep 24 09:20:03 AM UTC 24 |
| Finished | Sep 24 09:20:06 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=267677914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_in_transaction.267677914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_out_transaction.126200632 |
| Short name | T2364 |
| Test name | |
| Test status | |
| Simulation time | 190334372 ps |
| CPU time | 0.92 seconds |
| Started | Sep 24 09:20:03 AM UTC 24 |
| Finished | Sep 24 09:20:05 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=126200632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 34.usbdev_max_length_out_transaction.126200632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_min_inter_pkt_delay.3093218410 |
| Short name | T2460 |
| Test name | |
| Test status | |
| Simulation time | 2910554601 ps |
| CPU time | 72.25 seconds |
| Started | Sep 24 09:20:04 AM UTC 24 |
| Finished | Sep 24 09:21:17 AM UTC 24 |
| Peak memory | 228460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3093218410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_inter_pkt_delay.3093218410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_in_transaction.3401931509 |
| Short name | T2368 |
| Test name | |
| Test status | |
| Simulation time | 182803101 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:20:04 AM UTC 24 |
| Finished | Sep 24 09:20:06 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3401931509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_in_transaction.3401931509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_out_transaction.930050179 |
| Short name | T2375 |
| Test name | |
| Test status | |
| Simulation time | 148787335 ps |
| CPU time | 1.4 seconds |
| Started | Sep 24 09:20:04 AM UTC 24 |
| Finished | Sep 24 09:20:06 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=930050179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 34.usbdev_min_length_out_transaction.930050179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_nak_trans.2346253804 |
| Short name | T161 |
| Test name | |
| Test status | |
| Simulation time | 205008776 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 09:20:04 AM UTC 24 |
| Finished | Sep 24 09:20:06 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2346253804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_nak_trans.2346253804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_out_iso.3567556017 |
| Short name | T2367 |
| Test name | |
| Test status | |
| Simulation time | 172652870 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:20:04 AM UTC 24 |
| Finished | Sep 24 09:20:06 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3567556017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_out_iso.3567556017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_out_stall.2028086094 |
| Short name | T2376 |
| Test name | |
| Test status | |
| Simulation time | 154509120 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 09:20:04 AM UTC 24 |
| Finished | Sep 24 09:20:06 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2028086094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_out_stall.2028086094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_out_trans_nak.1118744594 |
| Short name | T2370 |
| Test name | |
| Test status | |
| Simulation time | 147143691 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:20:04 AM UTC 24 |
| Finished | Sep 24 09:20:06 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1118744594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_out_trans_nak.1118744594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_pending_in_trans.3936404533 |
| Short name | T2371 |
| Test name | |
| Test status | |
| Simulation time | 166732464 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:20:04 AM UTC 24 |
| Finished | Sep 24 09:20:06 AM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3936404533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_pending_in_trans.3936404533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_pinflip.4253832138 |
| Short name | T2372 |
| Test name | |
| Test status | |
| Simulation time | 212554457 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:20:04 AM UTC 24 |
| Finished | Sep 24 09:20:06 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4253832138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_pinflip.4253832138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_usb_ref_disable.1578221240 |
| Short name | T2373 |
| Test name | |
| Test status | |
| Simulation time | 144899916 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:20:04 AM UTC 24 |
| Finished | Sep 24 09:20:06 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1578221240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_usb_ref_disable.1578221240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_phy_pins_sense.4133128998 |
| Short name | T2369 |
| Test name | |
| Test status | |
| Simulation time | 43055599 ps |
| CPU time | 0.92 seconds |
| Started | Sep 24 09:20:04 AM UTC 24 |
| Finished | Sep 24 09:20:06 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4133128998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_pins_sense.4133128998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_buffer.694241198 |
| Short name | T2434 |
| Test name | |
| Test status | |
| Simulation time | 16249231327 ps |
| CPU time | 42.64 seconds |
| Started | Sep 24 09:20:04 AM UTC 24 |
| Finished | Sep 24 09:20:48 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=694241198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_pkt_buffer.694241198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_received.434292015 |
| Short name | T2379 |
| Test name | |
| Test status | |
| Simulation time | 151193919 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:20:04 AM UTC 24 |
| Finished | Sep 24 09:20:06 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=434292015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_pkt_received.434292015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_sent.2244563285 |
| Short name | T2380 |
| Test name | |
| Test status | |
| Simulation time | 253630504 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:20:04 AM UTC 24 |
| Finished | Sep 24 09:20:06 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2244563285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_pkt_sent.2244563285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_in_transaction.850552431 |
| Short name | T2378 |
| Test name | |
| Test status | |
| Simulation time | 183130348 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:20:04 AM UTC 24 |
| Finished | Sep 24 09:20:06 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=850552431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_random_length_in_transaction.850552431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_out_transaction.825659708 |
| Short name | T2374 |
| Test name | |
| Test status | |
| Simulation time | 150320671 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:20:04 AM UTC 24 |
| Finished | Sep 24 09:20:06 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=825659708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 34.usbdev_random_length_out_transaction.825659708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_rx_crc_err.3411996116 |
| Short name | T2377 |
| Test name | |
| Test status | |
| Simulation time | 178443094 ps |
| CPU time | 0.94 seconds |
| Started | Sep 24 09:20:04 AM UTC 24 |
| Finished | Sep 24 09:20:06 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3411996116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_rx_crc_err.3411996116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_rx_full.2291812499 |
| Short name | T2381 |
| Test name | |
| Test status | |
| Simulation time | 322055793 ps |
| CPU time | 1.38 seconds |
| Started | Sep 24 09:20:04 AM UTC 24 |
| Finished | Sep 24 09:20:07 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2291812499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_rx_full.2291812499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_setup_stage.2368571076 |
| Short name | T2392 |
| Test name | |
| Test status | |
| Simulation time | 151662412 ps |
| CPU time | 0.87 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:24 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2368571076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_setup_stage.2368571076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_setup_trans_ignored.56808154 |
| Short name | T2391 |
| Test name | |
| Test status | |
| Simulation time | 148818461 ps |
| CPU time | 0.84 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:23 AM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=56808154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 34.usbdev_setup_trans_ignored.56808154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_smoke.2417426638 |
| Short name | T2397 |
| Test name | |
| Test status | |
| Simulation time | 248494954 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:24 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2417426638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_smoke.2417426638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_spurious_pids_ignored.4213491572 |
| Short name | T2435 |
| Test name | |
| Test status | |
| Simulation time | 2917758533 ps |
| CPU time | 25.6 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:49 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4213491572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_spurious_pids_ignored.4213491572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_stall_priority_over_nak.3813934058 |
| Short name | T2401 |
| Test name | |
| Test status | |
| Simulation time | 200385705 ps |
| CPU time | 1.34 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:24 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3813934058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stall_priority_over_nak.3813934058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_stall_trans.1122048474 |
| Short name | T2394 |
| Test name | |
| Test status | |
| Simulation time | 194916871 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:24 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1122048474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_stall_trans.1122048474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_stream_len_max.2691985280 |
| Short name | T2407 |
| Test name | |
| Test status | |
| Simulation time | 1152630020 ps |
| CPU time | 3.26 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:26 AM UTC 24 |
| Peak memory | 217988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2691985280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stream_len_max.2691985280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_streaming_out.4159051227 |
| Short name | T2415 |
| Test name | |
| Test status | |
| Simulation time | 2687379897 ps |
| CPU time | 17.67 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:41 AM UTC 24 |
| Peak memory | 228596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4159051227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_streaming_out.4159051227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_timeout_missing_host_handshake.1843739888 |
| Short name | T2384 |
| Test name | |
| Test status | |
| Simulation time | 2950073334 ps |
| CPU time | 22.78 seconds |
| Started | Sep 24 09:19:46 AM UTC 24 |
| Finished | Sep 24 09:20:10 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1843739888 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_timeout_missing_host_handshake.1843739888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/34.usbdev_tx_rx_disruption.4223481473 |
| Short name | T2404 |
| Test name | |
| Test status | |
| Simulation time | 655711196 ps |
| CPU time | 1.81 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:25 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4223481473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_t x_rx_disruption.4223481473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/34.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/340.usbdev_tx_rx_disruption.3902209472 |
| Short name | T3642 |
| Test name | |
| Test status | |
| Simulation time | 580193627 ps |
| CPU time | 1.89 seconds |
| Started | Sep 24 09:45:19 AM UTC 24 |
| Finished | Sep 24 09:45:22 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3902209472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 340.usbdev_ tx_rx_disruption.3902209472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/340.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/341.usbdev_tx_rx_disruption.1786767527 |
| Short name | T3634 |
| Test name | |
| Test status | |
| Simulation time | 540108829 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:45:19 AM UTC 24 |
| Finished | Sep 24 09:45:22 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1786767527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 341.usbdev_ tx_rx_disruption.1786767527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/341.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/342.usbdev_tx_rx_disruption.3678032187 |
| Short name | T3640 |
| Test name | |
| Test status | |
| Simulation time | 520227744 ps |
| CPU time | 1.83 seconds |
| Started | Sep 24 09:45:19 AM UTC 24 |
| Finished | Sep 24 09:45:22 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3678032187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 342.usbdev_ tx_rx_disruption.3678032187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/342.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/343.usbdev_tx_rx_disruption.4258376399 |
| Short name | T3638 |
| Test name | |
| Test status | |
| Simulation time | 545416952 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:45:19 AM UTC 24 |
| Finished | Sep 24 09:45:22 AM UTC 24 |
| Peak memory | 215244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4258376399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 343.usbdev_ tx_rx_disruption.4258376399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/343.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/344.usbdev_tx_rx_disruption.493349500 |
| Short name | T3647 |
| Test name | |
| Test status | |
| Simulation time | 662050543 ps |
| CPU time | 2.08 seconds |
| Started | Sep 24 09:45:19 AM UTC 24 |
| Finished | Sep 24 09:45:22 AM UTC 24 |
| Peak memory | 217408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=493349500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 344.usbdev_t x_rx_disruption.493349500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/344.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/345.usbdev_tx_rx_disruption.3217133094 |
| Short name | T3639 |
| Test name | |
| Test status | |
| Simulation time | 637057025 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 09:45:19 AM UTC 24 |
| Finished | Sep 24 09:45:22 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3217133094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 345.usbdev_ tx_rx_disruption.3217133094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/345.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/346.usbdev_tx_rx_disruption.2676006483 |
| Short name | T3636 |
| Test name | |
| Test status | |
| Simulation time | 511947092 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:45:19 AM UTC 24 |
| Finished | Sep 24 09:45:22 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2676006483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 346.usbdev_ tx_rx_disruption.2676006483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/346.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/347.usbdev_tx_rx_disruption.2826328850 |
| Short name | T3644 |
| Test name | |
| Test status | |
| Simulation time | 560488465 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:45:19 AM UTC 24 |
| Finished | Sep 24 09:45:22 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2826328850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 347.usbdev_ tx_rx_disruption.2826328850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/347.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/348.usbdev_tx_rx_disruption.116900263 |
| Short name | T3643 |
| Test name | |
| Test status | |
| Simulation time | 495795807 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 09:45:19 AM UTC 24 |
| Finished | Sep 24 09:45:22 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=116900263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 348.usbdev_t x_rx_disruption.116900263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/348.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/349.usbdev_tx_rx_disruption.3600102707 |
| Short name | T3646 |
| Test name | |
| Test status | |
| Simulation time | 588045089 ps |
| CPU time | 1.99 seconds |
| Started | Sep 24 09:45:19 AM UTC 24 |
| Finished | Sep 24 09:45:22 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3600102707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 349.usbdev_ tx_rx_disruption.3600102707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/349.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_alert_test.963117696 |
| Short name | T2448 |
| Test name | |
| Test status | |
| Simulation time | 59625060 ps |
| CPU time | 0.81 seconds |
| Started | Sep 24 09:21:02 AM UTC 24 |
| Finished | Sep 24 09:21:04 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=963117696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_alert_test.963117696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_disconnect.1677567050 |
| Short name | T2413 |
| Test name | |
| Test status | |
| Simulation time | 9789738111 ps |
| CPU time | 14.73 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:38 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1677567050 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_disconnect.1677567050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_reset.612416120 |
| Short name | T2414 |
| Test name | |
| Test status | |
| Simulation time | 15072686076 ps |
| CPU time | 16.53 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:40 AM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=612416120 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_reset.612416120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_resume.2773867074 |
| Short name | T2395 |
| Test name | |
| Test status | |
| Simulation time | 26148499853 ps |
| CPU time | 35 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:58 AM UTC 24 |
| Peak memory | 228288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2773867074 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_resume.2773867074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_av_buffer.537519326 |
| Short name | T2399 |
| Test name | |
| Test status | |
| Simulation time | 151763778 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:24 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=537519326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_av_buffer.537519326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_bitstuff_err.4248486177 |
| Short name | T2400 |
| Test name | |
| Test status | |
| Simulation time | 146858408 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:24 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4248486177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_bitstuff_err.4248486177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_clear.796999313 |
| Short name | T2405 |
| Test name | |
| Test status | |
| Simulation time | 516978056 ps |
| CPU time | 2.19 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:25 AM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=796999313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_data_toggle_clear.796999313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_restore.3122620274 |
| Short name | T2408 |
| Test name | |
| Test status | |
| Simulation time | 1204424211 ps |
| CPU time | 3.04 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:26 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3122620274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_restore.3122620274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_device_address.2218264746 |
| Short name | T2485 |
| Test name | |
| Test status | |
| Simulation time | 43009002100 ps |
| CPU time | 70.97 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:21:35 AM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2218264746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_address.2218264746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_device_timeout.2337583752 |
| Short name | T2409 |
| Test name | |
| Test status | |
| Simulation time | 631212753 ps |
| CPU time | 4.53 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:28 AM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2337583752 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_timeout.2337583752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_disable_endpoint.2705003260 |
| Short name | T2406 |
| Test name | |
| Test status | |
| Simulation time | 1011083873 ps |
| CPU time | 2.2 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:26 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2705003260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_disable_endpoint.2705003260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_disconnected.4238893309 |
| Short name | T2403 |
| Test name | |
| Test status | |
| Simulation time | 145773917 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:24 AM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4238893309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_disconnected.4238893309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_enable.3102026590 |
| Short name | T2416 |
| Test name | |
| Test status | |
| Simulation time | 38453947 ps |
| CPU time | 0.74 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:44 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3102026590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 35.usbdev_enable.3102026590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_access.3762774682 |
| Short name | T2433 |
| Test name | |
| Test status | |
| Simulation time | 920692372 ps |
| CPU time | 2.91 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:47 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3762774682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_access.3762774682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_types.1666328308 |
| Short name | T490 |
| Test name | |
| Test status | |
| Simulation time | 673635586 ps |
| CPU time | 1.8 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:46 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1666328308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_types.1666328308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_levels.2522266255 |
| Short name | T2417 |
| Test name | |
| Test status | |
| Simulation time | 290113255 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:45 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2522266255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_fifo_levels.2522266255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_rst.2483196882 |
| Short name | T2432 |
| Test name | |
| Test status | |
| Simulation time | 189994072 ps |
| CPU time | 2.62 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:46 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2483196882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_fifo_rst.2483196882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_in_iso.3650387424 |
| Short name | T2419 |
| Test name | |
| Test status | |
| Simulation time | 242589881 ps |
| CPU time | 1.2 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:45 AM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3650387424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_in_iso.3650387424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_in_stall.3989703158 |
| Short name | T2418 |
| Test name | |
| Test status | |
| Simulation time | 151895089 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:45 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3989703158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_in_stall.3989703158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_in_trans.868254393 |
| Short name | T2420 |
| Test name | |
| Test status | |
| Simulation time | 201762138 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:45 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=868254393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_in_trans.868254393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_invalid_sync.56560947 |
| Short name | T2490 |
| Test name | |
| Test status | |
| Simulation time | 2168998943 ps |
| CPU time | 56.18 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:21:41 AM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=56560947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 35.usbdev_invalid_sync.56560947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_iso_retraction.500339769 |
| Short name | T2487 |
| Test name | |
| Test status | |
| Simulation time | 8965617683 ps |
| CPU time | 52.36 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:21:37 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=500339769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 35.usbdev_iso_retraction.500339769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_link_in_err.483523004 |
| Short name | T2421 |
| Test name | |
| Test status | |
| Simulation time | 233775585 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:45 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=483523004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_link_in_err.483523004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_link_resume.2041647955 |
| Short name | T2438 |
| Test name | |
| Test status | |
| Simulation time | 8532905293 ps |
| CPU time | 12.91 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:57 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2041647955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_resume.2041647955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_link_suspend.3422302284 |
| Short name | T2437 |
| Test name | |
| Test status | |
| Simulation time | 8483714403 ps |
| CPU time | 11.44 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:56 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3422302284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_link_suspend.3422302284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_low_speed_traffic.3751049665 |
| Short name | T2458 |
| Test name | |
| Test status | |
| Simulation time | 4243628665 ps |
| CPU time | 28.68 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:21:13 AM UTC 24 |
| Peak memory | 235084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3751049665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_low_speed_traffic.3751049665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_max_inter_pkt_delay.1856995163 |
| Short name | T2390 |
| Test name | |
| Test status | |
| Simulation time | 2577191280 ps |
| CPU time | 17.08 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:21:01 AM UTC 24 |
| Peak memory | 234716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1856995163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_inter_pkt_delay.1856995163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_in_transaction.2807250220 |
| Short name | T2427 |
| Test name | |
| Test status | |
| Simulation time | 244283270 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:46 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2807250220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_in_transaction.2807250220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_out_transaction.70844686 |
| Short name | T2429 |
| Test name | |
| Test status | |
| Simulation time | 204225413 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:46 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=70844686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 35.usbdev_max_length_out_transaction.70844686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_min_inter_pkt_delay.2764810787 |
| Short name | T2512 |
| Test name | |
| Test status | |
| Simulation time | 2797346140 ps |
| CPU time | 68.14 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:21:53 AM UTC 24 |
| Peak memory | 230392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2764810787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_inter_pkt_delay.2764810787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_in_transaction.1535551950 |
| Short name | T2423 |
| Test name | |
| Test status | |
| Simulation time | 159524298 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:45 AM UTC 24 |
| Peak memory | 215280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1535551950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_in_transaction.1535551950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_out_transaction.390229083 |
| Short name | T2422 |
| Test name | |
| Test status | |
| Simulation time | 186087219 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:45 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=390229083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 35.usbdev_min_length_out_transaction.390229083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_nak_trans.2279807132 |
| Short name | T2430 |
| Test name | |
| Test status | |
| Simulation time | 208604849 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:46 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2279807132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_nak_trans.2279807132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_out_iso.3313822085 |
| Short name | T2426 |
| Test name | |
| Test status | |
| Simulation time | 154383135 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:46 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3313822085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_out_iso.3313822085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_out_stall.287593875 |
| Short name | T2431 |
| Test name | |
| Test status | |
| Simulation time | 161151351 ps |
| CPU time | 1.34 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:46 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=287593875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_out_stall.287593875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_out_trans_nak.3324037996 |
| Short name | T2424 |
| Test name | |
| Test status | |
| Simulation time | 178500264 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:45 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3324037996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_out_trans_nak.3324037996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_pending_in_trans.2555111776 |
| Short name | T2425 |
| Test name | |
| Test status | |
| Simulation time | 162993710 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:46 AM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2555111776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_pending_in_trans.2555111776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_pinflip.4031322820 |
| Short name | T2428 |
| Test name | |
| Test status | |
| Simulation time | 188939104 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:20:43 AM UTC 24 |
| Finished | Sep 24 09:20:46 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4031322820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_pinflip.4031322820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_usb_ref_disable.2572352211 |
| Short name | T2445 |
| Test name | |
| Test status | |
| Simulation time | 155648586 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:21:02 AM UTC 24 |
| Finished | Sep 24 09:21:04 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2572352211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_usb_ref_disable.2572352211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_phy_pins_sense.1127105322 |
| Short name | T2396 |
| Test name | |
| Test status | |
| Simulation time | 38755494 ps |
| CPU time | 0.72 seconds |
| Started | Sep 24 09:21:02 AM UTC 24 |
| Finished | Sep 24 09:21:04 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1127105322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_pins_sense.1127105322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_buffer.655581620 |
| Short name | T2463 |
| Test name | |
| Test status | |
| Simulation time | 7639640832 ps |
| CPU time | 17.71 seconds |
| Started | Sep 24 09:21:02 AM UTC 24 |
| Finished | Sep 24 09:21:21 AM UTC 24 |
| Peak memory | 228220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=655581620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_pkt_buffer.655581620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_received.1951605605 |
| Short name | T2393 |
| Test name | |
| Test status | |
| Simulation time | 180645740 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:21:02 AM UTC 24 |
| Finished | Sep 24 09:21:04 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1951605605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_pkt_received.1951605605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_sent.3516308390 |
| Short name | T2447 |
| Test name | |
| Test status | |
| Simulation time | 169241892 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:21:02 AM UTC 24 |
| Finished | Sep 24 09:21:04 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3516308390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_pkt_sent.3516308390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_in_transaction.650122242 |
| Short name | T2449 |
| Test name | |
| Test status | |
| Simulation time | 235119925 ps |
| CPU time | 1.34 seconds |
| Started | Sep 24 09:21:02 AM UTC 24 |
| Finished | Sep 24 09:21:05 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=650122242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_random_length_in_transaction.650122242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_out_transaction.2305711166 |
| Short name | T2440 |
| Test name | |
| Test status | |
| Simulation time | 196223111 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:21:02 AM UTC 24 |
| Finished | Sep 24 09:21:04 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2305711166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_random_length_out_transaction.2305711166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_rx_crc_err.3572860930 |
| Short name | T2443 |
| Test name | |
| Test status | |
| Simulation time | 174685343 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:21:02 AM UTC 24 |
| Finished | Sep 24 09:21:04 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3572860930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_rx_crc_err.3572860930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_rx_full.4032893215 |
| Short name | T2450 |
| Test name | |
| Test status | |
| Simulation time | 247127855 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 09:21:02 AM UTC 24 |
| Finished | Sep 24 09:21:05 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4032893215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_rx_full.4032893215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_setup_stage.4274922494 |
| Short name | T2451 |
| Test name | |
| Test status | |
| Simulation time | 167169622 ps |
| CPU time | 1.23 seconds |
| Started | Sep 24 09:21:02 AM UTC 24 |
| Finished | Sep 24 09:21:05 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4274922494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_setup_stage.4274922494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_setup_trans_ignored.3192479443 |
| Short name | T2442 |
| Test name | |
| Test status | |
| Simulation time | 160050064 ps |
| CPU time | 0.87 seconds |
| Started | Sep 24 09:21:02 AM UTC 24 |
| Finished | Sep 24 09:21:04 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3192479443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 35.usbdev_setup_trans_ignored.3192479443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_smoke.201855308 |
| Short name | T2455 |
| Test name | |
| Test status | |
| Simulation time | 217271808 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:21:02 AM UTC 24 |
| Finished | Sep 24 09:21:05 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=201855308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_smoke.201855308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_spurious_pids_ignored.512424935 |
| Short name | T2462 |
| Test name | |
| Test status | |
| Simulation time | 2442409176 ps |
| CPU time | 16.75 seconds |
| Started | Sep 24 09:21:02 AM UTC 24 |
| Finished | Sep 24 09:21:20 AM UTC 24 |
| Peak memory | 228364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=512424935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_spurious_pids_ignored.512424935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_stall_priority_over_nak.1691895383 |
| Short name | T2454 |
| Test name | |
| Test status | |
| Simulation time | 177348269 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 09:21:02 AM UTC 24 |
| Finished | Sep 24 09:21:05 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1691895383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stall_priority_over_nak.1691895383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_stall_trans.3560749743 |
| Short name | T2452 |
| Test name | |
| Test status | |
| Simulation time | 217601798 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:21:02 AM UTC 24 |
| Finished | Sep 24 09:21:05 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3560749743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_stall_trans.3560749743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_stream_len_max.2568071254 |
| Short name | T2453 |
| Test name | |
| Test status | |
| Simulation time | 258202523 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:21:02 AM UTC 24 |
| Finished | Sep 24 09:21:05 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2568071254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stream_len_max.2568071254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_streaming_out.488403230 |
| Short name | T2459 |
| Test name | |
| Test status | |
| Simulation time | 1957265650 ps |
| CPU time | 12.93 seconds |
| Started | Sep 24 09:21:02 AM UTC 24 |
| Finished | Sep 24 09:21:17 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=488403230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_streaming_out.488403230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_timeout_missing_host_handshake.3128549795 |
| Short name | T2410 |
| Test name | |
| Test status | |
| Simulation time | 860554257 ps |
| CPU time | 4.88 seconds |
| Started | Sep 24 09:20:22 AM UTC 24 |
| Finished | Sep 24 09:20:28 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3128549795 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_timeout_missing_host_handshake.3128549795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/35.usbdev_tx_rx_disruption.239975817 |
| Short name | T2457 |
| Test name | |
| Test status | |
| Simulation time | 506817756 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:21:02 AM UTC 24 |
| Finished | Sep 24 09:21:05 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=239975817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_tx _rx_disruption.239975817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/35.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/350.usbdev_tx_rx_disruption.161567262 |
| Short name | T3649 |
| Test name | |
| Test status | |
| Simulation time | 580609261 ps |
| CPU time | 1.75 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:16 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=161567262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 350.usbdev_t x_rx_disruption.161567262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/350.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/351.usbdev_tx_rx_disruption.662768530 |
| Short name | T3607 |
| Test name | |
| Test status | |
| Simulation time | 429564699 ps |
| CPU time | 1.87 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:16 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=662768530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 351.usbdev_t x_rx_disruption.662768530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/351.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/352.usbdev_tx_rx_disruption.2920794131 |
| Short name | T3648 |
| Test name | |
| Test status | |
| Simulation time | 497622204 ps |
| CPU time | 2.02 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2920794131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 352.usbdev_ tx_rx_disruption.2920794131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/352.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/353.usbdev_tx_rx_disruption.558559052 |
| Short name | T3656 |
| Test name | |
| Test status | |
| Simulation time | 605742121 ps |
| CPU time | 2.19 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=558559052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 353.usbdev_t x_rx_disruption.558559052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/353.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/354.usbdev_tx_rx_disruption.927508873 |
| Short name | T3608 |
| Test name | |
| Test status | |
| Simulation time | 599369190 ps |
| CPU time | 1.98 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=927508873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 354.usbdev_t x_rx_disruption.927508873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/354.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/355.usbdev_tx_rx_disruption.2993320923 |
| Short name | T3654 |
| Test name | |
| Test status | |
| Simulation time | 628993144 ps |
| CPU time | 2.13 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2993320923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 355.usbdev_ tx_rx_disruption.2993320923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/355.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/356.usbdev_tx_rx_disruption.2909307235 |
| Short name | T3665 |
| Test name | |
| Test status | |
| Simulation time | 639764906 ps |
| CPU time | 2.35 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2909307235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 356.usbdev_ tx_rx_disruption.2909307235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/356.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/357.usbdev_tx_rx_disruption.3400149008 |
| Short name | T3650 |
| Test name | |
| Test status | |
| Simulation time | 512506255 ps |
| CPU time | 1.84 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3400149008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 357.usbdev_ tx_rx_disruption.3400149008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/357.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/358.usbdev_tx_rx_disruption.1120769965 |
| Short name | T3679 |
| Test name | |
| Test status | |
| Simulation time | 612657848 ps |
| CPU time | 2.79 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:18 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1120769965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 358.usbdev_ tx_rx_disruption.1120769965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/358.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/359.usbdev_tx_rx_disruption.3193330428 |
| Short name | T3652 |
| Test name | |
| Test status | |
| Simulation time | 464205191 ps |
| CPU time | 1.81 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3193330428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 359.usbdev_ tx_rx_disruption.3193330428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/359.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_alert_test.3132819767 |
| Short name | T2508 |
| Test name | |
| Test status | |
| Simulation time | 50258895 ps |
| CPU time | 0.65 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:21:51 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3132819767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 36.usbdev_alert_test.3132819767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_disconnect.4222348345 |
| Short name | T2461 |
| Test name | |
| Test status | |
| Simulation time | 11646169913 ps |
| CPU time | 15.06 seconds |
| Started | Sep 24 09:21:02 AM UTC 24 |
| Finished | Sep 24 09:21:19 AM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4222348345 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_disconnect.4222348345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_reset.2549753807 |
| Short name | T2469 |
| Test name | |
| Test status | |
| Simulation time | 19030521580 ps |
| CPU time | 23.2 seconds |
| Started | Sep 24 09:21:03 AM UTC 24 |
| Finished | Sep 24 09:21:27 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2549753807 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_reset.2549753807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_resume.1182812572 |
| Short name | T2489 |
| Test name | |
| Test status | |
| Simulation time | 31404569534 ps |
| CPU time | 36.03 seconds |
| Started | Sep 24 09:21:03 AM UTC 24 |
| Finished | Sep 24 09:21:40 AM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1182812572 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_resume.1182812572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_av_buffer.2376792675 |
| Short name | T2456 |
| Test name | |
| Test status | |
| Simulation time | 203814707 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:21:03 AM UTC 24 |
| Finished | Sep 24 09:21:05 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2376792675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_av_buffer.2376792675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_bitstuff_err.29553910 |
| Short name | T2465 |
| Test name | |
| Test status | |
| Simulation time | 166157385 ps |
| CPU time | 0.89 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:27 AM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=29553910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_bitstuff_err.29553910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_clear.90393932 |
| Short name | T2473 |
| Test name | |
| Test status | |
| Simulation time | 570491649 ps |
| CPU time | 1.92 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:28 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=90393932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_clear.90393932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_restore.3594999175 |
| Short name | T2482 |
| Test name | |
| Test status | |
| Simulation time | 1112575380 ps |
| CPU time | 3.12 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:29 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3594999175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_restore.3594999175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_device_address.3601514413 |
| Short name | T2491 |
| Test name | |
| Test status | |
| Simulation time | 13473496276 ps |
| CPU time | 21.61 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:48 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3601514413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_address.3601514413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_device_timeout.1052606449 |
| Short name | T2441 |
| Test name | |
| Test status | |
| Simulation time | 4360096447 ps |
| CPU time | 33.13 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:59 AM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1052606449 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_timeout.1052606449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_disable_endpoint.1781835468 |
| Short name | T2479 |
| Test name | |
| Test status | |
| Simulation time | 776822846 ps |
| CPU time | 2.16 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:28 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1781835468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 36.usbdev_disable_endpoint.1781835468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_disconnected.3515674202 |
| Short name | T2467 |
| Test name | |
| Test status | |
| Simulation time | 167028231 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:27 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3515674202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_disconnected.3515674202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_enable.336844198 |
| Short name | T2466 |
| Test name | |
| Test status | |
| Simulation time | 36646307 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:27 AM UTC 24 |
| Peak memory | 215692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=336844198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_enable.336844198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_access.3719285688 |
| Short name | T2480 |
| Test name | |
| Test status | |
| Simulation time | 927558681 ps |
| CPU time | 2.51 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:29 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3719285688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_access.3719285688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_types.3054469126 |
| Short name | T564 |
| Test name | |
| Test status | |
| Simulation time | 438114177 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:28 AM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3054469126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_types.3054469126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_levels.791900508 |
| Short name | T407 |
| Test name | |
| Test status | |
| Simulation time | 331430342 ps |
| CPU time | 1.23 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:27 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=791900508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_fifo_levels.791900508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_rst.1621927938 |
| Short name | T2481 |
| Test name | |
| Test status | |
| Simulation time | 434792057 ps |
| CPU time | 2.44 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:29 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1621927938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_fifo_rst.1621927938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_in_iso.2184540153 |
| Short name | T2472 |
| Test name | |
| Test status | |
| Simulation time | 251538541 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:27 AM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2184540153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_in_iso.2184540153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_in_stall.292941116 |
| Short name | T2471 |
| Test name | |
| Test status | |
| Simulation time | 135059685 ps |
| CPU time | 1.12 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:27 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=292941116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_in_stall.292941116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_in_trans.2851500356 |
| Short name | T2475 |
| Test name | |
| Test status | |
| Simulation time | 194189766 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:28 AM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2851500356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_trans.2851500356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_invalid_sync.1035912449 |
| Short name | T2444 |
| Test name | |
| Test status | |
| Simulation time | 3914154813 ps |
| CPU time | 33.37 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:22:00 AM UTC 24 |
| Peak memory | 230472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1035912449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 36.usbdev_invalid_sync.1035912449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_iso_retraction.857900483 |
| Short name | T2540 |
| Test name | |
| Test status | |
| Simulation time | 11790779313 ps |
| CPU time | 68 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:22:35 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=857900483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 36.usbdev_iso_retraction.857900483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_link_in_err.3042828093 |
| Short name | T2470 |
| Test name | |
| Test status | |
| Simulation time | 168404741 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:27 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3042828093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_in_err.3042828093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_link_resume.411215234 |
| Short name | T2486 |
| Test name | |
| Test status | |
| Simulation time | 6773848071 ps |
| CPU time | 9.68 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:36 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=411215234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_link_resume.411215234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_link_suspend.1013044492 |
| Short name | T2488 |
| Test name | |
| Test status | |
| Simulation time | 9138569115 ps |
| CPU time | 12.44 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:39 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1013044492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_link_suspend.1013044492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_low_speed_traffic.2819063315 |
| Short name | T2468 |
| Test name | |
| Test status | |
| Simulation time | 4345158275 ps |
| CPU time | 29.69 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:56 AM UTC 24 |
| Peak memory | 230436 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2819063315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_low_speed_traffic.2819063315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_max_inter_pkt_delay.3262959241 |
| Short name | T2533 |
| Test name | |
| Test status | |
| Simulation time | 2195850898 ps |
| CPU time | 53.75 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:22:21 AM UTC 24 |
| Peak memory | 228676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3262959241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_inter_pkt_delay.3262959241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_in_transaction.3917030846 |
| Short name | T2474 |
| Test name | |
| Test status | |
| Simulation time | 254742436 ps |
| CPU time | 1.23 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:28 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3917030846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_in_transaction.3917030846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_out_transaction.1172901655 |
| Short name | T2478 |
| Test name | |
| Test status | |
| Simulation time | 193051658 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:21:26 AM UTC 24 |
| Finished | Sep 24 09:21:28 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1172901655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_out_transaction.1172901655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_min_inter_pkt_delay.923747507 |
| Short name | T2584 |
| Test name | |
| Test status | |
| Simulation time | 3950851449 ps |
| CPU time | 99.18 seconds |
| Started | Sep 24 09:21:26 AM UTC 24 |
| Finished | Sep 24 09:23:07 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=923747507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_inter_pkt_delay.923747507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_in_transaction.531235792 |
| Short name | T2476 |
| Test name | |
| Test status | |
| Simulation time | 181360690 ps |
| CPU time | 1.23 seconds |
| Started | Sep 24 09:21:26 AM UTC 24 |
| Finished | Sep 24 09:21:28 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=531235792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_in_transaction.531235792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_out_transaction.1347767395 |
| Short name | T2477 |
| Test name | |
| Test status | |
| Simulation time | 165839934 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:21:26 AM UTC 24 |
| Finished | Sep 24 09:21:28 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1347767395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_out_transaction.1347767395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_out_iso.778866747 |
| Short name | T2493 |
| Test name | |
| Test status | |
| Simulation time | 205210403 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:21:47 AM UTC 24 |
| Finished | Sep 24 09:21:50 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=778866747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 36.usbdev_out_iso.778866747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_out_stall.1076164283 |
| Short name | T2492 |
| Test name | |
| Test status | |
| Simulation time | 167784948 ps |
| CPU time | 0.89 seconds |
| Started | Sep 24 09:21:47 AM UTC 24 |
| Finished | Sep 24 09:21:50 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1076164283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_out_stall.1076164283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_out_trans_nak.3731154399 |
| Short name | T2496 |
| Test name | |
| Test status | |
| Simulation time | 161831406 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:21:47 AM UTC 24 |
| Finished | Sep 24 09:21:50 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3731154399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_out_trans_nak.3731154399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_pending_in_trans.3909870919 |
| Short name | T2495 |
| Test name | |
| Test status | |
| Simulation time | 150900918 ps |
| CPU time | 0.89 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:21:50 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3909870919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 36.usbdev_pending_in_trans.3909870919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_pinflip.361655607 |
| Short name | T2507 |
| Test name | |
| Test status | |
| Simulation time | 252050899 ps |
| CPU time | 1.3 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:21:51 AM UTC 24 |
| Peak memory | 215248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=361655607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_pinflip.361655607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_usb_ref_disable.957613638 |
| Short name | T2509 |
| Test name | |
| Test status | |
| Simulation time | 171211286 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:21:51 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=957613638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 36.usbdev_phy_config_usb_ref_disable.957613638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_phy_pins_sense.3704182057 |
| Short name | T2497 |
| Test name | |
| Test status | |
| Simulation time | 32121091 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:21:50 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3704182057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_pins_sense.3704182057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_buffer.3178299299 |
| Short name | T2566 |
| Test name | |
| Test status | |
| Simulation time | 23324584549 ps |
| CPU time | 59.72 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:22:50 AM UTC 24 |
| Peak memory | 228316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3178299299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_pkt_buffer.3178299299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_received.1261007185 |
| Short name | T2499 |
| Test name | |
| Test status | |
| Simulation time | 207756137 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:21:50 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1261007185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_pkt_received.1261007185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_sent.104384604 |
| Short name | T2505 |
| Test name | |
| Test status | |
| Simulation time | 202096397 ps |
| CPU time | 1.2 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:21:51 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=104384604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_pkt_sent.104384604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_in_transaction.3302533116 |
| Short name | T2501 |
| Test name | |
| Test status | |
| Simulation time | 199030617 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:21:50 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3302533116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_random_length_in_transaction.3302533116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_out_transaction.2879462030 |
| Short name | T2494 |
| Test name | |
| Test status | |
| Simulation time | 168907955 ps |
| CPU time | 0.89 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:21:50 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2879462030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_random_length_out_transaction.2879462030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_rx_crc_err.1356328187 |
| Short name | T2506 |
| Test name | |
| Test status | |
| Simulation time | 171571336 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:21:51 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1356328187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_rx_crc_err.1356328187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_rx_full.2567530912 |
| Short name | T2510 |
| Test name | |
| Test status | |
| Simulation time | 267886507 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:21:51 AM UTC 24 |
| Peak memory | 215304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2567530912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_rx_full.2567530912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_setup_stage.1536458978 |
| Short name | T2498 |
| Test name | |
| Test status | |
| Simulation time | 148324168 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:21:50 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1536458978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_setup_stage.1536458978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_setup_trans_ignored.304789034 |
| Short name | T2502 |
| Test name | |
| Test status | |
| Simulation time | 148515760 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:21:51 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=304789034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 36.usbdev_setup_trans_ignored.304789034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_smoke.2134789268 |
| Short name | T2504 |
| Test name | |
| Test status | |
| Simulation time | 253435334 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:21:51 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2134789268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_smoke.2134789268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_spurious_pids_ignored.3070678066 |
| Short name | T2519 |
| Test name | |
| Test status | |
| Simulation time | 3743369407 ps |
| CPU time | 26.09 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:22:16 AM UTC 24 |
| Peak memory | 234820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3070678066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_spurious_pids_ignored.3070678066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_stall_priority_over_nak.4276381781 |
| Short name | T2503 |
| Test name | |
| Test status | |
| Simulation time | 171746348 ps |
| CPU time | 0.94 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:21:51 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4276381781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stall_priority_over_nak.4276381781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_stall_trans.1147730233 |
| Short name | T2500 |
| Test name | |
| Test status | |
| Simulation time | 199946995 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:21:50 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1147730233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_stall_trans.1147730233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_stream_len_max.3571844388 |
| Short name | T2511 |
| Test name | |
| Test status | |
| Simulation time | 490813585 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:21:51 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3571844388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stream_len_max.3571844388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_streaming_out.1993648874 |
| Short name | T2514 |
| Test name | |
| Test status | |
| Simulation time | 2831618472 ps |
| CPU time | 24.72 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:22:15 AM UTC 24 |
| Peak memory | 228680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1993648874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_streaming_out.1993648874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_timeout_missing_host_handshake.2100629207 |
| Short name | T2483 |
| Test name | |
| Test status | |
| Simulation time | 606265249 ps |
| CPU time | 4.43 seconds |
| Started | Sep 24 09:21:25 AM UTC 24 |
| Finished | Sep 24 09:21:30 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2100629207 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_timeout_missing_host_handshake.2100629207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/36.usbdev_tx_rx_disruption.13650428 |
| Short name | T2446 |
| Test name | |
| Test status | |
| Simulation time | 652730258 ps |
| CPU time | 1.8 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:21:51 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=13650428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_tx_ rx_disruption.13650428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/36.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/360.usbdev_tx_rx_disruption.446002312 |
| Short name | T3651 |
| Test name | |
| Test status | |
| Simulation time | 610514395 ps |
| CPU time | 1.84 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=446002312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 360.usbdev_t x_rx_disruption.446002312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/360.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/361.usbdev_tx_rx_disruption.360837354 |
| Short name | T3659 |
| Test name | |
| Test status | |
| Simulation time | 536333842 ps |
| CPU time | 2.04 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=360837354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 361.usbdev_t x_rx_disruption.360837354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/361.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/362.usbdev_tx_rx_disruption.728677010 |
| Short name | T3661 |
| Test name | |
| Test status | |
| Simulation time | 601525602 ps |
| CPU time | 2.03 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=728677010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 362.usbdev_t x_rx_disruption.728677010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/362.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/363.usbdev_tx_rx_disruption.932794382 |
| Short name | T3670 |
| Test name | |
| Test status | |
| Simulation time | 604319581 ps |
| CPU time | 2.43 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:18 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=932794382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 363.usbdev_t x_rx_disruption.932794382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/363.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/364.usbdev_tx_rx_disruption.1367766458 |
| Short name | T3680 |
| Test name | |
| Test status | |
| Simulation time | 531947934 ps |
| CPU time | 2.62 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:18 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1367766458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 364.usbdev_ tx_rx_disruption.1367766458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/364.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/365.usbdev_tx_rx_disruption.1566297657 |
| Short name | T3664 |
| Test name | |
| Test status | |
| Simulation time | 621350227 ps |
| CPU time | 2.05 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 217708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1566297657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 365.usbdev_ tx_rx_disruption.1566297657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/365.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/366.usbdev_tx_rx_disruption.2874415231 |
| Short name | T3666 |
| Test name | |
| Test status | |
| Simulation time | 619115571 ps |
| CPU time | 2.1 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2874415231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 366.usbdev_ tx_rx_disruption.2874415231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/366.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/367.usbdev_tx_rx_disruption.3238196697 |
| Short name | T3655 |
| Test name | |
| Test status | |
| Simulation time | 479859696 ps |
| CPU time | 1.76 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3238196697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 367.usbdev_ tx_rx_disruption.3238196697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/367.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/368.usbdev_tx_rx_disruption.2812283268 |
| Short name | T3687 |
| Test name | |
| Test status | |
| Simulation time | 654335779 ps |
| CPU time | 2.82 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:18 AM UTC 24 |
| Peak memory | 217712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2812283268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 368.usbdev_ tx_rx_disruption.2812283268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/368.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/369.usbdev_tx_rx_disruption.3295525140 |
| Short name | T3669 |
| Test name | |
| Test status | |
| Simulation time | 581431108 ps |
| CPU time | 2.17 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3295525140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 369.usbdev_ tx_rx_disruption.3295525140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/369.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_alert_test.490835145 |
| Short name | T2559 |
| Test name | |
| Test status | |
| Simulation time | 100932841 ps |
| CPU time | 0.85 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:41 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=490835145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_alert_test.490835145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_disconnect.3542590175 |
| Short name | T2513 |
| Test name | |
| Test status | |
| Simulation time | 10471205155 ps |
| CPU time | 15.53 seconds |
| Started | Sep 24 09:21:48 AM UTC 24 |
| Finished | Sep 24 09:22:06 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3542590175 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_disconnect.3542590175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_reset.3962272309 |
| Short name | T2564 |
| Test name | |
| Test status | |
| Simulation time | 20209506002 ps |
| CPU time | 27.3 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:42 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3962272309 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_reset.3962272309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_resume.3186001124 |
| Short name | T2565 |
| Test name | |
| Test status | |
| Simulation time | 24616357340 ps |
| CPU time | 32.74 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:48 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3186001124 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_resume.3186001124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_av_buffer.3176792635 |
| Short name | T2516 |
| Test name | |
| Test status | |
| Simulation time | 213534984 ps |
| CPU time | 0.96 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:16 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3176792635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_av_buffer.3176792635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_bitstuff_err.3397127948 |
| Short name | T2515 |
| Test name | |
| Test status | |
| Simulation time | 150355912 ps |
| CPU time | 0.87 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:16 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3397127948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_bitstuff_err.3397127948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_clear.2949717895 |
| Short name | T2527 |
| Test name | |
| Test status | |
| Simulation time | 318394343 ps |
| CPU time | 1.78 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:17 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2949717895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 37.usbdev_data_toggle_clear.2949717895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_restore.2448792373 |
| Short name | T2522 |
| Test name | |
| Test status | |
| Simulation time | 303655171 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:16 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2448792373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_data_toggle_restore.2448792373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_device_address.1889016097 |
| Short name | T2568 |
| Test name | |
| Test status | |
| Simulation time | 23623041234 ps |
| CPU time | 39.34 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:55 AM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1889016097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_address.1889016097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_device_timeout.2861128523 |
| Short name | T2539 |
| Test name | |
| Test status | |
| Simulation time | 2511889317 ps |
| CPU time | 18.68 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:34 AM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2861128523 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_timeout.2861128523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_disable_endpoint.824388324 |
| Short name | T2530 |
| Test name | |
| Test status | |
| Simulation time | 729167075 ps |
| CPU time | 1.95 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:17 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=824388324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_disable_endpoint.824388324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_disconnected.751921554 |
| Short name | T2517 |
| Test name | |
| Test status | |
| Simulation time | 144484968 ps |
| CPU time | 0.79 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:16 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=751921554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_disconnected.751921554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_enable.2502959902 |
| Short name | T2518 |
| Test name | |
| Test status | |
| Simulation time | 57138353 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:16 AM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2502959902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 37.usbdev_enable.2502959902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_access.289070818 |
| Short name | T2532 |
| Test name | |
| Test status | |
| Simulation time | 927124673 ps |
| CPU time | 2.57 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:18 AM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=289070818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_access.289070818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_types.3523311765 |
| Short name | T579 |
| Test name | |
| Test status | |
| Simulation time | 174777765 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:16 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3523311765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_types.3523311765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_levels.1057588903 |
| Short name | T324 |
| Test name | |
| Test status | |
| Simulation time | 299594315 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:17 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1057588903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_fifo_levels.1057588903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_rst.2012058974 |
| Short name | T2528 |
| Test name | |
| Test status | |
| Simulation time | 309357188 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:17 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2012058974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_fifo_rst.2012058974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_in_iso.628381256 |
| Short name | T2523 |
| Test name | |
| Test status | |
| Simulation time | 191420735 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:16 AM UTC 24 |
| Peak memory | 225976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=628381256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_in_iso.628381256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_in_stall.2855093538 |
| Short name | T2521 |
| Test name | |
| Test status | |
| Simulation time | 159929117 ps |
| CPU time | 0.83 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:16 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2855093538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_stall.2855093538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_in_trans.262901350 |
| Short name | T2524 |
| Test name | |
| Test status | |
| Simulation time | 172718319 ps |
| CPU time | 1.29 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:16 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=262901350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_in_trans.262901350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_invalid_sync.3236906384 |
| Short name | T2615 |
| Test name | |
| Test status | |
| Simulation time | 3298109710 ps |
| CPU time | 83.48 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:23:39 AM UTC 24 |
| Peak memory | 234888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3236906384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 37.usbdev_invalid_sync.3236906384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_iso_retraction.4110535179 |
| Short name | T2643 |
| Test name | |
| Test status | |
| Simulation time | 10435260413 ps |
| CPU time | 112.91 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:24:09 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4110535179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_iso_retraction.4110535179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_link_in_err.2790819442 |
| Short name | T2529 |
| Test name | |
| Test status | |
| Simulation time | 237825320 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:17 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2790819442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_in_err.2790819442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_link_resume.1150686148 |
| Short name | T2575 |
| Test name | |
| Test status | |
| Simulation time | 33877200918 ps |
| CPU time | 50.06 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:23:06 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1150686148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_resume.1150686148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_link_suspend.3960964237 |
| Short name | T2534 |
| Test name | |
| Test status | |
| Simulation time | 4920726839 ps |
| CPU time | 6.4 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:22 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960964237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_link_suspend.3960964237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_low_speed_traffic.2903426047 |
| Short name | T2537 |
| Test name | |
| Test status | |
| Simulation time | 2482808181 ps |
| CPU time | 16.52 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:32 AM UTC 24 |
| Peak memory | 230660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2903426047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_low_speed_traffic.2903426047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_max_inter_pkt_delay.2571598676 |
| Short name | T2535 |
| Test name | |
| Test status | |
| Simulation time | 1954757172 ps |
| CPU time | 13.16 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:29 AM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2571598676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_inter_pkt_delay.2571598676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_in_transaction.2114169788 |
| Short name | T2525 |
| Test name | |
| Test status | |
| Simulation time | 241681643 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:16 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2114169788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_in_transaction.2114169788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_out_transaction.2741624029 |
| Short name | T2531 |
| Test name | |
| Test status | |
| Simulation time | 186487317 ps |
| CPU time | 1.35 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:17 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2741624029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_out_transaction.2741624029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_min_inter_pkt_delay.2208635415 |
| Short name | T2538 |
| Test name | |
| Test status | |
| Simulation time | 2652289747 ps |
| CPU time | 17.33 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:33 AM UTC 24 |
| Peak memory | 217988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2208635415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_inter_pkt_delay.2208635415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_in_transaction.3209211334 |
| Short name | T2526 |
| Test name | |
| Test status | |
| Simulation time | 187847879 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:17 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3209211334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_in_transaction.3209211334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_out_transaction.1441129517 |
| Short name | T2543 |
| Test name | |
| Test status | |
| Simulation time | 144077895 ps |
| CPU time | 0.96 seconds |
| Started | Sep 24 09:22:37 AM UTC 24 |
| Finished | Sep 24 09:22:39 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1441129517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_out_transaction.1441129517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_nak_trans.12545331 |
| Short name | T2545 |
| Test name | |
| Test status | |
| Simulation time | 227715782 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:40 AM UTC 24 |
| Peak memory | 215968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=12545331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_nak_trans.12545331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_out_iso.4157796549 |
| Short name | T2542 |
| Test name | |
| Test status | |
| Simulation time | 158844491 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:39 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4157796549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_out_iso.4157796549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_out_stall.3815710369 |
| Short name | T2544 |
| Test name | |
| Test status | |
| Simulation time | 175177638 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:40 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3815710369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_out_stall.3815710369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_out_trans_nak.1352631277 |
| Short name | T2541 |
| Test name | |
| Test status | |
| Simulation time | 179951529 ps |
| CPU time | 0.82 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:39 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1352631277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_out_trans_nak.1352631277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_pending_in_trans.4111700355 |
| Short name | T2546 |
| Test name | |
| Test status | |
| Simulation time | 174388515 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:40 AM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4111700355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_pending_in_trans.4111700355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_pinflip.489216323 |
| Short name | T2548 |
| Test name | |
| Test status | |
| Simulation time | 243674587 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:40 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=489216323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_pinflip.489216323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_usb_ref_disable.3858718858 |
| Short name | T2549 |
| Test name | |
| Test status | |
| Simulation time | 220808387 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:40 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3858718858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_usb_ref_disable.3858718858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_phy_pins_sense.3867318608 |
| Short name | T2547 |
| Test name | |
| Test status | |
| Simulation time | 36590476 ps |
| CPU time | 0.69 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:40 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3867318608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_pins_sense.3867318608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_buffer.2832842978 |
| Short name | T2569 |
| Test name | |
| Test status | |
| Simulation time | 7559311615 ps |
| CPU time | 17.67 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:57 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2832842978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_pkt_buffer.2832842978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_received.478775230 |
| Short name | T2551 |
| Test name | |
| Test status | |
| Simulation time | 191233409 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:40 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=478775230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_pkt_received.478775230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_sent.1573308181 |
| Short name | T2556 |
| Test name | |
| Test status | |
| Simulation time | 165145295 ps |
| CPU time | 1.28 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:40 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1573308181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_pkt_sent.1573308181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_in_transaction.3494112277 |
| Short name | T2552 |
| Test name | |
| Test status | |
| Simulation time | 201741123 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:40 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3494112277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_random_length_in_transaction.3494112277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_out_transaction.3731169741 |
| Short name | T2554 |
| Test name | |
| Test status | |
| Simulation time | 154973693 ps |
| CPU time | 0.94 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:40 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3731169741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_random_length_out_transaction.3731169741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_rx_crc_err.3037152474 |
| Short name | T2553 |
| Test name | |
| Test status | |
| Simulation time | 143233123 ps |
| CPU time | 0.92 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:40 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3037152474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_rx_crc_err.3037152474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_rx_full.2223069322 |
| Short name | T2561 |
| Test name | |
| Test status | |
| Simulation time | 391800388 ps |
| CPU time | 1.38 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:41 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2223069322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_rx_full.2223069322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_setup_stage.1199753286 |
| Short name | T2550 |
| Test name | |
| Test status | |
| Simulation time | 154805201 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:40 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1199753286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_setup_stage.1199753286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_setup_trans_ignored.2915398196 |
| Short name | T2555 |
| Test name | |
| Test status | |
| Simulation time | 154019090 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:40 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2915398196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 37.usbdev_setup_trans_ignored.2915398196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_smoke.2176974102 |
| Short name | T2557 |
| Test name | |
| Test status | |
| Simulation time | 190358620 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:41 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2176974102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_smoke.2176974102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_spurious_pids_ignored.2939078048 |
| Short name | T2613 |
| Test name | |
| Test status | |
| Simulation time | 2151705984 ps |
| CPU time | 51.11 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:23:31 AM UTC 24 |
| Peak memory | 228268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2939078048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_spurious_pids_ignored.2939078048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_stall_priority_over_nak.4018583949 |
| Short name | T2560 |
| Test name | |
| Test status | |
| Simulation time | 205103436 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:41 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4018583949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stall_priority_over_nak.4018583949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_stall_trans.1378547850 |
| Short name | T2558 |
| Test name | |
| Test status | |
| Simulation time | 172195299 ps |
| CPU time | 0.92 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:41 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1378547850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_stall_trans.1378547850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_stream_len_max.12449620 |
| Short name | T2563 |
| Test name | |
| Test status | |
| Simulation time | 819540053 ps |
| CPU time | 2.28 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:42 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=12449620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_stream_len_max.12449620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_streaming_out.3834897754 |
| Short name | T2642 |
| Test name | |
| Test status | |
| Simulation time | 3460174519 ps |
| CPU time | 86.64 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:24:07 AM UTC 24 |
| Peak memory | 228616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3834897754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_streaming_out.3834897754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_timeout_missing_host_handshake.1350563963 |
| Short name | T2536 |
| Test name | |
| Test status | |
| Simulation time | 744071336 ps |
| CPU time | 13.76 seconds |
| Started | Sep 24 09:22:14 AM UTC 24 |
| Finished | Sep 24 09:22:29 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1350563963 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_timeout_missing_host_handshake.1350563963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/37.usbdev_tx_rx_disruption.317834283 |
| Short name | T2562 |
| Test name | |
| Test status | |
| Simulation time | 571179152 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:41 AM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=317834283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_tx _rx_disruption.317834283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/37.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/370.usbdev_tx_rx_disruption.1774854631 |
| Short name | T3660 |
| Test name | |
| Test status | |
| Simulation time | 589699581 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1774854631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 370.usbdev_ tx_rx_disruption.1774854631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/370.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/371.usbdev_tx_rx_disruption.3950548983 |
| Short name | T3658 |
| Test name | |
| Test status | |
| Simulation time | 598843902 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3950548983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 371.usbdev_ tx_rx_disruption.3950548983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/371.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/372.usbdev_tx_rx_disruption.3943714035 |
| Short name | T3662 |
| Test name | |
| Test status | |
| Simulation time | 536978201 ps |
| CPU time | 1.81 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3943714035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 372.usbdev_ tx_rx_disruption.3943714035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/372.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/373.usbdev_tx_rx_disruption.549805922 |
| Short name | T3668 |
| Test name | |
| Test status | |
| Simulation time | 449464016 ps |
| CPU time | 1.98 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=549805922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 373.usbdev_t x_rx_disruption.549805922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/373.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/374.usbdev_tx_rx_disruption.2228283254 |
| Short name | T3653 |
| Test name | |
| Test status | |
| Simulation time | 426959075 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2228283254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 374.usbdev_ tx_rx_disruption.2228283254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/374.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/375.usbdev_tx_rx_disruption.1304070900 |
| Short name | T3674 |
| Test name | |
| Test status | |
| Simulation time | 545123027 ps |
| CPU time | 2.02 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:18 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1304070900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 375.usbdev_ tx_rx_disruption.1304070900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/375.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/376.usbdev_tx_rx_disruption.410490802 |
| Short name | T3657 |
| Test name | |
| Test status | |
| Simulation time | 469479578 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=410490802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 376.usbdev_t x_rx_disruption.410490802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/376.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/377.usbdev_tx_rx_disruption.2294632094 |
| Short name | T3676 |
| Test name | |
| Test status | |
| Simulation time | 542105028 ps |
| CPU time | 2.14 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:18 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2294632094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 377.usbdev_ tx_rx_disruption.2294632094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/377.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/378.usbdev_tx_rx_disruption.1613381153 |
| Short name | T3671 |
| Test name | |
| Test status | |
| Simulation time | 493509622 ps |
| CPU time | 1.92 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:18 AM UTC 24 |
| Peak memory | 215424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1613381153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 378.usbdev_ tx_rx_disruption.1613381153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/378.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/379.usbdev_tx_rx_disruption.4023824400 |
| Short name | T3673 |
| Test name | |
| Test status | |
| Simulation time | 501613507 ps |
| CPU time | 2.07 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:18 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4023824400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 379.usbdev_ tx_rx_disruption.4023824400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/379.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_alert_test.195130447 |
| Short name | T2621 |
| Test name | |
| Test status | |
| Simulation time | 36104577 ps |
| CPU time | 0.75 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:23:47 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=195130447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_alert_test.195130447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_disconnect.2061413207 |
| Short name | T2567 |
| Test name | |
| Test status | |
| Simulation time | 10291338101 ps |
| CPU time | 14.14 seconds |
| Started | Sep 24 09:22:38 AM UTC 24 |
| Finished | Sep 24 09:22:54 AM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2061413207 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_disconnect.2061413207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_resume.1803848621 |
| Short name | T2618 |
| Test name | |
| Test status | |
| Simulation time | 31235848776 ps |
| CPU time | 41.13 seconds |
| Started | Sep 24 09:23:02 AM UTC 24 |
| Finished | Sep 24 09:23:45 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1803848621 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_resume.1803848621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_av_buffer.3686504249 |
| Short name | T2571 |
| Test name | |
| Test status | |
| Simulation time | 153986256 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 09:23:02 AM UTC 24 |
| Finished | Sep 24 09:23:05 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3686504249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_av_buffer.3686504249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_bitstuff_err.284209613 |
| Short name | T2570 |
| Test name | |
| Test status | |
| Simulation time | 147103378 ps |
| CPU time | 0.81 seconds |
| Started | Sep 24 09:23:02 AM UTC 24 |
| Finished | Sep 24 09:23:05 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=284209613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_bitstuff_err.284209613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_clear.3829846629 |
| Short name | T2573 |
| Test name | |
| Test status | |
| Simulation time | 234763197 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:23:02 AM UTC 24 |
| Finished | Sep 24 09:23:05 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3829846629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 38.usbdev_data_toggle_clear.3829846629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_restore.2257695383 |
| Short name | T2586 |
| Test name | |
| Test status | |
| Simulation time | 1111861126 ps |
| CPU time | 2.99 seconds |
| Started | Sep 24 09:23:02 AM UTC 24 |
| Finished | Sep 24 09:23:07 AM UTC 24 |
| Peak memory | 218212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2257695383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_data_toggle_restore.2257695383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_device_address.4193726868 |
| Short name | T2640 |
| Test name | |
| Test status | |
| Simulation time | 28423992679 ps |
| CPU time | 55.1 seconds |
| Started | Sep 24 09:23:02 AM UTC 24 |
| Finished | Sep 24 09:23:59 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4193726868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_address.4193726868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_device_timeout.3187099299 |
| Short name | T2614 |
| Test name | |
| Test status | |
| Simulation time | 1666329296 ps |
| CPU time | 35.19 seconds |
| Started | Sep 24 09:23:02 AM UTC 24 |
| Finished | Sep 24 09:23:39 AM UTC 24 |
| Peak memory | 218212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3187099299 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_timeout.3187099299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_disable_endpoint.2008101046 |
| Short name | T2576 |
| Test name | |
| Test status | |
| Simulation time | 989027388 ps |
| CPU time | 2.14 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:23:06 AM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2008101046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_disable_endpoint.2008101046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_disconnected.1713102287 |
| Short name | T2574 |
| Test name | |
| Test status | |
| Simulation time | 166027351 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:23:05 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1713102287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_disconnected.1713102287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_enable.2598367827 |
| Short name | T2572 |
| Test name | |
| Test status | |
| Simulation time | 44335182 ps |
| CPU time | 0.75 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:23:05 AM UTC 24 |
| Peak memory | 215816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2598367827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 38.usbdev_enable.2598367827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_access.4263121502 |
| Short name | T2585 |
| Test name | |
| Test status | |
| Simulation time | 939652013 ps |
| CPU time | 2.57 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:23:07 AM UTC 24 |
| Peak memory | 217856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4263121502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_access.4263121502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_types.2378825065 |
| Short name | T563 |
| Test name | |
| Test status | |
| Simulation time | 183773739 ps |
| CPU time | 0.94 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:23:05 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2378825065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_types.2378825065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_levels.664179642 |
| Short name | T2577 |
| Test name | |
| Test status | |
| Simulation time | 261583588 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:23:05 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=664179642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_fifo_levels.664179642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_rst.1855381979 |
| Short name | T2520 |
| Test name | |
| Test status | |
| Simulation time | 377685788 ps |
| CPU time | 2.46 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:23:07 AM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1855381979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_fifo_rst.1855381979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_in_iso.1040788026 |
| Short name | T2579 |
| Test name | |
| Test status | |
| Simulation time | 195868162 ps |
| CPU time | 1.34 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:23:05 AM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1040788026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_in_iso.1040788026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_in_stall.1835032823 |
| Short name | T2578 |
| Test name | |
| Test status | |
| Simulation time | 180893719 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:23:05 AM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1835032823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_stall.1835032823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_in_trans.3858896916 |
| Short name | T2580 |
| Test name | |
| Test status | |
| Simulation time | 167229537 ps |
| CPU time | 1.29 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:23:05 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3858896916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_trans.3858896916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_invalid_sync.2870465746 |
| Short name | T2691 |
| Test name | |
| Test status | |
| Simulation time | 4072683332 ps |
| CPU time | 104.14 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:24:49 AM UTC 24 |
| Peak memory | 228616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2870465746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 38.usbdev_invalid_sync.2870465746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_iso_retraction.2710984743 |
| Short name | T2658 |
| Test name | |
| Test status | |
| Simulation time | 11332323256 ps |
| CPU time | 67.2 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:24:12 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2710984743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_iso_retraction.2710984743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_link_in_err.1389485395 |
| Short name | T2583 |
| Test name | |
| Test status | |
| Simulation time | 227434360 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:23:06 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1389485395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_in_err.1389485395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_link_resume.2151869287 |
| Short name | T2619 |
| Test name | |
| Test status | |
| Simulation time | 24235375781 ps |
| CPU time | 42.27 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:23:47 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2151869287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_resume.2151869287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_link_suspend.2348902374 |
| Short name | T2587 |
| Test name | |
| Test status | |
| Simulation time | 9611581935 ps |
| CPU time | 13.18 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:23:18 AM UTC 24 |
| Peak memory | 218072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2348902374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_link_suspend.2348902374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_low_speed_traffic.3319007528 |
| Short name | T2697 |
| Test name | |
| Test status | |
| Simulation time | 4761258883 ps |
| CPU time | 116.72 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:25:02 AM UTC 24 |
| Peak memory | 228440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3319007528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_low_speed_traffic.3319007528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_max_inter_pkt_delay.3766760567 |
| Short name | T2617 |
| Test name | |
| Test status | |
| Simulation time | 1601627352 ps |
| CPU time | 39.14 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:23:44 AM UTC 24 |
| Peak memory | 228220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3766760567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_inter_pkt_delay.3766760567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_in_transaction.3470817539 |
| Short name | T2581 |
| Test name | |
| Test status | |
| Simulation time | 293011932 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:23:06 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3470817539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_in_transaction.3470817539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_out_transaction.3010744717 |
| Short name | T2582 |
| Test name | |
| Test status | |
| Simulation time | 188415865 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:23:06 AM UTC 24 |
| Peak memory | 215416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3010744717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_out_transaction.3010744717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_min_inter_pkt_delay.1829914017 |
| Short name | T2663 |
| Test name | |
| Test status | |
| Simulation time | 2992072332 ps |
| CPU time | 74.95 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:24:20 AM UTC 24 |
| Peak memory | 228152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1829914017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_inter_pkt_delay.1829914017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_in_transaction.1577614859 |
| Short name | T2588 |
| Test name | |
| Test status | |
| Simulation time | 165058991 ps |
| CPU time | 0.96 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:26 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1577614859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_in_transaction.1577614859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_out_transaction.299875426 |
| Short name | T2589 |
| Test name | |
| Test status | |
| Simulation time | 206511662 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:27 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=299875426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 38.usbdev_min_length_out_transaction.299875426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_nak_trans.4003849987 |
| Short name | T2591 |
| Test name | |
| Test status | |
| Simulation time | 228437931 ps |
| CPU time | 1.12 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:27 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4003849987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_nak_trans.4003849987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_out_iso.4140398580 |
| Short name | T2594 |
| Test name | |
| Test status | |
| Simulation time | 147414903 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:27 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4140398580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_out_iso.4140398580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_out_stall.4178386670 |
| Short name | T2596 |
| Test name | |
| Test status | |
| Simulation time | 167010595 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:27 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4178386670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_out_stall.4178386670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_out_trans_nak.4093091645 |
| Short name | T2597 |
| Test name | |
| Test status | |
| Simulation time | 184011875 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:27 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4093091645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_out_trans_nak.4093091645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_pending_in_trans.3706288011 |
| Short name | T2598 |
| Test name | |
| Test status | |
| Simulation time | 142912826 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:27 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3706288011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_pending_in_trans.3706288011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_pinflip.286204016 |
| Short name | T2600 |
| Test name | |
| Test status | |
| Simulation time | 248255519 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:27 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=286204016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_pinflip.286204016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_usb_ref_disable.391277158 |
| Short name | T2593 |
| Test name | |
| Test status | |
| Simulation time | 136797695 ps |
| CPU time | 0.94 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:27 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=391277158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 38.usbdev_phy_config_usb_ref_disable.391277158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_phy_pins_sense.2595858635 |
| Short name | T2595 |
| Test name | |
| Test status | |
| Simulation time | 44575756 ps |
| CPU time | 0.87 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:27 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2595858635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_pins_sense.2595858635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_buffer.1061408160 |
| Short name | T2639 |
| Test name | |
| Test status | |
| Simulation time | 11134755592 ps |
| CPU time | 30.32 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:57 AM UTC 24 |
| Peak memory | 228644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1061408160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_pkt_buffer.1061408160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_received.2396773033 |
| Short name | T2601 |
| Test name | |
| Test status | |
| Simulation time | 187454504 ps |
| CPU time | 1.23 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:27 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2396773033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_pkt_received.2396773033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_sent.745453910 |
| Short name | T2606 |
| Test name | |
| Test status | |
| Simulation time | 235283384 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:28 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=745453910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_pkt_sent.745453910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_in_transaction.208081064 |
| Short name | T2610 |
| Test name | |
| Test status | |
| Simulation time | 190829209 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:28 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=208081064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_random_length_in_transaction.208081064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_out_transaction.1343830299 |
| Short name | T2608 |
| Test name | |
| Test status | |
| Simulation time | 167494816 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:28 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1343830299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_random_length_out_transaction.1343830299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_rx_crc_err.3521452458 |
| Short name | T2599 |
| Test name | |
| Test status | |
| Simulation time | 136282354 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:27 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3521452458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_rx_crc_err.3521452458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_rx_full.4166796654 |
| Short name | T2612 |
| Test name | |
| Test status | |
| Simulation time | 464279661 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:28 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4166796654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_rx_full.4166796654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_setup_stage.618080684 |
| Short name | T2605 |
| Test name | |
| Test status | |
| Simulation time | 191382379 ps |
| CPU time | 1.34 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:27 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=618080684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_setup_stage.618080684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_setup_trans_ignored.2384712205 |
| Short name | T2604 |
| Test name | |
| Test status | |
| Simulation time | 150716738 ps |
| CPU time | 1.22 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:27 AM UTC 24 |
| Peak memory | 215884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2384712205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 38.usbdev_setup_trans_ignored.2384712205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_smoke.2369924901 |
| Short name | T2603 |
| Test name | |
| Test status | |
| Simulation time | 201200913 ps |
| CPU time | 1.28 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:27 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2369924901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_smoke.2369924901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_spurious_pids_ignored.1615937811 |
| Short name | T2637 |
| Test name | |
| Test status | |
| Simulation time | 2833283992 ps |
| CPU time | 26.16 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:53 AM UTC 24 |
| Peak memory | 235152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1615937811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_spurious_pids_ignored.1615937811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_stall_priority_over_nak.1101226250 |
| Short name | T2602 |
| Test name | |
| Test status | |
| Simulation time | 270906928 ps |
| CPU time | 1.12 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:27 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1101226250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stall_priority_over_nak.1101226250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_stall_trans.1856021873 |
| Short name | T2611 |
| Test name | |
| Test status | |
| Simulation time | 172081750 ps |
| CPU time | 1.4 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:28 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1856021873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_stall_trans.1856021873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_stream_len_max.320190883 |
| Short name | T2607 |
| Test name | |
| Test status | |
| Simulation time | 260454479 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:28 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=320190883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_stream_len_max.320190883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_streaming_out.730404377 |
| Short name | T2616 |
| Test name | |
| Test status | |
| Simulation time | 1575540407 ps |
| CPU time | 13.78 seconds |
| Started | Sep 24 09:23:25 AM UTC 24 |
| Finished | Sep 24 09:23:40 AM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=730404377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_streaming_out.730404377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_timeout_missing_host_handshake.1459003126 |
| Short name | T2609 |
| Test name | |
| Test status | |
| Simulation time | 2949981738 ps |
| CPU time | 23.47 seconds |
| Started | Sep 24 09:23:03 AM UTC 24 |
| Finished | Sep 24 09:23:28 AM UTC 24 |
| Peak memory | 218392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1459003126 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_timeout_missing_host_handshake.1459003126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/38.usbdev_tx_rx_disruption.2501287507 |
| Short name | T2628 |
| Test name | |
| Test status | |
| Simulation time | 630507433 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 09:23:45 AM UTC 24 |
| Finished | Sep 24 09:23:48 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2501287507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_t x_rx_disruption.2501287507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/38.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/380.usbdev_tx_rx_disruption.3770927522 |
| Short name | T3684 |
| Test name | |
| Test status | |
| Simulation time | 553400970 ps |
| CPU time | 2.39 seconds |
| Started | Sep 24 09:46:14 AM UTC 24 |
| Finished | Sep 24 09:46:18 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3770927522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 380.usbdev_ tx_rx_disruption.3770927522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/380.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/381.usbdev_tx_rx_disruption.1383866844 |
| Short name | T3682 |
| Test name | |
| Test status | |
| Simulation time | 586586605 ps |
| CPU time | 2.12 seconds |
| Started | Sep 24 09:46:15 AM UTC 24 |
| Finished | Sep 24 09:46:18 AM UTC 24 |
| Peak memory | 217840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1383866844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 381.usbdev_ tx_rx_disruption.1383866844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/381.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/382.usbdev_tx_rx_disruption.1671331366 |
| Short name | T3663 |
| Test name | |
| Test status | |
| Simulation time | 537821646 ps |
| CPU time | 1.63 seconds |
| Started | Sep 24 09:46:15 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1671331366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 382.usbdev_ tx_rx_disruption.1671331366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/382.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/383.usbdev_tx_rx_disruption.1041301818 |
| Short name | T3675 |
| Test name | |
| Test status | |
| Simulation time | 535261684 ps |
| CPU time | 2.01 seconds |
| Started | Sep 24 09:46:15 AM UTC 24 |
| Finished | Sep 24 09:46:18 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1041301818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 383.usbdev_ tx_rx_disruption.1041301818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/383.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/384.usbdev_tx_rx_disruption.3018339407 |
| Short name | T3681 |
| Test name | |
| Test status | |
| Simulation time | 541983079 ps |
| CPU time | 2.05 seconds |
| Started | Sep 24 09:46:15 AM UTC 24 |
| Finished | Sep 24 09:46:18 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3018339407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 384.usbdev_ tx_rx_disruption.3018339407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/384.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/385.usbdev_tx_rx_disruption.3775572432 |
| Short name | T3667 |
| Test name | |
| Test status | |
| Simulation time | 494469060 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 09:46:15 AM UTC 24 |
| Finished | Sep 24 09:46:17 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3775572432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 385.usbdev_ tx_rx_disruption.3775572432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/385.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/386.usbdev_tx_rx_disruption.2761058125 |
| Short name | T3685 |
| Test name | |
| Test status | |
| Simulation time | 603650273 ps |
| CPU time | 2.24 seconds |
| Started | Sep 24 09:46:15 AM UTC 24 |
| Finished | Sep 24 09:46:18 AM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2761058125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 386.usbdev_ tx_rx_disruption.2761058125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/386.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/387.usbdev_tx_rx_disruption.2957083251 |
| Short name | T3683 |
| Test name | |
| Test status | |
| Simulation time | 634466303 ps |
| CPU time | 2.04 seconds |
| Started | Sep 24 09:46:15 AM UTC 24 |
| Finished | Sep 24 09:46:18 AM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2957083251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 387.usbdev_ tx_rx_disruption.2957083251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/387.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/388.usbdev_tx_rx_disruption.1402450758 |
| Short name | T3686 |
| Test name | |
| Test status | |
| Simulation time | 605676471 ps |
| CPU time | 2.23 seconds |
| Started | Sep 24 09:46:15 AM UTC 24 |
| Finished | Sep 24 09:46:18 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1402450758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 388.usbdev_ tx_rx_disruption.1402450758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/388.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/389.usbdev_tx_rx_disruption.4214918521 |
| Short name | T3678 |
| Test name | |
| Test status | |
| Simulation time | 496222535 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 09:46:15 AM UTC 24 |
| Finished | Sep 24 09:46:18 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4214918521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 389.usbdev_ tx_rx_disruption.4214918521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/389.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_alert_test.272764518 |
| Short name | T2676 |
| Test name | |
| Test status | |
| Simulation time | 79938751 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:24:38 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=272764518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_alert_test.272764518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_disconnect.4057787378 |
| Short name | T2638 |
| Test name | |
| Test status | |
| Simulation time | 4621944117 ps |
| CPU time | 6.5 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:23:53 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4057787378 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_disconnect.4057787378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_reset.3025129550 |
| Short name | T2641 |
| Test name | |
| Test status | |
| Simulation time | 15019556689 ps |
| CPU time | 17.97 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:24:05 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3025129550 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_reset.3025129550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_resume.2238269598 |
| Short name | T2666 |
| Test name | |
| Test status | |
| Simulation time | 30946458149 ps |
| CPU time | 41.82 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:24:29 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2238269598 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_resume.2238269598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_av_buffer.518860575 |
| Short name | T2624 |
| Test name | |
| Test status | |
| Simulation time | 189883879 ps |
| CPU time | 1.14 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:23:48 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=518860575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_av_buffer.518860575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_bitstuff_err.2021647803 |
| Short name | T2623 |
| Test name | |
| Test status | |
| Simulation time | 168999625 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:23:48 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2021647803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_bitstuff_err.2021647803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_clear.2731851671 |
| Short name | T2626 |
| Test name | |
| Test status | |
| Simulation time | 278191241 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:23:48 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2731851671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 39.usbdev_data_toggle_clear.2731851671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_restore.2093847174 |
| Short name | T2634 |
| Test name | |
| Test status | |
| Simulation time | 673340083 ps |
| CPU time | 2.1 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:23:49 AM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2093847174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_restore.2093847174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_device_address.1626719721 |
| Short name | T2667 |
| Test name | |
| Test status | |
| Simulation time | 22083884942 ps |
| CPU time | 44.01 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:24:31 AM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1626719721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_address.1626719721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_device_timeout.2697813040 |
| Short name | T2661 |
| Test name | |
| Test status | |
| Simulation time | 1413190051 ps |
| CPU time | 29.14 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:24:16 AM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2697813040 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_timeout.2697813040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_disable_endpoint.3744223186 |
| Short name | T2633 |
| Test name | |
| Test status | |
| Simulation time | 814678074 ps |
| CPU time | 1.94 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:23:49 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3744223186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_disable_endpoint.3744223186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_disconnected.1494791625 |
| Short name | T2627 |
| Test name | |
| Test status | |
| Simulation time | 150287126 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:23:48 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1494791625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_disconnected.1494791625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_enable.1591787500 |
| Short name | T2625 |
| Test name | |
| Test status | |
| Simulation time | 37239968 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:23:48 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1591787500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_enable.1591787500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_access.269567326 |
| Short name | T2636 |
| Test name | |
| Test status | |
| Simulation time | 870887758 ps |
| CPU time | 2.66 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:23:50 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=269567326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_access.269567326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_types.607374556 |
| Short name | T570 |
| Test name | |
| Test status | |
| Simulation time | 577330616 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:23:49 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=607374556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_types.607374556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_levels.818403980 |
| Short name | T2630 |
| Test name | |
| Test status | |
| Simulation time | 195209669 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:23:49 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=818403980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_fifo_levels.818403980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_rst.816580463 |
| Short name | T2635 |
| Test name | |
| Test status | |
| Simulation time | 279290772 ps |
| CPU time | 1.87 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:23:49 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=816580463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_fifo_rst.816580463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_in_iso.4018244063 |
| Short name | T2629 |
| Test name | |
| Test status | |
| Simulation time | 178525595 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:23:49 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4018244063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_in_iso.4018244063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_in_stall.972784852 |
| Short name | T2631 |
| Test name | |
| Test status | |
| Simulation time | 177544461 ps |
| CPU time | 1.3 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:23:49 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=972784852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_in_stall.972784852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_in_trans.1927137521 |
| Short name | T2632 |
| Test name | |
| Test status | |
| Simulation time | 196579929 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:23:49 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1927137521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_in_trans.1927137521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_invalid_sync.3869482032 |
| Short name | T2692 |
| Test name | |
| Test status | |
| Simulation time | 2539730896 ps |
| CPU time | 61.69 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:24:49 AM UTC 24 |
| Peak memory | 234960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3869482032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 39.usbdev_invalid_sync.3869482032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_iso_retraction.2521440716 |
| Short name | T2756 |
| Test name | |
| Test status | |
| Simulation time | 9781152973 ps |
| CPU time | 106.14 seconds |
| Started | Sep 24 09:24:09 AM UTC 24 |
| Finished | Sep 24 09:25:57 AM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2521440716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_iso_retraction.2521440716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_link_in_err.1475838691 |
| Short name | T2644 |
| Test name | |
| Test status | |
| Simulation time | 248828827 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:24:09 AM UTC 24 |
| Finished | Sep 24 09:24:11 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1475838691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_in_err.1475838691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_link_resume.3930689769 |
| Short name | T2665 |
| Test name | |
| Test status | |
| Simulation time | 12103903728 ps |
| CPU time | 15.27 seconds |
| Started | Sep 24 09:24:09 AM UTC 24 |
| Finished | Sep 24 09:24:26 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3930689769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_resume.3930689769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_link_suspend.2495474058 |
| Short name | T2664 |
| Test name | |
| Test status | |
| Simulation time | 8485979118 ps |
| CPU time | 10.77 seconds |
| Started | Sep 24 09:24:09 AM UTC 24 |
| Finished | Sep 24 09:24:21 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2495474058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_link_suspend.2495474058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_low_speed_traffic.347168175 |
| Short name | T2788 |
| Test name | |
| Test status | |
| Simulation time | 5084656941 ps |
| CPU time | 125.39 seconds |
| Started | Sep 24 09:24:09 AM UTC 24 |
| Finished | Sep 24 09:26:17 AM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=347168175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_low_speed_traffic.347168175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_max_inter_pkt_delay.1185529711 |
| Short name | T2668 |
| Test name | |
| Test status | |
| Simulation time | 2728974047 ps |
| CPU time | 24.7 seconds |
| Started | Sep 24 09:24:09 AM UTC 24 |
| Finished | Sep 24 09:24:35 AM UTC 24 |
| Peak memory | 228288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1185529711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_inter_pkt_delay.1185529711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_in_transaction.495256026 |
| Short name | T2646 |
| Test name | |
| Test status | |
| Simulation time | 236482286 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:24:09 AM UTC 24 |
| Finished | Sep 24 09:24:12 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=495256026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_in_transaction.495256026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_out_transaction.3193931610 |
| Short name | T2651 |
| Test name | |
| Test status | |
| Simulation time | 220807602 ps |
| CPU time | 1.28 seconds |
| Started | Sep 24 09:24:09 AM UTC 24 |
| Finished | Sep 24 09:24:12 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3193931610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_out_transaction.3193931610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_min_inter_pkt_delay.2958060621 |
| Short name | T2742 |
| Test name | |
| Test status | |
| Simulation time | 3791082144 ps |
| CPU time | 98.82 seconds |
| Started | Sep 24 09:24:09 AM UTC 24 |
| Finished | Sep 24 09:25:50 AM UTC 24 |
| Peak memory | 228384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2958060621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_inter_pkt_delay.2958060621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_in_transaction.90547366 |
| Short name | T2645 |
| Test name | |
| Test status | |
| Simulation time | 146066006 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:24:09 AM UTC 24 |
| Finished | Sep 24 09:24:12 AM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=90547366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_in_transaction.90547366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_out_transaction.216377943 |
| Short name | T2647 |
| Test name | |
| Test status | |
| Simulation time | 150463738 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:24:09 AM UTC 24 |
| Finished | Sep 24 09:24:12 AM UTC 24 |
| Peak memory | 215960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=216377943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 39.usbdev_min_length_out_transaction.216377943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_nak_trans.616708977 |
| Short name | T2652 |
| Test name | |
| Test status | |
| Simulation time | 234965288 ps |
| CPU time | 1.2 seconds |
| Started | Sep 24 09:24:09 AM UTC 24 |
| Finished | Sep 24 09:24:12 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=616708977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_nak_trans.616708977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_out_iso.2957884663 |
| Short name | T2656 |
| Test name | |
| Test status | |
| Simulation time | 167084204 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:24:10 AM UTC 24 |
| Finished | Sep 24 09:24:12 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2957884663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_out_iso.2957884663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_out_stall.2083314945 |
| Short name | T2653 |
| Test name | |
| Test status | |
| Simulation time | 183127747 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 09:24:10 AM UTC 24 |
| Finished | Sep 24 09:24:12 AM UTC 24 |
| Peak memory | 215904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2083314945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_out_stall.2083314945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_out_trans_nak.100278156 |
| Short name | T2650 |
| Test name | |
| Test status | |
| Simulation time | 160725430 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:24:10 AM UTC 24 |
| Finished | Sep 24 09:24:12 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=100278156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_out_trans_nak.100278156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_pending_in_trans.2382170443 |
| Short name | T2654 |
| Test name | |
| Test status | |
| Simulation time | 169114764 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 09:24:10 AM UTC 24 |
| Finished | Sep 24 09:24:12 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2382170443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_pending_in_trans.2382170443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_pinflip.2586091928 |
| Short name | T2622 |
| Test name | |
| Test status | |
| Simulation time | 248626235 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:24:10 AM UTC 24 |
| Finished | Sep 24 09:24:12 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2586091928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_pinflip.2586091928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_usb_ref_disable.4226524063 |
| Short name | T2649 |
| Test name | |
| Test status | |
| Simulation time | 161540690 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:24:10 AM UTC 24 |
| Finished | Sep 24 09:24:12 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4226524063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_usb_ref_disable.4226524063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_phy_pins_sense.2574030733 |
| Short name | T2648 |
| Test name | |
| Test status | |
| Simulation time | 33557578 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:24:10 AM UTC 24 |
| Finished | Sep 24 09:24:12 AM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2574030733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_pins_sense.2574030733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_buffer.413514979 |
| Short name | T2687 |
| Test name | |
| Test status | |
| Simulation time | 11469515780 ps |
| CPU time | 28.04 seconds |
| Started | Sep 24 09:24:10 AM UTC 24 |
| Finished | Sep 24 09:24:39 AM UTC 24 |
| Peak memory | 228648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=413514979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_pkt_buffer.413514979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_received.28854182 |
| Short name | T2659 |
| Test name | |
| Test status | |
| Simulation time | 184753923 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 09:24:10 AM UTC 24 |
| Finished | Sep 24 09:24:12 AM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=28854182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_pkt_received.28854182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_sent.1844541553 |
| Short name | T2657 |
| Test name | |
| Test status | |
| Simulation time | 199901998 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:24:10 AM UTC 24 |
| Finished | Sep 24 09:24:12 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1844541553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_pkt_sent.1844541553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_in_transaction.4033977471 |
| Short name | T2660 |
| Test name | |
| Test status | |
| Simulation time | 266302630 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:24:10 AM UTC 24 |
| Finished | Sep 24 09:24:12 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4033977471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_random_length_in_transaction.4033977471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_out_transaction.1237586226 |
| Short name | T2592 |
| Test name | |
| Test status | |
| Simulation time | 182408971 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:24:10 AM UTC 24 |
| Finished | Sep 24 09:24:12 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1237586226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_random_length_out_transaction.1237586226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_rx_crc_err.256761473 |
| Short name | T2655 |
| Test name | |
| Test status | |
| Simulation time | 136897403 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:24:10 AM UTC 24 |
| Finished | Sep 24 09:24:12 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=256761473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_rx_crc_err.256761473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_rx_full.4004159845 |
| Short name | T2590 |
| Test name | |
| Test status | |
| Simulation time | 280388726 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:24:10 AM UTC 24 |
| Finished | Sep 24 09:24:12 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4004159845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_rx_full.4004159845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_setup_stage.3045455603 |
| Short name | T2674 |
| Test name | |
| Test status | |
| Simulation time | 152060028 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:24:35 AM UTC 24 |
| Finished | Sep 24 09:24:38 AM UTC 24 |
| Peak memory | 215880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3045455603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_setup_stage.3045455603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_setup_trans_ignored.4237162255 |
| Short name | T2670 |
| Test name | |
| Test status | |
| Simulation time | 162874867 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:24:35 AM UTC 24 |
| Finished | Sep 24 09:24:38 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4237162255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 39.usbdev_setup_trans_ignored.4237162255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_smoke.1647948659 |
| Short name | T2672 |
| Test name | |
| Test status | |
| Simulation time | 188279802 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:24:35 AM UTC 24 |
| Finished | Sep 24 09:24:38 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1647948659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_smoke.1647948659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_spurious_pids_ignored.2946569600 |
| Short name | T2725 |
| Test name | |
| Test status | |
| Simulation time | 2338071430 ps |
| CPU time | 55.19 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:25:33 AM UTC 24 |
| Peak memory | 230660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2946569600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_spurious_pids_ignored.2946569600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_stall_priority_over_nak.3234085209 |
| Short name | T2675 |
| Test name | |
| Test status | |
| Simulation time | 218780402 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:24:38 AM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3234085209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stall_priority_over_nak.3234085209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_stall_trans.504404304 |
| Short name | T2673 |
| Test name | |
| Test status | |
| Simulation time | 229196832 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:24:38 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=504404304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_stall_trans.504404304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_stream_len_max.1328741427 |
| Short name | T2682 |
| Test name | |
| Test status | |
| Simulation time | 331077311 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:24:39 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1328741427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stream_len_max.1328741427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_streaming_out.1773932430 |
| Short name | T2696 |
| Test name | |
| Test status | |
| Simulation time | 3446649169 ps |
| CPU time | 24.5 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:25:02 AM UTC 24 |
| Peak memory | 230516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1773932430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_streaming_out.1773932430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_timeout_missing_host_handshake.2063747044 |
| Short name | T2662 |
| Test name | |
| Test status | |
| Simulation time | 3857861520 ps |
| CPU time | 29.62 seconds |
| Started | Sep 24 09:23:46 AM UTC 24 |
| Finished | Sep 24 09:24:17 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2063747044 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_timeout_missing_host_handshake.2063747044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/39.usbdev_tx_rx_disruption.3986804402 |
| Short name | T2683 |
| Test name | |
| Test status | |
| Simulation time | 495123761 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:24:39 AM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3986804402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_t x_rx_disruption.3986804402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/39.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/390.usbdev_tx_rx_disruption.576661184 |
| Short name | T3672 |
| Test name | |
| Test status | |
| Simulation time | 555840707 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 09:46:15 AM UTC 24 |
| Finished | Sep 24 09:46:18 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=576661184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 390.usbdev_t x_rx_disruption.576661184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/390.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/391.usbdev_tx_rx_disruption.2440503766 |
| Short name | T3688 |
| Test name | |
| Test status | |
| Simulation time | 507588037 ps |
| CPU time | 2.21 seconds |
| Started | Sep 24 09:46:15 AM UTC 24 |
| Finished | Sep 24 09:46:18 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2440503766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 391.usbdev_ tx_rx_disruption.2440503766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/391.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/392.usbdev_tx_rx_disruption.3951685070 |
| Short name | T3677 |
| Test name | |
| Test status | |
| Simulation time | 502421462 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 09:46:15 AM UTC 24 |
| Finished | Sep 24 09:46:18 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3951685070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 392.usbdev_ tx_rx_disruption.3951685070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/392.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/393.usbdev_tx_rx_disruption.2573157040 |
| Short name | T3691 |
| Test name | |
| Test status | |
| Simulation time | 586673999 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 09:47:10 AM UTC 24 |
| Finished | Sep 24 09:47:13 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2573157040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 393.usbdev_ tx_rx_disruption.2573157040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/393.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/394.usbdev_tx_rx_disruption.1167581341 |
| Short name | T3689 |
| Test name | |
| Test status | |
| Simulation time | 492853420 ps |
| CPU time | 1.47 seconds |
| Started | Sep 24 09:47:10 AM UTC 24 |
| Finished | Sep 24 09:47:13 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1167581341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 394.usbdev_ tx_rx_disruption.1167581341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/394.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/395.usbdev_tx_rx_disruption.1630998426 |
| Short name | T3690 |
| Test name | |
| Test status | |
| Simulation time | 455772500 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:13 AM UTC 24 |
| Peak memory | 215488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1630998426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 395.usbdev_ tx_rx_disruption.1630998426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/395.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/396.usbdev_tx_rx_disruption.2797382134 |
| Short name | T3692 |
| Test name | |
| Test status | |
| Simulation time | 580328069 ps |
| CPU time | 1.78 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:13 AM UTC 24 |
| Peak memory | 215508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2797382134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 396.usbdev_ tx_rx_disruption.2797382134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/396.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/397.usbdev_tx_rx_disruption.2218927100 |
| Short name | T3696 |
| Test name | |
| Test status | |
| Simulation time | 593971653 ps |
| CPU time | 1.92 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:13 AM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2218927100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 397.usbdev_ tx_rx_disruption.2218927100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/397.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/398.usbdev_tx_rx_disruption.3366892426 |
| Short name | T3700 |
| Test name | |
| Test status | |
| Simulation time | 556835345 ps |
| CPU time | 2.12 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3366892426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 398.usbdev_ tx_rx_disruption.3366892426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/398.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/399.usbdev_tx_rx_disruption.2783546962 |
| Short name | T3695 |
| Test name | |
| Test status | |
| Simulation time | 589410209 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:13 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2783546962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 399.usbdev_ tx_rx_disruption.2783546962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/399.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_alert_test.1624757657 |
| Short name | T753 |
| Test name | |
| Test status | |
| Simulation time | 38846161 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:00:02 AM UTC 24 |
| Finished | Sep 24 09:00:07 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1624757657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 4.usbdev_alert_test.1624757657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_disconnect.3627595025 |
| Short name | T707 |
| Test name | |
| Test status | |
| Simulation time | 11199568582 ps |
| CPU time | 21.28 seconds |
| Started | Sep 24 08:58:56 AM UTC 24 |
| Finished | Sep 24 08:59:18 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3627595025 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_disconnect.3627595025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_reset.2133946710 |
| Short name | T740 |
| Test name | |
| Test status | |
| Simulation time | 20753632269 ps |
| CPU time | 55.79 seconds |
| Started | Sep 24 08:58:57 AM UTC 24 |
| Finished | Sep 24 08:59:55 AM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2133946710 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_reset.2133946710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_resume.3966385904 |
| Short name | T212 |
| Test name | |
| Test status | |
| Simulation time | 29318351612 ps |
| CPU time | 45.5 seconds |
| Started | Sep 24 08:59:01 AM UTC 24 |
| Finished | Sep 24 08:59:48 AM UTC 24 |
| Peak memory | 217444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3966385904 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_resume.3966385904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_av_buffer.3156203216 |
| Short name | T695 |
| Test name | |
| Test status | |
| Simulation time | 181777229 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 08:59:01 AM UTC 24 |
| Finished | Sep 24 08:59:03 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3156203216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_av_buffer.3156203216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_av_empty.2903316652 |
| Short name | T62 |
| Test name | |
| Test status | |
| Simulation time | 223252954 ps |
| CPU time | 1.74 seconds |
| Started | Sep 24 08:59:01 AM UTC 24 |
| Finished | Sep 24 08:59:03 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2903316652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_av_empty.2903316652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_bitstuff_err.4094053556 |
| Short name | T696 |
| Test name | |
| Test status | |
| Simulation time | 170674090 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 08:59:01 AM UTC 24 |
| Finished | Sep 24 08:59:04 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4094053556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_bitstuff_err.4094053556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_clear.3656572807 |
| Short name | T698 |
| Test name | |
| Test status | |
| Simulation time | 509610997 ps |
| CPU time | 2.66 seconds |
| Started | Sep 24 08:59:04 AM UTC 24 |
| Finished | Sep 24 08:59:08 AM UTC 24 |
| Peak memory | 217700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3656572807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 4.usbdev_data_toggle_clear.3656572807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_restore.2789502661 |
| Short name | T441 |
| Test name | |
| Test status | |
| Simulation time | 706272052 ps |
| CPU time | 3.46 seconds |
| Started | Sep 24 08:59:04 AM UTC 24 |
| Finished | Sep 24 08:59:09 AM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2789502661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_data_toggle_restore.2789502661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_device_address.4004249915 |
| Short name | T180 |
| Test name | |
| Test status | |
| Simulation time | 44616209831 ps |
| CPU time | 117.67 seconds |
| Started | Sep 24 08:59:04 AM UTC 24 |
| Finished | Sep 24 09:01:04 AM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4004249915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_address.4004249915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_device_timeout.1306547549 |
| Short name | T719 |
| Test name | |
| Test status | |
| Simulation time | 1122086859 ps |
| CPU time | 31.79 seconds |
| Started | Sep 24 08:59:05 AM UTC 24 |
| Finished | Sep 24 08:59:38 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1306547549 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_timeout.1306547549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_disable_endpoint.57048325 |
| Short name | T699 |
| Test name | |
| Test status | |
| Simulation time | 521200592 ps |
| CPU time | 2.42 seconds |
| Started | Sep 24 08:59:06 AM UTC 24 |
| Finished | Sep 24 08:59:09 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=57048325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_disable_endpoint.57048325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_disconnected.3127016213 |
| Short name | T700 |
| Test name | |
| Test status | |
| Simulation time | 174247866 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 08:59:07 AM UTC 24 |
| Finished | Sep 24 08:59:10 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3127016213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_disconnected.3127016213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_enable.3677792559 |
| Short name | T702 |
| Test name | |
| Test status | |
| Simulation time | 50651314 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 08:59:09 AM UTC 24 |
| Finished | Sep 24 08:59:11 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3677792559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 4.usbdev_enable.3677792559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_access.3116527240 |
| Short name | T705 |
| Test name | |
| Test status | |
| Simulation time | 767075399 ps |
| CPU time | 4.38 seconds |
| Started | Sep 24 08:59:10 AM UTC 24 |
| Finished | Sep 24 08:59:15 AM UTC 24 |
| Peak memory | 217912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3116527240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_access.3116527240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_rst.3013897121 |
| Short name | T704 |
| Test name | |
| Test status | |
| Simulation time | 276473874 ps |
| CPU time | 2.83 seconds |
| Started | Sep 24 08:59:11 AM UTC 24 |
| Finished | Sep 24 08:59:15 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3013897121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_fifo_rst.3013897121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk.1853674398 |
| Short name | T969 |
| Test name | |
| Test status | |
| Simulation time | 110221921030 ps |
| CPU time | 263.61 seconds |
| Started | Sep 24 08:59:11 AM UTC 24 |
| Finished | Sep 24 09:03:39 AM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1853674398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_hiclk.1853674398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk_max.3493088389 |
| Short name | T959 |
| Test name | |
| Test status | |
| Simulation time | 108134992544 ps |
| CPU time | 248.98 seconds |
| Started | Sep 24 08:59:12 AM UTC 24 |
| Finished | Sep 24 09:03:25 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3493088389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 4.usbdev_freq_hiclk_max.3493088389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk.409525929 |
| Short name | T875 |
| Test name | |
| Test status | |
| Simulation time | 108093837164 ps |
| CPU time | 217.82 seconds |
| Started | Sep 24 08:59:12 AM UTC 24 |
| Finished | Sep 24 09:02:54 AM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=409525929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_loclk.409525929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk_max.729519122 |
| Short name | T831 |
| Test name | |
| Test status | |
| Simulation time | 85995522630 ps |
| CPU time | 146.63 seconds |
| Started | Sep 24 08:59:14 AM UTC 24 |
| Finished | Sep 24 09:01:43 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=729519122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 4.usbdev_freq_loclk_max.729519122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_freq_phase.1937165122 |
| Short name | T923 |
| Test name | |
| Test status | |
| Simulation time | 113151306292 ps |
| CPU time | 221.5 seconds |
| Started | Sep 24 08:59:15 AM UTC 24 |
| Finished | Sep 24 09:03:00 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1937165122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_freq_phase.1937165122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_in_iso.3990328380 |
| Short name | T710 |
| Test name | |
| Test status | |
| Simulation time | 167522465 ps |
| CPU time | 1.74 seconds |
| Started | Sep 24 08:59:16 AM UTC 24 |
| Finished | Sep 24 08:59:19 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3990328380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_in_iso.3990328380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_in_stall.1571680171 |
| Short name | T709 |
| Test name | |
| Test status | |
| Simulation time | 148619525 ps |
| CPU time | 1.31 seconds |
| Started | Sep 24 08:59:16 AM UTC 24 |
| Finished | Sep 24 08:59:19 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1571680171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_stall.1571680171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_in_trans.3723271985 |
| Short name | T712 |
| Test name | |
| Test status | |
| Simulation time | 203345146 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 08:59:20 AM UTC 24 |
| Finished | Sep 24 08:59:22 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3723271985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_trans.3723271985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_invalid_sync.1152896990 |
| Short name | T720 |
| Test name | |
| Test status | |
| Simulation time | 2866337842 ps |
| CPU time | 21.04 seconds |
| Started | Sep 24 08:59:16 AM UTC 24 |
| Finished | Sep 24 08:59:38 AM UTC 24 |
| Peak memory | 234984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1152896990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 4.usbdev_invalid_sync.1152896990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_iso_retraction.1027563185 |
| Short name | T901 |
| Test name | |
| Test status | |
| Simulation time | 11712796069 ps |
| CPU time | 194.68 seconds |
| Started | Sep 24 08:59:20 AM UTC 24 |
| Finished | Sep 24 09:02:38 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1027563185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_iso_retraction.1027563185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_link_in_err.454036750 |
| Short name | T713 |
| Test name | |
| Test status | |
| Simulation time | 215906515 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 08:59:20 AM UTC 24 |
| Finished | Sep 24 08:59:23 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=454036750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_link_in_err.454036750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_link_resume.1308683327 |
| Short name | T763 |
| Test name | |
| Test status | |
| Simulation time | 30361325289 ps |
| CPU time | 65.28 seconds |
| Started | Sep 24 08:59:20 AM UTC 24 |
| Finished | Sep 24 09:00:27 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1308683327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_resume.1308683327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_link_suspend.668342303 |
| Short name | T725 |
| Test name | |
| Test status | |
| Simulation time | 9281463975 ps |
| CPU time | 18.58 seconds |
| Started | Sep 24 08:59:23 AM UTC 24 |
| Finished | Sep 24 08:59:43 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=668342303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_suspend.668342303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_low_speed_traffic.2657339478 |
| Short name | T494 |
| Test name | |
| Test status | |
| Simulation time | 4953520631 ps |
| CPU time | 52.35 seconds |
| Started | Sep 24 08:59:23 AM UTC 24 |
| Finished | Sep 24 09:00:17 AM UTC 24 |
| Peak memory | 230468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2657339478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_low_speed_traffic.2657339478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_max_inter_pkt_delay.1628896665 |
| Short name | T739 |
| Test name | |
| Test status | |
| Simulation time | 2542124846 ps |
| CPU time | 28.52 seconds |
| Started | Sep 24 08:59:23 AM UTC 24 |
| Finished | Sep 24 08:59:53 AM UTC 24 |
| Peak memory | 235216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1628896665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_inter_pkt_delay.1628896665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_in_transaction.1472623621 |
| Short name | T715 |
| Test name | |
| Test status | |
| Simulation time | 279033360 ps |
| CPU time | 2.1 seconds |
| Started | Sep 24 08:59:28 AM UTC 24 |
| Finished | Sep 24 08:59:31 AM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1472623621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_in_transaction.1472623621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_out_transaction.3367537817 |
| Short name | T718 |
| Test name | |
| Test status | |
| Simulation time | 193363754 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 08:59:32 AM UTC 24 |
| Finished | Sep 24 08:59:35 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3367537817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_out_transaction.3367537817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_max_non_iso_usb_traffic.2030759667 |
| Short name | T758 |
| Test name | |
| Test status | |
| Simulation time | 3788068402 ps |
| CPU time | 46.21 seconds |
| Started | Sep 24 08:59:34 AM UTC 24 |
| Finished | Sep 24 09:00:22 AM UTC 24 |
| Peak memory | 234888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2030759667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_non_iso_usb_traffic.2030759667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_max_usb_traffic.2671141676 |
| Short name | T752 |
| Test name | |
| Test status | |
| Simulation time | 2651020741 ps |
| CPU time | 25.99 seconds |
| Started | Sep 24 08:59:35 AM UTC 24 |
| Finished | Sep 24 09:00:02 AM UTC 24 |
| Peak memory | 230396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2671141676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_usb_traffic.2671141676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_min_inter_pkt_delay.787841796 |
| Short name | T793 |
| Test name | |
| Test status | |
| Simulation time | 2388852008 ps |
| CPU time | 77.11 seconds |
| Started | Sep 24 08:59:36 AM UTC 24 |
| Finished | Sep 24 09:00:56 AM UTC 24 |
| Peak memory | 234752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=787841796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_inter_pkt_delay.787841796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_in_transaction.172605628 |
| Short name | T722 |
| Test name | |
| Test status | |
| Simulation time | 160343594 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 08:59:39 AM UTC 24 |
| Finished | Sep 24 08:59:41 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=172605628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_in_transaction.172605628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_out_transaction.850505150 |
| Short name | T721 |
| Test name | |
| Test status | |
| Simulation time | 181334621 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 08:59:39 AM UTC 24 |
| Finished | Sep 24 08:59:41 AM UTC 24 |
| Peak memory | 216432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=850505150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 4.usbdev_min_length_out_transaction.850505150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_nak_trans.1525760656 |
| Short name | T128 |
| Test name | |
| Test status | |
| Simulation time | 180978927 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 08:59:39 AM UTC 24 |
| Finished | Sep 24 08:59:41 AM UTC 24 |
| Peak memory | 216712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1525760656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_nak_trans.1525760656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_out_iso.1307423796 |
| Short name | T724 |
| Test name | |
| Test status | |
| Simulation time | 166291553 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 08:59:40 AM UTC 24 |
| Finished | Sep 24 08:59:43 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1307423796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_out_iso.1307423796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_out_stall.3716257112 |
| Short name | T728 |
| Test name | |
| Test status | |
| Simulation time | 153462125 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 08:59:44 AM UTC 24 |
| Finished | Sep 24 08:59:46 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3716257112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_out_stall.3716257112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_out_trans_nak.981846386 |
| Short name | T730 |
| Test name | |
| Test status | |
| Simulation time | 175931314 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 08:59:44 AM UTC 24 |
| Finished | Sep 24 08:59:46 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=981846386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_out_trans_nak.981846386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_pending_in_trans.3383110938 |
| Short name | T729 |
| Test name | |
| Test status | |
| Simulation time | 151808832 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 08:59:44 AM UTC 24 |
| Finished | Sep 24 08:59:46 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3383110938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_pending_in_trans.3383110938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_pinflip.2915050181 |
| Short name | T731 |
| Test name | |
| Test status | |
| Simulation time | 172997026 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 08:59:44 AM UTC 24 |
| Finished | Sep 24 08:59:46 AM UTC 24 |
| Peak memory | 215812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2915050181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_pinflip.2915050181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_rand_bus_type.335709821 |
| Short name | T733 |
| Test name | |
| Test status | |
| Simulation time | 205633517 ps |
| CPU time | 1.78 seconds |
| Started | Sep 24 08:59:44 AM UTC 24 |
| Finished | Sep 24 08:59:47 AM UTC 24 |
| Peak memory | 215548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=335709821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_typ e_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_rand_bus_type.335709821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_usb_ref_disable.1948075858 |
| Short name | T732 |
| Test name | |
| Test status | |
| Simulation time | 146931117 ps |
| CPU time | 1.35 seconds |
| Started | Sep 24 08:59:44 AM UTC 24 |
| Finished | Sep 24 08:59:46 AM UTC 24 |
| Peak memory | 215520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1948075858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_usb_ref_disable.1948075858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_phy_pins_sense.2555699011 |
| Short name | T47 |
| Test name | |
| Test status | |
| Simulation time | 49851203 ps |
| CPU time | 1.05 seconds |
| Started | Sep 24 08:59:45 AM UTC 24 |
| Finished | Sep 24 08:59:47 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2555699011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_pins_sense.2555699011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_buffer.690192214 |
| Short name | T288 |
| Test name | |
| Test status | |
| Simulation time | 20009043570 ps |
| CPU time | 80.83 seconds |
| Started | Sep 24 08:59:45 AM UTC 24 |
| Finished | Sep 24 09:01:08 AM UTC 24 |
| Peak memory | 234972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=690192214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_pkt_buffer.690192214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_received.3776950599 |
| Short name | T734 |
| Test name | |
| Test status | |
| Simulation time | 188068963 ps |
| CPU time | 1.76 seconds |
| Started | Sep 24 08:59:48 AM UTC 24 |
| Finished | Sep 24 08:59:51 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3776950599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_pkt_received.3776950599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_sent.2888572986 |
| Short name | T737 |
| Test name | |
| Test status | |
| Simulation time | 220996890 ps |
| CPU time | 1.85 seconds |
| Started | Sep 24 08:59:48 AM UTC 24 |
| Finished | Sep 24 08:59:51 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2888572986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_pkt_sent.2888572986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_disconnects.2431341211 |
| Short name | T768 |
| Test name | |
| Test status | |
| Simulation time | 5825293903 ps |
| CPU time | 42.06 seconds |
| Started | Sep 24 08:59:48 AM UTC 24 |
| Finished | Sep 24 09:00:32 AM UTC 24 |
| Peak memory | 234820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2431341211 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_disconnects.2431341211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_resets.2907550194 |
| Short name | T966 |
| Test name | |
| Test status | |
| Simulation time | 7380338280 ps |
| CPU time | 222.9 seconds |
| Started | Sep 24 08:59:48 AM UTC 24 |
| Finished | Sep 24 09:03:35 AM UTC 24 |
| Peak memory | 228428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2907550194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_resets.2907550194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_rand_suspends.1191836507 |
| Short name | T780 |
| Test name | |
| Test status | |
| Simulation time | 7693671203 ps |
| CPU time | 52.38 seconds |
| Started | Sep 24 08:59:48 AM UTC 24 |
| Finished | Sep 24 09:00:42 AM UTC 24 |
| Peak memory | 235076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1191836507 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_suspends.1191836507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_in_transaction.4043441656 |
| Short name | T736 |
| Test name | |
| Test status | |
| Simulation time | 226225836 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 08:59:48 AM UTC 24 |
| Finished | Sep 24 08:59:51 AM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4043441656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_random_length_in_transaction.4043441656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_out_transaction.2955884544 |
| Short name | T735 |
| Test name | |
| Test status | |
| Simulation time | 171988484 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 08:59:48 AM UTC 24 |
| Finished | Sep 24 08:59:51 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2955884544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_random_length_out_transaction.2955884544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_resume_link_active.401382941 |
| Short name | T760 |
| Test name | |
| Test status | |
| Simulation time | 20162130253 ps |
| CPU time | 36.41 seconds |
| Started | Sep 24 08:59:48 AM UTC 24 |
| Finished | Sep 24 09:00:26 AM UTC 24 |
| Peak memory | 217828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=401382941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 4.usbdev_resume_link_active.401382941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_rx_crc_err.2869057909 |
| Short name | T738 |
| Test name | |
| Test status | |
| Simulation time | 150477076 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 08:59:50 AM UTC 24 |
| Finished | Sep 24 08:59:52 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2869057909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_crc_err.2869057909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_rx_full.2791471025 |
| Short name | T743 |
| Test name | |
| Test status | |
| Simulation time | 352029473 ps |
| CPU time | 2.16 seconds |
| Started | Sep 24 08:59:52 AM UTC 24 |
| Finished | Sep 24 08:59:55 AM UTC 24 |
| Peak memory | 217720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2791471025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_rx_full.2791471025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_rx_pid_err.3068511379 |
| Short name | T741 |
| Test name | |
| Test status | |
| Simulation time | 223710496 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 08:59:52 AM UTC 24 |
| Finished | Sep 24 08:59:55 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3068511379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_pid_err.3068511379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_sec_cm.117603803 |
| Short name | T221 |
| Test name | |
| Test status | |
| Simulation time | 357612528 ps |
| CPU time | 2.14 seconds |
| Started | Sep 24 09:00:01 AM UTC 24 |
| Finished | Sep 24 09:00:08 AM UTC 24 |
| Peak memory | 252160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=117603803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_sec_cm.117603803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority.3098466541 |
| Short name | T744 |
| Test name | |
| Test status | |
| Simulation time | 397306099 ps |
| CPU time | 2.43 seconds |
| Started | Sep 24 08:59:52 AM UTC 24 |
| Finished | Sep 24 08:59:56 AM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3098466541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority.3098466541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority_over_stall_response.1931109225 |
| Short name | T742 |
| Test name | |
| Test status | |
| Simulation time | 178531102 ps |
| CPU time | 1.63 seconds |
| Started | Sep 24 08:59:52 AM UTC 24 |
| Finished | Sep 24 08:59:55 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1931109225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority_over_stall_response.1931109225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_setup_stage.2065484160 |
| Short name | T745 |
| Test name | |
| Test status | |
| Simulation time | 145050424 ps |
| CPU time | 1.33 seconds |
| Started | Sep 24 08:59:54 AM UTC 24 |
| Finished | Sep 24 08:59:56 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2065484160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_setup_stage.2065484160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_setup_trans_ignored.1645234655 |
| Short name | T746 |
| Test name | |
| Test status | |
| Simulation time | 148956563 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 08:59:54 AM UTC 24 |
| Finished | Sep 24 08:59:56 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1645234655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 4.usbdev_setup_trans_ignored.1645234655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_smoke.1319199604 |
| Short name | T747 |
| Test name | |
| Test status | |
| Simulation time | 233286269 ps |
| CPU time | 1.92 seconds |
| Started | Sep 24 08:59:55 AM UTC 24 |
| Finished | Sep 24 08:59:58 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1319199604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_smoke.1319199604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_spurious_pids_ignored.3765636402 |
| Short name | T773 |
| Test name | |
| Test status | |
| Simulation time | 2628758409 ps |
| CPU time | 36.37 seconds |
| Started | Sep 24 08:59:57 AM UTC 24 |
| Finished | Sep 24 09:00:35 AM UTC 24 |
| Peak memory | 230520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3765636402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_spurious_pids_ignored.3765636402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_stall_priority_over_nak.3345766127 |
| Short name | T750 |
| Test name | |
| Test status | |
| Simulation time | 225435232 ps |
| CPU time | 1.75 seconds |
| Started | Sep 24 08:59:57 AM UTC 24 |
| Finished | Sep 24 09:00:00 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3345766127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stall_priority_over_nak.3345766127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_stall_trans.2554556748 |
| Short name | T749 |
| Test name | |
| Test status | |
| Simulation time | 183276806 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 08:59:57 AM UTC 24 |
| Finished | Sep 24 09:00:00 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2554556748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_stall_trans.2554556748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_stream_len_max.373917370 |
| Short name | T751 |
| Test name | |
| Test status | |
| Simulation time | 576310773 ps |
| CPU time | 2.38 seconds |
| Started | Sep 24 08:59:57 AM UTC 24 |
| Finished | Sep 24 09:00:00 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=373917370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_stream_len_max.373917370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_streaming_out.4004677627 |
| Short name | T830 |
| Test name | |
| Test status | |
| Simulation time | 3498394040 ps |
| CPU time | 102.6 seconds |
| Started | Sep 24 08:59:57 AM UTC 24 |
| Finished | Sep 24 09:01:42 AM UTC 24 |
| Peak memory | 230720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4004677627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_streaming_out.4004677627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_stress_usb_traffic.1148629806 |
| Short name | T84 |
| Test name | |
| Test status | |
| Simulation time | 6677730270 ps |
| CPU time | 101.98 seconds |
| Started | Sep 24 08:59:59 AM UTC 24 |
| Finished | Sep 24 09:01:44 AM UTC 24 |
| Peak memory | 230472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1148629806 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stress_usb_traffic.1148629806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_timeout_missing_host_handshake.289752223 |
| Short name | T703 |
| Test name | |
| Test status | |
| Simulation time | 303004602 ps |
| CPU time | 6.24 seconds |
| Started | Sep 24 08:59:05 AM UTC 24 |
| Finished | Sep 24 08:59:12 AM UTC 24 |
| Peak memory | 218284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=289752223 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_timeout_missing_host_handshake.289752223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/4.usbdev_tx_rx_disruption.4065821216 |
| Short name | T125 |
| Test name | |
| Test status | |
| Simulation time | 540711307 ps |
| CPU time | 3.53 seconds |
| Started | Sep 24 09:00:01 AM UTC 24 |
| Finished | Sep 24 09:00:09 AM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4065821216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_tx _rx_disruption.4065821216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/4.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_alert_test.812049138 |
| Short name | T2726 |
| Test name | |
| Test status | |
| Simulation time | 60465082 ps |
| CPU time | 0.82 seconds |
| Started | Sep 24 09:25:31 AM UTC 24 |
| Finished | Sep 24 09:25:33 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=812049138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_alert_test.812049138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_disconnect.3143590382 |
| Short name | T2693 |
| Test name | |
| Test status | |
| Simulation time | 10092995706 ps |
| CPU time | 12.73 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:24:50 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3143590382 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_disconnect.3143590382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_reset.2791751050 |
| Short name | T2695 |
| Test name | |
| Test status | |
| Simulation time | 13404333049 ps |
| CPU time | 17.42 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:24:55 AM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2791751050 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_reset.2791751050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_resume.909059307 |
| Short name | T2719 |
| Test name | |
| Test status | |
| Simulation time | 30255853812 ps |
| CPU time | 41.26 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:25:19 AM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=909059307 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_resume.909059307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_av_buffer.589621242 |
| Short name | T2678 |
| Test name | |
| Test status | |
| Simulation time | 205510379 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:24:38 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=589621242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_av_buffer.589621242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_bitstuff_err.1440449990 |
| Short name | T2679 |
| Test name | |
| Test status | |
| Simulation time | 148804819 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:24:38 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1440449990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_bitstuff_err.1440449990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_clear.3505464064 |
| Short name | T2686 |
| Test name | |
| Test status | |
| Simulation time | 411903513 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:24:39 AM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3505464064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 40.usbdev_data_toggle_clear.3505464064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_restore.3049449406 |
| Short name | T2685 |
| Test name | |
| Test status | |
| Simulation time | 436637403 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:24:39 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3049449406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_data_toggle_restore.3049449406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_device_address.1038774886 |
| Short name | T2721 |
| Test name | |
| Test status | |
| Simulation time | 31649315815 ps |
| CPU time | 51.45 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:25:29 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1038774886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_address.1038774886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_device_timeout.1478858745 |
| Short name | T2690 |
| Test name | |
| Test status | |
| Simulation time | 1555653331 ps |
| CPU time | 9.13 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:24:47 AM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1478858745 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_timeout.1478858745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_disable_endpoint.136184847 |
| Short name | T2688 |
| Test name | |
| Test status | |
| Simulation time | 982236265 ps |
| CPU time | 2.32 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:24:40 AM UTC 24 |
| Peak memory | 217900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=136184847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_disable_endpoint.136184847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_disconnected.3485492095 |
| Short name | T2681 |
| Test name | |
| Test status | |
| Simulation time | 142894944 ps |
| CPU time | 0.85 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:24:38 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3485492095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_disconnected.3485492095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_enable.57293712 |
| Short name | T2680 |
| Test name | |
| Test status | |
| Simulation time | 37301040 ps |
| CPU time | 0.8 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:24:38 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=57293712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_enable.57293712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_access.3760985802 |
| Short name | T2689 |
| Test name | |
| Test status | |
| Simulation time | 976560619 ps |
| CPU time | 3.2 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:24:41 AM UTC 24 |
| Peak memory | 217468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3760985802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_access.3760985802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_levels.1779649642 |
| Short name | T2684 |
| Test name | |
| Test status | |
| Simulation time | 271695691 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:24:39 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1779649642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_fifo_levels.1779649642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_rst.1597774885 |
| Short name | T2718 |
| Test name | |
| Test status | |
| Simulation time | 265740759 ps |
| CPU time | 2.56 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:25:08 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1597774885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_fifo_rst.1597774885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_in_iso.4041564519 |
| Short name | T2701 |
| Test name | |
| Test status | |
| Simulation time | 262167422 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:25:07 AM UTC 24 |
| Peak memory | 226784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4041564519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_in_iso.4041564519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_in_stall.1115817417 |
| Short name | T2698 |
| Test name | |
| Test status | |
| Simulation time | 153248901 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:25:07 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1115817417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_stall.1115817417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_in_trans.4194735423 |
| Short name | T2699 |
| Test name | |
| Test status | |
| Simulation time | 171575200 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:25:07 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4194735423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_trans.4194735423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_invalid_sync.648995723 |
| Short name | T2789 |
| Test name | |
| Test status | |
| Simulation time | 3092181561 ps |
| CPU time | 76.79 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:26:23 AM UTC 24 |
| Peak memory | 234928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=648995723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_invalid_sync.648995723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_iso_retraction.82170537 |
| Short name | T2764 |
| Test name | |
| Test status | |
| Simulation time | 10248939335 ps |
| CPU time | 61.82 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:26:08 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=82170537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 40.usbdev_iso_retraction.82170537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_link_in_err.23154271 |
| Short name | T2700 |
| Test name | |
| Test status | |
| Simulation time | 231118155 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:25:07 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=23154271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_link_in_err.23154271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_link_resume.2889674138 |
| Short name | T2737 |
| Test name | |
| Test status | |
| Simulation time | 27499006604 ps |
| CPU time | 31.74 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:25:38 AM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2889674138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_resume.2889674138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_link_suspend.2517693998 |
| Short name | T2720 |
| Test name | |
| Test status | |
| Simulation time | 11297426175 ps |
| CPU time | 15.31 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:25:21 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2517693998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_link_suspend.2517693998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_low_speed_traffic.2233355193 |
| Short name | T2741 |
| Test name | |
| Test status | |
| Simulation time | 4443857702 ps |
| CPU time | 40.41 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:25:47 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2233355193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_low_speed_traffic.2233355193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_max_inter_pkt_delay.3018823117 |
| Short name | T2739 |
| Test name | |
| Test status | |
| Simulation time | 4073793524 ps |
| CPU time | 35.85 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:25:42 AM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3018823117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_inter_pkt_delay.3018823117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_in_transaction.1100936009 |
| Short name | T2714 |
| Test name | |
| Test status | |
| Simulation time | 240116763 ps |
| CPU time | 1.63 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:25:08 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1100936009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_in_transaction.1100936009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_out_transaction.2184825256 |
| Short name | T2710 |
| Test name | |
| Test status | |
| Simulation time | 192424615 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:25:08 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2184825256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_out_transaction.2184825256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_min_inter_pkt_delay.149971210 |
| Short name | T2765 |
| Test name | |
| Test status | |
| Simulation time | 2521907551 ps |
| CPU time | 62.37 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:26:09 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=149971210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_inter_pkt_delay.149971210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_in_transaction.1561757292 |
| Short name | T2703 |
| Test name | |
| Test status | |
| Simulation time | 172010187 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:25:07 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1561757292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_in_transaction.1561757292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_out_transaction.2359256107 |
| Short name | T2702 |
| Test name | |
| Test status | |
| Simulation time | 213918781 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:25:07 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2359256107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_out_transaction.2359256107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_nak_trans.2894379166 |
| Short name | T2706 |
| Test name | |
| Test status | |
| Simulation time | 217484123 ps |
| CPU time | 1.12 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:25:07 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2894379166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_nak_trans.2894379166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_out_iso.879759437 |
| Short name | T2716 |
| Test name | |
| Test status | |
| Simulation time | 239491716 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:25:08 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=879759437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 40.usbdev_out_iso.879759437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_out_stall.1470013561 |
| Short name | T2709 |
| Test name | |
| Test status | |
| Simulation time | 155716955 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:25:08 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1470013561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_out_stall.1470013561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_out_trans_nak.2413731035 |
| Short name | T2707 |
| Test name | |
| Test status | |
| Simulation time | 173268777 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:25:07 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2413731035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_out_trans_nak.2413731035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_pending_in_trans.572675638 |
| Short name | T2705 |
| Test name | |
| Test status | |
| Simulation time | 153529308 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:25:07 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=572675638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_pending_in_trans.572675638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_pinflip.4041940816 |
| Short name | T2713 |
| Test name | |
| Test status | |
| Simulation time | 226804926 ps |
| CPU time | 1.34 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:25:08 AM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4041940816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_pinflip.4041940816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_usb_ref_disable.1410449360 |
| Short name | T2704 |
| Test name | |
| Test status | |
| Simulation time | 149710369 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:25:05 AM UTC 24 |
| Finished | Sep 24 09:25:07 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1410449360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_usb_ref_disable.1410449360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_phy_pins_sense.1699914058 |
| Short name | T2708 |
| Test name | |
| Test status | |
| Simulation time | 27314317 ps |
| CPU time | 0.92 seconds |
| Started | Sep 24 09:25:06 AM UTC 24 |
| Finished | Sep 24 09:25:07 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1699914058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_pins_sense.1699914058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_buffer.307237799 |
| Short name | T2738 |
| Test name | |
| Test status | |
| Simulation time | 15256042502 ps |
| CPU time | 35.13 seconds |
| Started | Sep 24 09:25:06 AM UTC 24 |
| Finished | Sep 24 09:25:42 AM UTC 24 |
| Peak memory | 228648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=307237799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_pkt_buffer.307237799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_received.468798244 |
| Short name | T2711 |
| Test name | |
| Test status | |
| Simulation time | 188970437 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:25:06 AM UTC 24 |
| Finished | Sep 24 09:25:08 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=468798244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_pkt_received.468798244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_sent.2407572411 |
| Short name | T2712 |
| Test name | |
| Test status | |
| Simulation time | 230006367 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:25:06 AM UTC 24 |
| Finished | Sep 24 09:25:08 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2407572411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_pkt_sent.2407572411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_in_transaction.2180614844 |
| Short name | T2717 |
| Test name | |
| Test status | |
| Simulation time | 252603356 ps |
| CPU time | 1.35 seconds |
| Started | Sep 24 09:25:06 AM UTC 24 |
| Finished | Sep 24 09:25:08 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2180614844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_random_length_in_transaction.2180614844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_out_transaction.1346157251 |
| Short name | T2715 |
| Test name | |
| Test status | |
| Simulation time | 221545344 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:25:06 AM UTC 24 |
| Finished | Sep 24 09:25:08 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1346157251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_random_length_out_transaction.1346157251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_rx_crc_err.533807846 |
| Short name | T2723 |
| Test name | |
| Test status | |
| Simulation time | 175204803 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:25:30 AM UTC 24 |
| Finished | Sep 24 09:25:32 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=533807846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_rx_crc_err.533807846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_rx_full.2123183376 |
| Short name | T2729 |
| Test name | |
| Test status | |
| Simulation time | 274839418 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:25:30 AM UTC 24 |
| Finished | Sep 24 09:25:33 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2123183376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_rx_full.2123183376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_setup_stage.1995208294 |
| Short name | T2724 |
| Test name | |
| Test status | |
| Simulation time | 166647857 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:25:30 AM UTC 24 |
| Finished | Sep 24 09:25:33 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1995208294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_setup_stage.1995208294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_setup_trans_ignored.245545267 |
| Short name | T2722 |
| Test name | |
| Test status | |
| Simulation time | 155013854 ps |
| CPU time | 0.86 seconds |
| Started | Sep 24 09:25:30 AM UTC 24 |
| Finished | Sep 24 09:25:32 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=245545267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 40.usbdev_setup_trans_ignored.245545267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_smoke.2308220876 |
| Short name | T2731 |
| Test name | |
| Test status | |
| Simulation time | 187858890 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 09:25:30 AM UTC 24 |
| Finished | Sep 24 09:25:33 AM UTC 24 |
| Peak memory | 215764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2308220876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_smoke.2308220876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_spurious_pids_ignored.2280274302 |
| Short name | T2759 |
| Test name | |
| Test status | |
| Simulation time | 3758111530 ps |
| CPU time | 26.81 seconds |
| Started | Sep 24 09:25:30 AM UTC 24 |
| Finished | Sep 24 09:25:59 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2280274302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_spurious_pids_ignored.2280274302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_stall_priority_over_nak.1236370656 |
| Short name | T2732 |
| Test name | |
| Test status | |
| Simulation time | 197516520 ps |
| CPU time | 1.29 seconds |
| Started | Sep 24 09:25:30 AM UTC 24 |
| Finished | Sep 24 09:25:33 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1236370656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stall_priority_over_nak.1236370656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_stall_trans.2314160249 |
| Short name | T2728 |
| Test name | |
| Test status | |
| Simulation time | 192740707 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:25:30 AM UTC 24 |
| Finished | Sep 24 09:25:33 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2314160249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_stall_trans.2314160249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_stream_len_max.2669532667 |
| Short name | T2671 |
| Test name | |
| Test status | |
| Simulation time | 412803427 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:25:31 AM UTC 24 |
| Finished | Sep 24 09:25:33 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2669532667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stream_len_max.2669532667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_streaming_out.53942273 |
| Short name | T2809 |
| Test name | |
| Test status | |
| Simulation time | 2852965695 ps |
| CPU time | 71.91 seconds |
| Started | Sep 24 09:25:30 AM UTC 24 |
| Finished | Sep 24 09:26:44 AM UTC 24 |
| Peak memory | 228672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=53942273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_streaming_out.53942273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_timeout_missing_host_handshake.3835089046 |
| Short name | T2694 |
| Test name | |
| Test status | |
| Simulation time | 718650510 ps |
| CPU time | 13.7 seconds |
| Started | Sep 24 09:24:36 AM UTC 24 |
| Finished | Sep 24 09:24:51 AM UTC 24 |
| Peak memory | 217940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3835089046 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_timeout_missing_host_handshake.3835089046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/40.usbdev_tx_rx_disruption.1126212923 |
| Short name | T179 |
| Test name | |
| Test status | |
| Simulation time | 533790321 ps |
| CPU time | 1.93 seconds |
| Started | Sep 24 09:25:31 AM UTC 24 |
| Finished | Sep 24 09:25:34 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1126212923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_t x_rx_disruption.1126212923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/40.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/400.usbdev_tx_rx_disruption.3562786277 |
| Short name | T3694 |
| Test name | |
| Test status | |
| Simulation time | 533343727 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:13 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3562786277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 400.usbdev_ tx_rx_disruption.3562786277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/400.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/401.usbdev_tx_rx_disruption.3829458219 |
| Short name | T3693 |
| Test name | |
| Test status | |
| Simulation time | 469451092 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:13 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3829458219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 401.usbdev_ tx_rx_disruption.3829458219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/401.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/402.usbdev_tx_rx_disruption.2017042249 |
| Short name | T227 |
| Test name | |
| Test status | |
| Simulation time | 492645736 ps |
| CPU time | 2.21 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2017042249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 402.usbdev_ tx_rx_disruption.2017042249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/402.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/403.usbdev_tx_rx_disruption.652356276 |
| Short name | T3697 |
| Test name | |
| Test status | |
| Simulation time | 485977421 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=652356276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 403.usbdev_t x_rx_disruption.652356276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/403.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/404.usbdev_tx_rx_disruption.2316870220 |
| Short name | T3706 |
| Test name | |
| Test status | |
| Simulation time | 659581473 ps |
| CPU time | 2.21 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2316870220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 404.usbdev_ tx_rx_disruption.2316870220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/404.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/405.usbdev_tx_rx_disruption.4144586431 |
| Short name | T3710 |
| Test name | |
| Test status | |
| Simulation time | 609442365 ps |
| CPU time | 2.37 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4144586431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 405.usbdev_ tx_rx_disruption.4144586431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/405.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/406.usbdev_tx_rx_disruption.2817923212 |
| Short name | T3702 |
| Test name | |
| Test status | |
| Simulation time | 503400809 ps |
| CPU time | 1.98 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2817923212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 406.usbdev_ tx_rx_disruption.2817923212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/406.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/407.usbdev_tx_rx_disruption.3475301103 |
| Short name | T3701 |
| Test name | |
| Test status | |
| Simulation time | 455038217 ps |
| CPU time | 1.87 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3475301103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 407.usbdev_ tx_rx_disruption.3475301103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/407.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/408.usbdev_tx_rx_disruption.1351082725 |
| Short name | T3699 |
| Test name | |
| Test status | |
| Simulation time | 589017157 ps |
| CPU time | 1.79 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1351082725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 408.usbdev_ tx_rx_disruption.1351082725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/408.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/409.usbdev_tx_rx_disruption.1119082995 |
| Short name | T3713 |
| Test name | |
| Test status | |
| Simulation time | 616809264 ps |
| CPU time | 2.31 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1119082995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 409.usbdev_ tx_rx_disruption.1119082995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/409.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_alert_test.3831138716 |
| Short name | T2777 |
| Test name | |
| Test status | |
| Simulation time | 58892637 ps |
| CPU time | 0.67 seconds |
| Started | Sep 24 09:26:14 AM UTC 24 |
| Finished | Sep 24 09:26:15 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3831138716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 41.usbdev_alert_test.3831138716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_disconnect.2329988130 |
| Short name | T2740 |
| Test name | |
| Test status | |
| Simulation time | 10437712727 ps |
| CPU time | 13.47 seconds |
| Started | Sep 24 09:25:31 AM UTC 24 |
| Finished | Sep 24 09:25:46 AM UTC 24 |
| Peak memory | 217536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2329988130 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_disconnect.2329988130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_reset.293609336 |
| Short name | T2757 |
| Test name | |
| Test status | |
| Simulation time | 18832546226 ps |
| CPU time | 25.26 seconds |
| Started | Sep 24 09:25:31 AM UTC 24 |
| Finished | Sep 24 09:25:57 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=293609336 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_reset.293609336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_resume.4183146934 |
| Short name | T2760 |
| Test name | |
| Test status | |
| Simulation time | 25547465879 ps |
| CPU time | 32.31 seconds |
| Started | Sep 24 09:25:31 AM UTC 24 |
| Finished | Sep 24 09:26:05 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4183146934 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_resume.4183146934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_av_buffer.1242188968 |
| Short name | T2727 |
| Test name | |
| Test status | |
| Simulation time | 193009280 ps |
| CPU time | 1.14 seconds |
| Started | Sep 24 09:25:31 AM UTC 24 |
| Finished | Sep 24 09:25:33 AM UTC 24 |
| Peak memory | 214928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242188968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_av_buffer.1242188968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_bitstuff_err.3263350093 |
| Short name | T2733 |
| Test name | |
| Test status | |
| Simulation time | 205482869 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:25:31 AM UTC 24 |
| Finished | Sep 24 09:25:33 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3263350093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_bitstuff_err.3263350093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_clear.3807200742 |
| Short name | T2734 |
| Test name | |
| Test status | |
| Simulation time | 294308412 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:25:31 AM UTC 24 |
| Finished | Sep 24 09:25:34 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3807200742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 41.usbdev_data_toggle_clear.3807200742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_restore.3381723355 |
| Short name | T2736 |
| Test name | |
| Test status | |
| Simulation time | 969815372 ps |
| CPU time | 2.75 seconds |
| Started | Sep 24 09:25:31 AM UTC 24 |
| Finished | Sep 24 09:25:35 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3381723355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_data_toggle_restore.3381723355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_device_address.3805074039 |
| Short name | T2793 |
| Test name | |
| Test status | |
| Simulation time | 37336706649 ps |
| CPU time | 65.07 seconds |
| Started | Sep 24 09:25:31 AM UTC 24 |
| Finished | Sep 24 09:26:38 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3805074039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_address.3805074039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_device_timeout.3931384770 |
| Short name | T2761 |
| Test name | |
| Test status | |
| Simulation time | 1567721059 ps |
| CPU time | 32.35 seconds |
| Started | Sep 24 09:25:31 AM UTC 24 |
| Finished | Sep 24 09:26:05 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3931384770 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_timeout.3931384770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_disable_endpoint.1241760736 |
| Short name | T2735 |
| Test name | |
| Test status | |
| Simulation time | 829949479 ps |
| CPU time | 2 seconds |
| Started | Sep 24 09:25:31 AM UTC 24 |
| Finished | Sep 24 09:25:34 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1241760736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_disable_endpoint.1241760736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_disconnected.2519378014 |
| Short name | T2669 |
| Test name | |
| Test status | |
| Simulation time | 141959936 ps |
| CPU time | 0.96 seconds |
| Started | Sep 24 09:25:31 AM UTC 24 |
| Finished | Sep 24 09:25:33 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2519378014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_disconnected.2519378014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_enable.168581001 |
| Short name | T2677 |
| Test name | |
| Test status | |
| Simulation time | 43604863 ps |
| CPU time | 0.81 seconds |
| Started | Sep 24 09:25:31 AM UTC 24 |
| Finished | Sep 24 09:25:33 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=168581001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_enable.168581001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_access.1879145093 |
| Short name | T2753 |
| Test name | |
| Test status | |
| Simulation time | 693446077 ps |
| CPU time | 2.11 seconds |
| Started | Sep 24 09:25:50 AM UTC 24 |
| Finished | Sep 24 09:25:53 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1879145093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_access.1879145093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_types.4233146016 |
| Short name | T548 |
| Test name | |
| Test status | |
| Simulation time | 514458203 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 09:25:50 AM UTC 24 |
| Finished | Sep 24 09:25:53 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4233146016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_types.4233146016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_levels.1333066822 |
| Short name | T2744 |
| Test name | |
| Test status | |
| Simulation time | 244741467 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:25:50 AM UTC 24 |
| Finished | Sep 24 09:25:52 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1333066822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_fifo_levels.1333066822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_rst.6074281 |
| Short name | T2755 |
| Test name | |
| Test status | |
| Simulation time | 189585415 ps |
| CPU time | 2.57 seconds |
| Started | Sep 24 09:25:50 AM UTC 24 |
| Finished | Sep 24 09:25:54 AM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=6074281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_fifo_rst.6074281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_in_iso.3481984063 |
| Short name | T2746 |
| Test name | |
| Test status | |
| Simulation time | 168444065 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:25:50 AM UTC 24 |
| Finished | Sep 24 09:25:52 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3481984063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_in_iso.3481984063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_in_stall.228971561 |
| Short name | T2743 |
| Test name | |
| Test status | |
| Simulation time | 143664012 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:25:50 AM UTC 24 |
| Finished | Sep 24 09:25:52 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=228971561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_in_stall.228971561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_in_trans.4287036763 |
| Short name | T2745 |
| Test name | |
| Test status | |
| Simulation time | 171306174 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:25:50 AM UTC 24 |
| Finished | Sep 24 09:25:52 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4287036763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_in_trans.4287036763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_invalid_sync.1316053144 |
| Short name | T2865 |
| Test name | |
| Test status | |
| Simulation time | 4676283199 ps |
| CPU time | 118.52 seconds |
| Started | Sep 24 09:25:50 AM UTC 24 |
| Finished | Sep 24 09:27:51 AM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1316053144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 41.usbdev_invalid_sync.1316053144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_iso_retraction.2468944898 |
| Short name | T2794 |
| Test name | |
| Test status | |
| Simulation time | 8131457207 ps |
| CPU time | 49.49 seconds |
| Started | Sep 24 09:25:50 AM UTC 24 |
| Finished | Sep 24 09:26:41 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2468944898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_iso_retraction.2468944898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_link_in_err.2520374103 |
| Short name | T2748 |
| Test name | |
| Test status | |
| Simulation time | 170990234 ps |
| CPU time | 1.38 seconds |
| Started | Sep 24 09:25:50 AM UTC 24 |
| Finished | Sep 24 09:25:53 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2520374103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_in_err.2520374103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_link_resume.3400456036 |
| Short name | T2762 |
| Test name | |
| Test status | |
| Simulation time | 9027314266 ps |
| CPU time | 13.64 seconds |
| Started | Sep 24 09:25:50 AM UTC 24 |
| Finished | Sep 24 09:26:05 AM UTC 24 |
| Peak memory | 228668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3400456036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_resume.3400456036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_link_suspend.339338093 |
| Short name | T2763 |
| Test name | |
| Test status | |
| Simulation time | 9803397383 ps |
| CPU time | 14.93 seconds |
| Started | Sep 24 09:25:50 AM UTC 24 |
| Finished | Sep 24 09:26:07 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=339338093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_suspend.339338093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_low_speed_traffic.1641343996 |
| Short name | T2838 |
| Test name | |
| Test status | |
| Simulation time | 3125138594 ps |
| CPU time | 76.52 seconds |
| Started | Sep 24 09:25:50 AM UTC 24 |
| Finished | Sep 24 09:27:09 AM UTC 24 |
| Peak memory | 234664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1641343996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_low_speed_traffic.1641343996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_max_inter_pkt_delay.2166571661 |
| Short name | T2843 |
| Test name | |
| Test status | |
| Simulation time | 3743797213 ps |
| CPU time | 91.18 seconds |
| Started | Sep 24 09:25:50 AM UTC 24 |
| Finished | Sep 24 09:27:24 AM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2166571661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_inter_pkt_delay.2166571661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_in_transaction.982631676 |
| Short name | T2749 |
| Test name | |
| Test status | |
| Simulation time | 263373876 ps |
| CPU time | 1.31 seconds |
| Started | Sep 24 09:25:50 AM UTC 24 |
| Finished | Sep 24 09:25:53 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=982631676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_in_transaction.982631676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_out_transaction.2842718893 |
| Short name | T2747 |
| Test name | |
| Test status | |
| Simulation time | 189343548 ps |
| CPU time | 1.14 seconds |
| Started | Sep 24 09:25:51 AM UTC 24 |
| Finished | Sep 24 09:25:53 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2842718893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_out_transaction.2842718893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_min_inter_pkt_delay.134545261 |
| Short name | T2766 |
| Test name | |
| Test status | |
| Simulation time | 2753188499 ps |
| CPU time | 18.27 seconds |
| Started | Sep 24 09:25:51 AM UTC 24 |
| Finished | Sep 24 09:26:10 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=134545261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_inter_pkt_delay.134545261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_in_transaction.2434007493 |
| Short name | T2750 |
| Test name | |
| Test status | |
| Simulation time | 188387988 ps |
| CPU time | 1.35 seconds |
| Started | Sep 24 09:25:51 AM UTC 24 |
| Finished | Sep 24 09:25:53 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2434007493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_in_transaction.2434007493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_out_transaction.3955329007 |
| Short name | T2752 |
| Test name | |
| Test status | |
| Simulation time | 148707795 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:25:51 AM UTC 24 |
| Finished | Sep 24 09:25:53 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3955329007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_out_transaction.3955329007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_nak_trans.1748992842 |
| Short name | T2754 |
| Test name | |
| Test status | |
| Simulation time | 238485198 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 09:25:51 AM UTC 24 |
| Finished | Sep 24 09:25:53 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1748992842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_nak_trans.1748992842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_out_iso.3415710706 |
| Short name | T2751 |
| Test name | |
| Test status | |
| Simulation time | 228331127 ps |
| CPU time | 1.29 seconds |
| Started | Sep 24 09:25:51 AM UTC 24 |
| Finished | Sep 24 09:25:53 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3415710706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_out_iso.3415710706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_out_stall.2956410636 |
| Short name | T2769 |
| Test name | |
| Test status | |
| Simulation time | 178143386 ps |
| CPU time | 0.89 seconds |
| Started | Sep 24 09:26:13 AM UTC 24 |
| Finished | Sep 24 09:26:15 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2956410636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_out_stall.2956410636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_out_trans_nak.3694515429 |
| Short name | T2770 |
| Test name | |
| Test status | |
| Simulation time | 196370067 ps |
| CPU time | 0.92 seconds |
| Started | Sep 24 09:26:13 AM UTC 24 |
| Finished | Sep 24 09:26:15 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3694515429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_out_trans_nak.3694515429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_pending_in_trans.258755657 |
| Short name | T2767 |
| Test name | |
| Test status | |
| Simulation time | 147774729 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 09:26:13 AM UTC 24 |
| Finished | Sep 24 09:26:15 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=258755657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_pending_in_trans.258755657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_pinflip.2097402739 |
| Short name | T2773 |
| Test name | |
| Test status | |
| Simulation time | 211124410 ps |
| CPU time | 1.05 seconds |
| Started | Sep 24 09:26:13 AM UTC 24 |
| Finished | Sep 24 09:26:15 AM UTC 24 |
| Peak memory | 217120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2097402739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_pinflip.2097402739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_usb_ref_disable.3267510313 |
| Short name | T2771 |
| Test name | |
| Test status | |
| Simulation time | 145136981 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:26:13 AM UTC 24 |
| Finished | Sep 24 09:26:15 AM UTC 24 |
| Peak memory | 214464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3267510313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_usb_ref_disable.3267510313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_phy_pins_sense.573578867 |
| Short name | T2768 |
| Test name | |
| Test status | |
| Simulation time | 43728638 ps |
| CPU time | 0.7 seconds |
| Started | Sep 24 09:26:13 AM UTC 24 |
| Finished | Sep 24 09:26:15 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=573578867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_phy_pins_sense.573578867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_buffer.1954360479 |
| Short name | T2792 |
| Test name | |
| Test status | |
| Simulation time | 7996494674 ps |
| CPU time | 21.18 seconds |
| Started | Sep 24 09:26:13 AM UTC 24 |
| Finished | Sep 24 09:26:36 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1954360479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_pkt_buffer.1954360479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_received.2978464422 |
| Short name | T2774 |
| Test name | |
| Test status | |
| Simulation time | 183237870 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:26:13 AM UTC 24 |
| Finished | Sep 24 09:26:15 AM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2978464422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_pkt_received.2978464422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_sent.1356166033 |
| Short name | T2780 |
| Test name | |
| Test status | |
| Simulation time | 264679059 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 09:26:13 AM UTC 24 |
| Finished | Sep 24 09:26:15 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1356166033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_pkt_sent.1356166033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_in_transaction.2634125602 |
| Short name | T2776 |
| Test name | |
| Test status | |
| Simulation time | 278678547 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:26:13 AM UTC 24 |
| Finished | Sep 24 09:26:15 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2634125602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_random_length_in_transaction.2634125602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_out_transaction.2497895166 |
| Short name | T2778 |
| Test name | |
| Test status | |
| Simulation time | 204754649 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:26:13 AM UTC 24 |
| Finished | Sep 24 09:26:15 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2497895166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_random_length_out_transaction.2497895166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_rx_crc_err.2185847989 |
| Short name | T2783 |
| Test name | |
| Test status | |
| Simulation time | 171077758 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:26:13 AM UTC 24 |
| Finished | Sep 24 09:26:16 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2185847989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_rx_crc_err.2185847989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_rx_full.3962489184 |
| Short name | T2786 |
| Test name | |
| Test status | |
| Simulation time | 374383263 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:26:13 AM UTC 24 |
| Finished | Sep 24 09:26:16 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3962489184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_rx_full.3962489184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_setup_stage.2162302672 |
| Short name | T2775 |
| Test name | |
| Test status | |
| Simulation time | 167656463 ps |
| CPU time | 0.92 seconds |
| Started | Sep 24 09:26:13 AM UTC 24 |
| Finished | Sep 24 09:26:15 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2162302672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_setup_stage.2162302672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_setup_trans_ignored.2515041837 |
| Short name | T2781 |
| Test name | |
| Test status | |
| Simulation time | 162113917 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:26:13 AM UTC 24 |
| Finished | Sep 24 09:26:15 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2515041837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 41.usbdev_setup_trans_ignored.2515041837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_smoke.3127946746 |
| Short name | T2785 |
| Test name | |
| Test status | |
| Simulation time | 243601183 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:26:13 AM UTC 24 |
| Finished | Sep 24 09:26:16 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3127946746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_smoke.3127946746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_spurious_pids_ignored.778824119 |
| Short name | T2791 |
| Test name | |
| Test status | |
| Simulation time | 2957902882 ps |
| CPU time | 20.73 seconds |
| Started | Sep 24 09:26:14 AM UTC 24 |
| Finished | Sep 24 09:26:35 AM UTC 24 |
| Peak memory | 235096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=778824119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_spurious_pids_ignored.778824119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_stall_priority_over_nak.2469590151 |
| Short name | T2782 |
| Test name | |
| Test status | |
| Simulation time | 177980046 ps |
| CPU time | 0.96 seconds |
| Started | Sep 24 09:26:14 AM UTC 24 |
| Finished | Sep 24 09:26:16 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2469590151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stall_priority_over_nak.2469590151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_stall_trans.1874246675 |
| Short name | T2784 |
| Test name | |
| Test status | |
| Simulation time | 161023797 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:26:14 AM UTC 24 |
| Finished | Sep 24 09:26:16 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1874246675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_stall_trans.1874246675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_stream_len_max.1396473787 |
| Short name | T2787 |
| Test name | |
| Test status | |
| Simulation time | 724350241 ps |
| CPU time | 1.94 seconds |
| Started | Sep 24 09:26:14 AM UTC 24 |
| Finished | Sep 24 09:26:17 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1396473787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stream_len_max.1396473787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_streaming_out.900419216 |
| Short name | T2867 |
| Test name | |
| Test status | |
| Simulation time | 3868820913 ps |
| CPU time | 96.58 seconds |
| Started | Sep 24 09:26:14 AM UTC 24 |
| Finished | Sep 24 09:27:52 AM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=900419216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_streaming_out.900419216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_timeout_missing_host_handshake.669977316 |
| Short name | T2758 |
| Test name | |
| Test status | |
| Simulation time | 1263569413 ps |
| CPU time | 25.88 seconds |
| Started | Sep 24 09:25:31 AM UTC 24 |
| Finished | Sep 24 09:25:58 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=669977316 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_timeout_missing_host_handshake.669977316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/41.usbdev_tx_rx_disruption.3740394129 |
| Short name | T225 |
| Test name | |
| Test status | |
| Simulation time | 516878645 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:26:14 AM UTC 24 |
| Finished | Sep 24 09:26:16 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3740394129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_t x_rx_disruption.3740394129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/41.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/410.usbdev_tx_rx_disruption.1832972718 |
| Short name | T3698 |
| Test name | |
| Test status | |
| Simulation time | 572839617 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1832972718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 410.usbdev_ tx_rx_disruption.1832972718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/410.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/411.usbdev_tx_rx_disruption.2903343490 |
| Short name | T3705 |
| Test name | |
| Test status | |
| Simulation time | 536371811 ps |
| CPU time | 1.9 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2903343490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 411.usbdev_ tx_rx_disruption.2903343490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/411.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/412.usbdev_tx_rx_disruption.3896303072 |
| Short name | T3722 |
| Test name | |
| Test status | |
| Simulation time | 480179497 ps |
| CPU time | 2.41 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:15 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3896303072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 412.usbdev_ tx_rx_disruption.3896303072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/412.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/413.usbdev_tx_rx_disruption.699373438 |
| Short name | T3715 |
| Test name | |
| Test status | |
| Simulation time | 626760100 ps |
| CPU time | 2.18 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=699373438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 413.usbdev_t x_rx_disruption.699373438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/413.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/414.usbdev_tx_rx_disruption.3879128290 |
| Short name | T3707 |
| Test name | |
| Test status | |
| Simulation time | 503482056 ps |
| CPU time | 1.88 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3879128290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 414.usbdev_ tx_rx_disruption.3879128290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/414.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/415.usbdev_tx_rx_disruption.967067182 |
| Short name | T3709 |
| Test name | |
| Test status | |
| Simulation time | 521242524 ps |
| CPU time | 1.93 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=967067182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 415.usbdev_t x_rx_disruption.967067182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/415.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/416.usbdev_tx_rx_disruption.3645265371 |
| Short name | T3718 |
| Test name | |
| Test status | |
| Simulation time | 492946955 ps |
| CPU time | 2.17 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:15 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3645265371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 416.usbdev_ tx_rx_disruption.3645265371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/416.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/417.usbdev_tx_rx_disruption.1853920530 |
| Short name | T3703 |
| Test name | |
| Test status | |
| Simulation time | 572511351 ps |
| CPU time | 1.74 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1853920530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 417.usbdev_ tx_rx_disruption.1853920530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/417.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/418.usbdev_tx_rx_disruption.1071714666 |
| Short name | T3712 |
| Test name | |
| Test status | |
| Simulation time | 632333619 ps |
| CPU time | 1.97 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1071714666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 418.usbdev_ tx_rx_disruption.1071714666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/418.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/419.usbdev_tx_rx_disruption.739689317 |
| Short name | T223 |
| Test name | |
| Test status | |
| Simulation time | 537539470 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=739689317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 419.usbdev_t x_rx_disruption.739689317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/419.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_alert_test.30058571 |
| Short name | T2845 |
| Test name | |
| Test status | |
| Simulation time | 44807164 ps |
| CPU time | 0.77 seconds |
| Started | Sep 24 09:27:27 AM UTC 24 |
| Finished | Sep 24 09:27:29 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=30058571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_alert_test.30058571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_disconnect.773386390 |
| Short name | T2790 |
| Test name | |
| Test status | |
| Simulation time | 10501037544 ps |
| CPU time | 13.09 seconds |
| Started | Sep 24 09:26:14 AM UTC 24 |
| Finished | Sep 24 09:26:28 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=773386390 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_disconnect.773386390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_reset.3758534227 |
| Short name | T2812 |
| Test name | |
| Test status | |
| Simulation time | 15049943893 ps |
| CPU time | 17.37 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:26:58 AM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3758534227 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_reset.3758534227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_resume.2260205724 |
| Short name | T2841 |
| Test name | |
| Test status | |
| Simulation time | 31533851882 ps |
| CPU time | 40.96 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:27:22 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2260205724 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_resume.2260205724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_av_buffer.1557342709 |
| Short name | T2795 |
| Test name | |
| Test status | |
| Simulation time | 213394499 ps |
| CPU time | 1.05 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:26:42 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1557342709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_av_buffer.1557342709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_bitstuff_err.2402660973 |
| Short name | T2796 |
| Test name | |
| Test status | |
| Simulation time | 148234605 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:26:42 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2402660973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_bitstuff_err.2402660973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_clear.58535016 |
| Short name | T2802 |
| Test name | |
| Test status | |
| Simulation time | 398275060 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:26:43 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=58535016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_clear.58535016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_restore.736112265 |
| Short name | T2807 |
| Test name | |
| Test status | |
| Simulation time | 603275962 ps |
| CPU time | 2.02 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:26:43 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=736112265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_restore.736112265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_device_address.934585547 |
| Short name | T2894 |
| Test name | |
| Test status | |
| Simulation time | 52188310676 ps |
| CPU time | 85.85 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:28:08 AM UTC 24 |
| Peak memory | 218320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=934585547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_device_address.934585547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_device_timeout.807713250 |
| Short name | T2842 |
| Test name | |
| Test status | |
| Simulation time | 5292811143 ps |
| CPU time | 41.45 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:27:23 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=807713250 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_timeout.807713250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_disable_endpoint.2715909050 |
| Short name | T2800 |
| Test name | |
| Test status | |
| Simulation time | 526703112 ps |
| CPU time | 1.78 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:26:43 AM UTC 24 |
| Peak memory | 215904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2715909050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_disable_endpoint.2715909050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_disconnected.3974358902 |
| Short name | T2799 |
| Test name | |
| Test status | |
| Simulation time | 150134570 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:26:42 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3974358902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_disconnected.3974358902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_enable.3652905152 |
| Short name | T2798 |
| Test name | |
| Test status | |
| Simulation time | 53127326 ps |
| CPU time | 0.89 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:26:42 AM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3652905152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 42.usbdev_enable.3652905152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_access.1699737075 |
| Short name | T2808 |
| Test name | |
| Test status | |
| Simulation time | 923026338 ps |
| CPU time | 2.51 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:26:44 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1699737075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_access.1699737075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_types.3678071039 |
| Short name | T566 |
| Test name | |
| Test status | |
| Simulation time | 197503021 ps |
| CPU time | 0.94 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:26:42 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3678071039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_types.3678071039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_levels.888021589 |
| Short name | T355 |
| Test name | |
| Test status | |
| Simulation time | 276629722 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:26:43 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=888021589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_fifo_levels.888021589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_rst.2817307550 |
| Short name | T2772 |
| Test name | |
| Test status | |
| Simulation time | 327143175 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:26:43 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2817307550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_fifo_rst.2817307550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_in_iso.2990282504 |
| Short name | T2797 |
| Test name | |
| Test status | |
| Simulation time | 161235807 ps |
| CPU time | 0.86 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:26:42 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2990282504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 42.usbdev_in_iso.2990282504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_in_stall.1198744801 |
| Short name | T2803 |
| Test name | |
| Test status | |
| Simulation time | 148947616 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:26:43 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1198744801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_stall.1198744801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_in_trans.1797531489 |
| Short name | T2801 |
| Test name | |
| Test status | |
| Simulation time | 184430238 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:26:42 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1797531489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_trans.1797531489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_invalid_sync.1792012865 |
| Short name | T2846 |
| Test name | |
| Test status | |
| Simulation time | 5502356168 ps |
| CPU time | 47.9 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:27:30 AM UTC 24 |
| Peak memory | 230664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1792012865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 42.usbdev_invalid_sync.1792012865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_iso_retraction.2363352743 |
| Short name | T2891 |
| Test name | |
| Test status | |
| Simulation time | 13387296043 ps |
| CPU time | 77.02 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:27:59 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2363352743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_iso_retraction.2363352743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_link_in_err.194298375 |
| Short name | T2805 |
| Test name | |
| Test status | |
| Simulation time | 247331842 ps |
| CPU time | 1.16 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:26:43 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=194298375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_link_in_err.194298375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_link_resume.2880509930 |
| Short name | T2840 |
| Test name | |
| Test status | |
| Simulation time | 23877511344 ps |
| CPU time | 36.69 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:27:19 AM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2880509930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_resume.2880509930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_link_suspend.3591685724 |
| Short name | T2811 |
| Test name | |
| Test status | |
| Simulation time | 9112134296 ps |
| CPU time | 12.21 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:26:54 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3591685724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_link_suspend.3591685724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_low_speed_traffic.2926835554 |
| Short name | T2864 |
| Test name | |
| Test status | |
| Simulation time | 2621460564 ps |
| CPU time | 63.06 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:27:45 AM UTC 24 |
| Peak memory | 230512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2926835554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_low_speed_traffic.2926835554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_max_inter_pkt_delay.2227039158 |
| Short name | T2839 |
| Test name | |
| Test status | |
| Simulation time | 3716046384 ps |
| CPU time | 26.71 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:27:09 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2227039158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_inter_pkt_delay.2227039158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_in_transaction.667812647 |
| Short name | T2806 |
| Test name | |
| Test status | |
| Simulation time | 250461855 ps |
| CPU time | 1.29 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:26:43 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=667812647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_in_transaction.667812647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_out_transaction.2315875211 |
| Short name | T2804 |
| Test name | |
| Test status | |
| Simulation time | 188143032 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:26:43 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2315875211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_out_transaction.2315875211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_min_inter_pkt_delay.3670522719 |
| Short name | T2858 |
| Test name | |
| Test status | |
| Simulation time | 2089798635 ps |
| CPU time | 48.8 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:27:31 AM UTC 24 |
| Peak memory | 228224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3670522719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_inter_pkt_delay.3670522719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_in_transaction.30384421 |
| Short name | T2816 |
| Test name | |
| Test status | |
| Simulation time | 155536121 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:27:04 AM UTC 24 |
| Finished | Sep 24 09:27:06 AM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=30384421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_in_transaction.30384421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_out_transaction.1346991773 |
| Short name | T2821 |
| Test name | |
| Test status | |
| Simulation time | 175073286 ps |
| CPU time | 1.25 seconds |
| Started | Sep 24 09:27:04 AM UTC 24 |
| Finished | Sep 24 09:27:06 AM UTC 24 |
| Peak memory | 215764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1346991773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_out_transaction.1346991773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_nak_trans.119236031 |
| Short name | T2815 |
| Test name | |
| Test status | |
| Simulation time | 195040980 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:27:04 AM UTC 24 |
| Finished | Sep 24 09:27:06 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=119236031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_nak_trans.119236031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_out_iso.239819857 |
| Short name | T2818 |
| Test name | |
| Test status | |
| Simulation time | 180780288 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:27:04 AM UTC 24 |
| Finished | Sep 24 09:27:06 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=239819857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 42.usbdev_out_iso.239819857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_out_stall.2944626441 |
| Short name | T2817 |
| Test name | |
| Test status | |
| Simulation time | 182830175 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:27:04 AM UTC 24 |
| Finished | Sep 24 09:27:06 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2944626441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_out_stall.2944626441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_out_trans_nak.4244006229 |
| Short name | T2831 |
| Test name | |
| Test status | |
| Simulation time | 213533037 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:27:04 AM UTC 24 |
| Finished | Sep 24 09:27:07 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4244006229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_out_trans_nak.4244006229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_pending_in_trans.857414414 |
| Short name | T2820 |
| Test name | |
| Test status | |
| Simulation time | 188001778 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:27:04 AM UTC 24 |
| Finished | Sep 24 09:27:06 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=857414414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_pending_in_trans.857414414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_pinflip.3882203621 |
| Short name | T2826 |
| Test name | |
| Test status | |
| Simulation time | 217161080 ps |
| CPU time | 1.25 seconds |
| Started | Sep 24 09:27:04 AM UTC 24 |
| Finished | Sep 24 09:27:06 AM UTC 24 |
| Peak memory | 214904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3882203621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_pinflip.3882203621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_usb_ref_disable.1542293547 |
| Short name | T2822 |
| Test name | |
| Test status | |
| Simulation time | 154516627 ps |
| CPU time | 1.12 seconds |
| Started | Sep 24 09:27:04 AM UTC 24 |
| Finished | Sep 24 09:27:06 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1542293547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_usb_ref_disable.1542293547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_phy_pins_sense.1326968261 |
| Short name | T2813 |
| Test name | |
| Test status | |
| Simulation time | 53917360 ps |
| CPU time | 0.78 seconds |
| Started | Sep 24 09:27:04 AM UTC 24 |
| Finished | Sep 24 09:27:06 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1326968261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_pins_sense.1326968261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_buffer.878160386 |
| Short name | T2862 |
| Test name | |
| Test status | |
| Simulation time | 12666989866 ps |
| CPU time | 34.5 seconds |
| Started | Sep 24 09:27:04 AM UTC 24 |
| Finished | Sep 24 09:27:40 AM UTC 24 |
| Peak memory | 234264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=878160386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_pkt_buffer.878160386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_received.2605596587 |
| Short name | T2830 |
| Test name | |
| Test status | |
| Simulation time | 186311504 ps |
| CPU time | 1.33 seconds |
| Started | Sep 24 09:27:04 AM UTC 24 |
| Finished | Sep 24 09:27:07 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2605596587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_pkt_received.2605596587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_sent.4012896100 |
| Short name | T2835 |
| Test name | |
| Test status | |
| Simulation time | 194082341 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:27:04 AM UTC 24 |
| Finished | Sep 24 09:27:07 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4012896100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_pkt_sent.4012896100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_in_transaction.4236731387 |
| Short name | T2828 |
| Test name | |
| Test status | |
| Simulation time | 233776752 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:27:04 AM UTC 24 |
| Finished | Sep 24 09:27:07 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4236731387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_random_length_in_transaction.4236731387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_out_transaction.1225138366 |
| Short name | T2825 |
| Test name | |
| Test status | |
| Simulation time | 186865898 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:27:04 AM UTC 24 |
| Finished | Sep 24 09:27:06 AM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1225138366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_random_length_out_transaction.1225138366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_rx_crc_err.3575970584 |
| Short name | T2823 |
| Test name | |
| Test status | |
| Simulation time | 147501968 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 09:27:04 AM UTC 24 |
| Finished | Sep 24 09:27:06 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3575970584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_rx_crc_err.3575970584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_rx_full.1063592354 |
| Short name | T2827 |
| Test name | |
| Test status | |
| Simulation time | 251803743 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:27:05 AM UTC 24 |
| Finished | Sep 24 09:27:07 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1063592354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_rx_full.1063592354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_setup_stage.2822728194 |
| Short name | T2834 |
| Test name | |
| Test status | |
| Simulation time | 149104304 ps |
| CPU time | 1.25 seconds |
| Started | Sep 24 09:27:05 AM UTC 24 |
| Finished | Sep 24 09:27:07 AM UTC 24 |
| Peak memory | 217484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2822728194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_setup_stage.2822728194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_setup_trans_ignored.3507185185 |
| Short name | T2832 |
| Test name | |
| Test status | |
| Simulation time | 163995133 ps |
| CPU time | 1.14 seconds |
| Started | Sep 24 09:27:05 AM UTC 24 |
| Finished | Sep 24 09:27:07 AM UTC 24 |
| Peak memory | 215108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3507185185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 42.usbdev_setup_trans_ignored.3507185185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_smoke.2520993300 |
| Short name | T2833 |
| Test name | |
| Test status | |
| Simulation time | 217179639 ps |
| CPU time | 1.12 seconds |
| Started | Sep 24 09:27:05 AM UTC 24 |
| Finished | Sep 24 09:27:07 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2520993300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_smoke.2520993300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_spurious_pids_ignored.1178629213 |
| Short name | T2921 |
| Test name | |
| Test status | |
| Simulation time | 3600904346 ps |
| CPU time | 91.41 seconds |
| Started | Sep 24 09:27:05 AM UTC 24 |
| Finished | Sep 24 09:28:38 AM UTC 24 |
| Peak memory | 230512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1178629213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 42.usbdev_spurious_pids_ignored.1178629213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_stall_priority_over_nak.3681185165 |
| Short name | T2836 |
| Test name | |
| Test status | |
| Simulation time | 177964295 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:27:05 AM UTC 24 |
| Finished | Sep 24 09:27:07 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3681185165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stall_priority_over_nak.3681185165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_stall_trans.4210387181 |
| Short name | T2829 |
| Test name | |
| Test status | |
| Simulation time | 181025857 ps |
| CPU time | 0.89 seconds |
| Started | Sep 24 09:27:05 AM UTC 24 |
| Finished | Sep 24 09:27:07 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4210387181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_stall_trans.4210387181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_stream_len_max.380834476 |
| Short name | T2837 |
| Test name | |
| Test status | |
| Simulation time | 826026405 ps |
| CPU time | 2.31 seconds |
| Started | Sep 24 09:27:05 AM UTC 24 |
| Finished | Sep 24 09:27:08 AM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=380834476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_stream_len_max.380834476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_streaming_out.3005183340 |
| Short name | T2868 |
| Test name | |
| Test status | |
| Simulation time | 1931558652 ps |
| CPU time | 45.93 seconds |
| Started | Sep 24 09:27:05 AM UTC 24 |
| Finished | Sep 24 09:27:52 AM UTC 24 |
| Peak memory | 234832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3005183340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_streaming_out.3005183340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_timeout_missing_host_handshake.2166393899 |
| Short name | T2810 |
| Test name | |
| Test status | |
| Simulation time | 325376546 ps |
| CPU time | 4.51 seconds |
| Started | Sep 24 09:26:40 AM UTC 24 |
| Finished | Sep 24 09:26:46 AM UTC 24 |
| Peak memory | 218344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2166393899 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_timeout_missing_host_handshake.2166393899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/42.usbdev_tx_rx_disruption.876717329 |
| Short name | T2851 |
| Test name | |
| Test status | |
| Simulation time | 470592328 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:27:27 AM UTC 24 |
| Finished | Sep 24 09:27:30 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=876717329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_tx _rx_disruption.876717329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/42.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/420.usbdev_tx_rx_disruption.2982651061 |
| Short name | T3711 |
| Test name | |
| Test status | |
| Simulation time | 456486384 ps |
| CPU time | 1.84 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 215364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2982651061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 420.usbdev_ tx_rx_disruption.2982651061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/420.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/421.usbdev_tx_rx_disruption.1928029446 |
| Short name | T3704 |
| Test name | |
| Test status | |
| Simulation time | 552769019 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 215304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1928029446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 421.usbdev_ tx_rx_disruption.1928029446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/421.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/422.usbdev_tx_rx_disruption.1368537567 |
| Short name | T3714 |
| Test name | |
| Test status | |
| Simulation time | 703026944 ps |
| CPU time | 1.81 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1368537567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 422.usbdev_ tx_rx_disruption.1368537567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/422.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/423.usbdev_tx_rx_disruption.1759792439 |
| Short name | T3708 |
| Test name | |
| Test status | |
| Simulation time | 541999631 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1759792439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 423.usbdev_ tx_rx_disruption.1759792439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/423.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/424.usbdev_tx_rx_disruption.2246040528 |
| Short name | T3721 |
| Test name | |
| Test status | |
| Simulation time | 534202510 ps |
| CPU time | 2.03 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:15 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2246040528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 424.usbdev_ tx_rx_disruption.2246040528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/424.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/425.usbdev_tx_rx_disruption.3119429450 |
| Short name | T3717 |
| Test name | |
| Test status | |
| Simulation time | 538455519 ps |
| CPU time | 1.87 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:15 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3119429450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 425.usbdev_ tx_rx_disruption.3119429450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/425.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/426.usbdev_tx_rx_disruption.582763225 |
| Short name | T3728 |
| Test name | |
| Test status | |
| Simulation time | 648663978 ps |
| CPU time | 2.32 seconds |
| Started | Sep 24 09:47:11 AM UTC 24 |
| Finished | Sep 24 09:47:15 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=582763225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 426.usbdev_t x_rx_disruption.582763225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/426.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/427.usbdev_tx_rx_disruption.2034102653 |
| Short name | T3720 |
| Test name | |
| Test status | |
| Simulation time | 563099081 ps |
| CPU time | 2.05 seconds |
| Started | Sep 24 09:47:12 AM UTC 24 |
| Finished | Sep 24 09:47:15 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2034102653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 427.usbdev_ tx_rx_disruption.2034102653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/427.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/428.usbdev_tx_rx_disruption.169361874 |
| Short name | T3729 |
| Test name | |
| Test status | |
| Simulation time | 542972319 ps |
| CPU time | 2.38 seconds |
| Started | Sep 24 09:47:12 AM UTC 24 |
| Finished | Sep 24 09:47:15 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=169361874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 428.usbdev_t x_rx_disruption.169361874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/428.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/429.usbdev_tx_rx_disruption.3142370929 |
| Short name | T3723 |
| Test name | |
| Test status | |
| Simulation time | 539249126 ps |
| CPU time | 1.93 seconds |
| Started | Sep 24 09:47:12 AM UTC 24 |
| Finished | Sep 24 09:47:15 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3142370929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 429.usbdev_ tx_rx_disruption.3142370929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/429.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_alert_test.1700389030 |
| Short name | T2902 |
| Test name | |
| Test status | |
| Simulation time | 41102436 ps |
| CPU time | 0.77 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:28:22 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1700389030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 43.usbdev_alert_test.1700389030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_disconnect.845740944 |
| Short name | T2863 |
| Test name | |
| Test status | |
| Simulation time | 11172915778 ps |
| CPU time | 13.96 seconds |
| Started | Sep 24 09:27:27 AM UTC 24 |
| Finished | Sep 24 09:27:43 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=845740944 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_disconnect.845740944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_reset.3567521629 |
| Short name | T2869 |
| Test name | |
| Test status | |
| Simulation time | 21109601738 ps |
| CPU time | 24.89 seconds |
| Started | Sep 24 09:27:27 AM UTC 24 |
| Finished | Sep 24 09:27:54 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3567521629 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_reset.3567521629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_resume.4108135396 |
| Short name | T2893 |
| Test name | |
| Test status | |
| Simulation time | 26155896546 ps |
| CPU time | 32.88 seconds |
| Started | Sep 24 09:27:27 AM UTC 24 |
| Finished | Sep 24 09:28:02 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4108135396 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_resume.4108135396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_av_buffer.3566234533 |
| Short name | T2848 |
| Test name | |
| Test status | |
| Simulation time | 177925647 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:27:27 AM UTC 24 |
| Finished | Sep 24 09:27:30 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3566234533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_av_buffer.3566234533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_bitstuff_err.868727317 |
| Short name | T2847 |
| Test name | |
| Test status | |
| Simulation time | 182664514 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:27:27 AM UTC 24 |
| Finished | Sep 24 09:27:30 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=868727317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_bitstuff_err.868727317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_clear.3936022417 |
| Short name | T2856 |
| Test name | |
| Test status | |
| Simulation time | 460303750 ps |
| CPU time | 1.78 seconds |
| Started | Sep 24 09:27:28 AM UTC 24 |
| Finished | Sep 24 09:27:31 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3936022417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 43.usbdev_data_toggle_clear.3936022417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_restore.1331729386 |
| Short name | T2857 |
| Test name | |
| Test status | |
| Simulation time | 514293442 ps |
| CPU time | 2.05 seconds |
| Started | Sep 24 09:27:28 AM UTC 24 |
| Finished | Sep 24 09:27:31 AM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1331729386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_data_toggle_restore.1331729386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_device_address.459499930 |
| Short name | T2922 |
| Test name | |
| Test status | |
| Simulation time | 43724652108 ps |
| CPU time | 70.46 seconds |
| Started | Sep 24 09:27:28 AM UTC 24 |
| Finished | Sep 24 09:28:40 AM UTC 24 |
| Peak memory | 218384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=459499930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_device_address.459499930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_device_timeout.3836315663 |
| Short name | T2852 |
| Test name | |
| Test status | |
| Simulation time | 185494261 ps |
| CPU time | 1.16 seconds |
| Started | Sep 24 09:27:28 AM UTC 24 |
| Finished | Sep 24 09:27:30 AM UTC 24 |
| Peak memory | 214924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3836315663 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_timeout.3836315663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_disable_endpoint.1047746967 |
| Short name | T2859 |
| Test name | |
| Test status | |
| Simulation time | 856008320 ps |
| CPU time | 2 seconds |
| Started | Sep 24 09:27:28 AM UTC 24 |
| Finished | Sep 24 09:27:31 AM UTC 24 |
| Peak memory | 215244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1047746967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_disable_endpoint.1047746967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_disconnected.1931767077 |
| Short name | T2850 |
| Test name | |
| Test status | |
| Simulation time | 180048443 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:27:28 AM UTC 24 |
| Finished | Sep 24 09:27:30 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1931767077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_disconnected.1931767077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_enable.3068282528 |
| Short name | T2849 |
| Test name | |
| Test status | |
| Simulation time | 39908050 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:27:28 AM UTC 24 |
| Finished | Sep 24 09:27:30 AM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3068282528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_enable.3068282528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_access.432464984 |
| Short name | T2860 |
| Test name | |
| Test status | |
| Simulation time | 931633850 ps |
| CPU time | 2.6 seconds |
| Started | Sep 24 09:27:28 AM UTC 24 |
| Finished | Sep 24 09:27:32 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=432464984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_access.432464984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_types.2863272809 |
| Short name | T478 |
| Test name | |
| Test status | |
| Simulation time | 461281202 ps |
| CPU time | 1.8 seconds |
| Started | Sep 24 09:27:28 AM UTC 24 |
| Finished | Sep 24 09:27:31 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2863272809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_types.2863272809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_levels.3361293834 |
| Short name | T330 |
| Test name | |
| Test status | |
| Simulation time | 277596759 ps |
| CPU time | 1.28 seconds |
| Started | Sep 24 09:27:28 AM UTC 24 |
| Finished | Sep 24 09:27:31 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3361293834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_fifo_levels.3361293834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_rst.2391991179 |
| Short name | T2861 |
| Test name | |
| Test status | |
| Simulation time | 390007711 ps |
| CPU time | 2.96 seconds |
| Started | Sep 24 09:27:28 AM UTC 24 |
| Finished | Sep 24 09:27:32 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2391991179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_fifo_rst.2391991179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_in_iso.4015863768 |
| Short name | T2853 |
| Test name | |
| Test status | |
| Simulation time | 172162930 ps |
| CPU time | 0.89 seconds |
| Started | Sep 24 09:27:28 AM UTC 24 |
| Finished | Sep 24 09:27:30 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4015863768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_in_iso.4015863768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_in_stall.4288983299 |
| Short name | T2854 |
| Test name | |
| Test status | |
| Simulation time | 200416301 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:27:28 AM UTC 24 |
| Finished | Sep 24 09:27:31 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4288983299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_stall.4288983299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_in_trans.3002859552 |
| Short name | T2855 |
| Test name | |
| Test status | |
| Simulation time | 202586376 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:27:28 AM UTC 24 |
| Finished | Sep 24 09:27:31 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3002859552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_trans.3002859552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_invalid_sync.2004096714 |
| Short name | T2917 |
| Test name | |
| Test status | |
| Simulation time | 2425105372 ps |
| CPU time | 60.77 seconds |
| Started | Sep 24 09:27:28 AM UTC 24 |
| Finished | Sep 24 09:28:31 AM UTC 24 |
| Peak memory | 230408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2004096714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 43.usbdev_invalid_sync.2004096714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_iso_retraction.3590379465 |
| Short name | T2995 |
| Test name | |
| Test status | |
| Simulation time | 9628954435 ps |
| CPU time | 107.99 seconds |
| Started | Sep 24 09:27:52 AM UTC 24 |
| Finished | Sep 24 09:29:43 AM UTC 24 |
| Peak memory | 218316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3590379465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_iso_retraction.3590379465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_link_in_err.3642432043 |
| Short name | T2871 |
| Test name | |
| Test status | |
| Simulation time | 259656032 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:27:52 AM UTC 24 |
| Finished | Sep 24 09:27:55 AM UTC 24 |
| Peak memory | 215816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3642432043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_in_err.3642432043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_link_resume.1005158876 |
| Short name | T2920 |
| Test name | |
| Test status | |
| Simulation time | 28971275826 ps |
| CPU time | 42.56 seconds |
| Started | Sep 24 09:27:52 AM UTC 24 |
| Finished | Sep 24 09:28:37 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1005158876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_resume.1005158876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_link_suspend.4250399873 |
| Short name | T2892 |
| Test name | |
| Test status | |
| Simulation time | 3510510435 ps |
| CPU time | 6.31 seconds |
| Started | Sep 24 09:27:52 AM UTC 24 |
| Finished | Sep 24 09:28:00 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4250399873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_link_suspend.4250399873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_low_speed_traffic.1733055109 |
| Short name | T3005 |
| Test name | |
| Test status | |
| Simulation time | 5032327681 ps |
| CPU time | 128.64 seconds |
| Started | Sep 24 09:27:52 AM UTC 24 |
| Finished | Sep 24 09:30:03 AM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1733055109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_low_speed_traffic.1733055109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_max_inter_pkt_delay.299299831 |
| Short name | T2916 |
| Test name | |
| Test status | |
| Simulation time | 3692383467 ps |
| CPU time | 33.26 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:28:27 AM UTC 24 |
| Peak memory | 228388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=299299831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_inter_pkt_delay.299299831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_in_transaction.1120522349 |
| Short name | T2872 |
| Test name | |
| Test status | |
| Simulation time | 245879122 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:27:55 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1120522349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_in_transaction.1120522349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_out_transaction.3009464052 |
| Short name | T2874 |
| Test name | |
| Test status | |
| Simulation time | 237311577 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:27:55 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3009464052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_out_transaction.3009464052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_min_inter_pkt_delay.2038106308 |
| Short name | T2974 |
| Test name | |
| Test status | |
| Simulation time | 3666698898 ps |
| CPU time | 94.46 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:29:29 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2038106308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_inter_pkt_delay.2038106308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_in_transaction.1768666186 |
| Short name | T2879 |
| Test name | |
| Test status | |
| Simulation time | 185796906 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:27:55 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1768666186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_in_transaction.1768666186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_out_transaction.2192704072 |
| Short name | T2878 |
| Test name | |
| Test status | |
| Simulation time | 151252277 ps |
| CPU time | 1.05 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:27:55 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2192704072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_out_transaction.2192704072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_nak_trans.2791740225 |
| Short name | T2876 |
| Test name | |
| Test status | |
| Simulation time | 229548801 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:27:55 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2791740225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_nak_trans.2791740225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_out_iso.52575706 |
| Short name | T2887 |
| Test name | |
| Test status | |
| Simulation time | 202462291 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:27:55 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=52575706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_out_iso.52575706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_out_stall.2608529779 |
| Short name | T2819 |
| Test name | |
| Test status | |
| Simulation time | 162069940 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:27:55 AM UTC 24 |
| Peak memory | 215904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2608529779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_out_stall.2608529779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_out_trans_nak.3318033073 |
| Short name | T2884 |
| Test name | |
| Test status | |
| Simulation time | 159377149 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:27:55 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3318033073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_out_trans_nak.3318033073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_pending_in_trans.2919264696 |
| Short name | T2877 |
| Test name | |
| Test status | |
| Simulation time | 158593402 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:27:55 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2919264696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_pending_in_trans.2919264696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_pinflip.2051193905 |
| Short name | T2888 |
| Test name | |
| Test status | |
| Simulation time | 269589855 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:27:55 AM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2051193905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_pinflip.2051193905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_usb_ref_disable.1904345501 |
| Short name | T2881 |
| Test name | |
| Test status | |
| Simulation time | 166328659 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:27:55 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1904345501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_usb_ref_disable.1904345501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_phy_pins_sense.1166874241 |
| Short name | T2875 |
| Test name | |
| Test status | |
| Simulation time | 35857567 ps |
| CPU time | 0.74 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:27:55 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1166874241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_pins_sense.1166874241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_buffer.3800318849 |
| Short name | T2942 |
| Test name | |
| Test status | |
| Simulation time | 19920807183 ps |
| CPU time | 54.04 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:28:49 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3800318849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_pkt_buffer.3800318849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_received.2565998519 |
| Short name | T2885 |
| Test name | |
| Test status | |
| Simulation time | 183908679 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:27:55 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2565998519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_pkt_received.2565998519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_sent.2248408147 |
| Short name | T2886 |
| Test name | |
| Test status | |
| Simulation time | 250607625 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:27:55 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2248408147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_pkt_sent.2248408147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_in_transaction.929583751 |
| Short name | T2880 |
| Test name | |
| Test status | |
| Simulation time | 206217205 ps |
| CPU time | 0.94 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:27:55 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=929583751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_random_length_in_transaction.929583751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_out_transaction.1976749492 |
| Short name | T2883 |
| Test name | |
| Test status | |
| Simulation time | 185771854 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:27:55 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1976749492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_random_length_out_transaction.1976749492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_rx_crc_err.2988034123 |
| Short name | T2889 |
| Test name | |
| Test status | |
| Simulation time | 176422203 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:27:55 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2988034123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_rx_crc_err.2988034123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_rx_full.1878528909 |
| Short name | T2890 |
| Test name | |
| Test status | |
| Simulation time | 429365382 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:27:53 AM UTC 24 |
| Finished | Sep 24 09:27:56 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1878528909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_rx_full.1878528909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_setup_stage.413035481 |
| Short name | T2904 |
| Test name | |
| Test status | |
| Simulation time | 173948127 ps |
| CPU time | 1.16 seconds |
| Started | Sep 24 09:28:19 AM UTC 24 |
| Finished | Sep 24 09:28:22 AM UTC 24 |
| Peak memory | 215604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=413035481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_setup_stage.413035481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_setup_trans_ignored.2384833143 |
| Short name | T2898 |
| Test name | |
| Test status | |
| Simulation time | 155276917 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:28:19 AM UTC 24 |
| Finished | Sep 24 09:28:22 AM UTC 24 |
| Peak memory | 215560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2384833143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 43.usbdev_setup_trans_ignored.2384833143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_smoke.2084424792 |
| Short name | T2896 |
| Test name | |
| Test status | |
| Simulation time | 221376150 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:28:19 AM UTC 24 |
| Finished | Sep 24 09:28:22 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2084424792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_smoke.2084424792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_spurious_pids_ignored.2608188997 |
| Short name | T2918 |
| Test name | |
| Test status | |
| Simulation time | 1570049909 ps |
| CPU time | 11.84 seconds |
| Started | Sep 24 09:28:19 AM UTC 24 |
| Finished | Sep 24 09:28:33 AM UTC 24 |
| Peak memory | 234704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2608188997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_spurious_pids_ignored.2608188997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_stall_priority_over_nak.2446716200 |
| Short name | T2903 |
| Test name | |
| Test status | |
| Simulation time | 193863165 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:28:19 AM UTC 24 |
| Finished | Sep 24 09:28:22 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2446716200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stall_priority_over_nak.2446716200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_stall_trans.3438373385 |
| Short name | T2899 |
| Test name | |
| Test status | |
| Simulation time | 174324749 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:28:19 AM UTC 24 |
| Finished | Sep 24 09:28:22 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3438373385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_stall_trans.3438373385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_stream_len_max.2020678964 |
| Short name | T2911 |
| Test name | |
| Test status | |
| Simulation time | 267342370 ps |
| CPU time | 1.79 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:28:23 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2020678964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stream_len_max.2020678964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_streaming_out.2333151087 |
| Short name | T3002 |
| Test name | |
| Test status | |
| Simulation time | 3930375446 ps |
| CPU time | 97.43 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:29:59 AM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2333151087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_streaming_out.2333151087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_timeout_missing_host_handshake.2707243220 |
| Short name | T2866 |
| Test name | |
| Test status | |
| Simulation time | 1117850711 ps |
| CPU time | 22.87 seconds |
| Started | Sep 24 09:27:28 AM UTC 24 |
| Finished | Sep 24 09:27:52 AM UTC 24 |
| Peak memory | 218016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2707243220 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_timeout_missing_host_handshake.2707243220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/43.usbdev_tx_rx_disruption.160856195 |
| Short name | T2909 |
| Test name | |
| Test status | |
| Simulation time | 435730962 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:28:23 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=160856195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_tx _rx_disruption.160856195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/43.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/430.usbdev_tx_rx_disruption.3280900258 |
| Short name | T3716 |
| Test name | |
| Test status | |
| Simulation time | 539639197 ps |
| CPU time | 1.8 seconds |
| Started | Sep 24 09:47:12 AM UTC 24 |
| Finished | Sep 24 09:47:14 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3280900258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 430.usbdev_ tx_rx_disruption.3280900258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/430.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/431.usbdev_tx_rx_disruption.4158626952 |
| Short name | T3724 |
| Test name | |
| Test status | |
| Simulation time | 654042505 ps |
| CPU time | 1.83 seconds |
| Started | Sep 24 09:47:12 AM UTC 24 |
| Finished | Sep 24 09:47:15 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4158626952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 431.usbdev_ tx_rx_disruption.4158626952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/431.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/432.usbdev_tx_rx_disruption.3154274109 |
| Short name | T3727 |
| Test name | |
| Test status | |
| Simulation time | 630959049 ps |
| CPU time | 2.08 seconds |
| Started | Sep 24 09:47:12 AM UTC 24 |
| Finished | Sep 24 09:47:15 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3154274109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 432.usbdev_ tx_rx_disruption.3154274109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/432.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/433.usbdev_tx_rx_disruption.2994510377 |
| Short name | T3725 |
| Test name | |
| Test status | |
| Simulation time | 516972887 ps |
| CPU time | 1.97 seconds |
| Started | Sep 24 09:47:12 AM UTC 24 |
| Finished | Sep 24 09:47:15 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2994510377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 433.usbdev_ tx_rx_disruption.2994510377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/433.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/434.usbdev_tx_rx_disruption.2132035310 |
| Short name | T3726 |
| Test name | |
| Test status | |
| Simulation time | 628704181 ps |
| CPU time | 2.07 seconds |
| Started | Sep 24 09:47:12 AM UTC 24 |
| Finished | Sep 24 09:47:15 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2132035310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 434.usbdev_ tx_rx_disruption.2132035310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/434.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/435.usbdev_tx_rx_disruption.2380830761 |
| Short name | T3719 |
| Test name | |
| Test status | |
| Simulation time | 457291962 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 09:47:12 AM UTC 24 |
| Finished | Sep 24 09:47:15 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2380830761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 435.usbdev_ tx_rx_disruption.2380830761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/435.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/436.usbdev_tx_rx_disruption.1530527671 |
| Short name | T3731 |
| Test name | |
| Test status | |
| Simulation time | 494381653 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:48:08 AM UTC 24 |
| Finished | Sep 24 09:48:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1530527671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 436.usbdev_ tx_rx_disruption.1530527671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/436.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/437.usbdev_tx_rx_disruption.1121951876 |
| Short name | T3745 |
| Test name | |
| Test status | |
| Simulation time | 495551487 ps |
| CPU time | 1.82 seconds |
| Started | Sep 24 09:48:08 AM UTC 24 |
| Finished | Sep 24 09:48:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1121951876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 437.usbdev_ tx_rx_disruption.1121951876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/437.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/438.usbdev_tx_rx_disruption.3329685928 |
| Short name | T3737 |
| Test name | |
| Test status | |
| Simulation time | 512424665 ps |
| CPU time | 1.78 seconds |
| Started | Sep 24 09:48:08 AM UTC 24 |
| Finished | Sep 24 09:48:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3329685928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 438.usbdev_ tx_rx_disruption.3329685928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/438.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/439.usbdev_tx_rx_disruption.4109670131 |
| Short name | T3740 |
| Test name | |
| Test status | |
| Simulation time | 512625087 ps |
| CPU time | 1.78 seconds |
| Started | Sep 24 09:48:08 AM UTC 24 |
| Finished | Sep 24 09:48:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4109670131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 439.usbdev_ tx_rx_disruption.4109670131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/439.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_alert_test.2309067640 |
| Short name | T2956 |
| Test name | |
| Test status | |
| Simulation time | 31683876 ps |
| CPU time | 0.73 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:16 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2309067640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 44.usbdev_alert_test.2309067640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_disconnect.2719640568 |
| Short name | T2919 |
| Test name | |
| Test status | |
| Simulation time | 10880228319 ps |
| CPU time | 14.14 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:28:35 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2719640568 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_disconnect.2719640568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_reset.3855083194 |
| Short name | T2924 |
| Test name | |
| Test status | |
| Simulation time | 19329039276 ps |
| CPU time | 22.47 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:28:44 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3855083194 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_reset.3855083194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_resume.3141012776 |
| Short name | T2943 |
| Test name | |
| Test status | |
| Simulation time | 23454425064 ps |
| CPU time | 29.03 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:28:50 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3141012776 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_resume.3141012776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_av_buffer.460057030 |
| Short name | T2905 |
| Test name | |
| Test status | |
| Simulation time | 173218841 ps |
| CPU time | 0.92 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:28:22 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=460057030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_av_buffer.460057030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_bitstuff_err.1852766846 |
| Short name | T2908 |
| Test name | |
| Test status | |
| Simulation time | 182434920 ps |
| CPU time | 1.34 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:28:22 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1852766846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_bitstuff_err.1852766846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_clear.3232212384 |
| Short name | T2907 |
| Test name | |
| Test status | |
| Simulation time | 268077866 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:28:22 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3232212384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 44.usbdev_data_toggle_clear.3232212384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_restore.1411507210 |
| Short name | T2913 |
| Test name | |
| Test status | |
| Simulation time | 466638020 ps |
| CPU time | 2.09 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:28:23 AM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1411507210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_data_toggle_restore.1411507210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_device_address.3088062712 |
| Short name | T2973 |
| Test name | |
| Test status | |
| Simulation time | 37285352094 ps |
| CPU time | 64.89 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:29:27 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3088062712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_address.3088062712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_device_timeout.3336681081 |
| Short name | T2923 |
| Test name | |
| Test status | |
| Simulation time | 2467397168 ps |
| CPU time | 18.87 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:28:40 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3336681081 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_timeout.3336681081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_disable_endpoint.2706042009 |
| Short name | T2912 |
| Test name | |
| Test status | |
| Simulation time | 623542661 ps |
| CPU time | 1.85 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:28:23 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2706042009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_disable_endpoint.2706042009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_disconnected.3313843961 |
| Short name | T2910 |
| Test name | |
| Test status | |
| Simulation time | 146289263 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:28:23 AM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3313843961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_disconnected.3313843961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_enable.3534178909 |
| Short name | T2906 |
| Test name | |
| Test status | |
| Simulation time | 72248096 ps |
| CPU time | 0.83 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:28:22 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3534178909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 44.usbdev_enable.3534178909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_access.3569933625 |
| Short name | T2915 |
| Test name | |
| Test status | |
| Simulation time | 974839825 ps |
| CPU time | 2.86 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:28:24 AM UTC 24 |
| Peak memory | 218224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3569933625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_access.3569933625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_types.2653044809 |
| Short name | T460 |
| Test name | |
| Test status | |
| Simulation time | 876331444 ps |
| CPU time | 1.92 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:28:23 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2653044809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_types.2653044809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_levels.2655442524 |
| Short name | T319 |
| Test name | |
| Test status | |
| Simulation time | 259772201 ps |
| CPU time | 1.41 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:28:23 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2655442524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_fifo_levels.2655442524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_rst.3075166561 |
| Short name | T2914 |
| Test name | |
| Test status | |
| Simulation time | 167186210 ps |
| CPU time | 2.02 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:28:24 AM UTC 24 |
| Peak memory | 218284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3075166561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_fifo_rst.3075166561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_in_iso.2766238647 |
| Short name | T2934 |
| Test name | |
| Test status | |
| Simulation time | 201472115 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:28:43 AM UTC 24 |
| Finished | Sep 24 09:28:46 AM UTC 24 |
| Peak memory | 225820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2766238647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_in_iso.2766238647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_in_stall.327980379 |
| Short name | T2927 |
| Test name | |
| Test status | |
| Simulation time | 145108934 ps |
| CPU time | 1.16 seconds |
| Started | Sep 24 09:28:43 AM UTC 24 |
| Finished | Sep 24 09:28:45 AM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=327980379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_in_stall.327980379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_in_trans.4107496207 |
| Short name | T2925 |
| Test name | |
| Test status | |
| Simulation time | 237122696 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:28:43 AM UTC 24 |
| Finished | Sep 24 09:28:45 AM UTC 24 |
| Peak memory | 215764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4107496207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_in_trans.4107496207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_invalid_sync.3874508918 |
| Short name | T2970 |
| Test name | |
| Test status | |
| Simulation time | 3990384181 ps |
| CPU time | 35.09 seconds |
| Started | Sep 24 09:28:43 AM UTC 24 |
| Finished | Sep 24 09:29:19 AM UTC 24 |
| Peak memory | 234864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3874508918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 44.usbdev_invalid_sync.3874508918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_iso_retraction.3679110467 |
| Short name | T3004 |
| Test name | |
| Test status | |
| Simulation time | 7631930413 ps |
| CPU time | 77.73 seconds |
| Started | Sep 24 09:28:43 AM UTC 24 |
| Finished | Sep 24 09:30:03 AM UTC 24 |
| Peak memory | 218188 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3679110467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_iso_retraction.3679110467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_link_in_err.1472591208 |
| Short name | T2926 |
| Test name | |
| Test status | |
| Simulation time | 204208200 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:28:43 AM UTC 24 |
| Finished | Sep 24 09:28:45 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1472591208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_in_err.1472591208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_link_resume.1779852491 |
| Short name | T2946 |
| Test name | |
| Test status | |
| Simulation time | 15262345962 ps |
| CPU time | 20.81 seconds |
| Started | Sep 24 09:28:43 AM UTC 24 |
| Finished | Sep 24 09:29:05 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1779852491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_resume.1779852491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_link_suspend.1363299260 |
| Short name | T2944 |
| Test name | |
| Test status | |
| Simulation time | 5917952282 ps |
| CPU time | 9.03 seconds |
| Started | Sep 24 09:28:43 AM UTC 24 |
| Finished | Sep 24 09:28:53 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1363299260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_link_suspend.1363299260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_low_speed_traffic.1703639447 |
| Short name | T2975 |
| Test name | |
| Test status | |
| Simulation time | 4491833657 ps |
| CPU time | 45.04 seconds |
| Started | Sep 24 09:28:43 AM UTC 24 |
| Finished | Sep 24 09:29:30 AM UTC 24 |
| Peak memory | 234912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1703639447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_low_speed_traffic.1703639447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_max_inter_pkt_delay.388704733 |
| Short name | T2947 |
| Test name | |
| Test status | |
| Simulation time | 2697037420 ps |
| CPU time | 22.91 seconds |
| Started | Sep 24 09:28:43 AM UTC 24 |
| Finished | Sep 24 09:29:07 AM UTC 24 |
| Peak memory | 234960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=388704733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_inter_pkt_delay.388704733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_in_transaction.1370831314 |
| Short name | T2938 |
| Test name | |
| Test status | |
| Simulation time | 300331508 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:28:43 AM UTC 24 |
| Finished | Sep 24 09:28:46 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1370831314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_in_transaction.1370831314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_out_transaction.2525149377 |
| Short name | T2932 |
| Test name | |
| Test status | |
| Simulation time | 214710747 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:28:43 AM UTC 24 |
| Finished | Sep 24 09:28:46 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2525149377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_out_transaction.2525149377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_min_inter_pkt_delay.640452601 |
| Short name | T2945 |
| Test name | |
| Test status | |
| Simulation time | 1786291880 ps |
| CPU time | 15.35 seconds |
| Started | Sep 24 09:28:43 AM UTC 24 |
| Finished | Sep 24 09:29:00 AM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=640452601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_inter_pkt_delay.640452601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_in_transaction.4169792726 |
| Short name | T2935 |
| Test name | |
| Test status | |
| Simulation time | 179710815 ps |
| CPU time | 1.22 seconds |
| Started | Sep 24 09:28:43 AM UTC 24 |
| Finished | Sep 24 09:28:46 AM UTC 24 |
| Peak memory | 215360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4169792726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_in_transaction.4169792726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_out_transaction.2573168541 |
| Short name | T2928 |
| Test name | |
| Test status | |
| Simulation time | 150041912 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:28:43 AM UTC 24 |
| Finished | Sep 24 09:28:45 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2573168541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_out_transaction.2573168541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_nak_trans.690762570 |
| Short name | T2930 |
| Test name | |
| Test status | |
| Simulation time | 218296193 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:28:43 AM UTC 24 |
| Finished | Sep 24 09:28:46 AM UTC 24 |
| Peak memory | 215392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=690762570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_nak_trans.690762570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_out_iso.3161169847 |
| Short name | T2931 |
| Test name | |
| Test status | |
| Simulation time | 153906316 ps |
| CPU time | 0.85 seconds |
| Started | Sep 24 09:28:43 AM UTC 24 |
| Finished | Sep 24 09:28:46 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3161169847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_out_iso.3161169847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_out_stall.1302123114 |
| Short name | T2940 |
| Test name | |
| Test status | |
| Simulation time | 186790787 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:28:44 AM UTC 24 |
| Finished | Sep 24 09:28:46 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1302123114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_out_stall.1302123114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_out_trans_nak.506743776 |
| Short name | T2936 |
| Test name | |
| Test status | |
| Simulation time | 146833472 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:28:44 AM UTC 24 |
| Finished | Sep 24 09:28:46 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=506743776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_out_trans_nak.506743776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_pending_in_trans.2856376131 |
| Short name | T2937 |
| Test name | |
| Test status | |
| Simulation time | 152494678 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:28:44 AM UTC 24 |
| Finished | Sep 24 09:28:46 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2856376131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_pending_in_trans.2856376131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_pinflip.197802695 |
| Short name | T2939 |
| Test name | |
| Test status | |
| Simulation time | 222252479 ps |
| CPU time | 1.23 seconds |
| Started | Sep 24 09:28:44 AM UTC 24 |
| Finished | Sep 24 09:28:46 AM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=197802695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_pinflip.197802695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_usb_ref_disable.347161361 |
| Short name | T2929 |
| Test name | |
| Test status | |
| Simulation time | 149448610 ps |
| CPU time | 0.81 seconds |
| Started | Sep 24 09:28:44 AM UTC 24 |
| Finished | Sep 24 09:28:45 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=347161361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 44.usbdev_phy_config_usb_ref_disable.347161361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_phy_pins_sense.2301650123 |
| Short name | T2933 |
| Test name | |
| Test status | |
| Simulation time | 37600486 ps |
| CPU time | 0.89 seconds |
| Started | Sep 24 09:28:44 AM UTC 24 |
| Finished | Sep 24 09:28:46 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2301650123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_pins_sense.2301650123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_buffer.3551057373 |
| Short name | T3001 |
| Test name | |
| Test status | |
| Simulation time | 15042252726 ps |
| CPU time | 38.96 seconds |
| Started | Sep 24 09:29:13 AM UTC 24 |
| Finished | Sep 24 09:29:54 AM UTC 24 |
| Peak memory | 228600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3551057373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_pkt_buffer.3551057373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_received.3028332101 |
| Short name | T2951 |
| Test name | |
| Test status | |
| Simulation time | 199212668 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:29:13 AM UTC 24 |
| Finished | Sep 24 09:29:16 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3028332101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_pkt_received.3028332101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_sent.3901032972 |
| Short name | T2950 |
| Test name | |
| Test status | |
| Simulation time | 166117274 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:16 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3901032972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_pkt_sent.3901032972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_in_transaction.546100502 |
| Short name | T2954 |
| Test name | |
| Test status | |
| Simulation time | 194557167 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:16 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=546100502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_random_length_in_transaction.546100502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_out_transaction.636051754 |
| Short name | T2949 |
| Test name | |
| Test status | |
| Simulation time | 175181089 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:15 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=636051754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 44.usbdev_random_length_out_transaction.636051754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_rx_crc_err.2920790266 |
| Short name | T2952 |
| Test name | |
| Test status | |
| Simulation time | 148486112 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:16 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2920790266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_rx_crc_err.2920790266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_rx_full.1961971494 |
| Short name | T2960 |
| Test name | |
| Test status | |
| Simulation time | 252485667 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:16 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1961971494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_rx_full.1961971494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_setup_stage.1372061218 |
| Short name | T2900 |
| Test name | |
| Test status | |
| Simulation time | 154047307 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:16 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1372061218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_setup_stage.1372061218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_setup_trans_ignored.2092611443 |
| Short name | T2955 |
| Test name | |
| Test status | |
| Simulation time | 152976626 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:16 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2092611443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 44.usbdev_setup_trans_ignored.2092611443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_smoke.757145932 |
| Short name | T2957 |
| Test name | |
| Test status | |
| Simulation time | 232569628 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:16 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=757145932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_smoke.757145932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_spurious_pids_ignored.4269062006 |
| Short name | T2976 |
| Test name | |
| Test status | |
| Simulation time | 1886070225 ps |
| CPU time | 18.23 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:33 AM UTC 24 |
| Peak memory | 234956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4269062006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_spurious_pids_ignored.4269062006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_stall_priority_over_nak.2491567295 |
| Short name | T2953 |
| Test name | |
| Test status | |
| Simulation time | 159029620 ps |
| CPU time | 0.92 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:16 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2491567295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stall_priority_over_nak.2491567295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_stall_trans.2923775944 |
| Short name | T2961 |
| Test name | |
| Test status | |
| Simulation time | 166171496 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:16 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2923775944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_stall_trans.2923775944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_stream_len_max.1043425326 |
| Short name | T2968 |
| Test name | |
| Test status | |
| Simulation time | 874385112 ps |
| CPU time | 2.59 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:18 AM UTC 24 |
| Peak memory | 217988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1043425326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stream_len_max.1043425326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_streaming_out.832505578 |
| Short name | T3030 |
| Test name | |
| Test status | |
| Simulation time | 2262234218 ps |
| CPU time | 56.3 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:30:12 AM UTC 24 |
| Peak memory | 228464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=832505578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_streaming_out.832505578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_timeout_missing_host_handshake.2067415554 |
| Short name | T2941 |
| Test name | |
| Test status | |
| Simulation time | 4317449279 ps |
| CPU time | 27.22 seconds |
| Started | Sep 24 09:28:20 AM UTC 24 |
| Finished | Sep 24 09:28:49 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2067415554 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_timeout_missing_host_handshake.2067415554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/44.usbdev_tx_rx_disruption.3456425473 |
| Short name | T2966 |
| Test name | |
| Test status | |
| Simulation time | 590518832 ps |
| CPU time | 2.11 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:17 AM UTC 24 |
| Peak memory | 217832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3456425473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_t x_rx_disruption.3456425473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/44.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/440.usbdev_tx_rx_disruption.2878315450 |
| Short name | T3733 |
| Test name | |
| Test status | |
| Simulation time | 490480039 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2878315450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 440.usbdev_ tx_rx_disruption.2878315450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/440.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/441.usbdev_tx_rx_disruption.2481449288 |
| Short name | T3743 |
| Test name | |
| Test status | |
| Simulation time | 501423663 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2481449288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 441.usbdev_ tx_rx_disruption.2481449288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/441.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/442.usbdev_tx_rx_disruption.2653283514 |
| Short name | T3741 |
| Test name | |
| Test status | |
| Simulation time | 525184367 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2653283514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 442.usbdev_ tx_rx_disruption.2653283514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/442.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/443.usbdev_tx_rx_disruption.43181231 |
| Short name | T3749 |
| Test name | |
| Test status | |
| Simulation time | 468593946 ps |
| CPU time | 2.13 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=43181231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 443.usbdev_tx _rx_disruption.43181231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/443.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/444.usbdev_tx_rx_disruption.2551355535 |
| Short name | T3738 |
| Test name | |
| Test status | |
| Simulation time | 537995392 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2551355535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 444.usbdev_ tx_rx_disruption.2551355535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/444.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/445.usbdev_tx_rx_disruption.4150149455 |
| Short name | T3750 |
| Test name | |
| Test status | |
| Simulation time | 529970486 ps |
| CPU time | 2.14 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4150149455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 445.usbdev_ tx_rx_disruption.4150149455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/445.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/446.usbdev_tx_rx_disruption.1098820757 |
| Short name | T3744 |
| Test name | |
| Test status | |
| Simulation time | 590058497 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1098820757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 446.usbdev_ tx_rx_disruption.1098820757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/446.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/447.usbdev_tx_rx_disruption.4249870141 |
| Short name | T3746 |
| Test name | |
| Test status | |
| Simulation time | 518304369 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4249870141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 447.usbdev_ tx_rx_disruption.4249870141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/447.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/448.usbdev_tx_rx_disruption.4137226258 |
| Short name | T3748 |
| Test name | |
| Test status | |
| Simulation time | 537570407 ps |
| CPU time | 1.91 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4137226258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 448.usbdev_ tx_rx_disruption.4137226258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/448.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/449.usbdev_tx_rx_disruption.885924192 |
| Short name | T3739 |
| Test name | |
| Test status | |
| Simulation time | 455642025 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=885924192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 449.usbdev_t x_rx_disruption.885924192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/449.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_alert_test.1124429979 |
| Short name | T3023 |
| Test name | |
| Test status | |
| Simulation time | 98458491 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:30:07 AM UTC 24 |
| Finished | Sep 24 09:30:09 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1124429979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 45.usbdev_alert_test.1124429979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_disconnect.3873569788 |
| Short name | T2971 |
| Test name | |
| Test status | |
| Simulation time | 4411724447 ps |
| CPU time | 6.3 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:21 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3873569788 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_disconnect.3873569788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_reset.105112479 |
| Short name | T2977 |
| Test name | |
| Test status | |
| Simulation time | 20917547248 ps |
| CPU time | 24.56 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:40 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=105112479 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_reset.105112479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_resume.187002961 |
| Short name | T3000 |
| Test name | |
| Test status | |
| Simulation time | 28534852251 ps |
| CPU time | 37.19 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:53 AM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=187002961 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_resume.187002961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_av_buffer.2940784905 |
| Short name | T2964 |
| Test name | |
| Test status | |
| Simulation time | 189573993 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:16 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2940784905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_av_buffer.2940784905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_bitstuff_err.3349064701 |
| Short name | T2963 |
| Test name | |
| Test status | |
| Simulation time | 160166059 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:16 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3349064701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_bitstuff_err.3349064701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_clear.452233121 |
| Short name | T2965 |
| Test name | |
| Test status | |
| Simulation time | 493818597 ps |
| CPU time | 1.87 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:17 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=452233121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_data_toggle_clear.452233121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_restore.1352299994 |
| Short name | T2969 |
| Test name | |
| Test status | |
| Simulation time | 980068176 ps |
| CPU time | 3.29 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:19 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1352299994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_data_toggle_restore.1352299994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_device_address.866769558 |
| Short name | T3026 |
| Test name | |
| Test status | |
| Simulation time | 33752852224 ps |
| CPU time | 53.68 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:30:10 AM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=866769558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_device_address.866769558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_device_timeout.114571537 |
| Short name | T2972 |
| Test name | |
| Test status | |
| Simulation time | 1071531384 ps |
| CPU time | 8.9 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:24 AM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=114571537 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_timeout.114571537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_disable_endpoint.3778913387 |
| Short name | T2967 |
| Test name | |
| Test status | |
| Simulation time | 851848973 ps |
| CPU time | 2.09 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:18 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3778913387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_disable_endpoint.3778913387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_disconnected.1183120924 |
| Short name | T2962 |
| Test name | |
| Test status | |
| Simulation time | 131959289 ps |
| CPU time | 0.83 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:16 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1183120924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_disconnected.1183120924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_enable.131437634 |
| Short name | T2978 |
| Test name | |
| Test status | |
| Simulation time | 51416794 ps |
| CPU time | 0.79 seconds |
| Started | Sep 24 09:29:39 AM UTC 24 |
| Finished | Sep 24 09:29:41 AM UTC 24 |
| Peak memory | 215148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=131437634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_enable.131437634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_access.1978686033 |
| Short name | T2997 |
| Test name | |
| Test status | |
| Simulation time | 854614365 ps |
| CPU time | 2.39 seconds |
| Started | Sep 24 09:29:39 AM UTC 24 |
| Finished | Sep 24 09:29:43 AM UTC 24 |
| Peak memory | 217592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1978686033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_access.1978686033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_types.2720706960 |
| Short name | T523 |
| Test name | |
| Test status | |
| Simulation time | 607155465 ps |
| CPU time | 1.76 seconds |
| Started | Sep 24 09:29:39 AM UTC 24 |
| Finished | Sep 24 09:29:42 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2720706960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_types.2720706960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_levels.653615750 |
| Short name | T396 |
| Test name | |
| Test status | |
| Simulation time | 154438958 ps |
| CPU time | 0.89 seconds |
| Started | Sep 24 09:29:39 AM UTC 24 |
| Finished | Sep 24 09:29:42 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=653615750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_fifo_levels.653615750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_rst.1308307406 |
| Short name | T2992 |
| Test name | |
| Test status | |
| Simulation time | 162797838 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 09:29:39 AM UTC 24 |
| Finished | Sep 24 09:29:42 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1308307406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_fifo_rst.1308307406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_in_iso.1433793842 |
| Short name | T2981 |
| Test name | |
| Test status | |
| Simulation time | 153620174 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:29:39 AM UTC 24 |
| Finished | Sep 24 09:29:42 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1433793842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_in_iso.1433793842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_in_stall.3757772099 |
| Short name | T2979 |
| Test name | |
| Test status | |
| Simulation time | 177203009 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 09:29:39 AM UTC 24 |
| Finished | Sep 24 09:29:42 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3757772099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_stall.3757772099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_in_trans.3344364810 |
| Short name | T2984 |
| Test name | |
| Test status | |
| Simulation time | 198193019 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:29:39 AM UTC 24 |
| Finished | Sep 24 09:29:42 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3344364810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_trans.3344364810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_invalid_sync.1709735761 |
| Short name | T3055 |
| Test name | |
| Test status | |
| Simulation time | 3599643308 ps |
| CPU time | 87.03 seconds |
| Started | Sep 24 09:29:39 AM UTC 24 |
| Finished | Sep 24 09:31:09 AM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1709735761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 45.usbdev_invalid_sync.1709735761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_iso_retraction.2327551743 |
| Short name | T2958 |
| Test name | |
| Test status | |
| Simulation time | 6107761840 ps |
| CPU time | 37.55 seconds |
| Started | Sep 24 09:29:39 AM UTC 24 |
| Finished | Sep 24 09:30:19 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2327551743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_iso_retraction.2327551743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_link_in_err.357569797 |
| Short name | T2985 |
| Test name | |
| Test status | |
| Simulation time | 181245306 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:29:39 AM UTC 24 |
| Finished | Sep 24 09:29:42 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=357569797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_link_in_err.357569797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_link_resume.3930480898 |
| Short name | T3033 |
| Test name | |
| Test status | |
| Simulation time | 28482411688 ps |
| CPU time | 44.99 seconds |
| Started | Sep 24 09:29:39 AM UTC 24 |
| Finished | Sep 24 09:30:27 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3930480898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_link_resume.3930480898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_link_suspend.2356366488 |
| Short name | T2999 |
| Test name | |
| Test status | |
| Simulation time | 3332525170 ps |
| CPU time | 6.23 seconds |
| Started | Sep 24 09:29:40 AM UTC 24 |
| Finished | Sep 24 09:29:47 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2356366488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_link_suspend.2356366488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_low_speed_traffic.2815624822 |
| Short name | T3028 |
| Test name | |
| Test status | |
| Simulation time | 3138938815 ps |
| CPU time | 28.42 seconds |
| Started | Sep 24 09:29:40 AM UTC 24 |
| Finished | Sep 24 09:30:10 AM UTC 24 |
| Peak memory | 230572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2815624822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_low_speed_traffic.2815624822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_max_inter_pkt_delay.2489363031 |
| Short name | T3003 |
| Test name | |
| Test status | |
| Simulation time | 2912769595 ps |
| CPU time | 18.92 seconds |
| Started | Sep 24 09:29:40 AM UTC 24 |
| Finished | Sep 24 09:30:00 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2489363031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_inter_pkt_delay.2489363031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_in_transaction.4095311999 |
| Short name | T2987 |
| Test name | |
| Test status | |
| Simulation time | 236632203 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:29:40 AM UTC 24 |
| Finished | Sep 24 09:29:42 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4095311999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_in_transaction.4095311999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_out_transaction.4187295103 |
| Short name | T2994 |
| Test name | |
| Test status | |
| Simulation time | 243843038 ps |
| CPU time | 1.28 seconds |
| Started | Sep 24 09:29:40 AM UTC 24 |
| Finished | Sep 24 09:29:43 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4187295103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_out_transaction.4187295103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_min_inter_pkt_delay.1387181043 |
| Short name | T3031 |
| Test name | |
| Test status | |
| Simulation time | 3606631371 ps |
| CPU time | 32.82 seconds |
| Started | Sep 24 09:29:40 AM UTC 24 |
| Finished | Sep 24 09:30:14 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1387181043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_inter_pkt_delay.1387181043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_in_transaction.522816654 |
| Short name | T2986 |
| Test name | |
| Test status | |
| Simulation time | 161792712 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 09:29:40 AM UTC 24 |
| Finished | Sep 24 09:29:42 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=522816654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_in_transaction.522816654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_out_transaction.3323345564 |
| Short name | T2988 |
| Test name | |
| Test status | |
| Simulation time | 162476590 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:29:40 AM UTC 24 |
| Finished | Sep 24 09:29:42 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3323345564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_out_transaction.3323345564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_nak_trans.3887677477 |
| Short name | T2996 |
| Test name | |
| Test status | |
| Simulation time | 211311758 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:29:40 AM UTC 24 |
| Finished | Sep 24 09:29:43 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3887677477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_nak_trans.3887677477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_out_iso.1863973680 |
| Short name | T2990 |
| Test name | |
| Test status | |
| Simulation time | 142679751 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:29:40 AM UTC 24 |
| Finished | Sep 24 09:29:42 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1863973680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_out_iso.1863973680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_out_stall.193093042 |
| Short name | T2991 |
| Test name | |
| Test status | |
| Simulation time | 165930680 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:29:40 AM UTC 24 |
| Finished | Sep 24 09:29:42 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=193093042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_out_stall.193093042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_out_trans_nak.3632787944 |
| Short name | T2989 |
| Test name | |
| Test status | |
| Simulation time | 193572599 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:29:40 AM UTC 24 |
| Finished | Sep 24 09:29:42 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3632787944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_out_trans_nak.3632787944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_pending_in_trans.1632312166 |
| Short name | T2993 |
| Test name | |
| Test status | |
| Simulation time | 195965210 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:29:40 AM UTC 24 |
| Finished | Sep 24 09:29:42 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1632312166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_pending_in_trans.1632312166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_pinflip.586678540 |
| Short name | T3010 |
| Test name | |
| Test status | |
| Simulation time | 215392773 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:30:06 AM UTC 24 |
| Finished | Sep 24 09:30:08 AM UTC 24 |
| Peak memory | 215924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=586678540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_pinflip.586678540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_usb_ref_disable.1506377500 |
| Short name | T3008 |
| Test name | |
| Test status | |
| Simulation time | 155538628 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:30:06 AM UTC 24 |
| Finished | Sep 24 09:30:08 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1506377500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_usb_ref_disable.1506377500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_phy_pins_sense.3344201314 |
| Short name | T3006 |
| Test name | |
| Test status | |
| Simulation time | 32331568 ps |
| CPU time | 0.75 seconds |
| Started | Sep 24 09:30:06 AM UTC 24 |
| Finished | Sep 24 09:30:08 AM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3344201314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_pins_sense.3344201314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_buffer.1952048562 |
| Short name | T3049 |
| Test name | |
| Test status | |
| Simulation time | 16908581391 ps |
| CPU time | 41.56 seconds |
| Started | Sep 24 09:30:06 AM UTC 24 |
| Finished | Sep 24 09:30:49 AM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1952048562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_pkt_buffer.1952048562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_received.1946272038 |
| Short name | T3012 |
| Test name | |
| Test status | |
| Simulation time | 182925470 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:30:06 AM UTC 24 |
| Finished | Sep 24 09:30:08 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1946272038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_pkt_received.1946272038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_sent.1929740397 |
| Short name | T3009 |
| Test name | |
| Test status | |
| Simulation time | 215263693 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:30:06 AM UTC 24 |
| Finished | Sep 24 09:30:08 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1929740397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_pkt_sent.1929740397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_in_transaction.3954084736 |
| Short name | T3013 |
| Test name | |
| Test status | |
| Simulation time | 251016741 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:30:06 AM UTC 24 |
| Finished | Sep 24 09:30:09 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3954084736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_random_length_in_transaction.3954084736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_out_transaction.2226650518 |
| Short name | T3015 |
| Test name | |
| Test status | |
| Simulation time | 164193646 ps |
| CPU time | 1.12 seconds |
| Started | Sep 24 09:30:06 AM UTC 24 |
| Finished | Sep 24 09:30:09 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2226650518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_random_length_out_transaction.2226650518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_rx_crc_err.2148303984 |
| Short name | T3014 |
| Test name | |
| Test status | |
| Simulation time | 170534671 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:30:06 AM UTC 24 |
| Finished | Sep 24 09:30:09 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2148303984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_rx_crc_err.2148303984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_rx_full.1584612274 |
| Short name | T3018 |
| Test name | |
| Test status | |
| Simulation time | 316651203 ps |
| CPU time | 1.25 seconds |
| Started | Sep 24 09:30:06 AM UTC 24 |
| Finished | Sep 24 09:30:09 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1584612274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_rx_full.1584612274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_setup_stage.83858736 |
| Short name | T3016 |
| Test name | |
| Test status | |
| Simulation time | 201282448 ps |
| CPU time | 1.12 seconds |
| Started | Sep 24 09:30:06 AM UTC 24 |
| Finished | Sep 24 09:30:09 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=83858736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_setup_stage.83858736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_setup_trans_ignored.2727006761 |
| Short name | T3011 |
| Test name | |
| Test status | |
| Simulation time | 147463014 ps |
| CPU time | 0.87 seconds |
| Started | Sep 24 09:30:06 AM UTC 24 |
| Finished | Sep 24 09:30:08 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2727006761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 45.usbdev_setup_trans_ignored.2727006761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_smoke.3886452681 |
| Short name | T3019 |
| Test name | |
| Test status | |
| Simulation time | 254576779 ps |
| CPU time | 1.23 seconds |
| Started | Sep 24 09:30:07 AM UTC 24 |
| Finished | Sep 24 09:30:09 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3886452681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_smoke.3886452681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_spurious_pids_ignored.160116845 |
| Short name | T2982 |
| Test name | |
| Test status | |
| Simulation time | 1791528822 ps |
| CPU time | 15.85 seconds |
| Started | Sep 24 09:30:07 AM UTC 24 |
| Finished | Sep 24 09:30:24 AM UTC 24 |
| Peak memory | 234764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=160116845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_spurious_pids_ignored.160116845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_stall_priority_over_nak.187947240 |
| Short name | T3022 |
| Test name | |
| Test status | |
| Simulation time | 257835176 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:30:07 AM UTC 24 |
| Finished | Sep 24 09:30:09 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=187947240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stall_priority_over_nak.187947240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_stall_trans.3390511331 |
| Short name | T3021 |
| Test name | |
| Test status | |
| Simulation time | 180695249 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 09:30:07 AM UTC 24 |
| Finished | Sep 24 09:30:09 AM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3390511331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_stall_trans.3390511331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_stream_len_max.2539837661 |
| Short name | T3029 |
| Test name | |
| Test status | |
| Simulation time | 656523025 ps |
| CPU time | 1.98 seconds |
| Started | Sep 24 09:30:07 AM UTC 24 |
| Finished | Sep 24 09:30:10 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2539837661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stream_len_max.2539837661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_streaming_out.1598284211 |
| Short name | T2980 |
| Test name | |
| Test status | |
| Simulation time | 2938994957 ps |
| CPU time | 27.12 seconds |
| Started | Sep 24 09:30:07 AM UTC 24 |
| Finished | Sep 24 09:30:36 AM UTC 24 |
| Peak memory | 230276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1598284211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_streaming_out.1598284211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_timeout_missing_host_handshake.332927046 |
| Short name | T2998 |
| Test name | |
| Test status | |
| Simulation time | 4960583152 ps |
| CPU time | 28.68 seconds |
| Started | Sep 24 09:29:14 AM UTC 24 |
| Finished | Sep 24 09:29:44 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=332927046 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_timeout_missing_host_handshake.332927046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/45.usbdev_tx_rx_disruption.1701541797 |
| Short name | T3027 |
| Test name | |
| Test status | |
| Simulation time | 509876940 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:30:07 AM UTC 24 |
| Finished | Sep 24 09:30:10 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1701541797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_t x_rx_disruption.1701541797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/45.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/450.usbdev_tx_rx_disruption.2332472421 |
| Short name | T3742 |
| Test name | |
| Test status | |
| Simulation time | 479920939 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:11 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2332472421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 450.usbdev_ tx_rx_disruption.2332472421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/450.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/451.usbdev_tx_rx_disruption.3952656641 |
| Short name | T3765 |
| Test name | |
| Test status | |
| Simulation time | 588156771 ps |
| CPU time | 2.29 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3952656641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 451.usbdev_ tx_rx_disruption.3952656641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/451.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/452.usbdev_tx_rx_disruption.3033213383 |
| Short name | T3760 |
| Test name | |
| Test status | |
| Simulation time | 538794477 ps |
| CPU time | 2.25 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3033213383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 452.usbdev_ tx_rx_disruption.3033213383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/452.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/453.usbdev_tx_rx_disruption.2239423141 |
| Short name | T3752 |
| Test name | |
| Test status | |
| Simulation time | 541661909 ps |
| CPU time | 1.9 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2239423141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 453.usbdev_ tx_rx_disruption.2239423141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/453.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/454.usbdev_tx_rx_disruption.664294355 |
| Short name | T3754 |
| Test name | |
| Test status | |
| Simulation time | 536725185 ps |
| CPU time | 1.93 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=664294355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 454.usbdev_t x_rx_disruption.664294355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/454.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/455.usbdev_tx_rx_disruption.3758277778 |
| Short name | T3753 |
| Test name | |
| Test status | |
| Simulation time | 640470553 ps |
| CPU time | 1.9 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3758277778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 455.usbdev_ tx_rx_disruption.3758277778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/455.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/456.usbdev_tx_rx_disruption.2020135708 |
| Short name | T3758 |
| Test name | |
| Test status | |
| Simulation time | 546122158 ps |
| CPU time | 2.01 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 217840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2020135708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 456.usbdev_ tx_rx_disruption.2020135708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/456.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/457.usbdev_tx_rx_disruption.516303171 |
| Short name | T3773 |
| Test name | |
| Test status | |
| Simulation time | 437994912 ps |
| CPU time | 2.36 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:13 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=516303171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 457.usbdev_t x_rx_disruption.516303171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/457.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/458.usbdev_tx_rx_disruption.3102221038 |
| Short name | T3747 |
| Test name | |
| Test status | |
| Simulation time | 426257245 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3102221038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 458.usbdev_ tx_rx_disruption.3102221038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/458.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/459.usbdev_tx_rx_disruption.246845434 |
| Short name | T3756 |
| Test name | |
| Test status | |
| Simulation time | 596523346 ps |
| CPU time | 1.87 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=246845434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 459.usbdev_t x_rx_disruption.246845434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/459.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_alert_test.2086617313 |
| Short name | T3071 |
| Test name | |
| Test status | |
| Simulation time | 90854370 ps |
| CPU time | 0.84 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:14 AM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2086617313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 46.usbdev_alert_test.2086617313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_disconnect.842054251 |
| Short name | T3032 |
| Test name | |
| Test status | |
| Simulation time | 4052476831 ps |
| CPU time | 6.23 seconds |
| Started | Sep 24 09:30:07 AM UTC 24 |
| Finished | Sep 24 09:30:15 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=842054251 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_disconnect.842054251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_reset.1621551405 |
| Short name | T2959 |
| Test name | |
| Test status | |
| Simulation time | 19421762784 ps |
| CPU time | 25.09 seconds |
| Started | Sep 24 09:30:07 AM UTC 24 |
| Finished | Sep 24 09:30:34 AM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1621551405 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_reset.1621551405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_resume.1614361113 |
| Short name | T2983 |
| Test name | |
| Test status | |
| Simulation time | 26312657109 ps |
| CPU time | 32.87 seconds |
| Started | Sep 24 09:30:07 AM UTC 24 |
| Finished | Sep 24 09:30:42 AM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1614361113 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_resume.1614361113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_av_buffer.4244680357 |
| Short name | T3025 |
| Test name | |
| Test status | |
| Simulation time | 172909731 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 09:30:07 AM UTC 24 |
| Finished | Sep 24 09:30:09 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4244680357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_av_buffer.4244680357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_bitstuff_err.2044257550 |
| Short name | T3024 |
| Test name | |
| Test status | |
| Simulation time | 157925704 ps |
| CPU time | 0.86 seconds |
| Started | Sep 24 09:30:07 AM UTC 24 |
| Finished | Sep 24 09:30:09 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2044257550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_bitstuff_err.2044257550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_clear.44089046 |
| Short name | T2948 |
| Test name | |
| Test status | |
| Simulation time | 470748540 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:30:41 AM UTC 24 |
| Finished | Sep 24 09:30:44 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=44089046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_clear.44089046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_restore.3395214894 |
| Short name | T2901 |
| Test name | |
| Test status | |
| Simulation time | 314028135 ps |
| CPU time | 1.33 seconds |
| Started | Sep 24 09:30:41 AM UTC 24 |
| Finished | Sep 24 09:30:44 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3395214894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_restore.3395214894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_device_address.1604849057 |
| Short name | T3057 |
| Test name | |
| Test status | |
| Simulation time | 17779699050 ps |
| CPU time | 30.04 seconds |
| Started | Sep 24 09:30:41 AM UTC 24 |
| Finished | Sep 24 09:31:13 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1604849057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_address.1604849057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_device_timeout.412590428 |
| Short name | T3052 |
| Test name | |
| Test status | |
| Simulation time | 1047318821 ps |
| CPU time | 8.86 seconds |
| Started | Sep 24 09:30:41 AM UTC 24 |
| Finished | Sep 24 09:30:51 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=412590428 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_timeout.412590428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_disable_endpoint.173861004 |
| Short name | T3035 |
| Test name | |
| Test status | |
| Simulation time | 628258338 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:30:41 AM UTC 24 |
| Finished | Sep 24 09:30:44 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=173861004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_disable_endpoint.173861004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_disconnected.1874457805 |
| Short name | T3017 |
| Test name | |
| Test status | |
| Simulation time | 147208616 ps |
| CPU time | 0.8 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:43 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1874457805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_disconnected.1874457805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_enable.3570405436 |
| Short name | T3020 |
| Test name | |
| Test status | |
| Simulation time | 108729464 ps |
| CPU time | 0.81 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:44 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3570405436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 46.usbdev_enable.3570405436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_access.608873970 |
| Short name | T3047 |
| Test name | |
| Test status | |
| Simulation time | 808353561 ps |
| CPU time | 2.28 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:45 AM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=608873970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_access.608873970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_types.567842522 |
| Short name | T2897 |
| Test name | |
| Test status | |
| Simulation time | 167252730 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:44 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=567842522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_types.567842522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_rst.2993087484 |
| Short name | T3048 |
| Test name | |
| Test status | |
| Simulation time | 489598086 ps |
| CPU time | 2.88 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:46 AM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2993087484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_fifo_rst.2993087484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_in_iso.764628544 |
| Short name | T3007 |
| Test name | |
| Test status | |
| Simulation time | 202786985 ps |
| CPU time | 1.05 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:44 AM UTC 24 |
| Peak memory | 225616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=764628544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_in_iso.764628544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_in_stall.4294416560 |
| Short name | T2895 |
| Test name | |
| Test status | |
| Simulation time | 164781491 ps |
| CPU time | 0.87 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:44 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4294416560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_in_stall.4294416560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_in_trans.2244561608 |
| Short name | T2882 |
| Test name | |
| Test status | |
| Simulation time | 206186723 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:44 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2244561608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_in_trans.2244561608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_invalid_sync.1144620976 |
| Short name | T3080 |
| Test name | |
| Test status | |
| Simulation time | 3784732264 ps |
| CPU time | 33.74 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:31:17 AM UTC 24 |
| Peak memory | 234600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1144620976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 46.usbdev_invalid_sync.1144620976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_iso_retraction.2737807210 |
| Short name | T3134 |
| Test name | |
| Test status | |
| Simulation time | 10837624753 ps |
| CPU time | 114.51 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:32:39 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2737807210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_iso_retraction.2737807210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_link_in_err.526967402 |
| Short name | T3037 |
| Test name | |
| Test status | |
| Simulation time | 219393566 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:44 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=526967402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_link_in_err.526967402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_link_resume.3533086903 |
| Short name | T3081 |
| Test name | |
| Test status | |
| Simulation time | 22400115868 ps |
| CPU time | 34.1 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:31:17 AM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3533086903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_resume.3533086903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_link_suspend.2786828114 |
| Short name | T3050 |
| Test name | |
| Test status | |
| Simulation time | 4697942118 ps |
| CPU time | 6.79 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:50 AM UTC 24 |
| Peak memory | 228100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2786828114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_link_suspend.2786828114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_low_speed_traffic.1553861856 |
| Short name | T3056 |
| Test name | |
| Test status | |
| Simulation time | 3619150869 ps |
| CPU time | 25.88 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:31:09 AM UTC 24 |
| Peak memory | 234960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1553861856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_low_speed_traffic.1553861856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_max_inter_pkt_delay.1561481776 |
| Short name | T3054 |
| Test name | |
| Test status | |
| Simulation time | 3795921547 ps |
| CPU time | 25.18 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:31:09 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1561481776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_inter_pkt_delay.1561481776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_in_transaction.2696581484 |
| Short name | T3044 |
| Test name | |
| Test status | |
| Simulation time | 247038416 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:45 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2696581484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_in_transaction.2696581484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_out_transaction.2227549456 |
| Short name | T3038 |
| Test name | |
| Test status | |
| Simulation time | 230179288 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:44 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2227549456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_out_transaction.2227549456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_min_inter_pkt_delay.836801247 |
| Short name | T3053 |
| Test name | |
| Test status | |
| Simulation time | 1819617228 ps |
| CPU time | 16.01 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:59 AM UTC 24 |
| Peak memory | 228228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=836801247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_inter_pkt_delay.836801247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_in_transaction.1755717694 |
| Short name | T3036 |
| Test name | |
| Test status | |
| Simulation time | 160959656 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:44 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1755717694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_in_transaction.1755717694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_out_transaction.2443524954 |
| Short name | T3040 |
| Test name | |
| Test status | |
| Simulation time | 162247965 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:44 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2443524954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_out_transaction.2443524954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_nak_trans.3706224058 |
| Short name | T155 |
| Test name | |
| Test status | |
| Simulation time | 235863486 ps |
| CPU time | 1.12 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:44 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3706224058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_nak_trans.3706224058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_out_iso.1754230451 |
| Short name | T3039 |
| Test name | |
| Test status | |
| Simulation time | 159810666 ps |
| CPU time | 0.84 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:44 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1754230451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_out_iso.1754230451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_out_stall.1605230466 |
| Short name | T3042 |
| Test name | |
| Test status | |
| Simulation time | 207412216 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:45 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1605230466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_out_stall.1605230466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_out_trans_nak.4117275762 |
| Short name | T3045 |
| Test name | |
| Test status | |
| Simulation time | 173418641 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:45 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4117275762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_out_trans_nak.4117275762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_pending_in_trans.2115276640 |
| Short name | T3041 |
| Test name | |
| Test status | |
| Simulation time | 185102489 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:44 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2115276640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_pending_in_trans.2115276640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_pinflip.2131219759 |
| Short name | T3046 |
| Test name | |
| Test status | |
| Simulation time | 254315520 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:45 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2131219759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_pinflip.2131219759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_usb_ref_disable.2538885200 |
| Short name | T3043 |
| Test name | |
| Test status | |
| Simulation time | 147401971 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:30:42 AM UTC 24 |
| Finished | Sep 24 09:30:45 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2538885200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_usb_ref_disable.2538885200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_phy_pins_sense.2028209635 |
| Short name | T3058 |
| Test name | |
| Test status | |
| Simulation time | 40836933 ps |
| CPU time | 0.83 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:14 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2028209635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_pins_sense.2028209635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_buffer.3258940496 |
| Short name | T3086 |
| Test name | |
| Test status | |
| Simulation time | 11700576232 ps |
| CPU time | 29.39 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:43 AM UTC 24 |
| Peak memory | 232368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3258940496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_pkt_buffer.3258940496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_received.2924116904 |
| Short name | T3059 |
| Test name | |
| Test status | |
| Simulation time | 183589307 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:14 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2924116904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_pkt_received.2924116904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_sent.3548937433 |
| Short name | T3062 |
| Test name | |
| Test status | |
| Simulation time | 185684707 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:14 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3548937433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_pkt_sent.3548937433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_in_transaction.958695392 |
| Short name | T3066 |
| Test name | |
| Test status | |
| Simulation time | 223988142 ps |
| CPU time | 1.2 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:14 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=958695392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_random_length_in_transaction.958695392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_out_transaction.3486144407 |
| Short name | T3061 |
| Test name | |
| Test status | |
| Simulation time | 183783828 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:14 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3486144407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_random_length_out_transaction.3486144407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_rx_crc_err.654314633 |
| Short name | T3060 |
| Test name | |
| Test status | |
| Simulation time | 160471089 ps |
| CPU time | 0.92 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:14 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=654314633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_rx_crc_err.654314633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_rx_full.2262501904 |
| Short name | T3064 |
| Test name | |
| Test status | |
| Simulation time | 274391763 ps |
| CPU time | 1.05 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:14 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2262501904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_rx_full.2262501904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_setup_stage.4074732962 |
| Short name | T3065 |
| Test name | |
| Test status | |
| Simulation time | 198854206 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:14 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4074732962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_setup_stage.4074732962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_setup_trans_ignored.2743481247 |
| Short name | T3072 |
| Test name | |
| Test status | |
| Simulation time | 164675179 ps |
| CPU time | 1.25 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:14 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2743481247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 46.usbdev_setup_trans_ignored.2743481247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_smoke.1673238683 |
| Short name | T3067 |
| Test name | |
| Test status | |
| Simulation time | 240139484 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:14 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1673238683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_smoke.1673238683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_spurious_pids_ignored.1278397439 |
| Short name | T3130 |
| Test name | |
| Test status | |
| Simulation time | 3000529428 ps |
| CPU time | 74.33 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:32:28 AM UTC 24 |
| Peak memory | 234956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1278397439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_spurious_pids_ignored.1278397439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_stall_priority_over_nak.582744459 |
| Short name | T3069 |
| Test name | |
| Test status | |
| Simulation time | 148356625 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:14 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=582744459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stall_priority_over_nak.582744459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_stall_trans.3688117189 |
| Short name | T3068 |
| Test name | |
| Test status | |
| Simulation time | 153833669 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:14 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3688117189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_stall_trans.3688117189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_stream_len_max.3245030587 |
| Short name | T3078 |
| Test name | |
| Test status | |
| Simulation time | 649771604 ps |
| CPU time | 2.26 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:16 AM UTC 24 |
| Peak memory | 217836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3245030587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stream_len_max.3245030587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_streaming_out.1973947769 |
| Short name | T2873 |
| Test name | |
| Test status | |
| Simulation time | 2477062843 ps |
| CPU time | 56.58 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:32:10 AM UTC 24 |
| Peak memory | 228660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1973947769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_streaming_out.1973947769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_timeout_missing_host_handshake.2142100464 |
| Short name | T3051 |
| Test name | |
| Test status | |
| Simulation time | 431719816 ps |
| CPU time | 7.36 seconds |
| Started | Sep 24 09:30:41 AM UTC 24 |
| Finished | Sep 24 09:30:50 AM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2142100464 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_timeout_missing_host_handshake.2142100464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/46.usbdev_tx_rx_disruption.3256221457 |
| Short name | T3075 |
| Test name | |
| Test status | |
| Simulation time | 448413942 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:15 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3256221457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_t x_rx_disruption.3256221457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/46.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/460.usbdev_tx_rx_disruption.3898826862 |
| Short name | T3759 |
| Test name | |
| Test status | |
| Simulation time | 645481048 ps |
| CPU time | 1.96 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3898826862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 460.usbdev_ tx_rx_disruption.3898826862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/460.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/461.usbdev_tx_rx_disruption.2712344506 |
| Short name | T3751 |
| Test name | |
| Test status | |
| Simulation time | 640582965 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2712344506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 461.usbdev_ tx_rx_disruption.2712344506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/461.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/462.usbdev_tx_rx_disruption.1418919657 |
| Short name | T3764 |
| Test name | |
| Test status | |
| Simulation time | 643243603 ps |
| CPU time | 1.94 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 215568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1418919657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 462.usbdev_ tx_rx_disruption.1418919657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/462.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/463.usbdev_tx_rx_disruption.2585170776 |
| Short name | T3757 |
| Test name | |
| Test status | |
| Simulation time | 549891195 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2585170776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 463.usbdev_ tx_rx_disruption.2585170776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/463.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/464.usbdev_tx_rx_disruption.2324248993 |
| Short name | T3755 |
| Test name | |
| Test status | |
| Simulation time | 497265994 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2324248993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 464.usbdev_ tx_rx_disruption.2324248993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/464.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/465.usbdev_tx_rx_disruption.202174761 |
| Short name | T3761 |
| Test name | |
| Test status | |
| Simulation time | 488769232 ps |
| CPU time | 1.81 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=202174761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 465.usbdev_t x_rx_disruption.202174761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/465.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/466.usbdev_tx_rx_disruption.2655121889 |
| Short name | T3772 |
| Test name | |
| Test status | |
| Simulation time | 501156538 ps |
| CPU time | 2.03 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:13 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2655121889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 466.usbdev_ tx_rx_disruption.2655121889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/466.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/467.usbdev_tx_rx_disruption.1651007220 |
| Short name | T3767 |
| Test name | |
| Test status | |
| Simulation time | 545781300 ps |
| CPU time | 1.97 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1651007220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 467.usbdev_ tx_rx_disruption.1651007220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/467.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/468.usbdev_tx_rx_disruption.3153386345 |
| Short name | T3775 |
| Test name | |
| Test status | |
| Simulation time | 540257965 ps |
| CPU time | 2.1 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:13 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3153386345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 468.usbdev_ tx_rx_disruption.3153386345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/468.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/469.usbdev_tx_rx_disruption.3539764590 |
| Short name | T3766 |
| Test name | |
| Test status | |
| Simulation time | 541370486 ps |
| CPU time | 1.79 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3539764590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 469.usbdev_ tx_rx_disruption.3539764590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/469.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_alert_test.618994308 |
| Short name | T3115 |
| Test name | |
| Test status | |
| Simulation time | 42427402 ps |
| CPU time | 0.92 seconds |
| Started | Sep 24 09:32:19 AM UTC 24 |
| Finished | Sep 24 09:32:21 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=618994308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_alert_test.618994308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_disconnect.329827484 |
| Short name | T3083 |
| Test name | |
| Test status | |
| Simulation time | 9816076141 ps |
| CPU time | 14.2 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:28 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=329827484 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_disconnect.329827484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_reset.370191163 |
| Short name | T3085 |
| Test name | |
| Test status | |
| Simulation time | 21334825153 ps |
| CPU time | 28.47 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:42 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=370191163 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_reset.370191163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_resume.2693327902 |
| Short name | T3087 |
| Test name | |
| Test status | |
| Simulation time | 29186446856 ps |
| CPU time | 35.61 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:49 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2693327902 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_resume.2693327902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_av_buffer.3105078093 |
| Short name | T3073 |
| Test name | |
| Test status | |
| Simulation time | 153094504 ps |
| CPU time | 0.87 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:14 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3105078093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_av_buffer.3105078093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_bitstuff_err.575505991 |
| Short name | T3074 |
| Test name | |
| Test status | |
| Simulation time | 152048297 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:14 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=575505991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_bitstuff_err.575505991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_clear.4279969593 |
| Short name | T3076 |
| Test name | |
| Test status | |
| Simulation time | 368724645 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 09:31:12 AM UTC 24 |
| Finished | Sep 24 09:31:15 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4279969593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 47.usbdev_data_toggle_clear.4279969593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_restore.2034625158 |
| Short name | T3077 |
| Test name | |
| Test status | |
| Simulation time | 329245111 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:31:13 AM UTC 24 |
| Finished | Sep 24 09:31:15 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2034625158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_data_toggle_restore.2034625158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_device_address.867067048 |
| Short name | T3084 |
| Test name | |
| Test status | |
| Simulation time | 15386940247 ps |
| CPU time | 25.17 seconds |
| Started | Sep 24 09:31:13 AM UTC 24 |
| Finished | Sep 24 09:31:39 AM UTC 24 |
| Peak memory | 218320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=867067048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_device_address.867067048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_device_timeout.961156934 |
| Short name | T2814 |
| Test name | |
| Test status | |
| Simulation time | 6994683782 ps |
| CPU time | 39.26 seconds |
| Started | Sep 24 09:31:13 AM UTC 24 |
| Finished | Sep 24 09:31:53 AM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=961156934 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_timeout.961156934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_disable_endpoint.1568327308 |
| Short name | T3079 |
| Test name | |
| Test status | |
| Simulation time | 1209462237 ps |
| CPU time | 2.62 seconds |
| Started | Sep 24 09:31:13 AM UTC 24 |
| Finished | Sep 24 09:31:17 AM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1568327308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_disable_endpoint.1568327308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_disconnected.3556271390 |
| Short name | T3088 |
| Test name | |
| Test status | |
| Simulation time | 141585706 ps |
| CPU time | 0.8 seconds |
| Started | Sep 24 09:31:47 AM UTC 24 |
| Finished | Sep 24 09:31:49 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3556271390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_disconnected.3556271390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_enable.634075069 |
| Short name | T3089 |
| Test name | |
| Test status | |
| Simulation time | 30806444 ps |
| CPU time | 0.66 seconds |
| Started | Sep 24 09:31:47 AM UTC 24 |
| Finished | Sep 24 09:31:49 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=634075069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_enable.634075069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_access.3097005579 |
| Short name | T2824 |
| Test name | |
| Test status | |
| Simulation time | 830788111 ps |
| CPU time | 2.51 seconds |
| Started | Sep 24 09:31:47 AM UTC 24 |
| Finished | Sep 24 09:31:51 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3097005579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_access.3097005579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_types.3517805448 |
| Short name | T482 |
| Test name | |
| Test status | |
| Simulation time | 493739439 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:50 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3517805448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_types.3517805448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_rst.2520820468 |
| Short name | T3063 |
| Test name | |
| Test status | |
| Simulation time | 434500658 ps |
| CPU time | 2.41 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:51 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2520820468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_fifo_rst.2520820468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_in_iso.2383611454 |
| Short name | T3090 |
| Test name | |
| Test status | |
| Simulation time | 185588462 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:50 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2383611454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_in_iso.2383611454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_in_stall.3716868086 |
| Short name | T3094 |
| Test name | |
| Test status | |
| Simulation time | 138097473 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:50 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3716868086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_in_stall.3716868086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_in_trans.781346698 |
| Short name | T3093 |
| Test name | |
| Test status | |
| Simulation time | 161275619 ps |
| CPU time | 0.92 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:50 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=781346698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_in_trans.781346698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_invalid_sync.475565617 |
| Short name | T3109 |
| Test name | |
| Test status | |
| Simulation time | 3652813324 ps |
| CPU time | 91.63 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:33:21 AM UTC 24 |
| Peak memory | 234928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=475565617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_invalid_sync.475565617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_iso_retraction.1466110999 |
| Short name | T3160 |
| Test name | |
| Test status | |
| Simulation time | 7752112848 ps |
| CPU time | 76.7 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:33:07 AM UTC 24 |
| Peak memory | 218316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1466110999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_iso_retraction.1466110999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_link_in_err.784778138 |
| Short name | T3091 |
| Test name | |
| Test status | |
| Simulation time | 200189853 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:50 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=784778138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_link_in_err.784778138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_link_resume.2832713146 |
| Short name | T2844 |
| Test name | |
| Test status | |
| Simulation time | 7279818992 ps |
| CPU time | 10.79 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:32:00 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2832713146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_resume.2832713146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_link_suspend.2632419821 |
| Short name | T2870 |
| Test name | |
| Test status | |
| Simulation time | 9353168132 ps |
| CPU time | 11.85 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:32:01 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2632419821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_link_suspend.2632419821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_low_speed_traffic.1345624809 |
| Short name | T3187 |
| Test name | |
| Test status | |
| Simulation time | 4643461554 ps |
| CPU time | 111.62 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:33:42 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1345624809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_low_speed_traffic.1345624809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_max_inter_pkt_delay.1933458776 |
| Short name | T3135 |
| Test name | |
| Test status | |
| Simulation time | 2157347167 ps |
| CPU time | 52.23 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:32:42 AM UTC 24 |
| Peak memory | 228464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1933458776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_inter_pkt_delay.1933458776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_in_transaction.4159705258 |
| Short name | T3099 |
| Test name | |
| Test status | |
| Simulation time | 306273219 ps |
| CPU time | 1.22 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:50 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4159705258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_in_transaction.4159705258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_out_transaction.4109348367 |
| Short name | T3070 |
| Test name | |
| Test status | |
| Simulation time | 192852787 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:51 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109348367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_out_transaction.4109348367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_min_inter_pkt_delay.2835594573 |
| Short name | T3152 |
| Test name | |
| Test status | |
| Simulation time | 2508559750 ps |
| CPU time | 60.46 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:32:50 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2835594573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_inter_pkt_delay.2835594573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_in_transaction.707523059 |
| Short name | T3096 |
| Test name | |
| Test status | |
| Simulation time | 157901234 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:50 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=707523059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_in_transaction.707523059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_out_transaction.3205771205 |
| Short name | T3098 |
| Test name | |
| Test status | |
| Simulation time | 143821686 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:50 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3205771205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_out_transaction.3205771205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_nak_trans.4151476263 |
| Short name | T3106 |
| Test name | |
| Test status | |
| Simulation time | 225641068 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:51 AM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4151476263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_nak_trans.4151476263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_out_iso.553455811 |
| Short name | T3095 |
| Test name | |
| Test status | |
| Simulation time | 161242358 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:51 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=553455811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 47.usbdev_out_iso.553455811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_out_stall.1934861467 |
| Short name | T3101 |
| Test name | |
| Test status | |
| Simulation time | 185605618 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:51 AM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1934861467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_out_stall.1934861467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_out_trans_nak.1118468977 |
| Short name | T3100 |
| Test name | |
| Test status | |
| Simulation time | 194849160 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:50 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1118468977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_out_trans_nak.1118468977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_pending_in_trans.890487159 |
| Short name | T3102 |
| Test name | |
| Test status | |
| Simulation time | 159097349 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:51 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=890487159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_pending_in_trans.890487159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_pinflip.820596508 |
| Short name | T3105 |
| Test name | |
| Test status | |
| Simulation time | 281848353 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:51 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=820596508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_pinflip.820596508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_usb_ref_disable.2975490337 |
| Short name | T3104 |
| Test name | |
| Test status | |
| Simulation time | 203336141 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:51 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2975490337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_usb_ref_disable.2975490337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_phy_pins_sense.2982795444 |
| Short name | T3097 |
| Test name | |
| Test status | |
| Simulation time | 33540515 ps |
| CPU time | 0.8 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:50 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2982795444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_pins_sense.2982795444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_buffer.1832864 |
| Short name | T3122 |
| Test name | |
| Test status | |
| Simulation time | 13351731193 ps |
| CPU time | 32.03 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:32:22 AM UTC 24 |
| Peak memory | 228600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1832864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_pkt_buffer.1832864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_received.3008413341 |
| Short name | T3103 |
| Test name | |
| Test status | |
| Simulation time | 185791372 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:51 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3008413341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_pkt_received.3008413341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_sent.1059235813 |
| Short name | T3034 |
| Test name | |
| Test status | |
| Simulation time | 221337276 ps |
| CPU time | 1.12 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:51 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1059235813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_pkt_sent.1059235813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_in_transaction.2437706179 |
| Short name | T3092 |
| Test name | |
| Test status | |
| Simulation time | 174686526 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:31:48 AM UTC 24 |
| Finished | Sep 24 09:31:51 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2437706179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_random_length_in_transaction.2437706179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_out_transaction.1275543284 |
| Short name | T3107 |
| Test name | |
| Test status | |
| Simulation time | 144551282 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:32:19 AM UTC 24 |
| Finished | Sep 24 09:32:21 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1275543284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_random_length_out_transaction.1275543284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_rx_crc_err.2896377349 |
| Short name | T3108 |
| Test name | |
| Test status | |
| Simulation time | 142741386 ps |
| CPU time | 0.92 seconds |
| Started | Sep 24 09:32:19 AM UTC 24 |
| Finished | Sep 24 09:32:21 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2896377349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_rx_crc_err.2896377349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_rx_full.3602284720 |
| Short name | T3111 |
| Test name | |
| Test status | |
| Simulation time | 367555478 ps |
| CPU time | 1.3 seconds |
| Started | Sep 24 09:32:19 AM UTC 24 |
| Finished | Sep 24 09:32:21 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3602284720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_rx_full.3602284720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_setup_stage.447109864 |
| Short name | T2779 |
| Test name | |
| Test status | |
| Simulation time | 206147483 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:32:19 AM UTC 24 |
| Finished | Sep 24 09:32:21 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=447109864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_setup_stage.447109864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_setup_trans_ignored.4273945534 |
| Short name | T3112 |
| Test name | |
| Test status | |
| Simulation time | 171857113 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:32:19 AM UTC 24 |
| Finished | Sep 24 09:32:21 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4273945534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 47.usbdev_setup_trans_ignored.4273945534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_smoke.1345498587 |
| Short name | T3110 |
| Test name | |
| Test status | |
| Simulation time | 229783251 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:32:19 AM UTC 24 |
| Finished | Sep 24 09:32:21 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1345498587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_smoke.1345498587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_spurious_pids_ignored.3827558260 |
| Short name | T3163 |
| Test name | |
| Test status | |
| Simulation time | 2162398503 ps |
| CPU time | 53.36 seconds |
| Started | Sep 24 09:32:19 AM UTC 24 |
| Finished | Sep 24 09:33:14 AM UTC 24 |
| Peak memory | 228640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3827558260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_spurious_pids_ignored.3827558260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_stall_priority_over_nak.453610481 |
| Short name | T3117 |
| Test name | |
| Test status | |
| Simulation time | 201024144 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:32:19 AM UTC 24 |
| Finished | Sep 24 09:32:21 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=453610481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stall_priority_over_nak.453610481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_stall_trans.4005802418 |
| Short name | T3114 |
| Test name | |
| Test status | |
| Simulation time | 178830834 ps |
| CPU time | 1.12 seconds |
| Started | Sep 24 09:32:19 AM UTC 24 |
| Finished | Sep 24 09:32:21 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4005802418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_stall_trans.4005802418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_stream_len_max.3354781261 |
| Short name | T3129 |
| Test name | |
| Test status | |
| Simulation time | 1276062252 ps |
| CPU time | 3.47 seconds |
| Started | Sep 24 09:32:19 AM UTC 24 |
| Finished | Sep 24 09:32:24 AM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3354781261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stream_len_max.3354781261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_streaming_out.2529516580 |
| Short name | T3184 |
| Test name | |
| Test status | |
| Simulation time | 2961157412 ps |
| CPU time | 72.19 seconds |
| Started | Sep 24 09:32:19 AM UTC 24 |
| Finished | Sep 24 09:33:33 AM UTC 24 |
| Peak memory | 235196 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2529516580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_streaming_out.2529516580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_timeout_missing_host_handshake.2369409843 |
| Short name | T3082 |
| Test name | |
| Test status | |
| Simulation time | 1087655460 ps |
| CPU time | 7.69 seconds |
| Started | Sep 24 09:31:13 AM UTC 24 |
| Finished | Sep 24 09:31:22 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2369409843 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_timeout_missing_host_handshake.2369409843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/47.usbdev_tx_rx_disruption.889709758 |
| Short name | T3124 |
| Test name | |
| Test status | |
| Simulation time | 507030397 ps |
| CPU time | 1.74 seconds |
| Started | Sep 24 09:32:19 AM UTC 24 |
| Finished | Sep 24 09:32:22 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=889709758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_tx _rx_disruption.889709758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/47.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/470.usbdev_tx_rx_disruption.2381640357 |
| Short name | T3762 |
| Test name | |
| Test status | |
| Simulation time | 445767518 ps |
| CPU time | 1.74 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2381640357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 470.usbdev_ tx_rx_disruption.2381640357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/470.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/471.usbdev_tx_rx_disruption.93852910 |
| Short name | T3768 |
| Test name | |
| Test status | |
| Simulation time | 620493475 ps |
| CPU time | 2 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:13 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=93852910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 471.usbdev_tx _rx_disruption.93852910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/471.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/472.usbdev_tx_rx_disruption.3317848109 |
| Short name | T3771 |
| Test name | |
| Test status | |
| Simulation time | 536146594 ps |
| CPU time | 1.87 seconds |
| Started | Sep 24 09:48:09 AM UTC 24 |
| Finished | Sep 24 09:48:13 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3317848109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 472.usbdev_ tx_rx_disruption.3317848109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/472.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/473.usbdev_tx_rx_disruption.1075697822 |
| Short name | T3774 |
| Test name | |
| Test status | |
| Simulation time | 624808085 ps |
| CPU time | 2.04 seconds |
| Started | Sep 24 09:48:10 AM UTC 24 |
| Finished | Sep 24 09:48:13 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1075697822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 473.usbdev_ tx_rx_disruption.1075697822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/473.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/474.usbdev_tx_rx_disruption.727523180 |
| Short name | T3763 |
| Test name | |
| Test status | |
| Simulation time | 486201204 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:48:10 AM UTC 24 |
| Finished | Sep 24 09:48:12 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=727523180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 474.usbdev_t x_rx_disruption.727523180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/474.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/475.usbdev_tx_rx_disruption.4078108941 |
| Short name | T3769 |
| Test name | |
| Test status | |
| Simulation time | 550612359 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 09:48:10 AM UTC 24 |
| Finished | Sep 24 09:48:13 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4078108941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 475.usbdev_ tx_rx_disruption.4078108941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/475.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/476.usbdev_tx_rx_disruption.767392594 |
| Short name | T3770 |
| Test name | |
| Test status | |
| Simulation time | 556397772 ps |
| CPU time | 1.81 seconds |
| Started | Sep 24 09:48:10 AM UTC 24 |
| Finished | Sep 24 09:48:13 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=767392594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 476.usbdev_t x_rx_disruption.767392594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/476.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/477.usbdev_tx_rx_disruption.3592824792 |
| Short name | T3776 |
| Test name | |
| Test status | |
| Simulation time | 528527264 ps |
| CPU time | 2.01 seconds |
| Started | Sep 24 09:48:10 AM UTC 24 |
| Finished | Sep 24 09:48:13 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3592824792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 477.usbdev_ tx_rx_disruption.3592824792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/477.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/478.usbdev_tx_rx_disruption.1061323523 |
| Short name | T3777 |
| Test name | |
| Test status | |
| Simulation time | 644691195 ps |
| CPU time | 2.15 seconds |
| Started | Sep 24 09:48:10 AM UTC 24 |
| Finished | Sep 24 09:48:13 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1061323523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 478.usbdev_ tx_rx_disruption.1061323523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/478.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/479.usbdev_tx_rx_disruption.649486764 |
| Short name | T3778 |
| Test name | |
| Test status | |
| Simulation time | 476554313 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:09 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=649486764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 479.usbdev_t x_rx_disruption.649486764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/479.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_alert_test.980192084 |
| Short name | T3172 |
| Test name | |
| Test status | |
| Simulation time | 113625040 ps |
| CPU time | 0.78 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:18 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=980192084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_alert_test.980192084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_disconnect.1529723831 |
| Short name | T3132 |
| Test name | |
| Test status | |
| Simulation time | 10366893079 ps |
| CPU time | 12.7 seconds |
| Started | Sep 24 09:32:19 AM UTC 24 |
| Finished | Sep 24 09:32:33 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1529723831 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_disconnect.1529723831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_reset.1804737062 |
| Short name | T3133 |
| Test name | |
| Test status | |
| Simulation time | 14087801779 ps |
| CPU time | 17.81 seconds |
| Started | Sep 24 09:32:19 AM UTC 24 |
| Finished | Sep 24 09:32:38 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1804737062 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_reset.1804737062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.3255485246 |
| Short name | T3156 |
| Test name | |
| Test status | |
| Simulation time | 24576466498 ps |
| CPU time | 30.27 seconds |
| Started | Sep 24 09:32:19 AM UTC 24 |
| Finished | Sep 24 09:32:51 AM UTC 24 |
| Peak memory | 228676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3255485246 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_resume.3255485246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_av_buffer.3633221449 |
| Short name | T3119 |
| Test name | |
| Test status | |
| Simulation time | 167159526 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:32:19 AM UTC 24 |
| Finished | Sep 24 09:32:22 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3633221449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_av_buffer.3633221449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_bitstuff_err.342269222 |
| Short name | T3118 |
| Test name | |
| Test status | |
| Simulation time | 179223940 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:32:19 AM UTC 24 |
| Finished | Sep 24 09:32:22 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=342269222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_bitstuff_err.342269222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_clear.2555487966 |
| Short name | T3125 |
| Test name | |
| Test status | |
| Simulation time | 197962219 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:32:20 AM UTC 24 |
| Finished | Sep 24 09:32:22 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2555487966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 48.usbdev_data_toggle_clear.2555487966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_restore.2723500168 |
| Short name | T3126 |
| Test name | |
| Test status | |
| Simulation time | 693832408 ps |
| CPU time | 2.15 seconds |
| Started | Sep 24 09:32:20 AM UTC 24 |
| Finished | Sep 24 09:32:23 AM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2723500168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_restore.2723500168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.2803010277 |
| Short name | T3161 |
| Test name | |
| Test status | |
| Simulation time | 33631439888 ps |
| CPU time | 50.73 seconds |
| Started | Sep 24 09:32:20 AM UTC 24 |
| Finished | Sep 24 09:33:12 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2803010277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_address.2803010277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_device_timeout.3395092352 |
| Short name | T3131 |
| Test name | |
| Test status | |
| Simulation time | 1349014168 ps |
| CPU time | 8.33 seconds |
| Started | Sep 24 09:32:20 AM UTC 24 |
| Finished | Sep 24 09:32:29 AM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3395092352 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_timeout.3395092352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_disable_endpoint.799449422 |
| Short name | T3127 |
| Test name | |
| Test status | |
| Simulation time | 673065298 ps |
| CPU time | 2.11 seconds |
| Started | Sep 24 09:32:20 AM UTC 24 |
| Finished | Sep 24 09:32:23 AM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=799449422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_disable_endpoint.799449422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_disconnected.3709678793 |
| Short name | T3121 |
| Test name | |
| Test status | |
| Simulation time | 173568071 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:32:20 AM UTC 24 |
| Finished | Sep 24 09:32:22 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3709678793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_disconnected.3709678793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_enable.3118578376 |
| Short name | T3120 |
| Test name | |
| Test status | |
| Simulation time | 80049517 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:32:20 AM UTC 24 |
| Finished | Sep 24 09:32:22 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3118578376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 48.usbdev_enable.3118578376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_access.1848122418 |
| Short name | T3128 |
| Test name | |
| Test status | |
| Simulation time | 834736822 ps |
| CPU time | 2.54 seconds |
| Started | Sep 24 09:32:20 AM UTC 24 |
| Finished | Sep 24 09:32:23 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1848122418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_access.1848122418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_levels.2050879690 |
| Short name | T3123 |
| Test name | |
| Test status | |
| Simulation time | 158826187 ps |
| CPU time | 1.16 seconds |
| Started | Sep 24 09:32:20 AM UTC 24 |
| Finished | Sep 24 09:32:22 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2050879690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_fifo_levels.2050879690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_rst.3511121162 |
| Short name | T3153 |
| Test name | |
| Test status | |
| Simulation time | 283960145 ps |
| CPU time | 2.12 seconds |
| Started | Sep 24 09:32:47 AM UTC 24 |
| Finished | Sep 24 09:32:50 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3511121162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_fifo_rst.3511121162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_in_iso.3771120165 |
| Short name | T3138 |
| Test name | |
| Test status | |
| Simulation time | 212187218 ps |
| CPU time | 1.16 seconds |
| Started | Sep 24 09:32:47 AM UTC 24 |
| Finished | Sep 24 09:32:49 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3771120165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_in_iso.3771120165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_in_stall.3698740183 |
| Short name | T3137 |
| Test name | |
| Test status | |
| Simulation time | 163347128 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:32:47 AM UTC 24 |
| Finished | Sep 24 09:32:49 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3698740183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_stall.3698740183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_in_trans.2049436977 |
| Short name | T3139 |
| Test name | |
| Test status | |
| Simulation time | 203967870 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:32:47 AM UTC 24 |
| Finished | Sep 24 09:32:50 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2049436977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_trans.2049436977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_invalid_sync.4190692676 |
| Short name | T3159 |
| Test name | |
| Test status | |
| Simulation time | 2665621204 ps |
| CPU time | 18.11 seconds |
| Started | Sep 24 09:32:47 AM UTC 24 |
| Finished | Sep 24 09:33:06 AM UTC 24 |
| Peak memory | 235132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4190692676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 48.usbdev_invalid_sync.4190692676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_iso_retraction.1981817468 |
| Short name | T3212 |
| Test name | |
| Test status | |
| Simulation time | 7406965322 ps |
| CPU time | 75.77 seconds |
| Started | Sep 24 09:32:47 AM UTC 24 |
| Finished | Sep 24 09:34:05 AM UTC 24 |
| Peak memory | 218444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1981817468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_iso_retraction.1981817468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_link_in_err.2496130189 |
| Short name | T3143 |
| Test name | |
| Test status | |
| Simulation time | 199696837 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:32:47 AM UTC 24 |
| Finished | Sep 24 09:32:50 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2496130189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_in_err.2496130189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_link_resume.1144888057 |
| Short name | T3189 |
| Test name | |
| Test status | |
| Simulation time | 32414203821 ps |
| CPU time | 57.26 seconds |
| Started | Sep 24 09:32:47 AM UTC 24 |
| Finished | Sep 24 09:33:46 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1144888057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_resume.1144888057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_link_suspend.1269256196 |
| Short name | T3157 |
| Test name | |
| Test status | |
| Simulation time | 10778186383 ps |
| CPU time | 14.23 seconds |
| Started | Sep 24 09:32:47 AM UTC 24 |
| Finished | Sep 24 09:33:03 AM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1269256196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_link_suspend.1269256196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_low_speed_traffic.366341011 |
| Short name | T3245 |
| Test name | |
| Test status | |
| Simulation time | 4510056054 ps |
| CPU time | 112.65 seconds |
| Started | Sep 24 09:32:48 AM UTC 24 |
| Finished | Sep 24 09:34:42 AM UTC 24 |
| Peak memory | 230604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=366341011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_low_speed_traffic.366341011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.2092688969 |
| Short name | T3158 |
| Test name | |
| Test status | |
| Simulation time | 2108543333 ps |
| CPU time | 15.9 seconds |
| Started | Sep 24 09:32:48 AM UTC 24 |
| Finished | Sep 24 09:33:05 AM UTC 24 |
| Peak memory | 228228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2092688969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_inter_pkt_delay.2092688969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_in_transaction.4264755580 |
| Short name | T3141 |
| Test name | |
| Test status | |
| Simulation time | 249359103 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:32:48 AM UTC 24 |
| Finished | Sep 24 09:32:50 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4264755580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_in_transaction.4264755580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_out_transaction.1790132397 |
| Short name | T3140 |
| Test name | |
| Test status | |
| Simulation time | 219611636 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:32:48 AM UTC 24 |
| Finished | Sep 24 09:32:50 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1790132397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_out_transaction.1790132397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.1026302353 |
| Short name | T3162 |
| Test name | |
| Test status | |
| Simulation time | 2751553221 ps |
| CPU time | 24.24 seconds |
| Started | Sep 24 09:32:48 AM UTC 24 |
| Finished | Sep 24 09:33:13 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1026302353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_inter_pkt_delay.1026302353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_in_transaction.2604705898 |
| Short name | T3144 |
| Test name | |
| Test status | |
| Simulation time | 223697006 ps |
| CPU time | 1.16 seconds |
| Started | Sep 24 09:32:48 AM UTC 24 |
| Finished | Sep 24 09:32:50 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2604705898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_in_transaction.2604705898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_out_transaction.4139854422 |
| Short name | T3142 |
| Test name | |
| Test status | |
| Simulation time | 158097399 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:32:48 AM UTC 24 |
| Finished | Sep 24 09:32:50 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4139854422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_out_transaction.4139854422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_nak_trans.3220066606 |
| Short name | T150 |
| Test name | |
| Test status | |
| Simulation time | 153848186 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:32:48 AM UTC 24 |
| Finished | Sep 24 09:32:50 AM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3220066606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_nak_trans.3220066606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_out_iso.3315222886 |
| Short name | T3148 |
| Test name | |
| Test status | |
| Simulation time | 189197735 ps |
| CPU time | 1.29 seconds |
| Started | Sep 24 09:32:48 AM UTC 24 |
| Finished | Sep 24 09:32:50 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3315222886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_out_iso.3315222886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_out_stall.3604154779 |
| Short name | T3149 |
| Test name | |
| Test status | |
| Simulation time | 167573989 ps |
| CPU time | 1.33 seconds |
| Started | Sep 24 09:32:48 AM UTC 24 |
| Finished | Sep 24 09:32:50 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3604154779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_out_stall.3604154779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_out_trans_nak.3553178412 |
| Short name | T3147 |
| Test name | |
| Test status | |
| Simulation time | 149184901 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:32:48 AM UTC 24 |
| Finished | Sep 24 09:32:50 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3553178412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_out_trans_nak.3553178412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_pending_in_trans.3216109518 |
| Short name | T3146 |
| Test name | |
| Test status | |
| Simulation time | 162244126 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:32:48 AM UTC 24 |
| Finished | Sep 24 09:32:50 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3216109518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_pending_in_trans.3216109518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_pinflip.2804566701 |
| Short name | T3154 |
| Test name | |
| Test status | |
| Simulation time | 229671292 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:32:48 AM UTC 24 |
| Finished | Sep 24 09:32:51 AM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2804566701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_pinflip.2804566701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_usb_ref_disable.5523663 |
| Short name | T3151 |
| Test name | |
| Test status | |
| Simulation time | 219307260 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:32:48 AM UTC 24 |
| Finished | Sep 24 09:32:50 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=5523663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disabl e_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_usb_ref_disable.5523663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_phy_pins_sense.3115035755 |
| Short name | T3145 |
| Test name | |
| Test status | |
| Simulation time | 87072979 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 09:32:48 AM UTC 24 |
| Finished | Sep 24 09:32:50 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3115035755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_pins_sense.3115035755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.4193479971 |
| Short name | T3183 |
| Test name | |
| Test status | |
| Simulation time | 16651411357 ps |
| CPU time | 42.34 seconds |
| Started | Sep 24 09:32:48 AM UTC 24 |
| Finished | Sep 24 09:33:32 AM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4193479971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_pkt_buffer.4193479971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_received.3439662610 |
| Short name | T3150 |
| Test name | |
| Test status | |
| Simulation time | 189001766 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:32:48 AM UTC 24 |
| Finished | Sep 24 09:32:50 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3439662610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_pkt_received.3439662610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_sent.109184759 |
| Short name | T3155 |
| Test name | |
| Test status | |
| Simulation time | 240036865 ps |
| CPU time | 1.34 seconds |
| Started | Sep 24 09:32:48 AM UTC 24 |
| Finished | Sep 24 09:32:51 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=109184759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_pkt_sent.109184759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_in_transaction.1381507785 |
| Short name | T3166 |
| Test name | |
| Test status | |
| Simulation time | 166291908 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:33:15 AM UTC 24 |
| Finished | Sep 24 09:33:18 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1381507785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_random_length_in_transaction.1381507785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_out_transaction.3221207383 |
| Short name | T3167 |
| Test name | |
| Test status | |
| Simulation time | 198327035 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:33:15 AM UTC 24 |
| Finished | Sep 24 09:33:18 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3221207383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_random_length_out_transaction.3221207383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_rx_crc_err.3898023708 |
| Short name | T3165 |
| Test name | |
| Test status | |
| Simulation time | 153842371 ps |
| CPU time | 0.92 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:18 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3898023708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_rx_crc_err.3898023708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_rx_full.1365915314 |
| Short name | T3171 |
| Test name | |
| Test status | |
| Simulation time | 259612669 ps |
| CPU time | 1.25 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:18 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1365915314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_rx_full.1365915314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_setup_stage.3481865093 |
| Short name | T3164 |
| Test name | |
| Test status | |
| Simulation time | 149161883 ps |
| CPU time | 0.87 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:18 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3481865093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_setup_stage.3481865093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_setup_trans_ignored.639532458 |
| Short name | T3168 |
| Test name | |
| Test status | |
| Simulation time | 146423908 ps |
| CPU time | 0.92 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:18 AM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=639532458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 48.usbdev_setup_trans_ignored.639532458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_smoke.1841912305 |
| Short name | T3173 |
| Test name | |
| Test status | |
| Simulation time | 256464009 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:18 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1841912305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_smoke.1841912305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_spurious_pids_ignored.2904506798 |
| Short name | T3215 |
| Test name | |
| Test status | |
| Simulation time | 2362724640 ps |
| CPU time | 57.63 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:34:15 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2904506798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_spurious_pids_ignored.2904506798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_stall_priority_over_nak.783294576 |
| Short name | T3170 |
| Test name | |
| Test status | |
| Simulation time | 182406774 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:18 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=783294576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stall_priority_over_nak.783294576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_stall_trans.4271937762 |
| Short name | T3169 |
| Test name | |
| Test status | |
| Simulation time | 176912593 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:18 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4271937762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_stall_trans.4271937762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_stream_len_max.1672209783 |
| Short name | T3180 |
| Test name | |
| Test status | |
| Simulation time | 948197540 ps |
| CPU time | 2.5 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:19 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1672209783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stream_len_max.1672209783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_streaming_out.1038242607 |
| Short name | T3188 |
| Test name | |
| Test status | |
| Simulation time | 2851723348 ps |
| CPU time | 26.69 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:44 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1038242607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_streaming_out.1038242607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_timeout_missing_host_handshake.4054259600 |
| Short name | T3136 |
| Test name | |
| Test status | |
| Simulation time | 1139084624 ps |
| CPU time | 24.18 seconds |
| Started | Sep 24 09:32:20 AM UTC 24 |
| Finished | Sep 24 09:32:45 AM UTC 24 |
| Peak memory | 217932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4054259600 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_timeout_missing_host_handshake.4054259600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/48.usbdev_tx_rx_disruption.1015017662 |
| Short name | T3178 |
| Test name | |
| Test status | |
| Simulation time | 600814901 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:19 AM UTC 24 |
| Peak memory | 215756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1015017662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_t x_rx_disruption.1015017662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/48.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/480.usbdev_tx_rx_disruption.285864860 |
| Short name | T3779 |
| Test name | |
| Test status | |
| Simulation time | 540341495 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:09 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=285864860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 480.usbdev_t x_rx_disruption.285864860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/480.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/481.usbdev_tx_rx_disruption.2607996568 |
| Short name | T3787 |
| Test name | |
| Test status | |
| Simulation time | 681200226 ps |
| CPU time | 1.96 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:10 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2607996568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 481.usbdev_ tx_rx_disruption.2607996568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/481.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/482.usbdev_tx_rx_disruption.337349780 |
| Short name | T3782 |
| Test name | |
| Test status | |
| Simulation time | 527666261 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:10 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=337349780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 482.usbdev_t x_rx_disruption.337349780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/482.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/483.usbdev_tx_rx_disruption.3234956747 |
| Short name | T3786 |
| Test name | |
| Test status | |
| Simulation time | 495795444 ps |
| CPU time | 1.87 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:10 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3234956747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 483.usbdev_ tx_rx_disruption.3234956747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/483.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/484.usbdev_tx_rx_disruption.3397789915 |
| Short name | T3781 |
| Test name | |
| Test status | |
| Simulation time | 452154728 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:09 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3397789915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 484.usbdev_ tx_rx_disruption.3397789915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/484.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/485.usbdev_tx_rx_disruption.1431411499 |
| Short name | T3780 |
| Test name | |
| Test status | |
| Simulation time | 513203915 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:09 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1431411499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 485.usbdev_ tx_rx_disruption.1431411499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/485.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/486.usbdev_tx_rx_disruption.486952087 |
| Short name | T3735 |
| Test name | |
| Test status | |
| Simulation time | 496632649 ps |
| CPU time | 2.1 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:10 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=486952087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 486.usbdev_t x_rx_disruption.486952087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/486.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/487.usbdev_tx_rx_disruption.333500984 |
| Short name | T3784 |
| Test name | |
| Test status | |
| Simulation time | 496374785 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:10 AM UTC 24 |
| Peak memory | 215692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=333500984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 487.usbdev_t x_rx_disruption.333500984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/487.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/488.usbdev_tx_rx_disruption.1317034463 |
| Short name | T3790 |
| Test name | |
| Test status | |
| Simulation time | 624925102 ps |
| CPU time | 1.85 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:10 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1317034463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 488.usbdev_ tx_rx_disruption.1317034463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/488.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/489.usbdev_tx_rx_disruption.2580024566 |
| Short name | T3783 |
| Test name | |
| Test status | |
| Simulation time | 543157063 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:10 AM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2580024566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 489.usbdev_ tx_rx_disruption.2580024566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/489.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_alert_test.1035029142 |
| Short name | T3230 |
| Test name | |
| Test status | |
| Simulation time | 57981289 ps |
| CPU time | 0.78 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:24 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1035029142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 49.usbdev_alert_test.1035029142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_disconnect.3280851079 |
| Short name | T3182 |
| Test name | |
| Test status | |
| Simulation time | 9379040519 ps |
| CPU time | 13.33 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:31 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3280851079 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_disconnect.3280851079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.3255523772 |
| Short name | T3186 |
| Test name | |
| Test status | |
| Simulation time | 19493791753 ps |
| CPU time | 23.19 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:41 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3255523772 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_reset.3255523772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.630595296 |
| Short name | T3190 |
| Test name | |
| Test status | |
| Simulation time | 26113660986 ps |
| CPU time | 30.86 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:49 AM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=630595296 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_resume.630595296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_av_buffer.140112418 |
| Short name | T3174 |
| Test name | |
| Test status | |
| Simulation time | 149669164 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:18 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=140112418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_av_buffer.140112418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_bitstuff_err.286692910 |
| Short name | T3175 |
| Test name | |
| Test status | |
| Simulation time | 147570717 ps |
| CPU time | 0.87 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:18 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=286692910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_bitstuff_err.286692910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_clear.3723252425 |
| Short name | T3177 |
| Test name | |
| Test status | |
| Simulation time | 332524400 ps |
| CPU time | 1.35 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:19 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3723252425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 49.usbdev_data_toggle_clear.3723252425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_restore.2113681924 |
| Short name | T3181 |
| Test name | |
| Test status | |
| Simulation time | 1112250878 ps |
| CPU time | 2.87 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:20 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2113681924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_data_toggle_restore.2113681924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.780355668 |
| Short name | T3240 |
| Test name | |
| Test status | |
| Simulation time | 43896895478 ps |
| CPU time | 69.79 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:34:28 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=780355668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_device_address.780355668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.1912011895 |
| Short name | T3113 |
| Test name | |
| Test status | |
| Simulation time | 644918077 ps |
| CPU time | 4.62 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:22 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1912011895 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_timeout.1912011895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_disable_endpoint.1363089408 |
| Short name | T3179 |
| Test name | |
| Test status | |
| Simulation time | 576068733 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:19 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1363089408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_disable_endpoint.1363089408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_disconnected.3471322655 |
| Short name | T3176 |
| Test name | |
| Test status | |
| Simulation time | 158102681 ps |
| CPU time | 0.91 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:18 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3471322655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_disconnected.3471322655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_enable.2441660612 |
| Short name | T3191 |
| Test name | |
| Test status | |
| Simulation time | 43315492 ps |
| CPU time | 0.74 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:33:49 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2441660612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 49.usbdev_enable.2441660612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_access.3974923324 |
| Short name | T3209 |
| Test name | |
| Test status | |
| Simulation time | 664820352 ps |
| CPU time | 2.04 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:33:50 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3974923324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_access.3974923324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_types.4074188691 |
| Short name | T558 |
| Test name | |
| Test status | |
| Simulation time | 399989500 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:33:49 AM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4074188691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_types.4074188691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_levels.2394597080 |
| Short name | T3192 |
| Test name | |
| Test status | |
| Simulation time | 186413873 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:33:49 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2394597080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_fifo_levels.2394597080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_rst.1100105451 |
| Short name | T3210 |
| Test name | |
| Test status | |
| Simulation time | 383933892 ps |
| CPU time | 2.63 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:33:51 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1100105451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_fifo_rst.1100105451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_in_iso.2458062865 |
| Short name | T3198 |
| Test name | |
| Test status | |
| Simulation time | 228194640 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:33:49 AM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2458062865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_in_iso.2458062865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_in_stall.2290269934 |
| Short name | T3193 |
| Test name | |
| Test status | |
| Simulation time | 182246958 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:33:49 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2290269934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_stall.2290269934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_in_trans.708822970 |
| Short name | T3194 |
| Test name | |
| Test status | |
| Simulation time | 223368675 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:33:49 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=708822970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_in_trans.708822970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_invalid_sync.529366373 |
| Short name | T3217 |
| Test name | |
| Test status | |
| Simulation time | 4993349428 ps |
| CPU time | 32.89 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:34:21 AM UTC 24 |
| Peak memory | 235216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=529366373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_invalid_sync.529366373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_iso_retraction.2515833817 |
| Short name | T3216 |
| Test name | |
| Test status | |
| Simulation time | 4815661742 ps |
| CPU time | 30.2 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:34:19 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2515833817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_iso_retraction.2515833817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_link_in_err.3468039947 |
| Short name | T3195 |
| Test name | |
| Test status | |
| Simulation time | 226259186 ps |
| CPU time | 1.04 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:33:49 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3468039947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_in_err.3468039947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_link_resume.4192218642 |
| Short name | T3242 |
| Test name | |
| Test status | |
| Simulation time | 28798770251 ps |
| CPU time | 49.01 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:34:38 AM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4192218642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_resume.4192218642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_link_suspend.2776842333 |
| Short name | T3211 |
| Test name | |
| Test status | |
| Simulation time | 10651955699 ps |
| CPU time | 13.88 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:34:02 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2776842333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_link_suspend.2776842333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_low_speed_traffic.2570885042 |
| Short name | T3262 |
| Test name | |
| Test status | |
| Simulation time | 4101985928 ps |
| CPU time | 102.95 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:35:32 AM UTC 24 |
| Peak memory | 234916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2570885042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_low_speed_traffic.2570885042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.305368041 |
| Short name | T3214 |
| Test name | |
| Test status | |
| Simulation time | 3124449938 ps |
| CPU time | 21.41 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:34:10 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=305368041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_inter_pkt_delay.305368041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_in_transaction.2998036501 |
| Short name | T3204 |
| Test name | |
| Test status | |
| Simulation time | 260726001 ps |
| CPU time | 1.25 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:33:50 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2998036501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_in_transaction.2998036501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_out_transaction.4224321582 |
| Short name | T3197 |
| Test name | |
| Test status | |
| Simulation time | 260985925 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:33:49 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4224321582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_out_transaction.4224321582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.1789344294 |
| Short name | T3213 |
| Test name | |
| Test status | |
| Simulation time | 1825963312 ps |
| CPU time | 17.08 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:34:06 AM UTC 24 |
| Peak memory | 234752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1789344294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_inter_pkt_delay.1789344294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_in_transaction.2733651568 |
| Short name | T3203 |
| Test name | |
| Test status | |
| Simulation time | 160239421 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:33:50 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2733651568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_in_transaction.2733651568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_out_transaction.1523135796 |
| Short name | T3196 |
| Test name | |
| Test status | |
| Simulation time | 163950363 ps |
| CPU time | 0.89 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:33:49 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523135796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_out_transaction.1523135796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_nak_trans.3318241546 |
| Short name | T3202 |
| Test name | |
| Test status | |
| Simulation time | 230997678 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:33:50 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3318241546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_nak_trans.3318241546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_out_iso.2949906187 |
| Short name | T3201 |
| Test name | |
| Test status | |
| Simulation time | 240733482 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:33:47 AM UTC 24 |
| Finished | Sep 24 09:33:50 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2949906187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_out_iso.2949906187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_out_stall.1675997766 |
| Short name | T3199 |
| Test name | |
| Test status | |
| Simulation time | 166506308 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:33:48 AM UTC 24 |
| Finished | Sep 24 09:33:49 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1675997766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_out_stall.1675997766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_out_trans_nak.4212339750 |
| Short name | T3207 |
| Test name | |
| Test status | |
| Simulation time | 191111648 ps |
| CPU time | 1.31 seconds |
| Started | Sep 24 09:33:48 AM UTC 24 |
| Finished | Sep 24 09:33:50 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4212339750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_out_trans_nak.4212339750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_pending_in_trans.2437735007 |
| Short name | T3206 |
| Test name | |
| Test status | |
| Simulation time | 153326175 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:33:48 AM UTC 24 |
| Finished | Sep 24 09:33:50 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2437735007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_pending_in_trans.2437735007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_pinflip.646872489 |
| Short name | T3208 |
| Test name | |
| Test status | |
| Simulation time | 187574193 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 09:33:48 AM UTC 24 |
| Finished | Sep 24 09:33:50 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=646872489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_pinflip.646872489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_usb_ref_disable.1011731614 |
| Short name | T3205 |
| Test name | |
| Test status | |
| Simulation time | 151345114 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:33:48 AM UTC 24 |
| Finished | Sep 24 09:33:50 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1011731614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_usb_ref_disable.1011731614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_phy_pins_sense.2747960318 |
| Short name | T3200 |
| Test name | |
| Test status | |
| Simulation time | 44278112 ps |
| CPU time | 0.79 seconds |
| Started | Sep 24 09:33:48 AM UTC 24 |
| Finished | Sep 24 09:33:50 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2747960318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_pins_sense.2747960318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_buffer.30727320 |
| Short name | T3243 |
| Test name | |
| Test status | |
| Simulation time | 19292108309 ps |
| CPU time | 48.88 seconds |
| Started | Sep 24 09:33:48 AM UTC 24 |
| Finished | Sep 24 09:34:38 AM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=30727320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_pkt_buffer.30727320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_received.2928728112 |
| Short name | T3225 |
| Test name | |
| Test status | |
| Simulation time | 204048534 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:34:21 AM UTC 24 |
| Finished | Sep 24 09:34:24 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2928728112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_pkt_received.2928728112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_sent.4270839151 |
| Short name | T3222 |
| Test name | |
| Test status | |
| Simulation time | 194763430 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:34:21 AM UTC 24 |
| Finished | Sep 24 09:34:24 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4270839151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_pkt_sent.4270839151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_in_transaction.2340672286 |
| Short name | T3224 |
| Test name | |
| Test status | |
| Simulation time | 213409718 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:34:21 AM UTC 24 |
| Finished | Sep 24 09:34:24 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2340672286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_random_length_in_transaction.2340672286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_out_transaction.67941484 |
| Short name | T3228 |
| Test name | |
| Test status | |
| Simulation time | 207091744 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:34:21 AM UTC 24 |
| Finished | Sep 24 09:34:24 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=67941484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transa ction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 49.usbdev_random_length_out_transaction.67941484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_rx_crc_err.1595220462 |
| Short name | T3219 |
| Test name | |
| Test status | |
| Simulation time | 154050501 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:24 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1595220462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_rx_crc_err.1595220462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_rx_full.3447221984 |
| Short name | T3223 |
| Test name | |
| Test status | |
| Simulation time | 306443592 ps |
| CPU time | 1.25 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:24 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3447221984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_rx_full.3447221984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_setup_stage.996467986 |
| Short name | T3221 |
| Test name | |
| Test status | |
| Simulation time | 170638458 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:24 AM UTC 24 |
| Peak memory | 215096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=996467986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_setup_stage.996467986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_setup_trans_ignored.3550287906 |
| Short name | T3220 |
| Test name | |
| Test status | |
| Simulation time | 156312699 ps |
| CPU time | 0.86 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:24 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3550287906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 49.usbdev_setup_trans_ignored.3550287906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_smoke.1513862610 |
| Short name | T3229 |
| Test name | |
| Test status | |
| Simulation time | 235134692 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:24 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1513862610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_smoke.1513862610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_spurious_pids_ignored.2688203619 |
| Short name | T3241 |
| Test name | |
| Test status | |
| Simulation time | 1890264051 ps |
| CPU time | 11.76 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:35 AM UTC 24 |
| Peak memory | 234828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2688203619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_spurious_pids_ignored.2688203619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_stall_priority_over_nak.258673804 |
| Short name | T3226 |
| Test name | |
| Test status | |
| Simulation time | 167969685 ps |
| CPU time | 0.96 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:24 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=258673804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stall_priority_over_nak.258673804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_stall_trans.3703088078 |
| Short name | T3231 |
| Test name | |
| Test status | |
| Simulation time | 163440307 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:24 AM UTC 24 |
| Peak memory | 217192 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3703088078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_stall_trans.3703088078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_stream_len_max.3555714390 |
| Short name | T3234 |
| Test name | |
| Test status | |
| Simulation time | 204363199 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:24 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3555714390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stream_len_max.3555714390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_streaming_out.386811162 |
| Short name | T3244 |
| Test name | |
| Test status | |
| Simulation time | 2359722392 ps |
| CPU time | 16.7 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:40 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=386811162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_streaming_out.386811162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_timeout_missing_host_handshake.2423819421 |
| Short name | T3185 |
| Test name | |
| Test status | |
| Simulation time | 2000777821 ps |
| CPU time | 15.42 seconds |
| Started | Sep 24 09:33:16 AM UTC 24 |
| Finished | Sep 24 09:33:33 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2423819421 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_timeout_missing_host_handshake.2423819421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/49.usbdev_tx_rx_disruption.3922921943 |
| Short name | T3237 |
| Test name | |
| Test status | |
| Simulation time | 463269466 ps |
| CPU time | 2.06 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:25 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3922921943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_t x_rx_disruption.3922921943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/49.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/490.usbdev_tx_rx_disruption.3657358464 |
| Short name | T3785 |
| Test name | |
| Test status | |
| Simulation time | 514142396 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:10 AM UTC 24 |
| Peak memory | 215468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3657358464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 490.usbdev_ tx_rx_disruption.3657358464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/490.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/491.usbdev_tx_rx_disruption.2935761699 |
| Short name | T3732 |
| Test name | |
| Test status | |
| Simulation time | 594286573 ps |
| CPU time | 2.16 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:10 AM UTC 24 |
| Peak memory | 217556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2935761699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 491.usbdev_ tx_rx_disruption.2935761699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/491.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/492.usbdev_tx_rx_disruption.126011896 |
| Short name | T3793 |
| Test name | |
| Test status | |
| Simulation time | 551956056 ps |
| CPU time | 2.16 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:11 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=126011896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 492.usbdev_t x_rx_disruption.126011896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/492.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/493.usbdev_tx_rx_disruption.2452130020 |
| Short name | T3792 |
| Test name | |
| Test status | |
| Simulation time | 556487408 ps |
| CPU time | 1.89 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:10 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2452130020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 493.usbdev_ tx_rx_disruption.2452130020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/493.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/494.usbdev_tx_rx_disruption.3711573034 |
| Short name | T3791 |
| Test name | |
| Test status | |
| Simulation time | 500384522 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:10 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3711573034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 494.usbdev_ tx_rx_disruption.3711573034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/494.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/495.usbdev_tx_rx_disruption.3184457327 |
| Short name | T3734 |
| Test name | |
| Test status | |
| Simulation time | 524118810 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:10 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3184457327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 495.usbdev_ tx_rx_disruption.3184457327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/495.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/496.usbdev_tx_rx_disruption.83908133 |
| Short name | T3736 |
| Test name | |
| Test status | |
| Simulation time | 525710939 ps |
| CPU time | 1.95 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:10 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=83908133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 496.usbdev_tx _rx_disruption.83908133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/496.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/497.usbdev_tx_rx_disruption.820545977 |
| Short name | T3730 |
| Test name | |
| Test status | |
| Simulation time | 480186400 ps |
| CPU time | 2.04 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:10 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=820545977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 497.usbdev_t x_rx_disruption.820545977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/497.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/498.usbdev_tx_rx_disruption.2495861960 |
| Short name | T3789 |
| Test name | |
| Test status | |
| Simulation time | 533580928 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:10 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2495861960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 498.usbdev_ tx_rx_disruption.2495861960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/498.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/499.usbdev_tx_rx_disruption.4012238014 |
| Short name | T3788 |
| Test name | |
| Test status | |
| Simulation time | 486909301 ps |
| CPU time | 1.47 seconds |
| Started | Sep 24 09:49:07 AM UTC 24 |
| Finished | Sep 24 09:49:10 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4012238014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 499.usbdev_ tx_rx_disruption.4012238014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/499.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_alert_test.3277727113 |
| Short name | T807 |
| Test name | |
| Test status | |
| Simulation time | 140183116 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:01:11 AM UTC 24 |
| Finished | Sep 24 09:01:13 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3277727113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 5.usbdev_alert_test.3277727113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_disconnect.2289344765 |
| Short name | T766 |
| Test name | |
| Test status | |
| Simulation time | 8901118954 ps |
| CPU time | 22.22 seconds |
| Started | Sep 24 09:00:06 AM UTC 24 |
| Finished | Sep 24 09:00:30 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2289344765 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_disconnect.2289344765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_reset.1866831762 |
| Short name | T782 |
| Test name | |
| Test status | |
| Simulation time | 21241490409 ps |
| CPU time | 36.05 seconds |
| Started | Sep 24 09:00:08 AM UTC 24 |
| Finished | Sep 24 09:00:45 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1866831762 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_reset.1866831762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_resume.921616453 |
| Short name | T801 |
| Test name | |
| Test status | |
| Simulation time | 29269309248 ps |
| CPU time | 57.51 seconds |
| Started | Sep 24 09:00:09 AM UTC 24 |
| Finished | Sep 24 09:01:08 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=921616453 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_resume.921616453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_av_buffer.4016376537 |
| Short name | T756 |
| Test name | |
| Test status | |
| Simulation time | 157194027 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:00:09 AM UTC 24 |
| Finished | Sep 24 09:00:12 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4016376537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_av_buffer.4016376537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_bitstuff_err.460611154 |
| Short name | T755 |
| Test name | |
| Test status | |
| Simulation time | 174259249 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:00:09 AM UTC 24 |
| Finished | Sep 24 09:00:12 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=460611154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_bitstuff_err.460611154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_clear.2773001516 |
| Short name | T757 |
| Test name | |
| Test status | |
| Simulation time | 565045008 ps |
| CPU time | 3.55 seconds |
| Started | Sep 24 09:00:11 AM UTC 24 |
| Finished | Sep 24 09:00:15 AM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2773001516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 5.usbdev_data_toggle_clear.2773001516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_restore.2197628209 |
| Short name | T449 |
| Test name | |
| Test status | |
| Simulation time | 847408136 ps |
| CPU time | 4.58 seconds |
| Started | Sep 24 09:00:13 AM UTC 24 |
| Finished | Sep 24 09:00:19 AM UTC 24 |
| Peak memory | 217988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2197628209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_data_toggle_restore.2197628209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_device_address.2927556947 |
| Short name | T300 |
| Test name | |
| Test status | |
| Simulation time | 18899810244 ps |
| CPU time | 43.61 seconds |
| Started | Sep 24 09:00:13 AM UTC 24 |
| Finished | Sep 24 09:00:58 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2927556947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_address.2927556947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_device_timeout.3074040142 |
| Short name | T790 |
| Test name | |
| Test status | |
| Simulation time | 3577578267 ps |
| CPU time | 35.49 seconds |
| Started | Sep 24 09:00:16 AM UTC 24 |
| Finished | Sep 24 09:00:53 AM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3074040142 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_timeout.3074040142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_disable_endpoint.4144165884 |
| Short name | T430 |
| Test name | |
| Test status | |
| Simulation time | 918269974 ps |
| CPU time | 3.39 seconds |
| Started | Sep 24 09:00:20 AM UTC 24 |
| Finished | Sep 24 09:00:24 AM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4144165884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_disable_endpoint.4144165884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_disconnected.1233039587 |
| Short name | T762 |
| Test name | |
| Test status | |
| Simulation time | 149153260 ps |
| CPU time | 1.45 seconds |
| Started | Sep 24 09:00:24 AM UTC 24 |
| Finished | Sep 24 09:00:27 AM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1233039587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_disconnected.1233039587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_enable.1602073213 |
| Short name | T761 |
| Test name | |
| Test status | |
| Simulation time | 64622126 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 09:00:24 AM UTC 24 |
| Finished | Sep 24 09:00:26 AM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1602073213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 5.usbdev_enable.1602073213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_access.3444800 |
| Short name | T767 |
| Test name | |
| Test status | |
| Simulation time | 955465174 ps |
| CPU time | 4.76 seconds |
| Started | Sep 24 09:00:25 AM UTC 24 |
| Finished | Sep 24 09:00:31 AM UTC 24 |
| Peak memory | 217984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3444800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_endpoint_access.3444800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_levels.1292259711 |
| Short name | T316 |
| Test name | |
| Test status | |
| Simulation time | 275141990 ps |
| CPU time | 1.81 seconds |
| Started | Sep 24 09:00:28 AM UTC 24 |
| Finished | Sep 24 09:00:31 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1292259711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_fifo_levels.1292259711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_rst.3803910777 |
| Short name | T770 |
| Test name | |
| Test status | |
| Simulation time | 399088278 ps |
| CPU time | 3.61 seconds |
| Started | Sep 24 09:00:28 AM UTC 24 |
| Finished | Sep 24 09:00:33 AM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3803910777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_fifo_rst.3803910777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_in_iso.1236034656 |
| Short name | T769 |
| Test name | |
| Test status | |
| Simulation time | 192336847 ps |
| CPU time | 1.91 seconds |
| Started | Sep 24 09:00:29 AM UTC 24 |
| Finished | Sep 24 09:00:33 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1236034656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_in_iso.1236034656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_in_stall.434407519 |
| Short name | T771 |
| Test name | |
| Test status | |
| Simulation time | 161763570 ps |
| CPU time | 1.38 seconds |
| Started | Sep 24 09:00:31 AM UTC 24 |
| Finished | Sep 24 09:00:34 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=434407519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_in_stall.434407519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_in_trans.73410538 |
| Short name | T772 |
| Test name | |
| Test status | |
| Simulation time | 196387824 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 09:00:31 AM UTC 24 |
| Finished | Sep 24 09:00:34 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=73410538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 5.usbdev_in_trans.73410538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_invalid_sync.3271919918 |
| Short name | T852 |
| Test name | |
| Test status | |
| Simulation time | 2896655236 ps |
| CPU time | 89.79 seconds |
| Started | Sep 24 09:00:28 AM UTC 24 |
| Finished | Sep 24 09:02:00 AM UTC 24 |
| Peak memory | 234968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3271919918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 5.usbdev_invalid_sync.3271919918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_iso_retraction.3488471058 |
| Short name | T815 |
| Test name | |
| Test status | |
| Simulation time | 4580401710 ps |
| CPU time | 56.84 seconds |
| Started | Sep 24 09:00:32 AM UTC 24 |
| Finished | Sep 24 09:01:31 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3488471058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_iso_retraction.3488471058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_link_in_err.2682060840 |
| Short name | T774 |
| Test name | |
| Test status | |
| Simulation time | 232243639 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:00:32 AM UTC 24 |
| Finished | Sep 24 09:00:35 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2682060840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_in_err.2682060840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_link_resume.1924410285 |
| Short name | T818 |
| Test name | |
| Test status | |
| Simulation time | 24278356474 ps |
| CPU time | 58.26 seconds |
| Started | Sep 24 09:00:34 AM UTC 24 |
| Finished | Sep 24 09:01:35 AM UTC 24 |
| Peak memory | 228124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1924410285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_resume.1924410285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_link_suspend.3738682842 |
| Short name | T785 |
| Test name | |
| Test status | |
| Simulation time | 4439860364 ps |
| CPU time | 12.89 seconds |
| Started | Sep 24 09:00:35 AM UTC 24 |
| Finished | Sep 24 09:00:49 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3738682842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_link_suspend.3738682842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_low_speed_traffic.142541532 |
| Short name | T429 |
| Test name | |
| Test status | |
| Simulation time | 4600083875 ps |
| CPU time | 65.1 seconds |
| Started | Sep 24 09:00:35 AM UTC 24 |
| Finished | Sep 24 09:01:42 AM UTC 24 |
| Peak memory | 234960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=142541532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_low_speed_traffic.142541532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_max_inter_pkt_delay.1253365464 |
| Short name | T814 |
| Test name | |
| Test status | |
| Simulation time | 3966857165 ps |
| CPU time | 54.11 seconds |
| Started | Sep 24 09:00:35 AM UTC 24 |
| Finished | Sep 24 09:01:31 AM UTC 24 |
| Peak memory | 230408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1253365464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_inter_pkt_delay.1253365464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_in_transaction.4109582257 |
| Short name | T776 |
| Test name | |
| Test status | |
| Simulation time | 242130352 ps |
| CPU time | 1.86 seconds |
| Started | Sep 24 09:00:35 AM UTC 24 |
| Finished | Sep 24 09:00:38 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109582257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_in_transaction.4109582257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_out_transaction.3912257001 |
| Short name | T775 |
| Test name | |
| Test status | |
| Simulation time | 191520268 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:00:35 AM UTC 24 |
| Finished | Sep 24 09:00:37 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3912257001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_out_transaction.3912257001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_max_non_iso_usb_traffic.2774288687 |
| Short name | T800 |
| Test name | |
| Test status | |
| Simulation time | 2667612629 ps |
| CPU time | 28.11 seconds |
| Started | Sep 24 09:00:36 AM UTC 24 |
| Finished | Sep 24 09:01:06 AM UTC 24 |
| Peak memory | 234964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2774288687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_non_iso_usb_traffic.2774288687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_max_usb_traffic.2775232688 |
| Short name | T824 |
| Test name | |
| Test status | |
| Simulation time | 2139687574 ps |
| CPU time | 60.85 seconds |
| Started | Sep 24 09:00:36 AM UTC 24 |
| Finished | Sep 24 09:01:39 AM UTC 24 |
| Peak memory | 234872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2775232688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_usb_traffic.2775232688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_min_inter_pkt_delay.894764471 |
| Short name | T823 |
| Test name | |
| Test status | |
| Simulation time | 4020921243 ps |
| CPU time | 57.39 seconds |
| Started | Sep 24 09:00:39 AM UTC 24 |
| Finished | Sep 24 09:01:38 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=894764471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_inter_pkt_delay.894764471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_in_transaction.3209833581 |
| Short name | T779 |
| Test name | |
| Test status | |
| Simulation time | 149837201 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:00:39 AM UTC 24 |
| Finished | Sep 24 09:00:41 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3209833581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_in_transaction.3209833581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_out_transaction.2976286027 |
| Short name | T778 |
| Test name | |
| Test status | |
| Simulation time | 167088434 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:00:39 AM UTC 24 |
| Finished | Sep 24 09:00:41 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2976286027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_out_transaction.2976286027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_out_iso.2145065511 |
| Short name | T781 |
| Test name | |
| Test status | |
| Simulation time | 185014249 ps |
| CPU time | 1.74 seconds |
| Started | Sep 24 09:00:42 AM UTC 24 |
| Finished | Sep 24 09:00:45 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2145065511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_out_iso.2145065511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_out_stall.703816527 |
| Short name | T748 |
| Test name | |
| Test status | |
| Simulation time | 168138298 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:00:44 AM UTC 24 |
| Finished | Sep 24 09:00:46 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=703816527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_out_stall.703816527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_out_trans_nak.3971632711 |
| Short name | T783 |
| Test name | |
| Test status | |
| Simulation time | 167997455 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:00:46 AM UTC 24 |
| Finished | Sep 24 09:00:49 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3971632711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_out_trans_nak.3971632711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_pending_in_trans.1492317356 |
| Short name | T784 |
| Test name | |
| Test status | |
| Simulation time | 182824451 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 09:00:46 AM UTC 24 |
| Finished | Sep 24 09:00:49 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1492317356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_pending_in_trans.1492317356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_pinflip.139059006 |
| Short name | T787 |
| Test name | |
| Test status | |
| Simulation time | 256960791 ps |
| CPU time | 1.89 seconds |
| Started | Sep 24 09:00:47 AM UTC 24 |
| Finished | Sep 24 09:00:50 AM UTC 24 |
| Peak memory | 215812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=139059006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_pinflip.139059006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_usb_ref_disable.932137319 |
| Short name | T786 |
| Test name | |
| Test status | |
| Simulation time | 143868286 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:00:47 AM UTC 24 |
| Finished | Sep 24 09:00:50 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=932137319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 5.usbdev_phy_config_usb_ref_disable.932137319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_phy_pins_sense.2987840312 |
| Short name | T45 |
| Test name | |
| Test status | |
| Simulation time | 39270883 ps |
| CPU time | 1.23 seconds |
| Started | Sep 24 09:00:50 AM UTC 24 |
| Finished | Sep 24 09:00:52 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2987840312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_pins_sense.2987840312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_buffer.2278841500 |
| Short name | T289 |
| Test name | |
| Test status | |
| Simulation time | 19055862111 ps |
| CPU time | 69.12 seconds |
| Started | Sep 24 09:00:50 AM UTC 24 |
| Finished | Sep 24 09:02:01 AM UTC 24 |
| Peak memory | 228288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2278841500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_pkt_buffer.2278841500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_received.1017904435 |
| Short name | T788 |
| Test name | |
| Test status | |
| Simulation time | 146098586 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 09:00:50 AM UTC 24 |
| Finished | Sep 24 09:00:53 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1017904435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_pkt_received.1017904435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_sent.3682029616 |
| Short name | T791 |
| Test name | |
| Test status | |
| Simulation time | 196004258 ps |
| CPU time | 1.76 seconds |
| Started | Sep 24 09:00:52 AM UTC 24 |
| Finished | Sep 24 09:00:54 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3682029616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_pkt_sent.3682029616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_disconnects.1857113440 |
| Short name | T1010 |
| Test name | |
| Test status | |
| Simulation time | 10510345276 ps |
| CPU time | 198.39 seconds |
| Started | Sep 24 09:00:54 AM UTC 24 |
| Finished | Sep 24 09:04:16 AM UTC 24 |
| Peak memory | 230512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1857113440 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_disconnects.1857113440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_resets.30760836 |
| Short name | T171 |
| Test name | |
| Test status | |
| Simulation time | 7588312743 ps |
| CPU time | 50.61 seconds |
| Started | Sep 24 09:00:54 AM UTC 24 |
| Finished | Sep 24 09:01:47 AM UTC 24 |
| Peak memory | 234992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=30760836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bu s_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_resets.30760836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_rand_suspends.1448405377 |
| Short name | T884 |
| Test name | |
| Test status | |
| Simulation time | 10126449757 ps |
| CPU time | 82.98 seconds |
| Started | Sep 24 09:00:56 AM UTC 24 |
| Finished | Sep 24 09:02:21 AM UTC 24 |
| Peak memory | 235108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1448405377 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_suspends.1448405377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_in_transaction.2669396537 |
| Short name | T792 |
| Test name | |
| Test status | |
| Simulation time | 222166294 ps |
| CPU time | 1.93 seconds |
| Started | Sep 24 09:00:52 AM UTC 24 |
| Finished | Sep 24 09:00:55 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2669396537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_random_length_in_transaction.2669396537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_out_transaction.3844249247 |
| Short name | T794 |
| Test name | |
| Test status | |
| Simulation time | 174332870 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 09:00:54 AM UTC 24 |
| Finished | Sep 24 09:00:57 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3844249247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_random_length_out_transaction.3844249247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_resume_link_active.1184246738 |
| Short name | T834 |
| Test name | |
| Test status | |
| Simulation time | 20224082275 ps |
| CPU time | 47.26 seconds |
| Started | Sep 24 09:00:56 AM UTC 24 |
| Finished | Sep 24 09:01:45 AM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1184246738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 5.usbdev_resume_link_active.1184246738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_rx_crc_err.2344175706 |
| Short name | T795 |
| Test name | |
| Test status | |
| Simulation time | 162829272 ps |
| CPU time | 1.63 seconds |
| Started | Sep 24 09:00:57 AM UTC 24 |
| Finished | Sep 24 09:01:00 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2344175706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_rx_crc_err.2344175706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_rx_full.3593257330 |
| Short name | T384 |
| Test name | |
| Test status | |
| Simulation time | 359920052 ps |
| CPU time | 2.92 seconds |
| Started | Sep 24 09:00:57 AM UTC 24 |
| Finished | Sep 24 09:01:01 AM UTC 24 |
| Peak memory | 217692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3593257330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_rx_full.3593257330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_setup_stage.2948780563 |
| Short name | T796 |
| Test name | |
| Test status | |
| Simulation time | 150600951 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:01:00 AM UTC 24 |
| Finished | Sep 24 09:01:03 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2948780563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_setup_stage.2948780563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_setup_trans_ignored.1677081169 |
| Short name | T797 |
| Test name | |
| Test status | |
| Simulation time | 152135048 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:01:02 AM UTC 24 |
| Finished | Sep 24 09:01:04 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1677081169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 5.usbdev_setup_trans_ignored.1677081169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_smoke.1306760148 |
| Short name | T799 |
| Test name | |
| Test status | |
| Simulation time | 211311892 ps |
| CPU time | 1.86 seconds |
| Started | Sep 24 09:01:03 AM UTC 24 |
| Finished | Sep 24 09:01:06 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1306760148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_smoke.1306760148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_spurious_pids_ignored.3239750961 |
| Short name | T812 |
| Test name | |
| Test status | |
| Simulation time | 2451181193 ps |
| CPU time | 21.58 seconds |
| Started | Sep 24 09:01:04 AM UTC 24 |
| Finished | Sep 24 09:01:27 AM UTC 24 |
| Peak memory | 230668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3239750961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_spurious_pids_ignored.3239750961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_stall_priority_over_nak.2833342839 |
| Short name | T802 |
| Test name | |
| Test status | |
| Simulation time | 236624418 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:01:07 AM UTC 24 |
| Finished | Sep 24 09:01:09 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2833342839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stall_priority_over_nak.2833342839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_stall_trans.3766591462 |
| Short name | T803 |
| Test name | |
| Test status | |
| Simulation time | 170780229 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:01:07 AM UTC 24 |
| Finished | Sep 24 09:01:09 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3766591462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_stall_trans.3766591462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_stream_len_max.863098256 |
| Short name | T805 |
| Test name | |
| Test status | |
| Simulation time | 549876699 ps |
| CPU time | 3.38 seconds |
| Started | Sep 24 09:01:07 AM UTC 24 |
| Finished | Sep 24 09:01:12 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=863098256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_stream_len_max.863098256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_streaming_out.1776086814 |
| Short name | T895 |
| Test name | |
| Test status | |
| Simulation time | 2625369457 ps |
| CPU time | 83.26 seconds |
| Started | Sep 24 09:01:07 AM UTC 24 |
| Finished | Sep 24 09:02:32 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1776086814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_streaming_out.1776086814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_stress_usb_traffic.3397181732 |
| Short name | T862 |
| Test name | |
| Test status | |
| Simulation time | 10196825101 ps |
| CPU time | 55.77 seconds |
| Started | Sep 24 09:01:09 AM UTC 24 |
| Finished | Sep 24 09:02:07 AM UTC 24 |
| Peak memory | 228360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3397181732 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stress_usb_traffic.3397181732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/5.usbdev_timeout_missing_host_handshake.3239655802 |
| Short name | T777 |
| Test name | |
| Test status | |
| Simulation time | 559602657 ps |
| CPU time | 17.93 seconds |
| Started | Sep 24 09:00:19 AM UTC 24 |
| Finished | Sep 24 09:00:38 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3239655802 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_timeout_missing_host_handshake.3239655802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/5.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/50.usbdev_endpoint_types.2981845590 |
| Short name | T455 |
| Test name | |
| Test status | |
| Simulation time | 244548764 ps |
| CPU time | 1.34 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:25 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2981845590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_endpoint_types.2981845590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/50.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/50.usbdev_fifo_levels.3907971632 |
| Short name | T341 |
| Test name | |
| Test status | |
| Simulation time | 286939411 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:25 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3907971632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 50.usbdev_fifo_levels.3907971632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/50.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/50.usbdev_tx_rx_disruption.2345839112 |
| Short name | T3238 |
| Test name | |
| Test status | |
| Simulation time | 589488628 ps |
| CPU time | 1.86 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:25 AM UTC 24 |
| Peak memory | 215624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2345839112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_t x_rx_disruption.2345839112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/50.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/51.usbdev_endpoint_types.4201243500 |
| Short name | T3232 |
| Test name | |
| Test status | |
| Simulation time | 145647111 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:24 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4201243500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_endpoint_types.4201243500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/51.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/51.usbdev_fifo_levels.2630382778 |
| Short name | T342 |
| Test name | |
| Test status | |
| Simulation time | 312326611 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:25 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2630382778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 51.usbdev_fifo_levels.2630382778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/51.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/51.usbdev_tx_rx_disruption.1267156665 |
| Short name | T3239 |
| Test name | |
| Test status | |
| Simulation time | 587709730 ps |
| CPU time | 1.91 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:25 AM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1267156665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_t x_rx_disruption.1267156665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/51.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/52.usbdev_endpoint_types.1132647351 |
| Short name | T3233 |
| Test name | |
| Test status | |
| Simulation time | 150090570 ps |
| CPU time | 0.94 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:24 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1132647351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_endpoint_types.1132647351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/52.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/52.usbdev_fifo_levels.1657805261 |
| Short name | T338 |
| Test name | |
| Test status | |
| Simulation time | 163712008 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:25 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1657805261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 52.usbdev_fifo_levels.1657805261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/52.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/52.usbdev_tx_rx_disruption.2802608932 |
| Short name | T3236 |
| Test name | |
| Test status | |
| Simulation time | 482159159 ps |
| CPU time | 1.63 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:25 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2802608932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_t x_rx_disruption.2802608932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/52.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/53.usbdev_endpoint_types.954030513 |
| Short name | T456 |
| Test name | |
| Test status | |
| Simulation time | 528648571 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:25 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=954030513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 53.usbdev_endpoint_types.954030513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/53.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/53.usbdev_fifo_levels.2170422222 |
| Short name | T378 |
| Test name | |
| Test status | |
| Simulation time | 164674416 ps |
| CPU time | 0.95 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:25 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2170422222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 53.usbdev_fifo_levels.2170422222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/53.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.2851981788 |
| Short name | T3235 |
| Test name | |
| Test status | |
| Simulation time | 473085829 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:25 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2851981788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_t x_rx_disruption.2851981788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/53.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.3979596911 |
| Short name | T541 |
| Test name | |
| Test status | |
| Simulation time | 349325370 ps |
| CPU time | 1.22 seconds |
| Started | Sep 24 09:34:22 AM UTC 24 |
| Finished | Sep 24 09:34:25 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3979596911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_endpoint_types.3979596911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/54.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.3021238860 |
| Short name | T3246 |
| Test name | |
| Test status | |
| Simulation time | 543949618 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:35:01 AM UTC 24 |
| Finished | Sep 24 09:35:04 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3021238860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_t x_rx_disruption.3021238860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/54.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.3252976561 |
| Short name | T547 |
| Test name | |
| Test status | |
| Simulation time | 277649660 ps |
| CPU time | 1.16 seconds |
| Started | Sep 24 09:35:01 AM UTC 24 |
| Finished | Sep 24 09:35:04 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3252976561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_endpoint_types.3252976561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/55.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/55.usbdev_fifo_levels.3637569236 |
| Short name | T343 |
| Test name | |
| Test status | |
| Simulation time | 269430767 ps |
| CPU time | 1.25 seconds |
| Started | Sep 24 09:35:01 AM UTC 24 |
| Finished | Sep 24 09:35:04 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3637569236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 55.usbdev_fifo_levels.3637569236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/55.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.453942063 |
| Short name | T3218 |
| Test name | |
| Test status | |
| Simulation time | 600754393 ps |
| CPU time | 1.57 seconds |
| Started | Sep 24 09:35:01 AM UTC 24 |
| Finished | Sep 24 09:35:04 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=453942063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_tx _rx_disruption.453942063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/55.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.4194702575 |
| Short name | T559 |
| Test name | |
| Test status | |
| Simulation time | 335727712 ps |
| CPU time | 1.34 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:04 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4194702575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_endpoint_types.4194702575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/56.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/56.usbdev_fifo_levels.3780643438 |
| Short name | T371 |
| Test name | |
| Test status | |
| Simulation time | 266138372 ps |
| CPU time | 1.31 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:04 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3780643438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 56.usbdev_fifo_levels.3780643438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/56.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.2686244920 |
| Short name | T3248 |
| Test name | |
| Test status | |
| Simulation time | 487147740 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:04 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2686244920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_t x_rx_disruption.2686244920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/56.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/57.usbdev_fifo_levels.2913762397 |
| Short name | T320 |
| Test name | |
| Test status | |
| Simulation time | 278479832 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:04 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2913762397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 57.usbdev_fifo_levels.2913762397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/57.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.870709772 |
| Short name | T3247 |
| Test name | |
| Test status | |
| Simulation time | 510231008 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:04 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=870709772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_tx _rx_disruption.870709772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/57.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.662671797 |
| Short name | T528 |
| Test name | |
| Test status | |
| Simulation time | 565866115 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:04 AM UTC 24 |
| Peak memory | 216600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=662671797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 58.usbdev_endpoint_types.662671797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/58.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/58.usbdev_fifo_levels.2344593705 |
| Short name | T325 |
| Test name | |
| Test status | |
| Simulation time | 260276967 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:04 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2344593705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 58.usbdev_fifo_levels.2344593705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/58.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.2022651777 |
| Short name | T3251 |
| Test name | |
| Test status | |
| Simulation time | 654001869 ps |
| CPU time | 2 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 216280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2022651777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_t x_rx_disruption.2022651777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/58.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.1853984913 |
| Short name | T522 |
| Test name | |
| Test status | |
| Simulation time | 469889251 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1853984913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_endpoint_types.1853984913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/59.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/59.usbdev_fifo_levels.742538619 |
| Short name | T317 |
| Test name | |
| Test status | |
| Simulation time | 257176690 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:04 AM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=742538619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 59.usbdev_fifo_levels.742538619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/59.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.975795294 |
| Short name | T3253 |
| Test name | |
| Test status | |
| Simulation time | 609355082 ps |
| CPU time | 1.84 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=975795294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_tx _rx_disruption.975795294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/59.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_alert_test.1604867653 |
| Short name | T864 |
| Test name | |
| Test status | |
| Simulation time | 32833390 ps |
| CPU time | 1.11 seconds |
| Started | Sep 24 09:02:05 AM UTC 24 |
| Finished | Sep 24 09:02:07 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1604867653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 6.usbdev_alert_test.1604867653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_disconnect.2817971198 |
| Short name | T828 |
| Test name | |
| Test status | |
| Simulation time | 11249104141 ps |
| CPU time | 26.78 seconds |
| Started | Sep 24 09:01:12 AM UTC 24 |
| Finished | Sep 24 09:01:40 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2817971198 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_disconnect.2817971198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_reset.4271079451 |
| Short name | T826 |
| Test name | |
| Test status | |
| Simulation time | 14644708958 ps |
| CPU time | 26.25 seconds |
| Started | Sep 24 09:01:12 AM UTC 24 |
| Finished | Sep 24 09:01:40 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4271079451 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_reset.4271079451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_resume.1092300899 |
| Short name | T853 |
| Test name | |
| Test status | |
| Simulation time | 25189568192 ps |
| CPU time | 45.7 seconds |
| Started | Sep 24 09:01:14 AM UTC 24 |
| Finished | Sep 24 09:02:01 AM UTC 24 |
| Peak memory | 228288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1092300899 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_resume.1092300899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_av_buffer.150047192 |
| Short name | T808 |
| Test name | |
| Test status | |
| Simulation time | 146340395 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:01:14 AM UTC 24 |
| Finished | Sep 24 09:01:16 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=150047192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_av_buffer.150047192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_bitstuff_err.4163897872 |
| Short name | T809 |
| Test name | |
| Test status | |
| Simulation time | 152838556 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:01:14 AM UTC 24 |
| Finished | Sep 24 09:01:16 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4163897872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_bitstuff_err.4163897872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_clear.1806639114 |
| Short name | T811 |
| Test name | |
| Test status | |
| Simulation time | 517733766 ps |
| CPU time | 2.97 seconds |
| Started | Sep 24 09:01:15 AM UTC 24 |
| Finished | Sep 24 09:01:19 AM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1806639114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 6.usbdev_data_toggle_clear.1806639114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_restore.2548988751 |
| Short name | T450 |
| Test name | |
| Test status | |
| Simulation time | 429695552 ps |
| CPU time | 2.43 seconds |
| Started | Sep 24 09:01:18 AM UTC 24 |
| Finished | Sep 24 09:01:21 AM UTC 24 |
| Peak memory | 217600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2548988751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_restore.2548988751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_device_address.2388989322 |
| Short name | T431 |
| Test name | |
| Test status | |
| Simulation time | 44769755259 ps |
| CPU time | 104.45 seconds |
| Started | Sep 24 09:01:18 AM UTC 24 |
| Finished | Sep 24 09:03:04 AM UTC 24 |
| Peak memory | 217876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2388989322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_address.2388989322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_device_timeout.3730279613 |
| Short name | T817 |
| Test name | |
| Test status | |
| Simulation time | 1156843339 ps |
| CPU time | 11.55 seconds |
| Started | Sep 24 09:01:20 AM UTC 24 |
| Finished | Sep 24 09:01:32 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3730279613 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_timeout.3730279613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_disable_endpoint.3486737317 |
| Short name | T493 |
| Test name | |
| Test status | |
| Simulation time | 725748860 ps |
| CPU time | 3.58 seconds |
| Started | Sep 24 09:01:22 AM UTC 24 |
| Finished | Sep 24 09:01:27 AM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3486737317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_disable_endpoint.3486737317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_disconnected.1391619625 |
| Short name | T813 |
| Test name | |
| Test status | |
| Simulation time | 145821982 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:01:27 AM UTC 24 |
| Finished | Sep 24 09:01:29 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1391619625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_disconnected.1391619625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_enable.3463826308 |
| Short name | T816 |
| Test name | |
| Test status | |
| Simulation time | 85439013 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:01:29 AM UTC 24 |
| Finished | Sep 24 09:01:31 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3463826308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 6.usbdev_enable.3463826308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_access.340526012 |
| Short name | T821 |
| Test name | |
| Test status | |
| Simulation time | 1073709523 ps |
| CPU time | 6.28 seconds |
| Started | Sep 24 09:01:30 AM UTC 24 |
| Finished | Sep 24 09:01:37 AM UTC 24 |
| Peak memory | 218284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=340526012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_access.340526012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_types.966125732 |
| Short name | T193 |
| Test name | |
| Test status | |
| Simulation time | 347399068 ps |
| CPU time | 2.19 seconds |
| Started | Sep 24 09:01:31 AM UTC 24 |
| Finished | Sep 24 09:01:35 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=966125732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_types.966125732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_levels.1616988505 |
| Short name | T819 |
| Test name | |
| Test status | |
| Simulation time | 178318426 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:01:33 AM UTC 24 |
| Finished | Sep 24 09:01:35 AM UTC 24 |
| Peak memory | 215684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1616988505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_fifo_levels.1616988505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_rst.3029370717 |
| Short name | T820 |
| Test name | |
| Test status | |
| Simulation time | 276235339 ps |
| CPU time | 3.04 seconds |
| Started | Sep 24 09:01:33 AM UTC 24 |
| Finished | Sep 24 09:01:37 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3029370717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_fifo_rst.3029370717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_in_iso.262776240 |
| Short name | T822 |
| Test name | |
| Test status | |
| Simulation time | 237414013 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:01:35 AM UTC 24 |
| Finished | Sep 24 09:01:38 AM UTC 24 |
| Peak memory | 226156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=262776240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_in_iso.262776240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_in_stall.2995196964 |
| Short name | T825 |
| Test name | |
| Test status | |
| Simulation time | 137777382 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:01:37 AM UTC 24 |
| Finished | Sep 24 09:01:40 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2995196964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_stall.2995196964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_in_trans.1935038363 |
| Short name | T827 |
| Test name | |
| Test status | |
| Simulation time | 235204917 ps |
| CPU time | 1.81 seconds |
| Started | Sep 24 09:01:37 AM UTC 24 |
| Finished | Sep 24 09:01:40 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1935038363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_trans.1935038363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_invalid_sync.421167540 |
| Short name | T860 |
| Test name | |
| Test status | |
| Simulation time | 2281322042 ps |
| CPU time | 27.33 seconds |
| Started | Sep 24 09:01:34 AM UTC 24 |
| Finished | Sep 24 09:02:03 AM UTC 24 |
| Peak memory | 235032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=421167540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_invalid_sync.421167540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_iso_retraction.208485164 |
| Short name | T95 |
| Test name | |
| Test status | |
| Simulation time | 6544167027 ps |
| CPU time | 44.11 seconds |
| Started | Sep 24 09:01:39 AM UTC 24 |
| Finished | Sep 24 09:02:24 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=208485164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 6.usbdev_iso_retraction.208485164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_link_in_err.2429269678 |
| Short name | T829 |
| Test name | |
| Test status | |
| Simulation time | 254672260 ps |
| CPU time | 1.85 seconds |
| Started | Sep 24 09:01:39 AM UTC 24 |
| Finished | Sep 24 09:01:42 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2429269678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_in_err.2429269678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_link_resume.2533599362 |
| Short name | T900 |
| Test name | |
| Test status | |
| Simulation time | 23834784788 ps |
| CPU time | 57.47 seconds |
| Started | Sep 24 09:01:39 AM UTC 24 |
| Finished | Sep 24 09:02:38 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2533599362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_resume.2533599362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_link_suspend.4048383121 |
| Short name | T105 |
| Test name | |
| Test status | |
| Simulation time | 9683567804 ps |
| CPU time | 18.31 seconds |
| Started | Sep 24 09:01:41 AM UTC 24 |
| Finished | Sep 24 09:02:00 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4048383121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_link_suspend.4048383121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_low_speed_traffic.1853924343 |
| Short name | T891 |
| Test name | |
| Test status | |
| Simulation time | 4587339273 ps |
| CPU time | 48.79 seconds |
| Started | Sep 24 09:01:41 AM UTC 24 |
| Finished | Sep 24 09:02:31 AM UTC 24 |
| Peak memory | 234920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1853924343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_low_speed_traffic.1853924343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_max_inter_pkt_delay.2386606346 |
| Short name | T855 |
| Test name | |
| Test status | |
| Simulation time | 2571439754 ps |
| CPU time | 19.37 seconds |
| Started | Sep 24 09:01:41 AM UTC 24 |
| Finished | Sep 24 09:02:01 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2386606346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_inter_pkt_delay.2386606346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_in_transaction.2498930298 |
| Short name | T832 |
| Test name | |
| Test status | |
| Simulation time | 257220939 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:01:41 AM UTC 24 |
| Finished | Sep 24 09:01:44 AM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2498930298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_in_transaction.2498930298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_out_transaction.710012379 |
| Short name | T833 |
| Test name | |
| Test status | |
| Simulation time | 187725023 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 09:01:41 AM UTC 24 |
| Finished | Sep 24 09:01:44 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=710012379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 6.usbdev_max_length_out_transaction.710012379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_max_non_iso_usb_traffic.1301245759 |
| Short name | T859 |
| Test name | |
| Test status | |
| Simulation time | 2375241645 ps |
| CPU time | 18.91 seconds |
| Started | Sep 24 09:01:42 AM UTC 24 |
| Finished | Sep 24 09:02:02 AM UTC 24 |
| Peak memory | 230408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1301245759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_non_iso_usb_traffic.1301245759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_max_usb_traffic.816345938 |
| Short name | T869 |
| Test name | |
| Test status | |
| Simulation time | 1943700376 ps |
| CPU time | 26.04 seconds |
| Started | Sep 24 09:01:42 AM UTC 24 |
| Finished | Sep 24 09:02:10 AM UTC 24 |
| Peak memory | 234880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=816345938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_usb_traffic.816345938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_min_inter_pkt_delay.2831928381 |
| Short name | T910 |
| Test name | |
| Test status | |
| Simulation time | 1806011255 ps |
| CPU time | 58.7 seconds |
| Started | Sep 24 09:01:45 AM UTC 24 |
| Finished | Sep 24 09:02:46 AM UTC 24 |
| Peak memory | 235020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2831928381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_inter_pkt_delay.2831928381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_in_transaction.2498619193 |
| Short name | T839 |
| Test name | |
| Test status | |
| Simulation time | 157918379 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:01:45 AM UTC 24 |
| Finished | Sep 24 09:01:48 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2498619193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_in_transaction.2498619193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_out_transaction.1136641492 |
| Short name | T838 |
| Test name | |
| Test status | |
| Simulation time | 191963206 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:01:45 AM UTC 24 |
| Finished | Sep 24 09:01:48 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1136641492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_out_transaction.1136641492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_nak_trans.732507904 |
| Short name | T129 |
| Test name | |
| Test status | |
| Simulation time | 215264865 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 09:01:45 AM UTC 24 |
| Finished | Sep 24 09:01:48 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=732507904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_nak_trans.732507904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_out_iso.3514592285 |
| Short name | T840 |
| Test name | |
| Test status | |
| Simulation time | 181375683 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 09:01:45 AM UTC 24 |
| Finished | Sep 24 09:01:48 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3514592285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_out_iso.3514592285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_out_stall.2551168844 |
| Short name | T837 |
| Test name | |
| Test status | |
| Simulation time | 189564291 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:01:45 AM UTC 24 |
| Finished | Sep 24 09:01:48 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2551168844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_out_stall.2551168844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_out_trans_nak.3690864391 |
| Short name | T842 |
| Test name | |
| Test status | |
| Simulation time | 186661057 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 09:01:47 AM UTC 24 |
| Finished | Sep 24 09:01:49 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3690864391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_out_trans_nak.3690864391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_pending_in_trans.466338050 |
| Short name | T841 |
| Test name | |
| Test status | |
| Simulation time | 160930811 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:01:47 AM UTC 24 |
| Finished | Sep 24 09:01:49 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=466338050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_pending_in_trans.466338050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_pinflip.2526498357 |
| Short name | T845 |
| Test name | |
| Test status | |
| Simulation time | 221639716 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:01:50 AM UTC 24 |
| Finished | Sep 24 09:01:53 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2526498357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_pinflip.2526498357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_usb_ref_disable.10888586 |
| Short name | T844 |
| Test name | |
| Test status | |
| Simulation time | 146086819 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:01:50 AM UTC 24 |
| Finished | Sep 24 09:01:53 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=10888586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disab le_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 6.usbdev_phy_config_usb_ref_disable.10888586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_phy_pins_sense.6575110 |
| Short name | T843 |
| Test name | |
| Test status | |
| Simulation time | 36778102 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:01:50 AM UTC 24 |
| Finished | Sep 24 09:01:53 AM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=6575110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_phy_pins_sense.6575110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_buffer.2325323819 |
| Short name | T896 |
| Test name | |
| Test status | |
| Simulation time | 12055802884 ps |
| CPU time | 40.57 seconds |
| Started | Sep 24 09:01:50 AM UTC 24 |
| Finished | Sep 24 09:02:33 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2325323819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_pkt_buffer.2325323819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_received.822207904 |
| Short name | T847 |
| Test name | |
| Test status | |
| Simulation time | 159211560 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:01:50 AM UTC 24 |
| Finished | Sep 24 09:01:54 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=822207904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_pkt_received.822207904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_sent.805424878 |
| Short name | T846 |
| Test name | |
| Test status | |
| Simulation time | 250418807 ps |
| CPU time | 1.33 seconds |
| Started | Sep 24 09:01:50 AM UTC 24 |
| Finished | Sep 24 09:01:53 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=805424878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_pkt_sent.805424878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_disconnects.82000822 |
| Short name | T980 |
| Test name | |
| Test status | |
| Simulation time | 7011943204 ps |
| CPU time | 116.4 seconds |
| Started | Sep 24 09:01:52 AM UTC 24 |
| Finished | Sep 24 09:03:51 AM UTC 24 |
| Peak memory | 230388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=82000822 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_disconnects.82000822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_resets.3057744993 |
| Short name | T920 |
| Test name | |
| Test status | |
| Simulation time | 5341296144 ps |
| CPU time | 60.34 seconds |
| Started | Sep 24 09:01:55 AM UTC 24 |
| Finished | Sep 24 09:02:57 AM UTC 24 |
| Peak memory | 228428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3057744993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_resets.3057744993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_rand_suspends.3447140056 |
| Short name | T1071 |
| Test name | |
| Test status | |
| Simulation time | 10123616051 ps |
| CPU time | 187.96 seconds |
| Started | Sep 24 09:01:55 AM UTC 24 |
| Finished | Sep 24 09:05:06 AM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3447140056 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_suspends.3447140056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_in_transaction.2681176734 |
| Short name | T848 |
| Test name | |
| Test status | |
| Simulation time | 182088033 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:01:50 AM UTC 24 |
| Finished | Sep 24 09:01:54 AM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2681176734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_random_length_in_transaction.2681176734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_out_transaction.1649051676 |
| Short name | T849 |
| Test name | |
| Test status | |
| Simulation time | 188392488 ps |
| CPU time | 1.76 seconds |
| Started | Sep 24 09:01:50 AM UTC 24 |
| Finished | Sep 24 09:01:54 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1649051676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_random_length_out_transaction.1649051676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_resume_link_active.2743619151 |
| Short name | T887 |
| Test name | |
| Test status | |
| Simulation time | 20157617010 ps |
| CPU time | 30.22 seconds |
| Started | Sep 24 09:01:55 AM UTC 24 |
| Finished | Sep 24 09:02:26 AM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2743619151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 6.usbdev_resume_link_active.2743619151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_rx_crc_err.944317342 |
| Short name | T851 |
| Test name | |
| Test status | |
| Simulation time | 145837547 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:01:55 AM UTC 24 |
| Finished | Sep 24 09:01:57 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=944317342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_rx_crc_err.944317342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_rx_full.1939395981 |
| Short name | T789 |
| Test name | |
| Test status | |
| Simulation time | 337611926 ps |
| CPU time | 2.28 seconds |
| Started | Sep 24 09:01:55 AM UTC 24 |
| Finished | Sep 24 09:01:58 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1939395981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_rx_full.1939395981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_setup_stage.3854685598 |
| Short name | T806 |
| Test name | |
| Test status | |
| Simulation time | 150112675 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:01:55 AM UTC 24 |
| Finished | Sep 24 09:01:57 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3854685598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_setup_stage.3854685598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_setup_trans_ignored.1960492081 |
| Short name | T804 |
| Test name | |
| Test status | |
| Simulation time | 148137336 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:01:55 AM UTC 24 |
| Finished | Sep 24 09:01:57 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1960492081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 6.usbdev_setup_trans_ignored.1960492081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_smoke.1115190062 |
| Short name | T858 |
| Test name | |
| Test status | |
| Simulation time | 238732640 ps |
| CPU time | 1.83 seconds |
| Started | Sep 24 09:02:00 AM UTC 24 |
| Finished | Sep 24 09:02:03 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1115190062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_smoke.1115190062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_spurious_pids_ignored.3665967236 |
| Short name | T889 |
| Test name | |
| Test status | |
| Simulation time | 2703282239 ps |
| CPU time | 26.71 seconds |
| Started | Sep 24 09:02:00 AM UTC 24 |
| Finished | Sep 24 09:02:28 AM UTC 24 |
| Peak memory | 234964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3665967236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_spurious_pids_ignored.3665967236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_stall_priority_over_nak.1552592973 |
| Short name | T856 |
| Test name | |
| Test status | |
| Simulation time | 185584970 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:02:00 AM UTC 24 |
| Finished | Sep 24 09:02:02 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1552592973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stall_priority_over_nak.1552592973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_stall_trans.3774492047 |
| Short name | T857 |
| Test name | |
| Test status | |
| Simulation time | 183244203 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:02:00 AM UTC 24 |
| Finished | Sep 24 09:02:02 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3774492047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_stall_trans.3774492047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_stream_len_max.3504585123 |
| Short name | T861 |
| Test name | |
| Test status | |
| Simulation time | 514058825 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 09:02:01 AM UTC 24 |
| Finished | Sep 24 09:02:04 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3504585123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stream_len_max.3504585123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_streaming_out.2031992479 |
| Short name | T878 |
| Test name | |
| Test status | |
| Simulation time | 1764737371 ps |
| CPU time | 16.64 seconds |
| Started | Sep 24 09:02:00 AM UTC 24 |
| Finished | Sep 24 09:02:18 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2031992479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_streaming_out.2031992479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_stress_usb_traffic.60664580 |
| Short name | T263 |
| Test name | |
| Test status | |
| Simulation time | 11140623414 ps |
| CPU time | 219.14 seconds |
| Started | Sep 24 09:02:04 AM UTC 24 |
| Finished | Sep 24 09:05:47 AM UTC 24 |
| Peak memory | 234956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=60664580 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23 /usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stress_usb_traffic.60664580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_timeout_missing_host_handshake.3337674575 |
| Short name | T865 |
| Test name | |
| Test status | |
| Simulation time | 3881525166 ps |
| CPU time | 45.94 seconds |
| Started | Sep 24 09:01:20 AM UTC 24 |
| Finished | Sep 24 09:02:07 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3337674575 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_timeout_missing_host_handshake.3337674575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/6.usbdev_tx_rx_disruption.1980813397 |
| Short name | T868 |
| Test name | |
| Test status | |
| Simulation time | 710166285 ps |
| CPU time | 2.28 seconds |
| Started | Sep 24 09:02:04 AM UTC 24 |
| Finished | Sep 24 09:02:08 AM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1980813397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_tx _rx_disruption.1980813397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/6.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.3616534989 |
| Short name | T491 |
| Test name | |
| Test status | |
| Simulation time | 699614164 ps |
| CPU time | 1.94 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3616534989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_endpoint_types.3616534989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/60.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/60.usbdev_fifo_levels.3305311600 |
| Short name | T380 |
| Test name | |
| Test status | |
| Simulation time | 279835415 ps |
| CPU time | 1.38 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:04 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3305311600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 60.usbdev_fifo_levels.3305311600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/60.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.2362956864 |
| Short name | T3258 |
| Test name | |
| Test status | |
| Simulation time | 586233360 ps |
| CPU time | 2.05 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2362956864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_t x_rx_disruption.2362956864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/60.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.2986919826 |
| Short name | T457 |
| Test name | |
| Test status | |
| Simulation time | 524737926 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2986919826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_endpoint_types.2986919826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/61.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/61.usbdev_fifo_levels.475640403 |
| Short name | T3249 |
| Test name | |
| Test status | |
| Simulation time | 254587778 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:04 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=475640403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 61.usbdev_fifo_levels.475640403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/61.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.553361903 |
| Short name | T3255 |
| Test name | |
| Test status | |
| Simulation time | 476718804 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=553361903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_tx _rx_disruption.553361903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/61.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/62.usbdev_fifo_levels.1453934387 |
| Short name | T321 |
| Test name | |
| Test status | |
| Simulation time | 262205935 ps |
| CPU time | 1.17 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:04 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1453934387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 62.usbdev_fifo_levels.1453934387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/62.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.2833410334 |
| Short name | T3254 |
| Test name | |
| Test status | |
| Simulation time | 524995898 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2833410334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_t x_rx_disruption.2833410334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/62.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.2986564351 |
| Short name | T545 |
| Test name | |
| Test status | |
| Simulation time | 426396479 ps |
| CPU time | 1.9 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2986564351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_endpoint_types.2986564351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/63.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/63.usbdev_fifo_levels.3211234806 |
| Short name | T402 |
| Test name | |
| Test status | |
| Simulation time | 269986791 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3211234806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 63.usbdev_fifo_levels.3211234806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/63.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.51326612 |
| Short name | T3260 |
| Test name | |
| Test status | |
| Simulation time | 559664856 ps |
| CPU time | 2.02 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=51326612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_tx_ rx_disruption.51326612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/63.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.767605718 |
| Short name | T476 |
| Test name | |
| Test status | |
| Simulation time | 493890605 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=767605718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 64.usbdev_endpoint_types.767605718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/64.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/64.usbdev_fifo_levels.3391431392 |
| Short name | T322 |
| Test name | |
| Test status | |
| Simulation time | 271704329 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3391431392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 64.usbdev_fifo_levels.3391431392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/64.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.1683049675 |
| Short name | T3257 |
| Test name | |
| Test status | |
| Simulation time | 463733230 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1683049675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_t x_rx_disruption.1683049675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/64.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.2847430955 |
| Short name | T495 |
| Test name | |
| Test status | |
| Simulation time | 489021030 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2847430955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_endpoint_types.2847430955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/65.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/65.usbdev_fifo_levels.3107826398 |
| Short name | T3250 |
| Test name | |
| Test status | |
| Simulation time | 189337680 ps |
| CPU time | 0.94 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3107826398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 65.usbdev_fifo_levels.3107826398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/65.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.646742504 |
| Short name | T3261 |
| Test name | |
| Test status | |
| Simulation time | 544611276 ps |
| CPU time | 1.84 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=646742504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_tx _rx_disruption.646742504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/65.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.1289065678 |
| Short name | T3256 |
| Test name | |
| Test status | |
| Simulation time | 202181411 ps |
| CPU time | 1.4 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1289065678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_endpoint_types.1289065678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/66.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/66.usbdev_fifo_levels.2325567774 |
| Short name | T3252 |
| Test name | |
| Test status | |
| Simulation time | 315800919 ps |
| CPU time | 1.18 seconds |
| Started | Sep 24 09:35:02 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2325567774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 66.usbdev_fifo_levels.2325567774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/66.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.2640676080 |
| Short name | T3259 |
| Test name | |
| Test status | |
| Simulation time | 607301457 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:35:03 AM UTC 24 |
| Finished | Sep 24 09:35:05 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2640676080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_t x_rx_disruption.2640676080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/66.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.4160875471 |
| Short name | T571 |
| Test name | |
| Test status | |
| Simulation time | 355782292 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:35:47 AM UTC 24 |
| Finished | Sep 24 09:35:50 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4160875471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_endpoint_types.4160875471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/67.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/67.usbdev_fifo_levels.3958295589 |
| Short name | T368 |
| Test name | |
| Test status | |
| Simulation time | 266221555 ps |
| CPU time | 1.14 seconds |
| Started | Sep 24 09:35:47 AM UTC 24 |
| Finished | Sep 24 09:35:49 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3958295589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 67.usbdev_fifo_levels.3958295589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/67.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/67.usbdev_tx_rx_disruption.2661379855 |
| Short name | T3266 |
| Test name | |
| Test status | |
| Simulation time | 637439033 ps |
| CPU time | 1.77 seconds |
| Started | Sep 24 09:35:47 AM UTC 24 |
| Finished | Sep 24 09:35:50 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2661379855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_t x_rx_disruption.2661379855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/67.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/68.usbdev_fifo_levels.2836854356 |
| Short name | T3263 |
| Test name | |
| Test status | |
| Simulation time | 277707724 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:35:47 AM UTC 24 |
| Finished | Sep 24 09:35:50 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2836854356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 68.usbdev_fifo_levels.2836854356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/68.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/68.usbdev_tx_rx_disruption.639832027 |
| Short name | T3269 |
| Test name | |
| Test status | |
| Simulation time | 623966062 ps |
| CPU time | 1.82 seconds |
| Started | Sep 24 09:35:47 AM UTC 24 |
| Finished | Sep 24 09:35:50 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=639832027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_tx _rx_disruption.639832027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/68.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/69.usbdev_endpoint_types.2592765283 |
| Short name | T527 |
| Test name | |
| Test status | |
| Simulation time | 287220030 ps |
| CPU time | 1.03 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:50 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2592765283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_endpoint_types.2592765283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/69.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/69.usbdev_fifo_levels.661828239 |
| Short name | T3264 |
| Test name | |
| Test status | |
| Simulation time | 244203101 ps |
| CPU time | 1.27 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:50 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=661828239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 69.usbdev_fifo_levels.661828239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/69.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/69.usbdev_tx_rx_disruption.3284831584 |
| Short name | T3273 |
| Test name | |
| Test status | |
| Simulation time | 626725803 ps |
| CPU time | 1.81 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:51 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3284831584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_t x_rx_disruption.3284831584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/69.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_alert_test.322686491 |
| Short name | T916 |
| Test name | |
| Test status | |
| Simulation time | 50666828 ps |
| CPU time | 1.28 seconds |
| Started | Sep 24 09:02:48 AM UTC 24 |
| Finished | Sep 24 09:02:50 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=322686491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_alert_test.322686491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_disconnect.30040737 |
| Short name | T874 |
| Test name | |
| Test status | |
| Simulation time | 4833995780 ps |
| CPU time | 8.61 seconds |
| Started | Sep 24 09:02:05 AM UTC 24 |
| Finished | Sep 24 09:02:15 AM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=30040737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_disconnect.30040737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_reset.3019416005 |
| Short name | T106 |
| Test name | |
| Test status | |
| Simulation time | 21317383839 ps |
| CPU time | 56.39 seconds |
| Started | Sep 24 09:02:05 AM UTC 24 |
| Finished | Sep 24 09:03:03 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3019416005 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_reset.3019416005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_resume.3713976608 |
| Short name | T918 |
| Test name | |
| Test status | |
| Simulation time | 23431732427 ps |
| CPU time | 48.11 seconds |
| Started | Sep 24 09:02:05 AM UTC 24 |
| Finished | Sep 24 09:02:55 AM UTC 24 |
| Peak memory | 228292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3713976608 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_resume.3713976608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_av_buffer.1255738621 |
| Short name | T866 |
| Test name | |
| Test status | |
| Simulation time | 165762037 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:02:05 AM UTC 24 |
| Finished | Sep 24 09:02:08 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1255738621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_av_buffer.1255738621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_bitstuff_err.3845123107 |
| Short name | T867 |
| Test name | |
| Test status | |
| Simulation time | 150956129 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:02:05 AM UTC 24 |
| Finished | Sep 24 09:02:08 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3845123107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_bitstuff_err.3845123107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_clear.659131178 |
| Short name | T870 |
| Test name | |
| Test status | |
| Simulation time | 581346775 ps |
| CPU time | 3.23 seconds |
| Started | Sep 24 09:02:06 AM UTC 24 |
| Finished | Sep 24 09:02:11 AM UTC 24 |
| Peak memory | 217700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=659131178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_data_toggle_clear.659131178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_restore.3168972103 |
| Short name | T451 |
| Test name | |
| Test status | |
| Simulation time | 791531603 ps |
| CPU time | 3.58 seconds |
| Started | Sep 24 09:02:08 AM UTC 24 |
| Finished | Sep 24 09:02:12 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3168972103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_restore.3168972103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_device_address.1173199228 |
| Short name | T426 |
| Test name | |
| Test status | |
| Simulation time | 30215425245 ps |
| CPU time | 51.94 seconds |
| Started | Sep 24 09:02:08 AM UTC 24 |
| Finished | Sep 24 09:03:01 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1173199228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_address.1173199228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_device_timeout.3117471830 |
| Short name | T934 |
| Test name | |
| Test status | |
| Simulation time | 7359806014 ps |
| CPU time | 57.45 seconds |
| Started | Sep 24 09:02:08 AM UTC 24 |
| Finished | Sep 24 09:03:07 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3117471830 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_timeout.3117471830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_disable_endpoint.854602729 |
| Short name | T873 |
| Test name | |
| Test status | |
| Simulation time | 731350345 ps |
| CPU time | 3.24 seconds |
| Started | Sep 24 09:02:10 AM UTC 24 |
| Finished | Sep 24 09:02:14 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=854602729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_disable_endpoint.854602729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_disconnected.4005249308 |
| Short name | T872 |
| Test name | |
| Test status | |
| Simulation time | 204003638 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:02:10 AM UTC 24 |
| Finished | Sep 24 09:02:12 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4005249308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_disconnected.4005249308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_enable.369319429 |
| Short name | T871 |
| Test name | |
| Test status | |
| Simulation time | 53292968 ps |
| CPU time | 0.96 seconds |
| Started | Sep 24 09:02:10 AM UTC 24 |
| Finished | Sep 24 09:02:12 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=369319429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_enable.369319429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_access.3333029008 |
| Short name | T877 |
| Test name | |
| Test status | |
| Simulation time | 976939271 ps |
| CPU time | 5.05 seconds |
| Started | Sep 24 09:02:11 AM UTC 24 |
| Finished | Sep 24 09:02:18 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3333029008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_access.3333029008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_types.3110334673 |
| Short name | T464 |
| Test name | |
| Test status | |
| Simulation time | 663130032 ps |
| CPU time | 3.01 seconds |
| Started | Sep 24 09:02:11 AM UTC 24 |
| Finished | Sep 24 09:02:15 AM UTC 24 |
| Peak memory | 217708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3110334673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_types.3110334673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_levels.528172722 |
| Short name | T194 |
| Test name | |
| Test status | |
| Simulation time | 295641191 ps |
| CPU time | 2.09 seconds |
| Started | Sep 24 09:02:12 AM UTC 24 |
| Finished | Sep 24 09:02:16 AM UTC 24 |
| Peak memory | 217688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=528172722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_fifo_levels.528172722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_rst.3100721029 |
| Short name | T881 |
| Test name | |
| Test status | |
| Simulation time | 340564318 ps |
| CPU time | 3.12 seconds |
| Started | Sep 24 09:02:14 AM UTC 24 |
| Finished | Sep 24 09:02:18 AM UTC 24 |
| Peak memory | 218284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3100721029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_fifo_rst.3100721029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_in_iso.606670648 |
| Short name | T880 |
| Test name | |
| Test status | |
| Simulation time | 230596645 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 09:02:15 AM UTC 24 |
| Finished | Sep 24 09:02:18 AM UTC 24 |
| Peak memory | 226096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=606670648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_in_iso.606670648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_in_stall.3496143466 |
| Short name | T879 |
| Test name | |
| Test status | |
| Simulation time | 145134012 ps |
| CPU time | 1.38 seconds |
| Started | Sep 24 09:02:15 AM UTC 24 |
| Finished | Sep 24 09:02:18 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3496143466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_stall.3496143466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_in_trans.2641130563 |
| Short name | T882 |
| Test name | |
| Test status | |
| Simulation time | 193153625 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:02:17 AM UTC 24 |
| Finished | Sep 24 09:02:20 AM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2641130563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_trans.2641130563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_invalid_sync.4213542275 |
| Short name | T915 |
| Test name | |
| Test status | |
| Simulation time | 3770389213 ps |
| CPU time | 34.99 seconds |
| Started | Sep 24 09:02:14 AM UTC 24 |
| Finished | Sep 24 09:02:50 AM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4213542275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 7.usbdev_invalid_sync.4213542275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_iso_retraction.4243807224 |
| Short name | T1074 |
| Test name | |
| Test status | |
| Simulation time | 11024253430 ps |
| CPU time | 167.11 seconds |
| Started | Sep 24 09:02:17 AM UTC 24 |
| Finished | Sep 24 09:05:07 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4243807224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_iso_retraction.4243807224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_link_in_err.3552857803 |
| Short name | T883 |
| Test name | |
| Test status | |
| Simulation time | 243323589 ps |
| CPU time | 1.28 seconds |
| Started | Sep 24 09:02:18 AM UTC 24 |
| Finished | Sep 24 09:02:21 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3552857803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_in_err.3552857803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_link_suspend.704099912 |
| Short name | T100 |
| Test name | |
| Test status | |
| Simulation time | 4841613709 ps |
| CPU time | 9.5 seconds |
| Started | Sep 24 09:02:18 AM UTC 24 |
| Finished | Sep 24 09:02:29 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=704099912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_suspend.704099912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_low_speed_traffic.3523958155 |
| Short name | T926 |
| Test name | |
| Test status | |
| Simulation time | 3533227385 ps |
| CPU time | 39.98 seconds |
| Started | Sep 24 09:02:21 AM UTC 24 |
| Finished | Sep 24 09:03:02 AM UTC 24 |
| Peak memory | 234916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3523958155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_low_speed_traffic.3523958155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_max_inter_pkt_delay.2287915374 |
| Short name | T979 |
| Test name | |
| Test status | |
| Simulation time | 2758187428 ps |
| CPU time | 86.26 seconds |
| Started | Sep 24 09:02:21 AM UTC 24 |
| Finished | Sep 24 09:03:49 AM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2287915374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_inter_pkt_delay.2287915374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_in_transaction.4025146222 |
| Short name | T886 |
| Test name | |
| Test status | |
| Simulation time | 248923407 ps |
| CPU time | 1.9 seconds |
| Started | Sep 24 09:02:21 AM UTC 24 |
| Finished | Sep 24 09:02:24 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4025146222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_in_transaction.4025146222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_out_transaction.2960402878 |
| Short name | T885 |
| Test name | |
| Test status | |
| Simulation time | 202723587 ps |
| CPU time | 1.79 seconds |
| Started | Sep 24 09:02:21 AM UTC 24 |
| Finished | Sep 24 09:02:24 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2960402878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_out_transaction.2960402878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_max_non_iso_usb_traffic.4037397633 |
| Short name | T937 |
| Test name | |
| Test status | |
| Simulation time | 3897528553 ps |
| CPU time | 46.04 seconds |
| Started | Sep 24 09:02:22 AM UTC 24 |
| Finished | Sep 24 09:03:10 AM UTC 24 |
| Peak memory | 235244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4037397633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_non_iso_usb_traffic.4037397633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_max_usb_traffic.3204826174 |
| Short name | T917 |
| Test name | |
| Test status | |
| Simulation time | 1864154086 ps |
| CPU time | 27.66 seconds |
| Started | Sep 24 09:02:22 AM UTC 24 |
| Finished | Sep 24 09:02:51 AM UTC 24 |
| Peak memory | 234960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3204826174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_usb_traffic.3204826174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_min_inter_pkt_delay.3976544421 |
| Short name | T914 |
| Test name | |
| Test status | |
| Simulation time | 2141155860 ps |
| CPU time | 23.83 seconds |
| Started | Sep 24 09:02:25 AM UTC 24 |
| Finished | Sep 24 09:02:50 AM UTC 24 |
| Peak memory | 234980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3976544421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_inter_pkt_delay.3976544421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_in_transaction.486175423 |
| Short name | T888 |
| Test name | |
| Test status | |
| Simulation time | 162362893 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:02:25 AM UTC 24 |
| Finished | Sep 24 09:02:27 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=486175423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_in_transaction.486175423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_out_transaction.2259870762 |
| Short name | T890 |
| Test name | |
| Test status | |
| Simulation time | 162965301 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:02:26 AM UTC 24 |
| Finished | Sep 24 09:02:29 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2259870762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_out_transaction.2259870762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_nak_trans.2673415786 |
| Short name | T130 |
| Test name | |
| Test status | |
| Simulation time | 256335790 ps |
| CPU time | 1.93 seconds |
| Started | Sep 24 09:02:28 AM UTC 24 |
| Finished | Sep 24 09:02:31 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2673415786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_nak_trans.2673415786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_out_iso.2589537286 |
| Short name | T893 |
| Test name | |
| Test status | |
| Simulation time | 163414723 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:02:30 AM UTC 24 |
| Finished | Sep 24 09:02:32 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2589537286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_out_iso.2589537286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_out_stall.4102399758 |
| Short name | T892 |
| Test name | |
| Test status | |
| Simulation time | 177499768 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:02:30 AM UTC 24 |
| Finished | Sep 24 09:02:32 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4102399758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_out_stall.4102399758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_out_trans_nak.2806082023 |
| Short name | T894 |
| Test name | |
| Test status | |
| Simulation time | 149921227 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:02:30 AM UTC 24 |
| Finished | Sep 24 09:02:32 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2806082023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_out_trans_nak.2806082023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_pending_in_trans.3715355812 |
| Short name | T188 |
| Test name | |
| Test status | |
| Simulation time | 161427503 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:02:31 AM UTC 24 |
| Finished | Sep 24 09:02:34 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3715355812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_pending_in_trans.3715355812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_pinflip.1034342152 |
| Short name | T897 |
| Test name | |
| Test status | |
| Simulation time | 306400944 ps |
| CPU time | 1.89 seconds |
| Started | Sep 24 09:02:31 AM UTC 24 |
| Finished | Sep 24 09:02:34 AM UTC 24 |
| Peak memory | 215812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1034342152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_pinflip.1034342152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_usb_ref_disable.967531356 |
| Short name | T898 |
| Test name | |
| Test status | |
| Simulation time | 192261939 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 09:02:33 AM UTC 24 |
| Finished | Sep 24 09:02:36 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=967531356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 7.usbdev_phy_config_usb_ref_disable.967531356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_phy_pins_sense.3854099824 |
| Short name | T46 |
| Test name | |
| Test status | |
| Simulation time | 34851815 ps |
| CPU time | 1.12 seconds |
| Started | Sep 24 09:02:33 AM UTC 24 |
| Finished | Sep 24 09:02:35 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3854099824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_pins_sense.3854099824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_buffer.3676510452 |
| Short name | T261 |
| Test name | |
| Test status | |
| Simulation time | 22256950498 ps |
| CPU time | 82.68 seconds |
| Started | Sep 24 09:02:33 AM UTC 24 |
| Finished | Sep 24 09:03:58 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3676510452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_pkt_buffer.3676510452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_received.311227268 |
| Short name | T899 |
| Test name | |
| Test status | |
| Simulation time | 218232437 ps |
| CPU time | 1.76 seconds |
| Started | Sep 24 09:02:33 AM UTC 24 |
| Finished | Sep 24 09:02:36 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=311227268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_pkt_received.311227268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_sent.3282292104 |
| Short name | T904 |
| Test name | |
| Test status | |
| Simulation time | 217204210 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 09:02:36 AM UTC 24 |
| Finished | Sep 24 09:02:38 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3282292104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_pkt_sent.3282292104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_disconnects.3045652547 |
| Short name | T990 |
| Test name | |
| Test status | |
| Simulation time | 3402864384 ps |
| CPU time | 83.57 seconds |
| Started | Sep 24 09:02:36 AM UTC 24 |
| Finished | Sep 24 09:04:01 AM UTC 24 |
| Peak memory | 230380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3045652547 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_disconnects.3045652547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_resets.1939877813 |
| Short name | T173 |
| Test name | |
| Test status | |
| Simulation time | 7466647657 ps |
| CPU time | 124.39 seconds |
| Started | Sep 24 09:02:36 AM UTC 24 |
| Finished | Sep 24 09:04:43 AM UTC 24 |
| Peak memory | 235044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1939877813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_resets.1939877813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_rand_suspends.3670890324 |
| Short name | T930 |
| Test name | |
| Test status | |
| Simulation time | 5487602292 ps |
| CPU time | 28.16 seconds |
| Started | Sep 24 09:02:36 AM UTC 24 |
| Finished | Sep 24 09:03:06 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3670890324 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_suspends.3670890324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_in_transaction.944956847 |
| Short name | T903 |
| Test name | |
| Test status | |
| Simulation time | 212192079 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:02:36 AM UTC 24 |
| Finished | Sep 24 09:02:38 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=944956847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_random_length_in_transaction.944956847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_out_transaction.1780336269 |
| Short name | T902 |
| Test name | |
| Test status | |
| Simulation time | 171866359 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 09:02:36 AM UTC 24 |
| Finished | Sep 24 09:02:38 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1780336269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_random_length_out_transaction.1780336269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_resume_link_active.3223118319 |
| Short name | T953 |
| Test name | |
| Test status | |
| Simulation time | 20157499000 ps |
| CPU time | 40.5 seconds |
| Started | Sep 24 09:02:37 AM UTC 24 |
| Finished | Sep 24 09:03:19 AM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3223118319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 7.usbdev_resume_link_active.3223118319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_rx_crc_err.3855368981 |
| Short name | T905 |
| Test name | |
| Test status | |
| Simulation time | 188570786 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 09:02:37 AM UTC 24 |
| Finished | Sep 24 09:02:40 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3855368981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_rx_crc_err.3855368981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_rx_full.974325092 |
| Short name | T61 |
| Test name | |
| Test status | |
| Simulation time | 247656564 ps |
| CPU time | 1.81 seconds |
| Started | Sep 24 09:02:40 AM UTC 24 |
| Finished | Sep 24 09:02:42 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=974325092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 7.usbdev_rx_full.974325092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_setup_stage.175205582 |
| Short name | T907 |
| Test name | |
| Test status | |
| Simulation time | 155586551 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 09:02:40 AM UTC 24 |
| Finished | Sep 24 09:02:42 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=175205582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_setup_stage.175205582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_setup_trans_ignored.1946877026 |
| Short name | T906 |
| Test name | |
| Test status | |
| Simulation time | 164699595 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:02:40 AM UTC 24 |
| Finished | Sep 24 09:02:42 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1946877026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 7.usbdev_setup_trans_ignored.1946877026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_smoke.1132332362 |
| Short name | T908 |
| Test name | |
| Test status | |
| Simulation time | 248643497 ps |
| CPU time | 2.16 seconds |
| Started | Sep 24 09:02:40 AM UTC 24 |
| Finished | Sep 24 09:02:43 AM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1132332362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_smoke.1132332362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_spurious_pids_ignored.3953663400 |
| Short name | T942 |
| Test name | |
| Test status | |
| Simulation time | 2398323045 ps |
| CPU time | 31 seconds |
| Started | Sep 24 09:02:40 AM UTC 24 |
| Finished | Sep 24 09:03:12 AM UTC 24 |
| Peak memory | 230732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3953663400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_spurious_pids_ignored.3953663400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_stall_priority_over_nak.1887954858 |
| Short name | T909 |
| Test name | |
| Test status | |
| Simulation time | 187983760 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:02:41 AM UTC 24 |
| Finished | Sep 24 09:02:44 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1887954858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stall_priority_over_nak.1887954858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_stall_trans.954511546 |
| Short name | T911 |
| Test name | |
| Test status | |
| Simulation time | 176046625 ps |
| CPU time | 1.89 seconds |
| Started | Sep 24 09:02:44 AM UTC 24 |
| Finished | Sep 24 09:02:47 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=954511546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_stall_trans.954511546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_stream_len_max.3715920868 |
| Short name | T913 |
| Test name | |
| Test status | |
| Simulation time | 872881798 ps |
| CPU time | 4.1 seconds |
| Started | Sep 24 09:02:44 AM UTC 24 |
| Finished | Sep 24 09:02:49 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3715920868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stream_len_max.3715920868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_streaming_out.3710532479 |
| Short name | T1039 |
| Test name | |
| Test status | |
| Simulation time | 4075832919 ps |
| CPU time | 115.13 seconds |
| Started | Sep 24 09:02:44 AM UTC 24 |
| Finished | Sep 24 09:04:41 AM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3710532479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_streaming_out.3710532479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_stress_usb_traffic.3904823799 |
| Short name | T117 |
| Test name | |
| Test status | |
| Simulation time | 9807999614 ps |
| CPU time | 109.28 seconds |
| Started | Sep 24 09:02:45 AM UTC 24 |
| Finished | Sep 24 09:04:37 AM UTC 24 |
| Peak memory | 234960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3904823799 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stress_usb_traffic.3904823799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_timeout_missing_host_handshake.1259043459 |
| Short name | T876 |
| Test name | |
| Test status | |
| Simulation time | 291683262 ps |
| CPU time | 6.19 seconds |
| Started | Sep 24 09:02:10 AM UTC 24 |
| Finished | Sep 24 09:02:17 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1259043459 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_timeout_missing_host_handshake.1259043459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/7.usbdev_tx_rx_disruption.94741191 |
| Short name | T214 |
| Test name | |
| Test status | |
| Simulation time | 558473877 ps |
| CPU time | 3.54 seconds |
| Started | Sep 24 09:02:47 AM UTC 24 |
| Finished | Sep 24 09:02:51 AM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=94741191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_tx_r x_disruption.94741191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/7.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/70.usbdev_endpoint_types.4175264904 |
| Short name | T520 |
| Test name | |
| Test status | |
| Simulation time | 428861178 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:50 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4175264904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_endpoint_types.4175264904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/70.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/70.usbdev_tx_rx_disruption.728907456 |
| Short name | T3279 |
| Test name | |
| Test status | |
| Simulation time | 563020703 ps |
| CPU time | 2.11 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:51 AM UTC 24 |
| Peak memory | 217896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=728907456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_tx _rx_disruption.728907456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/70.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/71.usbdev_endpoint_types.3565866331 |
| Short name | T3268 |
| Test name | |
| Test status | |
| Simulation time | 220081571 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:50 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3565866331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_endpoint_types.3565866331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/71.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/71.usbdev_fifo_levels.15007802 |
| Short name | T3265 |
| Test name | |
| Test status | |
| Simulation time | 184731341 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:50 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=15007802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 71.usbdev_fifo_levels.15007802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/71.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.3298622804 |
| Short name | T3276 |
| Test name | |
| Test status | |
| Simulation time | 647385381 ps |
| CPU time | 1.83 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:51 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3298622804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_t x_rx_disruption.3298622804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/71.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/72.usbdev_endpoint_types.2530167238 |
| Short name | T573 |
| Test name | |
| Test status | |
| Simulation time | 229511556 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:50 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2530167238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_endpoint_types.2530167238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/72.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.2158210416 |
| Short name | T3281 |
| Test name | |
| Test status | |
| Simulation time | 598970127 ps |
| CPU time | 1.85 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:51 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2158210416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_t x_rx_disruption.2158210416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/72.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.1508102444 |
| Short name | T3270 |
| Test name | |
| Test status | |
| Simulation time | 154719602 ps |
| CPU time | 1.05 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:50 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1508102444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_endpoint_types.1508102444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/73.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/73.usbdev_fifo_levels.1908452709 |
| Short name | T3271 |
| Test name | |
| Test status | |
| Simulation time | 290610941 ps |
| CPU time | 1.13 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:50 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1908452709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 73.usbdev_fifo_levels.1908452709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/73.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.3215028152 |
| Short name | T3280 |
| Test name | |
| Test status | |
| Simulation time | 484000736 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:51 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3215028152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_t x_rx_disruption.3215028152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/73.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/74.usbdev_fifo_levels.468428492 |
| Short name | T397 |
| Test name | |
| Test status | |
| Simulation time | 148658268 ps |
| CPU time | 0.88 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:50 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=468428492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 74.usbdev_fifo_levels.468428492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/74.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.1560968783 |
| Short name | T3285 |
| Test name | |
| Test status | |
| Simulation time | 630596373 ps |
| CPU time | 1.96 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:51 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1560968783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_t x_rx_disruption.1560968783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/74.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.3998515902 |
| Short name | T3284 |
| Test name | |
| Test status | |
| Simulation time | 615279793 ps |
| CPU time | 1.87 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:51 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3998515902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_t x_rx_disruption.3998515902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/75.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.3136029068 |
| Short name | T524 |
| Test name | |
| Test status | |
| Simulation time | 728439185 ps |
| CPU time | 2.11 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:52 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3136029068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_endpoint_types.3136029068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/76.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/76.usbdev_fifo_levels.2562094010 |
| Short name | T3272 |
| Test name | |
| Test status | |
| Simulation time | 161550778 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:50 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2562094010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 76.usbdev_fifo_levels.2562094010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/76.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.1825449492 |
| Short name | T3283 |
| Test name | |
| Test status | |
| Simulation time | 605096402 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:51 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1825449492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_t x_rx_disruption.1825449492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/76.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.3936728344 |
| Short name | T3286 |
| Test name | |
| Test status | |
| Simulation time | 664794982 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:51 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3936728344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_endpoint_types.3936728344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/77.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/77.usbdev_fifo_levels.1386309851 |
| Short name | T3277 |
| Test name | |
| Test status | |
| Simulation time | 150592985 ps |
| CPU time | 1 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:51 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1386309851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 77.usbdev_fifo_levels.1386309851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/77.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.3558936276 |
| Short name | T3287 |
| Test name | |
| Test status | |
| Simulation time | 605996669 ps |
| CPU time | 1.85 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:52 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3558936276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_t x_rx_disruption.3558936276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/77.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.2657779893 |
| Short name | T3278 |
| Test name | |
| Test status | |
| Simulation time | 214563777 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:51 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2657779893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_endpoint_types.2657779893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/78.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/78.usbdev_fifo_levels.756415549 |
| Short name | T3275 |
| Test name | |
| Test status | |
| Simulation time | 153283722 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:35:48 AM UTC 24 |
| Finished | Sep 24 09:35:51 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=756415549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 78.usbdev_fifo_levels.756415549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/78.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.1696667698 |
| Short name | T3289 |
| Test name | |
| Test status | |
| Simulation time | 481197646 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 09:35:49 AM UTC 24 |
| Finished | Sep 24 09:35:52 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1696667698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_t x_rx_disruption.1696667698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/78.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.3008464279 |
| Short name | T514 |
| Test name | |
| Test status | |
| Simulation time | 352661219 ps |
| CPU time | 1.34 seconds |
| Started | Sep 24 09:35:49 AM UTC 24 |
| Finished | Sep 24 09:35:51 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3008464279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_endpoint_types.3008464279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/79.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/79.usbdev_fifo_levels.3556544935 |
| Short name | T332 |
| Test name | |
| Test status | |
| Simulation time | 297580321 ps |
| CPU time | 1.16 seconds |
| Started | Sep 24 09:35:49 AM UTC 24 |
| Finished | Sep 24 09:35:51 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3556544935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 79.usbdev_fifo_levels.3556544935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/79.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.2378501297 |
| Short name | T3288 |
| Test name | |
| Test status | |
| Simulation time | 554007120 ps |
| CPU time | 1.58 seconds |
| Started | Sep 24 09:35:49 AM UTC 24 |
| Finished | Sep 24 09:35:52 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2378501297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_t x_rx_disruption.2378501297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/79.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_alert_test.1259838715 |
| Short name | T968 |
| Test name | |
| Test status | |
| Simulation time | 54398621 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:03:33 AM UTC 24 |
| Finished | Sep 24 09:03:35 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1259838715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 8.usbdev_alert_test.1259838715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_disconnect.1807827062 |
| Short name | T936 |
| Test name | |
| Test status | |
| Simulation time | 9037852531 ps |
| CPU time | 16.44 seconds |
| Started | Sep 24 09:02:50 AM UTC 24 |
| Finished | Sep 24 09:03:08 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1807827062 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_disconnect.1807827062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_reset.294354375 |
| Short name | T967 |
| Test name | |
| Test status | |
| Simulation time | 21406527425 ps |
| CPU time | 41.69 seconds |
| Started | Sep 24 09:02:52 AM UTC 24 |
| Finished | Sep 24 09:03:35 AM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=294354375 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_reset.294354375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_resume.3180119059 |
| Short name | T998 |
| Test name | |
| Test status | |
| Simulation time | 30992472619 ps |
| CPU time | 75.72 seconds |
| Started | Sep 24 09:02:52 AM UTC 24 |
| Finished | Sep 24 09:04:09 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3180119059 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_resume.3180119059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_av_buffer.1861123637 |
| Short name | T912 |
| Test name | |
| Test status | |
| Simulation time | 227555851 ps |
| CPU time | 1.75 seconds |
| Started | Sep 24 09:02:52 AM UTC 24 |
| Finished | Sep 24 09:02:55 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1861123637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_av_buffer.1861123637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_bitstuff_err.371139511 |
| Short name | T863 |
| Test name | |
| Test status | |
| Simulation time | 148249557 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 09:02:52 AM UTC 24 |
| Finished | Sep 24 09:02:54 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=371139511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_bitstuff_err.371139511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_clear.3132490057 |
| Short name | T919 |
| Test name | |
| Test status | |
| Simulation time | 275765366 ps |
| CPU time | 1.99 seconds |
| Started | Sep 24 09:02:54 AM UTC 24 |
| Finished | Sep 24 09:02:57 AM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3132490057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 8.usbdev_data_toggle_clear.3132490057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_restore.2100024861 |
| Short name | T921 |
| Test name | |
| Test status | |
| Simulation time | 310405100 ps |
| CPU time | 2.22 seconds |
| Started | Sep 24 09:02:54 AM UTC 24 |
| Finished | Sep 24 09:02:57 AM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2100024861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_data_toggle_restore.2100024861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_device_address.3773473548 |
| Short name | T437 |
| Test name | |
| Test status | |
| Simulation time | 45181519728 ps |
| CPU time | 96.03 seconds |
| Started | Sep 24 09:02:56 AM UTC 24 |
| Finished | Sep 24 09:04:34 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3773473548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_address.3773473548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_device_timeout.372210994 |
| Short name | T947 |
| Test name | |
| Test status | |
| Simulation time | 2227757508 ps |
| CPU time | 19.01 seconds |
| Started | Sep 24 09:02:56 AM UTC 24 |
| Finished | Sep 24 09:03:16 AM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=372210994 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_timeout.372210994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_disable_endpoint.790297222 |
| Short name | T922 |
| Test name | |
| Test status | |
| Simulation time | 810484156 ps |
| CPU time | 2.21 seconds |
| Started | Sep 24 09:02:56 AM UTC 24 |
| Finished | Sep 24 09:02:59 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=790297222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_disable_endpoint.790297222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_disconnected.159097646 |
| Short name | T925 |
| Test name | |
| Test status | |
| Simulation time | 164484756 ps |
| CPU time | 1.63 seconds |
| Started | Sep 24 09:02:58 AM UTC 24 |
| Finished | Sep 24 09:03:00 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=159097646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_disconnected.159097646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_enable.1675694288 |
| Short name | T924 |
| Test name | |
| Test status | |
| Simulation time | 70118375 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:02:58 AM UTC 24 |
| Finished | Sep 24 09:03:00 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1675694288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 8.usbdev_enable.1675694288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_access.653106730 |
| Short name | T928 |
| Test name | |
| Test status | |
| Simulation time | 968813715 ps |
| CPU time | 4.98 seconds |
| Started | Sep 24 09:02:58 AM UTC 24 |
| Finished | Sep 24 09:03:04 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=653106730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_access.653106730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_types.14002140 |
| Short name | T585 |
| Test name | |
| Test status | |
| Simulation time | 188446870 ps |
| CPU time | 1.8 seconds |
| Started | Sep 24 09:03:00 AM UTC 24 |
| Finished | Sep 24 09:03:02 AM UTC 24 |
| Peak memory | 215920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=14002140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_types.14002140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_levels.2079469100 |
| Short name | T329 |
| Test name | |
| Test status | |
| Simulation time | 265858276 ps |
| CPU time | 2.32 seconds |
| Started | Sep 24 09:03:02 AM UTC 24 |
| Finished | Sep 24 09:03:05 AM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2079469100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_fifo_levels.2079469100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_rst.2244966609 |
| Short name | T931 |
| Test name | |
| Test status | |
| Simulation time | 445074143 ps |
| CPU time | 3.39 seconds |
| Started | Sep 24 09:03:02 AM UTC 24 |
| Finished | Sep 24 09:03:06 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2244966609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_fifo_rst.2244966609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_in_iso.1437563568 |
| Short name | T929 |
| Test name | |
| Test status | |
| Simulation time | 207091607 ps |
| CPU time | 1.82 seconds |
| Started | Sep 24 09:03:02 AM UTC 24 |
| Finished | Sep 24 09:03:05 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1437563568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_in_iso.1437563568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_in_stall.6800311 |
| Short name | T932 |
| Test name | |
| Test status | |
| Simulation time | 160293945 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:03:04 AM UTC 24 |
| Finished | Sep 24 09:03:07 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=6800311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_in_stall.6800311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_in_trans.3196333208 |
| Short name | T935 |
| Test name | |
| Test status | |
| Simulation time | 247705208 ps |
| CPU time | 1.98 seconds |
| Started | Sep 24 09:03:04 AM UTC 24 |
| Finished | Sep 24 09:03:07 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3196333208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_trans.3196333208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_invalid_sync.516687351 |
| Short name | T1114 |
| Test name | |
| Test status | |
| Simulation time | 4908021817 ps |
| CPU time | 149.64 seconds |
| Started | Sep 24 09:03:02 AM UTC 24 |
| Finished | Sep 24 09:05:35 AM UTC 24 |
| Peak memory | 235084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=516687351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_invalid_sync.516687351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_iso_retraction.3575967035 |
| Short name | T1008 |
| Test name | |
| Test status | |
| Simulation time | 4098286073 ps |
| CPU time | 69.36 seconds |
| Started | Sep 24 09:03:04 AM UTC 24 |
| Finished | Sep 24 09:04:16 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3575967035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_iso_retraction.3575967035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_link_in_err.3228366482 |
| Short name | T933 |
| Test name | |
| Test status | |
| Simulation time | 241704920 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:03:04 AM UTC 24 |
| Finished | Sep 24 09:03:07 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3228366482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_in_err.3228366482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_link_resume.2764617754 |
| Short name | T102 |
| Test name | |
| Test status | |
| Simulation time | 23008186868 ps |
| CPU time | 38.36 seconds |
| Started | Sep 24 09:03:07 AM UTC 24 |
| Finished | Sep 24 09:03:47 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2764617754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_resume.2764617754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_link_suspend.985457976 |
| Short name | T950 |
| Test name | |
| Test status | |
| Simulation time | 3496102917 ps |
| CPU time | 10.2 seconds |
| Started | Sep 24 09:03:07 AM UTC 24 |
| Finished | Sep 24 09:03:19 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=985457976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_suspend.985457976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_low_speed_traffic.1488059394 |
| Short name | T1032 |
| Test name | |
| Test status | |
| Simulation time | 3276355593 ps |
| CPU time | 102.06 seconds |
| Started | Sep 24 09:03:07 AM UTC 24 |
| Finished | Sep 24 09:04:51 AM UTC 24 |
| Peak memory | 228392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1488059394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_low_speed_traffic.1488059394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_max_inter_pkt_delay.2321584942 |
| Short name | T1077 |
| Test name | |
| Test status | |
| Simulation time | 3688163292 ps |
| CPU time | 118.95 seconds |
| Started | Sep 24 09:03:07 AM UTC 24 |
| Finished | Sep 24 09:05:09 AM UTC 24 |
| Peak memory | 228680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2321584942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_inter_pkt_delay.2321584942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_in_transaction.2030978535 |
| Short name | T938 |
| Test name | |
| Test status | |
| Simulation time | 236508101 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:03:07 AM UTC 24 |
| Finished | Sep 24 09:03:10 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2030978535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_in_transaction.2030978535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_out_transaction.3752156542 |
| Short name | T939 |
| Test name | |
| Test status | |
| Simulation time | 198389582 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:03:07 AM UTC 24 |
| Finished | Sep 24 09:03:10 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3752156542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_out_transaction.3752156542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_max_non_iso_usb_traffic.1870129696 |
| Short name | T1006 |
| Test name | |
| Test status | |
| Simulation time | 2269351324 ps |
| CPU time | 65.6 seconds |
| Started | Sep 24 09:03:07 AM UTC 24 |
| Finished | Sep 24 09:04:15 AM UTC 24 |
| Peak memory | 230472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1870129696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_non_iso_usb_traffic.1870129696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_max_usb_traffic.4086708381 |
| Short name | T1007 |
| Test name | |
| Test status | |
| Simulation time | 2219057352 ps |
| CPU time | 65.77 seconds |
| Started | Sep 24 09:03:07 AM UTC 24 |
| Finished | Sep 24 09:04:15 AM UTC 24 |
| Peak memory | 230468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4086708381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_usb_traffic.4086708381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_min_inter_pkt_delay.1683570379 |
| Short name | T996 |
| Test name | |
| Test status | |
| Simulation time | 2121336431 ps |
| CPU time | 58.23 seconds |
| Started | Sep 24 09:03:09 AM UTC 24 |
| Finished | Sep 24 09:04:09 AM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1683570379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_inter_pkt_delay.1683570379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_in_transaction.3385886673 |
| Short name | T941 |
| Test name | |
| Test status | |
| Simulation time | 193746224 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:03:09 AM UTC 24 |
| Finished | Sep 24 09:03:12 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3385886673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_in_transaction.3385886673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_out_transaction.1768077671 |
| Short name | T940 |
| Test name | |
| Test status | |
| Simulation time | 142560031 ps |
| CPU time | 1.37 seconds |
| Started | Sep 24 09:03:09 AM UTC 24 |
| Finished | Sep 24 09:03:12 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1768077671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_out_transaction.1768077671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_nak_trans.4255609147 |
| Short name | T144 |
| Test name | |
| Test status | |
| Simulation time | 204936444 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:03:09 AM UTC 24 |
| Finished | Sep 24 09:03:12 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4255609147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_nak_trans.4255609147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_out_iso.3240860503 |
| Short name | T944 |
| Test name | |
| Test status | |
| Simulation time | 180975005 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:03:11 AM UTC 24 |
| Finished | Sep 24 09:03:14 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3240860503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_out_iso.3240860503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_out_stall.2079180804 |
| Short name | T943 |
| Test name | |
| Test status | |
| Simulation time | 208867984 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:03:11 AM UTC 24 |
| Finished | Sep 24 09:03:14 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2079180804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_out_stall.2079180804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_out_trans_nak.1194297296 |
| Short name | T439 |
| Test name | |
| Test status | |
| Simulation time | 177781611 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 09:03:11 AM UTC 24 |
| Finished | Sep 24 09:03:14 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194297296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_out_trans_nak.1194297296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_pending_in_trans.3978833120 |
| Short name | T945 |
| Test name | |
| Test status | |
| Simulation time | 153924914 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:03:13 AM UTC 24 |
| Finished | Sep 24 09:03:15 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3978833120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_pending_in_trans.3978833120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_pinflip.1320957759 |
| Short name | T946 |
| Test name | |
| Test status | |
| Simulation time | 229641858 ps |
| CPU time | 1.88 seconds |
| Started | Sep 24 09:03:13 AM UTC 24 |
| Finished | Sep 24 09:03:16 AM UTC 24 |
| Peak memory | 215812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1320957759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_pinflip.1320957759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_usb_ref_disable.1892111599 |
| Short name | T949 |
| Test name | |
| Test status | |
| Simulation time | 178271966 ps |
| CPU time | 1.66 seconds |
| Started | Sep 24 09:03:14 AM UTC 24 |
| Finished | Sep 24 09:03:17 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1892111599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_usb_ref_disable.1892111599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_phy_pins_sense.2647301960 |
| Short name | T948 |
| Test name | |
| Test status | |
| Simulation time | 53723029 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:03:14 AM UTC 24 |
| Finished | Sep 24 09:03:16 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2647301960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_pins_sense.2647301960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_buffer.699745260 |
| Short name | T260 |
| Test name | |
| Test status | |
| Simulation time | 5837873708 ps |
| CPU time | 26.65 seconds |
| Started | Sep 24 09:03:16 AM UTC 24 |
| Finished | Sep 24 09:03:44 AM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=699745260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_pkt_buffer.699745260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_received.1912725340 |
| Short name | T951 |
| Test name | |
| Test status | |
| Simulation time | 162079755 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:03:16 AM UTC 24 |
| Finished | Sep 24 09:03:19 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1912725340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_pkt_received.1912725340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_sent.3396219221 |
| Short name | T952 |
| Test name | |
| Test status | |
| Simulation time | 235697347 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 09:03:16 AM UTC 24 |
| Finished | Sep 24 09:03:19 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3396219221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_pkt_sent.3396219221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_disconnects.2809045937 |
| Short name | T1072 |
| Test name | |
| Test status | |
| Simulation time | 4485849832 ps |
| CPU time | 105.14 seconds |
| Started | Sep 24 09:03:18 AM UTC 24 |
| Finished | Sep 24 09:05:06 AM UTC 24 |
| Peak memory | 230396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2809045937 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_disconnects.2809045937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_rand_suspends.502760934 |
| Short name | T1030 |
| Test name | |
| Test status | |
| Simulation time | 5424174849 ps |
| CPU time | 73.13 seconds |
| Started | Sep 24 09:03:18 AM UTC 24 |
| Finished | Sep 24 09:04:34 AM UTC 24 |
| Peak memory | 235140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=502760934 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_suspends.502760934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_in_transaction.3836675147 |
| Short name | T954 |
| Test name | |
| Test status | |
| Simulation time | 199727512 ps |
| CPU time | 1.82 seconds |
| Started | Sep 24 09:03:16 AM UTC 24 |
| Finished | Sep 24 09:03:19 AM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3836675147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_random_length_in_transaction.3836675147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_out_transaction.3768913987 |
| Short name | T955 |
| Test name | |
| Test status | |
| Simulation time | 181400500 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:03:18 AM UTC 24 |
| Finished | Sep 24 09:03:21 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3768913987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_random_length_out_transaction.3768913987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_resume_link_active.3657732678 |
| Short name | T985 |
| Test name | |
| Test status | |
| Simulation time | 20214297877 ps |
| CPU time | 34.96 seconds |
| Started | Sep 24 09:03:19 AM UTC 24 |
| Finished | Sep 24 09:03:56 AM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3657732678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 8.usbdev_resume_link_active.3657732678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_rx_crc_err.905282032 |
| Short name | T957 |
| Test name | |
| Test status | |
| Simulation time | 165150197 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:03:21 AM UTC 24 |
| Finished | Sep 24 09:03:24 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=905282032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_rx_crc_err.905282032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_rx_full.1868135425 |
| Short name | T347 |
| Test name | |
| Test status | |
| Simulation time | 278434034 ps |
| CPU time | 2.16 seconds |
| Started | Sep 24 09:03:21 AM UTC 24 |
| Finished | Sep 24 09:03:24 AM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1868135425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_rx_full.1868135425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_setup_stage.3708647172 |
| Short name | T956 |
| Test name | |
| Test status | |
| Simulation time | 159955467 ps |
| CPU time | 1.24 seconds |
| Started | Sep 24 09:03:21 AM UTC 24 |
| Finished | Sep 24 09:03:23 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3708647172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_setup_stage.3708647172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_setup_trans_ignored.3412673703 |
| Short name | T958 |
| Test name | |
| Test status | |
| Simulation time | 153211542 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:03:21 AM UTC 24 |
| Finished | Sep 24 09:03:24 AM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3412673703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 8.usbdev_setup_trans_ignored.3412673703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_smoke.1981730524 |
| Short name | T960 |
| Test name | |
| Test status | |
| Simulation time | 210476062 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:03:23 AM UTC 24 |
| Finished | Sep 24 09:03:25 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1981730524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_smoke.1981730524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_spurious_pids_ignored.3572793472 |
| Short name | T972 |
| Test name | |
| Test status | |
| Simulation time | 1743024706 ps |
| CPU time | 16.49 seconds |
| Started | Sep 24 09:03:24 AM UTC 24 |
| Finished | Sep 24 09:03:42 AM UTC 24 |
| Peak memory | 234764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3572793472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_spurious_pids_ignored.3572793472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_stall_priority_over_nak.3059359438 |
| Short name | T962 |
| Test name | |
| Test status | |
| Simulation time | 194183561 ps |
| CPU time | 1.6 seconds |
| Started | Sep 24 09:03:26 AM UTC 24 |
| Finished | Sep 24 09:03:29 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3059359438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stall_priority_over_nak.3059359438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_stall_trans.505762485 |
| Short name | T961 |
| Test name | |
| Test status | |
| Simulation time | 167851651 ps |
| CPU time | 1.35 seconds |
| Started | Sep 24 09:03:26 AM UTC 24 |
| Finished | Sep 24 09:03:28 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=505762485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_stall_trans.505762485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_stream_len_max.1914439908 |
| Short name | T963 |
| Test name | |
| Test status | |
| Simulation time | 1085096664 ps |
| CPU time | 4.72 seconds |
| Started | Sep 24 09:03:26 AM UTC 24 |
| Finished | Sep 24 09:03:32 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1914439908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stream_len_max.1914439908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_streaming_out.3976692313 |
| Short name | T982 |
| Test name | |
| Test status | |
| Simulation time | 2459203536 ps |
| CPU time | 26.06 seconds |
| Started | Sep 24 09:03:26 AM UTC 24 |
| Finished | Sep 24 09:03:53 AM UTC 24 |
| Peak memory | 230508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3976692313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_streaming_out.3976692313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_stress_usb_traffic.1700422323 |
| Short name | T1057 |
| Test name | |
| Test status | |
| Simulation time | 8083665215 ps |
| CPU time | 86.08 seconds |
| Started | Sep 24 09:03:29 AM UTC 24 |
| Finished | Sep 24 09:04:57 AM UTC 24 |
| Peak memory | 230472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1700422323 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stress_usb_traffic.1700422323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_timeout_missing_host_handshake.3780978941 |
| Short name | T927 |
| Test name | |
| Test status | |
| Simulation time | 313417718 ps |
| CPU time | 4.9 seconds |
| Started | Sep 24 09:02:56 AM UTC 24 |
| Finished | Sep 24 09:03:02 AM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3780978941 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_timeout_missing_host_handshake.3780978941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/8.usbdev_tx_rx_disruption.2075872430 |
| Short name | T964 |
| Test name | |
| Test status | |
| Simulation time | 502571199 ps |
| CPU time | 3.03 seconds |
| Started | Sep 24 09:03:29 AM UTC 24 |
| Finished | Sep 24 09:03:33 AM UTC 24 |
| Peak memory | 217896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2075872430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_tx _rx_disruption.2075872430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/8.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.1274431523 |
| Short name | T532 |
| Test name | |
| Test status | |
| Simulation time | 368463319 ps |
| CPU time | 1.21 seconds |
| Started | Sep 24 09:35:49 AM UTC 24 |
| Finished | Sep 24 09:35:51 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1274431523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_endpoint_types.1274431523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/80.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/80.usbdev_fifo_levels.2575766851 |
| Short name | T3282 |
| Test name | |
| Test status | |
| Simulation time | 249882584 ps |
| CPU time | 1.08 seconds |
| Started | Sep 24 09:35:49 AM UTC 24 |
| Finished | Sep 24 09:35:51 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2575766851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 80.usbdev_fifo_levels.2575766851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/80.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.1544149038 |
| Short name | T3290 |
| Test name | |
| Test status | |
| Simulation time | 494056553 ps |
| CPU time | 1.46 seconds |
| Started | Sep 24 09:35:51 AM UTC 24 |
| Finished | Sep 24 09:35:54 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1544149038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_t x_rx_disruption.1544149038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/80.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.360087483 |
| Short name | T587 |
| Test name | |
| Test status | |
| Simulation time | 183792986 ps |
| CPU time | 0.92 seconds |
| Started | Sep 24 09:36:37 AM UTC 24 |
| Finished | Sep 24 09:36:39 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=360087483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 81.usbdev_endpoint_types.360087483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/81.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/81.usbdev_fifo_levels.2475975826 |
| Short name | T3267 |
| Test name | |
| Test status | |
| Simulation time | 326818103 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:36:37 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2475975826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 81.usbdev_fifo_levels.2475975826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/81.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.3540760508 |
| Short name | T3299 |
| Test name | |
| Test status | |
| Simulation time | 516625498 ps |
| CPU time | 1.75 seconds |
| Started | Sep 24 09:36:37 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3540760508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_t x_rx_disruption.3540760508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/81.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.1396234455 |
| Short name | T483 |
| Test name | |
| Test status | |
| Simulation time | 232398737 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:36:37 AM UTC 24 |
| Finished | Sep 24 09:36:39 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1396234455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_endpoint_types.1396234455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/82.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/82.usbdev_fifo_levels.3483745455 |
| Short name | T3292 |
| Test name | |
| Test status | |
| Simulation time | 266485263 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:36:37 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3483745455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 82.usbdev_fifo_levels.3483745455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/82.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.3661732156 |
| Short name | T3294 |
| Test name | |
| Test status | |
| Simulation time | 486508002 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:36:37 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3661732156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_t x_rx_disruption.3661732156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/82.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/83.usbdev_fifo_levels.829385204 |
| Short name | T3291 |
| Test name | |
| Test status | |
| Simulation time | 257242002 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=829385204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 83.usbdev_fifo_levels.829385204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/83.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.3399641425 |
| Short name | T3293 |
| Test name | |
| Test status | |
| Simulation time | 507641252 ps |
| CPU time | 1.4 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3399641425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_t x_rx_disruption.3399641425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/83.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/84.usbdev_fifo_levels.3573651966 |
| Short name | T3227 |
| Test name | |
| Test status | |
| Simulation time | 291403910 ps |
| CPU time | 1.15 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3573651966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 84.usbdev_fifo_levels.3573651966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/84.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.2452831406 |
| Short name | T3296 |
| Test name | |
| Test status | |
| Simulation time | 565704727 ps |
| CPU time | 1.42 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2452831406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_t x_rx_disruption.2452831406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/84.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/85.usbdev_fifo_levels.1991117748 |
| Short name | T3298 |
| Test name | |
| Test status | |
| Simulation time | 272221242 ps |
| CPU time | 1.39 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1991117748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 85.usbdev_fifo_levels.1991117748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/85.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.1413334332 |
| Short name | T3302 |
| Test name | |
| Test status | |
| Simulation time | 559511146 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1413334332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_t x_rx_disruption.1413334332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/85.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.3586448650 |
| Short name | T539 |
| Test name | |
| Test status | |
| Simulation time | 534363434 ps |
| CPU time | 1.99 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:41 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3586448650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_endpoint_types.3586448650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/86.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/86.usbdev_fifo_levels.617174791 |
| Short name | T360 |
| Test name | |
| Test status | |
| Simulation time | 171593430 ps |
| CPU time | 0.87 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=617174791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 86.usbdev_fifo_levels.617174791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/86.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.727765889 |
| Short name | T3301 |
| Test name | |
| Test status | |
| Simulation time | 492885596 ps |
| CPU time | 1.43 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=727765889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_tx _rx_disruption.727765889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/86.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.3018927204 |
| Short name | T584 |
| Test name | |
| Test status | |
| Simulation time | 369951573 ps |
| CPU time | 1.5 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3018927204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_endpoint_types.3018927204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/87.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/87.usbdev_fifo_levels.3604659691 |
| Short name | T3274 |
| Test name | |
| Test status | |
| Simulation time | 238247599 ps |
| CPU time | 0.99 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3604659691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 87.usbdev_fifo_levels.3604659691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/87.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.3836571667 |
| Short name | T3305 |
| Test name | |
| Test status | |
| Simulation time | 564012833 ps |
| CPU time | 1.85 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:41 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3836571667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_t x_rx_disruption.3836571667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/87.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.3922599846 |
| Short name | T594 |
| Test name | |
| Test status | |
| Simulation time | 207687628 ps |
| CPU time | 1.29 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3922599846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_endpoint_types.3922599846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/88.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/88.usbdev_fifo_levels.2270344567 |
| Short name | T3295 |
| Test name | |
| Test status | |
| Simulation time | 146398866 ps |
| CPU time | 1.05 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2270344567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 88.usbdev_fifo_levels.2270344567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/88.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.2251265328 |
| Short name | T3306 |
| Test name | |
| Test status | |
| Simulation time | 483015233 ps |
| CPU time | 1.68 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:41 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2251265328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_t x_rx_disruption.2251265328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/88.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.3871642419 |
| Short name | T3303 |
| Test name | |
| Test status | |
| Simulation time | 331805348 ps |
| CPU time | 1.47 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:41 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3871642419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_endpoint_types.3871642419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/89.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/89.usbdev_fifo_levels.3896803464 |
| Short name | T372 |
| Test name | |
| Test status | |
| Simulation time | 272264315 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:41 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3896803464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 89.usbdev_fifo_levels.3896803464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/89.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.4231011766 |
| Short name | T3309 |
| Test name | |
| Test status | |
| Simulation time | 565145281 ps |
| CPU time | 2.1 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:41 AM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4231011766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_t x_rx_disruption.4231011766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/89.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_alert_test.3698599654 |
| Short name | T1022 |
| Test name | |
| Test status | |
| Simulation time | 37701344 ps |
| CPU time | 1.06 seconds |
| Started | Sep 24 09:04:24 AM UTC 24 |
| Finished | Sep 24 09:04:26 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3698599654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 9.usbdev_alert_test.3698599654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_disconnect.4199928975 |
| Short name | T983 |
| Test name | |
| Test status | |
| Simulation time | 9431356381 ps |
| CPU time | 17.55 seconds |
| Started | Sep 24 09:03:34 AM UTC 24 |
| Finished | Sep 24 09:03:53 AM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4199928975 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_disconnect.4199928975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_reset.4266096061 |
| Short name | T993 |
| Test name | |
| Test status | |
| Simulation time | 14743368951 ps |
| CPU time | 28.85 seconds |
| Started | Sep 24 09:03:35 AM UTC 24 |
| Finished | Sep 24 09:04:06 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4266096061 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_reset.4266096061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_resume.1686779819 |
| Short name | T1029 |
| Test name | |
| Test status | |
| Simulation time | 31334829226 ps |
| CPU time | 54.32 seconds |
| Started | Sep 24 09:03:37 AM UTC 24 |
| Finished | Sep 24 09:04:33 AM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1686779819 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_resume.1686779819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_av_buffer.653806924 |
| Short name | T970 |
| Test name | |
| Test status | |
| Simulation time | 158846199 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:03:37 AM UTC 24 |
| Finished | Sep 24 09:03:40 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=653806924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_av_buffer.653806924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_bitstuff_err.1452323305 |
| Short name | T971 |
| Test name | |
| Test status | |
| Simulation time | 148410625 ps |
| CPU time | 1.56 seconds |
| Started | Sep 24 09:03:37 AM UTC 24 |
| Finished | Sep 24 09:03:40 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1452323305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_bitstuff_err.1452323305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_clear.4217969521 |
| Short name | T973 |
| Test name | |
| Test status | |
| Simulation time | 331241179 ps |
| CPU time | 2.29 seconds |
| Started | Sep 24 09:03:39 AM UTC 24 |
| Finished | Sep 24 09:03:43 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4217969521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 9.usbdev_data_toggle_clear.4217969521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_restore.2258357412 |
| Short name | T975 |
| Test name | |
| Test status | |
| Simulation time | 332041528 ps |
| CPU time | 2.24 seconds |
| Started | Sep 24 09:03:42 AM UTC 24 |
| Finished | Sep 24 09:03:45 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2258357412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_data_toggle_restore.2258357412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_device_timeout.903286716 |
| Short name | T974 |
| Test name | |
| Test status | |
| Simulation time | 145513869 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:03:42 AM UTC 24 |
| Finished | Sep 24 09:03:45 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=903286716 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_timeout.903286716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_disable_endpoint.339310200 |
| Short name | T977 |
| Test name | |
| Test status | |
| Simulation time | 611759270 ps |
| CPU time | 2.78 seconds |
| Started | Sep 24 09:03:44 AM UTC 24 |
| Finished | Sep 24 09:03:47 AM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=339310200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_disable_endpoint.339310200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_disconnected.3124264215 |
| Short name | T978 |
| Test name | |
| Test status | |
| Simulation time | 140115294 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:03:45 AM UTC 24 |
| Finished | Sep 24 09:03:48 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3124264215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_disconnected.3124264215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_enable.3479392403 |
| Short name | T976 |
| Test name | |
| Test status | |
| Simulation time | 42073340 ps |
| CPU time | 1.19 seconds |
| Started | Sep 24 09:03:45 AM UTC 24 |
| Finished | Sep 24 09:03:47 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3479392403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 9.usbdev_enable.3479392403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_access.2055727025 |
| Short name | T981 |
| Test name | |
| Test status | |
| Simulation time | 958089920 ps |
| CPU time | 5.07 seconds |
| Started | Sep 24 09:03:46 AM UTC 24 |
| Finished | Sep 24 09:03:53 AM UTC 24 |
| Peak memory | 217912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2055727025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_access.2055727025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_types.2175227089 |
| Short name | T465 |
| Test name | |
| Test status | |
| Simulation time | 558104725 ps |
| CPU time | 3.16 seconds |
| Started | Sep 24 09:03:48 AM UTC 24 |
| Finished | Sep 24 09:03:52 AM UTC 24 |
| Peak memory | 217708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2175227089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_types.2175227089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_levels.3131955654 |
| Short name | T348 |
| Test name | |
| Test status | |
| Simulation time | 164829562 ps |
| CPU time | 1.55 seconds |
| Started | Sep 24 09:03:50 AM UTC 24 |
| Finished | Sep 24 09:03:53 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131955654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_fifo_levels.3131955654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_rst.962279998 |
| Short name | T984 |
| Test name | |
| Test status | |
| Simulation time | 359602740 ps |
| CPU time | 4.81 seconds |
| Started | Sep 24 09:03:50 AM UTC 24 |
| Finished | Sep 24 09:03:56 AM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=962279998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_fifo_rst.962279998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_in_iso.1397523159 |
| Short name | T854 |
| Test name | |
| Test status | |
| Simulation time | 239866047 ps |
| CPU time | 2.22 seconds |
| Started | Sep 24 09:03:52 AM UTC 24 |
| Finished | Sep 24 09:03:55 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1397523159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_in_iso.1397523159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_in_stall.2217870484 |
| Short name | T965 |
| Test name | |
| Test status | |
| Simulation time | 140318071 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:03:52 AM UTC 24 |
| Finished | Sep 24 09:03:54 AM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2217870484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_in_stall.2217870484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_in_trans.1040795060 |
| Short name | T986 |
| Test name | |
| Test status | |
| Simulation time | 200266925 ps |
| CPU time | 1.72 seconds |
| Started | Sep 24 09:03:53 AM UTC 24 |
| Finished | Sep 24 09:03:56 AM UTC 24 |
| Peak memory | 215356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1040795060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_in_trans.1040795060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_invalid_sync.390798423 |
| Short name | T1028 |
| Test name | |
| Test status | |
| Simulation time | 4214346910 ps |
| CPU time | 40.87 seconds |
| Started | Sep 24 09:03:50 AM UTC 24 |
| Finished | Sep 24 09:04:32 AM UTC 24 |
| Peak memory | 235148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=390798423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_invalid_sync.390798423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_iso_retraction.1487952900 |
| Short name | T1087 |
| Test name | |
| Test status | |
| Simulation time | 6104692858 ps |
| CPU time | 78.64 seconds |
| Started | Sep 24 09:03:53 AM UTC 24 |
| Finished | Sep 24 09:05:14 AM UTC 24 |
| Peak memory | 217788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1487952900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_iso_retraction.1487952900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_link_in_err.3841796355 |
| Short name | T987 |
| Test name | |
| Test status | |
| Simulation time | 157459599 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 09:03:55 AM UTC 24 |
| Finished | Sep 24 09:03:58 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3841796355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_in_err.3841796355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_link_resume.3444728442 |
| Short name | T1020 |
| Test name | |
| Test status | |
| Simulation time | 15503969012 ps |
| CPU time | 28.55 seconds |
| Started | Sep 24 09:03:55 AM UTC 24 |
| Finished | Sep 24 09:04:25 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3444728442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_resume.3444728442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_link_suspend.1156125471 |
| Short name | T1009 |
| Test name | |
| Test status | |
| Simulation time | 9738736529 ps |
| CPU time | 19.42 seconds |
| Started | Sep 24 09:03:55 AM UTC 24 |
| Finished | Sep 24 09:04:16 AM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1156125471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_link_suspend.1156125471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_low_speed_traffic.2468289160 |
| Short name | T1037 |
| Test name | |
| Test status | |
| Simulation time | 3984223065 ps |
| CPU time | 43.76 seconds |
| Started | Sep 24 09:03:55 AM UTC 24 |
| Finished | Sep 24 09:04:41 AM UTC 24 |
| Peak memory | 230788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2468289160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_low_speed_traffic.2468289160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_max_inter_pkt_delay.1266952342 |
| Short name | T1019 |
| Test name | |
| Test status | |
| Simulation time | 2172337001 ps |
| CPU time | 23.83 seconds |
| Started | Sep 24 09:03:57 AM UTC 24 |
| Finished | Sep 24 09:04:22 AM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1266952342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_inter_pkt_delay.1266952342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_in_transaction.1782714922 |
| Short name | T988 |
| Test name | |
| Test status | |
| Simulation time | 254533829 ps |
| CPU time | 1.9 seconds |
| Started | Sep 24 09:03:57 AM UTC 24 |
| Finished | Sep 24 09:04:00 AM UTC 24 |
| Peak memory | 215564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1782714922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_in_transaction.1782714922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_out_transaction.8455069 |
| Short name | T989 |
| Test name | |
| Test status | |
| Simulation time | 214639718 ps |
| CPU time | 1.87 seconds |
| Started | Sep 24 09:03:57 AM UTC 24 |
| Finished | Sep 24 09:04:00 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=8455069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transactio n_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_out_transaction.8455069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_max_non_iso_usb_traffic.2154914819 |
| Short name | T1024 |
| Test name | |
| Test status | |
| Simulation time | 2204051017 ps |
| CPU time | 28.29 seconds |
| Started | Sep 24 09:03:57 AM UTC 24 |
| Finished | Sep 24 09:04:27 AM UTC 24 |
| Peak memory | 234888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2154914819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_non_iso_usb_traffic.2154914819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_max_usb_traffic.1108162526 |
| Short name | T1082 |
| Test name | |
| Test status | |
| Simulation time | 1851681207 ps |
| CPU time | 70.25 seconds |
| Started | Sep 24 09:03:59 AM UTC 24 |
| Finished | Sep 24 09:05:12 AM UTC 24 |
| Peak memory | 228292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1108162526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_usb_traffic.1108162526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_min_inter_pkt_delay.3343077330 |
| Short name | T1036 |
| Test name | |
| Test status | |
| Simulation time | 4157730342 ps |
| CPU time | 39.59 seconds |
| Started | Sep 24 09:03:59 AM UTC 24 |
| Finished | Sep 24 09:04:40 AM UTC 24 |
| Peak memory | 228676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3343077330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_inter_pkt_delay.3343077330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_in_transaction.486077081 |
| Short name | T991 |
| Test name | |
| Test status | |
| Simulation time | 208924045 ps |
| CPU time | 1.48 seconds |
| Started | Sep 24 09:04:01 AM UTC 24 |
| Finished | Sep 24 09:04:03 AM UTC 24 |
| Peak memory | 215508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=486077081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_in_transaction.486077081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_out_transaction.3483357639 |
| Short name | T992 |
| Test name | |
| Test status | |
| Simulation time | 174647972 ps |
| CPU time | 1.53 seconds |
| Started | Sep 24 09:04:01 AM UTC 24 |
| Finished | Sep 24 09:04:03 AM UTC 24 |
| Peak memory | 215456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3483357639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_out_transaction.3483357639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_nak_trans.1590619470 |
| Short name | T153 |
| Test name | |
| Test status | |
| Simulation time | 163307180 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:04:02 AM UTC 24 |
| Finished | Sep 24 09:04:05 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1590619470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_nak_trans.1590619470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_out_iso.3742896723 |
| Short name | T994 |
| Test name | |
| Test status | |
| Simulation time | 180723152 ps |
| CPU time | 1.07 seconds |
| Started | Sep 24 09:04:04 AM UTC 24 |
| Finished | Sep 24 09:04:06 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3742896723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_out_iso.3742896723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_out_stall.814753279 |
| Short name | T995 |
| Test name | |
| Test status | |
| Simulation time | 155926821 ps |
| CPU time | 1.23 seconds |
| Started | Sep 24 09:04:04 AM UTC 24 |
| Finished | Sep 24 09:04:07 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=814753279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_out_stall.814753279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_out_trans_nak.874876079 |
| Short name | T440 |
| Test name | |
| Test status | |
| Simulation time | 147525599 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:04:06 AM UTC 24 |
| Finished | Sep 24 09:04:08 AM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=874876079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_out_trans_nak.874876079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_pending_in_trans.2305525847 |
| Short name | T999 |
| Test name | |
| Test status | |
| Simulation time | 178977443 ps |
| CPU time | 1.64 seconds |
| Started | Sep 24 09:04:07 AM UTC 24 |
| Finished | Sep 24 09:04:10 AM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2305525847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_pending_in_trans.2305525847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_pinflip.4089500608 |
| Short name | T1000 |
| Test name | |
| Test status | |
| Simulation time | 253070221 ps |
| CPU time | 1.82 seconds |
| Started | Sep 24 09:04:07 AM UTC 24 |
| Finished | Sep 24 09:04:10 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4089500608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_pinflip.4089500608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_usb_ref_disable.1716385266 |
| Short name | T997 |
| Test name | |
| Test status | |
| Simulation time | 140568839 ps |
| CPU time | 1.26 seconds |
| Started | Sep 24 09:04:07 AM UTC 24 |
| Finished | Sep 24 09:04:09 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1716385266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_usb_ref_disable.1716385266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_phy_pins_sense.1181863840 |
| Short name | T1001 |
| Test name | |
| Test status | |
| Simulation time | 61621721 ps |
| CPU time | 1.32 seconds |
| Started | Sep 24 09:04:09 AM UTC 24 |
| Finished | Sep 24 09:04:12 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1181863840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_pins_sense.1181863840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_buffer.2637388253 |
| Short name | T1089 |
| Test name | |
| Test status | |
| Simulation time | 18919964851 ps |
| CPU time | 64.45 seconds |
| Started | Sep 24 09:04:11 AM UTC 24 |
| Finished | Sep 24 09:05:17 AM UTC 24 |
| Peak memory | 228600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2637388253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_pkt_buffer.2637388253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_received.3932974544 |
| Short name | T1002 |
| Test name | |
| Test status | |
| Simulation time | 191104281 ps |
| CPU time | 1.71 seconds |
| Started | Sep 24 09:04:11 AM UTC 24 |
| Finished | Sep 24 09:04:14 AM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3932974544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_pkt_received.3932974544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_sent.3428935414 |
| Short name | T1005 |
| Test name | |
| Test status | |
| Simulation time | 205784751 ps |
| CPU time | 1.8 seconds |
| Started | Sep 24 09:04:11 AM UTC 24 |
| Finished | Sep 24 09:04:14 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3428935414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_pkt_sent.3428935414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_disconnects.244106757 |
| Short name | T178 |
| Test name | |
| Test status | |
| Simulation time | 3641405279 ps |
| CPU time | 81.54 seconds |
| Started | Sep 24 09:04:13 AM UTC 24 |
| Finished | Sep 24 09:05:36 AM UTC 24 |
| Peak memory | 230508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=244106757 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_disconnects.244106757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_resets.2117572134 |
| Short name | T1109 |
| Test name | |
| Test status | |
| Simulation time | 2493428794 ps |
| CPU time | 72.99 seconds |
| Started | Sep 24 09:04:15 AM UTC 24 |
| Finished | Sep 24 09:05:30 AM UTC 24 |
| Peak memory | 234968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2117572134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_resets.2117572134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_rand_suspends.2596839809 |
| Short name | T1105 |
| Test name | |
| Test status | |
| Simulation time | 9831054964 ps |
| CPU time | 72.27 seconds |
| Started | Sep 24 09:04:15 AM UTC 24 |
| Finished | Sep 24 09:05:30 AM UTC 24 |
| Peak memory | 230720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2596839809 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_suspends.2596839809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_in_transaction.2469702934 |
| Short name | T1003 |
| Test name | |
| Test status | |
| Simulation time | 244315910 ps |
| CPU time | 1.69 seconds |
| Started | Sep 24 09:04:11 AM UTC 24 |
| Finished | Sep 24 09:04:14 AM UTC 24 |
| Peak memory | 215336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2469702934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_random_length_in_transaction.2469702934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_out_transaction.375208385 |
| Short name | T1004 |
| Test name | |
| Test status | |
| Simulation time | 215212386 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:04:11 AM UTC 24 |
| Finished | Sep 24 09:04:14 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=375208385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 9.usbdev_random_length_out_transaction.375208385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_resume_link_active.320396397 |
| Short name | T1080 |
| Test name | |
| Test status | |
| Simulation time | 20157810364 ps |
| CPU time | 53.36 seconds |
| Started | Sep 24 09:04:16 AM UTC 24 |
| Finished | Sep 24 09:05:10 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=320396397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 9.usbdev_resume_link_active.320396397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_rx_crc_err.606231858 |
| Short name | T1012 |
| Test name | |
| Test status | |
| Simulation time | 201558422 ps |
| CPU time | 1.23 seconds |
| Started | Sep 24 09:04:16 AM UTC 24 |
| Finished | Sep 24 09:04:18 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=606231858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_rx_crc_err.606231858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_rx_full.2682402762 |
| Short name | T1016 |
| Test name | |
| Test status | |
| Simulation time | 307786266 ps |
| CPU time | 1.79 seconds |
| Started | Sep 24 09:04:18 AM UTC 24 |
| Finished | Sep 24 09:04:21 AM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2682402762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_rx_full.2682402762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_setup_stage.2458433115 |
| Short name | T1013 |
| Test name | |
| Test status | |
| Simulation time | 161519730 ps |
| CPU time | 1.49 seconds |
| Started | Sep 24 09:04:18 AM UTC 24 |
| Finished | Sep 24 09:04:21 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2458433115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_setup_stage.2458433115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_setup_trans_ignored.342685305 |
| Short name | T1015 |
| Test name | |
| Test status | |
| Simulation time | 152397980 ps |
| CPU time | 1.73 seconds |
| Started | Sep 24 09:04:18 AM UTC 24 |
| Finished | Sep 24 09:04:21 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=342685305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 9.usbdev_setup_trans_ignored.342685305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_smoke.2446860200 |
| Short name | T1014 |
| Test name | |
| Test status | |
| Simulation time | 218470534 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:04:18 AM UTC 24 |
| Finished | Sep 24 09:04:21 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2446860200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_smoke.2446860200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_spurious_pids_ignored.316786077 |
| Short name | T1141 |
| Test name | |
| Test status | |
| Simulation time | 2722777936 ps |
| CPU time | 88.15 seconds |
| Started | Sep 24 09:04:18 AM UTC 24 |
| Finished | Sep 24 09:05:48 AM UTC 24 |
| Peak memory | 234900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=316786077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_spurious_pids_ignored.316786077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_stall_priority_over_nak.717793038 |
| Short name | T1017 |
| Test name | |
| Test status | |
| Simulation time | 220861648 ps |
| CPU time | 1.82 seconds |
| Started | Sep 24 09:04:18 AM UTC 24 |
| Finished | Sep 24 09:04:21 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=717793038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stall_priority_over_nak.717793038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_stall_trans.1475320211 |
| Short name | T1018 |
| Test name | |
| Test status | |
| Simulation time | 188788967 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:04:19 AM UTC 24 |
| Finished | Sep 24 09:04:22 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1475320211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_stall_trans.1475320211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_stream_len_max.2116835766 |
| Short name | T1023 |
| Test name | |
| Test status | |
| Simulation time | 1054144276 ps |
| CPU time | 3.67 seconds |
| Started | Sep 24 09:04:22 AM UTC 24 |
| Finished | Sep 24 09:04:27 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2116835766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stream_len_max.2116835766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_streaming_out.1854080283 |
| Short name | T1044 |
| Test name | |
| Test status | |
| Simulation time | 2121180518 ps |
| CPU time | 22.12 seconds |
| Started | Sep 24 09:04:22 AM UTC 24 |
| Finished | Sep 24 09:04:45 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1854080283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_streaming_out.1854080283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_stress_usb_traffic.4200217873 |
| Short name | T1201 |
| Test name | |
| Test status | |
| Simulation time | 13391703108 ps |
| CPU time | 122.98 seconds |
| Started | Sep 24 09:04:22 AM UTC 24 |
| Finished | Sep 24 09:06:27 AM UTC 24 |
| Peak memory | 235052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4200217873 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stress_usb_traffic.4200217873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_timeout_missing_host_handshake.3814174487 |
| Short name | T1011 |
| Test name | |
| Test status | |
| Simulation time | 1144975355 ps |
| CPU time | 32.08 seconds |
| Started | Sep 24 09:03:44 AM UTC 24 |
| Finished | Sep 24 09:04:17 AM UTC 24 |
| Peak memory | 217908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814174487 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_timeout_missing_host_handshake.3814174487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/9.usbdev_tx_rx_disruption.2603884911 |
| Short name | T425 |
| Test name | |
| Test status | |
| Simulation time | 512033845 ps |
| CPU time | 3.59 seconds |
| Started | Sep 24 09:04:22 AM UTC 24 |
| Finished | Sep 24 09:04:27 AM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2603884911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_tx _rx_disruption.2603884911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/9.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.3848387640 |
| Short name | T470 |
| Test name | |
| Test status | |
| Simulation time | 610804736 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:41 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3848387640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_endpoint_types.3848387640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/90.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/90.usbdev_fifo_levels.1270334320 |
| Short name | T3300 |
| Test name | |
| Test status | |
| Simulation time | 273741855 ps |
| CPU time | 1.16 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1270334320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 90.usbdev_fifo_levels.1270334320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/90.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.3973994615 |
| Short name | T3304 |
| Test name | |
| Test status | |
| Simulation time | 497226005 ps |
| CPU time | 1.52 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:41 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3973994615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_t x_rx_disruption.3973994615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/90.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.1666994947 |
| Short name | T568 |
| Test name | |
| Test status | |
| Simulation time | 470755447 ps |
| CPU time | 1.36 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:41 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1666994947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_endpoint_types.1666994947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/91.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/91.usbdev_fifo_levels.144890356 |
| Short name | T3297 |
| Test name | |
| Test status | |
| Simulation time | 197739082 ps |
| CPU time | 0.93 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=144890356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 91.usbdev_fifo_levels.144890356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/91.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.752836869 |
| Short name | T3307 |
| Test name | |
| Test status | |
| Simulation time | 497234231 ps |
| CPU time | 1.61 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:41 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=752836869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_tx _rx_disruption.752836869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/91.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.2582932579 |
| Short name | T473 |
| Test name | |
| Test status | |
| Simulation time | 240620146 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:40 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2582932579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_endpoint_types.2582932579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/92.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/92.usbdev_fifo_levels.1890853014 |
| Short name | T362 |
| Test name | |
| Test status | |
| Simulation time | 313039137 ps |
| CPU time | 1.25 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:41 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1890853014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 92.usbdev_fifo_levels.1890853014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/92.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.42049297 |
| Short name | T3308 |
| Test name | |
| Test status | |
| Simulation time | 649760885 ps |
| CPU time | 1.65 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:41 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=42049297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_tx_ rx_disruption.42049297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/92.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.3569737684 |
| Short name | T496 |
| Test name | |
| Test status | |
| Simulation time | 589402123 ps |
| CPU time | 1.59 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:41 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3569737684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_endpoint_types.3569737684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/93.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/93.usbdev_fifo_levels.3098847698 |
| Short name | T328 |
| Test name | |
| Test status | |
| Simulation time | 288774768 ps |
| CPU time | 1.2 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:41 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3098847698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 93.usbdev_fifo_levels.3098847698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/93.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.2024197196 |
| Short name | T3310 |
| Test name | |
| Test status | |
| Simulation time | 542836318 ps |
| CPU time | 1.76 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:41 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2024197196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_t x_rx_disruption.2024197196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/93.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/94.usbdev_fifo_levels.3311547153 |
| Short name | T334 |
| Test name | |
| Test status | |
| Simulation time | 244047583 ps |
| CPU time | 1.09 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:41 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3311547153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 94.usbdev_fifo_levels.3311547153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/94.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.587147854 |
| Short name | T3311 |
| Test name | |
| Test status | |
| Simulation time | 563575215 ps |
| CPU time | 1.67 seconds |
| Started | Sep 24 09:36:38 AM UTC 24 |
| Finished | Sep 24 09:36:41 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=587147854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_tx _rx_disruption.587147854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/94.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.3835222189 |
| Short name | T474 |
| Test name | |
| Test status | |
| Simulation time | 421824229 ps |
| CPU time | 1.4 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3835222189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_endpoint_types.3835222189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/95.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/95.usbdev_fifo_levels.3711333415 |
| Short name | T3315 |
| Test name | |
| Test status | |
| Simulation time | 250884327 ps |
| CPU time | 1.23 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:28 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3711333415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 95.usbdev_fifo_levels.3711333415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/95.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.2146258459 |
| Short name | T3320 |
| Test name | |
| Test status | |
| Simulation time | 462399594 ps |
| CPU time | 1.54 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2146258459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_t x_rx_disruption.2146258459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/95.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.2121586941 |
| Short name | T3313 |
| Test name | |
| Test status | |
| Simulation time | 163796108 ps |
| CPU time | 1.01 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:28 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2121586941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_endpoint_types.2121586941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/96.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/96.usbdev_fifo_levels.3424970745 |
| Short name | T3312 |
| Test name | |
| Test status | |
| Simulation time | 152374837 ps |
| CPU time | 0.81 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:28 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3424970745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 96.usbdev_fifo_levels.3424970745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/96.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.610676659 |
| Short name | T3322 |
| Test name | |
| Test status | |
| Simulation time | 493633554 ps |
| CPU time | 1.51 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 217412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=610676659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_tx _rx_disruption.610676659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/96.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.887062064 |
| Short name | T507 |
| Test name | |
| Test status | |
| Simulation time | 609518191 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=887062064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 97.usbdev_endpoint_types.887062064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/97.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/97.usbdev_fifo_levels.1538130444 |
| Short name | T393 |
| Test name | |
| Test status | |
| Simulation time | 257673535 ps |
| CPU time | 1.1 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1538130444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 97.usbdev_fifo_levels.1538130444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/97.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.3287337325 |
| Short name | T3324 |
| Test name | |
| Test status | |
| Simulation time | 631436555 ps |
| CPU time | 1.62 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3287337325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_t x_rx_disruption.3287337325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/97.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.1278251928 |
| Short name | T581 |
| Test name | |
| Test status | |
| Simulation time | 227151195 ps |
| CPU time | 0.98 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:28 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1278251928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_endpoint_types.1278251928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/98.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/98.usbdev_fifo_levels.1142441284 |
| Short name | T3316 |
| Test name | |
| Test status | |
| Simulation time | 152413791 ps |
| CPU time | 0.97 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:28 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1142441284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 98.usbdev_fifo_levels.1142441284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/98.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.2439065868 |
| Short name | T126 |
| Test name | |
| Test status | |
| Simulation time | 553953670 ps |
| CPU time | 1.7 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2439065868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_t x_rx_disruption.2439065868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/98.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.2356165862 |
| Short name | T3314 |
| Test name | |
| Test status | |
| Simulation time | 206201852 ps |
| CPU time | 0.9 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:28 AM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2356165862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_endpoint_types.2356165862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/99.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/99.usbdev_fifo_levels.74626234 |
| Short name | T3317 |
| Test name | |
| Test status | |
| Simulation time | 291419841 ps |
| CPU time | 1.02 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=74626234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 99.usbdev_fifo_levels.74626234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/99.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.2420395145 |
| Short name | T3323 |
| Test name | |
| Test status | |
| Simulation time | 493283125 ps |
| CPU time | 1.44 seconds |
| Started | Sep 24 09:37:26 AM UTC 24 |
| Finished | Sep 24 09:37:29 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2420395145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_t x_rx_disruption.2420395145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_23/usbdev-sim-vcs/99.usbdev_tx_rx_disruption/latest |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |