Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
86.36 88.56 85.90 70.07 86.52 88.35 98.79


Total tests in report: 1927
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
29.07 29.07 28.99 28.99 29.89 29.89 21.11 21.11 48.29 48.29 43.68 43.68 2.45 2.45 /workspace/coverage/cover_reg_top/0.chip_csr_rw.4016355561
53.17 24.10 68.78 39.80 58.03 28.14 56.12 35.01 65.93 17.63 49.44 5.76 20.72 18.27 /workspace/coverage/cover_reg_top/30.xbar_stress_all_with_error.1768446357
67.96 14.79 80.27 11.49 75.80 17.77 61.42 5.30 83.28 17.35 86.25 36.80 20.72 0.00 /workspace/coverage/pad_ctrl_test_mode/3.chip_padctrl_attributes.1320822149
71.19 3.24 80.27 0.00 75.80 0.00 61.42 0.00 83.28 0.00 86.25 0.00 40.15 19.43 /workspace/coverage/cover_reg_top/93.xbar_access_same_device_slow_rsp.867158195
73.94 2.75 80.27 0.00 76.23 0.43 61.42 0.00 83.45 0.16 86.25 0.00 56.02 15.87 /workspace/coverage/cover_reg_top/76.xbar_stress_all.310271646
75.89 1.95 80.27 0.00 76.23 0.00 61.42 0.00 83.45 0.00 86.25 0.00 67.74 11.72 /workspace/coverage/cover_reg_top/40.xbar_access_same_device_slow_rsp.2316202750
77.63 1.74 82.23 1.95 78.97 2.74 64.78 3.36 84.74 1.29 86.25 0.00 68.83 1.08 /workspace/coverage/cover_reg_top/2.chip_same_csr_outstanding.1475240714
79.09 1.46 86.71 4.48 80.00 1.03 65.14 0.36 85.76 1.01 88.10 1.86 68.83 0.00 /workspace/coverage/default/1.chip_jtag_csr_rw.2399881445
80.26 1.17 86.71 0.00 80.00 0.00 65.14 0.00 85.76 0.00 88.10 0.00 75.87 7.04 /workspace/coverage/cover_reg_top/30.xbar_access_same_device_slow_rsp.2863139024
81.42 1.16 86.71 0.00 80.02 0.01 65.14 0.00 85.76 0.00 88.10 0.00 82.80 6.93 /workspace/coverage/cover_reg_top/90.xbar_access_same_device_slow_rsp.4280447282
82.11 0.69 86.72 0.01 82.12 2.10 66.74 1.60 85.76 0.00 88.10 0.00 83.21 0.41 /workspace/coverage/cover_reg_top/11.chip_tl_errors.2434078609
82.72 0.62 86.72 0.00 82.12 0.00 66.74 0.00 85.76 0.00 88.10 0.00 86.91 3.70 /workspace/coverage/cover_reg_top/10.xbar_access_same_device_slow_rsp.1557364530
83.28 0.55 86.72 0.00 82.54 0.43 66.74 0.00 85.86 0.11 88.10 0.00 89.70 2.79 /workspace/coverage/cover_reg_top/27.xbar_stress_all.334864599
83.82 0.54 86.72 0.00 82.61 0.07 66.74 0.00 85.90 0.03 88.10 0.00 92.86 3.16 /workspace/coverage/cover_reg_top/70.xbar_access_same_device_slow_rsp.2898117029
84.25 0.43 86.72 0.00 83.07 0.46 66.74 0.00 85.93 0.03 88.10 0.00 94.93 2.07 /workspace/coverage/cover_reg_top/17.xbar_random.2811466663
84.62 0.37 87.14 0.42 83.41 0.33 67.91 1.17 86.17 0.24 88.10 0.00 94.98 0.05 /workspace/coverage/cover_reg_top/4.chip_csr_hw_reset.1224926291
84.90 0.28 87.14 0.00 83.41 0.00 67.91 0.00 86.17 0.00 88.10 0.00 96.65 1.67 /workspace/coverage/cover_reg_top/8.xbar_access_same_device.2039646818
85.09 0.19 87.52 0.38 83.53 0.12 68.49 0.58 86.20 0.03 88.10 0.00 96.70 0.05 /workspace/coverage/cover_reg_top/3.chip_csr_hw_reset.3995192385
85.26 0.17 87.62 0.10 84.44 0.92 68.49 0.00 86.20 0.00 88.10 0.00 96.71 0.01 /workspace/coverage/cover_reg_top/21.chip_tl_errors.3171482640
85.39 0.13 87.62 0.00 84.44 0.00 69.24 0.75 86.20 0.00 88.10 0.00 96.71 0.00 /workspace/coverage/cover_reg_top/1.chip_rv_dm_lc_disabled.3585373240
85.50 0.11 87.62 0.00 84.47 0.02 69.24 0.00 86.22 0.02 88.10 0.00 97.33 0.62 /workspace/coverage/cover_reg_top/86.xbar_smoke_large_delays.3082983577
85.61 0.11 88.00 0.38 84.47 0.00 69.52 0.28 86.22 0.00 88.10 0.00 97.33 0.00 /workspace/coverage/cover_reg_top/2.chip_csr_hw_reset.2557880252
85.71 0.11 88.00 0.00 84.68 0.22 69.52 0.00 86.33 0.12 88.10 0.00 97.65 0.32 /workspace/coverage/cover_reg_top/8.xbar_stress_all.2190734984
85.80 0.08 88.00 0.00 84.77 0.08 69.52 0.00 86.37 0.03 88.10 0.00 98.04 0.39 /workspace/coverage/cover_reg_top/84.xbar_stress_all_with_rand_reset.4056250697
85.87 0.07 88.04 0.04 84.95 0.18 69.70 0.18 86.39 0.02 88.10 0.00 98.05 0.01 /workspace/coverage/cover_reg_top/12.chip_csr_rw.2946912844
85.94 0.07 88.05 0.01 84.96 0.01 69.71 0.01 86.40 0.01 88.48 0.37 98.06 0.01 /workspace/coverage/cover_reg_top/3.chip_csr_mem_rw_with_rand_reset.235306446
85.99 0.04 88.05 0.00 85.22 0.27 69.71 0.00 86.40 0.00 88.48 0.00 98.06 0.00 /workspace/coverage/cover_reg_top/25.chip_tl_errors.3092019980
86.03 0.04 88.20 0.15 85.22 0.00 69.80 0.09 86.40 0.00 88.48 0.00 98.06 0.00 /workspace/coverage/cover_reg_top/1.chip_csr_hw_reset.2837286812
86.06 0.03 88.25 0.05 85.35 0.12 69.80 0.01 86.43 0.03 88.48 0.00 98.06 0.00 /workspace/coverage/default/0.chip_jtag_csr_rw.270041411
86.09 0.03 88.25 0.00 85.41 0.06 69.80 0.00 86.46 0.03 88.48 0.00 98.13 0.07 /workspace/coverage/cover_reg_top/4.xbar_stress_all.1250353839
86.11 0.03 88.25 0.00 85.41 0.01 69.80 0.00 86.46 0.00 88.48 0.00 98.28 0.15 /workspace/coverage/cover_reg_top/11.xbar_stress_all_with_rand_reset.3728438374
86.14 0.02 88.25 0.00 85.55 0.14 69.80 0.00 86.46 0.00 88.48 0.00 98.28 0.00 /workspace/coverage/cover_reg_top/7.chip_tl_errors.3082309536
86.16 0.02 88.27 0.03 85.56 0.01 69.90 0.10 86.47 0.01 88.48 0.00 98.28 0.00 /workspace/coverage/default/0.chip_jtag_mem_access.2550831003
86.18 0.02 88.27 0.00 85.60 0.04 69.90 0.00 86.49 0.02 88.48 0.00 98.35 0.07 /workspace/coverage/cover_reg_top/92.xbar_access_same_device.2557281538
86.20 0.02 88.34 0.06 85.61 0.01 69.94 0.04 86.49 0.00 88.48 0.00 98.35 0.00 /workspace/coverage/cover_reg_top/0.chip_csr_hw_reset.73927216
86.22 0.02 88.34 0.00 85.61 0.00 69.94 0.00 86.49 0.00 88.48 0.00 98.46 0.11 /workspace/coverage/cover_reg_top/73.xbar_stress_all_with_reset_error.266112096
86.24 0.02 88.34 0.00 85.64 0.03 70.01 0.07 86.49 0.00 88.48 0.00 98.46 0.00 /workspace/coverage/cover_reg_top/2.chip_csr_mem_rw_with_rand_reset.847774502
86.25 0.01 88.34 0.00 85.64 0.00 70.01 0.00 86.49 0.00 88.48 0.00 98.54 0.08 /workspace/coverage/cover_reg_top/49.xbar_stress_all_with_rand_reset.1559331251
86.26 0.01 88.34 0.00 85.68 0.04 70.01 0.00 86.52 0.03 88.48 0.00 98.54 0.00 /workspace/coverage/cover_reg_top/25.xbar_stress_all.169075875
86.27 0.01 88.34 0.00 85.68 0.00 70.01 0.00 86.52 0.00 88.48 0.00 98.61 0.07 /workspace/coverage/cover_reg_top/46.xbar_stress_all_with_reset_error.3045516070
86.29 0.01 88.35 0.01 85.72 0.03 70.03 0.02 86.52 0.00 88.48 0.00 98.61 0.00 /workspace/coverage/cover_reg_top/14.chip_same_csr_outstanding.1906909977
86.29 0.01 88.35 0.00 85.74 0.02 70.03 0.00 86.52 0.00 88.48 0.00 98.65 0.04 /workspace/coverage/cover_reg_top/30.xbar_stress_all_with_rand_reset.2700974939
86.30 0.01 88.35 0.00 85.74 0.00 70.03 0.00 86.52 0.00 88.48 0.00 98.69 0.05 /workspace/coverage/cover_reg_top/51.xbar_stress_all_with_rand_reset.1964947839
86.31 0.01 88.35 0.00 85.77 0.03 70.05 0.02 86.52 0.00 88.48 0.00 98.69 0.00 /workspace/coverage/cover_reg_top/10.chip_tl_errors.4082335431
86.32 0.01 88.35 0.00 85.80 0.03 70.05 0.00 86.52 0.00 88.48 0.00 98.69 0.00 /workspace/coverage/cover_reg_top/14.chip_tl_errors.2019795806
86.32 0.01 88.35 0.00 85.80 0.00 70.05 0.00 86.52 0.00 88.48 0.00 98.72 0.02 /workspace/coverage/cover_reg_top/27.xbar_stress_all_with_rand_reset.625903135
86.32 0.01 88.35 0.00 85.80 0.00 70.05 0.00 86.52 0.00 88.48 0.00 98.74 0.02 /workspace/coverage/cover_reg_top/87.xbar_stress_all_with_reset_error.1179317329
86.33 0.01 88.35 0.00 85.81 0.01 70.07 0.01 86.52 0.00 88.48 0.00 98.74 0.00 /workspace/coverage/cover_reg_top/2.chip_csr_rw.3848512997
86.33 0.01 88.35 0.01 85.82 0.02 70.07 0.00 86.52 0.00 88.48 0.00 98.74 0.00 /workspace/coverage/pad_ctrl_test_mode/1.chip_padctrl_attributes.2602882292
86.33 0.01 88.35 0.00 85.83 0.01 70.07 0.00 86.52 0.00 88.48 0.00 98.75 0.01 /workspace/coverage/cover_reg_top/26.xbar_stress_all.2476364181
86.34 0.01 88.35 0.00 85.85 0.02 70.07 0.00 86.52 0.00 88.48 0.00 98.75 0.00 /workspace/coverage/cover_reg_top/12.chip_tl_errors.1425456508
86.34 0.01 88.35 0.00 85.85 0.01 70.07 0.00 86.52 0.00 88.48 0.00 98.77 0.01 /workspace/coverage/cover_reg_top/23.xbar_same_source.3352484763
86.34 0.01 88.37 0.01 85.85 0.00 70.07 0.00 86.52 0.00 88.48 0.00 98.77 0.00 /workspace/coverage/pad_ctrl_test_mode/4.chip_padctrl_attributes.3123540099
86.34 0.01 88.37 0.00 85.85 0.00 70.07 0.00 86.52 0.00 88.48 0.00 98.78 0.01 /workspace/coverage/cover_reg_top/1.xbar_stress_all_with_reset_error.3020140304
86.35 0.01 88.37 0.00 85.85 0.00 70.07 0.00 86.52 0.00 88.48 0.00 98.79 0.01 /workspace/coverage/cover_reg_top/14.xbar_stress_all_with_reset_error.2800660171
86.35 0.01 88.37 0.00 85.86 0.01 70.07 0.00 86.52 0.00 88.48 0.00 98.79 0.00 /workspace/coverage/cover_reg_top/24.chip_tl_errors.3392792222
86.35 0.01 88.37 0.00 85.87 0.01 70.07 0.00 86.52 0.00 88.48 0.00 98.79 0.00 /workspace/coverage/cover_reg_top/0.chip_csr_bit_bash.2302791461
86.35 0.01 88.37 0.00 85.88 0.01 70.07 0.00 86.52 0.00 88.48 0.00 98.79 0.00 /workspace/coverage/cover_reg_top/13.chip_tl_errors.3660376140
86.35 0.01 88.37 0.00 85.88 0.01 70.07 0.00 86.52 0.00 88.48 0.00 98.79 0.00 /workspace/coverage/cover_reg_top/16.xbar_stress_all_with_reset_error.401891686
86.35 0.01 88.37 0.00 85.88 0.01 70.07 0.00 86.52 0.00 88.48 0.00 98.79 0.00 /workspace/coverage/cover_reg_top/18.chip_tl_errors.2641374655
86.35 0.01 88.37 0.00 85.89 0.01 70.07 0.00 86.52 0.00 88.48 0.00 98.79 0.00 /workspace/coverage/cover_reg_top/18.xbar_stress_all_with_error.391461110
86.35 0.01 88.37 0.00 85.89 0.01 70.07 0.00 86.52 0.00 88.48 0.00 98.79 0.00 /workspace/coverage/cover_reg_top/19.chip_tl_errors.4268727395
86.35 0.01 88.37 0.00 85.89 0.01 70.07 0.00 86.52 0.00 88.48 0.00 98.79 0.00 /workspace/coverage/cover_reg_top/52.xbar_stress_all_with_error.2566450849
86.35 0.01 88.37 0.00 85.90 0.01 70.07 0.00 86.52 0.00 88.48 0.00 98.79 0.00 /workspace/coverage/cover_reg_top/69.xbar_stress_all_with_error.1661984327
86.35 0.01 88.37 0.00 85.90 0.01 70.07 0.00 86.52 0.00 88.48 0.00 98.79 0.00 /workspace/coverage/cover_reg_top/8.xbar_stress_all_with_reset_error.3163587159
86.35 0.01 88.37 0.00 85.90 0.01 70.07 0.00 86.52 0.00 88.48 0.00 98.79 0.00 /workspace/coverage/cover_reg_top/87.xbar_stress_all_with_error.2326818751
86.35 0.01 88.37 0.01 85.90 0.00 70.07 0.00 86.52 0.00 88.48 0.00 98.79 0.00 /workspace/coverage/default/2.chip_jtag_csr_rw.2723676097


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.chip_csr_aliasing.511755709
/workspace/coverage/cover_reg_top/0.chip_csr_mem_rw_with_rand_reset.2019112899
/workspace/coverage/cover_reg_top/0.chip_prim_tl_access.1382851411
/workspace/coverage/cover_reg_top/0.chip_rv_dm_lc_disabled.2084981974
/workspace/coverage/cover_reg_top/0.chip_same_csr_outstanding.2630034132
/workspace/coverage/cover_reg_top/0.chip_tl_errors.977246697
/workspace/coverage/cover_reg_top/0.xbar_access_same_device.4028950895
/workspace/coverage/cover_reg_top/0.xbar_access_same_device_slow_rsp.1130174555
/workspace/coverage/cover_reg_top/0.xbar_error_and_unmapped_addr.2026454845
/workspace/coverage/cover_reg_top/0.xbar_error_random.693798544
/workspace/coverage/cover_reg_top/0.xbar_random.242965228
/workspace/coverage/cover_reg_top/0.xbar_random_large_delays.3163642496
/workspace/coverage/cover_reg_top/0.xbar_random_slow_rsp.440349391
/workspace/coverage/cover_reg_top/0.xbar_random_zero_delays.153600871
/workspace/coverage/cover_reg_top/0.xbar_same_source.1622494465
/workspace/coverage/cover_reg_top/0.xbar_smoke.809338668
/workspace/coverage/cover_reg_top/0.xbar_smoke_large_delays.4036460702
/workspace/coverage/cover_reg_top/0.xbar_smoke_slow_rsp.3146389351
/workspace/coverage/cover_reg_top/0.xbar_smoke_zero_delays.3646688734
/workspace/coverage/cover_reg_top/0.xbar_stress_all.3386339269
/workspace/coverage/cover_reg_top/0.xbar_stress_all_with_error.2832874192
/workspace/coverage/cover_reg_top/0.xbar_stress_all_with_rand_reset.267229651
/workspace/coverage/cover_reg_top/0.xbar_stress_all_with_reset_error.1009184234
/workspace/coverage/cover_reg_top/0.xbar_unmapped_addr.1484352896
/workspace/coverage/cover_reg_top/1.chip_csr_aliasing.2662592145
/workspace/coverage/cover_reg_top/1.chip_csr_bit_bash.3200613423
/workspace/coverage/cover_reg_top/1.chip_csr_mem_rw_with_rand_reset.2449811667
/workspace/coverage/cover_reg_top/1.chip_csr_rw.1970699223
/workspace/coverage/cover_reg_top/1.chip_prim_tl_access.1589672010
/workspace/coverage/cover_reg_top/1.chip_same_csr_outstanding.1378236977
/workspace/coverage/cover_reg_top/1.chip_tl_errors.3546882759
/workspace/coverage/cover_reg_top/1.xbar_access_same_device.1530352808
/workspace/coverage/cover_reg_top/1.xbar_access_same_device_slow_rsp.934727629
/workspace/coverage/cover_reg_top/1.xbar_error_and_unmapped_addr.3428385436
/workspace/coverage/cover_reg_top/1.xbar_error_random.2189905424
/workspace/coverage/cover_reg_top/1.xbar_random.569187225
/workspace/coverage/cover_reg_top/1.xbar_random_large_delays.3453145886
/workspace/coverage/cover_reg_top/1.xbar_random_slow_rsp.1193794574
/workspace/coverage/cover_reg_top/1.xbar_random_zero_delays.2503631779
/workspace/coverage/cover_reg_top/1.xbar_same_source.1892114972
/workspace/coverage/cover_reg_top/1.xbar_smoke.620378890
/workspace/coverage/cover_reg_top/1.xbar_smoke_large_delays.3837402131
/workspace/coverage/cover_reg_top/1.xbar_smoke_slow_rsp.3770455524
/workspace/coverage/cover_reg_top/1.xbar_smoke_zero_delays.857375255
/workspace/coverage/cover_reg_top/1.xbar_stress_all.548802196
/workspace/coverage/cover_reg_top/1.xbar_stress_all_with_error.2303172949
/workspace/coverage/cover_reg_top/1.xbar_stress_all_with_rand_reset.2644057558
/workspace/coverage/cover_reg_top/1.xbar_unmapped_addr.2925258119
/workspace/coverage/cover_reg_top/10.chip_csr_mem_rw_with_rand_reset.2132244206
/workspace/coverage/cover_reg_top/10.chip_csr_rw.2079628810
/workspace/coverage/cover_reg_top/10.chip_same_csr_outstanding.2817364211
/workspace/coverage/cover_reg_top/10.xbar_access_same_device.956983121
/workspace/coverage/cover_reg_top/10.xbar_error_and_unmapped_addr.429255469
/workspace/coverage/cover_reg_top/10.xbar_error_random.33804296
/workspace/coverage/cover_reg_top/10.xbar_random.1848768419
/workspace/coverage/cover_reg_top/10.xbar_random_large_delays.2803742680
/workspace/coverage/cover_reg_top/10.xbar_random_slow_rsp.583636120
/workspace/coverage/cover_reg_top/10.xbar_random_zero_delays.3766131656
/workspace/coverage/cover_reg_top/10.xbar_same_source.4134128759
/workspace/coverage/cover_reg_top/10.xbar_smoke.3889601297
/workspace/coverage/cover_reg_top/10.xbar_smoke_large_delays.916618340
/workspace/coverage/cover_reg_top/10.xbar_smoke_slow_rsp.2661992788
/workspace/coverage/cover_reg_top/10.xbar_smoke_zero_delays.1112377345
/workspace/coverage/cover_reg_top/10.xbar_stress_all.402745156
/workspace/coverage/cover_reg_top/10.xbar_stress_all_with_error.2169164957
/workspace/coverage/cover_reg_top/10.xbar_stress_all_with_rand_reset.2582832980
/workspace/coverage/cover_reg_top/10.xbar_stress_all_with_reset_error.1186179160
/workspace/coverage/cover_reg_top/10.xbar_unmapped_addr.1478875420
/workspace/coverage/cover_reg_top/11.chip_csr_mem_rw_with_rand_reset.2338046353
/workspace/coverage/cover_reg_top/11.chip_csr_rw.3703100162
/workspace/coverage/cover_reg_top/11.chip_same_csr_outstanding.1600265709
/workspace/coverage/cover_reg_top/11.xbar_access_same_device.4201318918
/workspace/coverage/cover_reg_top/11.xbar_access_same_device_slow_rsp.982081704
/workspace/coverage/cover_reg_top/11.xbar_error_and_unmapped_addr.2060101375
/workspace/coverage/cover_reg_top/11.xbar_error_random.2097583890
/workspace/coverage/cover_reg_top/11.xbar_random.3946967114
/workspace/coverage/cover_reg_top/11.xbar_random_large_delays.234049592
/workspace/coverage/cover_reg_top/11.xbar_random_slow_rsp.2811354619
/workspace/coverage/cover_reg_top/11.xbar_random_zero_delays.77731905
/workspace/coverage/cover_reg_top/11.xbar_same_source.658289193
/workspace/coverage/cover_reg_top/11.xbar_smoke.2238136135
/workspace/coverage/cover_reg_top/11.xbar_smoke_large_delays.2760371987
/workspace/coverage/cover_reg_top/11.xbar_smoke_slow_rsp.560205499
/workspace/coverage/cover_reg_top/11.xbar_smoke_zero_delays.3782288662
/workspace/coverage/cover_reg_top/11.xbar_stress_all.2489155583
/workspace/coverage/cover_reg_top/11.xbar_stress_all_with_error.282342201
/workspace/coverage/cover_reg_top/11.xbar_stress_all_with_reset_error.3071027127
/workspace/coverage/cover_reg_top/11.xbar_unmapped_addr.3732442588
/workspace/coverage/cover_reg_top/12.chip_csr_mem_rw_with_rand_reset.3483635138
/workspace/coverage/cover_reg_top/12.chip_same_csr_outstanding.2926544506
/workspace/coverage/cover_reg_top/12.xbar_access_same_device.2272081102
/workspace/coverage/cover_reg_top/12.xbar_access_same_device_slow_rsp.751680469
/workspace/coverage/cover_reg_top/12.xbar_error_and_unmapped_addr.3396718077
/workspace/coverage/cover_reg_top/12.xbar_error_random.590881464
/workspace/coverage/cover_reg_top/12.xbar_random.3752066696
/workspace/coverage/cover_reg_top/12.xbar_random_large_delays.1310238948
/workspace/coverage/cover_reg_top/12.xbar_random_slow_rsp.987235026
/workspace/coverage/cover_reg_top/12.xbar_random_zero_delays.4112489055
/workspace/coverage/cover_reg_top/12.xbar_same_source.470756152
/workspace/coverage/cover_reg_top/12.xbar_smoke.993514165
/workspace/coverage/cover_reg_top/12.xbar_smoke_large_delays.1939008994
/workspace/coverage/cover_reg_top/12.xbar_smoke_slow_rsp.1054139994
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/workspace/coverage/cover_reg_top/90.xbar_random.1920944576
/workspace/coverage/cover_reg_top/90.xbar_random_large_delays.1706709949
/workspace/coverage/cover_reg_top/90.xbar_random_slow_rsp.1243470861
/workspace/coverage/cover_reg_top/90.xbar_random_zero_delays.872956054
/workspace/coverage/cover_reg_top/90.xbar_same_source.1383419644
/workspace/coverage/cover_reg_top/90.xbar_smoke.147947696
/workspace/coverage/cover_reg_top/90.xbar_smoke_large_delays.3455686651
/workspace/coverage/cover_reg_top/90.xbar_smoke_slow_rsp.1378861374
/workspace/coverage/cover_reg_top/90.xbar_smoke_zero_delays.2574056630
/workspace/coverage/cover_reg_top/90.xbar_stress_all.2675965140
/workspace/coverage/cover_reg_top/90.xbar_stress_all_with_error.2509305749
/workspace/coverage/cover_reg_top/90.xbar_stress_all_with_rand_reset.117197015
/workspace/coverage/cover_reg_top/90.xbar_stress_all_with_reset_error.282467336
/workspace/coverage/cover_reg_top/90.xbar_unmapped_addr.3722937631
/workspace/coverage/cover_reg_top/91.xbar_access_same_device.1801532997
/workspace/coverage/cover_reg_top/91.xbar_access_same_device_slow_rsp.1825874626
/workspace/coverage/cover_reg_top/91.xbar_error_and_unmapped_addr.1427822845
/workspace/coverage/cover_reg_top/91.xbar_error_random.1114009602
/workspace/coverage/cover_reg_top/91.xbar_random.2715299964
/workspace/coverage/cover_reg_top/91.xbar_random_large_delays.3884872251
/workspace/coverage/cover_reg_top/91.xbar_random_slow_rsp.1972976567
/workspace/coverage/cover_reg_top/91.xbar_random_zero_delays.471958395
/workspace/coverage/cover_reg_top/91.xbar_same_source.3958477168
/workspace/coverage/cover_reg_top/91.xbar_smoke.3423935285
/workspace/coverage/cover_reg_top/91.xbar_smoke_large_delays.602246452
/workspace/coverage/cover_reg_top/91.xbar_smoke_slow_rsp.2723894404
/workspace/coverage/cover_reg_top/91.xbar_smoke_zero_delays.2823363472
/workspace/coverage/cover_reg_top/91.xbar_stress_all.340129712
/workspace/coverage/cover_reg_top/91.xbar_stress_all_with_error.1295392090
/workspace/coverage/cover_reg_top/91.xbar_stress_all_with_rand_reset.1771056547
/workspace/coverage/cover_reg_top/91.xbar_stress_all_with_reset_error.4002633596
/workspace/coverage/cover_reg_top/91.xbar_unmapped_addr.517075957
/workspace/coverage/cover_reg_top/92.xbar_access_same_device_slow_rsp.3359072665
/workspace/coverage/cover_reg_top/92.xbar_error_and_unmapped_addr.69225556
/workspace/coverage/cover_reg_top/92.xbar_error_random.3963952074
/workspace/coverage/cover_reg_top/92.xbar_random.3147765595
/workspace/coverage/cover_reg_top/92.xbar_random_large_delays.4104944277
/workspace/coverage/cover_reg_top/92.xbar_random_slow_rsp.1817002628
/workspace/coverage/cover_reg_top/92.xbar_random_zero_delays.512757876
/workspace/coverage/cover_reg_top/92.xbar_same_source.4257467743
/workspace/coverage/cover_reg_top/92.xbar_smoke.1680626491
/workspace/coverage/cover_reg_top/92.xbar_smoke_large_delays.1744292444
/workspace/coverage/cover_reg_top/92.xbar_smoke_slow_rsp.3169324682
/workspace/coverage/cover_reg_top/92.xbar_smoke_zero_delays.2106785384
/workspace/coverage/cover_reg_top/92.xbar_stress_all.1987429599
/workspace/coverage/cover_reg_top/92.xbar_stress_all_with_error.2382444317
/workspace/coverage/cover_reg_top/92.xbar_stress_all_with_rand_reset.1284721416
/workspace/coverage/cover_reg_top/92.xbar_stress_all_with_reset_error.2571550411
/workspace/coverage/cover_reg_top/92.xbar_unmapped_addr.2443652492
/workspace/coverage/cover_reg_top/93.xbar_access_same_device.3645640871
/workspace/coverage/cover_reg_top/93.xbar_error_and_unmapped_addr.2513494987
/workspace/coverage/cover_reg_top/93.xbar_error_random.118357506
/workspace/coverage/cover_reg_top/93.xbar_random.2974082108
/workspace/coverage/cover_reg_top/93.xbar_random_large_delays.3500597318
/workspace/coverage/cover_reg_top/93.xbar_random_slow_rsp.1262434506
/workspace/coverage/cover_reg_top/93.xbar_random_zero_delays.1360542048
/workspace/coverage/cover_reg_top/93.xbar_same_source.2614136016
/workspace/coverage/cover_reg_top/93.xbar_smoke.1204138219
/workspace/coverage/cover_reg_top/93.xbar_smoke_large_delays.2716223021
/workspace/coverage/cover_reg_top/93.xbar_smoke_slow_rsp.1317563092
/workspace/coverage/cover_reg_top/93.xbar_smoke_zero_delays.1234048647
/workspace/coverage/cover_reg_top/93.xbar_stress_all.534114242
/workspace/coverage/cover_reg_top/93.xbar_stress_all_with_error.3377244254
/workspace/coverage/cover_reg_top/93.xbar_stress_all_with_rand_reset.2456317486
/workspace/coverage/cover_reg_top/93.xbar_stress_all_with_reset_error.269577458
/workspace/coverage/cover_reg_top/93.xbar_unmapped_addr.2113199426
/workspace/coverage/cover_reg_top/94.xbar_access_same_device.1232986209
/workspace/coverage/cover_reg_top/94.xbar_access_same_device_slow_rsp.645823960
/workspace/coverage/cover_reg_top/94.xbar_error_and_unmapped_addr.2001140367
/workspace/coverage/cover_reg_top/94.xbar_error_random.1418998825
/workspace/coverage/cover_reg_top/94.xbar_random.2247883415
/workspace/coverage/cover_reg_top/94.xbar_random_large_delays.2501683137
/workspace/coverage/cover_reg_top/94.xbar_random_slow_rsp.2286416897
/workspace/coverage/cover_reg_top/94.xbar_random_zero_delays.1022994804
/workspace/coverage/cover_reg_top/94.xbar_same_source.1301000093
/workspace/coverage/cover_reg_top/94.xbar_smoke.1767680396
/workspace/coverage/cover_reg_top/94.xbar_smoke_large_delays.966134018
/workspace/coverage/cover_reg_top/94.xbar_smoke_slow_rsp.3283915010
/workspace/coverage/cover_reg_top/94.xbar_smoke_zero_delays.1665095305
/workspace/coverage/cover_reg_top/94.xbar_stress_all.1132306891
/workspace/coverage/cover_reg_top/94.xbar_stress_all_with_error.896836821
/workspace/coverage/cover_reg_top/94.xbar_stress_all_with_rand_reset.4223619686
/workspace/coverage/cover_reg_top/94.xbar_stress_all_with_reset_error.1523628984
/workspace/coverage/cover_reg_top/94.xbar_unmapped_addr.1622840087
/workspace/coverage/cover_reg_top/95.xbar_access_same_device.2310235609
/workspace/coverage/cover_reg_top/95.xbar_access_same_device_slow_rsp.3625824918
/workspace/coverage/cover_reg_top/95.xbar_error_and_unmapped_addr.1631872156
/workspace/coverage/cover_reg_top/95.xbar_error_random.3641054823
/workspace/coverage/cover_reg_top/95.xbar_random.743416600
/workspace/coverage/cover_reg_top/95.xbar_random_large_delays.3610345907
/workspace/coverage/cover_reg_top/95.xbar_random_slow_rsp.3449078336
/workspace/coverage/cover_reg_top/95.xbar_random_zero_delays.2276667918
/workspace/coverage/cover_reg_top/95.xbar_same_source.3988710214
/workspace/coverage/cover_reg_top/95.xbar_smoke.235426395
/workspace/coverage/cover_reg_top/95.xbar_smoke_large_delays.3486632382
/workspace/coverage/cover_reg_top/95.xbar_smoke_slow_rsp.165277944
/workspace/coverage/cover_reg_top/95.xbar_smoke_zero_delays.2418062039
/workspace/coverage/cover_reg_top/95.xbar_stress_all.782399293
/workspace/coverage/cover_reg_top/95.xbar_stress_all_with_error.2304631504
/workspace/coverage/cover_reg_top/95.xbar_stress_all_with_rand_reset.29443575
/workspace/coverage/cover_reg_top/95.xbar_stress_all_with_reset_error.1927650400
/workspace/coverage/cover_reg_top/95.xbar_unmapped_addr.3363550835
/workspace/coverage/cover_reg_top/96.xbar_access_same_device.1447963501
/workspace/coverage/cover_reg_top/96.xbar_access_same_device_slow_rsp.1482624302
/workspace/coverage/cover_reg_top/96.xbar_error_and_unmapped_addr.1855668344
/workspace/coverage/cover_reg_top/96.xbar_error_random.1220832233
/workspace/coverage/cover_reg_top/96.xbar_random.3322864613
/workspace/coverage/cover_reg_top/96.xbar_random_large_delays.2565578223
/workspace/coverage/cover_reg_top/96.xbar_random_slow_rsp.4279018849
/workspace/coverage/cover_reg_top/96.xbar_random_zero_delays.3295754835
/workspace/coverage/cover_reg_top/96.xbar_same_source.301911328
/workspace/coverage/cover_reg_top/96.xbar_smoke.571674461
/workspace/coverage/cover_reg_top/96.xbar_smoke_large_delays.4071981081
/workspace/coverage/cover_reg_top/96.xbar_smoke_slow_rsp.1233017228
/workspace/coverage/cover_reg_top/96.xbar_smoke_zero_delays.2855413841
/workspace/coverage/cover_reg_top/96.xbar_stress_all.3461488743
/workspace/coverage/cover_reg_top/96.xbar_stress_all_with_error.938743559
/workspace/coverage/cover_reg_top/96.xbar_stress_all_with_rand_reset.2245081707
/workspace/coverage/cover_reg_top/96.xbar_stress_all_with_reset_error.1877566596
/workspace/coverage/cover_reg_top/96.xbar_unmapped_addr.925533552
/workspace/coverage/cover_reg_top/97.xbar_access_same_device.1058600908
/workspace/coverage/cover_reg_top/97.xbar_access_same_device_slow_rsp.3887384510
/workspace/coverage/cover_reg_top/97.xbar_error_and_unmapped_addr.2013453237
/workspace/coverage/cover_reg_top/97.xbar_error_random.743334248
/workspace/coverage/cover_reg_top/97.xbar_random.2914379993
/workspace/coverage/cover_reg_top/97.xbar_random_large_delays.2706516004
/workspace/coverage/cover_reg_top/97.xbar_random_slow_rsp.1472332064
/workspace/coverage/cover_reg_top/97.xbar_random_zero_delays.2624263284
/workspace/coverage/cover_reg_top/97.xbar_same_source.2010666707
/workspace/coverage/cover_reg_top/97.xbar_smoke.4228149792
/workspace/coverage/cover_reg_top/97.xbar_smoke_large_delays.2112689370
/workspace/coverage/cover_reg_top/97.xbar_smoke_slow_rsp.1348545701
/workspace/coverage/cover_reg_top/97.xbar_smoke_zero_delays.640778170
/workspace/coverage/cover_reg_top/97.xbar_stress_all.2078019493
/workspace/coverage/cover_reg_top/97.xbar_stress_all_with_error.3548977062
/workspace/coverage/cover_reg_top/97.xbar_stress_all_with_rand_reset.3051508740
/workspace/coverage/cover_reg_top/97.xbar_stress_all_with_reset_error.1486906641
/workspace/coverage/cover_reg_top/97.xbar_unmapped_addr.3618116468
/workspace/coverage/cover_reg_top/98.xbar_access_same_device.25276769
/workspace/coverage/cover_reg_top/98.xbar_access_same_device_slow_rsp.2725246787
/workspace/coverage/cover_reg_top/98.xbar_error_and_unmapped_addr.1301019070
/workspace/coverage/cover_reg_top/98.xbar_error_random.865513871
/workspace/coverage/cover_reg_top/98.xbar_random.1929159967
/workspace/coverage/cover_reg_top/98.xbar_random_large_delays.3368783025
/workspace/coverage/cover_reg_top/98.xbar_random_slow_rsp.3339083039
/workspace/coverage/cover_reg_top/98.xbar_random_zero_delays.4028987083
/workspace/coverage/cover_reg_top/98.xbar_same_source.3506974516
/workspace/coverage/cover_reg_top/98.xbar_smoke.1118552035
/workspace/coverage/cover_reg_top/98.xbar_smoke_large_delays.655877354
/workspace/coverage/cover_reg_top/98.xbar_smoke_slow_rsp.1621875758
/workspace/coverage/cover_reg_top/98.xbar_smoke_zero_delays.3478659223
/workspace/coverage/cover_reg_top/98.xbar_stress_all.1119493460
/workspace/coverage/cover_reg_top/98.xbar_stress_all_with_error.2886979918
/workspace/coverage/cover_reg_top/98.xbar_stress_all_with_rand_reset.556422005
/workspace/coverage/cover_reg_top/98.xbar_stress_all_with_reset_error.927367580
/workspace/coverage/cover_reg_top/98.xbar_unmapped_addr.803636540
/workspace/coverage/cover_reg_top/99.xbar_access_same_device.2959048973
/workspace/coverage/cover_reg_top/99.xbar_access_same_device_slow_rsp.2018765621
/workspace/coverage/cover_reg_top/99.xbar_error_and_unmapped_addr.2424797733
/workspace/coverage/cover_reg_top/99.xbar_error_random.1318817795
/workspace/coverage/cover_reg_top/99.xbar_random.1344352286
/workspace/coverage/cover_reg_top/99.xbar_random_large_delays.3374486496
/workspace/coverage/cover_reg_top/99.xbar_random_slow_rsp.3338691883
/workspace/coverage/cover_reg_top/99.xbar_random_zero_delays.1348356313
/workspace/coverage/cover_reg_top/99.xbar_same_source.2249527620
/workspace/coverage/cover_reg_top/99.xbar_smoke.3065668784
/workspace/coverage/cover_reg_top/99.xbar_smoke_large_delays.701148771
/workspace/coverage/cover_reg_top/99.xbar_smoke_slow_rsp.2045842223
/workspace/coverage/cover_reg_top/99.xbar_smoke_zero_delays.2653247961
/workspace/coverage/cover_reg_top/99.xbar_stress_all.3382630393
/workspace/coverage/cover_reg_top/99.xbar_stress_all_with_error.3392366881
/workspace/coverage/cover_reg_top/99.xbar_stress_all_with_rand_reset.4264261124
/workspace/coverage/cover_reg_top/99.xbar_stress_all_with_reset_error.111169662
/workspace/coverage/cover_reg_top/99.xbar_unmapped_addr.1337173431
/workspace/coverage/default/1.chip_jtag_mem_access.1423147434
/workspace/coverage/default/2.chip_jtag_mem_access.3272264805
/workspace/coverage/pad_ctrl_test_mode/0.chip_padctrl_attributes.2012425515
/workspace/coverage/pad_ctrl_test_mode/2.chip_padctrl_attributes.2299056797
/workspace/coverage/pad_ctrl_test_mode/5.chip_padctrl_attributes.3307643300
/workspace/coverage/pad_ctrl_test_mode/6.chip_padctrl_attributes.1561559984
/workspace/coverage/pad_ctrl_test_mode/7.chip_padctrl_attributes.277000386
/workspace/coverage/pad_ctrl_test_mode/8.chip_padctrl_attributes.1577097056
/workspace/coverage/pad_ctrl_test_mode/9.chip_padctrl_attributes.2533907147




Total test records in report: 1927
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html | tests28.html | tests29.html | tests30.html | tests31.html | tests32.html | tests33.html | tests34.html | tests35.html | tests36.html | tests37.html | tests38.html | tests39.html | tests40.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T14 /workspace/coverage/cover_reg_top/4.xbar_error_and_unmapped_addr.1889049024 Dec 24 02:09:50 PM PST 23 Dec 24 02:10:21 PM PST 23 274548044 ps
T15 /workspace/coverage/cover_reg_top/52.xbar_smoke.1119386362 Dec 24 02:13:18 PM PST 23 Dec 24 02:13:27 PM PST 23 138482595 ps
T16 /workspace/coverage/cover_reg_top/90.xbar_unmapped_addr.3722937631 Dec 24 02:16:20 PM PST 23 Dec 24 02:17:00 PM PST 23 945979852 ps
T17 /workspace/coverage/cover_reg_top/83.xbar_same_source.3256393814 Dec 24 02:16:00 PM PST 23 Dec 24 02:17:07 PM PST 23 2364519460 ps
T31 /workspace/coverage/cover_reg_top/30.xbar_stress_all_with_error.1768446357 Dec 24 02:11:23 PM PST 23 Dec 24 02:15:40 PM PST 23 3399336575 ps
T33 /workspace/coverage/cover_reg_top/78.xbar_access_same_device.2828756337 Dec 24 02:15:27 PM PST 23 Dec 24 02:17:00 PM PST 23 2465073281 ps
T56 /workspace/coverage/cover_reg_top/32.xbar_smoke.1202018958 Dec 24 02:11:21 PM PST 23 Dec 24 02:11:33 PM PST 23 217823397 ps
T49 /workspace/coverage/cover_reg_top/23.xbar_same_source.3352484763 Dec 24 02:11:16 PM PST 23 Dec 24 02:11:40 PM PST 23 284116707 ps
T57 /workspace/coverage/cover_reg_top/50.xbar_smoke.1380104318 Dec 24 02:13:14 PM PST 23 Dec 24 02:13:21 PM PST 23 45988045 ps
T58 /workspace/coverage/cover_reg_top/2.xbar_same_source.3815457237 Dec 24 02:09:54 PM PST 23 Dec 24 02:10:18 PM PST 23 333275376 ps
T11 /workspace/coverage/cover_reg_top/2.chip_csr_mem_rw_with_rand_reset.847774502 Dec 24 02:09:51 PM PST 23 Dec 24 02:14:02 PM PST 23 5887011368 ps
T215 /workspace/coverage/cover_reg_top/43.xbar_smoke_slow_rsp.2135623045 Dec 24 02:12:44 PM PST 23 Dec 24 02:13:33 PM PST 23 2474301868 ps
T83 /workspace/coverage/cover_reg_top/56.xbar_same_source.727862508 Dec 24 02:13:33 PM PST 23 Dec 24 02:14:01 PM PST 23 902202355 ps
T74 /workspace/coverage/cover_reg_top/17.xbar_random.2811466663 Dec 24 02:11:12 PM PST 23 Dec 24 02:12:02 PM PST 23 1557488168 ps
T89 /workspace/coverage/cover_reg_top/68.xbar_smoke_slow_rsp.1692411785 Dec 24 02:14:32 PM PST 23 Dec 24 02:16:02 PM PST 23 5073185697 ps
T12 /workspace/coverage/cover_reg_top/1.chip_tl_errors.3546882759 Dec 24 02:09:52 PM PST 23 Dec 24 02:12:10 PM PST 23 2672478605 ps
T62 /workspace/coverage/cover_reg_top/3.xbar_stress_all.3433997202 Dec 24 02:09:51 PM PST 23 Dec 24 02:14:12 PM PST 23 3083487676 ps
T13 /workspace/coverage/cover_reg_top/0.chip_csr_rw.4016355561 Dec 24 02:09:41 PM PST 23 Dec 24 02:14:55 PM PST 23 4230553930 ps
T80 /workspace/coverage/cover_reg_top/45.xbar_error_and_unmapped_addr.46645861 Dec 24 02:12:44 PM PST 23 Dec 24 02:13:21 PM PST 23 753393328 ps
T86 /workspace/coverage/cover_reg_top/25.xbar_random_zero_delays.3455151036 Dec 24 02:11:13 PM PST 23 Dec 24 02:11:43 PM PST 23 344116183 ps
T223 /workspace/coverage/cover_reg_top/69.xbar_stress_all_with_reset_error.406417959 Dec 24 02:14:34 PM PST 23 Dec 24 02:15:31 PM PST 23 204835497 ps
T217 /workspace/coverage/cover_reg_top/72.xbar_stress_all_with_error.2011979787 Dec 24 02:15:09 PM PST 23 Dec 24 02:19:15 PM PST 23 2971611601 ps
T82 /workspace/coverage/cover_reg_top/30.xbar_stress_all_with_rand_reset.2700974939 Dec 24 02:11:32 PM PST 23 Dec 24 02:14:52 PM PST 23 482853454 ps
T222 /workspace/coverage/cover_reg_top/95.xbar_error_and_unmapped_addr.1631872156 Dec 24 02:16:40 PM PST 23 Dec 24 02:17:09 PM PST 23 584733387 ps
T85 /workspace/coverage/cover_reg_top/3.xbar_random.765655142 Dec 24 02:09:57 PM PST 23 Dec 24 02:10:43 PM PST 23 1283870800 ps
T216 /workspace/coverage/cover_reg_top/38.xbar_access_same_device_slow_rsp.1934219714 Dec 24 02:12:12 PM PST 23 Dec 24 02:28:45 PM PST 23 57821759034 ps
T95 /workspace/coverage/cover_reg_top/80.xbar_random_zero_delays.1803411408 Dec 24 02:15:43 PM PST 23 Dec 24 02:15:57 PM PST 23 83122009 ps
T81 /workspace/coverage/cover_reg_top/84.xbar_stress_all_with_rand_reset.4056250697 Dec 24 02:15:54 PM PST 23 Dec 24 02:21:32 PM PST 23 2250437010 ps
T354 /workspace/coverage/cover_reg_top/90.xbar_access_same_device_slow_rsp.4280447282 Dec 24 02:16:07 PM PST 23 Dec 24 02:41:42 PM PST 23 92836138898 ps
T210 /workspace/coverage/cover_reg_top/78.xbar_smoke_large_delays.263080015 Dec 24 02:15:29 PM PST 23 Dec 24 02:16:37 PM PST 23 6358050147 ps
T219 /workspace/coverage/cover_reg_top/25.xbar_stress_all_with_error.197992621 Dec 24 02:11:21 PM PST 23 Dec 24 02:15:17 PM PST 23 2871947726 ps
T218 /workspace/coverage/cover_reg_top/69.xbar_stress_all_with_error.1661984327 Dec 24 02:14:35 PM PST 23 Dec 24 02:17:50 PM PST 23 2639169831 ps
T106 /workspace/coverage/cover_reg_top/97.xbar_random_slow_rsp.1472332064 Dec 24 02:16:56 PM PST 23 Dec 24 02:33:07 PM PST 23 56779841376 ps
T281 /workspace/coverage/cover_reg_top/51.xbar_smoke_zero_delays.3406323975 Dec 24 02:13:28 PM PST 23 Dec 24 02:13:36 PM PST 23 47980027 ps
T142 /workspace/coverage/cover_reg_top/75.xbar_smoke_slow_rsp.4152870172 Dec 24 02:15:16 PM PST 23 Dec 24 02:16:56 PM PST 23 6520734066 ps
T421 /workspace/coverage/cover_reg_top/96.xbar_smoke.571674461 Dec 24 02:16:40 PM PST 23 Dec 24 02:16:54 PM PST 23 222104582 ps
T108 /workspace/coverage/cover_reg_top/76.xbar_stress_all_with_rand_reset.868131979 Dec 24 02:15:24 PM PST 23 Dec 24 02:19:35 PM PST 23 788354611 ps
T422 /workspace/coverage/cover_reg_top/58.xbar_stress_all_with_reset_error.417899413 Dec 24 02:13:44 PM PST 23 Dec 24 02:14:33 PM PST 23 103877909 ps
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