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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
86.49 88.61 85.76 70.93 86.47 88.35 98.80


Total test records in report: 1927
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T1032 /workspace/coverage/cover_reg_top/43.xbar_random_large_delays.3732015444 Dec 31 01:40:09 PM PST 23 Dec 31 01:41:14 PM PST 23 5367332370 ps
T1033 /workspace/coverage/cover_reg_top/71.xbar_unmapped_addr.1659818587 Dec 31 01:41:57 PM PST 23 Dec 31 01:42:04 PM PST 23 69960504 ps
T1034 /workspace/coverage/cover_reg_top/33.xbar_stress_all.3895946721 Dec 31 01:38:25 PM PST 23 Dec 31 01:43:21 PM PST 23 3607479689 ps
T1035 /workspace/coverage/cover_reg_top/91.xbar_same_source.2373851782 Dec 31 01:44:17 PM PST 23 Dec 31 01:45:03 PM PST 23 1401670917 ps
T1036 /workspace/coverage/cover_reg_top/13.xbar_same_source.232169645 Dec 31 01:36:38 PM PST 23 Dec 31 01:36:54 PM PST 23 434108254 ps
T1037 /workspace/coverage/cover_reg_top/29.xbar_same_source.4096955911 Dec 31 01:37:46 PM PST 23 Dec 31 01:38:32 PM PST 23 1387254799 ps
T1038 /workspace/coverage/cover_reg_top/72.xbar_unmapped_addr.3701642735 Dec 31 01:42:03 PM PST 23 Dec 31 01:42:28 PM PST 23 190301386 ps
T51 /workspace/coverage/cover_reg_top/12.chip_same_csr_outstanding.4294389253 Dec 31 01:35:58 PM PST 23 Dec 31 02:30:32 PM PST 23 30819418391 ps
T1039 /workspace/coverage/cover_reg_top/49.xbar_smoke_zero_delays.1613971186 Dec 31 01:40:16 PM PST 23 Dec 31 01:40:25 PM PST 23 44959201 ps
T1040 /workspace/coverage/cover_reg_top/82.xbar_stress_all_with_reset_error.3933779829 Dec 31 01:43:16 PM PST 23 Dec 31 01:43:48 PM PST 23 75956536 ps
T1041 /workspace/coverage/cover_reg_top/30.xbar_smoke_large_delays.3739562220 Dec 31 01:39:10 PM PST 23 Dec 31 01:40:18 PM PST 23 6338574422 ps
T1042 /workspace/coverage/cover_reg_top/29.xbar_unmapped_addr.829142011 Dec 31 01:37:41 PM PST 23 Dec 31 01:38:14 PM PST 23 709403732 ps
T1043 /workspace/coverage/cover_reg_top/20.xbar_access_same_device.3942921454 Dec 31 01:36:37 PM PST 23 Dec 31 01:38:13 PM PST 23 2120144269 ps
T1044 /workspace/coverage/cover_reg_top/27.xbar_stress_all.2968597226 Dec 31 01:37:43 PM PST 23 Dec 31 01:39:21 PM PST 23 1083474451 ps
T1045 /workspace/coverage/cover_reg_top/21.xbar_same_source.3466719680 Dec 31 01:37:10 PM PST 23 Dec 31 01:37:55 PM PST 23 1398195291 ps
T1046 /workspace/coverage/cover_reg_top/1.chip_csr_aliasing.3109452299 Dec 31 01:34:10 PM PST 23 Dec 31 03:07:35 PM PST 23 37509669680 ps
T1047 /workspace/coverage/cover_reg_top/38.xbar_smoke.1169550281 Dec 31 01:39:30 PM PST 23 Dec 31 01:39:42 PM PST 23 50099940 ps
T1048 /workspace/coverage/cover_reg_top/23.xbar_smoke_slow_rsp.1812738606 Dec 31 01:36:57 PM PST 23 Dec 31 01:38:37 PM PST 23 5717253218 ps
T1049 /workspace/coverage/cover_reg_top/3.chip_csr_rw.90938374 Dec 31 01:34:53 PM PST 23 Dec 31 01:41:00 PM PST 23 3607507640 ps
T1050 /workspace/coverage/cover_reg_top/66.xbar_smoke_slow_rsp.1568226354 Dec 31 01:41:25 PM PST 23 Dec 31 01:42:52 PM PST 23 4658929220 ps
T1051 /workspace/coverage/cover_reg_top/90.xbar_smoke_large_delays.2132985577 Dec 31 01:44:13 PM PST 23 Dec 31 01:45:55 PM PST 23 8886413096 ps
T1052 /workspace/coverage/cover_reg_top/3.xbar_error_and_unmapped_addr.3737958339 Dec 31 01:34:26 PM PST 23 Dec 31 01:34:46 PM PST 23 198308643 ps
T1053 /workspace/coverage/cover_reg_top/34.xbar_smoke.1860205693 Dec 31 01:38:23 PM PST 23 Dec 31 01:38:35 PM PST 23 240480281 ps
T1054 /workspace/coverage/cover_reg_top/78.xbar_random_slow_rsp.223776493 Dec 31 01:42:51 PM PST 23 Dec 31 01:43:53 PM PST 23 3301361761 ps
T1055 /workspace/coverage/cover_reg_top/53.xbar_smoke_slow_rsp.4180771066 Dec 31 01:40:17 PM PST 23 Dec 31 01:41:47 PM PST 23 4916094565 ps
T1056 /workspace/coverage/cover_reg_top/19.xbar_access_same_device.1324554242 Dec 31 01:37:15 PM PST 23 Dec 31 01:38:24 PM PST 23 825862050 ps
T1057 /workspace/coverage/cover_reg_top/83.xbar_stress_all_with_error.603886968 Dec 31 01:43:16 PM PST 23 Dec 31 01:47:12 PM PST 23 7289083653 ps
T1058 /workspace/coverage/cover_reg_top/72.xbar_access_same_device.1089087956 Dec 31 01:42:26 PM PST 23 Dec 31 01:43:30 PM PST 23 1494105157 ps
T1059 /workspace/coverage/cover_reg_top/7.xbar_stress_all_with_error.523547044 Dec 31 01:34:57 PM PST 23 Dec 31 01:36:49 PM PST 23 3262486848 ps
T1060 /workspace/coverage/cover_reg_top/18.xbar_random_slow_rsp.3050648760 Dec 31 01:36:34 PM PST 23 Dec 31 01:39:03 PM PST 23 9194850597 ps
T1061 /workspace/coverage/cover_reg_top/99.xbar_random_large_delays.3158048310 Dec 31 01:44:47 PM PST 23 Dec 31 01:46:35 PM PST 23 9992033050 ps
T1062 /workspace/coverage/cover_reg_top/57.xbar_access_same_device_slow_rsp.3624550227 Dec 31 01:40:47 PM PST 23 Dec 31 01:56:12 PM PST 23 56006773568 ps
T1063 /workspace/coverage/cover_reg_top/71.xbar_smoke_slow_rsp.3498597767 Dec 31 01:41:59 PM PST 23 Dec 31 01:43:09 PM PST 23 3981795526 ps
T1064 /workspace/coverage/cover_reg_top/63.xbar_random_zero_delays.3787227938 Dec 31 01:41:18 PM PST 23 Dec 31 01:41:57 PM PST 23 413694059 ps
T1065 /workspace/coverage/cover_reg_top/63.xbar_random_large_delays.3929809044 Dec 31 01:41:23 PM PST 23 Dec 31 01:43:57 PM PST 23 15400532715 ps
T1066 /workspace/coverage/cover_reg_top/58.xbar_random_large_delays.1459035937 Dec 31 01:40:49 PM PST 23 Dec 31 01:56:03 PM PST 23 82115708495 ps
T1067 /workspace/coverage/cover_reg_top/6.xbar_stress_all_with_error.2101648045 Dec 31 01:35:05 PM PST 23 Dec 31 01:40:55 PM PST 23 9645558818 ps
T1068 /workspace/coverage/cover_reg_top/39.xbar_unmapped_addr.1079599682 Dec 31 01:38:55 PM PST 23 Dec 31 01:39:05 PM PST 23 50618935 ps
T1069 /workspace/coverage/cover_reg_top/25.xbar_unmapped_addr.4242235808 Dec 31 01:36:53 PM PST 23 Dec 31 01:37:20 PM PST 23 427580568 ps
T1070 /workspace/coverage/cover_reg_top/99.xbar_smoke_zero_delays.556627275 Dec 31 01:44:40 PM PST 23 Dec 31 01:44:47 PM PST 23 41226731 ps
T1071 /workspace/coverage/cover_reg_top/76.xbar_random_slow_rsp.307178162 Dec 31 01:42:51 PM PST 23 Dec 31 01:44:14 PM PST 23 4492894548 ps
T1072 /workspace/coverage/cover_reg_top/53.xbar_smoke_zero_delays.975868614 Dec 31 01:40:17 PM PST 23 Dec 31 01:40:26 PM PST 23 45232183 ps
T1073 /workspace/coverage/cover_reg_top/58.xbar_random.964097498 Dec 31 01:40:50 PM PST 23 Dec 31 01:41:34 PM PST 23 475313499 ps
T1074 /workspace/coverage/cover_reg_top/17.xbar_stress_all_with_rand_reset.3945369468 Dec 31 01:36:03 PM PST 23 Dec 31 01:42:01 PM PST 23 3608091333 ps
T1075 /workspace/coverage/cover_reg_top/62.xbar_random_zero_delays.4134561094 Dec 31 01:41:53 PM PST 23 Dec 31 01:42:11 PM PST 23 194916738 ps
T1076 /workspace/coverage/cover_reg_top/88.xbar_stress_all_with_error.1807058816 Dec 31 01:44:16 PM PST 23 Dec 31 01:52:54 PM PST 23 15350895809 ps
T1077 /workspace/coverage/cover_reg_top/18.xbar_smoke.3377126553 Dec 31 01:38:53 PM PST 23 Dec 31 01:39:04 PM PST 23 252632863 ps
T1078 /workspace/coverage/cover_reg_top/95.xbar_smoke_slow_rsp.3686270911 Dec 31 01:45:44 PM PST 23 Dec 31 01:46:30 PM PST 23 2388536760 ps
T1079 /workspace/coverage/cover_reg_top/13.xbar_random_slow_rsp.3116972497 Dec 31 01:36:36 PM PST 23 Dec 31 01:39:57 PM PST 23 10798380604 ps
T1080 /workspace/coverage/cover_reg_top/57.xbar_same_source.2453083729 Dec 31 01:40:46 PM PST 23 Dec 31 01:42:02 PM PST 23 2548068926 ps
T1081 /workspace/coverage/cover_reg_top/56.xbar_access_same_device_slow_rsp.1653914515 Dec 31 01:40:44 PM PST 23 Dec 31 02:09:31 PM PST 23 95673940365 ps
T1082 /workspace/coverage/cover_reg_top/71.xbar_access_same_device.1572585105 Dec 31 01:42:02 PM PST 23 Dec 31 01:44:00 PM PST 23 2796462719 ps
T1083 /workspace/coverage/cover_reg_top/71.xbar_stress_all_with_error.1055809357 Dec 31 01:41:58 PM PST 23 Dec 31 01:49:26 PM PST 23 12136028341 ps
T360 /workspace/coverage/cover_reg_top/41.xbar_stress_all_with_rand_reset.2727269909 Dec 31 01:39:22 PM PST 23 Dec 31 01:41:35 PM PST 23 179118182 ps
T1084 /workspace/coverage/cover_reg_top/98.xbar_stress_all_with_rand_reset.3026140708 Dec 31 01:44:47 PM PST 23 Dec 31 01:49:11 PM PST 23 1322297484 ps
T1085 /workspace/coverage/cover_reg_top/42.xbar_access_same_device_slow_rsp.893756319 Dec 31 01:40:07 PM PST 23 Dec 31 02:06:14 PM PST 23 95008549668 ps
T1086 /workspace/coverage/cover_reg_top/3.chip_csr_bit_bash.2579696237 Dec 31 01:34:29 PM PST 23 Dec 31 01:51:58 PM PST 23 10934270111 ps
T1087 /workspace/coverage/cover_reg_top/86.xbar_random_large_delays.3847084640 Dec 31 01:43:41 PM PST 23 Dec 31 01:57:37 PM PST 23 76698512729 ps
T1088 /workspace/coverage/cover_reg_top/82.xbar_random.447488082 Dec 31 01:44:01 PM PST 23 Dec 31 01:44:28 PM PST 23 698874101 ps
T1089 /workspace/coverage/cover_reg_top/38.xbar_smoke_large_delays.1955530705 Dec 31 01:39:28 PM PST 23 Dec 31 01:40:59 PM PST 23 8872909119 ps
T1090 /workspace/coverage/cover_reg_top/80.xbar_access_same_device.817685067 Dec 31 01:42:48 PM PST 23 Dec 31 01:43:50 PM PST 23 591122472 ps
T1091 /workspace/coverage/cover_reg_top/69.xbar_same_source.1065078296 Dec 31 01:41:59 PM PST 23 Dec 31 01:42:50 PM PST 23 1684560998 ps
T1092 /workspace/coverage/cover_reg_top/37.xbar_smoke_zero_delays.1791877696 Dec 31 01:39:41 PM PST 23 Dec 31 01:39:52 PM PST 23 45121184 ps
T1093 /workspace/coverage/cover_reg_top/60.xbar_smoke_zero_delays.2573262967 Dec 31 01:41:07 PM PST 23 Dec 31 01:41:14 PM PST 23 43357454 ps
T1094 /workspace/coverage/cover_reg_top/83.xbar_same_source.2478527529 Dec 31 01:43:27 PM PST 23 Dec 31 01:44:09 PM PST 23 1315103060 ps
T277 /workspace/coverage/cover_reg_top/7.chip_tl_errors.1418016408 Dec 31 01:35:05 PM PST 23 Dec 31 01:41:46 PM PST 23 4814636064 ps
T1095 /workspace/coverage/cover_reg_top/99.xbar_random_slow_rsp.4254937800 Dec 31 01:45:05 PM PST 23 Dec 31 01:56:02 PM PST 23 37322297235 ps
T1096 /workspace/coverage/cover_reg_top/21.xbar_smoke_slow_rsp.3942272353 Dec 31 01:37:09 PM PST 23 Dec 31 01:38:06 PM PST 23 3282646186 ps
T1097 /workspace/coverage/cover_reg_top/28.xbar_stress_all_with_error.2174910693 Dec 31 01:37:43 PM PST 23 Dec 31 01:40:46 PM PST 23 4884271850 ps
T1098 /workspace/coverage/cover_reg_top/10.xbar_error_random.771497853 Dec 31 01:35:26 PM PST 23 Dec 31 01:36:38 PM PST 23 2089268624 ps
T1099 /workspace/coverage/cover_reg_top/74.xbar_smoke.1175178197 Dec 31 01:42:47 PM PST 23 Dec 31 01:42:59 PM PST 23 180104801 ps
T1100 /workspace/coverage/cover_reg_top/17.xbar_access_same_device_slow_rsp.3471642460 Dec 31 01:36:05 PM PST 23 Dec 31 02:04:51 PM PST 23 97003702591 ps
T1101 /workspace/coverage/cover_reg_top/87.xbar_smoke_slow_rsp.780960446 Dec 31 01:43:33 PM PST 23 Dec 31 01:44:49 PM PST 23 4655553636 ps
T1102 /workspace/coverage/cover_reg_top/84.xbar_unmapped_addr.3218489144 Dec 31 01:44:07 PM PST 23 Dec 31 01:44:32 PM PST 23 519599194 ps
T1103 /workspace/coverage/cover_reg_top/32.xbar_error_and_unmapped_addr.3019807915 Dec 31 01:38:21 PM PST 23 Dec 31 01:38:37 PM PST 23 330848255 ps
T1104 /workspace/coverage/cover_reg_top/6.xbar_same_source.3179838837 Dec 31 01:35:02 PM PST 23 Dec 31 01:35:43 PM PST 23 538531946 ps
T1105 /workspace/coverage/cover_reg_top/91.xbar_stress_all_with_error.2855199972 Dec 31 01:45:16 PM PST 23 Dec 31 01:47:11 PM PST 23 1442431193 ps
T1106 /workspace/coverage/cover_reg_top/71.xbar_smoke_zero_delays.3604083829 Dec 31 01:42:03 PM PST 23 Dec 31 01:42:09 PM PST 23 41860468 ps
T1107 /workspace/coverage/cover_reg_top/20.xbar_unmapped_addr.2788801376 Dec 31 01:36:41 PM PST 23 Dec 31 01:37:25 PM PST 23 985657509 ps
T1108 /workspace/coverage/cover_reg_top/45.xbar_stress_all.1244248217 Dec 31 01:40:17 PM PST 23 Dec 31 01:43:11 PM PST 23 2155575349 ps
T1109 /workspace/coverage/cover_reg_top/59.xbar_smoke_large_delays.372773430 Dec 31 01:41:18 PM PST 23 Dec 31 01:42:46 PM PST 23 7886572387 ps
T1110 /workspace/coverage/cover_reg_top/61.xbar_access_same_device.2505171053 Dec 31 01:41:17 PM PST 23 Dec 31 01:42:34 PM PST 23 978967813 ps
T1111 /workspace/coverage/cover_reg_top/61.xbar_smoke.2955388061 Dec 31 01:41:30 PM PST 23 Dec 31 01:41:38 PM PST 23 150487241 ps
T1112 /workspace/coverage/cover_reg_top/12.xbar_same_source.2488321334 Dec 31 01:35:33 PM PST 23 Dec 31 01:36:45 PM PST 23 2282879684 ps
T1113 /workspace/coverage/cover_reg_top/89.xbar_stress_all_with_reset_error.3744881529 Dec 31 01:44:07 PM PST 23 Dec 31 01:44:59 PM PST 23 207366966 ps
T1114 /workspace/coverage/cover_reg_top/20.xbar_same_source.1816415680 Dec 31 01:36:37 PM PST 23 Dec 31 01:36:59 PM PST 23 279395034 ps
T1115 /workspace/coverage/cover_reg_top/57.xbar_unmapped_addr.1746474131 Dec 31 01:40:47 PM PST 23 Dec 31 01:41:13 PM PST 23 195775863 ps
T1116 /workspace/coverage/cover_reg_top/6.xbar_error_random.2091542164 Dec 31 01:35:17 PM PST 23 Dec 31 01:35:34 PM PST 23 432379809 ps
T353 /workspace/coverage/cover_reg_top/86.xbar_stress_all_with_reset_error.3872701318 Dec 31 01:43:35 PM PST 23 Dec 31 01:48:04 PM PST 23 5871900805 ps
T1117 /workspace/coverage/cover_reg_top/60.xbar_random_slow_rsp.1663470801 Dec 31 01:41:24 PM PST 23 Dec 31 01:54:22 PM PST 23 41618820053 ps
T1118 /workspace/coverage/cover_reg_top/39.xbar_access_same_device.169349440 Dec 31 01:39:24 PM PST 23 Dec 31 01:40:12 PM PST 23 1088580820 ps
T1119 /workspace/coverage/cover_reg_top/4.chip_tl_errors.2652499883 Dec 31 01:34:37 PM PST 23 Dec 31 01:37:28 PM PST 23 3132576888 ps
T1120 /workspace/coverage/cover_reg_top/60.xbar_stress_all_with_error.2269649727 Dec 31 01:41:25 PM PST 23 Dec 31 01:44:34 PM PST 23 2317147557 ps
T1121 /workspace/coverage/cover_reg_top/42.xbar_random_slow_rsp.517869561 Dec 31 01:40:07 PM PST 23 Dec 31 01:57:43 PM PST 23 62596268632 ps
T1122 /workspace/coverage/cover_reg_top/87.xbar_same_source.3408960037 Dec 31 01:43:28 PM PST 23 Dec 31 01:43:51 PM PST 23 290713200 ps
T1123 /workspace/coverage/cover_reg_top/17.xbar_error_and_unmapped_addr.595681791 Dec 31 01:36:31 PM PST 23 Dec 31 01:36:57 PM PST 23 234216096 ps
T1124 /workspace/coverage/cover_reg_top/79.xbar_stress_all_with_error.1588426636 Dec 31 01:43:27 PM PST 23 Dec 31 01:45:34 PM PST 23 1720750952 ps
T1125 /workspace/coverage/cover_reg_top/41.xbar_random_slow_rsp.2154689525 Dec 31 01:39:44 PM PST 23 Dec 31 01:48:29 PM PST 23 30827179781 ps
T1126 /workspace/coverage/cover_reg_top/57.xbar_random_zero_delays.4168728717 Dec 31 01:40:55 PM PST 23 Dec 31 01:41:23 PM PST 23 278844725 ps
T1127 /workspace/coverage/cover_reg_top/3.chip_csr_aliasing.2630278242 Dec 31 01:34:51 PM PST 23 Dec 31 02:38:29 PM PST 23 28297334505 ps
T1128 /workspace/coverage/cover_reg_top/16.xbar_error_and_unmapped_addr.1716618023 Dec 31 01:36:32 PM PST 23 Dec 31 01:36:58 PM PST 23 240713370 ps
T1129 /workspace/coverage/cover_reg_top/18.xbar_error_random.1458036947 Dec 31 01:36:10 PM PST 23 Dec 31 01:36:34 PM PST 23 564359052 ps
T1130 /workspace/coverage/cover_reg_top/44.xbar_access_same_device_slow_rsp.1574716298 Dec 31 01:39:34 PM PST 23 Dec 31 01:52:24 PM PST 23 47126540666 ps
T1131 /workspace/coverage/cover_reg_top/63.xbar_unmapped_addr.1447161254 Dec 31 01:41:20 PM PST 23 Dec 31 01:41:55 PM PST 23 840322989 ps
T1132 /workspace/coverage/cover_reg_top/88.xbar_unmapped_addr.3697384039 Dec 31 01:44:09 PM PST 23 Dec 31 01:45:03 PM PST 23 1198092753 ps
T1133 /workspace/coverage/cover_reg_top/46.xbar_random_large_delays.3506102744 Dec 31 01:39:56 PM PST 23 Dec 31 01:43:27 PM PST 23 18631459252 ps
T1134 /workspace/coverage/cover_reg_top/73.xbar_smoke.2072435997 Dec 31 01:42:10 PM PST 23 Dec 31 01:42:18 PM PST 23 57926000 ps
T1135 /workspace/coverage/cover_reg_top/8.xbar_random_large_delays.2212759575 Dec 31 01:34:58 PM PST 23 Dec 31 01:48:55 PM PST 23 77667694898 ps
T1136 /workspace/coverage/cover_reg_top/86.xbar_error_and_unmapped_addr.3304591543 Dec 31 01:44:02 PM PST 23 Dec 31 01:44:24 PM PST 23 407539817 ps
T1137 /workspace/coverage/cover_reg_top/44.xbar_smoke_slow_rsp.780261612 Dec 31 01:40:07 PM PST 23 Dec 31 01:41:44 PM PST 23 5417628661 ps
T1138 /workspace/coverage/cover_reg_top/5.xbar_error_random.1271810844 Dec 31 01:35:05 PM PST 23 Dec 31 01:35:36 PM PST 23 334116285 ps
T1139 /workspace/coverage/cover_reg_top/49.xbar_smoke.1730786296 Dec 31 01:40:00 PM PST 23 Dec 31 01:40:15 PM PST 23 209519792 ps
T1140 /workspace/coverage/cover_reg_top/92.xbar_random_large_delays.634632314 Dec 31 01:44:14 PM PST 23 Dec 31 01:59:46 PM PST 23 91606027197 ps
T1141 /workspace/coverage/cover_reg_top/63.xbar_error_and_unmapped_addr.2379957773 Dec 31 01:41:27 PM PST 23 Dec 31 01:41:49 PM PST 23 186186039 ps
T1142 /workspace/coverage/cover_reg_top/30.xbar_access_same_device_slow_rsp.2791970012 Dec 31 01:37:48 PM PST 23 Dec 31 01:51:01 PM PST 23 49040997043 ps
T1143 /workspace/coverage/cover_reg_top/53.xbar_error_random.2917739542 Dec 31 01:40:14 PM PST 23 Dec 31 01:40:26 PM PST 23 110787470 ps
T1144 /workspace/coverage/cover_reg_top/48.xbar_smoke_zero_delays.1612576826 Dec 31 01:40:30 PM PST 23 Dec 31 01:40:37 PM PST 23 36294853 ps
T1145 /workspace/coverage/cover_reg_top/54.xbar_random.769748062 Dec 31 01:40:50 PM PST 23 Dec 31 01:41:20 PM PST 23 661665058 ps
T1146 /workspace/coverage/cover_reg_top/35.xbar_smoke_slow_rsp.832112141 Dec 31 01:39:44 PM PST 23 Dec 31 01:41:17 PM PST 23 5045555399 ps
T1147 /workspace/coverage/cover_reg_top/54.xbar_access_same_device_slow_rsp.2135807725 Dec 31 01:40:40 PM PST 23 Dec 31 02:10:05 PM PST 23 103097704610 ps
T1148 /workspace/coverage/cover_reg_top/56.xbar_smoke_slow_rsp.519789401 Dec 31 01:40:50 PM PST 23 Dec 31 01:42:08 PM PST 23 4273129614 ps
T1149 /workspace/coverage/cover_reg_top/77.xbar_access_same_device_slow_rsp.204356235 Dec 31 01:43:10 PM PST 23 Dec 31 01:56:21 PM PST 23 44803074634 ps
T1150 /workspace/coverage/cover_reg_top/53.xbar_random_zero_delays.4055396121 Dec 31 01:40:12 PM PST 23 Dec 31 01:41:01 PM PST 23 530985365 ps
T1151 /workspace/coverage/cover_reg_top/31.xbar_access_same_device_slow_rsp.953603350 Dec 31 01:39:19 PM PST 23 Dec 31 02:08:05 PM PST 23 105874795178 ps
T1152 /workspace/coverage/cover_reg_top/22.xbar_error_and_unmapped_addr.4204989812 Dec 31 01:36:54 PM PST 23 Dec 31 01:37:04 PM PST 23 39144551 ps
T1153 /workspace/coverage/cover_reg_top/48.xbar_same_source.3766426607 Dec 31 01:40:03 PM PST 23 Dec 31 01:40:19 PM PST 23 123163734 ps
T1154 /workspace/coverage/cover_reg_top/31.xbar_same_source.1021901293 Dec 31 01:39:09 PM PST 23 Dec 31 01:39:28 PM PST 23 229099063 ps
T1155 /workspace/coverage/cover_reg_top/26.xbar_stress_all_with_rand_reset.3361770273 Dec 31 01:37:53 PM PST 23 Dec 31 01:44:28 PM PST 23 6515456874 ps
T1156 /workspace/coverage/cover_reg_top/20.xbar_stress_all.2107462129 Dec 31 01:37:10 PM PST 23 Dec 31 01:47:43 PM PST 23 16440677333 ps
T1157 /workspace/coverage/cover_reg_top/85.xbar_access_same_device_slow_rsp.2075793243 Dec 31 01:43:36 PM PST 23 Dec 31 01:49:52 PM PST 23 24267359838 ps
T251 /workspace/coverage/cover_reg_top/65.xbar_stress_all_with_reset_error.2239552992 Dec 31 01:41:57 PM PST 23 Dec 31 01:54:23 PM PST 23 19272828936 ps
T1158 /workspace/coverage/cover_reg_top/22.xbar_random_large_delays.1621237592 Dec 31 01:37:20 PM PST 23 Dec 31 01:38:29 PM PST 23 5890628694 ps
T1159 /workspace/coverage/cover_reg_top/27.xbar_error_random.2535118934 Dec 31 01:37:39 PM PST 23 Dec 31 01:38:17 PM PST 23 479189850 ps
T1160 /workspace/coverage/cover_reg_top/13.xbar_random.1396075012 Dec 31 01:37:14 PM PST 23 Dec 31 01:37:52 PM PST 23 1008101186 ps
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T1235 /workspace/coverage/cover_reg_top/69.xbar_unmapped_addr.822253916 Dec 31 01:42:42 PM PST 23 Dec 31 01:43:19 PM PST 23 309068015 ps
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T1240 /workspace/coverage/cover_reg_top/19.xbar_random_large_delays.2752159518 Dec 31 01:37:13 PM PST 23 Dec 31 01:46:28 PM PST 23 53476983119 ps
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T342 /workspace/coverage/cover_reg_top/77.xbar_stress_all_with_rand_reset.1525716449 Dec 31 01:42:34 PM PST 23 Dec 31 01:47:39 PM PST 23 647350289 ps
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