| T1514 |
/workspace/coverage/cover_reg_top/83.xbar_random.845986915 |
|
|
Dec 31 01:43:16 PM PST 23 |
Dec 31 01:43:39 PM PST 23 |
225268524 ps |
| T1515 |
/workspace/coverage/cover_reg_top/60.xbar_same_source.2106408430 |
|
|
Dec 31 01:41:25 PM PST 23 |
Dec 31 01:41:33 PM PST 23 |
66838781 ps |
| T1516 |
/workspace/coverage/cover_reg_top/37.xbar_random_large_delays.1765689420 |
|
|
Dec 31 01:39:58 PM PST 23 |
Dec 31 01:58:33 PM PST 23 |
105534377992 ps |
| T1517 |
/workspace/coverage/cover_reg_top/49.xbar_stress_all_with_error.3754208773 |
|
|
Dec 31 01:40:09 PM PST 23 |
Dec 31 01:41:04 PM PST 23 |
774309358 ps |
| T1518 |
/workspace/coverage/cover_reg_top/47.xbar_random_slow_rsp.2746424754 |
|
|
Dec 31 01:39:59 PM PST 23 |
Dec 31 01:48:57 PM PST 23 |
28584246979 ps |
| T1519 |
/workspace/coverage/cover_reg_top/40.xbar_smoke_large_delays.2968935127 |
|
|
Dec 31 01:38:54 PM PST 23 |
Dec 31 01:40:28 PM PST 23 |
8094295832 ps |
| T1520 |
/workspace/coverage/cover_reg_top/21.xbar_smoke.2604506127 |
|
|
Dec 31 01:36:41 PM PST 23 |
Dec 31 01:36:52 PM PST 23 |
234714396 ps |
| T1521 |
/workspace/coverage/cover_reg_top/72.xbar_stress_all.2979578576 |
|
|
Dec 31 01:42:03 PM PST 23 |
Dec 31 01:48:15 PM PST 23 |
10278346927 ps |
| T1522 |
/workspace/coverage/cover_reg_top/72.xbar_smoke.2324384490 |
|
|
Dec 31 01:41:59 PM PST 23 |
Dec 31 01:42:08 PM PST 23 |
166883821 ps |
| T1523 |
/workspace/coverage/cover_reg_top/51.xbar_smoke_zero_delays.2103596715 |
|
|
Dec 31 01:40:09 PM PST 23 |
Dec 31 01:40:18 PM PST 23 |
42853390 ps |
| T1524 |
/workspace/coverage/cover_reg_top/26.xbar_random.4108345429 |
|
|
Dec 31 01:38:27 PM PST 23 |
Dec 31 01:39:57 PM PST 23 |
2295857660 ps |
| T1525 |
/workspace/coverage/cover_reg_top/12.xbar_unmapped_addr.2815085822 |
|
|
Dec 31 01:36:33 PM PST 23 |
Dec 31 01:36:40 PM PST 23 |
37897117 ps |
| T1526 |
/workspace/coverage/cover_reg_top/67.xbar_random_zero_delays.838871970 |
|
|
Dec 31 01:41:55 PM PST 23 |
Dec 31 01:42:08 PM PST 23 |
110555907 ps |
| T1527 |
/workspace/coverage/cover_reg_top/5.xbar_stress_all_with_reset_error.548026562 |
|
|
Dec 31 01:35:02 PM PST 23 |
Dec 31 01:38:21 PM PST 23 |
2015492700 ps |
| T1528 |
/workspace/coverage/cover_reg_top/34.xbar_same_source.3858493090 |
|
|
Dec 31 01:39:10 PM PST 23 |
Dec 31 01:40:07 PM PST 23 |
1895588046 ps |
| T1529 |
/workspace/coverage/cover_reg_top/64.xbar_random.1260985129 |
|
|
Dec 31 01:41:28 PM PST 23 |
Dec 31 01:42:03 PM PST 23 |
881153791 ps |
| T1530 |
/workspace/coverage/cover_reg_top/3.xbar_random_large_delays.2126128689 |
|
|
Dec 31 01:34:20 PM PST 23 |
Dec 31 01:49:33 PM PST 23 |
86508397364 ps |
| T1531 |
/workspace/coverage/cover_reg_top/83.xbar_random_zero_delays.1801576190 |
|
|
Dec 31 01:43:16 PM PST 23 |
Dec 31 01:44:08 PM PST 23 |
591232744 ps |
| T1532 |
/workspace/coverage/cover_reg_top/73.xbar_same_source.2134460457 |
|
|
Dec 31 01:42:45 PM PST 23 |
Dec 31 01:42:53 PM PST 23 |
179978075 ps |
| T1533 |
/workspace/coverage/cover_reg_top/35.xbar_smoke_large_delays.1982233545 |
|
|
Dec 31 01:40:10 PM PST 23 |
Dec 31 01:41:18 PM PST 23 |
6519284935 ps |
| T1534 |
/workspace/coverage/cover_reg_top/33.xbar_stress_all_with_rand_reset.3751912456 |
|
|
Dec 31 01:38:25 PM PST 23 |
Dec 31 01:43:27 PM PST 23 |
7780119946 ps |
| T1535 |
/workspace/coverage/cover_reg_top/24.xbar_same_source.3545247840 |
|
|
Dec 31 01:37:16 PM PST 23 |
Dec 31 01:38:04 PM PST 23 |
1396168522 ps |
| T1536 |
/workspace/coverage/cover_reg_top/30.xbar_random.1999675148 |
|
|
Dec 31 01:39:15 PM PST 23 |
Dec 31 01:39:37 PM PST 23 |
236834763 ps |
| T1537 |
/workspace/coverage/cover_reg_top/64.xbar_stress_all_with_reset_error.605183442 |
|
|
Dec 31 01:41:22 PM PST 23 |
Dec 31 01:42:38 PM PST 23 |
357807591 ps |
| T1538 |
/workspace/coverage/cover_reg_top/40.xbar_stress_all_with_error.895829645 |
|
|
Dec 31 01:39:37 PM PST 23 |
Dec 31 01:43:37 PM PST 23 |
3135649659 ps |
| T1539 |
/workspace/coverage/cover_reg_top/14.xbar_access_same_device.3586355811 |
|
|
Dec 31 01:36:04 PM PST 23 |
Dec 31 01:37:18 PM PST 23 |
1227368454 ps |
| T1540 |
/workspace/coverage/cover_reg_top/84.xbar_access_same_device_slow_rsp.81833751 |
|
|
Dec 31 01:43:26 PM PST 23 |
Dec 31 02:25:29 PM PST 23 |
155286089071 ps |
| T1541 |
/workspace/coverage/cover_reg_top/1.chip_same_csr_outstanding.3342517627 |
|
|
Dec 31 01:34:04 PM PST 23 |
Dec 31 02:19:27 PM PST 23 |
29912450941 ps |
| T1542 |
/workspace/coverage/cover_reg_top/3.xbar_stress_all_with_error.2197604201 |
|
|
Dec 31 01:34:24 PM PST 23 |
Dec 31 01:36:27 PM PST 23 |
1502492134 ps |
| T1543 |
/workspace/coverage/cover_reg_top/61.xbar_random_large_delays.4097805856 |
|
|
Dec 31 01:41:16 PM PST 23 |
Dec 31 01:51:57 PM PST 23 |
59604703541 ps |
| T1544 |
/workspace/coverage/cover_reg_top/25.xbar_stress_all_with_reset_error.414972659 |
|
|
Dec 31 01:37:49 PM PST 23 |
Dec 31 01:38:13 PM PST 23 |
98352007 ps |
| T1545 |
/workspace/coverage/cover_reg_top/59.xbar_access_same_device_slow_rsp.3045039010 |
|
|
Dec 31 01:40:46 PM PST 23 |
Dec 31 02:08:56 PM PST 23 |
101630544719 ps |
| T1546 |
/workspace/coverage/cover_reg_top/49.xbar_random_large_delays.863062367 |
|
|
Dec 31 01:40:07 PM PST 23 |
Dec 31 01:44:12 PM PST 23 |
23646761230 ps |
| T1547 |
/workspace/coverage/cover_reg_top/14.chip_tl_errors.2443139488 |
|
|
Dec 31 01:37:20 PM PST 23 |
Dec 31 01:39:39 PM PST 23 |
3220576559 ps |
| T1548 |
/workspace/coverage/cover_reg_top/56.xbar_random_slow_rsp.3971151007 |
|
|
Dec 31 01:40:49 PM PST 23 |
Dec 31 01:48:03 PM PST 23 |
25345583582 ps |
| T1549 |
/workspace/coverage/cover_reg_top/55.xbar_unmapped_addr.1362459733 |
|
|
Dec 31 01:40:51 PM PST 23 |
Dec 31 01:41:16 PM PST 23 |
188203875 ps |
| T1550 |
/workspace/coverage/cover_reg_top/50.xbar_error_and_unmapped_addr.3455027772 |
|
|
Dec 31 01:40:08 PM PST 23 |
Dec 31 01:40:46 PM PST 23 |
323185597 ps |
| T1551 |
/workspace/coverage/cover_reg_top/13.xbar_smoke.3904345082 |
|
|
Dec 31 01:36:39 PM PST 23 |
Dec 31 01:36:46 PM PST 23 |
51358294 ps |
| T1552 |
/workspace/coverage/cover_reg_top/13.xbar_access_same_device.1381880020 |
|
|
Dec 31 01:36:39 PM PST 23 |
Dec 31 01:37:49 PM PST 23 |
1631022224 ps |
| T1553 |
/workspace/coverage/cover_reg_top/82.xbar_random_slow_rsp.1460728515 |
|
|
Dec 31 01:44:04 PM PST 23 |
Dec 31 01:52:01 PM PST 23 |
26555841635 ps |
| T1554 |
/workspace/coverage/cover_reg_top/12.xbar_random.299774128 |
|
|
Dec 31 01:36:00 PM PST 23 |
Dec 31 01:36:14 PM PST 23 |
116672940 ps |
| T352 |
/workspace/coverage/cover_reg_top/71.xbar_stress_all_with_reset_error.2562320012 |
|
|
Dec 31 01:41:59 PM PST 23 |
Dec 31 01:45:52 PM PST 23 |
2000477820 ps |
| T1555 |
/workspace/coverage/cover_reg_top/78.xbar_error_random.3444354188 |
|
|
Dec 31 01:42:55 PM PST 23 |
Dec 31 01:43:32 PM PST 23 |
943685486 ps |
| T1556 |
/workspace/coverage/cover_reg_top/54.xbar_random_zero_delays.871161046 |
|
|
Dec 31 01:40:45 PM PST 23 |
Dec 31 01:41:42 PM PST 23 |
581914425 ps |
| T1557 |
/workspace/coverage/cover_reg_top/96.xbar_smoke.1345398178 |
|
|
Dec 31 01:44:51 PM PST 23 |
Dec 31 01:45:00 PM PST 23 |
204843367 ps |
| T1558 |
/workspace/coverage/cover_reg_top/35.xbar_error_and_unmapped_addr.1942344504 |
|
|
Dec 31 01:38:21 PM PST 23 |
Dec 31 01:38:46 PM PST 23 |
592817723 ps |
| T1559 |
/workspace/coverage/cover_reg_top/90.xbar_same_source.2603435977 |
|
|
Dec 31 01:44:17 PM PST 23 |
Dec 31 01:44:57 PM PST 23 |
517036873 ps |
| T1560 |
/workspace/coverage/cover_reg_top/82.xbar_error_random.2724031366 |
|
|
Dec 31 01:44:03 PM PST 23 |
Dec 31 01:44:16 PM PST 23 |
287771466 ps |
| T1561 |
/workspace/coverage/cover_reg_top/76.xbar_stress_all.2028431714 |
|
|
Dec 31 01:43:09 PM PST 23 |
Dec 31 01:50:08 PM PST 23 |
12513858227 ps |
| T1562 |
/workspace/coverage/cover_reg_top/3.xbar_stress_all_with_rand_reset.808863326 |
|
|
Dec 31 01:34:27 PM PST 23 |
Dec 31 01:36:45 PM PST 23 |
424343080 ps |
| T1563 |
/workspace/coverage/cover_reg_top/9.xbar_random.3151781385 |
|
|
Dec 31 01:35:31 PM PST 23 |
Dec 31 01:36:11 PM PST 23 |
412737886 ps |
| T1564 |
/workspace/coverage/cover_reg_top/50.xbar_access_same_device_slow_rsp.1030832556 |
|
|
Dec 31 01:40:09 PM PST 23 |
Dec 31 01:54:12 PM PST 23 |
48236933457 ps |
| T1565 |
/workspace/coverage/cover_reg_top/22.xbar_smoke.3302163916 |
|
|
Dec 31 01:36:57 PM PST 23 |
Dec 31 01:37:09 PM PST 23 |
171359124 ps |
| T1566 |
/workspace/coverage/cover_reg_top/72.xbar_smoke_zero_delays.3908513120 |
|
|
Dec 31 01:42:17 PM PST 23 |
Dec 31 01:42:24 PM PST 23 |
46383336 ps |
| T43 |
/workspace/coverage/cover_reg_top/0.chip_prim_tl_access.890907192 |
|
|
Dec 31 01:34:37 PM PST 23 |
Dec 31 01:39:11 PM PST 23 |
7698581678 ps |
| T1567 |
/workspace/coverage/cover_reg_top/12.xbar_smoke.1222072322 |
|
|
Dec 31 01:35:28 PM PST 23 |
Dec 31 01:35:35 PM PST 23 |
37266472 ps |
| T1568 |
/workspace/coverage/cover_reg_top/38.xbar_random.3900322569 |
|
|
Dec 31 01:39:30 PM PST 23 |
Dec 31 01:40:08 PM PST 23 |
1062911465 ps |
| T1569 |
/workspace/coverage/cover_reg_top/41.xbar_access_same_device.3001316989 |
|
|
Dec 31 01:39:16 PM PST 23 |
Dec 31 01:41:01 PM PST 23 |
2632331853 ps |
| T1570 |
/workspace/coverage/cover_reg_top/53.xbar_same_source.2528857985 |
|
|
Dec 31 01:40:14 PM PST 23 |
Dec 31 01:40:46 PM PST 23 |
432432752 ps |
| T1571 |
/workspace/coverage/cover_reg_top/46.xbar_error_random.468137469 |
|
|
Dec 31 01:40:19 PM PST 23 |
Dec 31 01:41:21 PM PST 23 |
1582876565 ps |
| T349 |
/workspace/coverage/cover_reg_top/7.xbar_stress_all_with_reset_error.1916911442 |
|
|
Dec 31 01:35:03 PM PST 23 |
Dec 31 01:38:22 PM PST 23 |
2609628561 ps |
| T1572 |
/workspace/coverage/cover_reg_top/5.chip_csr_rw.2118885497 |
|
|
Dec 31 01:34:51 PM PST 23 |
Dec 31 01:43:58 PM PST 23 |
5262853549 ps |
| T363 |
/workspace/coverage/cover_reg_top/96.xbar_stress_all_with_reset_error.1961217808 |
|
|
Dec 31 01:45:19 PM PST 23 |
Dec 31 01:51:11 PM PST 23 |
4561072476 ps |
| T1573 |
/workspace/coverage/cover_reg_top/9.xbar_stress_all_with_reset_error.1711786921 |
|
|
Dec 31 01:35:36 PM PST 23 |
Dec 31 01:39:49 PM PST 23 |
3504791682 ps |
| T1574 |
/workspace/coverage/cover_reg_top/92.xbar_smoke.3879321981 |
|
|
Dec 31 01:44:14 PM PST 23 |
Dec 31 01:44:26 PM PST 23 |
214324168 ps |
| T1575 |
/workspace/coverage/cover_reg_top/66.xbar_smoke_large_delays.302508293 |
|
|
Dec 31 01:42:11 PM PST 23 |
Dec 31 01:44:08 PM PST 23 |
10569851292 ps |
| T1576 |
/workspace/coverage/cover_reg_top/30.xbar_error_random.1570938699 |
|
|
Dec 31 01:38:30 PM PST 23 |
Dec 31 01:38:46 PM PST 23 |
357148128 ps |
| T1577 |
/workspace/coverage/cover_reg_top/96.xbar_same_source.2780477276 |
|
|
Dec 31 01:44:37 PM PST 23 |
Dec 31 01:45:05 PM PST 23 |
356090197 ps |
| T1578 |
/workspace/coverage/cover_reg_top/76.xbar_same_source.3430647695 |
|
|
Dec 31 01:42:51 PM PST 23 |
Dec 31 01:43:22 PM PST 23 |
388767341 ps |
| T1579 |
/workspace/coverage/cover_reg_top/80.xbar_smoke_slow_rsp.2106587436 |
|
|
Dec 31 01:42:48 PM PST 23 |
Dec 31 01:44:42 PM PST 23 |
6727927320 ps |
| T1580 |
/workspace/coverage/cover_reg_top/52.xbar_smoke_slow_rsp.1974147287 |
|
|
Dec 31 01:40:01 PM PST 23 |
Dec 31 01:41:55 PM PST 23 |
5979606749 ps |
| T1581 |
/workspace/coverage/cover_reg_top/56.xbar_random.2165917033 |
|
|
Dec 31 01:40:45 PM PST 23 |
Dec 31 01:41:24 PM PST 23 |
377125505 ps |
| T1582 |
/workspace/coverage/cover_reg_top/41.xbar_smoke_large_delays.27243038 |
|
|
Dec 31 01:39:35 PM PST 23 |
Dec 31 01:41:10 PM PST 23 |
8106576239 ps |
| T1583 |
/workspace/coverage/cover_reg_top/33.xbar_smoke_zero_delays.1296100403 |
|
|
Dec 31 01:38:23 PM PST 23 |
Dec 31 01:38:30 PM PST 23 |
39386440 ps |
| T1584 |
/workspace/coverage/cover_reg_top/22.xbar_stress_all.2581790984 |
|
|
Dec 31 01:36:57 PM PST 23 |
Dec 31 01:40:14 PM PST 23 |
2084008542 ps |
| T1585 |
/workspace/coverage/cover_reg_top/50.xbar_unmapped_addr.1084416261 |
|
|
Dec 31 01:40:04 PM PST 23 |
Dec 31 01:40:22 PM PST 23 |
98624449 ps |
| T1586 |
/workspace/coverage/cover_reg_top/78.xbar_stress_all_with_rand_reset.1562028993 |
|
|
Dec 31 01:43:10 PM PST 23 |
Dec 31 01:46:34 PM PST 23 |
1654067210 ps |
| T1587 |
/workspace/coverage/cover_reg_top/62.xbar_unmapped_addr.2805328561 |
|
|
Dec 31 01:42:13 PM PST 23 |
Dec 31 01:43:13 PM PST 23 |
1378834453 ps |
| T1588 |
/workspace/coverage/cover_reg_top/3.xbar_same_source.3776743876 |
|
|
Dec 31 01:34:47 PM PST 23 |
Dec 31 01:35:41 PM PST 23 |
1737274472 ps |
| T1589 |
/workspace/coverage/cover_reg_top/37.xbar_random.2316810692 |
|
|
Dec 31 01:38:25 PM PST 23 |
Dec 31 01:40:04 PM PST 23 |
2517188876 ps |
| T1590 |
/workspace/coverage/cover_reg_top/71.xbar_random_zero_delays.29125900 |
|
|
Dec 31 01:42:22 PM PST 23 |
Dec 31 01:42:49 PM PST 23 |
302547846 ps |
| T1591 |
/workspace/coverage/cover_reg_top/10.chip_csr_mem_rw_with_rand_reset.1559668897 |
|
|
Dec 31 01:35:38 PM PST 23 |
Dec 31 01:39:26 PM PST 23 |
5692680048 ps |
| T1592 |
/workspace/coverage/cover_reg_top/96.xbar_smoke_zero_delays.1440001655 |
|
|
Dec 31 01:44:43 PM PST 23 |
Dec 31 01:44:50 PM PST 23 |
50149400 ps |
| T1593 |
/workspace/coverage/cover_reg_top/41.xbar_stress_all.3056867490 |
|
|
Dec 31 01:39:27 PM PST 23 |
Dec 31 01:40:54 PM PST 23 |
2596348806 ps |
| T1594 |
/workspace/coverage/cover_reg_top/58.xbar_smoke.3441747923 |
|
|
Dec 31 01:40:49 PM PST 23 |
Dec 31 01:40:57 PM PST 23 |
48759792 ps |
| T1595 |
/workspace/coverage/cover_reg_top/46.xbar_stress_all_with_reset_error.195731972 |
|
|
Dec 31 01:40:05 PM PST 23 |
Dec 31 01:44:09 PM PST 23 |
2682501868 ps |
| T1596 |
/workspace/coverage/cover_reg_top/2.xbar_stress_all.2288815295 |
|
|
Dec 31 01:33:58 PM PST 23 |
Dec 31 01:40:08 PM PST 23 |
8777957709 ps |
| T1597 |
/workspace/coverage/cover_reg_top/95.xbar_random_large_delays.4011958835 |
|
|
Dec 31 01:45:45 PM PST 23 |
Dec 31 01:57:14 PM PST 23 |
69782705977 ps |
| T1598 |
/workspace/coverage/cover_reg_top/23.xbar_random_slow_rsp.3421244505 |
|
|
Dec 31 01:37:17 PM PST 23 |
Dec 31 01:48:34 PM PST 23 |
36559450742 ps |
| T1599 |
/workspace/coverage/cover_reg_top/88.xbar_random_large_delays.2935376483 |
|
|
Dec 31 01:44:10 PM PST 23 |
Dec 31 01:46:34 PM PST 23 |
11533418618 ps |
| T1600 |
/workspace/coverage/cover_reg_top/84.xbar_stress_all_with_rand_reset.989651290 |
|
|
Dec 31 01:43:33 PM PST 23 |
Dec 31 01:49:26 PM PST 23 |
3828647060 ps |
| T1601 |
/workspace/coverage/cover_reg_top/20.xbar_error_and_unmapped_addr.1056486161 |
|
|
Dec 31 01:37:09 PM PST 23 |
Dec 31 01:37:25 PM PST 23 |
255346859 ps |
| T1602 |
/workspace/coverage/cover_reg_top/44.xbar_smoke_large_delays.3290889135 |
|
|
Dec 31 01:39:25 PM PST 23 |
Dec 31 01:40:37 PM PST 23 |
6889358747 ps |
| T1603 |
/workspace/coverage/cover_reg_top/4.chip_csr_aliasing.1989629386 |
|
|
Dec 31 01:34:23 PM PST 23 |
Dec 31 03:49:32 PM PST 23 |
54985977675 ps |
| T1604 |
/workspace/coverage/cover_reg_top/5.xbar_smoke_slow_rsp.2450674363 |
|
|
Dec 31 01:34:55 PM PST 23 |
Dec 31 01:36:33 PM PST 23 |
5612850499 ps |
| T1605 |
/workspace/coverage/cover_reg_top/1.xbar_random_large_delays.1972505902 |
|
|
Dec 31 01:34:27 PM PST 23 |
Dec 31 01:46:29 PM PST 23 |
63268462145 ps |
| T1606 |
/workspace/coverage/cover_reg_top/65.xbar_error_and_unmapped_addr.1571683266 |
|
|
Dec 31 01:41:53 PM PST 23 |
Dec 31 01:42:02 PM PST 23 |
57461193 ps |
| T1607 |
/workspace/coverage/cover_reg_top/9.xbar_unmapped_addr.1646064739 |
|
|
Dec 31 01:35:26 PM PST 23 |
Dec 31 01:36:00 PM PST 23 |
749259414 ps |
| T1608 |
/workspace/coverage/cover_reg_top/52.xbar_stress_all_with_error.303576718 |
|
|
Dec 31 01:40:09 PM PST 23 |
Dec 31 01:40:16 PM PST 23 |
5664435 ps |
| T278 |
/workspace/coverage/cover_reg_top/20.chip_tl_errors.67080224 |
|
|
Dec 31 01:36:10 PM PST 23 |
Dec 31 01:39:46 PM PST 23 |
3152380856 ps |
| T1609 |
/workspace/coverage/cover_reg_top/59.xbar_stress_all_with_rand_reset.1731482866 |
|
|
Dec 31 01:41:17 PM PST 23 |
Dec 31 01:44:48 PM PST 23 |
684749067 ps |
| T1610 |
/workspace/coverage/cover_reg_top/40.xbar_error_random.432125777 |
|
|
Dec 31 01:39:39 PM PST 23 |
Dec 31 01:40:07 PM PST 23 |
290881703 ps |
| T1611 |
/workspace/coverage/cover_reg_top/91.xbar_error_and_unmapped_addr.2270064279 |
|
|
Dec 31 01:44:21 PM PST 23 |
Dec 31 01:45:06 PM PST 23 |
1069241216 ps |
| T92 |
/workspace/coverage/cover_reg_top/19.xbar_stress_all_with_reset_error.493510365 |
|
|
Dec 31 01:36:28 PM PST 23 |
Dec 31 01:47:44 PM PST 23 |
6224727125 ps |
| T1612 |
/workspace/coverage/cover_reg_top/86.xbar_smoke_large_delays.3848448452 |
|
|
Dec 31 01:43:36 PM PST 23 |
Dec 31 01:45:00 PM PST 23 |
7911568809 ps |
| T1613 |
/workspace/coverage/cover_reg_top/89.xbar_random.1310289365 |
|
|
Dec 31 01:43:42 PM PST 23 |
Dec 31 01:44:22 PM PST 23 |
953673459 ps |
| T1614 |
/workspace/coverage/cover_reg_top/81.xbar_stress_all_with_reset_error.3554230868 |
|
|
Dec 31 01:43:34 PM PST 23 |
Dec 31 01:45:58 PM PST 23 |
486497100 ps |
| T1615 |
/workspace/coverage/cover_reg_top/38.xbar_error_and_unmapped_addr.1787434005 |
|
|
Dec 31 01:39:27 PM PST 23 |
Dec 31 01:39:44 PM PST 23 |
163352268 ps |
| T1616 |
/workspace/coverage/cover_reg_top/26.xbar_error_and_unmapped_addr.1409329741 |
|
|
Dec 31 01:37:23 PM PST 23 |
Dec 31 01:38:14 PM PST 23 |
1390052385 ps |
| T1617 |
/workspace/coverage/cover_reg_top/24.xbar_random_large_delays.3602034038 |
|
|
Dec 31 01:38:53 PM PST 23 |
Dec 31 01:46:25 PM PST 23 |
44109940756 ps |
| T1618 |
/workspace/coverage/cover_reg_top/48.xbar_error_random.2908111571 |
|
|
Dec 31 01:40:19 PM PST 23 |
Dec 31 01:41:09 PM PST 23 |
1297754270 ps |
| T1619 |
/workspace/coverage/cover_reg_top/1.xbar_error_and_unmapped_addr.1770195852 |
|
|
Dec 31 01:34:29 PM PST 23 |
Dec 31 01:34:47 PM PST 23 |
363630791 ps |
| T1620 |
/workspace/coverage/cover_reg_top/27.xbar_smoke_large_delays.3284165057 |
|
|
Dec 31 01:38:27 PM PST 23 |
Dec 31 01:40:05 PM PST 23 |
8567998689 ps |
| T1621 |
/workspace/coverage/cover_reg_top/88.xbar_random_zero_delays.3024206521 |
|
|
Dec 31 01:43:33 PM PST 23 |
Dec 31 01:43:49 PM PST 23 |
128978015 ps |
| T1622 |
/workspace/coverage/cover_reg_top/73.xbar_stress_all_with_rand_reset.1434336898 |
|
|
Dec 31 01:42:31 PM PST 23 |
Dec 31 01:43:56 PM PST 23 |
251231467 ps |
| T1623 |
/workspace/coverage/cover_reg_top/92.xbar_random.896465874 |
|
|
Dec 31 01:44:14 PM PST 23 |
Dec 31 01:44:59 PM PST 23 |
552195400 ps |
| T1624 |
/workspace/coverage/cover_reg_top/89.xbar_stress_all.234446692 |
|
|
Dec 31 01:44:16 PM PST 23 |
Dec 31 01:50:15 PM PST 23 |
9973561858 ps |
| T1625 |
/workspace/coverage/cover_reg_top/67.xbar_access_same_device.2615223136 |
|
|
Dec 31 01:42:04 PM PST 23 |
Dec 31 01:44:02 PM PST 23 |
3034814484 ps |
| T1626 |
/workspace/coverage/cover_reg_top/7.xbar_error_and_unmapped_addr.1798863021 |
|
|
Dec 31 01:35:26 PM PST 23 |
Dec 31 01:36:06 PM PST 23 |
1105295525 ps |
| T1627 |
/workspace/coverage/cover_reg_top/29.xbar_random.3259749507 |
|
|
Dec 31 01:37:48 PM PST 23 |
Dec 31 01:38:00 PM PST 23 |
218420952 ps |
| T1628 |
/workspace/coverage/cover_reg_top/97.xbar_random_zero_delays.3464834060 |
|
|
Dec 31 01:44:49 PM PST 23 |
Dec 31 01:45:32 PM PST 23 |
445807595 ps |
| T1629 |
/workspace/coverage/cover_reg_top/91.xbar_smoke_slow_rsp.1617673223 |
|
|
Dec 31 01:44:12 PM PST 23 |
Dec 31 01:45:50 PM PST 23 |
5921901422 ps |
| T1630 |
/workspace/coverage/cover_reg_top/56.xbar_stress_all_with_rand_reset.1012851854 |
|
|
Dec 31 01:40:52 PM PST 23 |
Dec 31 01:43:22 PM PST 23 |
2771973205 ps |
| T1631 |
/workspace/coverage/cover_reg_top/30.xbar_stress_all_with_reset_error.1030543777 |
|
|
Dec 31 01:39:05 PM PST 23 |
Dec 31 01:39:32 PM PST 23 |
127714663 ps |
| T1632 |
/workspace/coverage/cover_reg_top/91.xbar_random_slow_rsp.1087011403 |
|
|
Dec 31 01:44:21 PM PST 23 |
Dec 31 01:47:27 PM PST 23 |
9971450189 ps |
| T282 |
/workspace/coverage/cover_reg_top/12.chip_tl_errors.345408992 |
|
|
Dec 31 01:35:43 PM PST 23 |
Dec 31 01:42:41 PM PST 23 |
4360393962 ps |
| T1633 |
/workspace/coverage/cover_reg_top/92.xbar_stress_all.1562585003 |
|
|
Dec 31 01:45:15 PM PST 23 |
Dec 31 01:47:14 PM PST 23 |
3147520271 ps |
| T1634 |
/workspace/coverage/cover_reg_top/64.xbar_smoke_slow_rsp.435545314 |
|
|
Dec 31 01:41:24 PM PST 23 |
Dec 31 01:42:56 PM PST 23 |
5389757086 ps |
| T1635 |
/workspace/coverage/cover_reg_top/45.xbar_stress_all_with_rand_reset.1527328648 |
|
|
Dec 31 01:40:03 PM PST 23 |
Dec 31 01:46:25 PM PST 23 |
4002421043 ps |
| T1636 |
/workspace/coverage/cover_reg_top/60.xbar_random.255472851 |
|
|
Dec 31 01:41:07 PM PST 23 |
Dec 31 01:41:35 PM PST 23 |
794846517 ps |
| T1637 |
/workspace/coverage/cover_reg_top/82.xbar_random_large_delays.577456879 |
|
|
Dec 31 01:44:06 PM PST 23 |
Dec 31 01:49:50 PM PST 23 |
30583895741 ps |
| T1638 |
/workspace/coverage/cover_reg_top/90.xbar_random_large_delays.2183152126 |
|
|
Dec 31 01:44:19 PM PST 23 |
Dec 31 01:44:57 PM PST 23 |
3758444129 ps |
| T1639 |
/workspace/coverage/cover_reg_top/57.xbar_smoke_zero_delays.2716839095 |
|
|
Dec 31 01:40:47 PM PST 23 |
Dec 31 01:40:54 PM PST 23 |
39403795 ps |
| T1640 |
/workspace/coverage/cover_reg_top/75.xbar_stress_all_with_reset_error.3505884504 |
|
|
Dec 31 01:43:05 PM PST 23 |
Dec 31 01:44:05 PM PST 23 |
192585654 ps |
| T1641 |
/workspace/coverage/cover_reg_top/44.xbar_error_and_unmapped_addr.2782526504 |
|
|
Dec 31 01:39:42 PM PST 23 |
Dec 31 01:40:11 PM PST 23 |
638634276 ps |
| T1642 |
/workspace/coverage/cover_reg_top/39.xbar_same_source.3857102365 |
|
|
Dec 31 01:39:36 PM PST 23 |
Dec 31 01:39:49 PM PST 23 |
80679845 ps |
| T1643 |
/workspace/coverage/cover_reg_top/87.xbar_access_same_device.571862336 |
|
|
Dec 31 01:44:02 PM PST 23 |
Dec 31 01:44:48 PM PST 23 |
546315172 ps |
| T1644 |
/workspace/coverage/cover_reg_top/8.xbar_stress_all_with_rand_reset.1831295013 |
|
|
Dec 31 01:35:06 PM PST 23 |
Dec 31 01:40:13 PM PST 23 |
2271634305 ps |
| T1645 |
/workspace/coverage/cover_reg_top/8.chip_csr_rw.573227100 |
|
|
Dec 31 01:35:16 PM PST 23 |
Dec 31 01:39:51 PM PST 23 |
4358774650 ps |
| T1646 |
/workspace/coverage/cover_reg_top/18.xbar_smoke_large_delays.106775470 |
|
|
Dec 31 01:36:09 PM PST 23 |
Dec 31 01:37:42 PM PST 23 |
8144170525 ps |
| T1647 |
/workspace/coverage/cover_reg_top/8.chip_same_csr_outstanding.2105215123 |
|
|
Dec 31 01:35:06 PM PST 23 |
Dec 31 02:05:45 PM PST 23 |
16479985988 ps |
| T1648 |
/workspace/coverage/cover_reg_top/10.xbar_error_and_unmapped_addr.3518607775 |
|
|
Dec 31 01:35:24 PM PST 23 |
Dec 31 01:35:50 PM PST 23 |
224823171 ps |
| T1649 |
/workspace/coverage/cover_reg_top/44.xbar_stress_all_with_rand_reset.4092246440 |
|
|
Dec 31 01:40:07 PM PST 23 |
Dec 31 01:47:15 PM PST 23 |
7208673932 ps |
| T1650 |
/workspace/coverage/cover_reg_top/27.xbar_smoke_zero_delays.4286195847 |
|
|
Dec 31 01:37:37 PM PST 23 |
Dec 31 01:37:48 PM PST 23 |
54474864 ps |
| T1651 |
/workspace/coverage/cover_reg_top/90.xbar_stress_all_with_rand_reset.67071930 |
|
|
Dec 31 01:43:34 PM PST 23 |
Dec 31 01:45:53 PM PST 23 |
460189024 ps |
| T27 |
/workspace/coverage/cover_reg_top/0.chip_csr_bit_bash.1282474105 |
|
|
Dec 31 01:33:59 PM PST 23 |
Dec 31 02:38:46 PM PST 23 |
40912727140 ps |
| T1652 |
/workspace/coverage/cover_reg_top/78.xbar_stress_all_with_error.1630698837 |
|
|
Dec 31 01:43:05 PM PST 23 |
Dec 31 01:45:44 PM PST 23 |
4693855030 ps |
| T1653 |
/workspace/coverage/cover_reg_top/28.xbar_random_zero_delays.890742466 |
|
|
Dec 31 01:38:23 PM PST 23 |
Dec 31 01:38:42 PM PST 23 |
211182856 ps |
| T1654 |
/workspace/coverage/cover_reg_top/12.chip_csr_mem_rw_with_rand_reset.2544189871 |
|
|
Dec 31 01:36:47 PM PST 23 |
Dec 31 01:41:15 PM PST 23 |
6274803008 ps |
| T1655 |
/workspace/coverage/cover_reg_top/55.xbar_random_slow_rsp.2137915148 |
|
|
Dec 31 01:40:56 PM PST 23 |
Dec 31 01:57:34 PM PST 23 |
56269101825 ps |
| T1656 |
/workspace/coverage/cover_reg_top/63.xbar_error_random.4228552937 |
|
|
Dec 31 01:41:17 PM PST 23 |
Dec 31 01:42:40 PM PST 23 |
2133565709 ps |
| T1657 |
/workspace/coverage/cover_reg_top/15.xbar_error_random.921222552 |
|
|
Dec 31 01:36:35 PM PST 23 |
Dec 31 01:37:03 PM PST 23 |
789337908 ps |
| T1658 |
/workspace/coverage/cover_reg_top/31.xbar_stress_all_with_reset_error.1326461499 |
|
|
Dec 31 01:39:04 PM PST 23 |
Dec 31 01:54:29 PM PST 23 |
20164718634 ps |
| T1659 |
/workspace/coverage/cover_reg_top/57.xbar_stress_all_with_error.2685227340 |
|
|
Dec 31 01:40:57 PM PST 23 |
Dec 31 01:42:04 PM PST 23 |
712151685 ps |
| T1660 |
/workspace/coverage/cover_reg_top/40.xbar_smoke_slow_rsp.2513770265 |
|
|
Dec 31 01:39:36 PM PST 23 |
Dec 31 01:41:15 PM PST 23 |
5571001532 ps |
| T1661 |
/workspace/coverage/cover_reg_top/56.xbar_smoke_large_delays.1329417402 |
|
|
Dec 31 01:40:38 PM PST 23 |
Dec 31 01:42:10 PM PST 23 |
8728414447 ps |
| T1662 |
/workspace/coverage/cover_reg_top/48.xbar_access_same_device_slow_rsp.4235718148 |
|
|
Dec 31 01:39:49 PM PST 23 |
Dec 31 02:13:31 PM PST 23 |
118093079455 ps |
| T1663 |
/workspace/coverage/cover_reg_top/21.xbar_access_same_device_slow_rsp.3596299019 |
|
|
Dec 31 01:36:34 PM PST 23 |
Dec 31 01:39:21 PM PST 23 |
9545378489 ps |
| T1664 |
/workspace/coverage/cover_reg_top/52.xbar_random_zero_delays.1856358190 |
|
|
Dec 31 01:40:11 PM PST 23 |
Dec 31 01:40:58 PM PST 23 |
502918950 ps |
| T1665 |
/workspace/coverage/cover_reg_top/2.xbar_stress_all_with_error.3464550256 |
|
|
Dec 31 01:34:25 PM PST 23 |
Dec 31 01:37:28 PM PST 23 |
2446038990 ps |
| T1666 |
/workspace/coverage/cover_reg_top/46.xbar_smoke_slow_rsp.3554072087 |
|
|
Dec 31 01:39:45 PM PST 23 |
Dec 31 01:41:13 PM PST 23 |
4653786974 ps |
| T1667 |
/workspace/coverage/cover_reg_top/58.xbar_access_same_device.511011897 |
|
|
Dec 31 01:40:53 PM PST 23 |
Dec 31 01:42:08 PM PST 23 |
1808567421 ps |
| T1668 |
/workspace/coverage/cover_reg_top/4.xbar_stress_all_with_rand_reset.571429221 |
|
|
Dec 31 01:35:02 PM PST 23 |
Dec 31 01:36:47 PM PST 23 |
206353742 ps |
| T1669 |
/workspace/coverage/cover_reg_top/39.xbar_access_same_device_slow_rsp.1914777377 |
|
|
Dec 31 01:39:46 PM PST 23 |
Dec 31 02:16:34 PM PST 23 |
134168800188 ps |
| T247 |
/workspace/coverage/cover_reg_top/53.xbar_stress_all_with_reset_error.1652486619 |
|
|
Dec 31 01:40:39 PM PST 23 |
Dec 31 01:49:27 PM PST 23 |
4116010632 ps |
| T361 |
/workspace/coverage/cover_reg_top/72.xbar_stress_all_with_rand_reset.919720206 |
|
|
Dec 31 01:42:23 PM PST 23 |
Dec 31 01:47:13 PM PST 23 |
889957423 ps |
| T1670 |
/workspace/coverage/cover_reg_top/13.xbar_stress_all.1869761062 |
|
|
Dec 31 01:37:02 PM PST 23 |
Dec 31 01:39:02 PM PST 23 |
3297731916 ps |
| T1671 |
/workspace/coverage/cover_reg_top/47.xbar_stress_all_with_rand_reset.3361684624 |
|
|
Dec 31 01:40:15 PM PST 23 |
Dec 31 01:46:18 PM PST 23 |
6003293934 ps |
| T1672 |
/workspace/coverage/cover_reg_top/92.xbar_random_zero_delays.143515545 |
|
|
Dec 31 01:44:16 PM PST 23 |
Dec 31 01:45:09 PM PST 23 |
581366549 ps |
| T1673 |
/workspace/coverage/cover_reg_top/17.xbar_access_same_device.3832410916 |
|
|
Dec 31 01:36:32 PM PST 23 |
Dec 31 01:38:20 PM PST 23 |
2528353823 ps |
| T1674 |
/workspace/coverage/cover_reg_top/8.chip_tl_errors.1696206988 |
|
|
Dec 31 01:35:17 PM PST 23 |
Dec 31 01:38:29 PM PST 23 |
3467950160 ps |
| T1675 |
/workspace/coverage/cover_reg_top/8.xbar_smoke.1523158523 |
|
|
Dec 31 01:35:21 PM PST 23 |
Dec 31 01:35:28 PM PST 23 |
42877199 ps |
| T1676 |
/workspace/coverage/cover_reg_top/52.xbar_same_source.1997813828 |
|
|
Dec 31 01:40:10 PM PST 23 |
Dec 31 01:40:39 PM PST 23 |
929419043 ps |
| T1677 |
/workspace/coverage/cover_reg_top/12.xbar_error_random.938946252 |
|
|
Dec 31 01:36:04 PM PST 23 |
Dec 31 01:36:18 PM PST 23 |
371186389 ps |
| T1678 |
/workspace/coverage/cover_reg_top/11.xbar_access_same_device.433295922 |
|
|
Dec 31 01:35:31 PM PST 23 |
Dec 31 01:37:26 PM PST 23 |
2809255553 ps |
| T1679 |
/workspace/coverage/cover_reg_top/21.xbar_random_slow_rsp.3504785945 |
|
|
Dec 31 01:37:08 PM PST 23 |
Dec 31 01:48:30 PM PST 23 |
39987886641 ps |
| T1680 |
/workspace/coverage/cover_reg_top/11.xbar_random_zero_delays.2430648612 |
|
|
Dec 31 01:35:27 PM PST 23 |
Dec 31 01:36:14 PM PST 23 |
549323449 ps |
| T1681 |
/workspace/coverage/cover_reg_top/21.xbar_stress_all_with_error.7019316 |
|
|
Dec 31 01:36:55 PM PST 23 |
Dec 31 01:38:51 PM PST 23 |
1392223926 ps |
| T1682 |
/workspace/coverage/cover_reg_top/93.xbar_access_same_device.2572430862 |
|
|
Dec 31 01:44:46 PM PST 23 |
Dec 31 01:47:01 PM PST 23 |
3318905861 ps |
| T1683 |
/workspace/coverage/cover_reg_top/7.xbar_random_zero_delays.4112707706 |
|
|
Dec 31 01:35:07 PM PST 23 |
Dec 31 01:35:33 PM PST 23 |
259960207 ps |
| T1684 |
/workspace/coverage/cover_reg_top/90.xbar_random.1685297854 |
|
|
Dec 31 01:44:19 PM PST 23 |
Dec 31 01:45:13 PM PST 23 |
570191889 ps |
| T1685 |
/workspace/coverage/cover_reg_top/80.xbar_same_source.2377520031 |
|
|
Dec 31 01:42:43 PM PST 23 |
Dec 31 01:43:16 PM PST 23 |
997757109 ps |
| T1686 |
/workspace/coverage/cover_reg_top/18.xbar_same_source.1850022541 |
|
|
Dec 31 01:36:04 PM PST 23 |
Dec 31 01:37:14 PM PST 23 |
2288171449 ps |
| T1687 |
/workspace/coverage/cover_reg_top/84.xbar_random_large_delays.2960632021 |
|
|
Dec 31 01:43:25 PM PST 23 |
Dec 31 01:47:49 PM PST 23 |
22887127670 ps |
| T1688 |
/workspace/coverage/cover_reg_top/46.xbar_access_same_device_slow_rsp.676191563 |
|
|
Dec 31 01:39:47 PM PST 23 |
Dec 31 02:09:26 PM PST 23 |
97802909995 ps |
| T1689 |
/workspace/coverage/cover_reg_top/13.xbar_smoke_large_delays.4185135880 |
|
|
Dec 31 01:37:15 PM PST 23 |
Dec 31 01:38:46 PM PST 23 |
8942192302 ps |
| T1690 |
/workspace/coverage/cover_reg_top/87.xbar_access_same_device_slow_rsp.1778663600 |
|
|
Dec 31 01:43:29 PM PST 23 |
Dec 31 02:15:06 PM PST 23 |
119250685422 ps |
| T1691 |
/workspace/coverage/cover_reg_top/93.xbar_stress_all_with_error.1114231345 |
|
|
Dec 31 01:45:25 PM PST 23 |
Dec 31 01:50:49 PM PST 23 |
8889243865 ps |
| T1692 |
/workspace/coverage/cover_reg_top/32.xbar_stress_all_with_reset_error.1882203597 |
|
|
Dec 31 01:39:10 PM PST 23 |
Dec 31 01:46:24 PM PST 23 |
9365546991 ps |
| T1693 |
/workspace/coverage/cover_reg_top/25.xbar_smoke_zero_delays.3145258605 |
|
|
Dec 31 01:36:51 PM PST 23 |
Dec 31 01:37:02 PM PST 23 |
39858796 ps |
| T1694 |
/workspace/coverage/cover_reg_top/54.xbar_error_random.638209392 |
|
|
Dec 31 01:40:49 PM PST 23 |
Dec 31 01:40:59 PM PST 23 |
86469547 ps |
| T1695 |
/workspace/coverage/cover_reg_top/29.xbar_error_random.3109366197 |
|
|
Dec 31 01:39:05 PM PST 23 |
Dec 31 01:39:17 PM PST 23 |
101606988 ps |
| T1696 |
/workspace/coverage/cover_reg_top/99.xbar_access_same_device_slow_rsp.3149510696 |
|
|
Dec 31 01:44:47 PM PST 23 |
Dec 31 02:18:25 PM PST 23 |
120900257999 ps |
| T1697 |
/workspace/coverage/cover_reg_top/28.xbar_random_slow_rsp.874504891 |
|
|
Dec 31 01:37:40 PM PST 23 |
Dec 31 01:44:05 PM PST 23 |
23570360683 ps |
| T1698 |
/workspace/coverage/cover_reg_top/10.chip_same_csr_outstanding.3747304289 |
|
|
Dec 31 01:35:29 PM PST 23 |
Dec 31 02:30:00 PM PST 23 |
29431534284 ps |
| T1699 |
/workspace/coverage/cover_reg_top/93.xbar_random.4085259862 |
|
|
Dec 31 01:44:41 PM PST 23 |
Dec 31 01:45:30 PM PST 23 |
1338410278 ps |
| T1700 |
/workspace/coverage/cover_reg_top/29.xbar_stress_all_with_error.971728135 |
|
|
Dec 31 01:38:22 PM PST 23 |
Dec 31 01:42:42 PM PST 23 |
3270084742 ps |
| T1701 |
/workspace/coverage/cover_reg_top/27.xbar_stress_all_with_error.1852396127 |
|
|
Dec 31 01:37:46 PM PST 23 |
Dec 31 01:46:15 PM PST 23 |
14001072647 ps |
| T1702 |
/workspace/coverage/cover_reg_top/45.xbar_stress_all_with_reset_error.2692013620 |
|
|
Dec 31 01:39:41 PM PST 23 |
Dec 31 01:44:09 PM PST 23 |
3567108184 ps |
| T1703 |
/workspace/coverage/cover_reg_top/14.xbar_stress_all_with_error.166556426 |
|
|
Dec 31 01:36:00 PM PST 23 |
Dec 31 01:44:24 PM PST 23 |
13763241630 ps |
| T1704 |
/workspace/coverage/cover_reg_top/7.chip_csr_mem_rw_with_rand_reset.3120429433 |
|
|
Dec 31 01:35:02 PM PST 23 |
Dec 31 01:38:51 PM PST 23 |
5078892028 ps |
| T1705 |
/workspace/coverage/cover_reg_top/44.xbar_same_source.276017821 |
|
|
Dec 31 01:39:45 PM PST 23 |
Dec 31 01:40:20 PM PST 23 |
487888407 ps |
| T1706 |
/workspace/coverage/cover_reg_top/93.xbar_error_random.3395808008 |
|
|
Dec 31 01:45:24 PM PST 23 |
Dec 31 01:46:08 PM PST 23 |
1232423141 ps |
| T1707 |
/workspace/coverage/cover_reg_top/7.xbar_access_same_device.2580755993 |
|
|
Dec 31 01:35:39 PM PST 23 |
Dec 31 01:36:58 PM PST 23 |
1046862853 ps |
| T1708 |
/workspace/coverage/cover_reg_top/99.xbar_unmapped_addr.2540399104 |
|
|
Dec 31 01:44:39 PM PST 23 |
Dec 31 01:45:04 PM PST 23 |
543231001 ps |
| T1709 |
/workspace/coverage/cover_reg_top/46.xbar_same_source.2920416391 |
|
|
Dec 31 01:40:10 PM PST 23 |
Dec 31 01:40:46 PM PST 23 |
1085601812 ps |
| T1710 |
/workspace/coverage/cover_reg_top/62.xbar_smoke_slow_rsp.2502006181 |
|
|
Dec 31 01:41:19 PM PST 23 |
Dec 31 01:43:00 PM PST 23 |
6161009159 ps |
| T1711 |
/workspace/coverage/cover_reg_top/32.xbar_smoke.1024396110 |
|
|
Dec 31 01:39:05 PM PST 23 |
Dec 31 01:39:12 PM PST 23 |
53036364 ps |
| T1712 |
/workspace/coverage/cover_reg_top/59.xbar_random_large_delays.2988890003 |
|
|
Dec 31 01:41:18 PM PST 23 |
Dec 31 01:56:02 PM PST 23 |
79558001401 ps |
| T1713 |
/workspace/coverage/cover_reg_top/95.xbar_error_random.2162106574 |
|
|
Dec 31 01:44:49 PM PST 23 |
Dec 31 01:45:16 PM PST 23 |
753205503 ps |
| T1714 |
/workspace/coverage/cover_reg_top/4.xbar_random_slow_rsp.2791844003 |
|
|
Dec 31 01:34:53 PM PST 23 |
Dec 31 01:37:01 PM PST 23 |
7040220558 ps |
| T1715 |
/workspace/coverage/cover_reg_top/89.xbar_random_large_delays.1013339433 |
|
|
Dec 31 01:43:42 PM PST 23 |
Dec 31 02:00:54 PM PST 23 |
97818237648 ps |
| T1716 |
/workspace/coverage/cover_reg_top/79.xbar_stress_all_with_reset_error.1327124462 |
|
|
Dec 31 01:43:37 PM PST 23 |
Dec 31 01:49:34 PM PST 23 |
2253231122 ps |
| T90 |
/workspace/coverage/cover_reg_top/69.xbar_stress_all_with_error.2667694167 |
|
|
Dec 31 01:43:08 PM PST 23 |
Dec 31 01:48:20 PM PST 23 |
8138958261 ps |
| T1717 |
/workspace/coverage/cover_reg_top/50.xbar_same_source.3025269892 |
|
|
Dec 31 01:40:02 PM PST 23 |
Dec 31 01:40:24 PM PST 23 |
227474255 ps |
| T1718 |
/workspace/coverage/cover_reg_top/3.xbar_stress_all_with_reset_error.2914719714 |
|
|
Dec 31 01:34:35 PM PST 23 |
Dec 31 01:38:16 PM PST 23 |
635102342 ps |
| T1719 |
/workspace/coverage/cover_reg_top/54.xbar_smoke_zero_delays.594702593 |
|
|
Dec 31 01:40:20 PM PST 23 |
Dec 31 01:40:30 PM PST 23 |
53117472 ps |
| T1720 |
/workspace/coverage/cover_reg_top/55.xbar_error_and_unmapped_addr.2499988535 |
|
|
Dec 31 01:40:49 PM PST 23 |
Dec 31 01:40:57 PM PST 23 |
34946925 ps |
| T41 |
/workspace/coverage/cover_reg_top/2.chip_prim_tl_access.2347577752 |
|
|
Dec 31 01:33:54 PM PST 23 |
Dec 31 01:36:41 PM PST 23 |
4708560140 ps |
| T1721 |
/workspace/coverage/cover_reg_top/51.xbar_same_source.4081879908 |
|
|
Dec 31 01:40:16 PM PST 23 |
Dec 31 01:40:53 PM PST 23 |
482170896 ps |
| T1722 |
/workspace/coverage/cover_reg_top/41.xbar_smoke_slow_rsp.1427904842 |
|
|
Dec 31 01:39:23 PM PST 23 |
Dec 31 01:41:26 PM PST 23 |
6926015361 ps |
| T1723 |
/workspace/coverage/cover_reg_top/68.xbar_random_slow_rsp.3007800815 |
|
|
Dec 31 01:42:13 PM PST 23 |
Dec 31 01:45:22 PM PST 23 |
11177812944 ps |
| T1724 |
/workspace/coverage/cover_reg_top/38.xbar_stress_all_with_rand_reset.45610771 |
|
|
Dec 31 01:38:51 PM PST 23 |
Dec 31 01:45:02 PM PST 23 |
1936816611 ps |
| T1725 |
/workspace/coverage/cover_reg_top/33.xbar_unmapped_addr.932020479 |
|
|
Dec 31 01:38:21 PM PST 23 |
Dec 31 01:38:50 PM PST 23 |
238761843 ps |
| T1726 |
/workspace/coverage/cover_reg_top/26.xbar_access_same_device_slow_rsp.4105542096 |
|
|
Dec 31 01:36:59 PM PST 23 |
Dec 31 01:49:58 PM PST 23 |
47613819593 ps |
| T1727 |
/workspace/coverage/cover_reg_top/4.xbar_error_random.3689783799 |
|
|
Dec 31 01:35:08 PM PST 23 |
Dec 31 01:36:22 PM PST 23 |
2047243576 ps |
| T1728 |
/workspace/coverage/cover_reg_top/69.xbar_random_slow_rsp.1984227164 |
|
|
Dec 31 01:42:10 PM PST 23 |
Dec 31 01:57:28 PM PST 23 |
53524115872 ps |
| T1729 |
/workspace/coverage/cover_reg_top/79.xbar_smoke_zero_delays.3051665845 |
|
|
Dec 31 01:42:55 PM PST 23 |
Dec 31 01:43:03 PM PST 23 |
44005563 ps |
| T1730 |
/workspace/coverage/cover_reg_top/43.xbar_stress_all_with_rand_reset.3754106230 |
|
|
Dec 31 01:39:57 PM PST 23 |
Dec 31 01:42:01 PM PST 23 |
272204621 ps |
| T1731 |
/workspace/coverage/cover_reg_top/50.xbar_stress_all_with_reset_error.744372158 |
|
|
Dec 31 01:39:59 PM PST 23 |
Dec 31 01:42:15 PM PST 23 |
466053606 ps |
| T1732 |
/workspace/coverage/cover_reg_top/16.xbar_random_large_delays.3791382059 |
|
|
Dec 31 01:36:09 PM PST 23 |
Dec 31 01:37:20 PM PST 23 |
6577079878 ps |
| T1733 |
/workspace/coverage/cover_reg_top/49.xbar_error_and_unmapped_addr.2201367519 |
|
|
Dec 31 01:40:04 PM PST 23 |
Dec 31 01:40:18 PM PST 23 |
149707049 ps |
| T1734 |
/workspace/coverage/cover_reg_top/17.chip_same_csr_outstanding.534712847 |
|
|
Dec 31 01:36:30 PM PST 23 |
Dec 31 02:08:50 PM PST 23 |
16581774694 ps |
| T1735 |
/workspace/coverage/cover_reg_top/68.xbar_access_same_device_slow_rsp.683397662 |
|
|
Dec 31 01:42:25 PM PST 23 |
Dec 31 02:04:06 PM PST 23 |
79425557353 ps |
| T1736 |
/workspace/coverage/cover_reg_top/21.xbar_random_zero_delays.2004400461 |
|
|
Dec 31 01:36:41 PM PST 23 |
Dec 31 01:37:19 PM PST 23 |
421088245 ps |
| T1737 |
/workspace/coverage/cover_reg_top/96.xbar_access_same_device_slow_rsp.4246832135 |
|
|
Dec 31 01:44:40 PM PST 23 |
Dec 31 02:15:43 PM PST 23 |
109064988463 ps |
| T1738 |
/workspace/coverage/cover_reg_top/1.xbar_random_zero_delays.304177144 |
|
|
Dec 31 01:34:29 PM PST 23 |
Dec 31 01:34:53 PM PST 23 |
239056382 ps |
| T1739 |
/workspace/coverage/cover_reg_top/61.xbar_access_same_device_slow_rsp.3418319371 |
|
|
Dec 31 01:41:52 PM PST 23 |
Dec 31 02:06:52 PM PST 23 |
91010726542 ps |
| T1740 |
/workspace/coverage/cover_reg_top/2.xbar_random_large_delays.1708136802 |
|
|
Dec 31 01:34:13 PM PST 23 |
Dec 31 01:48:23 PM PST 23 |
80467808279 ps |
| T1741 |
/workspace/coverage/cover_reg_top/87.xbar_unmapped_addr.2773812487 |
|
|
Dec 31 01:43:32 PM PST 23 |
Dec 31 01:43:38 PM PST 23 |
22181825 ps |
| T1742 |
/workspace/coverage/cover_reg_top/77.xbar_stress_all_with_reset_error.773317331 |
|
|
Dec 31 01:42:34 PM PST 23 |
Dec 31 01:45:05 PM PST 23 |
868277000 ps |
| T1743 |
/workspace/coverage/cover_reg_top/73.xbar_smoke_slow_rsp.2732368711 |
|
|
Dec 31 01:42:26 PM PST 23 |
Dec 31 01:44:14 PM PST 23 |
6229879888 ps |
| T1744 |
/workspace/coverage/cover_reg_top/63.xbar_stress_all_with_rand_reset.566715963 |
|
|
Dec 31 01:41:24 PM PST 23 |
Dec 31 01:47:00 PM PST 23 |
3457562738 ps |
| T1745 |
/workspace/coverage/cover_reg_top/97.xbar_random_large_delays.368134697 |
|
|
Dec 31 01:44:41 PM PST 23 |
Dec 31 01:55:39 PM PST 23 |
66746506697 ps |
| T1746 |
/workspace/coverage/cover_reg_top/96.xbar_access_same_device.3515084938 |
|
|
Dec 31 01:44:22 PM PST 23 |
Dec 31 01:45:05 PM PST 23 |
1195429055 ps |
| T1747 |
/workspace/coverage/cover_reg_top/84.xbar_random_zero_delays.2027321127 |
|
|
Dec 31 01:44:10 PM PST 23 |
Dec 31 01:44:50 PM PST 23 |
438844523 ps |
| T1748 |
/workspace/coverage/cover_reg_top/18.xbar_random.285957454 |
|
|
Dec 31 01:36:35 PM PST 23 |
Dec 31 01:37:08 PM PST 23 |
369875984 ps |
| T1749 |
/workspace/coverage/cover_reg_top/26.xbar_random_zero_delays.3020370328 |
|
|
Dec 31 01:37:54 PM PST 23 |
Dec 31 01:38:26 PM PST 23 |
299340377 ps |
| T1750 |
/workspace/coverage/cover_reg_top/78.xbar_stress_all_with_reset_error.4115679586 |
|
|
Dec 31 01:42:42 PM PST 23 |
Dec 31 01:44:14 PM PST 23 |
650010862 ps |
| T1751 |
/workspace/coverage/cover_reg_top/94.xbar_unmapped_addr.675401733 |
|
|
Dec 31 01:45:00 PM PST 23 |
Dec 31 01:45:25 PM PST 23 |
498657017 ps |