| T1272 |
/workspace/coverage/cover_reg_top/15.xbar_stress_all.1273552957 |
|
|
Dec 31 01:37:12 PM PST 23 |
Dec 31 01:43:18 PM PST 23 |
10898657886 ps |
| T1273 |
/workspace/coverage/cover_reg_top/29.xbar_access_same_device_slow_rsp.1843077488 |
|
|
Dec 31 01:38:27 PM PST 23 |
Dec 31 02:07:30 PM PST 23 |
103666651876 ps |
| T1274 |
/workspace/coverage/cover_reg_top/43.xbar_error_and_unmapped_addr.2085013767 |
|
|
Dec 31 01:39:40 PM PST 23 |
Dec 31 01:40:24 PM PST 23 |
945659048 ps |
| T1275 |
/workspace/coverage/cover_reg_top/40.xbar_same_source.2213316963 |
|
|
Dec 31 01:40:08 PM PST 23 |
Dec 31 01:40:29 PM PST 23 |
198879275 ps |
| T1276 |
/workspace/coverage/cover_reg_top/26.xbar_smoke_large_delays.1422715052 |
|
|
Dec 31 01:38:23 PM PST 23 |
Dec 31 01:40:06 PM PST 23 |
9818994080 ps |
| T1277 |
/workspace/coverage/cover_reg_top/4.xbar_error_and_unmapped_addr.2679077636 |
|
|
Dec 31 01:35:13 PM PST 23 |
Dec 31 01:35:41 PM PST 23 |
275480666 ps |
| T1278 |
/workspace/coverage/cover_reg_top/60.xbar_error_and_unmapped_addr.622619451 |
|
|
Dec 31 01:41:30 PM PST 23 |
Dec 31 01:42:24 PM PST 23 |
1363886209 ps |
| T1279 |
/workspace/coverage/cover_reg_top/8.xbar_access_same_device.1368487653 |
|
|
Dec 31 01:35:01 PM PST 23 |
Dec 31 01:36:26 PM PST 23 |
1016751120 ps |
| T1280 |
/workspace/coverage/cover_reg_top/87.xbar_error_random.1259019029 |
|
|
Dec 31 01:43:29 PM PST 23 |
Dec 31 01:43:51 PM PST 23 |
226440551 ps |
| T1281 |
/workspace/coverage/cover_reg_top/21.xbar_stress_all_with_reset_error.683221963 |
|
|
Dec 31 01:37:14 PM PST 23 |
Dec 31 01:50:19 PM PST 23 |
7243080977 ps |
| T1282 |
/workspace/coverage/cover_reg_top/18.xbar_access_same_device_slow_rsp.1281481444 |
|
|
Dec 31 01:36:40 PM PST 23 |
Dec 31 01:59:49 PM PST 23 |
80435685668 ps |
| T1283 |
/workspace/coverage/cover_reg_top/97.xbar_stress_all.2348263551 |
|
|
Dec 31 01:45:17 PM PST 23 |
Dec 31 01:48:17 PM PST 23 |
5047222759 ps |
| T1284 |
/workspace/coverage/cover_reg_top/58.xbar_smoke_zero_delays.2662378492 |
|
|
Dec 31 01:40:49 PM PST 23 |
Dec 31 01:40:57 PM PST 23 |
44384485 ps |
| T1285 |
/workspace/coverage/cover_reg_top/80.xbar_stress_all.3540848254 |
|
|
Dec 31 01:43:10 PM PST 23 |
Dec 31 01:51:21 PM PST 23 |
13283988348 ps |
| T1286 |
/workspace/coverage/cover_reg_top/77.xbar_unmapped_addr.2734878479 |
|
|
Dec 31 01:42:37 PM PST 23 |
Dec 31 01:43:06 PM PST 23 |
239672705 ps |
| T1287 |
/workspace/coverage/cover_reg_top/50.xbar_error_random.1948495690 |
|
|
Dec 31 01:39:57 PM PST 23 |
Dec 31 01:40:35 PM PST 23 |
438729655 ps |
| T1288 |
/workspace/coverage/cover_reg_top/7.xbar_access_same_device_slow_rsp.3374600632 |
|
|
Dec 31 01:35:19 PM PST 23 |
Dec 31 02:21:10 PM PST 23 |
151918591759 ps |
| T1289 |
/workspace/coverage/cover_reg_top/56.xbar_stress_all.2294824175 |
|
|
Dec 31 01:40:47 PM PST 23 |
Dec 31 01:41:46 PM PST 23 |
736032859 ps |
| T1290 |
/workspace/coverage/cover_reg_top/22.xbar_smoke_slow_rsp.4179104578 |
|
|
Dec 31 01:36:34 PM PST 23 |
Dec 31 01:37:49 PM PST 23 |
4491160508 ps |
| T1291 |
/workspace/coverage/cover_reg_top/3.chip_csr_mem_rw_with_rand_reset.3718698807 |
|
|
Dec 31 01:34:47 PM PST 23 |
Dec 31 01:38:49 PM PST 23 |
5533254725 ps |
| T1292 |
/workspace/coverage/cover_reg_top/14.xbar_smoke.648939735 |
|
|
Dec 31 01:37:19 PM PST 23 |
Dec 31 01:37:30 PM PST 23 |
43264007 ps |
| T1293 |
/workspace/coverage/cover_reg_top/30.xbar_same_source.3823447014 |
|
|
Dec 31 01:39:08 PM PST 23 |
Dec 31 01:39:20 PM PST 23 |
110395393 ps |
| T1294 |
/workspace/coverage/cover_reg_top/6.xbar_access_same_device.1003298425 |
|
|
Dec 31 01:35:00 PM PST 23 |
Dec 31 01:35:53 PM PST 23 |
668071816 ps |
| T1295 |
/workspace/coverage/cover_reg_top/30.xbar_stress_all_with_rand_reset.2826671367 |
|
|
Dec 31 01:38:25 PM PST 23 |
Dec 31 01:42:22 PM PST 23 |
1271878050 ps |
| T1296 |
/workspace/coverage/cover_reg_top/53.xbar_stress_all.4085998139 |
|
|
Dec 31 01:40:13 PM PST 23 |
Dec 31 01:41:43 PM PST 23 |
1259767421 ps |
| T1297 |
/workspace/coverage/cover_reg_top/88.xbar_same_source.2498897729 |
|
|
Dec 31 01:44:05 PM PST 23 |
Dec 31 01:45:12 PM PST 23 |
2074856845 ps |
| T1298 |
/workspace/coverage/cover_reg_top/53.xbar_stress_all_with_error.1605526609 |
|
|
Dec 31 01:40:13 PM PST 23 |
Dec 31 01:44:01 PM PST 23 |
6301330061 ps |
| T1299 |
/workspace/coverage/cover_reg_top/11.xbar_stress_all_with_error.3618262851 |
|
|
Dec 31 01:36:36 PM PST 23 |
Dec 31 01:37:47 PM PST 23 |
2339513678 ps |
| T1300 |
/workspace/coverage/cover_reg_top/18.xbar_random_zero_delays.2358477157 |
|
|
Dec 31 01:36:54 PM PST 23 |
Dec 31 01:37:29 PM PST 23 |
352048874 ps |
| T1301 |
/workspace/coverage/cover_reg_top/2.xbar_error_random.2829217607 |
|
|
Dec 31 01:34:39 PM PST 23 |
Dec 31 01:35:25 PM PST 23 |
548314421 ps |
| T253 |
/workspace/coverage/cover_reg_top/51.xbar_stress_all_with_error.1019750014 |
|
|
Dec 31 01:40:17 PM PST 23 |
Dec 31 01:47:01 PM PST 23 |
13841070283 ps |
| T1302 |
/workspace/coverage/cover_reg_top/12.xbar_random_zero_delays.3251493124 |
|
|
Dec 31 01:36:08 PM PST 23 |
Dec 31 01:36:15 PM PST 23 |
43966746 ps |
| T1303 |
/workspace/coverage/cover_reg_top/83.xbar_unmapped_addr.1618466482 |
|
|
Dec 31 01:43:13 PM PST 23 |
Dec 31 01:44:13 PM PST 23 |
1365290442 ps |
| T1304 |
/workspace/coverage/cover_reg_top/50.xbar_stress_all_with_error.3433467675 |
|
|
Dec 31 01:40:13 PM PST 23 |
Dec 31 01:44:00 PM PST 23 |
5966944258 ps |
| T1305 |
/workspace/coverage/cover_reg_top/26.xbar_smoke_zero_delays.2585676678 |
|
|
Dec 31 01:37:46 PM PST 23 |
Dec 31 01:37:53 PM PST 23 |
48784670 ps |
| T1306 |
/workspace/coverage/cover_reg_top/46.xbar_stress_all.1757483800 |
|
|
Dec 31 01:40:06 PM PST 23 |
Dec 31 01:48:01 PM PST 23 |
11403608544 ps |
| T1307 |
/workspace/coverage/cover_reg_top/98.xbar_random_large_delays.515539980 |
|
|
Dec 31 01:45:18 PM PST 23 |
Dec 31 01:54:17 PM PST 23 |
45562767933 ps |
| T1308 |
/workspace/coverage/cover_reg_top/47.xbar_smoke_zero_delays.336578383 |
|
|
Dec 31 01:39:54 PM PST 23 |
Dec 31 01:40:06 PM PST 23 |
49188893 ps |
| T1309 |
/workspace/coverage/cover_reg_top/75.xbar_stress_all_with_error.3400390766 |
|
|
Dec 31 01:42:36 PM PST 23 |
Dec 31 01:45:42 PM PST 23 |
5612120497 ps |
| T1310 |
/workspace/coverage/cover_reg_top/83.xbar_stress_all_with_reset_error.1934761601 |
|
|
Dec 31 01:43:28 PM PST 23 |
Dec 31 01:46:10 PM PST 23 |
555911199 ps |
| T1311 |
/workspace/coverage/cover_reg_top/65.xbar_smoke.4191691294 |
|
|
Dec 31 01:41:28 PM PST 23 |
Dec 31 01:41:35 PM PST 23 |
49269536 ps |
| T1312 |
/workspace/coverage/cover_reg_top/18.chip_csr_mem_rw_with_rand_reset.1530327659 |
|
|
Dec 31 01:36:41 PM PST 23 |
Dec 31 01:43:21 PM PST 23 |
8265767013 ps |
| T1313 |
/workspace/coverage/cover_reg_top/92.xbar_error_random.3198830667 |
|
|
Dec 31 01:44:50 PM PST 23 |
Dec 31 01:46:17 PM PST 23 |
2424634946 ps |
| T1314 |
/workspace/coverage/cover_reg_top/62.xbar_smoke_large_delays.287716391 |
|
|
Dec 31 01:41:54 PM PST 23 |
Dec 31 01:43:00 PM PST 23 |
6465108410 ps |
| T1315 |
/workspace/coverage/cover_reg_top/9.xbar_error_random.3681851044 |
|
|
Dec 31 01:35:23 PM PST 23 |
Dec 31 01:36:18 PM PST 23 |
1714472938 ps |
| T1316 |
/workspace/coverage/cover_reg_top/65.xbar_smoke_large_delays.1829482832 |
|
|
Dec 31 01:41:22 PM PST 23 |
Dec 31 01:42:44 PM PST 23 |
8309525645 ps |
| T1317 |
/workspace/coverage/cover_reg_top/70.xbar_smoke_large_delays.3080021036 |
|
|
Dec 31 01:42:51 PM PST 23 |
Dec 31 01:44:11 PM PST 23 |
7293859921 ps |
| T1318 |
/workspace/coverage/cover_reg_top/75.xbar_smoke.29819773 |
|
|
Dec 31 01:42:36 PM PST 23 |
Dec 31 01:42:46 PM PST 23 |
146550815 ps |
| T1319 |
/workspace/coverage/cover_reg_top/94.xbar_random_zero_delays.1709182259 |
|
|
Dec 31 01:44:47 PM PST 23 |
Dec 31 01:45:00 PM PST 23 |
115081785 ps |
| T1320 |
/workspace/coverage/cover_reg_top/86.xbar_access_same_device_slow_rsp.2895953332 |
|
|
Dec 31 01:44:11 PM PST 23 |
Dec 31 02:11:12 PM PST 23 |
100293214513 ps |
| T1321 |
/workspace/coverage/cover_reg_top/89.xbar_smoke_large_delays.2049274110 |
|
|
Dec 31 01:44:45 PM PST 23 |
Dec 31 01:46:14 PM PST 23 |
8757532260 ps |
| T343 |
/workspace/coverage/cover_reg_top/79.xbar_stress_all_with_rand_reset.300914270 |
|
|
Dec 31 01:43:32 PM PST 23 |
Dec 31 01:46:01 PM PST 23 |
374651291 ps |
| T1322 |
/workspace/coverage/cover_reg_top/35.xbar_random_slow_rsp.886856638 |
|
|
Dec 31 01:39:29 PM PST 23 |
Dec 31 01:59:03 PM PST 23 |
66148196671 ps |
| T1323 |
/workspace/coverage/cover_reg_top/38.xbar_unmapped_addr.2173727091 |
|
|
Dec 31 01:38:55 PM PST 23 |
Dec 31 01:39:02 PM PST 23 |
68017225 ps |
| T1324 |
/workspace/coverage/cover_reg_top/66.xbar_stress_all.328864172 |
|
|
Dec 31 01:42:14 PM PST 23 |
Dec 31 01:43:17 PM PST 23 |
1684189289 ps |
| T1325 |
/workspace/coverage/cover_reg_top/55.xbar_smoke_slow_rsp.794828272 |
|
|
Dec 31 01:40:44 PM PST 23 |
Dec 31 01:42:43 PM PST 23 |
6968527006 ps |
| T89 |
/workspace/coverage/cover_reg_top/20.xbar_stress_all_with_error.3622909649 |
|
|
Dec 31 01:37:09 PM PST 23 |
Dec 31 01:41:49 PM PST 23 |
7303271154 ps |
| T1326 |
/workspace/coverage/cover_reg_top/45.xbar_access_same_device.2584896913 |
|
|
Dec 31 01:39:34 PM PST 23 |
Dec 31 01:41:10 PM PST 23 |
2113542385 ps |
| T1327 |
/workspace/coverage/cover_reg_top/4.xbar_smoke_zero_delays.1013727536 |
|
|
Dec 31 01:35:08 PM PST 23 |
Dec 31 01:35:15 PM PST 23 |
43797874 ps |
| T1328 |
/workspace/coverage/cover_reg_top/1.chip_csr_rw.1645906614 |
|
|
Dec 31 01:34:11 PM PST 23 |
Dec 31 01:43:39 PM PST 23 |
5460957375 ps |
| T1329 |
/workspace/coverage/cover_reg_top/8.xbar_same_source.2261731728 |
|
|
Dec 31 01:35:05 PM PST 23 |
Dec 31 01:35:16 PM PST 23 |
238011137 ps |
| T1330 |
/workspace/coverage/cover_reg_top/39.xbar_smoke_large_delays.703917118 |
|
|
Dec 31 01:38:55 PM PST 23 |
Dec 31 01:40:27 PM PST 23 |
8335577047 ps |
| T1331 |
/workspace/coverage/cover_reg_top/17.xbar_smoke.277014345 |
|
|
Dec 31 01:36:18 PM PST 23 |
Dec 31 01:36:27 PM PST 23 |
208102077 ps |
| T1332 |
/workspace/coverage/cover_reg_top/54.xbar_stress_all_with_reset_error.1160308761 |
|
|
Dec 31 01:40:49 PM PST 23 |
Dec 31 01:45:11 PM PST 23 |
1809391400 ps |
| T1333 |
/workspace/coverage/cover_reg_top/22.xbar_stress_all_with_rand_reset.2887492812 |
|
|
Dec 31 01:37:13 PM PST 23 |
Dec 31 01:39:38 PM PST 23 |
477697511 ps |
| T1334 |
/workspace/coverage/cover_reg_top/33.xbar_same_source.4233351052 |
|
|
Dec 31 01:39:22 PM PST 23 |
Dec 31 01:40:06 PM PST 23 |
596783142 ps |
| T1335 |
/workspace/coverage/cover_reg_top/91.xbar_stress_all.1883240119 |
|
|
Dec 31 01:44:10 PM PST 23 |
Dec 31 01:45:36 PM PST 23 |
2262604099 ps |
| T1336 |
/workspace/coverage/cover_reg_top/52.xbar_error_random.110541908 |
|
|
Dec 31 01:40:13 PM PST 23 |
Dec 31 01:41:17 PM PST 23 |
1903387499 ps |
| T1337 |
/workspace/coverage/cover_reg_top/44.xbar_random.810632492 |
|
|
Dec 31 01:39:34 PM PST 23 |
Dec 31 01:40:17 PM PST 23 |
411236732 ps |
| T1338 |
/workspace/coverage/cover_reg_top/21.xbar_unmapped_addr.2235162530 |
|
|
Dec 31 01:37:17 PM PST 23 |
Dec 31 01:37:35 PM PST 23 |
87797103 ps |
| T1339 |
/workspace/coverage/cover_reg_top/61.xbar_smoke_large_delays.2459924009 |
|
|
Dec 31 01:41:18 PM PST 23 |
Dec 31 01:42:27 PM PST 23 |
6754508884 ps |
| T1340 |
/workspace/coverage/cover_reg_top/66.xbar_error_and_unmapped_addr.1872696739 |
|
|
Dec 31 01:41:58 PM PST 23 |
Dec 31 01:42:46 PM PST 23 |
1051497121 ps |
| T1341 |
/workspace/coverage/cover_reg_top/15.xbar_stress_all_with_error.2020119339 |
|
|
Dec 31 01:36:39 PM PST 23 |
Dec 31 01:41:44 PM PST 23 |
9212221741 ps |
| T1342 |
/workspace/coverage/cover_reg_top/51.xbar_access_same_device_slow_rsp.206157602 |
|
|
Dec 31 01:40:07 PM PST 23 |
Dec 31 02:02:19 PM PST 23 |
86055949683 ps |
| T1343 |
/workspace/coverage/cover_reg_top/14.xbar_smoke_large_delays.717183407 |
|
|
Dec 31 01:37:19 PM PST 23 |
Dec 31 01:38:56 PM PST 23 |
9378588906 ps |
| T1344 |
/workspace/coverage/cover_reg_top/33.xbar_smoke_slow_rsp.584807923 |
|
|
Dec 31 01:38:22 PM PST 23 |
Dec 31 01:40:00 PM PST 23 |
5777078392 ps |
| T1345 |
/workspace/coverage/cover_reg_top/76.xbar_smoke_large_delays.3918564750 |
|
|
Dec 31 01:43:11 PM PST 23 |
Dec 31 01:44:46 PM PST 23 |
8632893213 ps |
| T1346 |
/workspace/coverage/cover_reg_top/10.chip_csr_rw.2872051742 |
|
|
Dec 31 01:35:38 PM PST 23 |
Dec 31 01:45:35 PM PST 23 |
6009355699 ps |
| T1347 |
/workspace/coverage/cover_reg_top/27.xbar_stress_all_with_reset_error.149723371 |
|
|
Dec 31 01:37:49 PM PST 23 |
Dec 31 01:38:08 PM PST 23 |
100742238 ps |
| T1348 |
/workspace/coverage/cover_reg_top/15.xbar_random_slow_rsp.1486138626 |
|
|
Dec 31 01:36:32 PM PST 23 |
Dec 31 01:46:33 PM PST 23 |
35540584341 ps |
| T1349 |
/workspace/coverage/cover_reg_top/36.xbar_error_and_unmapped_addr.968201881 |
|
|
Dec 31 01:38:29 PM PST 23 |
Dec 31 01:39:20 PM PST 23 |
1154672555 ps |
| T1350 |
/workspace/coverage/cover_reg_top/18.xbar_smoke_zero_delays.1513877167 |
|
|
Dec 31 01:36:07 PM PST 23 |
Dec 31 01:36:13 PM PST 23 |
44420441 ps |
| T1351 |
/workspace/coverage/cover_reg_top/21.xbar_smoke_zero_delays.2557017336 |
|
|
Dec 31 01:36:40 PM PST 23 |
Dec 31 01:36:48 PM PST 23 |
55070412 ps |
| T1352 |
/workspace/coverage/cover_reg_top/58.xbar_error_random.736298618 |
|
|
Dec 31 01:40:56 PM PST 23 |
Dec 31 01:41:43 PM PST 23 |
570531071 ps |
| T1353 |
/workspace/coverage/cover_reg_top/14.xbar_same_source.1519307010 |
|
|
Dec 31 01:36:03 PM PST 23 |
Dec 31 01:36:11 PM PST 23 |
63614599 ps |
| T1354 |
/workspace/coverage/cover_reg_top/52.xbar_random.1717726146 |
|
|
Dec 31 01:40:16 PM PST 23 |
Dec 31 01:40:45 PM PST 23 |
680995580 ps |
| T1355 |
/workspace/coverage/cover_reg_top/97.xbar_error_random.163795604 |
|
|
Dec 31 01:44:42 PM PST 23 |
Dec 31 01:45:09 PM PST 23 |
695185927 ps |
| T1356 |
/workspace/coverage/cover_reg_top/25.xbar_same_source.242006215 |
|
|
Dec 31 01:36:52 PM PST 23 |
Dec 31 01:37:23 PM PST 23 |
895832908 ps |
| T1357 |
/workspace/coverage/cover_reg_top/49.xbar_smoke_large_delays.2679404857 |
|
|
Dec 31 01:40:07 PM PST 23 |
Dec 31 01:41:20 PM PST 23 |
6941637897 ps |
| T1358 |
/workspace/coverage/cover_reg_top/0.xbar_error_random.700020967 |
|
|
Dec 31 01:34:55 PM PST 23 |
Dec 31 01:35:50 PM PST 23 |
1375150054 ps |
| T1359 |
/workspace/coverage/cover_reg_top/47.xbar_access_same_device.1639153757 |
|
|
Dec 31 01:39:56 PM PST 23 |
Dec 31 01:41:14 PM PST 23 |
832174754 ps |
| T1360 |
/workspace/coverage/cover_reg_top/15.chip_csr_rw.846200558 |
|
|
Dec 31 01:36:44 PM PST 23 |
Dec 31 01:43:13 PM PST 23 |
4184951832 ps |
| T1361 |
/workspace/coverage/cover_reg_top/1.chip_csr_mem_rw_with_rand_reset.710295681 |
|
|
Dec 31 01:34:30 PM PST 23 |
Dec 31 01:37:56 PM PST 23 |
4556123039 ps |
| T1362 |
/workspace/coverage/cover_reg_top/3.xbar_random.4144535124 |
|
|
Dec 31 01:34:24 PM PST 23 |
Dec 31 01:34:42 PM PST 23 |
438317312 ps |
| T1363 |
/workspace/coverage/cover_reg_top/33.xbar_smoke.2451837840 |
|
|
Dec 31 01:39:13 PM PST 23 |
Dec 31 01:39:21 PM PST 23 |
199955916 ps |
| T1364 |
/workspace/coverage/cover_reg_top/69.xbar_random_large_delays.1999815205 |
|
|
Dec 31 01:42:02 PM PST 23 |
Dec 31 01:46:04 PM PST 23 |
23406643380 ps |
| T1365 |
/workspace/coverage/cover_reg_top/84.xbar_access_same_device.733985821 |
|
|
Dec 31 01:43:36 PM PST 23 |
Dec 31 01:43:53 PM PST 23 |
320917208 ps |
| T1366 |
/workspace/coverage/cover_reg_top/85.xbar_unmapped_addr.80386211 |
|
|
Dec 31 01:44:01 PM PST 23 |
Dec 31 01:44:24 PM PST 23 |
153550478 ps |
| T1367 |
/workspace/coverage/cover_reg_top/78.xbar_access_same_device_slow_rsp.3469600345 |
|
|
Dec 31 01:43:10 PM PST 23 |
Dec 31 02:19:30 PM PST 23 |
122515211480 ps |
| T276 |
/workspace/coverage/cover_reg_top/2.chip_tl_errors.3490158868 |
|
|
Dec 31 01:34:25 PM PST 23 |
Dec 31 01:38:13 PM PST 23 |
3177070275 ps |
| T1368 |
/workspace/coverage/cover_reg_top/35.xbar_error_random.819803273 |
|
|
Dec 31 01:39:43 PM PST 23 |
Dec 31 01:40:26 PM PST 23 |
451572815 ps |
| T1369 |
/workspace/coverage/cover_reg_top/2.xbar_smoke.373241549 |
|
|
Dec 31 01:34:18 PM PST 23 |
Dec 31 01:34:24 PM PST 23 |
45695697 ps |
| T1370 |
/workspace/coverage/cover_reg_top/5.xbar_random_slow_rsp.472507796 |
|
|
Dec 31 01:35:19 PM PST 23 |
Dec 31 01:49:08 PM PST 23 |
45181420820 ps |
| T1371 |
/workspace/coverage/cover_reg_top/61.xbar_unmapped_addr.3302183539 |
|
|
Dec 31 01:41:20 PM PST 23 |
Dec 31 01:41:27 PM PST 23 |
30062771 ps |
| T1372 |
/workspace/coverage/cover_reg_top/62.xbar_random.1204697538 |
|
|
Dec 31 01:41:26 PM PST 23 |
Dec 31 01:41:45 PM PST 23 |
197494482 ps |
| T1373 |
/workspace/coverage/cover_reg_top/60.xbar_smoke_large_delays.4152848502 |
|
|
Dec 31 01:41:21 PM PST 23 |
Dec 31 01:42:56 PM PST 23 |
8356529053 ps |
| T1374 |
/workspace/coverage/cover_reg_top/59.xbar_unmapped_addr.1594067133 |
|
|
Dec 31 01:41:20 PM PST 23 |
Dec 31 01:41:41 PM PST 23 |
403543275 ps |
| T1375 |
/workspace/coverage/cover_reg_top/2.chip_csr_bit_bash.2017461526 |
|
|
Dec 31 01:34:25 PM PST 23 |
Dec 31 02:03:18 PM PST 23 |
16409368257 ps |
| T1376 |
/workspace/coverage/cover_reg_top/66.xbar_random_zero_delays.1912528673 |
|
|
Dec 31 01:41:58 PM PST 23 |
Dec 31 01:42:41 PM PST 23 |
487517432 ps |
| T1377 |
/workspace/coverage/cover_reg_top/93.xbar_smoke.160903930 |
|
|
Dec 31 01:45:17 PM PST 23 |
Dec 31 01:45:34 PM PST 23 |
176660969 ps |
| T1378 |
/workspace/coverage/cover_reg_top/78.xbar_smoke_large_delays.820235509 |
|
|
Dec 31 01:42:32 PM PST 23 |
Dec 31 01:43:59 PM PST 23 |
8483882983 ps |
| T1379 |
/workspace/coverage/cover_reg_top/45.xbar_random_large_delays.2070484414 |
|
|
Dec 31 01:39:17 PM PST 23 |
Dec 31 01:41:30 PM PST 23 |
12168692195 ps |
| T1380 |
/workspace/coverage/cover_reg_top/11.chip_csr_mem_rw_with_rand_reset.4225736576 |
|
|
Dec 31 01:36:31 PM PST 23 |
Dec 31 01:42:22 PM PST 23 |
7207555355 ps |
| T1381 |
/workspace/coverage/cover_reg_top/72.xbar_stress_all_with_reset_error.1009472140 |
|
|
Dec 31 01:42:03 PM PST 23 |
Dec 31 01:42:22 PM PST 23 |
7504068 ps |
| T1382 |
/workspace/coverage/cover_reg_top/5.xbar_unmapped_addr.944637080 |
|
|
Dec 31 01:34:57 PM PST 23 |
Dec 31 01:35:38 PM PST 23 |
932625288 ps |
| T1383 |
/workspace/coverage/cover_reg_top/28.xbar_unmapped_addr.3384285981 |
|
|
Dec 31 01:37:39 PM PST 23 |
Dec 31 01:37:48 PM PST 23 |
54749642 ps |
| T1384 |
/workspace/coverage/cover_reg_top/78.xbar_smoke_slow_rsp.1606823283 |
|
|
Dec 31 01:42:30 PM PST 23 |
Dec 31 01:43:52 PM PST 23 |
4545347147 ps |
| T1385 |
/workspace/coverage/cover_reg_top/99.xbar_stress_all_with_error.865901067 |
|
|
Dec 31 01:45:18 PM PST 23 |
Dec 31 01:50:46 PM PST 23 |
9185910632 ps |
| T1386 |
/workspace/coverage/cover_reg_top/36.xbar_smoke_large_delays.1861364613 |
|
|
Dec 31 01:38:22 PM PST 23 |
Dec 31 01:39:26 PM PST 23 |
5729003369 ps |
| T1387 |
/workspace/coverage/cover_reg_top/67.xbar_error_and_unmapped_addr.1748872759 |
|
|
Dec 31 01:41:57 PM PST 23 |
Dec 31 01:42:09 PM PST 23 |
201378170 ps |
| T1388 |
/workspace/coverage/cover_reg_top/34.xbar_stress_all_with_error.2409751012 |
|
|
Dec 31 01:40:08 PM PST 23 |
Dec 31 01:44:24 PM PST 23 |
3672114794 ps |
| T1389 |
/workspace/coverage/cover_reg_top/23.xbar_random.3125753378 |
|
|
Dec 31 01:37:25 PM PST 23 |
Dec 31 01:37:42 PM PST 23 |
321167725 ps |
| T1390 |
/workspace/coverage/cover_reg_top/47.xbar_access_same_device_slow_rsp.1170604186 |
|
|
Dec 31 01:40:03 PM PST 23 |
Dec 31 02:15:18 PM PST 23 |
121279201634 ps |
| T1391 |
/workspace/coverage/cover_reg_top/14.chip_csr_rw.454098826 |
|
|
Dec 31 01:36:06 PM PST 23 |
Dec 31 01:40:27 PM PST 23 |
4195903987 ps |
| T1392 |
/workspace/coverage/cover_reg_top/41.xbar_smoke.71926834 |
|
|
Dec 31 01:39:40 PM PST 23 |
Dec 31 01:39:52 PM PST 23 |
57248526 ps |
| T1393 |
/workspace/coverage/cover_reg_top/7.xbar_smoke_large_delays.777212653 |
|
|
Dec 31 01:35:01 PM PST 23 |
Dec 31 01:36:36 PM PST 23 |
8541236355 ps |
| T283 |
/workspace/coverage/cover_reg_top/6.chip_tl_errors.1334164405 |
|
|
Dec 31 01:35:05 PM PST 23 |
Dec 31 01:37:14 PM PST 23 |
2559875106 ps |
| T1394 |
/workspace/coverage/cover_reg_top/44.xbar_random_slow_rsp.2363360714 |
|
|
Dec 31 01:40:17 PM PST 23 |
Dec 31 01:42:13 PM PST 23 |
6416968599 ps |
| T1395 |
/workspace/coverage/cover_reg_top/17.xbar_stress_all_with_error.2136221341 |
|
|
Dec 31 01:37:15 PM PST 23 |
Dec 31 01:37:54 PM PST 23 |
617171172 ps |
| T1396 |
/workspace/coverage/cover_reg_top/63.xbar_random_slow_rsp.2113346383 |
|
|
Dec 31 01:41:19 PM PST 23 |
Dec 31 01:49:37 PM PST 23 |
27246204030 ps |
| T1397 |
/workspace/coverage/cover_reg_top/98.xbar_stress_all.2732867118 |
|
|
Dec 31 01:44:38 PM PST 23 |
Dec 31 01:52:45 PM PST 23 |
13721937008 ps |
| T1398 |
/workspace/coverage/cover_reg_top/4.xbar_random_zero_delays.1096505362 |
|
|
Dec 31 01:34:51 PM PST 23 |
Dec 31 01:35:20 PM PST 23 |
215390678 ps |
| T1399 |
/workspace/coverage/cover_reg_top/43.xbar_same_source.1115591025 |
|
|
Dec 31 01:39:16 PM PST 23 |
Dec 31 01:40:25 PM PST 23 |
2339759437 ps |
| T1400 |
/workspace/coverage/cover_reg_top/7.xbar_random_large_delays.3997523916 |
|
|
Dec 31 01:34:59 PM PST 23 |
Dec 31 01:48:32 PM PST 23 |
73664637852 ps |
| T1401 |
/workspace/coverage/cover_reg_top/83.xbar_random_large_delays.4014354579 |
|
|
Dec 31 01:43:17 PM PST 23 |
Dec 31 02:01:49 PM PST 23 |
95090062289 ps |
| T1402 |
/workspace/coverage/cover_reg_top/40.xbar_random.1408825683 |
|
|
Dec 31 01:39:15 PM PST 23 |
Dec 31 01:39:54 PM PST 23 |
439688849 ps |
| T1403 |
/workspace/coverage/cover_reg_top/42.xbar_random_large_delays.2151190988 |
|
|
Dec 31 01:39:33 PM PST 23 |
Dec 31 01:40:46 PM PST 23 |
6005329714 ps |
| T1404 |
/workspace/coverage/cover_reg_top/1.xbar_smoke.1941633319 |
|
|
Dec 31 01:34:34 PM PST 23 |
Dec 31 01:34:44 PM PST 23 |
52819943 ps |
| T1405 |
/workspace/coverage/cover_reg_top/71.xbar_access_same_device_slow_rsp.2110092948 |
|
|
Dec 31 01:42:03 PM PST 23 |
Dec 31 02:03:09 PM PST 23 |
77259690408 ps |
| T1406 |
/workspace/coverage/cover_reg_top/19.xbar_error_and_unmapped_addr.923147192 |
|
|
Dec 31 01:36:08 PM PST 23 |
Dec 31 01:37:08 PM PST 23 |
1470426140 ps |
| T1407 |
/workspace/coverage/cover_reg_top/22.xbar_random.2300250308 |
|
|
Dec 31 01:36:40 PM PST 23 |
Dec 31 01:37:27 PM PST 23 |
1162570944 ps |
| T1408 |
/workspace/coverage/cover_reg_top/16.xbar_random_zero_delays.4106106145 |
|
|
Dec 31 01:36:09 PM PST 23 |
Dec 31 01:36:56 PM PST 23 |
493744847 ps |
| T1409 |
/workspace/coverage/cover_reg_top/31.xbar_error_random.1974349287 |
|
|
Dec 31 01:38:25 PM PST 23 |
Dec 31 01:39:30 PM PST 23 |
1954408663 ps |
| T1410 |
/workspace/coverage/cover_reg_top/59.xbar_error_and_unmapped_addr.3215309780 |
|
|
Dec 31 01:41:06 PM PST 23 |
Dec 31 01:41:19 PM PST 23 |
212851723 ps |
| T1411 |
/workspace/coverage/cover_reg_top/45.xbar_random.524382903 |
|
|
Dec 31 01:39:56 PM PST 23 |
Dec 31 01:40:56 PM PST 23 |
1412252352 ps |
| T1412 |
/workspace/coverage/cover_reg_top/42.xbar_stress_all_with_error.2692819102 |
|
|
Dec 31 01:40:07 PM PST 23 |
Dec 31 01:40:58 PM PST 23 |
1467124634 ps |
| T1413 |
/workspace/coverage/cover_reg_top/9.chip_tl_errors.105988570 |
|
|
Dec 31 01:35:19 PM PST 23 |
Dec 31 01:39:44 PM PST 23 |
3916734800 ps |
| T1414 |
/workspace/coverage/cover_reg_top/76.xbar_random_zero_delays.2338901011 |
|
|
Dec 31 01:42:38 PM PST 23 |
Dec 31 01:43:03 PM PST 23 |
240227625 ps |
| T1415 |
/workspace/coverage/cover_reg_top/95.xbar_access_same_device.2607384347 |
|
|
Dec 31 01:45:16 PM PST 23 |
Dec 31 01:45:41 PM PST 23 |
338388056 ps |
| T1416 |
/workspace/coverage/cover_reg_top/55.xbar_stress_all.3343860526 |
|
|
Dec 31 01:40:52 PM PST 23 |
Dec 31 01:46:49 PM PST 23 |
9279132411 ps |
| T1417 |
/workspace/coverage/cover_reg_top/13.chip_csr_rw.982330796 |
|
|
Dec 31 01:37:14 PM PST 23 |
Dec 31 01:46:05 PM PST 23 |
5951066150 ps |
| T1418 |
/workspace/coverage/cover_reg_top/87.xbar_random.2481313649 |
|
|
Dec 31 01:43:37 PM PST 23 |
Dec 31 01:44:00 PM PST 23 |
241690430 ps |
| T1419 |
/workspace/coverage/cover_reg_top/51.xbar_error_and_unmapped_addr.3828294725 |
|
|
Dec 31 01:40:16 PM PST 23 |
Dec 31 01:40:48 PM PST 23 |
288292263 ps |
| T1420 |
/workspace/coverage/cover_reg_top/63.xbar_smoke_zero_delays.3875729535 |
|
|
Dec 31 01:42:23 PM PST 23 |
Dec 31 01:42:30 PM PST 23 |
51027556 ps |
| T1421 |
/workspace/coverage/cover_reg_top/87.xbar_stress_all_with_reset_error.1977066456 |
|
|
Dec 31 01:43:32 PM PST 23 |
Dec 31 01:44:50 PM PST 23 |
482190902 ps |
| T1422 |
/workspace/coverage/cover_reg_top/57.xbar_random_slow_rsp.3967393566 |
|
|
Dec 31 01:40:46 PM PST 23 |
Dec 31 01:48:58 PM PST 23 |
24992103029 ps |
| T1423 |
/workspace/coverage/cover_reg_top/9.xbar_stress_all_with_rand_reset.1804190458 |
|
|
Dec 31 01:35:35 PM PST 23 |
Dec 31 01:38:50 PM PST 23 |
2955865468 ps |
| T1424 |
/workspace/coverage/cover_reg_top/41.xbar_same_source.714071149 |
|
|
Dec 31 01:39:39 PM PST 23 |
Dec 31 01:39:55 PM PST 23 |
112525226 ps |
| T1425 |
/workspace/coverage/cover_reg_top/60.xbar_stress_all_with_reset_error.1818394420 |
|
|
Dec 31 01:41:28 PM PST 23 |
Dec 31 01:45:41 PM PST 23 |
2007224207 ps |
| T1426 |
/workspace/coverage/cover_reg_top/58.xbar_random_zero_delays.3693625144 |
|
|
Dec 31 01:40:45 PM PST 23 |
Dec 31 01:41:26 PM PST 23 |
453049908 ps |
| T1427 |
/workspace/coverage/cover_reg_top/92.xbar_error_and_unmapped_addr.661454249 |
|
|
Dec 31 01:44:44 PM PST 23 |
Dec 31 01:45:11 PM PST 23 |
248518389 ps |
| T1428 |
/workspace/coverage/cover_reg_top/41.xbar_access_same_device_slow_rsp.4258224292 |
|
|
Dec 31 01:40:07 PM PST 23 |
Dec 31 02:06:32 PM PST 23 |
100100706284 ps |
| T1429 |
/workspace/coverage/cover_reg_top/35.xbar_random_large_delays.3748862423 |
|
|
Dec 31 01:39:57 PM PST 23 |
Dec 31 01:57:16 PM PST 23 |
96077146996 ps |
| T1430 |
/workspace/coverage/cover_reg_top/5.xbar_access_same_device.2551052124 |
|
|
Dec 31 01:35:04 PM PST 23 |
Dec 31 01:35:51 PM PST 23 |
500916778 ps |
| T1431 |
/workspace/coverage/cover_reg_top/72.xbar_error_random.3673942586 |
|
|
Dec 31 01:42:17 PM PST 23 |
Dec 31 01:42:28 PM PST 23 |
248747789 ps |
| T1432 |
/workspace/coverage/cover_reg_top/34.xbar_random_zero_delays.2137652462 |
|
|
Dec 31 01:39:17 PM PST 23 |
Dec 31 01:39:42 PM PST 23 |
254628139 ps |
| T1433 |
/workspace/coverage/cover_reg_top/65.xbar_same_source.2100382721 |
|
|
Dec 31 01:41:28 PM PST 23 |
Dec 31 01:41:36 PM PST 23 |
44472186 ps |
| T1434 |
/workspace/coverage/cover_reg_top/70.xbar_error_and_unmapped_addr.3103675181 |
|
|
Dec 31 01:42:14 PM PST 23 |
Dec 31 01:42:24 PM PST 23 |
70373399 ps |
| T1435 |
/workspace/coverage/cover_reg_top/88.xbar_smoke_zero_delays.1203251503 |
|
|
Dec 31 01:44:11 PM PST 23 |
Dec 31 01:44:18 PM PST 23 |
44627166 ps |
| T42 |
/workspace/coverage/cover_reg_top/0.chip_rv_dm_lc_disabled.1676874907 |
|
|
Dec 31 01:34:40 PM PST 23 |
Dec 31 01:39:53 PM PST 23 |
9674613869 ps |
| T1436 |
/workspace/coverage/cover_reg_top/58.xbar_stress_all_with_rand_reset.2814482004 |
|
|
Dec 31 01:40:51 PM PST 23 |
Dec 31 01:48:51 PM PST 23 |
5175927562 ps |
| T1437 |
/workspace/coverage/cover_reg_top/67.xbar_smoke_zero_delays.1886074188 |
|
|
Dec 31 01:41:29 PM PST 23 |
Dec 31 01:41:36 PM PST 23 |
39260812 ps |
| T1438 |
/workspace/coverage/cover_reg_top/94.xbar_same_source.2371846963 |
|
|
Dec 31 01:44:17 PM PST 23 |
Dec 31 01:44:37 PM PST 23 |
236991411 ps |
| T1439 |
/workspace/coverage/cover_reg_top/1.xbar_stress_all.1652967577 |
|
|
Dec 31 01:34:10 PM PST 23 |
Dec 31 01:35:32 PM PST 23 |
2273711962 ps |
| T1440 |
/workspace/coverage/cover_reg_top/13.xbar_unmapped_addr.502159515 |
|
|
Dec 31 01:37:11 PM PST 23 |
Dec 31 01:38:01 PM PST 23 |
1093803521 ps |
| T1441 |
/workspace/coverage/cover_reg_top/99.xbar_error_random.674293336 |
|
|
Dec 31 01:44:43 PM PST 23 |
Dec 31 01:45:09 PM PST 23 |
308558274 ps |
| T1442 |
/workspace/coverage/cover_reg_top/78.xbar_error_and_unmapped_addr.3352579106 |
|
|
Dec 31 01:42:56 PM PST 23 |
Dec 31 01:43:04 PM PST 23 |
37509649 ps |
| T1443 |
/workspace/coverage/cover_reg_top/94.xbar_smoke_zero_delays.4121339846 |
|
|
Dec 31 01:45:32 PM PST 23 |
Dec 31 01:45:39 PM PST 23 |
40020489 ps |
| T1444 |
/workspace/coverage/cover_reg_top/14.xbar_random_slow_rsp.2461398633 |
|
|
Dec 31 01:36:03 PM PST 23 |
Dec 31 01:53:03 PM PST 23 |
55601255874 ps |
| T1445 |
/workspace/coverage/cover_reg_top/79.xbar_error_random.533542340 |
|
|
Dec 31 01:42:51 PM PST 23 |
Dec 31 01:44:23 PM PST 23 |
2312858469 ps |
| T1446 |
/workspace/coverage/cover_reg_top/16.xbar_same_source.2532222861 |
|
|
Dec 31 01:36:01 PM PST 23 |
Dec 31 01:36:38 PM PST 23 |
504731582 ps |
| T1447 |
/workspace/coverage/cover_reg_top/24.xbar_smoke_large_delays.3316348732 |
|
|
Dec 31 01:36:53 PM PST 23 |
Dec 31 01:38:29 PM PST 23 |
8875180869 ps |
| T1448 |
/workspace/coverage/cover_reg_top/27.xbar_smoke_slow_rsp.1902888203 |
|
|
Dec 31 01:37:44 PM PST 23 |
Dec 31 01:39:29 PM PST 23 |
5707131671 ps |
| T1449 |
/workspace/coverage/cover_reg_top/43.xbar_access_same_device_slow_rsp.3012454797 |
|
|
Dec 31 01:40:00 PM PST 23 |
Dec 31 02:03:16 PM PST 23 |
87344027582 ps |
| T1450 |
/workspace/coverage/cover_reg_top/58.xbar_smoke_large_delays.3902912359 |
|
|
Dec 31 01:40:46 PM PST 23 |
Dec 31 01:42:38 PM PST 23 |
10171825945 ps |
| T1451 |
/workspace/coverage/cover_reg_top/21.xbar_smoke_large_delays.1020268182 |
|
|
Dec 31 01:37:06 PM PST 23 |
Dec 31 01:38:52 PM PST 23 |
10029332023 ps |
| T1452 |
/workspace/coverage/cover_reg_top/23.xbar_smoke.4150174138 |
|
|
Dec 31 01:37:20 PM PST 23 |
Dec 31 01:37:31 PM PST 23 |
50247557 ps |
| T1453 |
/workspace/coverage/cover_reg_top/55.xbar_smoke_zero_delays.119688161 |
|
|
Dec 31 01:40:37 PM PST 23 |
Dec 31 01:40:45 PM PST 23 |
53266608 ps |
| T1454 |
/workspace/coverage/cover_reg_top/64.xbar_unmapped_addr.2743124050 |
|
|
Dec 31 01:41:22 PM PST 23 |
Dec 31 01:41:46 PM PST 23 |
212364959 ps |
| T1455 |
/workspace/coverage/cover_reg_top/37.xbar_error_and_unmapped_addr.2593758044 |
|
|
Dec 31 01:38:27 PM PST 23 |
Dec 31 01:38:52 PM PST 23 |
217715558 ps |
| T1456 |
/workspace/coverage/cover_reg_top/10.xbar_random_large_delays.1511011546 |
|
|
Dec 31 01:35:42 PM PST 23 |
Dec 31 01:44:40 PM PST 23 |
50417654751 ps |
| T1457 |
/workspace/coverage/cover_reg_top/11.xbar_smoke_zero_delays.655343358 |
|
|
Dec 31 01:35:47 PM PST 23 |
Dec 31 01:35:53 PM PST 23 |
43362973 ps |
| T1458 |
/workspace/coverage/cover_reg_top/66.xbar_smoke.1009238526 |
|
|
Dec 31 01:41:26 PM PST 23 |
Dec 31 01:41:34 PM PST 23 |
51393862 ps |
| T1459 |
/workspace/coverage/cover_reg_top/41.xbar_unmapped_addr.1354184915 |
|
|
Dec 31 01:39:15 PM PST 23 |
Dec 31 01:39:22 PM PST 23 |
77525217 ps |
| T1460 |
/workspace/coverage/cover_reg_top/24.xbar_smoke_zero_delays.2573913700 |
|
|
Dec 31 01:36:55 PM PST 23 |
Dec 31 01:37:06 PM PST 23 |
44778912 ps |
| T1461 |
/workspace/coverage/cover_reg_top/19.xbar_smoke.1072743189 |
|
|
Dec 31 01:37:10 PM PST 23 |
Dec 31 01:37:23 PM PST 23 |
46738154 ps |
| T1462 |
/workspace/coverage/cover_reg_top/61.xbar_random_slow_rsp.2674288539 |
|
|
Dec 31 01:41:31 PM PST 23 |
Dec 31 01:56:19 PM PST 23 |
53192996575 ps |
| T1463 |
/workspace/coverage/cover_reg_top/90.xbar_error_random.353963447 |
|
|
Dec 31 01:44:12 PM PST 23 |
Dec 31 01:45:00 PM PST 23 |
598623404 ps |
| T1464 |
/workspace/coverage/cover_reg_top/89.xbar_stress_all_with_rand_reset.1124978053 |
|
|
Dec 31 01:44:10 PM PST 23 |
Dec 31 01:50:09 PM PST 23 |
3698691305 ps |
| T1465 |
/workspace/coverage/cover_reg_top/61.xbar_smoke_zero_delays.935440687 |
|
|
Dec 31 01:41:25 PM PST 23 |
Dec 31 01:41:33 PM PST 23 |
52468466 ps |
| T1466 |
/workspace/coverage/cover_reg_top/52.xbar_smoke_large_delays.2272961230 |
|
|
Dec 31 01:40:17 PM PST 23 |
Dec 31 01:42:14 PM PST 23 |
11203853352 ps |
| T1467 |
/workspace/coverage/cover_reg_top/16.xbar_random.3554399353 |
|
|
Dec 31 01:37:21 PM PST 23 |
Dec 31 01:37:46 PM PST 23 |
220805580 ps |
| T1468 |
/workspace/coverage/cover_reg_top/25.xbar_random_large_delays.3056848769 |
|
|
Dec 31 01:37:22 PM PST 23 |
Dec 31 01:45:20 PM PST 23 |
46187746356 ps |
| T1469 |
/workspace/coverage/cover_reg_top/89.xbar_smoke.654780270 |
|
|
Dec 31 01:44:15 PM PST 23 |
Dec 31 01:44:24 PM PST 23 |
56585668 ps |
| T1470 |
/workspace/coverage/cover_reg_top/78.xbar_random.460527445 |
|
|
Dec 31 01:43:09 PM PST 23 |
Dec 31 01:43:19 PM PST 23 |
181766816 ps |
| T1471 |
/workspace/coverage/cover_reg_top/50.xbar_access_same_device.2163982545 |
|
|
Dec 31 01:40:01 PM PST 23 |
Dec 31 01:40:41 PM PST 23 |
349750301 ps |
| T1472 |
/workspace/coverage/cover_reg_top/38.xbar_access_same_device_slow_rsp.2578125882 |
|
|
Dec 31 01:38:27 PM PST 23 |
Dec 31 02:16:21 PM PST 23 |
136344650555 ps |
| T1473 |
/workspace/coverage/cover_reg_top/16.xbar_smoke_large_delays.3574955603 |
|
|
Dec 31 01:37:20 PM PST 23 |
Dec 31 01:38:54 PM PST 23 |
8216146804 ps |
| T1474 |
/workspace/coverage/cover_reg_top/62.xbar_smoke.2437090327 |
|
|
Dec 31 01:41:19 PM PST 23 |
Dec 31 01:41:27 PM PST 23 |
46135602 ps |
| T1475 |
/workspace/coverage/cover_reg_top/81.xbar_smoke_large_delays.4142790659 |
|
|
Dec 31 01:42:53 PM PST 23 |
Dec 31 01:44:24 PM PST 23 |
7892160797 ps |
| T1476 |
/workspace/coverage/cover_reg_top/18.chip_same_csr_outstanding.23527198 |
|
|
Dec 31 01:37:15 PM PST 23 |
Dec 31 02:04:42 PM PST 23 |
14692776741 ps |
| T1477 |
/workspace/coverage/cover_reg_top/18.xbar_random_large_delays.1441373908 |
|
|
Dec 31 01:36:05 PM PST 23 |
Dec 31 01:44:58 PM PST 23 |
47276665994 ps |
| T1478 |
/workspace/coverage/cover_reg_top/1.xbar_stress_all_with_rand_reset.2372985144 |
|
|
Dec 31 01:34:21 PM PST 23 |
Dec 31 01:35:52 PM PST 23 |
240366404 ps |
| T1479 |
/workspace/coverage/cover_reg_top/68.xbar_stress_all.4242863365 |
|
|
Dec 31 01:42:42 PM PST 23 |
Dec 31 01:44:12 PM PST 23 |
985896366 ps |
| T1480 |
/workspace/coverage/cover_reg_top/28.xbar_same_source.1620501868 |
|
|
Dec 31 01:38:23 PM PST 23 |
Dec 31 01:39:17 PM PST 23 |
1707945591 ps |
| T1481 |
/workspace/coverage/cover_reg_top/12.xbar_stress_all.1465506527 |
|
|
Dec 31 01:36:39 PM PST 23 |
Dec 31 01:39:22 PM PST 23 |
2059463598 ps |
| T1482 |
/workspace/coverage/cover_reg_top/97.xbar_stress_all_with_rand_reset.2229672080 |
|
|
Dec 31 01:44:47 PM PST 23 |
Dec 31 01:45:26 PM PST 23 |
100893268 ps |
| T1483 |
/workspace/coverage/cover_reg_top/59.xbar_error_random.2450996827 |
|
|
Dec 31 01:41:18 PM PST 23 |
Dec 31 01:42:00 PM PST 23 |
1168048575 ps |
| T1484 |
/workspace/coverage/cover_reg_top/77.xbar_stress_all_with_error.33232189 |
|
|
Dec 31 01:42:48 PM PST 23 |
Dec 31 01:48:12 PM PST 23 |
8754336909 ps |
| T1485 |
/workspace/coverage/cover_reg_top/51.xbar_stress_all.525451827 |
|
|
Dec 31 01:40:16 PM PST 23 |
Dec 31 01:45:40 PM PST 23 |
8868553682 ps |
| T1486 |
/workspace/coverage/cover_reg_top/16.xbar_stress_all_with_error.3043282190 |
|
|
Dec 31 01:36:07 PM PST 23 |
Dec 31 01:37:46 PM PST 23 |
1420580901 ps |
| T1487 |
/workspace/coverage/cover_reg_top/6.xbar_smoke.2481872347 |
|
|
Dec 31 01:34:56 PM PST 23 |
Dec 31 01:35:05 PM PST 23 |
40506510 ps |
| T1488 |
/workspace/coverage/cover_reg_top/15.xbar_random_zero_delays.604793933 |
|
|
Dec 31 01:36:09 PM PST 23 |
Dec 31 01:36:51 PM PST 23 |
487488419 ps |
| T1489 |
/workspace/coverage/cover_reg_top/77.xbar_smoke_zero_delays.2232654144 |
|
|
Dec 31 01:43:18 PM PST 23 |
Dec 31 01:43:25 PM PST 23 |
47046172 ps |
| T1490 |
/workspace/coverage/cover_reg_top/17.xbar_error_random.3306259247 |
|
|
Dec 31 01:36:32 PM PST 23 |
Dec 31 01:37:34 PM PST 23 |
1966328608 ps |
| T1491 |
/workspace/coverage/cover_reg_top/6.xbar_unmapped_addr.2396654810 |
|
|
Dec 31 01:34:52 PM PST 23 |
Dec 31 01:35:08 PM PST 23 |
227488850 ps |
| T1492 |
/workspace/coverage/cover_reg_top/93.xbar_random_large_delays.397334436 |
|
|
Dec 31 01:44:19 PM PST 23 |
Dec 31 01:49:57 PM PST 23 |
32305506067 ps |
| T1493 |
/workspace/coverage/cover_reg_top/21.xbar_random.1857751296 |
|
|
Dec 31 01:36:44 PM PST 23 |
Dec 31 01:37:16 PM PST 23 |
895671546 ps |
| T1494 |
/workspace/coverage/cover_reg_top/95.xbar_smoke.3988568260 |
|
|
Dec 31 01:45:14 PM PST 23 |
Dec 31 01:45:25 PM PST 23 |
184605892 ps |
| T1495 |
/workspace/coverage/cover_reg_top/30.xbar_stress_all.306078238 |
|
|
Dec 31 01:39:05 PM PST 23 |
Dec 31 01:40:05 PM PST 23 |
658515623 ps |
| T1496 |
/workspace/coverage/cover_reg_top/81.xbar_random.1948842577 |
|
|
Dec 31 01:42:47 PM PST 23 |
Dec 31 01:43:10 PM PST 23 |
188390754 ps |
| T1497 |
/workspace/coverage/cover_reg_top/0.xbar_error_and_unmapped_addr.4290018901 |
|
|
Dec 31 01:35:05 PM PST 23 |
Dec 31 01:35:31 PM PST 23 |
206029611 ps |
| T1498 |
/workspace/coverage/cover_reg_top/75.xbar_unmapped_addr.3081467811 |
|
|
Dec 31 01:42:54 PM PST 23 |
Dec 31 01:43:03 PM PST 23 |
37658128 ps |
| T1499 |
/workspace/coverage/cover_reg_top/80.xbar_access_same_device_slow_rsp.435036495 |
|
|
Dec 31 01:42:49 PM PST 23 |
Dec 31 02:17:26 PM PST 23 |
122302997026 ps |
| T1500 |
/workspace/coverage/cover_reg_top/54.xbar_smoke.4011874483 |
|
|
Dec 31 01:40:57 PM PST 23 |
Dec 31 01:41:06 PM PST 23 |
133769872 ps |
| T354 |
/workspace/coverage/cover_reg_top/11.xbar_stress_all_with_rand_reset.1972844623 |
|
|
Dec 31 01:35:30 PM PST 23 |
Dec 31 01:39:10 PM PST 23 |
637663411 ps |
| T1501 |
/workspace/coverage/cover_reg_top/59.xbar_same_source.1189911363 |
|
|
Dec 31 01:40:58 PM PST 23 |
Dec 31 01:41:32 PM PST 23 |
1020530083 ps |
| T1502 |
/workspace/coverage/cover_reg_top/16.xbar_random_slow_rsp.2739413632 |
|
|
Dec 31 01:36:04 PM PST 23 |
Dec 31 01:37:26 PM PST 23 |
4739959346 ps |
| T1503 |
/workspace/coverage/cover_reg_top/45.xbar_unmapped_addr.3847937546 |
|
|
Dec 31 01:39:38 PM PST 23 |
Dec 31 01:40:02 PM PST 23 |
397299844 ps |
| T1504 |
/workspace/coverage/cover_reg_top/0.chip_csr_aliasing.3515020842 |
|
|
Dec 31 01:33:53 PM PST 23 |
Dec 31 03:49:06 PM PST 23 |
58400064740 ps |
| T1505 |
/workspace/coverage/cover_reg_top/97.xbar_access_same_device_slow_rsp.3199586617 |
|
|
Dec 31 01:44:17 PM PST 23 |
Dec 31 02:14:09 PM PST 23 |
99359575746 ps |
| T287 |
/workspace/coverage/cover_reg_top/23.chip_tl_errors.1068927657 |
|
|
Dec 31 01:36:56 PM PST 23 |
Dec 31 01:41:05 PM PST 23 |
3925773510 ps |
| T1506 |
/workspace/coverage/cover_reg_top/33.xbar_random_zero_delays.2948654994 |
|
|
Dec 31 01:38:03 PM PST 23 |
Dec 31 01:38:20 PM PST 23 |
157936007 ps |
| T1507 |
/workspace/coverage/cover_reg_top/13.xbar_smoke_slow_rsp.1840795447 |
|
|
Dec 31 01:37:16 PM PST 23 |
Dec 31 01:38:46 PM PST 23 |
5253361873 ps |
| T1508 |
/workspace/coverage/cover_reg_top/37.xbar_smoke.1757206927 |
|
|
Dec 31 01:39:36 PM PST 23 |
Dec 31 01:39:48 PM PST 23 |
203012318 ps |
| T1509 |
/workspace/coverage/cover_reg_top/47.xbar_error_and_unmapped_addr.198572741 |
|
|
Dec 31 01:40:08 PM PST 23 |
Dec 31 01:40:50 PM PST 23 |
1141192473 ps |
| T1510 |
/workspace/coverage/cover_reg_top/5.xbar_random_large_delays.1254057916 |
|
|
Dec 31 01:34:54 PM PST 23 |
Dec 31 01:43:10 PM PST 23 |
40965055398 ps |
| T1511 |
/workspace/coverage/cover_reg_top/68.xbar_error_and_unmapped_addr.1164700581 |
|
|
Dec 31 01:42:43 PM PST 23 |
Dec 31 01:43:18 PM PST 23 |
733215611 ps |
| T1512 |
/workspace/coverage/cover_reg_top/7.xbar_same_source.699387281 |
|
|
Dec 31 01:35:03 PM PST 23 |
Dec 31 01:35:29 PM PST 23 |
315833452 ps |
| T1513 |
/workspace/coverage/cover_reg_top/74.xbar_random_large_delays.1911056050 |
|
|
Dec 31 01:42:46 PM PST 23 |
Dec 31 01:47:11 PM PST 23 |
26163839561 ps |