Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
86.49 88.61 85.76 70.93 86.47 88.35 98.80


Total tests in report: 1927
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
30.61 30.61 42.98 42.98 36.18 36.18 36.81 36.81 46.14 46.14 21.00 21.00 0.53 0.53 /workspace/coverage/cover_reg_top/4.chip_csr_mem_rw_with_rand_reset.2236182327
45.80 15.19 50.71 7.73 56.92 20.74 49.13 12.32 65.60 19.46 49.44 28.44 3.01 2.48 /workspace/coverage/cover_reg_top/18.chip_csr_rw.629293355
60.53 14.73 62.23 11.52 74.48 17.56 54.39 5.26 82.84 17.25 86.25 36.80 3.01 0.00 /workspace/coverage/pad_ctrl_test_mode/5.chip_padctrl_attributes.303331422
68.29 7.76 80.80 18.57 78.27 3.79 64.57 10.18 83.15 0.31 86.25 0.00 16.71 13.70 /workspace/coverage/cover_reg_top/15.xbar_stress_all_with_rand_reset.471281352
72.42 4.13 80.80 0.00 78.29 0.02 64.57 0.00 83.15 0.00 86.25 0.00 41.47 24.76 /workspace/coverage/cover_reg_top/74.xbar_access_same_device_slow_rsp.1455849053
75.19 2.76 80.80 0.00 78.56 0.27 64.57 0.00 83.28 0.13 86.25 0.00 57.66 16.18 /workspace/coverage/cover_reg_top/92.xbar_access_same_device_slow_rsp.954515145
76.89 1.71 80.80 0.00 78.56 0.00 64.57 0.00 83.28 0.00 86.25 0.00 67.90 10.24 /workspace/coverage/cover_reg_top/69.xbar_access_same_device_slow_rsp.555790069
78.33 1.44 85.20 4.40 79.59 1.03 64.92 0.35 84.30 1.01 88.10 1.86 67.90 0.00 /workspace/coverage/default/2.chip_jtag_csr_rw.1182926126
79.64 1.31 85.20 0.01 79.81 0.22 65.68 0.76 84.33 0.03 88.10 0.00 74.73 6.83 /workspace/coverage/cover_reg_top/25.xbar_stress_all_with_error.1486280498
80.77 1.13 86.71 1.51 81.48 1.67 67.43 1.75 85.76 1.43 88.10 0.00 75.15 0.42 /workspace/coverage/cover_reg_top/1.chip_csr_hw_reset.1101228571
81.87 1.10 86.71 0.00 81.48 0.00 67.43 0.00 85.76 0.00 88.10 0.00 81.75 6.60 /workspace/coverage/cover_reg_top/52.xbar_access_same_device_slow_rsp.353967395
82.72 0.85 86.71 0.00 81.61 0.14 67.43 0.00 85.81 0.05 88.10 0.00 86.64 4.89 /workspace/coverage/cover_reg_top/62.xbar_access_same_device_slow_rsp.3816833756
83.17 0.46 86.71 0.00 81.61 0.00 67.43 0.00 85.81 0.00 88.10 0.00 89.38 2.74 /workspace/coverage/cover_reg_top/32.xbar_stress_all_with_error.1663979003
83.62 0.45 86.71 0.00 81.61 0.00 67.43 0.00 85.81 0.00 88.10 0.00 92.06 2.68 /workspace/coverage/cover_reg_top/19.xbar_access_same_device_slow_rsp.3944255683
84.05 0.43 86.72 0.01 83.24 1.63 67.97 0.54 85.81 0.00 88.10 0.00 92.45 0.39 /workspace/coverage/cover_reg_top/24.chip_tl_errors.2367282599
84.41 0.36 86.72 0.00 83.24 0.00 67.97 0.00 85.81 0.00 88.10 0.00 94.64 2.19 /workspace/coverage/cover_reg_top/32.xbar_access_same_device_slow_rsp.3489091786
84.73 0.32 87.28 0.56 83.63 0.39 68.54 0.57 86.09 0.29 88.10 0.00 94.73 0.09 /workspace/coverage/cover_reg_top/0.chip_csr_hw_reset.2389140834
85.01 0.28 87.28 0.00 83.63 0.00 70.22 1.69 86.09 0.00 88.10 0.00 94.73 0.00 /workspace/coverage/cover_reg_top/1.chip_prim_tl_access.3298932250
85.18 0.17 87.28 0.00 83.63 0.00 70.22 0.00 86.09 0.00 88.10 0.00 95.73 1.00 /workspace/coverage/cover_reg_top/6.xbar_access_same_device_slow_rsp.3716526167
85.34 0.16 87.28 0.00 83.75 0.12 70.22 0.00 86.14 0.05 88.10 0.00 96.55 0.82 /workspace/coverage/cover_reg_top/74.xbar_random.741625055
85.49 0.15 87.28 0.00 83.89 0.14 70.22 0.00 86.21 0.07 88.10 0.00 97.25 0.69 /workspace/coverage/cover_reg_top/38.xbar_stress_all.107890456
85.62 0.13 87.50 0.22 84.17 0.27 70.37 0.15 86.24 0.03 88.10 0.00 97.35 0.11 /workspace/coverage/cover_reg_top/9.chip_same_csr_outstanding.1197208185
85.74 0.11 87.50 0.00 84.79 0.63 70.41 0.04 86.24 0.00 88.10 0.00 97.37 0.01 /workspace/coverage/cover_reg_top/16.chip_tl_errors.4047853321
85.85 0.11 87.50 0.00 84.82 0.03 70.41 0.00 86.26 0.02 88.10 0.00 97.99 0.62 /workspace/coverage/cover_reg_top/55.xbar_random_large_delays.1494775604
85.95 0.10 87.86 0.36 84.84 0.01 70.67 0.25 86.26 0.00 88.10 0.00 97.99 0.00 /workspace/coverage/cover_reg_top/2.chip_csr_hw_reset.2598945178
86.02 0.07 87.87 0.01 84.85 0.01 70.69 0.02 86.27 0.01 88.48 0.37 98.00 0.01 /workspace/coverage/cover_reg_top/19.chip_csr_mem_rw_with_rand_reset.3123683924
86.09 0.07 87.87 0.00 84.94 0.10 70.69 0.00 86.30 0.03 88.48 0.00 98.27 0.27 /workspace/coverage/cover_reg_top/81.xbar_stress_all_with_rand_reset.1107874227
86.14 0.05 87.97 0.10 85.17 0.22 70.69 0.00 86.30 0.00 88.48 0.00 98.27 0.00 /workspace/coverage/cover_reg_top/22.chip_tl_errors.3740350451
86.18 0.04 88.07 0.11 85.22 0.05 70.74 0.06 86.30 0.00 88.48 0.00 98.27 0.00 /workspace/coverage/cover_reg_top/4.chip_csr_hw_reset.3604645845
86.22 0.03 88.07 0.00 85.29 0.07 70.74 0.00 86.35 0.05 88.48 0.00 98.35 0.08 /workspace/coverage/cover_reg_top/52.xbar_stress_all_with_rand_reset.1064370733
86.24 0.03 88.25 0.18 85.29 0.00 70.74 0.00 86.35 0.00 88.48 0.00 98.35 0.00 /workspace/coverage/default/0.chip_jtag_csr_rw.153767413
86.27 0.03 88.25 0.00 85.40 0.11 70.74 0.00 86.42 0.07 88.48 0.00 98.35 0.00 /workspace/coverage/cover_reg_top/31.xbar_stress_all.534627405
86.30 0.03 88.35 0.10 85.42 0.01 70.79 0.05 86.42 0.00 88.48 0.00 98.35 0.00 /workspace/coverage/cover_reg_top/3.chip_csr_hw_reset.399920061
86.32 0.02 88.38 0.03 85.43 0.01 70.89 0.10 86.42 0.01 88.48 0.00 98.35 0.00 /workspace/coverage/default/0.chip_jtag_mem_access.3526852104
86.34 0.02 88.38 0.00 85.47 0.05 70.89 0.00 86.44 0.02 88.48 0.00 98.41 0.06 /workspace/coverage/cover_reg_top/29.xbar_stress_all.3739483670
86.36 0.02 88.38 0.00 85.55 0.08 70.89 0.00 86.44 0.00 88.48 0.00 98.44 0.02 /workspace/coverage/cover_reg_top/21.chip_tl_errors.4232675738
86.38 0.02 88.38 0.00 85.61 0.06 70.89 0.00 86.47 0.03 88.48 0.00 98.44 0.00 /workspace/coverage/cover_reg_top/9.xbar_stress_all.2985269673
86.39 0.01 88.38 0.00 85.62 0.01 70.89 0.00 86.47 0.00 88.48 0.00 98.51 0.07 /workspace/coverage/cover_reg_top/24.xbar_stress_all_with_reset_error.3320745731
86.40 0.01 88.38 0.01 85.64 0.03 70.91 0.03 86.47 0.00 88.48 0.00 98.51 0.00 /workspace/coverage/cover_reg_top/14.chip_same_csr_outstanding.322326015
86.41 0.01 88.38 0.00 85.64 0.00 70.91 0.00 86.47 0.00 88.48 0.00 98.55 0.05 /workspace/coverage/cover_reg_top/33.xbar_stress_all_with_error.3411783039
86.41 0.01 88.38 0.00 85.65 0.01 70.91 0.00 86.47 0.00 88.48 0.00 98.59 0.04 /workspace/coverage/cover_reg_top/54.xbar_stress_all_with_rand_reset.3109566898
86.42 0.01 88.38 0.00 85.69 0.04 70.91 0.00 86.47 0.00 88.48 0.00 98.59 0.00 /workspace/coverage/cover_reg_top/1.chip_tl_errors.471718617
86.43 0.01 88.38 0.00 85.69 0.00 70.91 0.00 86.47 0.00 88.48 0.00 98.62 0.04 /workspace/coverage/cover_reg_top/11.xbar_stress_all_with_rand_reset.1972844623
86.43 0.01 88.38 0.00 85.69 0.00 70.91 0.00 86.47 0.00 88.48 0.00 98.66 0.04 /workspace/coverage/cover_reg_top/19.xbar_stress_all_with_rand_reset.961927237
86.44 0.01 88.38 0.00 85.69 0.00 70.91 0.00 86.47 0.00 88.48 0.00 98.69 0.04 /workspace/coverage/cover_reg_top/83.xbar_stress_all_with_rand_reset.2421011065
86.44 0.01 88.41 0.03 85.69 0.00 70.91 0.00 86.47 0.00 88.48 0.00 98.69 0.00 /workspace/coverage/pad_ctrl_test_mode/2.chip_padctrl_attributes.2195595591
86.45 0.01 88.42 0.01 85.69 0.00 70.92 0.01 86.47 0.00 88.48 0.00 98.69 0.00 /workspace/coverage/default/1.chip_jtag_csr_rw.1723582839
86.45 0.01 88.42 0.00 85.69 0.00 70.92 0.00 86.47 0.00 88.48 0.00 98.72 0.02 /workspace/coverage/cover_reg_top/13.xbar_stress_all_with_rand_reset.3107367151
86.45 0.01 88.42 0.00 85.69 0.00 70.92 0.00 86.47 0.00 88.48 0.00 98.74 0.02 /workspace/coverage/cover_reg_top/61.xbar_stress_all_with_reset_error.4027681778
86.46 0.01 88.42 0.00 85.71 0.02 70.93 0.01 86.47 0.00 88.48 0.00 98.74 0.00 /workspace/coverage/cover_reg_top/25.chip_tl_errors.1706395087
86.46 0.01 88.42 0.00 85.71 0.01 70.93 0.00 86.47 0.00 88.48 0.00 98.75 0.01 /workspace/coverage/cover_reg_top/11.chip_tl_errors.3694535569
86.46 0.01 88.42 0.00 85.73 0.01 70.93 0.00 86.47 0.00 88.48 0.00 98.75 0.00 /workspace/coverage/cover_reg_top/16.chip_same_csr_outstanding.4109830017
86.47 0.01 88.42 0.00 85.73 0.00 70.93 0.00 86.47 0.00 88.48 0.00 98.77 0.01 /workspace/coverage/cover_reg_top/26.xbar_stress_all_with_rand_reset.3361770273
86.47 0.01 88.42 0.00 85.73 0.00 70.93 0.00 86.47 0.00 88.48 0.00 98.78 0.01 /workspace/coverage/cover_reg_top/34.xbar_stress_all_with_rand_reset.1952039019
86.47 0.01 88.42 0.00 85.73 0.00 70.93 0.00 86.47 0.00 88.48 0.00 98.79 0.01 /workspace/coverage/cover_reg_top/67.xbar_stress_all_with_rand_reset.2979067551
86.47 0.01 88.42 0.00 85.73 0.00 70.93 0.00 86.47 0.00 88.48 0.00 98.80 0.01 /workspace/coverage/cover_reg_top/7.xbar_stress_all_with_reset_error.1916911442
86.47 0.01 88.42 0.00 85.73 0.01 70.93 0.00 86.47 0.00 88.48 0.00 98.80 0.00 /workspace/coverage/cover_reg_top/18.chip_tl_errors.3636163456
86.47 0.01 88.42 0.00 85.73 0.00 70.93 0.01 86.47 0.00 88.48 0.00 98.80 0.00 /workspace/coverage/cover_reg_top/0.chip_csr_bit_bash.1282474105
86.47 0.01 88.42 0.00 85.74 0.01 70.93 0.00 86.47 0.00 88.48 0.00 98.80 0.00 /workspace/coverage/cover_reg_top/11.xbar_access_same_device_slow_rsp.502799024
86.47 0.01 88.42 0.00 85.74 0.01 70.93 0.00 86.47 0.00 88.48 0.00 98.80 0.00 /workspace/coverage/cover_reg_top/20.xbar_stress_all_with_error.3622909649
86.48 0.01 88.42 0.00 85.75 0.01 70.93 0.00 86.47 0.00 88.48 0.00 98.80 0.00 /workspace/coverage/cover_reg_top/35.xbar_stress_all_with_error.1393547329
86.48 0.01 88.42 0.00 85.75 0.01 70.93 0.00 86.47 0.00 88.48 0.00 98.80 0.00 /workspace/coverage/cover_reg_top/51.xbar_stress_all_with_error.1019750014
86.48 0.01 88.42 0.00 85.75 0.01 70.93 0.00 86.47 0.00 88.48 0.00 98.80 0.00 /workspace/coverage/cover_reg_top/53.xbar_stress_all_with_reset_error.1652486619
86.48 0.01 88.42 0.00 85.76 0.01 70.93 0.00 86.47 0.00 88.48 0.00 98.80 0.00 /workspace/coverage/cover_reg_top/65.xbar_stress_all_with_reset_error.2239552992
86.48 0.01 88.42 0.00 85.76 0.01 70.93 0.00 86.47 0.00 88.48 0.00 98.80 0.00 /workspace/coverage/cover_reg_top/7.chip_tl_errors.1418016408


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.chip_csr_aliasing.3515020842
/workspace/coverage/cover_reg_top/0.chip_csr_mem_rw_with_rand_reset.2658065604
/workspace/coverage/cover_reg_top/0.chip_csr_rw.2166959737
/workspace/coverage/cover_reg_top/0.chip_prim_tl_access.890907192
/workspace/coverage/cover_reg_top/0.chip_rv_dm_lc_disabled.1676874907
/workspace/coverage/cover_reg_top/0.chip_same_csr_outstanding.2373644124
/workspace/coverage/cover_reg_top/0.chip_tl_errors.321905833
/workspace/coverage/cover_reg_top/0.xbar_access_same_device.773304103
/workspace/coverage/cover_reg_top/0.xbar_access_same_device_slow_rsp.3417542547
/workspace/coverage/cover_reg_top/0.xbar_error_and_unmapped_addr.4290018901
/workspace/coverage/cover_reg_top/0.xbar_error_random.700020967
/workspace/coverage/cover_reg_top/0.xbar_random.2065878968
/workspace/coverage/cover_reg_top/0.xbar_random_large_delays.220041943
/workspace/coverage/cover_reg_top/0.xbar_random_slow_rsp.2048170352
/workspace/coverage/cover_reg_top/0.xbar_random_zero_delays.1181730179
/workspace/coverage/cover_reg_top/0.xbar_same_source.833384136
/workspace/coverage/cover_reg_top/0.xbar_smoke.2732907386
/workspace/coverage/cover_reg_top/0.xbar_smoke_large_delays.260255331
/workspace/coverage/cover_reg_top/0.xbar_smoke_slow_rsp.290352119
/workspace/coverage/cover_reg_top/0.xbar_smoke_zero_delays.930434807
/workspace/coverage/cover_reg_top/0.xbar_stress_all.1762060919
/workspace/coverage/cover_reg_top/0.xbar_stress_all_with_error.250834818
/workspace/coverage/cover_reg_top/0.xbar_stress_all_with_rand_reset.3177754190
/workspace/coverage/cover_reg_top/0.xbar_stress_all_with_reset_error.1750865245
/workspace/coverage/cover_reg_top/0.xbar_unmapped_addr.2454634444
/workspace/coverage/cover_reg_top/1.chip_csr_aliasing.3109452299
/workspace/coverage/cover_reg_top/1.chip_csr_bit_bash.2343902592
/workspace/coverage/cover_reg_top/1.chip_csr_mem_rw_with_rand_reset.710295681
/workspace/coverage/cover_reg_top/1.chip_csr_rw.1645906614
/workspace/coverage/cover_reg_top/1.chip_rv_dm_lc_disabled.2256899156
/workspace/coverage/cover_reg_top/1.chip_same_csr_outstanding.3342517627
/workspace/coverage/cover_reg_top/1.xbar_access_same_device.520585712
/workspace/coverage/cover_reg_top/1.xbar_access_same_device_slow_rsp.947531030
/workspace/coverage/cover_reg_top/1.xbar_error_and_unmapped_addr.1770195852
/workspace/coverage/cover_reg_top/1.xbar_error_random.2104087526
/workspace/coverage/cover_reg_top/1.xbar_random.1626803736
/workspace/coverage/cover_reg_top/1.xbar_random_large_delays.1972505902
/workspace/coverage/cover_reg_top/1.xbar_random_slow_rsp.3642644476
/workspace/coverage/cover_reg_top/1.xbar_random_zero_delays.304177144
/workspace/coverage/cover_reg_top/1.xbar_same_source.822634118
/workspace/coverage/cover_reg_top/1.xbar_smoke.1941633319
/workspace/coverage/cover_reg_top/1.xbar_smoke_large_delays.1288072999
/workspace/coverage/cover_reg_top/1.xbar_smoke_slow_rsp.482845346
/workspace/coverage/cover_reg_top/1.xbar_smoke_zero_delays.4225207923
/workspace/coverage/cover_reg_top/1.xbar_stress_all.1652967577
/workspace/coverage/cover_reg_top/1.xbar_stress_all_with_error.1003750038
/workspace/coverage/cover_reg_top/1.xbar_stress_all_with_rand_reset.2372985144
/workspace/coverage/cover_reg_top/1.xbar_stress_all_with_reset_error.1322038685
/workspace/coverage/cover_reg_top/1.xbar_unmapped_addr.1057305892
/workspace/coverage/cover_reg_top/10.chip_csr_mem_rw_with_rand_reset.1559668897
/workspace/coverage/cover_reg_top/10.chip_csr_rw.2872051742
/workspace/coverage/cover_reg_top/10.chip_same_csr_outstanding.3747304289
/workspace/coverage/cover_reg_top/10.chip_tl_errors.3028015458
/workspace/coverage/cover_reg_top/10.xbar_access_same_device.1746319225
/workspace/coverage/cover_reg_top/10.xbar_access_same_device_slow_rsp.698180489
/workspace/coverage/cover_reg_top/10.xbar_error_and_unmapped_addr.3518607775
/workspace/coverage/cover_reg_top/10.xbar_error_random.771497853
/workspace/coverage/cover_reg_top/10.xbar_random.3186983588
/workspace/coverage/cover_reg_top/10.xbar_random_large_delays.1511011546
/workspace/coverage/cover_reg_top/10.xbar_random_slow_rsp.2546533481
/workspace/coverage/cover_reg_top/10.xbar_random_zero_delays.2798265074
/workspace/coverage/cover_reg_top/10.xbar_same_source.1493319416
/workspace/coverage/cover_reg_top/10.xbar_smoke.962430153
/workspace/coverage/cover_reg_top/10.xbar_smoke_large_delays.1719590648
/workspace/coverage/cover_reg_top/10.xbar_smoke_slow_rsp.2865711982
/workspace/coverage/cover_reg_top/10.xbar_smoke_zero_delays.2754639802
/workspace/coverage/cover_reg_top/10.xbar_stress_all.3789320215
/workspace/coverage/cover_reg_top/10.xbar_stress_all_with_error.1806989962
/workspace/coverage/cover_reg_top/10.xbar_stress_all_with_rand_reset.2813424956
/workspace/coverage/cover_reg_top/10.xbar_stress_all_with_reset_error.1911838613
/workspace/coverage/cover_reg_top/10.xbar_unmapped_addr.1135637568
/workspace/coverage/cover_reg_top/11.chip_csr_mem_rw_with_rand_reset.4225736576
/workspace/coverage/cover_reg_top/11.chip_csr_rw.1920593761
/workspace/coverage/cover_reg_top/11.chip_same_csr_outstanding.2258178498
/workspace/coverage/cover_reg_top/11.xbar_access_same_device.433295922
/workspace/coverage/cover_reg_top/11.xbar_error_and_unmapped_addr.801418839
/workspace/coverage/cover_reg_top/11.xbar_error_random.3557563804
/workspace/coverage/cover_reg_top/11.xbar_random.2060994745
/workspace/coverage/cover_reg_top/11.xbar_random_large_delays.1996570544
/workspace/coverage/cover_reg_top/11.xbar_random_slow_rsp.4072603766
/workspace/coverage/cover_reg_top/11.xbar_random_zero_delays.2430648612
/workspace/coverage/cover_reg_top/11.xbar_same_source.2487240187
/workspace/coverage/cover_reg_top/11.xbar_smoke.473461107
/workspace/coverage/cover_reg_top/11.xbar_smoke_large_delays.218019993
/workspace/coverage/cover_reg_top/11.xbar_smoke_slow_rsp.3207104899
/workspace/coverage/cover_reg_top/11.xbar_smoke_zero_delays.655343358
/workspace/coverage/cover_reg_top/11.xbar_stress_all.776833846
/workspace/coverage/cover_reg_top/11.xbar_stress_all_with_error.3618262851
/workspace/coverage/cover_reg_top/11.xbar_stress_all_with_reset_error.480725458
/workspace/coverage/cover_reg_top/11.xbar_unmapped_addr.2146468601
/workspace/coverage/cover_reg_top/12.chip_csr_mem_rw_with_rand_reset.2544189871
/workspace/coverage/cover_reg_top/12.chip_csr_rw.3609154739
/workspace/coverage/cover_reg_top/12.chip_same_csr_outstanding.4294389253
/workspace/coverage/cover_reg_top/12.chip_tl_errors.345408992
/workspace/coverage/cover_reg_top/12.xbar_access_same_device.2077295553
/workspace/coverage/cover_reg_top/12.xbar_access_same_device_slow_rsp.3558504068
/workspace/coverage/cover_reg_top/12.xbar_error_and_unmapped_addr.1845225494
/workspace/coverage/cover_reg_top/12.xbar_error_random.938946252
/workspace/coverage/cover_reg_top/12.xbar_random.299774128
/workspace/coverage/cover_reg_top/12.xbar_random_large_delays.379142563
/workspace/coverage/cover_reg_top/12.xbar_random_slow_rsp.720380324
/workspace/coverage/cover_reg_top/12.xbar_random_zero_delays.3251493124
/workspace/coverage/cover_reg_top/12.xbar_same_source.2488321334
/workspace/coverage/cover_reg_top/12.xbar_smoke.1222072322
/workspace/coverage/cover_reg_top/12.xbar_smoke_large_delays.2903578710
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/workspace/coverage/cover_reg_top/90.xbar_same_source.2603435977
/workspace/coverage/cover_reg_top/90.xbar_smoke.2111892907
/workspace/coverage/cover_reg_top/90.xbar_smoke_large_delays.2132985577
/workspace/coverage/cover_reg_top/90.xbar_smoke_slow_rsp.902616138
/workspace/coverage/cover_reg_top/90.xbar_smoke_zero_delays.3014822159
/workspace/coverage/cover_reg_top/90.xbar_stress_all.459002837
/workspace/coverage/cover_reg_top/90.xbar_stress_all_with_error.3030562958
/workspace/coverage/cover_reg_top/90.xbar_stress_all_with_rand_reset.67071930
/workspace/coverage/cover_reg_top/90.xbar_stress_all_with_reset_error.690652682
/workspace/coverage/cover_reg_top/90.xbar_unmapped_addr.644232244
/workspace/coverage/cover_reg_top/91.xbar_access_same_device.2840307591
/workspace/coverage/cover_reg_top/91.xbar_access_same_device_slow_rsp.2922508533
/workspace/coverage/cover_reg_top/91.xbar_error_and_unmapped_addr.2270064279
/workspace/coverage/cover_reg_top/91.xbar_error_random.2204908438
/workspace/coverage/cover_reg_top/91.xbar_random.3906563131
/workspace/coverage/cover_reg_top/91.xbar_random_large_delays.1730414626
/workspace/coverage/cover_reg_top/91.xbar_random_slow_rsp.1087011403
/workspace/coverage/cover_reg_top/91.xbar_random_zero_delays.2935432714
/workspace/coverage/cover_reg_top/91.xbar_same_source.2373851782
/workspace/coverage/cover_reg_top/91.xbar_smoke.818279524
/workspace/coverage/cover_reg_top/91.xbar_smoke_large_delays.3084708856
/workspace/coverage/cover_reg_top/91.xbar_smoke_slow_rsp.1617673223
/workspace/coverage/cover_reg_top/91.xbar_smoke_zero_delays.2224077000
/workspace/coverage/cover_reg_top/91.xbar_stress_all.1883240119
/workspace/coverage/cover_reg_top/91.xbar_stress_all_with_error.2855199972
/workspace/coverage/cover_reg_top/91.xbar_stress_all_with_rand_reset.4174503365
/workspace/coverage/cover_reg_top/91.xbar_stress_all_with_reset_error.809609439
/workspace/coverage/cover_reg_top/91.xbar_unmapped_addr.2670814861
/workspace/coverage/cover_reg_top/92.xbar_access_same_device.853945290
/workspace/coverage/cover_reg_top/92.xbar_error_and_unmapped_addr.661454249
/workspace/coverage/cover_reg_top/92.xbar_error_random.3198830667
/workspace/coverage/cover_reg_top/92.xbar_random.896465874
/workspace/coverage/cover_reg_top/92.xbar_random_large_delays.634632314
/workspace/coverage/cover_reg_top/92.xbar_random_slow_rsp.159802475
/workspace/coverage/cover_reg_top/92.xbar_random_zero_delays.143515545
/workspace/coverage/cover_reg_top/92.xbar_same_source.2947759783
/workspace/coverage/cover_reg_top/92.xbar_smoke.3879321981
/workspace/coverage/cover_reg_top/92.xbar_smoke_large_delays.3676711557
/workspace/coverage/cover_reg_top/92.xbar_smoke_slow_rsp.3648660882
/workspace/coverage/cover_reg_top/92.xbar_smoke_zero_delays.2040035382
/workspace/coverage/cover_reg_top/92.xbar_stress_all.1562585003
/workspace/coverage/cover_reg_top/92.xbar_stress_all_with_error.2425623534
/workspace/coverage/cover_reg_top/92.xbar_stress_all_with_rand_reset.2526158194
/workspace/coverage/cover_reg_top/92.xbar_stress_all_with_reset_error.117272900
/workspace/coverage/cover_reg_top/92.xbar_unmapped_addr.2882341655
/workspace/coverage/cover_reg_top/93.xbar_access_same_device.2572430862
/workspace/coverage/cover_reg_top/93.xbar_access_same_device_slow_rsp.1872862684
/workspace/coverage/cover_reg_top/93.xbar_error_and_unmapped_addr.412721304
/workspace/coverage/cover_reg_top/93.xbar_error_random.3395808008
/workspace/coverage/cover_reg_top/93.xbar_random.4085259862
/workspace/coverage/cover_reg_top/93.xbar_random_large_delays.397334436
/workspace/coverage/cover_reg_top/93.xbar_random_slow_rsp.3693345999
/workspace/coverage/cover_reg_top/93.xbar_random_zero_delays.3178309291
/workspace/coverage/cover_reg_top/93.xbar_same_source.3703944628
/workspace/coverage/cover_reg_top/93.xbar_smoke.160903930
/workspace/coverage/cover_reg_top/93.xbar_smoke_large_delays.695311438
/workspace/coverage/cover_reg_top/93.xbar_smoke_slow_rsp.1054554154
/workspace/coverage/cover_reg_top/93.xbar_smoke_zero_delays.2786793792
/workspace/coverage/cover_reg_top/93.xbar_stress_all.1328629763
/workspace/coverage/cover_reg_top/93.xbar_stress_all_with_error.1114231345
/workspace/coverage/cover_reg_top/93.xbar_stress_all_with_rand_reset.3224100816
/workspace/coverage/cover_reg_top/93.xbar_stress_all_with_reset_error.702232706
/workspace/coverage/cover_reg_top/93.xbar_unmapped_addr.1396636851
/workspace/coverage/cover_reg_top/94.xbar_access_same_device.1391949682
/workspace/coverage/cover_reg_top/94.xbar_access_same_device_slow_rsp.1944389864
/workspace/coverage/cover_reg_top/94.xbar_error_and_unmapped_addr.390937127
/workspace/coverage/cover_reg_top/94.xbar_error_random.2382529240
/workspace/coverage/cover_reg_top/94.xbar_random.804145471
/workspace/coverage/cover_reg_top/94.xbar_random_large_delays.822405116
/workspace/coverage/cover_reg_top/94.xbar_random_slow_rsp.3732785816
/workspace/coverage/cover_reg_top/94.xbar_random_zero_delays.1709182259
/workspace/coverage/cover_reg_top/94.xbar_same_source.2371846963
/workspace/coverage/cover_reg_top/94.xbar_smoke.2732410512
/workspace/coverage/cover_reg_top/94.xbar_smoke_large_delays.2202510610
/workspace/coverage/cover_reg_top/94.xbar_smoke_slow_rsp.1597919423
/workspace/coverage/cover_reg_top/94.xbar_smoke_zero_delays.4121339846
/workspace/coverage/cover_reg_top/94.xbar_stress_all.2284378132
/workspace/coverage/cover_reg_top/94.xbar_stress_all_with_error.140972391
/workspace/coverage/cover_reg_top/94.xbar_stress_all_with_rand_reset.3370049292
/workspace/coverage/cover_reg_top/94.xbar_stress_all_with_reset_error.1172707691
/workspace/coverage/cover_reg_top/94.xbar_unmapped_addr.675401733
/workspace/coverage/cover_reg_top/95.xbar_access_same_device.2607384347
/workspace/coverage/cover_reg_top/95.xbar_access_same_device_slow_rsp.2921331219
/workspace/coverage/cover_reg_top/95.xbar_error_and_unmapped_addr.1894571556
/workspace/coverage/cover_reg_top/95.xbar_error_random.2162106574
/workspace/coverage/cover_reg_top/95.xbar_random.2823234366
/workspace/coverage/cover_reg_top/95.xbar_random_large_delays.4011958835
/workspace/coverage/cover_reg_top/95.xbar_random_slow_rsp.591382193
/workspace/coverage/cover_reg_top/95.xbar_random_zero_delays.896387461
/workspace/coverage/cover_reg_top/95.xbar_same_source.1457944173
/workspace/coverage/cover_reg_top/95.xbar_smoke.3988568260
/workspace/coverage/cover_reg_top/95.xbar_smoke_large_delays.2642042995
/workspace/coverage/cover_reg_top/95.xbar_smoke_slow_rsp.3686270911
/workspace/coverage/cover_reg_top/95.xbar_smoke_zero_delays.1401560868
/workspace/coverage/cover_reg_top/95.xbar_stress_all.4072196746
/workspace/coverage/cover_reg_top/95.xbar_stress_all_with_error.2861513004
/workspace/coverage/cover_reg_top/95.xbar_stress_all_with_rand_reset.2606607276
/workspace/coverage/cover_reg_top/95.xbar_stress_all_with_reset_error.3205798167
/workspace/coverage/cover_reg_top/95.xbar_unmapped_addr.3067061416
/workspace/coverage/cover_reg_top/96.xbar_access_same_device.3515084938
/workspace/coverage/cover_reg_top/96.xbar_access_same_device_slow_rsp.4246832135
/workspace/coverage/cover_reg_top/96.xbar_error_and_unmapped_addr.1138439503
/workspace/coverage/cover_reg_top/96.xbar_error_random.764671200
/workspace/coverage/cover_reg_top/96.xbar_random.1058881708
/workspace/coverage/cover_reg_top/96.xbar_random_large_delays.3670194198
/workspace/coverage/cover_reg_top/96.xbar_random_slow_rsp.3584973429
/workspace/coverage/cover_reg_top/96.xbar_random_zero_delays.522479360
/workspace/coverage/cover_reg_top/96.xbar_same_source.2780477276
/workspace/coverage/cover_reg_top/96.xbar_smoke.1345398178
/workspace/coverage/cover_reg_top/96.xbar_smoke_large_delays.2870158615
/workspace/coverage/cover_reg_top/96.xbar_smoke_slow_rsp.889928273
/workspace/coverage/cover_reg_top/96.xbar_smoke_zero_delays.1440001655
/workspace/coverage/cover_reg_top/96.xbar_stress_all.3281226659
/workspace/coverage/cover_reg_top/96.xbar_stress_all_with_error.1817115777
/workspace/coverage/cover_reg_top/96.xbar_stress_all_with_rand_reset.736372794
/workspace/coverage/cover_reg_top/96.xbar_stress_all_with_reset_error.1961217808
/workspace/coverage/cover_reg_top/96.xbar_unmapped_addr.442814358
/workspace/coverage/cover_reg_top/97.xbar_access_same_device.1834408900
/workspace/coverage/cover_reg_top/97.xbar_access_same_device_slow_rsp.3199586617
/workspace/coverage/cover_reg_top/97.xbar_error_and_unmapped_addr.3175022092
/workspace/coverage/cover_reg_top/97.xbar_error_random.163795604
/workspace/coverage/cover_reg_top/97.xbar_random.377457216
/workspace/coverage/cover_reg_top/97.xbar_random_large_delays.368134697
/workspace/coverage/cover_reg_top/97.xbar_random_slow_rsp.2898214550
/workspace/coverage/cover_reg_top/97.xbar_random_zero_delays.3464834060
/workspace/coverage/cover_reg_top/97.xbar_same_source.80105855
/workspace/coverage/cover_reg_top/97.xbar_smoke.1482804350
/workspace/coverage/cover_reg_top/97.xbar_smoke_large_delays.289607605
/workspace/coverage/cover_reg_top/97.xbar_smoke_slow_rsp.4141370093
/workspace/coverage/cover_reg_top/97.xbar_smoke_zero_delays.1010177603
/workspace/coverage/cover_reg_top/97.xbar_stress_all.2348263551
/workspace/coverage/cover_reg_top/97.xbar_stress_all_with_error.1131846564
/workspace/coverage/cover_reg_top/97.xbar_stress_all_with_rand_reset.2229672080
/workspace/coverage/cover_reg_top/97.xbar_stress_all_with_reset_error.2676534710
/workspace/coverage/cover_reg_top/97.xbar_unmapped_addr.2394063679
/workspace/coverage/cover_reg_top/98.xbar_access_same_device.3945058008
/workspace/coverage/cover_reg_top/98.xbar_access_same_device_slow_rsp.2313109123
/workspace/coverage/cover_reg_top/98.xbar_error_and_unmapped_addr.3953242991
/workspace/coverage/cover_reg_top/98.xbar_error_random.423127507
/workspace/coverage/cover_reg_top/98.xbar_random.789930933
/workspace/coverage/cover_reg_top/98.xbar_random_large_delays.515539980
/workspace/coverage/cover_reg_top/98.xbar_random_slow_rsp.3719164938
/workspace/coverage/cover_reg_top/98.xbar_random_zero_delays.2403889618
/workspace/coverage/cover_reg_top/98.xbar_same_source.3771816373
/workspace/coverage/cover_reg_top/98.xbar_smoke.4271760886
/workspace/coverage/cover_reg_top/98.xbar_smoke_large_delays.472861172
/workspace/coverage/cover_reg_top/98.xbar_smoke_slow_rsp.2595444017
/workspace/coverage/cover_reg_top/98.xbar_smoke_zero_delays.805318461
/workspace/coverage/cover_reg_top/98.xbar_stress_all.2732867118
/workspace/coverage/cover_reg_top/98.xbar_stress_all_with_error.102025631
/workspace/coverage/cover_reg_top/98.xbar_stress_all_with_rand_reset.3026140708
/workspace/coverage/cover_reg_top/98.xbar_stress_all_with_reset_error.1489178698
/workspace/coverage/cover_reg_top/98.xbar_unmapped_addr.8165394
/workspace/coverage/cover_reg_top/99.xbar_access_same_device.301785070
/workspace/coverage/cover_reg_top/99.xbar_access_same_device_slow_rsp.3149510696
/workspace/coverage/cover_reg_top/99.xbar_error_and_unmapped_addr.1893675861
/workspace/coverage/cover_reg_top/99.xbar_error_random.674293336
/workspace/coverage/cover_reg_top/99.xbar_random.3551304938
/workspace/coverage/cover_reg_top/99.xbar_random_large_delays.3158048310
/workspace/coverage/cover_reg_top/99.xbar_random_slow_rsp.4254937800
/workspace/coverage/cover_reg_top/99.xbar_random_zero_delays.3260283364
/workspace/coverage/cover_reg_top/99.xbar_same_source.1455324344
/workspace/coverage/cover_reg_top/99.xbar_smoke.3544659332
/workspace/coverage/cover_reg_top/99.xbar_smoke_large_delays.2602988359
/workspace/coverage/cover_reg_top/99.xbar_smoke_slow_rsp.3455613190
/workspace/coverage/cover_reg_top/99.xbar_smoke_zero_delays.556627275
/workspace/coverage/cover_reg_top/99.xbar_stress_all.2542420151
/workspace/coverage/cover_reg_top/99.xbar_stress_all_with_error.865901067
/workspace/coverage/cover_reg_top/99.xbar_stress_all_with_rand_reset.499550164
/workspace/coverage/cover_reg_top/99.xbar_stress_all_with_reset_error.1218095530
/workspace/coverage/cover_reg_top/99.xbar_unmapped_addr.2540399104
/workspace/coverage/default/1.chip_jtag_mem_access.2045184478
/workspace/coverage/default/2.chip_jtag_mem_access.935409503
/workspace/coverage/pad_ctrl_test_mode/0.chip_padctrl_attributes.2766712069
/workspace/coverage/pad_ctrl_test_mode/1.chip_padctrl_attributes.4108819637
/workspace/coverage/pad_ctrl_test_mode/3.chip_padctrl_attributes.723309027
/workspace/coverage/pad_ctrl_test_mode/4.chip_padctrl_attributes.235225180
/workspace/coverage/pad_ctrl_test_mode/6.chip_padctrl_attributes.1663707637
/workspace/coverage/pad_ctrl_test_mode/7.chip_padctrl_attributes.1946814036
/workspace/coverage/pad_ctrl_test_mode/8.chip_padctrl_attributes.1900436078
/workspace/coverage/pad_ctrl_test_mode/9.chip_padctrl_attributes.997646362




Total test records in report: 1927
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html | tests28.html | tests29.html | tests30.html | tests31.html | tests32.html | tests33.html | tests34.html | tests35.html | tests36.html | tests37.html | tests38.html | tests39.html | tests40.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T14 /workspace/coverage/cover_reg_top/9.xbar_same_source.91644244 Dec 31 01:35:26 PM PST 23 Dec 31 01:36:30 PM PST 23 2188390030 ps
T15 /workspace/coverage/cover_reg_top/22.xbar_random_slow_rsp.3607779806 Dec 31 01:37:19 PM PST 23 Dec 31 01:42:46 PM PST 23 18655292625 ps
T16 /workspace/coverage/cover_reg_top/15.xbar_stress_all_with_rand_reset.471281352 Dec 31 01:37:12 PM PST 23 Dec 31 01:43:57 PM PST 23 2881287489 ps
T29 /workspace/coverage/cover_reg_top/42.xbar_random_zero_delays.3224186695 Dec 31 01:39:16 PM PST 23 Dec 31 01:39:34 PM PST 23 161787174 ps
T31 /workspace/coverage/cover_reg_top/71.xbar_stress_all_with_rand_reset.131394413 Dec 31 01:41:58 PM PST 23 Dec 31 01:45:01 PM PST 23 2706319408 ps
T52 /workspace/coverage/cover_reg_top/20.xbar_smoke_zero_delays.1815510220 Dec 31 01:36:29 PM PST 23 Dec 31 01:36:36 PM PST 23 52834821 ps
T11 /workspace/coverage/cover_reg_top/4.chip_csr_mem_rw_with_rand_reset.2236182327 Dec 31 01:35:06 PM PST 23 Dec 31 01:39:16 PM PST 23 5243050931 ps
T53 /workspace/coverage/cover_reg_top/98.xbar_stress_all_with_reset_error.1489178698 Dec 31 01:45:18 PM PST 23 Dec 31 01:49:30 PM PST 23 3419417107 ps
T54 /workspace/coverage/cover_reg_top/74.xbar_random.741625055 Dec 31 01:42:46 PM PST 23 Dec 31 01:44:21 PM PST 23 2564684810 ps
T55 /workspace/coverage/cover_reg_top/68.xbar_smoke_slow_rsp.12772442 Dec 31 01:41:55 PM PST 23 Dec 31 01:43:35 PM PST 23 5528777263 ps
T207 /workspace/coverage/cover_reg_top/16.xbar_access_same_device.445740612 Dec 31 01:36:06 PM PST 23 Dec 31 01:37:36 PM PST 23 2161652991 ps
T72 /workspace/coverage/cover_reg_top/54.xbar_random_slow_rsp.1348999236 Dec 31 01:40:46 PM PST 23 Dec 31 01:59:08 PM PST 23 62423384067 ps
T76 /workspace/coverage/cover_reg_top/45.xbar_error_and_unmapped_addr.3490917471 Dec 31 01:39:42 PM PST 23 Dec 31 01:40:12 PM PST 23 252879593 ps
T77 /workspace/coverage/cover_reg_top/4.xbar_stress_all_with_reset_error.4118573278 Dec 31 01:34:46 PM PST 23 Dec 31 01:38:23 PM PST 23 623775894 ps
T288 /workspace/coverage/cover_reg_top/91.xbar_smoke_large_delays.3084708856 Dec 31 01:44:18 PM PST 23 Dec 31 01:45:31 PM PST 23 6946020343 ps
T68 /workspace/coverage/cover_reg_top/17.xbar_random_zero_delays.2752222942 Dec 31 01:36:31 PM PST 23 Dec 31 01:37:16 PM PST 23 533784160 ps
T303 /workspace/coverage/cover_reg_top/69.xbar_access_same_device_slow_rsp.555790069 Dec 31 01:42:24 PM PST 23 Dec 31 01:54:57 PM PST 23 42594077682 ps
T80 /workspace/coverage/cover_reg_top/77.xbar_random_large_delays.1665895748 Dec 31 01:42:32 PM PST 23 Dec 31 01:50:49 PM PST 23 44395004765 ps
T71 /workspace/coverage/cover_reg_top/60.xbar_stress_all.3848015420 Dec 31 01:41:20 PM PST 23 Dec 31 01:45:28 PM PST 23 2970944116 ps
T12 /workspace/coverage/cover_reg_top/18.chip_csr_rw.629293355 Dec 31 01:36:31 PM PST 23 Dec 31 01:45:34 PM PST 23 5586943175 ps
T63 /workspace/coverage/cover_reg_top/11.xbar_random.2060994745 Dec 31 01:35:29 PM PST 23 Dec 31 01:36:27 PM PST 23 1494830551 ps
T208 /workspace/coverage/cover_reg_top/23.xbar_random_zero_delays.203761096 Dec 31 01:37:28 PM PST 23 Dec 31 01:37:43 PM PST 23 122529484 ps
T13 /workspace/coverage/cover_reg_top/16.chip_csr_mem_rw_with_rand_reset.217309513 Dec 31 01:36:09 PM PST 23 Dec 31 01:42:13 PM PST 23 9389621968 ps
T308 /workspace/coverage/cover_reg_top/67.xbar_access_same_device_slow_rsp.2131411785 Dec 31 01:42:12 PM PST 23 Dec 31 01:46:28 PM PST 23 14164471575 ps
T110 /workspace/coverage/cover_reg_top/76.xbar_smoke.1708675452 Dec 31 01:42:34 PM PST 23 Dec 31 01:42:42 PM PST 23 52882983 ps
T79 /workspace/coverage/cover_reg_top/50.xbar_smoke_large_delays.2563608214 Dec 31 01:40:02 PM PST 23 Dec 31 01:41:29 PM PST 23 7435315140 ps
T78 /workspace/coverage/cover_reg_top/4.xbar_access_same_device.1741978441 Dec 31 01:34:56 PM PST 23 Dec 31 01:36:49 PM PST 23 2356201996 ps
T57 /workspace/coverage/cover_reg_top/81.xbar_access_same_device_slow_rsp.2156859731 Dec 31 01:43:12 PM PST 23 Dec 31 01:48:53 PM PST 23 19799590532 ps
T201 /workspace/coverage/cover_reg_top/46.xbar_smoke.3882019836 Dec 31 01:39:49 PM PST 23 Dec 31 01:39:58 PM PST 23 164081699 ps
T87 /workspace/coverage/cover_reg_top/39.xbar_random_large_delays.2772408399 Dec 31 01:39:28 PM PST 23 Dec 31 01:41:19 PM PST 23 10784964484 ps
T105 /workspace/coverage/cover_reg_top/27.xbar_smoke.141350821 Dec 31 01:37:39 PM PST 23 Dec 31 01:37:52 PM PST 23 222952678 ps
T81 /workspace/coverage/cover_reg_top/33.xbar_stress_all_with_error.3411783039 Dec 31 01:39:22 PM PST 23 Dec 31 01:43:32 PM PST 23 3493071833 ps
T210 /workspace/coverage/cover_reg_top/87.xbar_stress_all_with_error.3122589003 Dec 31 01:43:38 PM PST 23 Dec 31 01:46:07 PM PST 23 2211894901 ps
T306 /workspace/coverage/cover_reg_top/83.xbar_error_and_unmapped_addr.2869074245 Dec 31 01:44:02 PM PST 23 Dec 31 01:44:29 PM PST 23 656618507 ps
T132 /workspace/coverage/cover_reg_top/25.xbar_random.3701005023 Dec 31 01:37:18 PM PST 23 Dec 31 01:37:33 PM PST 23 91756230 ps
T209 /workspace/coverage/cover_reg_top/25.xbar_stress_all_with_error.1486280498 Dec 31 01:37:42 PM PST 23 Dec 31 01:47:00 PM PST 23 15990123452 ps
T368 /workspace/coverage/cover_reg_top/39.xbar_error_and_unmapped_addr.2563136201 Dec 31 01:39:32 PM PST 23 Dec 31 01:40:17 PM PST 23 960813846 ps
T313 /workspace/coverage/cover_reg_top/78.xbar_access_same_device.1860806308 Dec 31 01:42:47 PM PST 23 Dec 31 01:43:01 PM PST 23 103390124 ps
T86 /workspace/coverage/cover_reg_top/66.xbar_stress_all_with_error.3623962434 Dec 31 01:41:37 PM PST 23 Dec 31 01:48:48 PM PST 23 12205215323 ps
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