e971cd9798
Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
---|---|---|---|---|---|---|---|
V1 | wake_up | aes_wake_up | 0 | 1 | 0.00 | ||
V1 | smoke | aes_smoke | 0 | 50 | 0.00 | ||
V1 | csr_hw_reset | aes_csr_hw_reset | 3.000s | 53.334us | 5 | 5 | 100.00 |
V1 | csr_rw | aes_csr_rw | 4.000s | 92.630us | 20 | 20 | 100.00 |
V1 | csr_bit_bash | aes_csr_bit_bash | 14.000s | 4.433ms | 5 | 5 | 100.00 |
V1 | csr_aliasing | aes_csr_aliasing | 6.000s | 1.261ms | 5 | 5 | 100.00 |
V1 | csr_mem_rw_with_rand_reset | aes_csr_mem_rw_with_rand_reset | 4.000s | 89.418us | 20 | 20 | 100.00 |
V1 | regwen_csr_and_corresponding_lockable_csr | aes_csr_rw | 4.000s | 92.630us | 20 | 20 | 100.00 |
aes_csr_aliasing | 6.000s | 1.261ms | 5 | 5 | 100.00 | ||
V1 | TOTAL | 55 | 106 | 51.89 | |||
V2 | algorithm | aes_smoke | 0 | 50 | 0.00 | ||
aes_config_error | 0 | 50 | 0.00 | ||||
aes_stress | 0 | 50 | 0.00 | ||||
V2 | key_length | aes_smoke | 0 | 50 | 0.00 | ||
aes_config_error | 0 | 50 | 0.00 | ||||
aes_stress | 0 | 50 | 0.00 | ||||
V2 | back2back | aes_stress | 0 | 50 | 0.00 | ||
aes_b2b | 0 | 50 | 0.00 | ||||
V2 | backpressure | aes_stress | 0 | 50 | 0.00 | ||
V2 | multi_message | aes_smoke | 0 | 50 | 0.00 | ||
aes_config_error | 0 | 50 | 0.00 | ||||
aes_stress | 0 | 50 | 0.00 | ||||
aes_alert_reset | 0 | 50 | 0.00 | ||||
V2 | failure_test | aes_man_cfg_err | 0 | 50 | 0.00 | ||
aes_config_error | 0 | 50 | 0.00 | ||||
aes_alert_reset | 0 | 50 | 0.00 | ||||
V2 | trigger_clear_test | aes_clear | 0 | 50 | 0.00 | ||
V2 | nist_test_vectors | aes_nist_vectors | 0 | 1 | 0.00 | ||
V2 | reset_recovery | aes_alert_reset | 0 | 50 | 0.00 | ||
V2 | stress | aes_stress | 0 | 50 | 0.00 | ||
V2 | sideload | aes_stress | 0 | 50 | 0.00 | ||
aes_sideload | 0 | 50 | 0.00 | ||||
V2 | deinitialization | aes_deinit | 0 | 50 | 0.00 | ||
V2 | stress_all | aes_stress_all | 0 | 10 | 0.00 | ||
V2 | alert_test | aes_alert_test | 0 | 50 | 0.00 | ||
V2 | tl_d_oob_addr_access | aes_tl_errors | 9.000s | 77.185us | 20 | 20 | 100.00 |
V2 | tl_d_illegal_access | aes_tl_errors | 9.000s | 77.185us | 20 | 20 | 100.00 |
V2 | tl_d_outstanding_access | aes_csr_hw_reset | 3.000s | 53.334us | 5 | 5 | 100.00 |
aes_csr_rw | 4.000s | 92.630us | 20 | 20 | 100.00 | ||
aes_csr_aliasing | 6.000s | 1.261ms | 5 | 5 | 100.00 | ||
aes_same_csr_outstanding | 4.000s | 67.453us | 20 | 20 | 100.00 | ||
V2 | tl_d_partial_access | aes_csr_hw_reset | 3.000s | 53.334us | 5 | 5 | 100.00 |
aes_csr_rw | 4.000s | 92.630us | 20 | 20 | 100.00 | ||
aes_csr_aliasing | 6.000s | 1.261ms | 5 | 5 | 100.00 | ||
aes_same_csr_outstanding | 4.000s | 67.453us | 20 | 20 | 100.00 | ||
V2 | TOTAL | 40 | 501 | 7.98 | |||
V2S | reseeding | aes_reseed | 0 | 50 | 0.00 | ||
V2S | fault_inject | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
V2S | shadow_reg_update_error | aes_shadow_reg_errors | 5.000s | 82.210us | 20 | 20 | 100.00 |
V2S | shadow_reg_read_clear_staged_value | aes_shadow_reg_errors | 5.000s | 82.210us | 20 | 20 | 100.00 |
V2S | shadow_reg_storage_error | aes_shadow_reg_errors | 5.000s | 82.210us | 20 | 20 | 100.00 |
V2S | shadowed_reset_glitch | aes_shadow_reg_errors | 5.000s | 82.210us | 20 | 20 | 100.00 |
V2S | shadow_reg_update_error_with_csr_rw | aes_shadow_reg_errors_with_csr_rw | 5.000s | 120.107us | 20 | 20 | 100.00 |
V2S | tl_intg_err | aes_sec_cm | 0 | 5 | 0.00 | ||
aes_tl_intg_err | 6.000s | 155.743us | 20 | 20 | 100.00 | ||
V2S | sec_cm_bus_integrity | aes_tl_intg_err | 6.000s | 155.743us | 20 | 20 | 100.00 |
V2S | sec_cm_lc_escalate_en_intersig_mubi | aes_alert_reset | 0 | 50 | 0.00 | ||
V2S | sec_cm_main_config_shadow | aes_shadow_reg_errors | 5.000s | 82.210us | 20 | 20 | 100.00 |
V2S | sec_cm_main_config_sparse | aes_smoke | 0 | 50 | 0.00 | ||
aes_stress | 0 | 50 | 0.00 | ||||
aes_alert_reset | 0 | 50 | 0.00 | ||||
aes_core_fi | 0 | 70 | 0.00 | ||||
V2S | sec_cm_aux_config_shadow | aes_shadow_reg_errors | 5.000s | 82.210us | 20 | 20 | 100.00 |
V2S | sec_cm_aux_config_regwen | aes_readability | 0 | 50 | 0.00 | ||
aes_stress | 0 | 50 | 0.00 | ||||
V2S | sec_cm_key_sideload | aes_stress | 0 | 50 | 0.00 | ||
aes_sideload | 0 | 50 | 0.00 | ||||
V2S | sec_cm_key_sw_unreadable | aes_readability | 0 | 50 | 0.00 | ||
V2S | sec_cm_data_reg_sw_unreadable | aes_readability | 0 | 50 | 0.00 | ||
V2S | sec_cm_key_sec_wipe | aes_readability | 0 | 50 | 0.00 | ||
V2S | sec_cm_iv_config_sec_wipe | aes_readability | 0 | 50 | 0.00 | ||
V2S | sec_cm_data_reg_sec_wipe | aes_readability | 0 | 50 | 0.00 | ||
V2S | sec_cm_data_reg_key_sca | aes_stress | 0 | 50 | 0.00 | ||
V2S | sec_cm_key_masking | aes_stress | 0 | 50 | 0.00 | ||
V2S | sec_cm_main_fsm_sparse | aes_fi | 0 | 50 | 0.00 | ||
V2S | sec_cm_main_fsm_redun | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_cipher_fsm_sparse | aes_fi | 0 | 50 | 0.00 | ||
V2S | sec_cm_cipher_fsm_redun | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
V2S | sec_cm_cipher_ctr_redun | aes_cipher_fi | 0 | 350 | 0.00 | ||
V2S | sec_cm_ctr_fsm_sparse | aes_fi | 0 | 50 | 0.00 | ||
V2S | sec_cm_ctr_fsm_redun | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_ctrl_sparse | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_main_fsm_global_esc | aes_alert_reset | 0 | 50 | 0.00 | ||
V2S | sec_cm_main_fsm_local_esc | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_cipher_fsm_local_esc | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_ctr_fsm_local_esc | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_ctr_fi | 0 | 50 | 0.00 | ||||
V2S | sec_cm_data_reg_local_esc | aes_fi | 0 | 50 | 0.00 | ||
aes_control_fi | 0 | 300 | 0.00 | ||||
aes_cipher_fi | 0 | 350 | 0.00 | ||||
V2S | TOTAL | 60 | 985 | 6.09 | |||
V3 | stress_all_with_rand_reset | aes_stress_all_with_rand_reset | 0 | 10 | 0.00 | ||
V3 | TOTAL | 0 | 10 | 0.00 | |||
TOTAL | 155 | 1602 | 9.68 |
Items | Total | Written | Passing | Progress |
---|---|---|---|---|
V1 | 7 | 7 | 5 | 71.43 |
V2 | 13 | 13 | 2 | 15.38 |
V2S | 11 | 11 | 3 | 27.27 |
V3 | 1 | 1 | 0 | 0.00 |
Score | Block | Branch | Statement | Expression | Toggle | Fsm | Assertion | CoverGroup |
---|---|---|---|---|---|---|---|---|
84.10 | 99.63 | 98.89 | 100.00 | 99.74 | 44.47 | -- | 98.03 | 43.64 |
launch_task.returncode != *, err: * *:*:* * lswatcher.go:*] Failed to connect to Watcher service in the Envelope (you probably need to import _ "google3/tech/env/go/envelope"): generic::unimplemented: envrpc: no envelope available for service "chubby.googleapis.com" Failure to submit jobs: rpc error: code = Unavailable desc = The service is currently unavailable.
has 724 failures:
Test aes_wake_up has 1 failures.
Test aes_deinit has 28 failures.
0.aes_deinit.87164023689405632681207748938502230035132613155572121082466196825497265765263
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/0.aes_deinit/latest/run.log
1.aes_deinit.13905202783993984307425211530157888422884155868854012460292823857351926716860
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/1.aes_deinit/latest/run.log
... and 26 more failures.
Test aes_readability has 28 failures.
0.aes_readability.15081269118434497752293534990024548185692472240469172459500253704586823442994
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/0.aes_readability/latest/run.log
1.aes_readability.20094908050760926027274340195931242415530631277567566447663500663032843215838
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/1.aes_readability/latest/run.log
... and 26 more failures.
Test aes_config_error has 28 failures.
0.aes_config_error.95374655118860728532696451806867143811435760998950883455911313570586502260500
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/0.aes_config_error/latest/run.log
1.aes_config_error.51421805760240817545356123306180637456446023790834913004452532711471869928185
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/1.aes_config_error/latest/run.log
... and 26 more failures.
Test aes_b2b has 28 failures.
0.aes_b2b.25942324233398730825645937968341141145273747888192150102844825314017300562456
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/0.aes_b2b/latest/run.log
1.aes_b2b.27955070632514041471616195368687578212984253186743320351948197720397902643180
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/1.aes_b2b/latest/run.log
... and 26 more failures.
... and 16 more tests.
Job killed most likely because its dependent job failed.
has 723 failures:
Test aes_nist_vectors has 1 failures.
Test aes_man_cfg_err has 28 failures.
0.aes_man_cfg_err.99320524458418838623952173224139599519760613692412061255839617033537822212005
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/0.aes_man_cfg_err/latest/run.log
1.aes_man_cfg_err.52087961356634143842276237856277087698863030940226669225072423665501015485007
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/1.aes_man_cfg_err/latest/run.log
... and 26 more failures.
Test aes_smoke has 28 failures.
0.aes_smoke.53629471230921347214158956230945321068341334599281275972873382133983061551316
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/0.aes_smoke/latest/run.log
1.aes_smoke.102432541738579750173258488154873417375882406535418705084313788278425184264931
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/1.aes_smoke/latest/run.log
... and 26 more failures.
Test aes_stress has 28 failures.
0.aes_stress.63362918473270864224930407398749550059365788958569953584401667312458882874496
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/0.aes_stress/latest/run.log
1.aes_stress.25679798290271744963322516506043364812803271852318860155743913863478945844402
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/1.aes_stress/latest/run.log
... and 26 more failures.
Test aes_clear has 28 failures.
0.aes_clear.77695960781535911602486777585027261391598138110685991469564334147045169895645
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/0.aes_clear/latest/run.log
1.aes_clear.41130489508708874478718358130909089671875540712022217266570457442806831778842
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/1.aes_clear/latest/run.log
... and 26 more failures.
... and 15 more tests.