SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 98.91 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
start | 68.37 | 1 | 100 | 1 | 64 | 64 |
attest_sw_binding_0 | 100.00 | 1 | 100 | 1 | 64 | 64 |
attest_sw_binding_1 | 100.00 | 1 | 100 | 1 | 64 | 64 |
attest_sw_binding_2 | 100.00 | 1 | 100 | 1 | 64 | 64 |
attest_sw_binding_3 | 100.00 | 1 | 100 | 1 | 64 | 64 |
attest_sw_binding_4 | 100.00 | 1 | 100 | 1 | 64 | 64 |
attest_sw_binding_5 | 100.00 | 1 | 100 | 1 | 64 | 64 |
attest_sw_binding_6 | 100.00 | 1 | 100 | 1 | 64 | 64 |
attest_sw_binding_7 | 100.00 | 1 | 100 | 1 | 64 | 64 |
key_version | 100.00 | 1 | 100 | 1 | 64 | 64 |
max_creator_key_ver_shadowed | 100.00 | 1 | 100 | 1 | 64 | 64 |
max_owner_int_key_ver_shadowed | 100.00 | 1 | 100 | 1 | 64 | 64 |
max_owner_key_ver_shadowed | 100.00 | 1 | 100 | 1 | 64 | 64 |
salt_0 | 100.00 | 1 | 100 | 1 | 64 | 64 |
salt_1 | 100.00 | 1 | 100 | 1 | 64 | 64 |
salt_2 | 100.00 | 1 | 100 | 1 | 64 | 64 |
salt_3 | 100.00 | 1 | 100 | 1 | 64 | 64 |
salt_4 | 100.00 | 1 | 100 | 1 | 64 | 64 |
salt_5 | 100.00 | 1 | 100 | 1 | 64 | 64 |
salt_6 | 100.00 | 1 | 100 | 1 | 64 | 64 |
salt_7 | 100.00 | 1 | 100 | 1 | 64 | 64 |
sealing_sw_binding_0 | 100.00 | 1 | 100 | 1 | 64 | 64 |
sealing_sw_binding_1 | 100.00 | 1 | 100 | 1 | 64 | 64 |
sealing_sw_binding_2 | 100.00 | 1 | 100 | 1 | 64 | 64 |
sealing_sw_binding_3 | 100.00 | 1 | 100 | 1 | 64 | 64 |
sealing_sw_binding_4 | 100.00 | 1 | 100 | 1 | 64 | 64 |
sealing_sw_binding_5 | 100.00 | 1 | 100 | 1 | 64 | 64 |
sealing_sw_binding_6 | 100.00 | 1 | 100 | 1 | 64 | 64 |
sealing_sw_binding_7 | 100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 31 | 33 | 51.56 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 31 | 33 | 51.56 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 34 | 0 | 34 | 100.00 |
Crosses | 64 | 0 | 64 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
regwen_cp | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
sw_input_cp | 32 | 0 | 32 | 100.00 | 100 | 1 | 1 | 32 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
sw_input_x_regwen_cr | 64 | 0 | 64 | 100.00 | 100 | 1 | 1 | 0 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |