| | | | | | | | | | | |
|
cip_base_pkg::tl_intg_err_cg_wrap::tl_intg_err_cg |
10 |
14 |
71.43 |
75.00 |
1 |
100 |
1 |
1 |
64 |
64 |
|
|
cip_base_pkg::tl_errors_cg_wrap::tl_errors_cg |
12 |
15 |
80.00 |
100.00 |
1 |
100 |
1 |
1 |
64 |
64 |
|
|
rstmgr_env_pkg::rstmgr_env_cov::alert_info_capture_cg |
21 |
26 |
80.77 |
|
1 |
100 |
1 |
0 |
64 |
64 |
|
|
rstmgr_env_pkg::rstmgr_env_cov::cpu_info_capture_cg |
22 |
26 |
84.62 |
|
1 |
100 |
1 |
0 |
64 |
64 |
|
|
alert_esc_agent_pkg::alert_handshake_complete_cg |
3 |
3 |
100.00 |
100.00 |
1 |
100 |
1 |
1 |
64 |
64 |
|
|
dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg |
2 |
2 |
100.00 |
95.83 |
1 |
100 |
1 |
1 |
64 |
64 |
|
|
dv_base_reg_pkg::mubi_cov#(4,32'sh00000006,32'sh00000009)::mubi_cg |
6 |
6 |
100.00 |
58.33 |
1 |
100 |
1 |
1 |
64 |
64 |
|
|
dv_lib_pkg::bit_toggle_cg_wrap::bit_toggle_cg |
4 |
4 |
100.00 |
100.00 |
1 |
100 |
1 |
1 |
64 |
64 |
|
|
tb.dut.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg |
2 |
2 |
100.00 |
100.00 |
1 |
100 |
1 |
1 |
64 |
64 |
|
|
rstmgr_env_pkg::rstmgr_env_cov::alert_info_access_cg |
9 |
9 |
100.00 |
|
1 |
100 |
1 |
0 |
64 |
64 |
|
|
rstmgr_env_pkg::rstmgr_env_cov::cpu_info_access_cg |
8 |
8 |
100.00 |
|
1 |
100 |
1 |
0 |
64 |
64 |
|
|
rstmgr_env_pkg::rstmgr_env_cov::reset_stretcher_cg |
12 |
12 |
100.00 |
|
1 |
100 |
1 |
0 |
64 |
64 |
|
|
rstmgr_env_pkg::rstmgr_sw_rst_cg_wrap::sw_rst_cg |
12 |
12 |
100.00 |
100.00 |
1 |
100 |
1 |
1 |
64 |
64 |
|
|
tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=1} |
1 |
1 |
100.00 |
100.00 |
1 |
100 |
1 |
1 |
64 |
64 |
|
|
tl_agent_pkg::pending_req_on_rst_cg |
2 |
2 |
100.00 |
100.00 |
1 |
100 |
1 |
1 |
64 |
64 |
|
|
tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128} |
137 |
137 |
100.00 |
100.00 |
1 |
100 |
1 |
1 |
64 |
64 |
|