| T168 |
/workspace/coverage/default/1.chip_sw_csrng_lc_hw_debug_en_test.959106378 |
|
|
Feb 07 04:41:16 PM PST 24 |
Feb 07 04:55:46 PM PST 24 |
11643556269 ps |
| T175 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through.3872974984 |
|
|
Feb 07 04:38:49 PM PST 24 |
Feb 07 04:50:48 PM PST 24 |
5723073457 ps |
| T294 |
/workspace/coverage/default/79.chip_sw_all_escalation_resets.3695500297 |
|
|
Feb 07 05:03:46 PM PST 24 |
Feb 07 05:14:35 PM PST 24 |
4472602960 ps |
| T295 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.4054385823 |
|
|
Feb 07 04:58:14 PM PST 24 |
Feb 07 05:32:12 PM PST 24 |
8962620941 ps |
| T296 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod_end.172115164 |
|
|
Feb 07 04:41:02 PM PST 24 |
Feb 07 05:15:07 PM PST 24 |
9066794423 ps |
| T297 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en.4216471928 |
|
|
Feb 07 04:42:09 PM PST 24 |
Feb 07 04:47:04 PM PST 24 |
3033780351 ps |
| T241 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.3518415827 |
|
|
Feb 07 04:39:12 PM PST 24 |
Feb 07 04:51:42 PM PST 24 |
5692574468 ps |
| T298 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.4034886680 |
|
|
Feb 07 04:33:41 PM PST 24 |
Feb 07 04:42:39 PM PST 24 |
3679507476 ps |
| T299 |
/workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.59370285 |
|
|
Feb 07 04:50:14 PM PST 24 |
Feb 07 05:16:22 PM PST 24 |
7163728135 ps |
| T190 |
/workspace/coverage/default/2.chip_sw_flash_init_reduced_freq.1750930498 |
|
|
Feb 07 04:53:29 PM PST 24 |
Feb 07 05:20:56 PM PST 24 |
20365314641 ps |
| T983 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.2457334406 |
|
|
Feb 07 04:40:33 PM PST 24 |
Feb 07 04:44:03 PM PST 24 |
2177007800 ps |
| T191 |
/workspace/coverage/default/0.chip_sw_flash_init.2056457089 |
|
|
Feb 07 04:32:29 PM PST 24 |
Feb 07 05:15:52 PM PST 24 |
22656813867 ps |
| T984 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.2588243525 |
|
|
Feb 07 04:42:11 PM PST 24 |
Feb 07 04:48:27 PM PST 24 |
3156555808 ps |
| T140 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.3111683894 |
|
|
Feb 07 04:38:37 PM PST 24 |
Feb 07 04:41:41 PM PST 24 |
2577134816 ps |
| T757 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.3684715176 |
|
|
Feb 07 04:58:53 PM PST 24 |
Feb 07 05:07:07 PM PST 24 |
4094757330 ps |
| T985 |
/workspace/coverage/default/1.chip_tap_straps_testunlock0.2389929595 |
|
|
Feb 07 04:44:33 PM PST 24 |
Feb 07 04:53:45 PM PST 24 |
7321066329 ps |
| T986 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_prod.326418282 |
|
|
Feb 07 04:40:08 PM PST 24 |
Feb 07 05:03:23 PM PST 24 |
7847881860 ps |
| T987 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.966323722 |
|
|
Feb 07 04:38:48 PM PST 24 |
Feb 07 04:46:30 PM PST 24 |
5837772664 ps |
| T231 |
/workspace/coverage/default/0.chip_sival_flash_info_access.3641895719 |
|
|
Feb 07 04:32:56 PM PST 24 |
Feb 07 04:40:55 PM PST 24 |
3869774305 ps |
| T232 |
/workspace/coverage/default/1.chip_sival_flash_info_access.1260249548 |
|
|
Feb 07 04:37:38 PM PST 24 |
Feb 07 04:46:17 PM PST 24 |
4202285419 ps |
| T54 |
/workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.471328120 |
|
|
Feb 07 04:41:14 PM PST 24 |
Feb 07 07:52:04 PM PST 24 |
255792636064 ps |
| T988 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter.2980731011 |
|
|
Feb 07 04:36:48 PM PST 24 |
Feb 07 04:39:55 PM PST 24 |
2980112119 ps |
| T989 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.327553251 |
|
|
Feb 07 04:39:34 PM PST 24 |
Feb 07 05:14:01 PM PST 24 |
8541368625 ps |
| T990 |
/workspace/coverage/default/2.chip_sw_rstmgr_rst_cnsty_escalation.2045303999 |
|
|
Feb 07 04:48:44 PM PST 24 |
Feb 07 05:00:02 PM PST 24 |
5909149160 ps |
| T137 |
/workspace/coverage/default/1.chip_sw_alert_handler_entropy.102204652 |
|
|
Feb 07 04:40:02 PM PST 24 |
Feb 07 04:44:32 PM PST 24 |
2787331831 ps |
| T991 |
/workspace/coverage/default/2.chip_sw_rstmgr_smoketest.2929318340 |
|
|
Feb 07 04:57:27 PM PST 24 |
Feb 07 05:01:38 PM PST 24 |
2594945780 ps |
| T992 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.1636534499 |
|
|
Feb 07 04:41:08 PM PST 24 |
Feb 07 05:01:01 PM PST 24 |
15250045255 ps |
| T993 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.718075024 |
|
|
Feb 07 04:48:46 PM PST 24 |
Feb 07 04:57:49 PM PST 24 |
4408742910 ps |
| T734 |
/workspace/coverage/default/62.chip_sw_all_escalation_resets.1191563600 |
|
|
Feb 07 05:04:11 PM PST 24 |
Feb 07 05:13:05 PM PST 24 |
4226062580 ps |
| T994 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx.1003273722 |
|
|
Feb 07 04:38:45 PM PST 24 |
Feb 07 04:55:44 PM PST 24 |
5983943596 ps |
| T736 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.4211875645 |
|
|
Feb 07 04:59:31 PM PST 24 |
Feb 07 05:05:00 PM PST 24 |
3540357432 ps |
| T27 |
/workspace/coverage/default/1.chip_sw_alert_test.2118933278 |
|
|
Feb 07 04:41:07 PM PST 24 |
Feb 07 04:46:42 PM PST 24 |
3220427836 ps |
| T995 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.4293358563 |
|
|
Feb 07 04:35:50 PM PST 24 |
Feb 07 04:40:34 PM PST 24 |
3112600638 ps |
| T751 |
/workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.1760606486 |
|
|
Feb 07 05:00:35 PM PST 24 |
Feb 07 05:05:43 PM PST 24 |
2914692520 ps |
| T154 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.414892162 |
|
|
Feb 07 04:32:36 PM PST 24 |
Feb 07 04:35:22 PM PST 24 |
3406079334 ps |
| T798 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.1030910944 |
|
|
Feb 07 04:58:48 PM PST 24 |
Feb 07 05:08:20 PM PST 24 |
4364892376 ps |
| T996 |
/workspace/coverage/default/0.chip_sw_kmac_mode_cshake.555498154 |
|
|
Feb 07 04:34:53 PM PST 24 |
Feb 07 04:40:52 PM PST 24 |
2926348100 ps |
| T997 |
/workspace/coverage/default/0.chip_sw_alert_handler_escalation.3718600233 |
|
|
Feb 07 04:33:55 PM PST 24 |
Feb 07 04:41:55 PM PST 24 |
4792553096 ps |
| T998 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.815314095 |
|
|
Feb 07 04:49:38 PM PST 24 |
Feb 07 04:54:53 PM PST 24 |
2698933374 ps |
| T999 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.1621903326 |
|
|
Feb 07 04:46:42 PM PST 24 |
Feb 07 04:53:03 PM PST 24 |
4233866934 ps |
| T1000 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2682022267 |
|
|
Feb 07 04:53:07 PM PST 24 |
Feb 07 05:05:33 PM PST 24 |
5258669400 ps |
| T1001 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.2013575632 |
|
|
Feb 07 04:48:12 PM PST 24 |
Feb 07 05:31:54 PM PST 24 |
13900579003 ps |
| T1002 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx1.4281759403 |
|
|
Feb 07 04:32:20 PM PST 24 |
Feb 07 04:49:09 PM PST 24 |
5650474940 ps |
| T210 |
/workspace/coverage/default/2.chip_sw_gpio.229111946 |
|
|
Feb 07 04:48:31 PM PST 24 |
Feb 07 04:56:05 PM PST 24 |
3622292400 ps |
| T1003 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.1322283212 |
|
|
Feb 07 04:36:00 PM PST 24 |
Feb 07 04:44:17 PM PST 24 |
5779894200 ps |
| T1004 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.3761876567 |
|
|
Feb 07 04:38:24 PM PST 24 |
Feb 07 04:55:01 PM PST 24 |
5129399200 ps |
| T738 |
/workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.2252337618 |
|
|
Feb 07 05:04:16 PM PST 24 |
Feb 07 05:11:37 PM PST 24 |
3611942696 ps |
| T1005 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx3.2767463345 |
|
|
Feb 07 04:55:34 PM PST 24 |
Feb 07 05:12:35 PM PST 24 |
5645291430 ps |
| T22 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.1972217185 |
|
|
Feb 07 04:52:38 PM PST 24 |
Feb 07 05:25:05 PM PST 24 |
21958317656 ps |
| T1006 |
/workspace/coverage/default/3.chip_tap_straps_rma.3699525314 |
|
|
Feb 07 04:55:44 PM PST 24 |
Feb 07 05:14:46 PM PST 24 |
9351456965 ps |
| T727 |
/workspace/coverage/default/69.chip_sw_all_escalation_resets.3618376207 |
|
|
Feb 07 05:04:27 PM PST 24 |
Feb 07 05:15:05 PM PST 24 |
6246818708 ps |
| T1007 |
/workspace/coverage/default/67.chip_sw_all_escalation_resets.1394036093 |
|
|
Feb 07 05:05:30 PM PST 24 |
Feb 07 05:14:35 PM PST 24 |
4073412140 ps |
| T1008 |
/workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.761432766 |
|
|
Feb 07 04:32:43 PM PST 24 |
Feb 07 08:00:13 PM PST 24 |
57963911380 ps |
| T194 |
/workspace/coverage/default/2.chip_sw_flash_init.279697160 |
|
|
Feb 07 04:47:48 PM PST 24 |
Feb 07 05:23:37 PM PST 24 |
20938008550 ps |
| T1009 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.3950853347 |
|
|
Feb 07 04:49:22 PM PST 24 |
Feb 07 05:08:20 PM PST 24 |
8723082016 ps |
| T248 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.2223065990 |
|
|
Feb 07 04:35:05 PM PST 24 |
Feb 07 04:50:01 PM PST 24 |
4825476382 ps |
| T1010 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.4262020979 |
|
|
Feb 07 04:58:00 PM PST 24 |
Feb 07 05:01:24 PM PST 24 |
2461459954 ps |
| T1011 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod.2918686833 |
|
|
Feb 07 04:40:27 PM PST 24 |
Feb 07 05:12:21 PM PST 24 |
8679611891 ps |
| T253 |
/workspace/coverage/default/91.chip_sw_all_escalation_resets.1932662484 |
|
|
Feb 07 05:07:17 PM PST 24 |
Feb 07 05:17:14 PM PST 24 |
5003412920 ps |
| T772 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.2914518766 |
|
|
Feb 07 05:00:02 PM PST 24 |
Feb 07 05:06:11 PM PST 24 |
2987925192 ps |
| T760 |
/workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.1392038715 |
|
|
Feb 07 05:07:49 PM PST 24 |
Feb 07 05:14:12 PM PST 24 |
3670321492 ps |
| T1012 |
/workspace/coverage/default/4.chip_sw_uart_rand_baudrate.2799915773 |
|
|
Feb 07 04:58:27 PM PST 24 |
Feb 07 05:14:40 PM PST 24 |
4260987632 ps |
| T1013 |
/workspace/coverage/default/2.chip_sw_pwrmgr_wdog_reset.2937196136 |
|
|
Feb 07 04:50:49 PM PST 24 |
Feb 07 05:02:03 PM PST 24 |
5750367816 ps |
| T5 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.3215746065 |
|
|
Feb 07 04:37:27 PM PST 24 |
Feb 07 04:41:29 PM PST 24 |
3141328459 ps |
| T197 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.1519183943 |
|
|
Feb 07 04:52:08 PM PST 24 |
Feb 07 05:04:24 PM PST 24 |
4930734040 ps |
| T1014 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.4148239797 |
|
|
Feb 07 04:38:06 PM PST 24 |
Feb 07 04:44:59 PM PST 24 |
3677708540 ps |
| T1015 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.2744745034 |
|
|
Feb 07 04:34:11 PM PST 24 |
Feb 07 04:40:40 PM PST 24 |
3265816006 ps |
| T1016 |
/workspace/coverage/default/0.rom_e2e_static_critical.1171470826 |
|
|
Feb 07 04:41:12 PM PST 24 |
Feb 07 05:22:06 PM PST 24 |
10789619370 ps |
| T1017 |
/workspace/coverage/default/8.chip_sw_lc_ctrl_transition.105318658 |
|
|
Feb 07 04:57:12 PM PST 24 |
Feb 07 05:05:10 PM PST 24 |
4769540339 ps |
| T1018 |
/workspace/coverage/default/2.chip_sw_aes_enc.1091581832 |
|
|
Feb 07 04:50:54 PM PST 24 |
Feb 07 04:56:55 PM PST 24 |
2924125696 ps |
| T1019 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.880665642 |
|
|
Feb 07 04:49:29 PM PST 24 |
Feb 07 05:09:07 PM PST 24 |
8088434824 ps |
| T1020 |
/workspace/coverage/default/2.chip_jtag_mem_access.3700350157 |
|
|
Feb 07 04:46:17 PM PST 24 |
Feb 07 05:13:39 PM PST 24 |
13828503186 ps |
| T327 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.933590960 |
|
|
Feb 07 04:45:28 PM PST 24 |
Feb 07 04:54:36 PM PST 24 |
5056978920 ps |
| T1021 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.3587832591 |
|
|
Feb 07 04:41:49 PM PST 24 |
Feb 07 05:41:37 PM PST 24 |
16936319278 ps |
| T1022 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod.412992829 |
|
|
Feb 07 04:41:57 PM PST 24 |
Feb 07 05:30:35 PM PST 24 |
12218440056 ps |
| T1023 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.1421349201 |
|
|
Feb 07 04:49:42 PM PST 24 |
Feb 07 05:13:52 PM PST 24 |
10152971031 ps |
| T763 |
/workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.1593688425 |
|
|
Feb 07 05:05:40 PM PST 24 |
Feb 07 05:11:51 PM PST 24 |
3656071390 ps |
| T1024 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sysrst_ctrl_reset.525044401 |
|
|
Feb 07 04:39:47 PM PST 24 |
Feb 07 04:55:42 PM PST 24 |
8193487236 ps |
| T1025 |
/workspace/coverage/default/1.chip_sw_clkmgr_sleep_frequency.3191546643 |
|
|
Feb 07 04:43:10 PM PST 24 |
Feb 07 04:54:14 PM PST 24 |
5107246710 ps |
| T1026 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.3618024753 |
|
|
Feb 07 04:34:04 PM PST 24 |
Feb 07 05:34:15 PM PST 24 |
19034827995 ps |
| T1027 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.3137700721 |
|
|
Feb 07 04:50:56 PM PST 24 |
Feb 07 04:53:46 PM PST 24 |
2257503068 ps |
| T1028 |
/workspace/coverage/default/2.chip_sw_example_rom.1430270878 |
|
|
Feb 07 04:46:46 PM PST 24 |
Feb 07 04:48:52 PM PST 24 |
2370187310 ps |
| T1029 |
/workspace/coverage/default/0.chip_sw_csrng_kat_test.1568700679 |
|
|
Feb 07 04:36:03 PM PST 24 |
Feb 07 04:39:30 PM PST 24 |
1957064440 ps |
| T141 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.106941489 |
|
|
Feb 07 04:39:06 PM PST 24 |
Feb 07 04:41:06 PM PST 24 |
2639858009 ps |
| T1030 |
/workspace/coverage/default/14.chip_sw_uart_rand_baudrate.1327984031 |
|
|
Feb 07 04:58:15 PM PST 24 |
Feb 07 05:35:26 PM PST 24 |
12853084896 ps |
| T1031 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_smoketest.3982725118 |
|
|
Feb 07 04:48:56 PM PST 24 |
Feb 07 04:53:40 PM PST 24 |
3174059432 ps |
| T198 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.932715286 |
|
|
Feb 07 04:33:41 PM PST 24 |
Feb 07 04:48:05 PM PST 24 |
4302888280 ps |
| T1032 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.2541060214 |
|
|
Feb 07 05:02:00 PM PST 24 |
Feb 07 05:13:14 PM PST 24 |
4630616408 ps |
| T1033 |
/workspace/coverage/default/2.chip_sw_example_concurrency.2159873376 |
|
|
Feb 07 04:47:16 PM PST 24 |
Feb 07 04:52:26 PM PST 24 |
2833853140 ps |
| T1034 |
/workspace/coverage/default/1.chip_sw_aes_idle.3828242535 |
|
|
Feb 07 04:41:57 PM PST 24 |
Feb 07 04:45:04 PM PST 24 |
2745269728 ps |
| T201 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.1783129664 |
|
|
Feb 07 04:40:44 PM PST 24 |
Feb 07 05:13:39 PM PST 24 |
13903054042 ps |
| T1035 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.3479261169 |
|
|
Feb 07 04:32:52 PM PST 24 |
Feb 07 04:50:27 PM PST 24 |
6331595347 ps |
| T764 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.1813568317 |
|
|
Feb 07 05:04:46 PM PST 24 |
Feb 07 05:15:45 PM PST 24 |
6249083290 ps |
| T775 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.425860604 |
|
|
Feb 07 05:03:16 PM PST 24 |
Feb 07 05:12:47 PM PST 24 |
4150178620 ps |
| T1036 |
/workspace/coverage/default/0.chip_jtag_mem_access.2935785492 |
|
|
Feb 07 04:27:08 PM PST 24 |
Feb 07 04:52:37 PM PST 24 |
12705364790 ps |
| T1037 |
/workspace/coverage/default/2.chip_sw_spi_device_tpm.2148788815 |
|
|
Feb 07 04:48:17 PM PST 24 |
Feb 07 04:53:32 PM PST 24 |
2948424287 ps |
| T270 |
/workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.2310542882 |
|
|
Feb 07 04:50:42 PM PST 24 |
Feb 07 05:05:26 PM PST 24 |
7598201714 ps |
| T1038 |
/workspace/coverage/default/11.chip_sw_lc_ctrl_transition.2089013634 |
|
|
Feb 07 04:57:53 PM PST 24 |
Feb 07 05:05:38 PM PST 24 |
4797610462 ps |
| T1039 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_req.36209461 |
|
|
Feb 07 04:48:47 PM PST 24 |
Feb 07 04:55:05 PM PST 24 |
4121808816 ps |
| T767 |
/workspace/coverage/default/55.chip_sw_all_escalation_resets.279820876 |
|
|
Feb 07 05:02:27 PM PST 24 |
Feb 07 05:13:57 PM PST 24 |
4264875300 ps |
| T743 |
/workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.946163357 |
|
|
Feb 07 04:56:52 PM PST 24 |
Feb 07 05:03:41 PM PST 24 |
3980185480 ps |
| T324 |
/workspace/coverage/default/90.chip_sw_all_escalation_resets.2344879143 |
|
|
Feb 07 05:04:09 PM PST 24 |
Feb 07 05:14:09 PM PST 24 |
4578844994 ps |
| T339 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.3898943807 |
|
|
Feb 07 04:52:00 PM PST 24 |
Feb 07 04:59:21 PM PST 24 |
4906663368 ps |
| T1040 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.3315277414 |
|
|
Feb 07 04:49:33 PM PST 24 |
Feb 07 05:09:51 PM PST 24 |
6853022640 ps |
| T1041 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_prod.303911042 |
|
|
Feb 07 04:51:58 PM PST 24 |
Feb 07 04:58:34 PM PST 24 |
3414918593 ps |
| T1042 |
/workspace/coverage/default/2.chip_sw_kmac_smoketest.3908916053 |
|
|
Feb 07 04:56:19 PM PST 24 |
Feb 07 05:01:10 PM PST 24 |
2451657896 ps |
| T125 |
/workspace/coverage/default/0.chip_sw_usbdev_stream.1834275170 |
|
|
Feb 07 04:32:41 PM PST 24 |
Feb 07 05:46:18 PM PST 24 |
18463776376 ps |
| T1043 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.2114813935 |
|
|
Feb 07 04:40:52 PM PST 24 |
Feb 07 07:44:48 PM PST 24 |
65568012380 ps |
| T725 |
/workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.3576680756 |
|
|
Feb 07 05:04:20 PM PST 24 |
Feb 07 05:11:20 PM PST 24 |
3823701266 ps |
| T289 |
/workspace/coverage/default/1.chip_sw_otbn_mem_scramble.94461046 |
|
|
Feb 07 04:41:59 PM PST 24 |
Feb 07 04:49:25 PM PST 24 |
3088682030 ps |
| T12 |
/workspace/coverage/default/1.chip_jtag_csr_rw.851706112 |
|
|
Feb 07 04:36:54 PM PST 24 |
Feb 07 05:16:12 PM PST 24 |
20688953915 ps |
| T377 |
/workspace/coverage/default/2.chip_sw_rv_timer_smoketest.315143487 |
|
|
Feb 07 04:56:03 PM PST 24 |
Feb 07 04:59:41 PM PST 24 |
2805407844 ps |
| T378 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_kmac.247129039 |
|
|
Feb 07 04:51:54 PM PST 24 |
Feb 07 04:59:47 PM PST 24 |
3802433828 ps |
| T379 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.1961392135 |
|
|
Feb 07 04:51:49 PM PST 24 |
Feb 07 04:59:02 PM PST 24 |
3136397672 ps |
| T380 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.3463468954 |
|
|
Feb 07 04:56:41 PM PST 24 |
Feb 07 05:29:40 PM PST 24 |
12634518866 ps |
| T1044 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.2260321560 |
|
|
Feb 07 04:46:52 PM PST 24 |
Feb 07 04:52:26 PM PST 24 |
3269494293 ps |
| T1045 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation.289441409 |
|
|
Feb 07 04:33:30 PM PST 24 |
Feb 07 04:41:08 PM PST 24 |
4697019178 ps |
| T1046 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.1778754737 |
|
|
Feb 07 04:32:46 PM PST 24 |
Feb 07 04:37:49 PM PST 24 |
6599077046 ps |
| T1047 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter.4086903304 |
|
|
Feb 07 04:45:28 PM PST 24 |
Feb 07 04:48:56 PM PST 24 |
2141379073 ps |
| T239 |
/workspace/coverage/default/2.chip_sw_entropy_src_csrng.3432530140 |
|
|
Feb 07 04:52:16 PM PST 24 |
Feb 07 05:18:32 PM PST 24 |
7204072640 ps |
| T1048 |
/workspace/coverage/default/0.rom_e2e_shutdown_output.2095457117 |
|
|
Feb 07 04:40:42 PM PST 24 |
Feb 07 05:34:43 PM PST 24 |
24923954136 ps |
| T694 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.1534712606 |
|
|
Feb 07 04:40:55 PM PST 24 |
Feb 07 04:56:48 PM PST 24 |
4880334508 ps |
| T1049 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.1233040713 |
|
|
Feb 07 04:54:28 PM PST 24 |
Feb 07 05:02:10 PM PST 24 |
4330214948 ps |
| T794 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.4162444071 |
|
|
Feb 07 05:01:40 PM PST 24 |
Feb 07 05:08:17 PM PST 24 |
3131322528 ps |
| T1050 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.1820398958 |
|
|
Feb 07 04:43:31 PM PST 24 |
Feb 07 04:54:52 PM PST 24 |
5508822081 ps |
| T1051 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.3819698573 |
|
|
Feb 07 04:57:32 PM PST 24 |
Feb 07 05:05:58 PM PST 24 |
6449989314 ps |
| T659 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.3111003645 |
|
|
Feb 07 04:38:37 PM PST 24 |
Feb 07 04:41:07 PM PST 24 |
3762128539 ps |
| T1052 |
/workspace/coverage/default/0.chip_sw_usbdev_vbus.3181818978 |
|
|
Feb 07 04:33:14 PM PST 24 |
Feb 07 04:37:51 PM PST 24 |
2939730040 ps |
| T1053 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_otp_hw_cfg0.1203591943 |
|
|
Feb 07 04:33:50 PM PST 24 |
Feb 07 04:38:50 PM PST 24 |
3264570760 ps |
| T1054 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.3570482305 |
|
|
Feb 07 04:46:23 PM PST 24 |
Feb 07 05:06:16 PM PST 24 |
7486931420 ps |
| T1055 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.2828744940 |
|
|
Feb 07 04:48:41 PM PST 24 |
Feb 07 05:11:32 PM PST 24 |
5701220380 ps |
| T768 |
/workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.2762721249 |
|
|
Feb 07 05:02:08 PM PST 24 |
Feb 07 05:08:31 PM PST 24 |
3700542704 ps |
| T1056 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.3096415680 |
|
|
Feb 07 04:52:23 PM PST 24 |
Feb 07 05:02:10 PM PST 24 |
4580306230 ps |
| T1057 |
/workspace/coverage/default/1.chip_sw_otbn_randomness.774502600 |
|
|
Feb 07 04:40:25 PM PST 24 |
Feb 07 04:58:47 PM PST 24 |
5655401960 ps |
| T221 |
/workspace/coverage/default/0.chip_sw_gpio.374999429 |
|
|
Feb 07 04:33:40 PM PST 24 |
Feb 07 04:41:21 PM PST 24 |
3215907360 ps |
| T1058 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.876273923 |
|
|
Feb 07 04:55:17 PM PST 24 |
Feb 07 05:15:32 PM PST 24 |
5832260584 ps |
| T660 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_rand_to_scrap.2898222114 |
|
|
Feb 07 04:38:01 PM PST 24 |
Feb 07 04:41:58 PM PST 24 |
3298436021 ps |
| T1059 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.1446568244 |
|
|
Feb 07 04:43:15 PM PST 24 |
Feb 07 04:51:08 PM PST 24 |
2747202040 ps |
| T789 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.1595659855 |
|
|
Feb 07 05:03:55 PM PST 24 |
Feb 07 05:11:20 PM PST 24 |
4091323472 ps |
| T1060 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx2.3847478353 |
|
|
Feb 07 04:55:24 PM PST 24 |
Feb 07 05:14:27 PM PST 24 |
5344940048 ps |
| T1061 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_status.800784283 |
|
|
Feb 07 04:36:23 PM PST 24 |
Feb 07 04:42:01 PM PST 24 |
3458881607 ps |
| T28 |
/workspace/coverage/default/2.chip_sw_alert_test.1821445474 |
|
|
Feb 07 04:51:59 PM PST 24 |
Feb 07 04:57:18 PM PST 24 |
2227665466 ps |
| T1062 |
/workspace/coverage/default/0.chip_tap_straps_dev.1183910210 |
|
|
Feb 07 04:35:46 PM PST 24 |
Feb 07 04:38:14 PM PST 24 |
2980684858 ps |
| T1063 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod_end.1261494893 |
|
|
Feb 07 04:39:11 PM PST 24 |
Feb 07 05:16:59 PM PST 24 |
8064661144 ps |
| T195 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.3728643814 |
|
|
Feb 07 04:32:56 PM PST 24 |
Feb 07 04:40:45 PM PST 24 |
5226007320 ps |
| T1064 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.2350563702 |
|
|
Feb 07 04:43:50 PM PST 24 |
Feb 07 04:54:30 PM PST 24 |
4451102824 ps |
| T290 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.920925179 |
|
|
Feb 07 04:36:32 PM PST 24 |
Feb 07 04:47:28 PM PST 24 |
5147668397 ps |
| T655 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.301927436 |
|
|
Feb 07 04:53:59 PM PST 24 |
Feb 07 05:01:48 PM PST 24 |
4410787831 ps |
| T653 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency.1512117989 |
|
|
Feb 07 04:50:30 PM PST 24 |
Feb 07 05:54:14 PM PST 24 |
16626611656 ps |
| T1065 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.2120338580 |
|
|
Feb 07 04:33:54 PM PST 24 |
Feb 07 04:41:58 PM PST 24 |
7193874360 ps |
| T1066 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod_end.3480326649 |
|
|
Feb 07 04:50:08 PM PST 24 |
Feb 07 05:24:13 PM PST 24 |
8699426076 ps |
| T1067 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.3662891741 |
|
|
Feb 07 04:44:52 PM PST 24 |
Feb 07 04:54:11 PM PST 24 |
4494019718 ps |
| T761 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.3091054623 |
|
|
Feb 07 05:02:25 PM PST 24 |
Feb 07 05:08:57 PM PST 24 |
4135387074 ps |
| T316 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.3654053025 |
|
|
Feb 07 05:05:11 PM PST 24 |
Feb 07 05:12:13 PM PST 24 |
3998052606 ps |
| T1068 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.3656344376 |
|
|
Feb 07 04:59:54 PM PST 24 |
Feb 07 05:13:34 PM PST 24 |
12922273564 ps |
| T1069 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.2066424645 |
|
|
Feb 07 04:43:22 PM PST 24 |
Feb 07 04:54:25 PM PST 24 |
4341973770 ps |
| T1070 |
/workspace/coverage/default/2.chip_sw_spi_host_tx_rx.2457120328 |
|
|
Feb 07 04:48:33 PM PST 24 |
Feb 07 04:55:53 PM PST 24 |
2460935912 ps |
| T1071 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.2975631658 |
|
|
Feb 07 04:42:53 PM PST 24 |
Feb 07 05:16:22 PM PST 24 |
8438433086 ps |
| T1072 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.2271280187 |
|
|
Feb 07 05:01:04 PM PST 24 |
Feb 07 05:05:32 PM PST 24 |
2941301496 ps |
| T1073 |
/workspace/coverage/default/2.chip_sw_aes_idle.1104282169 |
|
|
Feb 07 04:50:00 PM PST 24 |
Feb 07 04:54:10 PM PST 24 |
2388225100 ps |
| T1074 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.1296795114 |
|
|
Feb 07 04:38:04 PM PST 24 |
Feb 07 04:45:21 PM PST 24 |
8864485630 ps |
| T118 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.2206961865 |
|
|
Feb 07 04:35:35 PM PST 24 |
Feb 07 04:44:42 PM PST 24 |
4943305062 ps |
| T1075 |
/workspace/coverage/default/26.chip_sw_all_escalation_resets.2214881172 |
|
|
Feb 07 05:00:13 PM PST 24 |
Feb 07 05:09:36 PM PST 24 |
4882694670 ps |
| T328 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.2961541770 |
|
|
Feb 07 04:52:56 PM PST 24 |
Feb 07 05:01:49 PM PST 24 |
5763230410 ps |
| T649 |
/workspace/coverage/default/1.chip_sw_edn_auto_mode.1014329044 |
|
|
Feb 07 04:41:25 PM PST 24 |
Feb 07 05:01:38 PM PST 24 |
5383914642 ps |
| T1076 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod.1089440014 |
|
|
Feb 07 04:50:34 PM PST 24 |
Feb 07 05:25:19 PM PST 24 |
9002202962 ps |
| T1077 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.3715805450 |
|
|
Feb 07 04:34:44 PM PST 24 |
Feb 07 04:43:17 PM PST 24 |
4294802025 ps |
| T1078 |
/workspace/coverage/default/5.chip_sw_uart_rand_baudrate.2378256975 |
|
|
Feb 07 04:57:39 PM PST 24 |
Feb 07 05:31:16 PM PST 24 |
13911308048 ps |
| T732 |
/workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.3877768515 |
|
|
Feb 07 05:02:59 PM PST 24 |
Feb 07 05:10:47 PM PST 24 |
3664988296 ps |
| T1079 |
/workspace/coverage/default/0.chip_sw_edn_kat.2190259413 |
|
|
Feb 07 04:34:44 PM PST 24 |
Feb 07 04:45:03 PM PST 24 |
3543151840 ps |
| T176 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.3067121345 |
|
|
Feb 07 04:48:43 PM PST 24 |
Feb 07 04:58:02 PM PST 24 |
4205892458 ps |
| T1080 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_power_glitch_reset.3412552985 |
|
|
Feb 07 04:33:33 PM PST 24 |
Feb 07 04:44:45 PM PST 24 |
6595525410 ps |
| T1081 |
/workspace/coverage/default/0.chip_sw_kmac_idle.2012137444 |
|
|
Feb 07 04:35:14 PM PST 24 |
Feb 07 04:39:06 PM PST 24 |
2572717308 ps |
| T135 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.2537609475 |
|
|
Feb 07 04:36:41 PM PST 24 |
Feb 07 04:45:46 PM PST 24 |
3703626042 ps |
| T1082 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.3179374770 |
|
|
Feb 07 04:43:52 PM PST 24 |
Feb 07 04:56:40 PM PST 24 |
4452466503 ps |
| T1083 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.3427325119 |
|
|
Feb 07 04:44:32 PM PST 24 |
Feb 07 04:59:43 PM PST 24 |
9036155490 ps |
| T1084 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.2251173716 |
|
|
Feb 07 04:46:11 PM PST 24 |
Feb 07 04:50:36 PM PST 24 |
2541572136 ps |
| T1085 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.550042451 |
|
|
Feb 07 04:49:28 PM PST 24 |
Feb 07 05:07:39 PM PST 24 |
9613890190 ps |
| T1086 |
/workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.262539484 |
|
|
Feb 07 04:33:04 PM PST 24 |
Feb 07 04:39:07 PM PST 24 |
3366415240 ps |
| T799 |
/workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.2410134717 |
|
|
Feb 07 05:03:31 PM PST 24 |
Feb 07 05:09:51 PM PST 24 |
3917547470 ps |
| T1087 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.3451566774 |
|
|
Feb 07 04:51:13 PM PST 24 |
Feb 07 05:27:21 PM PST 24 |
8958361942 ps |
| T1088 |
/workspace/coverage/default/2.chip_sw_aon_timer_sleep_wdog_sleep_pause.3487101811 |
|
|
Feb 07 04:50:39 PM PST 24 |
Feb 07 04:59:57 PM PST 24 |
6530019652 ps |
| T1089 |
/workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.2168074074 |
|
|
Feb 07 04:32:16 PM PST 24 |
Feb 07 04:42:27 PM PST 24 |
3617780622 ps |
| T1090 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.3253662382 |
|
|
Feb 07 04:41:54 PM PST 24 |
Feb 07 04:45:42 PM PST 24 |
2753680322 ps |
| T1091 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.2310809660 |
|
|
Feb 07 04:40:52 PM PST 24 |
Feb 07 05:16:17 PM PST 24 |
8641808282 ps |
| T1092 |
/workspace/coverage/default/12.chip_sw_uart_rand_baudrate.1527242232 |
|
|
Feb 07 04:58:36 PM PST 24 |
Feb 07 05:13:38 PM PST 24 |
5233508664 ps |
| T1093 |
/workspace/coverage/default/2.chip_sw_alert_handler_reverse_ping_in_deep_sleep.939056568 |
|
|
Feb 07 04:51:04 PM PST 24 |
Feb 07 08:29:21 PM PST 24 |
255404202568 ps |
| T1094 |
/workspace/coverage/default/2.chip_sw_otbn_randomness.532893305 |
|
|
Feb 07 04:50:35 PM PST 24 |
Feb 07 05:10:42 PM PST 24 |
6048158600 ps |
| T1095 |
/workspace/coverage/default/1.chip_sw_rstmgr_smoketest.1206292112 |
|
|
Feb 07 04:47:47 PM PST 24 |
Feb 07 04:53:06 PM PST 24 |
3117236448 ps |
| T1096 |
/workspace/coverage/default/1.rom_e2e_asm_init_rma.3918740660 |
|
|
Feb 07 04:50:16 PM PST 24 |
Feb 07 05:23:50 PM PST 24 |
8942546386 ps |
| T1097 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.879012427 |
|
|
Feb 07 04:41:30 PM PST 24 |
Feb 07 05:08:24 PM PST 24 |
6552989994 ps |
| T1098 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.100986738 |
|
|
Feb 07 04:52:43 PM PST 24 |
Feb 07 05:03:14 PM PST 24 |
5750931616 ps |
| T1099 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_transition.4122997915 |
|
|
Feb 07 04:37:23 PM PST 24 |
Feb 07 04:55:29 PM PST 24 |
9047747721 ps |
| T1100 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prodend.1550871159 |
|
|
Feb 07 04:49:34 PM PST 24 |
Feb 07 05:09:06 PM PST 24 |
9191603240 ps |
| T1101 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.1575663320 |
|
|
Feb 07 04:42:00 PM PST 24 |
Feb 07 05:21:19 PM PST 24 |
8476368828 ps |
| T404 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.522324412 |
|
|
Feb 07 04:53:09 PM PST 24 |
Feb 07 05:08:15 PM PST 24 |
4993691706 ps |
| T1102 |
/workspace/coverage/default/1.chip_sw_aes_masking_off.2242145225 |
|
|
Feb 07 04:42:02 PM PST 24 |
Feb 07 04:48:17 PM PST 24 |
2921363839 ps |
| T245 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_in_irq.3422406920 |
|
|
Feb 07 04:37:10 PM PST 24 |
Feb 07 04:47:20 PM PST 24 |
4498924192 ps |
| T1103 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.1384774755 |
|
|
Feb 07 04:35:54 PM PST 24 |
Feb 07 04:55:25 PM PST 24 |
6810170200 ps |
| T242 |
/workspace/coverage/default/78.chip_sw_all_escalation_resets.688145204 |
|
|
Feb 07 05:04:03 PM PST 24 |
Feb 07 05:15:09 PM PST 24 |
4865204980 ps |
| T1104 |
/workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.3904896101 |
|
|
Feb 07 04:33:36 PM PST 24 |
Feb 07 04:42:34 PM PST 24 |
3831638568 ps |
| T1105 |
/workspace/coverage/default/1.chip_sw_uart_rand_baudrate.4230277387 |
|
|
Feb 07 04:38:33 PM PST 24 |
Feb 07 05:22:44 PM PST 24 |
12721625726 ps |
| T747 |
/workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.1475066981 |
|
|
Feb 07 05:01:07 PM PST 24 |
Feb 07 05:07:31 PM PST 24 |
4263261460 ps |
| T1106 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_wakeup.3806026189 |
|
|
Feb 07 04:51:54 PM PST 24 |
Feb 07 05:00:54 PM PST 24 |
5218330204 ps |
| T177 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.570566533 |
|
|
Feb 07 04:32:26 PM PST 24 |
Feb 07 04:40:32 PM PST 24 |
4492698790 ps |
| T1107 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.79641835 |
|
|
Feb 07 04:39:14 PM PST 24 |
Feb 07 04:57:15 PM PST 24 |
12236125310 ps |
| T1108 |
/workspace/coverage/default/1.chip_sw_kmac_smoketest.1734564654 |
|
|
Feb 07 04:48:44 PM PST 24 |
Feb 07 04:53:06 PM PST 24 |
2606861464 ps |
| T1109 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.4267137513 |
|
|
Feb 07 04:34:57 PM PST 24 |
Feb 07 04:51:58 PM PST 24 |
10759626360 ps |
| T1110 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.422963520 |
|
|
Feb 07 04:38:47 PM PST 24 |
Feb 07 04:50:10 PM PST 24 |
4339435057 ps |
| T1111 |
/workspace/coverage/default/2.chip_sw_gpio_smoketest.2715783274 |
|
|
Feb 07 04:55:33 PM PST 24 |
Feb 07 05:01:32 PM PST 24 |
3337754914 ps |
| T13 |
/workspace/coverage/default/0.chip_jtag_csr_rw.2638438601 |
|
|
Feb 07 04:27:10 PM PST 24 |
Feb 07 05:12:38 PM PST 24 |
19971997158 ps |
| T381 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.3299599995 |
|
|
Feb 07 04:36:15 PM PST 24 |
Feb 07 04:47:56 PM PST 24 |
4593555996 ps |
| T382 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.2158896585 |
|
|
Feb 07 04:47:17 PM PST 24 |
Feb 07 04:53:50 PM PST 24 |
3402112280 ps |
| T383 |
/workspace/coverage/default/0.chip_sw_aes_idle.3985507767 |
|
|
Feb 07 04:33:43 PM PST 24 |
Feb 07 04:38:22 PM PST 24 |
2102549672 ps |
| T148 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_program_error.2250097511 |
|
|
Feb 07 04:33:34 PM PST 24 |
Feb 07 04:44:02 PM PST 24 |
5217359496 ps |
| T1112 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.1979182095 |
|
|
Feb 07 04:55:57 PM PST 24 |
Feb 07 05:08:35 PM PST 24 |
6715409848 ps |
| T782 |
/workspace/coverage/default/44.chip_sw_all_escalation_resets.988071335 |
|
|
Feb 07 05:02:11 PM PST 24 |
Feb 07 05:13:25 PM PST 24 |
5070022266 ps |
| T1113 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usb_clk_disabled_when_active.1908576252 |
|
|
Feb 07 04:41:41 PM PST 24 |
Feb 07 04:51:04 PM PST 24 |
4721838316 ps |
| T1114 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_req.3872046238 |
|
|
Feb 07 04:33:48 PM PST 24 |
Feb 07 04:42:58 PM PST 24 |
3790212312 ps |
| T1115 |
/workspace/coverage/default/2.chip_sw_example_manufacturer.3502475681 |
|
|
Feb 07 04:48:31 PM PST 24 |
Feb 07 04:51:25 PM PST 24 |
3267843110 ps |
| T392 |
/workspace/coverage/default/0.chip_rv_dm_ndm_reset_req.396775089 |
|
|
Feb 07 04:35:52 PM PST 24 |
Feb 07 04:43:37 PM PST 24 |
4120692688 ps |
| T220 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.2315330242 |
|
|
Feb 07 04:34:27 PM PST 24 |
Feb 07 04:46:26 PM PST 24 |
3913342928 ps |
| T1116 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_rma.3087552065 |
|
|
Feb 07 04:40:06 PM PST 24 |
Feb 07 05:36:33 PM PST 24 |
12040592682 ps |
| T783 |
/workspace/coverage/default/6.chip_sw_all_escalation_resets.3652952363 |
|
|
Feb 07 04:58:36 PM PST 24 |
Feb 07 05:07:57 PM PST 24 |
4020244136 ps |
| T1117 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_peri.8990568 |
|
|
Feb 07 04:52:04 PM PST 24 |
Feb 07 05:11:58 PM PST 24 |
8246346152 ps |
| T329 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.1400043134 |
|
|
Feb 07 04:35:59 PM PST 24 |
Feb 07 04:45:25 PM PST 24 |
5405990552 ps |
| T271 |
/workspace/coverage/default/63.chip_sw_all_escalation_resets.3711372920 |
|
|
Feb 07 05:02:27 PM PST 24 |
Feb 07 05:12:04 PM PST 24 |
4882303900 ps |
| T1118 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.716315708 |
|
|
Feb 07 04:34:20 PM PST 24 |
Feb 07 04:43:32 PM PST 24 |
7047000712 ps |
| T1119 |
/workspace/coverage/default/1.rom_e2e_asm_init_dev.1638263342 |
|
|
Feb 07 04:50:18 PM PST 24 |
Feb 07 05:27:09 PM PST 24 |
9674208124 ps |
| T272 |
/workspace/coverage/default/59.chip_sw_all_escalation_resets.3306236967 |
|
|
Feb 07 05:02:27 PM PST 24 |
Feb 07 05:11:56 PM PST 24 |
5259475658 ps |
| T1120 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.2018592518 |
|
|
Feb 07 04:51:03 PM PST 24 |
Feb 07 04:57:23 PM PST 24 |
5505532108 ps |
| T1121 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.4237049087 |
|
|
Feb 07 04:59:53 PM PST 24 |
Feb 07 05:11:44 PM PST 24 |
5973243512 ps |
| T1122 |
/workspace/coverage/default/2.chip_sw_hmac_smoketest.1923561428 |
|
|
Feb 07 04:54:57 PM PST 24 |
Feb 07 05:01:35 PM PST 24 |
3296978598 ps |
| T1123 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.3010257860 |
|
|
Feb 07 04:35:25 PM PST 24 |
Feb 07 04:38:44 PM PST 24 |
2186269880 ps |
| T1124 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.2093055023 |
|
|
Feb 07 04:34:00 PM PST 24 |
Feb 07 05:17:06 PM PST 24 |
10106513200 ps |
| T1125 |
/workspace/coverage/default/4.chip_sw_aon_timer_sleep_wdog_sleep_pause.1377647700 |
|
|
Feb 07 04:57:04 PM PST 24 |
Feb 07 05:05:46 PM PST 24 |
6785755662 ps |
| T1126 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.1806990965 |
|
|
Feb 07 04:42:03 PM PST 24 |
Feb 07 05:17:13 PM PST 24 |
8844389880 ps |
| T770 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.3691329771 |
|
|
Feb 07 04:42:04 PM PST 24 |
Feb 07 04:48:55 PM PST 24 |
3727061250 ps |
| T1127 |
/workspace/coverage/default/2.chip_sw_otbn_smoketest.2959088420 |
|
|
Feb 07 04:57:59 PM PST 24 |
Feb 07 05:15:31 PM PST 24 |
5947891350 ps |
| T1128 |
/workspace/coverage/default/1.chip_sw_edn_kat.1821212426 |
|
|
Feb 07 04:41:51 PM PST 24 |
Feb 07 04:53:20 PM PST 24 |
3628960260 ps |
| T790 |
/workspace/coverage/default/15.chip_sw_all_escalation_resets.3890040683 |
|
|
Feb 07 04:58:36 PM PST 24 |
Feb 07 05:08:28 PM PST 24 |
5206563816 ps |
| T707 |
/workspace/coverage/default/77.chip_sw_all_escalation_resets.1537423283 |
|
|
Feb 07 05:03:05 PM PST 24 |
Feb 07 05:14:17 PM PST 24 |
5993159368 ps |
| T393 |
/workspace/coverage/default/2.chip_rv_dm_ndm_reset_req.2470987354 |
|
|
Feb 07 04:53:21 PM PST 24 |
Feb 07 05:00:57 PM PST 24 |
4152169392 ps |
| T1129 |
/workspace/coverage/default/2.chip_sw_aon_timer_irq.4064844211 |
|
|
Feb 07 04:49:46 PM PST 24 |
Feb 07 04:54:44 PM PST 24 |
3828393496 ps |
| T1130 |
/workspace/coverage/default/2.chip_sw_data_integrity_escalation.2330613570 |
|
|
Feb 07 04:53:05 PM PST 24 |
Feb 07 05:03:18 PM PST 24 |
5415091784 ps |
| T1131 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.1129335417 |
|
|
Feb 07 04:38:52 PM PST 24 |
Feb 07 04:54:01 PM PST 24 |
5619939564 ps |
| T1132 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.271864672 |
|
|
Feb 07 04:37:23 PM PST 24 |
Feb 07 04:42:31 PM PST 24 |
3300753503 ps |
| T1133 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.3938061933 |
|
|
Feb 07 04:48:35 PM PST 24 |
Feb 07 08:22:37 PM PST 24 |
78928644544 ps |
| T1134 |
/workspace/coverage/default/2.chip_sw_csrng_smoketest.869285607 |
|
|
Feb 07 04:55:20 PM PST 24 |
Feb 07 04:58:15 PM PST 24 |
2621630664 ps |
| T1135 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1659348587 |
|
|
Feb 07 04:37:24 PM PST 24 |
Feb 07 05:09:21 PM PST 24 |
12882926485 ps |