| T2265 |
/workspace/coverage/cover_reg_top/86.xbar_stress_all.1590940509 |
|
|
Feb 07 04:23:14 PM PST 24 |
Feb 07 04:28:38 PM PST 24 |
7734053634 ps |
| T2266 |
/workspace/coverage/cover_reg_top/57.xbar_access_same_device_slow_rsp.3041076398 |
|
|
Feb 07 04:18:55 PM PST 24 |
Feb 07 04:21:47 PM PST 24 |
10543358584 ps |
| T2267 |
/workspace/coverage/cover_reg_top/38.xbar_random_zero_delays.1908789241 |
|
|
Feb 07 04:16:03 PM PST 24 |
Feb 07 04:16:11 PM PST 24 |
43593591 ps |
| T2268 |
/workspace/coverage/cover_reg_top/33.xbar_access_same_device.858848741 |
|
|
Feb 07 04:15:01 PM PST 24 |
Feb 07 04:15:37 PM PST 24 |
376496221 ps |
| T2269 |
/workspace/coverage/cover_reg_top/68.xbar_stress_all.214248531 |
|
|
Feb 07 04:20:20 PM PST 24 |
Feb 07 04:25:47 PM PST 24 |
3548838030 ps |
| T2270 |
/workspace/coverage/cover_reg_top/76.xbar_access_same_device.3791668745 |
|
|
Feb 07 04:21:34 PM PST 24 |
Feb 07 04:22:38 PM PST 24 |
749777630 ps |
| T2271 |
/workspace/coverage/cover_reg_top/80.xbar_random_zero_delays.3574318903 |
|
|
Feb 07 04:22:01 PM PST 24 |
Feb 07 04:22:44 PM PST 24 |
572252741 ps |
| T2272 |
/workspace/coverage/cover_reg_top/82.xbar_access_same_device_slow_rsp.1935041667 |
|
|
Feb 07 04:22:19 PM PST 24 |
Feb 07 05:03:17 PM PST 24 |
127981376407 ps |
| T2273 |
/workspace/coverage/cover_reg_top/2.chip_tl_errors.2499075806 |
|
|
Feb 07 04:11:28 PM PST 24 |
Feb 07 04:12:49 PM PST 24 |
2635756304 ps |
| T2274 |
/workspace/coverage/cover_reg_top/4.xbar_access_same_device.85968245 |
|
|
Feb 07 04:11:49 PM PST 24 |
Feb 07 04:11:55 PM PST 24 |
15943220 ps |
| T2275 |
/workspace/coverage/cover_reg_top/48.xbar_random_zero_delays.593824851 |
|
|
Feb 07 04:17:29 PM PST 24 |
Feb 07 04:18:08 PM PST 24 |
460407546 ps |
| T2276 |
/workspace/coverage/cover_reg_top/15.xbar_error_random.3802022717 |
|
|
Feb 07 04:12:31 PM PST 24 |
Feb 07 04:13:00 PM PST 24 |
310002142 ps |
| T2277 |
/workspace/coverage/cover_reg_top/6.xbar_random_large_delays.487510312 |
|
|
Feb 07 04:11:53 PM PST 24 |
Feb 07 04:19:46 PM PST 24 |
51128260555 ps |
| T2278 |
/workspace/coverage/cover_reg_top/18.xbar_smoke.2113269251 |
|
|
Feb 07 04:12:54 PM PST 24 |
Feb 07 04:13:02 PM PST 24 |
44547664 ps |
| T2279 |
/workspace/coverage/cover_reg_top/43.xbar_random_zero_delays.1114150737 |
|
|
Feb 07 04:16:45 PM PST 24 |
Feb 07 04:17:07 PM PST 24 |
214912334 ps |
| T2280 |
/workspace/coverage/cover_reg_top/13.xbar_stress_all_with_reset_error.1674823084 |
|
|
Feb 07 04:12:31 PM PST 24 |
Feb 07 04:13:53 PM PST 24 |
154454396 ps |
| T2281 |
/workspace/coverage/cover_reg_top/40.xbar_same_source.1785633131 |
|
|
Feb 07 04:16:26 PM PST 24 |
Feb 07 04:16:35 PM PST 24 |
148157983 ps |
| T2282 |
/workspace/coverage/cover_reg_top/97.xbar_stress_all_with_reset_error.1722371072 |
|
|
Feb 07 04:24:51 PM PST 24 |
Feb 07 04:26:15 PM PST 24 |
278690850 ps |
| T2283 |
/workspace/coverage/cover_reg_top/87.xbar_access_same_device.716757578 |
|
|
Feb 07 04:23:15 PM PST 24 |
Feb 07 04:23:27 PM PST 24 |
101874279 ps |
| T2284 |
/workspace/coverage/cover_reg_top/63.xbar_stress_all_with_error.3869017832 |
|
|
Feb 07 04:19:39 PM PST 24 |
Feb 07 04:30:15 PM PST 24 |
16816640882 ps |
| T2285 |
/workspace/coverage/cover_reg_top/90.xbar_stress_all_with_error.3671606358 |
|
|
Feb 07 04:23:59 PM PST 24 |
Feb 07 04:24:32 PM PST 24 |
387952544 ps |
| T2286 |
/workspace/coverage/cover_reg_top/45.xbar_stress_all.3397863152 |
|
|
Feb 07 04:16:58 PM PST 24 |
Feb 07 04:19:31 PM PST 24 |
1456151837 ps |
| T2287 |
/workspace/coverage/cover_reg_top/25.xbar_same_source.669029453 |
|
|
Feb 07 04:14:07 PM PST 24 |
Feb 07 04:14:39 PM PST 24 |
417379061 ps |
| T2288 |
/workspace/coverage/cover_reg_top/42.xbar_random_slow_rsp.2762046654 |
|
|
Feb 07 04:16:38 PM PST 24 |
Feb 07 04:19:02 PM PST 24 |
8082523233 ps |
| T2289 |
/workspace/coverage/cover_reg_top/2.xbar_access_same_device_slow_rsp.35204092 |
|
|
Feb 07 04:11:42 PM PST 24 |
Feb 07 04:23:56 PM PST 24 |
43197010417 ps |
| T2290 |
/workspace/coverage/cover_reg_top/72.xbar_access_same_device.1534847216 |
|
|
Feb 07 04:20:54 PM PST 24 |
Feb 07 04:21:58 PM PST 24 |
1597990249 ps |
| T2291 |
/workspace/coverage/cover_reg_top/84.xbar_random.2138149029 |
|
|
Feb 07 04:22:34 PM PST 24 |
Feb 07 04:22:42 PM PST 24 |
135132868 ps |
| T2292 |
/workspace/coverage/cover_reg_top/8.xbar_random_zero_delays.1516724080 |
|
|
Feb 07 04:12:06 PM PST 24 |
Feb 07 04:12:49 PM PST 24 |
519934952 ps |
| T2293 |
/workspace/coverage/cover_reg_top/52.xbar_access_same_device_slow_rsp.3022352479 |
|
|
Feb 07 04:18:05 PM PST 24 |
Feb 07 04:46:28 PM PST 24 |
94043647655 ps |
| T2294 |
/workspace/coverage/cover_reg_top/22.xbar_random_large_delays.2515511572 |
|
|
Feb 07 04:13:28 PM PST 24 |
Feb 07 04:28:22 PM PST 24 |
78489742912 ps |
| T2295 |
/workspace/coverage/cover_reg_top/15.chip_csr_rw.3472822888 |
|
|
Feb 07 04:12:36 PM PST 24 |
Feb 07 04:18:51 PM PST 24 |
5007483664 ps |
| T2296 |
/workspace/coverage/cover_reg_top/73.xbar_stress_all.3904446336 |
|
|
Feb 07 04:21:13 PM PST 24 |
Feb 07 04:25:33 PM PST 24 |
3405714701 ps |
| T2297 |
/workspace/coverage/cover_reg_top/83.xbar_random_large_delays.4018306094 |
|
|
Feb 07 04:22:29 PM PST 24 |
Feb 07 04:37:28 PM PST 24 |
71115680958 ps |
| T2298 |
/workspace/coverage/cover_reg_top/79.xbar_smoke_large_delays.1545032609 |
|
|
Feb 07 04:21:51 PM PST 24 |
Feb 07 04:22:58 PM PST 24 |
6472802962 ps |
| T2299 |
/workspace/coverage/cover_reg_top/2.xbar_random_large_delays.2285526654 |
|
|
Feb 07 04:11:59 PM PST 24 |
Feb 07 04:15:19 PM PST 24 |
17494581945 ps |
| T2300 |
/workspace/coverage/cover_reg_top/51.xbar_error_and_unmapped_addr.3201380743 |
|
|
Feb 07 04:18:03 PM PST 24 |
Feb 07 04:18:47 PM PST 24 |
1129205132 ps |
| T2301 |
/workspace/coverage/cover_reg_top/61.xbar_stress_all_with_rand_reset.1987403151 |
|
|
Feb 07 04:19:22 PM PST 24 |
Feb 07 04:23:03 PM PST 24 |
2359298843 ps |
| T674 |
/workspace/coverage/cover_reg_top/2.xbar_stress_all_with_reset_error.3629846749 |
|
|
Feb 07 04:11:40 PM PST 24 |
Feb 07 04:16:39 PM PST 24 |
944537603 ps |
| T2302 |
/workspace/coverage/cover_reg_top/94.xbar_unmapped_addr.2019601880 |
|
|
Feb 07 04:24:11 PM PST 24 |
Feb 07 04:24:25 PM PST 24 |
208195263 ps |
| T2303 |
/workspace/coverage/cover_reg_top/95.xbar_stress_all_with_rand_reset.3375804029 |
|
|
Feb 07 04:24:21 PM PST 24 |
Feb 07 04:26:02 PM PST 24 |
196647135 ps |
| T2304 |
/workspace/coverage/cover_reg_top/20.xbar_stress_all_with_rand_reset.2527750995 |
|
|
Feb 07 04:13:27 PM PST 24 |
Feb 07 04:22:48 PM PST 24 |
11859561707 ps |
| T2305 |
/workspace/coverage/cover_reg_top/9.xbar_error_random.4292508552 |
|
|
Feb 07 04:12:00 PM PST 24 |
Feb 07 04:12:10 PM PST 24 |
83754016 ps |
| T2306 |
/workspace/coverage/cover_reg_top/46.xbar_stress_all.2720540061 |
|
|
Feb 07 04:17:13 PM PST 24 |
Feb 07 04:20:16 PM PST 24 |
5199333188 ps |
| T2307 |
/workspace/coverage/cover_reg_top/59.xbar_access_same_device.2289168551 |
|
|
Feb 07 04:19:06 PM PST 24 |
Feb 07 04:20:50 PM PST 24 |
2412009025 ps |
| T2308 |
/workspace/coverage/cover_reg_top/26.xbar_unmapped_addr.2888002735 |
|
|
Feb 07 04:14:18 PM PST 24 |
Feb 07 04:14:46 PM PST 24 |
199244285 ps |
| T2309 |
/workspace/coverage/cover_reg_top/39.xbar_random_large_delays.3788154776 |
|
|
Feb 07 04:16:08 PM PST 24 |
Feb 07 04:34:11 PM PST 24 |
88205568365 ps |
| T2310 |
/workspace/coverage/cover_reg_top/65.xbar_same_source.3914844860 |
|
|
Feb 07 04:19:53 PM PST 24 |
Feb 07 04:20:26 PM PST 24 |
405431500 ps |
| T2311 |
/workspace/coverage/cover_reg_top/65.xbar_smoke_large_delays.1074095619 |
|
|
Feb 07 04:19:54 PM PST 24 |
Feb 07 04:21:27 PM PST 24 |
8128141042 ps |
| T2312 |
/workspace/coverage/cover_reg_top/72.xbar_random_large_delays.745323171 |
|
|
Feb 07 04:20:56 PM PST 24 |
Feb 07 04:26:17 PM PST 24 |
29187902539 ps |
| T2313 |
/workspace/coverage/cover_reg_top/41.xbar_random_zero_delays.2060375679 |
|
|
Feb 07 04:16:26 PM PST 24 |
Feb 07 04:17:14 PM PST 24 |
542908201 ps |
| T2314 |
/workspace/coverage/cover_reg_top/79.xbar_access_same_device_slow_rsp.1581178710 |
|
|
Feb 07 04:22:00 PM PST 24 |
Feb 07 04:35:13 PM PST 24 |
44372516122 ps |
| T2315 |
/workspace/coverage/cover_reg_top/56.xbar_random_slow_rsp.3131027723 |
|
|
Feb 07 04:18:40 PM PST 24 |
Feb 07 04:25:54 PM PST 24 |
24232927313 ps |
| T2316 |
/workspace/coverage/cover_reg_top/8.xbar_stress_all_with_reset_error.2627125846 |
|
|
Feb 07 04:12:08 PM PST 24 |
Feb 07 04:12:57 PM PST 24 |
169042679 ps |
| T2317 |
/workspace/coverage/cover_reg_top/1.chip_csr_mem_rw_with_rand_reset.1040512041 |
|
|
Feb 07 04:11:35 PM PST 24 |
Feb 07 04:15:40 PM PST 24 |
5568125423 ps |
| T2318 |
/workspace/coverage/cover_reg_top/47.xbar_unmapped_addr.2491181394 |
|
|
Feb 07 04:17:29 PM PST 24 |
Feb 07 04:17:58 PM PST 24 |
813918820 ps |
| T2319 |
/workspace/coverage/cover_reg_top/70.xbar_access_same_device.1375599505 |
|
|
Feb 07 04:20:33 PM PST 24 |
Feb 07 04:21:20 PM PST 24 |
1374218067 ps |
| T2320 |
/workspace/coverage/cover_reg_top/0.chip_rv_dm_lc_disabled.1949179613 |
|
|
Feb 07 04:11:27 PM PST 24 |
Feb 07 04:19:53 PM PST 24 |
13497241511 ps |
| T2321 |
/workspace/coverage/cover_reg_top/25.xbar_stress_all.2688327530 |
|
|
Feb 07 04:13:56 PM PST 24 |
Feb 07 04:19:33 PM PST 24 |
9614575683 ps |
| T2322 |
/workspace/coverage/cover_reg_top/50.xbar_smoke_large_delays.2885277891 |
|
|
Feb 07 04:17:40 PM PST 24 |
Feb 07 04:19:07 PM PST 24 |
8135365055 ps |
| T2323 |
/workspace/coverage/cover_reg_top/41.xbar_error_random.832481187 |
|
|
Feb 07 04:16:28 PM PST 24 |
Feb 07 04:18:04 PM PST 24 |
2485774680 ps |
| T2324 |
/workspace/coverage/cover_reg_top/6.xbar_access_same_device_slow_rsp.747005192 |
|
|
Feb 07 04:11:54 PM PST 24 |
Feb 07 04:43:17 PM PST 24 |
109020640287 ps |
| T2325 |
/workspace/coverage/cover_reg_top/26.xbar_error_and_unmapped_addr.3134009701 |
|
|
Feb 07 04:14:16 PM PST 24 |
Feb 07 04:14:30 PM PST 24 |
91208818 ps |
| T2326 |
/workspace/coverage/cover_reg_top/77.xbar_stress_all_with_reset_error.1218849495 |
|
|
Feb 07 04:21:45 PM PST 24 |
Feb 07 04:24:22 PM PST 24 |
583441610 ps |
| T683 |
/workspace/coverage/cover_reg_top/5.chip_tl_errors.1278185181 |
|
|
Feb 07 04:11:53 PM PST 24 |
Feb 07 04:14:18 PM PST 24 |
3185875489 ps |
| T2327 |
/workspace/coverage/cover_reg_top/22.xbar_smoke_slow_rsp.3815171846 |
|
|
Feb 07 04:13:38 PM PST 24 |
Feb 07 04:15:33 PM PST 24 |
6836499806 ps |
| T2328 |
/workspace/coverage/cover_reg_top/98.xbar_stress_all_with_rand_reset.1275582176 |
|
|
Feb 07 04:25:07 PM PST 24 |
Feb 07 04:35:33 PM PST 24 |
4962695110 ps |
| T2329 |
/workspace/coverage/cover_reg_top/81.xbar_smoke_zero_delays.4136137489 |
|
|
Feb 07 04:22:11 PM PST 24 |
Feb 07 04:22:18 PM PST 24 |
48775742 ps |
| T2330 |
/workspace/coverage/cover_reg_top/4.chip_csr_hw_reset.1596909525 |
|
|
Feb 07 04:11:43 PM PST 24 |
Feb 07 04:17:59 PM PST 24 |
7275050560 ps |
| T2331 |
/workspace/coverage/cover_reg_top/81.xbar_random_zero_delays.239624742 |
|
|
Feb 07 04:22:09 PM PST 24 |
Feb 07 04:22:41 PM PST 24 |
396759259 ps |
| T2332 |
/workspace/coverage/cover_reg_top/6.xbar_same_source.3008493505 |
|
|
Feb 07 04:11:53 PM PST 24 |
Feb 07 04:12:20 PM PST 24 |
371862896 ps |
| T2333 |
/workspace/coverage/cover_reg_top/27.xbar_stress_all_with_rand_reset.2333545804 |
|
|
Feb 07 04:14:14 PM PST 24 |
Feb 07 04:22:23 PM PST 24 |
3380636236 ps |
| T2334 |
/workspace/coverage/cover_reg_top/0.xbar_smoke.4251077495 |
|
|
Feb 07 04:11:25 PM PST 24 |
Feb 07 04:11:31 PM PST 24 |
48151160 ps |
| T2335 |
/workspace/coverage/cover_reg_top/62.xbar_error_random.3137178039 |
|
|
Feb 07 04:19:32 PM PST 24 |
Feb 07 04:19:47 PM PST 24 |
241658717 ps |
| T2336 |
/workspace/coverage/cover_reg_top/71.xbar_access_same_device.3391326759 |
|
|
Feb 07 04:20:46 PM PST 24 |
Feb 07 04:21:57 PM PST 24 |
1807208551 ps |
| T2337 |
/workspace/coverage/cover_reg_top/85.xbar_stress_all_with_error.2344814041 |
|
|
Feb 07 04:23:00 PM PST 24 |
Feb 07 04:31:14 PM PST 24 |
11617782032 ps |
| T2338 |
/workspace/coverage/cover_reg_top/34.xbar_stress_all_with_rand_reset.1610538105 |
|
|
Feb 07 04:15:13 PM PST 24 |
Feb 07 04:20:05 PM PST 24 |
862471973 ps |
| T2339 |
/workspace/coverage/cover_reg_top/99.xbar_stress_all_with_reset_error.3858333382 |
|
|
Feb 07 04:25:06 PM PST 24 |
Feb 07 04:33:35 PM PST 24 |
7320905039 ps |
| T2340 |
/workspace/coverage/cover_reg_top/44.xbar_random_slow_rsp.1564220272 |
|
|
Feb 07 04:17:07 PM PST 24 |
Feb 07 04:28:12 PM PST 24 |
36763974840 ps |
| T2341 |
/workspace/coverage/cover_reg_top/67.xbar_access_same_device.1459572828 |
|
|
Feb 07 04:20:03 PM PST 24 |
Feb 07 04:20:36 PM PST 24 |
838703321 ps |
| T2342 |
/workspace/coverage/cover_reg_top/68.xbar_stress_all_with_rand_reset.1721632636 |
|
|
Feb 07 04:20:19 PM PST 24 |
Feb 07 04:20:38 PM PST 24 |
63549597 ps |
| T2343 |
/workspace/coverage/cover_reg_top/14.chip_same_csr_outstanding.2718855716 |
|
|
Feb 07 04:12:38 PM PST 24 |
Feb 07 05:14:24 PM PST 24 |
27786314919 ps |
| T2344 |
/workspace/coverage/cover_reg_top/17.xbar_stress_all_with_error.3623687744 |
|
|
Feb 07 04:12:42 PM PST 24 |
Feb 07 04:16:51 PM PST 24 |
6953552491 ps |
| T2345 |
/workspace/coverage/cover_reg_top/76.xbar_smoke_zero_delays.753986353 |
|
|
Feb 07 04:21:28 PM PST 24 |
Feb 07 04:21:37 PM PST 24 |
51641806 ps |
| T2346 |
/workspace/coverage/cover_reg_top/23.xbar_access_same_device.546279240 |
|
|
Feb 07 04:13:44 PM PST 24 |
Feb 07 04:14:47 PM PST 24 |
783594499 ps |
| T2347 |
/workspace/coverage/cover_reg_top/14.xbar_smoke_slow_rsp.1672142924 |
|
|
Feb 07 04:12:41 PM PST 24 |
Feb 07 04:14:06 PM PST 24 |
4690722252 ps |
| T2348 |
/workspace/coverage/cover_reg_top/57.xbar_stress_all_with_rand_reset.1223571448 |
|
|
Feb 07 04:18:52 PM PST 24 |
Feb 07 04:25:52 PM PST 24 |
2380771541 ps |
| T2349 |
/workspace/coverage/cover_reg_top/7.xbar_unmapped_addr.1846075759 |
|
|
Feb 07 04:11:58 PM PST 24 |
Feb 07 04:12:22 PM PST 24 |
512531252 ps |
| T2350 |
/workspace/coverage/cover_reg_top/16.xbar_smoke_slow_rsp.916755216 |
|
|
Feb 07 04:12:39 PM PST 24 |
Feb 07 04:14:13 PM PST 24 |
5265948194 ps |
| T2351 |
/workspace/coverage/cover_reg_top/59.xbar_stress_all_with_reset_error.2188401358 |
|
|
Feb 07 04:19:15 PM PST 24 |
Feb 07 04:25:59 PM PST 24 |
6192031397 ps |
| T684 |
/workspace/coverage/cover_reg_top/23.chip_tl_errors.4048560790 |
|
|
Feb 07 04:13:38 PM PST 24 |
Feb 07 04:15:42 PM PST 24 |
3392669873 ps |
| T2352 |
/workspace/coverage/cover_reg_top/32.xbar_stress_all_with_reset_error.1789317542 |
|
|
Feb 07 04:15:04 PM PST 24 |
Feb 07 04:19:16 PM PST 24 |
730982686 ps |
| T2353 |
/workspace/coverage/cover_reg_top/67.xbar_smoke.731025931 |
|
|
Feb 07 04:20:05 PM PST 24 |
Feb 07 04:20:11 PM PST 24 |
44594097 ps |
| T681 |
/workspace/coverage/cover_reg_top/17.chip_tl_errors.930316670 |
|
|
Feb 07 04:12:27 PM PST 24 |
Feb 07 04:16:12 PM PST 24 |
3669981181 ps |
| T2354 |
/workspace/coverage/cover_reg_top/12.xbar_access_same_device.642786844 |
|
|
Feb 07 04:12:15 PM PST 24 |
Feb 07 04:13:38 PM PST 24 |
1902003597 ps |
| T2355 |
/workspace/coverage/cover_reg_top/96.xbar_unmapped_addr.970335374 |
|
|
Feb 07 04:24:41 PM PST 24 |
Feb 07 04:25:02 PM PST 24 |
392108506 ps |
| T2356 |
/workspace/coverage/cover_reg_top/64.xbar_stress_all_with_error.1542294307 |
|
|
Feb 07 04:19:44 PM PST 24 |
Feb 07 04:21:43 PM PST 24 |
1993935898 ps |
| T2357 |
/workspace/coverage/cover_reg_top/43.xbar_access_same_device.770352410 |
|
|
Feb 07 04:16:45 PM PST 24 |
Feb 07 04:17:26 PM PST 24 |
927211302 ps |
| T2358 |
/workspace/coverage/cover_reg_top/75.xbar_stress_all_with_rand_reset.2250586882 |
|
|
Feb 07 04:21:23 PM PST 24 |
Feb 07 04:29:36 PM PST 24 |
3075097248 ps |
| T2359 |
/workspace/coverage/cover_reg_top/32.xbar_smoke.2001024186 |
|
|
Feb 07 04:14:53 PM PST 24 |
Feb 07 04:15:00 PM PST 24 |
41765232 ps |
| T2360 |
/workspace/coverage/cover_reg_top/97.xbar_smoke.906469014 |
|
|
Feb 07 04:24:46 PM PST 24 |
Feb 07 04:24:56 PM PST 24 |
51086366 ps |
| T2361 |
/workspace/coverage/cover_reg_top/34.xbar_stress_all.167278467 |
|
|
Feb 07 04:15:15 PM PST 24 |
Feb 07 04:25:10 PM PST 24 |
16261396693 ps |
| T2362 |
/workspace/coverage/cover_reg_top/80.xbar_access_same_device.1809557320 |
|
|
Feb 07 04:22:02 PM PST 24 |
Feb 07 04:23:52 PM PST 24 |
2983148944 ps |
| T2363 |
/workspace/coverage/cover_reg_top/38.xbar_stress_all_with_reset_error.945651589 |
|
|
Feb 07 04:16:08 PM PST 24 |
Feb 07 04:18:11 PM PST 24 |
774373273 ps |
| T2364 |
/workspace/coverage/cover_reg_top/83.xbar_stress_all_with_rand_reset.527008501 |
|
|
Feb 07 04:22:26 PM PST 24 |
Feb 07 04:24:25 PM PST 24 |
360232900 ps |
| T2365 |
/workspace/coverage/cover_reg_top/32.xbar_stress_all.1715136948 |
|
|
Feb 07 04:14:58 PM PST 24 |
Feb 07 04:18:48 PM PST 24 |
5936763015 ps |
| T2366 |
/workspace/coverage/cover_reg_top/0.xbar_unmapped_addr.2159166124 |
|
|
Feb 07 04:11:37 PM PST 24 |
Feb 07 04:12:14 PM PST 24 |
923728175 ps |
| T2367 |
/workspace/coverage/cover_reg_top/92.xbar_access_same_device_slow_rsp.1025702254 |
|
|
Feb 07 04:23:53 PM PST 24 |
Feb 07 05:04:10 PM PST 24 |
122247603386 ps |
| T2368 |
/workspace/coverage/cover_reg_top/5.xbar_error_and_unmapped_addr.2294395933 |
|
|
Feb 07 04:11:53 PM PST 24 |
Feb 07 04:12:01 PM PST 24 |
139699418 ps |
| T2369 |
/workspace/coverage/cover_reg_top/81.xbar_access_same_device_slow_rsp.1450921440 |
|
|
Feb 07 04:22:11 PM PST 24 |
Feb 07 04:56:23 PM PST 24 |
106257894185 ps |
| T2370 |
/workspace/coverage/cover_reg_top/37.xbar_random_large_delays.191460475 |
|
|
Feb 07 04:16:06 PM PST 24 |
Feb 07 04:24:38 PM PST 24 |
46151276717 ps |
| T2371 |
/workspace/coverage/cover_reg_top/35.xbar_unmapped_addr.584338607 |
|
|
Feb 07 04:15:35 PM PST 24 |
Feb 07 04:15:58 PM PST 24 |
496329944 ps |
| T2372 |
/workspace/coverage/cover_reg_top/96.xbar_smoke_slow_rsp.783115734 |
|
|
Feb 07 04:24:30 PM PST 24 |
Feb 07 04:26:01 PM PST 24 |
5227898835 ps |
| T2373 |
/workspace/coverage/cover_reg_top/70.xbar_error_and_unmapped_addr.2296383422 |
|
|
Feb 07 04:20:39 PM PST 24 |
Feb 07 04:20:45 PM PST 24 |
19977108 ps |
| T2374 |
/workspace/coverage/cover_reg_top/52.xbar_smoke_slow_rsp.2597740442 |
|
|
Feb 07 04:18:08 PM PST 24 |
Feb 07 04:19:50 PM PST 24 |
5485147593 ps |
| T2375 |
/workspace/coverage/cover_reg_top/93.xbar_stress_all_with_rand_reset.3211487022 |
|
|
Feb 07 04:24:11 PM PST 24 |
Feb 07 04:28:32 PM PST 24 |
3867416169 ps |
| T2376 |
/workspace/coverage/cover_reg_top/38.xbar_unmapped_addr.271753737 |
|
|
Feb 07 04:15:59 PM PST 24 |
Feb 07 04:16:53 PM PST 24 |
1153972024 ps |
| T2377 |
/workspace/coverage/cover_reg_top/6.xbar_smoke_large_delays.3015698778 |
|
|
Feb 07 04:11:51 PM PST 24 |
Feb 07 04:13:21 PM PST 24 |
8637809658 ps |
| T2378 |
/workspace/coverage/cover_reg_top/69.xbar_same_source.4008842423 |
|
|
Feb 07 04:20:21 PM PST 24 |
Feb 07 04:20:59 PM PST 24 |
506528564 ps |
| T2379 |
/workspace/coverage/cover_reg_top/89.xbar_random_zero_delays.59152272 |
|
|
Feb 07 04:23:29 PM PST 24 |
Feb 07 04:23:52 PM PST 24 |
215388868 ps |
| T2380 |
/workspace/coverage/cover_reg_top/50.xbar_error_random.2637198722 |
|
|
Feb 07 04:17:48 PM PST 24 |
Feb 07 04:18:35 PM PST 24 |
564594021 ps |
| T2381 |
/workspace/coverage/cover_reg_top/71.xbar_stress_all.502413193 |
|
|
Feb 07 04:20:53 PM PST 24 |
Feb 07 04:22:43 PM PST 24 |
1364699628 ps |
| T2382 |
/workspace/coverage/cover_reg_top/37.xbar_random_slow_rsp.643752637 |
|
|
Feb 07 04:15:55 PM PST 24 |
Feb 07 04:31:40 PM PST 24 |
54584207556 ps |
| T2383 |
/workspace/coverage/cover_reg_top/21.xbar_error_random.1901011576 |
|
|
Feb 07 04:23:37 PM PST 24 |
Feb 07 04:23:57 PM PST 24 |
206939330 ps |
| T2384 |
/workspace/coverage/cover_reg_top/43.xbar_stress_all_with_reset_error.560365087 |
|
|
Feb 07 04:16:50 PM PST 24 |
Feb 07 04:23:26 PM PST 24 |
2898092744 ps |
| T2385 |
/workspace/coverage/cover_reg_top/18.chip_csr_rw.2141279196 |
|
|
Feb 07 04:13:05 PM PST 24 |
Feb 07 04:17:38 PM PST 24 |
4046188380 ps |
| T2386 |
/workspace/coverage/cover_reg_top/40.xbar_error_random.2905465330 |
|
|
Feb 07 04:16:18 PM PST 24 |
Feb 07 04:17:13 PM PST 24 |
1356888698 ps |
| T2387 |
/workspace/coverage/cover_reg_top/77.xbar_stress_all.1551136403 |
|
|
Feb 07 04:21:39 PM PST 24 |
Feb 07 04:23:47 PM PST 24 |
1687647306 ps |
| T2388 |
/workspace/coverage/cover_reg_top/64.xbar_same_source.778265641 |
|
|
Feb 07 04:19:44 PM PST 24 |
Feb 07 04:19:55 PM PST 24 |
109634843 ps |
| T2389 |
/workspace/coverage/cover_reg_top/47.xbar_error_random.680837718 |
|
|
Feb 07 04:17:21 PM PST 24 |
Feb 07 04:18:11 PM PST 24 |
614047290 ps |
| T2390 |
/workspace/coverage/cover_reg_top/14.xbar_stress_all_with_reset_error.1264388593 |
|
|
Feb 07 04:12:37 PM PST 24 |
Feb 07 04:15:12 PM PST 24 |
500784308 ps |
| T2391 |
/workspace/coverage/cover_reg_top/68.xbar_error_random.999040501 |
|
|
Feb 07 04:20:11 PM PST 24 |
Feb 07 04:20:21 PM PST 24 |
203714639 ps |
| T2392 |
/workspace/coverage/cover_reg_top/52.xbar_unmapped_addr.3408214314 |
|
|
Feb 07 04:18:08 PM PST 24 |
Feb 07 04:18:40 PM PST 24 |
261295542 ps |
| T2393 |
/workspace/coverage/cover_reg_top/32.xbar_random_large_delays.284809594 |
|
|
Feb 07 04:15:03 PM PST 24 |
Feb 07 04:18:33 PM PST 24 |
19754820096 ps |
| T2394 |
/workspace/coverage/cover_reg_top/18.xbar_smoke_zero_delays.521708852 |
|
|
Feb 07 04:12:56 PM PST 24 |
Feb 07 04:13:02 PM PST 24 |
46920937 ps |
| T2395 |
/workspace/coverage/cover_reg_top/15.xbar_random_zero_delays.618063257 |
|
|
Feb 07 04:12:36 PM PST 24 |
Feb 07 04:13:15 PM PST 24 |
408764921 ps |
| T2396 |
/workspace/coverage/cover_reg_top/19.xbar_smoke_slow_rsp.1887360859 |
|
|
Feb 07 04:13:02 PM PST 24 |
Feb 07 04:14:38 PM PST 24 |
5423231619 ps |
| T2397 |
/workspace/coverage/cover_reg_top/88.xbar_access_same_device_slow_rsp.3842424687 |
|
|
Feb 07 04:23:21 PM PST 24 |
Feb 07 04:35:12 PM PST 24 |
41499199708 ps |
| T2398 |
/workspace/coverage/cover_reg_top/49.xbar_stress_all.3375502920 |
|
|
Feb 07 04:17:39 PM PST 24 |
Feb 07 04:25:31 PM PST 24 |
13334571886 ps |
| T2399 |
/workspace/coverage/cover_reg_top/63.xbar_unmapped_addr.2864818622 |
|
|
Feb 07 04:19:35 PM PST 24 |
Feb 07 04:20:02 PM PST 24 |
546624372 ps |
| T2400 |
/workspace/coverage/cover_reg_top/47.xbar_access_same_device_slow_rsp.2157074433 |
|
|
Feb 07 04:17:21 PM PST 24 |
Feb 07 04:53:24 PM PST 24 |
118670831191 ps |
| T2401 |
/workspace/coverage/cover_reg_top/90.xbar_access_same_device.95283172 |
|
|
Feb 07 04:23:38 PM PST 24 |
Feb 07 04:24:21 PM PST 24 |
563282518 ps |
| T2402 |
/workspace/coverage/cover_reg_top/2.chip_same_csr_outstanding.1949690284 |
|
|
Feb 07 04:11:42 PM PST 24 |
Feb 07 05:13:45 PM PST 24 |
29363081551 ps |
| T2403 |
/workspace/coverage/cover_reg_top/55.xbar_access_same_device_slow_rsp.1662228074 |
|
|
Feb 07 04:18:37 PM PST 24 |
Feb 07 04:40:23 PM PST 24 |
72998886087 ps |
| T2404 |
/workspace/coverage/cover_reg_top/19.xbar_smoke_large_delays.2752861729 |
|
|
Feb 07 04:13:17 PM PST 24 |
Feb 07 04:14:18 PM PST 24 |
5524212080 ps |
| T2405 |
/workspace/coverage/cover_reg_top/81.xbar_same_source.4082069833 |
|
|
Feb 07 04:22:08 PM PST 24 |
Feb 07 04:22:26 PM PST 24 |
218621373 ps |
| T2406 |
/workspace/coverage/cover_reg_top/49.xbar_unmapped_addr.576748695 |
|
|
Feb 07 04:17:37 PM PST 24 |
Feb 07 04:18:11 PM PST 24 |
261616381 ps |
| T2407 |
/workspace/coverage/cover_reg_top/11.xbar_stress_all_with_error.1115117517 |
|
|
Feb 07 04:12:09 PM PST 24 |
Feb 07 04:12:17 PM PST 24 |
102405071 ps |
| T2408 |
/workspace/coverage/cover_reg_top/78.xbar_error_and_unmapped_addr.1628718807 |
|
|
Feb 07 04:21:41 PM PST 24 |
Feb 07 04:22:15 PM PST 24 |
290843672 ps |
| T2409 |
/workspace/coverage/cover_reg_top/86.xbar_random_large_delays.284045583 |
|
|
Feb 07 04:23:01 PM PST 24 |
Feb 07 04:28:06 PM PST 24 |
27175106419 ps |
| T2410 |
/workspace/coverage/cover_reg_top/10.chip_csr_rw.172521936 |
|
|
Feb 07 04:12:09 PM PST 24 |
Feb 07 04:16:19 PM PST 24 |
4426349282 ps |
| T2411 |
/workspace/coverage/cover_reg_top/79.xbar_same_source.890650084 |
|
|
Feb 07 04:21:58 PM PST 24 |
Feb 07 04:22:26 PM PST 24 |
855608271 ps |
| T2412 |
/workspace/coverage/cover_reg_top/40.xbar_error_and_unmapped_addr.2387342893 |
|
|
Feb 07 04:16:27 PM PST 24 |
Feb 07 04:17:05 PM PST 24 |
348075486 ps |
| T2413 |
/workspace/coverage/cover_reg_top/83.xbar_smoke_zero_delays.3391268751 |
|
|
Feb 07 04:22:15 PM PST 24 |
Feb 07 04:22:22 PM PST 24 |
52582511 ps |
| T2414 |
/workspace/coverage/cover_reg_top/92.xbar_error_random.1603093672 |
|
|
Feb 07 04:23:55 PM PST 24 |
Feb 07 04:25:18 PM PST 24 |
2295825772 ps |
| T2415 |
/workspace/coverage/cover_reg_top/66.xbar_access_same_device_slow_rsp.65043137 |
|
|
Feb 07 04:20:17 PM PST 24 |
Feb 07 04:35:40 PM PST 24 |
50738694146 ps |
| T2416 |
/workspace/coverage/cover_reg_top/19.xbar_random.773755236 |
|
|
Feb 07 04:13:15 PM PST 24 |
Feb 07 04:13:24 PM PST 24 |
148027254 ps |
| T2417 |
/workspace/coverage/cover_reg_top/63.xbar_stress_all_with_rand_reset.681365837 |
|
|
Feb 07 04:19:33 PM PST 24 |
Feb 07 04:30:46 PM PST 24 |
11496643228 ps |
| T2418 |
/workspace/coverage/cover_reg_top/90.xbar_error_random.2612435006 |
|
|
Feb 07 04:23:38 PM PST 24 |
Feb 07 04:23:55 PM PST 24 |
167891844 ps |
| T2419 |
/workspace/coverage/cover_reg_top/43.xbar_stress_all.2137133506 |
|
|
Feb 07 04:16:50 PM PST 24 |
Feb 07 04:29:40 PM PST 24 |
18660502003 ps |
| T2420 |
/workspace/coverage/cover_reg_top/87.xbar_error_random.1290115070 |
|
|
Feb 07 04:23:13 PM PST 24 |
Feb 07 04:23:42 PM PST 24 |
311724796 ps |
| T2421 |
/workspace/coverage/cover_reg_top/83.xbar_unmapped_addr.1538213630 |
|
|
Feb 07 04:22:36 PM PST 24 |
Feb 07 04:23:08 PM PST 24 |
297865933 ps |
| T2422 |
/workspace/coverage/cover_reg_top/78.xbar_access_same_device.616600209 |
|
|
Feb 07 04:21:40 PM PST 24 |
Feb 07 04:22:42 PM PST 24 |
767075142 ps |
| T2423 |
/workspace/coverage/cover_reg_top/19.xbar_smoke.2356269743 |
|
|
Feb 07 04:13:02 PM PST 24 |
Feb 07 04:13:09 PM PST 24 |
41922562 ps |
| T2424 |
/workspace/coverage/cover_reg_top/29.xbar_smoke_zero_delays.2352380110 |
|
|
Feb 07 04:14:25 PM PST 24 |
Feb 07 04:14:32 PM PST 24 |
52940670 ps |
| T2425 |
/workspace/coverage/cover_reg_top/68.xbar_smoke_zero_delays.619386333 |
|
|
Feb 07 04:20:12 PM PST 24 |
Feb 07 04:20:19 PM PST 24 |
43261137 ps |
| T2426 |
/workspace/coverage/cover_reg_top/82.xbar_random.717781490 |
|
|
Feb 07 04:22:15 PM PST 24 |
Feb 07 04:23:10 PM PST 24 |
626082689 ps |
| T2427 |
/workspace/coverage/cover_reg_top/79.xbar_stress_all.3074992451 |
|
|
Feb 07 04:21:54 PM PST 24 |
Feb 07 04:22:30 PM PST 24 |
881198650 ps |
| T2428 |
/workspace/coverage/cover_reg_top/38.xbar_stress_all.3151512005 |
|
|
Feb 07 04:16:07 PM PST 24 |
Feb 07 04:20:30 PM PST 24 |
6688000790 ps |
| T2429 |
/workspace/coverage/cover_reg_top/92.xbar_access_same_device.1028188501 |
|
|
Feb 07 04:23:58 PM PST 24 |
Feb 07 04:25:53 PM PST 24 |
3024435600 ps |
| T2430 |
/workspace/coverage/cover_reg_top/4.xbar_same_source.751959525 |
|
|
Feb 07 04:11:52 PM PST 24 |
Feb 07 04:12:28 PM PST 24 |
524225038 ps |
| T2431 |
/workspace/coverage/cover_reg_top/7.xbar_smoke_slow_rsp.1618568869 |
|
|
Feb 07 04:11:59 PM PST 24 |
Feb 07 04:13:42 PM PST 24 |
5901081830 ps |
| T2432 |
/workspace/coverage/cover_reg_top/12.xbar_unmapped_addr.70880406 |
|
|
Feb 07 04:12:15 PM PST 24 |
Feb 07 04:12:28 PM PST 24 |
233106769 ps |
| T2433 |
/workspace/coverage/cover_reg_top/55.xbar_access_same_device.581418554 |
|
|
Feb 07 04:18:36 PM PST 24 |
Feb 07 04:18:59 PM PST 24 |
555436643 ps |
| T2434 |
/workspace/coverage/cover_reg_top/64.xbar_unmapped_addr.1972948437 |
|
|
Feb 07 04:19:41 PM PST 24 |
Feb 07 04:20:39 PM PST 24 |
1373317576 ps |
| T2435 |
/workspace/coverage/cover_reg_top/60.xbar_unmapped_addr.1842226550 |
|
|
Feb 07 04:19:15 PM PST 24 |
Feb 07 04:19:23 PM PST 24 |
42768846 ps |
| T2436 |
/workspace/coverage/cover_reg_top/13.chip_same_csr_outstanding.633392506 |
|
|
Feb 07 04:12:19 PM PST 24 |
Feb 07 04:55:18 PM PST 24 |
16753487508 ps |
| T2437 |
/workspace/coverage/cover_reg_top/65.xbar_stress_all.513876930 |
|
|
Feb 07 04:19:53 PM PST 24 |
Feb 07 04:22:31 PM PST 24 |
1650024867 ps |
| T2438 |
/workspace/coverage/cover_reg_top/70.xbar_smoke_slow_rsp.400314627 |
|
|
Feb 07 04:20:33 PM PST 24 |
Feb 07 04:21:53 PM PST 24 |
4656709944 ps |
| T2439 |
/workspace/coverage/cover_reg_top/46.xbar_error_and_unmapped_addr.61343796 |
|
|
Feb 07 04:17:13 PM PST 24 |
Feb 07 04:17:21 PM PST 24 |
49767395 ps |
| T2440 |
/workspace/coverage/cover_reg_top/72.xbar_stress_all_with_reset_error.298071713 |
|
|
Feb 07 04:20:52 PM PST 24 |
Feb 07 04:27:54 PM PST 24 |
4250226211 ps |
| T2441 |
/workspace/coverage/cover_reg_top/52.xbar_smoke.1395581072 |
|
|
Feb 07 04:18:05 PM PST 24 |
Feb 07 04:18:13 PM PST 24 |
40406227 ps |
| T2442 |
/workspace/coverage/cover_reg_top/21.xbar_stress_all_with_error.1079485292 |
|
|
Feb 07 04:13:36 PM PST 24 |
Feb 07 04:14:34 PM PST 24 |
1443562356 ps |
| T2443 |
/workspace/coverage/cover_reg_top/10.chip_csr_mem_rw_with_rand_reset.473233577 |
|
|
Feb 07 04:12:06 PM PST 24 |
Feb 07 04:15:23 PM PST 24 |
5180122616 ps |
| T2444 |
/workspace/coverage/cover_reg_top/17.xbar_same_source.3002469154 |
|
|
Feb 07 04:12:44 PM PST 24 |
Feb 07 04:13:07 PM PST 24 |
289082801 ps |
| T2445 |
/workspace/coverage/cover_reg_top/64.xbar_stress_all.3365455910 |
|
|
Feb 07 04:19:43 PM PST 24 |
Feb 07 04:23:20 PM PST 24 |
5887229765 ps |
| T2446 |
/workspace/coverage/cover_reg_top/73.xbar_unmapped_addr.56211636 |
|
|
Feb 07 04:21:03 PM PST 24 |
Feb 07 04:21:54 PM PST 24 |
1216209145 ps |
| T2447 |
/workspace/coverage/cover_reg_top/29.xbar_access_same_device_slow_rsp.3555350477 |
|
|
Feb 07 04:14:32 PM PST 24 |
Feb 07 04:23:27 PM PST 24 |
30502430053 ps |
| T2448 |
/workspace/coverage/cover_reg_top/83.xbar_random.4170497288 |
|
|
Feb 07 04:22:27 PM PST 24 |
Feb 07 04:23:51 PM PST 24 |
2287818431 ps |
| T2449 |
/workspace/coverage/cover_reg_top/96.xbar_stress_all_with_rand_reset.2987350801 |
|
|
Feb 07 04:24:46 PM PST 24 |
Feb 07 04:26:07 PM PST 24 |
293523538 ps |
| T2450 |
/workspace/coverage/cover_reg_top/72.xbar_stress_all.3276541981 |
|
|
Feb 07 04:20:52 PM PST 24 |
Feb 07 04:29:26 PM PST 24 |
12849522168 ps |
| T2451 |
/workspace/coverage/cover_reg_top/21.xbar_error_and_unmapped_addr.3128179450 |
|
|
Feb 07 04:13:26 PM PST 24 |
Feb 07 04:13:51 PM PST 24 |
670915142 ps |
| T2452 |
/workspace/coverage/cover_reg_top/11.chip_csr_rw.2746989253 |
|
|
Feb 07 04:12:35 PM PST 24 |
Feb 07 04:21:35 PM PST 24 |
5148320300 ps |
| T2453 |
/workspace/coverage/cover_reg_top/25.xbar_smoke_large_delays.1694840848 |
|
|
Feb 07 04:14:05 PM PST 24 |
Feb 07 04:15:26 PM PST 24 |
7394461193 ps |
| T2454 |
/workspace/coverage/cover_reg_top/51.xbar_random.3673680573 |
|
|
Feb 07 04:17:55 PM PST 24 |
Feb 07 04:18:34 PM PST 24 |
1035038720 ps |
| T2455 |
/workspace/coverage/cover_reg_top/93.xbar_smoke.2601994296 |
|
|
Feb 07 04:23:55 PM PST 24 |
Feb 07 04:24:02 PM PST 24 |
57542591 ps |
| T2456 |
/workspace/coverage/cover_reg_top/86.xbar_access_same_device_slow_rsp.1974455218 |
|
|
Feb 07 04:23:16 PM PST 24 |
Feb 07 05:06:41 PM PST 24 |
126727911718 ps |
| T2457 |
/workspace/coverage/cover_reg_top/30.xbar_access_same_device_slow_rsp.4161457801 |
|
|
Feb 07 04:14:39 PM PST 24 |
Feb 07 04:25:23 PM PST 24 |
36321028064 ps |
| T2458 |
/workspace/coverage/cover_reg_top/7.xbar_random.2374603059 |
|
|
Feb 07 04:12:02 PM PST 24 |
Feb 07 04:12:11 PM PST 24 |
180065071 ps |
| T2459 |
/workspace/coverage/cover_reg_top/53.xbar_smoke.2215228417 |
|
|
Feb 07 04:18:08 PM PST 24 |
Feb 07 04:18:17 PM PST 24 |
43747881 ps |
| T2460 |
/workspace/coverage/cover_reg_top/78.xbar_smoke_slow_rsp.2856987501 |
|
|
Feb 07 04:21:43 PM PST 24 |
Feb 07 04:23:00 PM PST 24 |
4324381397 ps |
| T2461 |
/workspace/coverage/cover_reg_top/13.xbar_error_and_unmapped_addr.3106466469 |
|
|
Feb 07 04:12:15 PM PST 24 |
Feb 07 04:12:58 PM PST 24 |
995563283 ps |
| T2462 |
/workspace/coverage/cover_reg_top/79.xbar_smoke.1419143293 |
|
|
Feb 07 04:21:53 PM PST 24 |
Feb 07 04:22:02 PM PST 24 |
188998004 ps |
| T671 |
/workspace/coverage/cover_reg_top/58.xbar_stress_all_with_error.404319698 |
|
|
Feb 07 04:20:23 PM PST 24 |
Feb 07 04:21:20 PM PST 24 |
733869898 ps |
| T2463 |
/workspace/coverage/cover_reg_top/9.xbar_stress_all.1786922159 |
|
|
Feb 07 04:12:03 PM PST 24 |
Feb 07 04:12:12 PM PST 24 |
98467264 ps |
| T2464 |
/workspace/coverage/cover_reg_top/52.xbar_error_and_unmapped_addr.3188235064 |
|
|
Feb 07 04:18:08 PM PST 24 |
Feb 07 04:18:18 PM PST 24 |
101265904 ps |
| T2465 |
/workspace/coverage/cover_reg_top/29.xbar_smoke.2740270810 |
|
|
Feb 07 04:14:22 PM PST 24 |
Feb 07 04:14:30 PM PST 24 |
170018209 ps |
| T2466 |
/workspace/coverage/cover_reg_top/40.xbar_stress_all_with_error.3997824006 |
|
|
Feb 07 04:16:18 PM PST 24 |
Feb 07 04:16:34 PM PST 24 |
144117429 ps |
| T2467 |
/workspace/coverage/cover_reg_top/45.xbar_smoke_zero_delays.2781759338 |
|
|
Feb 07 04:16:50 PM PST 24 |
Feb 07 04:16:57 PM PST 24 |
43103027 ps |
| T2468 |
/workspace/coverage/cover_reg_top/3.xbar_error_random.1539184194 |
|
|
Feb 07 04:11:48 PM PST 24 |
Feb 07 04:12:25 PM PST 24 |
985760946 ps |
| T2469 |
/workspace/coverage/cover_reg_top/22.xbar_stress_all_with_rand_reset.3759900483 |
|
|
Feb 07 04:13:42 PM PST 24 |
Feb 07 04:17:02 PM PST 24 |
1531341232 ps |
| T2470 |
/workspace/coverage/cover_reg_top/57.xbar_random_large_delays.2244281829 |
|
|
Feb 07 04:18:51 PM PST 24 |
Feb 07 04:31:14 PM PST 24 |
67040354268 ps |
| T2471 |
/workspace/coverage/cover_reg_top/82.xbar_error_random.1361948021 |
|
|
Feb 07 04:22:24 PM PST 24 |
Feb 07 04:22:53 PM PST 24 |
852329006 ps |
| T2472 |
/workspace/coverage/cover_reg_top/0.xbar_random_zero_delays.1806374060 |
|
|
Feb 07 04:11:20 PM PST 24 |
Feb 07 04:11:50 PM PST 24 |
380092933 ps |
| T2473 |
/workspace/coverage/cover_reg_top/49.xbar_random_zero_delays.2978139319 |
|
|
Feb 07 04:17:39 PM PST 24 |
Feb 07 04:18:16 PM PST 24 |
448353688 ps |
| T685 |
/workspace/coverage/cover_reg_top/8.chip_tl_errors.3917855849 |
|
|
Feb 07 04:12:06 PM PST 24 |
Feb 07 04:14:37 PM PST 24 |
3409558758 ps |
| T2474 |
/workspace/coverage/cover_reg_top/13.xbar_random_slow_rsp.2656653479 |
|
|
Feb 07 04:12:33 PM PST 24 |
Feb 07 04:31:55 PM PST 24 |
62613090787 ps |
| T2475 |
/workspace/coverage/cover_reg_top/66.xbar_same_source.3312658004 |
|
|
Feb 07 04:20:02 PM PST 24 |
Feb 07 04:21:20 PM PST 24 |
2467817661 ps |
| T2476 |
/workspace/coverage/cover_reg_top/15.xbar_smoke_large_delays.2081330994 |
|
|
Feb 07 04:12:32 PM PST 24 |
Feb 07 04:13:43 PM PST 24 |
7096454582 ps |
| T2477 |
/workspace/coverage/cover_reg_top/21.xbar_stress_all_with_reset_error.2014806971 |
|
|
Feb 07 04:13:34 PM PST 24 |
Feb 07 04:15:59 PM PST 24 |
436758941 ps |
| T2478 |
/workspace/coverage/cover_reg_top/42.xbar_random_zero_delays.1595886407 |
|
|
Feb 07 04:16:27 PM PST 24 |
Feb 07 04:16:49 PM PST 24 |
200961449 ps |
| T2479 |
/workspace/coverage/cover_reg_top/37.xbar_stress_all.1078698960 |
|
|
Feb 07 04:15:52 PM PST 24 |
Feb 07 04:19:03 PM PST 24 |
2069086149 ps |
| T2480 |
/workspace/coverage/cover_reg_top/17.xbar_error_random.3987039429 |
|
|
Feb 07 04:12:32 PM PST 24 |
Feb 07 04:13:15 PM PST 24 |
541968971 ps |
| T2481 |
/workspace/coverage/cover_reg_top/11.xbar_random_large_delays.2226631484 |
|
|
Feb 07 04:12:16 PM PST 24 |
Feb 07 04:27:20 PM PST 24 |
90823462959 ps |
| T2482 |
/workspace/coverage/cover_reg_top/11.xbar_smoke.1818905410 |
|
|
Feb 07 04:12:33 PM PST 24 |
Feb 07 04:12:43 PM PST 24 |
202351210 ps |
| T2483 |
/workspace/coverage/cover_reg_top/24.xbar_error_random.3477447761 |
|
|
Feb 07 04:13:52 PM PST 24 |
Feb 07 04:14:41 PM PST 24 |
1357153676 ps |
| T2484 |
/workspace/coverage/cover_reg_top/65.xbar_error_and_unmapped_addr.381028981 |
|
|
Feb 07 04:19:55 PM PST 24 |
Feb 07 04:20:29 PM PST 24 |
743964031 ps |
| T2485 |
/workspace/coverage/cover_reg_top/9.xbar_error_and_unmapped_addr.2927710340 |
|
|
Feb 07 04:12:00 PM PST 24 |
Feb 07 04:12:08 PM PST 24 |
37786781 ps |
| T2486 |
/workspace/coverage/cover_reg_top/26.xbar_stress_all_with_error.1358957151 |
|
|
Feb 07 04:14:14 PM PST 24 |
Feb 07 04:15:52 PM PST 24 |
1382925527 ps |
| T2487 |
/workspace/coverage/cover_reg_top/16.xbar_access_same_device_slow_rsp.3821397594 |
|
|
Feb 07 04:12:31 PM PST 24 |
Feb 07 04:18:18 PM PST 24 |
20645391815 ps |
| T688 |
/workspace/coverage/cover_reg_top/12.chip_tl_errors.4109523497 |
|
|
Feb 07 04:12:28 PM PST 24 |
Feb 07 04:16:43 PM PST 24 |
3772597753 ps |
| T2488 |
/workspace/coverage/cover_reg_top/2.xbar_error_and_unmapped_addr.875712172 |
|
|
Feb 07 04:11:46 PM PST 24 |
Feb 07 04:11:52 PM PST 24 |
71549850 ps |
| T2489 |
/workspace/coverage/cover_reg_top/85.xbar_random_zero_delays.3192609162 |
|
|
Feb 07 04:22:45 PM PST 24 |
Feb 07 04:23:17 PM PST 24 |
327236350 ps |
| T2490 |
/workspace/coverage/cover_reg_top/45.xbar_same_source.1460801697 |
|
|
Feb 07 04:17:16 PM PST 24 |
Feb 07 04:17:31 PM PST 24 |
481154389 ps |
| T2491 |
/workspace/coverage/cover_reg_top/50.xbar_random_large_delays.3057033900 |
|
|
Feb 07 04:17:40 PM PST 24 |
Feb 07 04:29:47 PM PST 24 |
63621241386 ps |
| T2492 |
/workspace/coverage/cover_reg_top/0.chip_prim_tl_access.1717622662 |
|
|
Feb 07 04:11:25 PM PST 24 |
Feb 07 04:16:07 PM PST 24 |
7077823776 ps |
| T2493 |
/workspace/coverage/cover_reg_top/18.xbar_access_same_device_slow_rsp.1333450483 |
|
|
Feb 07 04:13:03 PM PST 24 |
Feb 07 04:41:16 PM PST 24 |
95628651680 ps |
| T2494 |
/workspace/coverage/cover_reg_top/22.xbar_random_zero_delays.2108706417 |
|
|
Feb 07 04:13:29 PM PST 24 |
Feb 07 04:13:55 PM PST 24 |
249346676 ps |
| T2495 |
/workspace/coverage/cover_reg_top/72.xbar_unmapped_addr.1285220710 |
|
|
Feb 07 04:20:54 PM PST 24 |
Feb 07 04:21:45 PM PST 24 |
1148981811 ps |
| T2496 |
/workspace/coverage/cover_reg_top/50.xbar_access_same_device_slow_rsp.3563613626 |
|
|
Feb 07 04:17:52 PM PST 24 |
Feb 07 04:41:00 PM PST 24 |
68397904526 ps |
| T2497 |
/workspace/coverage/cover_reg_top/6.xbar_stress_all_with_rand_reset.3605543331 |
|
|
Feb 07 04:11:50 PM PST 24 |
Feb 07 04:13:08 PM PST 24 |
280122726 ps |
| T2498 |
/workspace/coverage/cover_reg_top/66.xbar_error_random.821925719 |
|
|
Feb 07 04:20:07 PM PST 24 |
Feb 07 04:20:25 PM PST 24 |
462260419 ps |
| T2499 |
/workspace/coverage/cover_reg_top/19.xbar_stress_all_with_reset_error.2997308382 |
|
|
Feb 07 04:13:14 PM PST 24 |
Feb 07 04:23:17 PM PST 24 |
4826813038 ps |
| T2500 |
/workspace/coverage/cover_reg_top/89.xbar_random.3549393471 |
|
|
Feb 07 04:23:32 PM PST 24 |
Feb 07 04:23:47 PM PST 24 |
322412945 ps |
| T2501 |
/workspace/coverage/cover_reg_top/32.xbar_smoke_zero_delays.3615952122 |
|
|
Feb 07 04:15:06 PM PST 24 |
Feb 07 04:15:13 PM PST 24 |
47039582 ps |
| T2502 |
/workspace/coverage/cover_reg_top/47.xbar_stress_all_with_reset_error.481447127 |
|
|
Feb 07 04:17:31 PM PST 24 |
Feb 07 04:21:19 PM PST 24 |
868395123 ps |
| T2503 |
/workspace/coverage/cover_reg_top/24.xbar_unmapped_addr.1751559766 |
|
|
Feb 07 04:13:49 PM PST 24 |
Feb 07 04:14:05 PM PST 24 |
311293019 ps |
| T2504 |
/workspace/coverage/cover_reg_top/28.xbar_random_large_delays.200011695 |
|
|
Feb 07 04:14:24 PM PST 24 |
Feb 07 04:19:31 PM PST 24 |
27886138839 ps |
| T2505 |
/workspace/coverage/cover_reg_top/2.chip_csr_mem_rw_with_rand_reset.2565482423 |
|
|
Feb 07 04:11:41 PM PST 24 |
Feb 07 04:15:51 PM PST 24 |
5487250662 ps |
| T2506 |
/workspace/coverage/cover_reg_top/31.xbar_access_same_device.2232568690 |
|
|
Feb 07 04:14:54 PM PST 24 |
Feb 07 04:16:42 PM PST 24 |
2816675489 ps |
| T2507 |
/workspace/coverage/cover_reg_top/52.xbar_access_same_device.3610622700 |
|
|
Feb 07 04:18:12 PM PST 24 |
Feb 07 04:19:41 PM PST 24 |
1833543761 ps |