| T1304 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.2712183254 |
|
|
Feb 07 04:56:13 PM PST 24 |
Feb 07 05:09:59 PM PST 24 |
4687906466 ps |
| T1305 |
/workspace/coverage/default/3.chip_tap_straps_dev.1066930268 |
|
|
Feb 07 04:55:09 PM PST 24 |
Feb 07 04:59:34 PM PST 24 |
3709367251 ps |
| T1306 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_rma.1119251082 |
|
|
Feb 07 04:40:28 PM PST 24 |
Feb 07 05:17:00 PM PST 24 |
8307464892 ps |
| T1307 |
/workspace/coverage/default/1.chip_sw_hmac_enc.4229679930 |
|
|
Feb 07 04:42:03 PM PST 24 |
Feb 07 04:47:10 PM PST 24 |
2448228276 ps |
| T1308 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.619793059 |
|
|
Feb 07 04:48:53 PM PST 24 |
Feb 07 04:54:04 PM PST 24 |
2876586328 ps |
| T1309 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.2551710868 |
|
|
Feb 07 04:34:31 PM PST 24 |
Feb 07 04:44:58 PM PST 24 |
4410457952 ps |
| T1310 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.1268959994 |
|
|
Feb 07 05:00:47 PM PST 24 |
Feb 07 05:16:20 PM PST 24 |
5817111604 ps |
| T1311 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.1636510637 |
|
|
Feb 07 04:48:47 PM PST 24 |
Feb 07 05:02:09 PM PST 24 |
5777972188 ps |
| T1312 |
/workspace/coverage/default/0.chip_sw_rv_timer_smoketest.1308058135 |
|
|
Feb 07 04:38:19 PM PST 24 |
Feb 07 04:41:48 PM PST 24 |
2497320568 ps |
| T1313 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.2856630275 |
|
|
Feb 07 04:39:00 PM PST 24 |
Feb 07 04:44:31 PM PST 24 |
4533590129 ps |
| T1314 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.1897672016 |
|
|
Feb 07 04:53:24 PM PST 24 |
Feb 07 05:04:33 PM PST 24 |
5706698033 ps |
| T1315 |
/workspace/coverage/default/2.chip_sw_uart_smoketest_signed.1616909293 |
|
|
Feb 07 05:00:46 PM PST 24 |
Feb 07 05:30:13 PM PST 24 |
8557977084 ps |
| T222 |
/workspace/coverage/default/1.chip_sw_gpio.3153708747 |
|
|
Feb 07 04:38:46 PM PST 24 |
Feb 07 04:46:01 PM PST 24 |
3743974056 ps |
| T1316 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.1935968114 |
|
|
Feb 07 04:33:06 PM PST 24 |
Feb 07 05:12:08 PM PST 24 |
37062507095 ps |
| T1317 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_req.621526664 |
|
|
Feb 07 04:38:54 PM PST 24 |
Feb 07 04:44:55 PM PST 24 |
4545122424 ps |
| T1318 |
/workspace/coverage/default/88.chip_sw_all_escalation_resets.4011187879 |
|
|
Feb 07 05:04:25 PM PST 24 |
Feb 07 05:12:52 PM PST 24 |
4562327112 ps |
| T741 |
/workspace/coverage/default/28.chip_sw_all_escalation_resets.3482867069 |
|
|
Feb 07 04:59:38 PM PST 24 |
Feb 07 05:10:07 PM PST 24 |
4852549740 ps |
| T1319 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end.1470251692 |
|
|
Feb 07 04:41:45 PM PST 24 |
Feb 07 05:17:32 PM PST 24 |
8347644428 ps |
| T774 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.2793336692 |
|
|
Feb 07 04:59:56 PM PST 24 |
Feb 07 05:10:43 PM PST 24 |
4282369616 ps |
| T1320 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx1.409074702 |
|
|
Feb 07 04:47:50 PM PST 24 |
Feb 07 05:04:07 PM PST 24 |
5685571994 ps |
| T1321 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.933754850 |
|
|
Feb 07 04:52:09 PM PST 24 |
Feb 07 05:03:05 PM PST 24 |
5332442872 ps |
| T1322 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.2629985018 |
|
|
Feb 07 04:33:44 PM PST 24 |
Feb 07 04:40:11 PM PST 24 |
2918758968 ps |
| T1323 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.3040011744 |
|
|
Feb 07 05:04:08 PM PST 24 |
Feb 07 05:11:29 PM PST 24 |
3943808436 ps |
| T88 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.703262266 |
|
|
Feb 07 04:53:55 PM PST 24 |
Feb 07 06:01:01 PM PST 24 |
23178799886 ps |
| T728 |
/workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.3388555489 |
|
|
Feb 07 05:04:15 PM PST 24 |
Feb 07 05:11:58 PM PST 24 |
3274250430 ps |
| T238 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.1071722445 |
|
|
Feb 07 04:34:12 PM PST 24 |
Feb 07 04:50:23 PM PST 24 |
4743556186 ps |
| T1324 |
/workspace/coverage/default/2.chip_sw_kmac_idle.1850584496 |
|
|
Feb 07 04:53:13 PM PST 24 |
Feb 07 04:57:02 PM PST 24 |
2287663900 ps |
| T1325 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.114575586 |
|
|
Feb 07 04:37:55 PM PST 24 |
Feb 07 04:59:28 PM PST 24 |
5730042340 ps |
| T1326 |
/workspace/coverage/default/50.chip_sw_all_escalation_resets.2546077736 |
|
|
Feb 07 05:02:22 PM PST 24 |
Feb 07 05:11:44 PM PST 24 |
5278074592 ps |
| T311 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.2895756710 |
|
|
Feb 07 04:44:06 PM PST 24 |
Feb 07 04:53:40 PM PST 24 |
8590796153 ps |
| T1327 |
/workspace/coverage/cover_reg_top/45.xbar_unmapped_addr.1087835203 |
|
|
Feb 07 04:17:16 PM PST 24 |
Feb 07 04:17:21 PM PST 24 |
23546297 ps |
| T640 |
/workspace/coverage/cover_reg_top/73.xbar_stress_all_with_reset_error.884216664 |
|
|
Feb 07 04:21:00 PM PST 24 |
Feb 07 04:28:31 PM PST 24 |
5033081713 ps |
| T467 |
/workspace/coverage/cover_reg_top/30.xbar_stress_all.3494721055 |
|
|
Feb 07 04:14:46 PM PST 24 |
Feb 07 04:16:38 PM PST 24 |
3161972023 ps |
| T493 |
/workspace/coverage/cover_reg_top/69.xbar_smoke_zero_delays.2610209236 |
|
|
Feb 07 04:20:21 PM PST 24 |
Feb 07 04:20:27 PM PST 24 |
49665464 ps |
| T595 |
/workspace/coverage/cover_reg_top/94.xbar_random.3899667006 |
|
|
Feb 07 04:24:16 PM PST 24 |
Feb 07 04:24:46 PM PST 24 |
724659351 ps |
| T448 |
/workspace/coverage/cover_reg_top/75.xbar_stress_all.3463924409 |
|
|
Feb 07 04:21:34 PM PST 24 |
Feb 07 04:27:01 PM PST 24 |
8809031084 ps |
| T537 |
/workspace/coverage/cover_reg_top/34.xbar_smoke_large_delays.3038949805 |
|
|
Feb 07 04:15:08 PM PST 24 |
Feb 07 04:16:39 PM PST 24 |
8681089280 ps |
| T528 |
/workspace/coverage/cover_reg_top/74.xbar_unmapped_addr.1327578402 |
|
|
Feb 07 04:21:10 PM PST 24 |
Feb 07 04:21:43 PM PST 24 |
229411469 ps |
| T811 |
/workspace/coverage/cover_reg_top/93.xbar_access_same_device_slow_rsp.2570375261 |
|
|
Feb 07 04:24:06 PM PST 24 |
Feb 07 04:55:55 PM PST 24 |
100434796587 ps |
| T601 |
/workspace/coverage/cover_reg_top/76.xbar_smoke_slow_rsp.889712103 |
|
|
Feb 07 04:21:27 PM PST 24 |
Feb 07 04:23:15 PM PST 24 |
6820510902 ps |
| T126 |
/workspace/coverage/cover_reg_top/3.chip_csr_aliasing.3945904548 |
|
|
Feb 07 04:11:57 PM PST 24 |
Feb 07 06:57:02 PM PST 24 |
61335149351 ps |
| T641 |
/workspace/coverage/cover_reg_top/67.xbar_stress_all_with_error.696917724 |
|
|
Feb 07 04:20:12 PM PST 24 |
Feb 07 04:22:55 PM PST 24 |
2210831645 ps |
| T591 |
/workspace/coverage/cover_reg_top/31.xbar_smoke_slow_rsp.4116280977 |
|
|
Feb 07 04:14:43 PM PST 24 |
Feb 07 04:16:30 PM PST 24 |
6300677962 ps |
| T633 |
/workspace/coverage/cover_reg_top/11.xbar_smoke_large_delays.3054930776 |
|
|
Feb 07 04:12:14 PM PST 24 |
Feb 07 04:13:33 PM PST 24 |
7343568499 ps |
| T568 |
/workspace/coverage/cover_reg_top/30.xbar_same_source.2693264891 |
|
|
Feb 07 04:14:44 PM PST 24 |
Feb 07 04:15:41 PM PST 24 |
1770780877 ps |
| T1328 |
/workspace/coverage/cover_reg_top/7.xbar_smoke_zero_delays.2845063901 |
|
|
Feb 07 04:11:55 PM PST 24 |
Feb 07 04:12:01 PM PST 24 |
50388739 ps |
| T531 |
/workspace/coverage/cover_reg_top/79.xbar_unmapped_addr.3632992376 |
|
|
Feb 07 04:21:54 PM PST 24 |
Feb 07 04:22:31 PM PST 24 |
319576173 ps |
| T579 |
/workspace/coverage/cover_reg_top/0.xbar_stress_all.1184369289 |
|
|
Feb 07 04:11:35 PM PST 24 |
Feb 07 04:12:04 PM PST 24 |
950363865 ps |
| T637 |
/workspace/coverage/cover_reg_top/18.chip_tl_errors.2347678892 |
|
|
Feb 07 04:12:41 PM PST 24 |
Feb 07 04:14:14 PM PST 24 |
3234807351 ps |
| T1329 |
/workspace/coverage/cover_reg_top/2.chip_rv_dm_lc_disabled.3360414676 |
|
|
Feb 07 04:11:34 PM PST 24 |
Feb 07 04:15:25 PM PST 24 |
6243815156 ps |
| T541 |
/workspace/coverage/cover_reg_top/18.xbar_stress_all_with_rand_reset.1766634509 |
|
|
Feb 07 04:13:04 PM PST 24 |
Feb 07 04:17:04 PM PST 24 |
605063882 ps |
| T814 |
/workspace/coverage/cover_reg_top/26.xbar_access_same_device_slow_rsp.2689467066 |
|
|
Feb 07 04:14:12 PM PST 24 |
Feb 07 04:20:26 PM PST 24 |
21388714012 ps |
| T563 |
/workspace/coverage/cover_reg_top/97.xbar_random_large_delays.2226642401 |
|
|
Feb 07 04:24:47 PM PST 24 |
Feb 07 04:27:33 PM PST 24 |
14083521281 ps |
| T438 |
/workspace/coverage/cover_reg_top/49.xbar_same_source.2321366187 |
|
|
Feb 07 04:17:39 PM PST 24 |
Feb 07 04:18:16 PM PST 24 |
498107495 ps |
| T440 |
/workspace/coverage/cover_reg_top/23.xbar_access_same_device_slow_rsp.1173622708 |
|
|
Feb 07 04:13:39 PM PST 24 |
Feb 07 05:06:10 PM PST 24 |
160030378535 ps |
| T508 |
/workspace/coverage/cover_reg_top/23.xbar_unmapped_addr.1738105911 |
|
|
Feb 07 04:13:49 PM PST 24 |
Feb 07 04:14:28 PM PST 24 |
909204506 ps |
| T577 |
/workspace/coverage/cover_reg_top/17.chip_csr_mem_rw_with_rand_reset.4226068073 |
|
|
Feb 07 04:12:54 PM PST 24 |
Feb 07 04:17:52 PM PST 24 |
6572003965 ps |
| T517 |
/workspace/coverage/cover_reg_top/29.xbar_unmapped_addr.1164473744 |
|
|
Feb 07 04:14:31 PM PST 24 |
Feb 07 04:15:11 PM PST 24 |
281851187 ps |
| T580 |
/workspace/coverage/cover_reg_top/33.xbar_smoke_zero_delays.4219316553 |
|
|
Feb 07 04:15:04 PM PST 24 |
Feb 07 04:15:10 PM PST 24 |
46150109 ps |
| T642 |
/workspace/coverage/cover_reg_top/45.xbar_stress_all_with_error.1098882030 |
|
|
Feb 07 04:16:58 PM PST 24 |
Feb 07 04:26:14 PM PST 24 |
14138308665 ps |
| T645 |
/workspace/coverage/cover_reg_top/34.xbar_error_and_unmapped_addr.647588613 |
|
|
Feb 07 04:15:13 PM PST 24 |
Feb 07 04:15:49 PM PST 24 |
307395645 ps |
| T1330 |
/workspace/coverage/cover_reg_top/95.xbar_smoke_slow_rsp.88947815 |
|
|
Feb 07 04:24:19 PM PST 24 |
Feb 07 04:26:10 PM PST 24 |
6621299895 ps |
| T1331 |
/workspace/coverage/cover_reg_top/95.xbar_smoke.104981512 |
|
|
Feb 07 04:24:10 PM PST 24 |
Feb 07 04:24:18 PM PST 24 |
158374930 ps |
| T469 |
/workspace/coverage/cover_reg_top/84.xbar_access_same_device.608725630 |
|
|
Feb 07 04:22:38 PM PST 24 |
Feb 07 04:24:14 PM PST 24 |
1060041089 ps |
| T549 |
/workspace/coverage/cover_reg_top/32.xbar_random_zero_delays.2517784199 |
|
|
Feb 07 04:14:57 PM PST 24 |
Feb 07 04:15:40 PM PST 24 |
479749269 ps |
| T491 |
/workspace/coverage/cover_reg_top/79.xbar_random_zero_delays.3554685007 |
|
|
Feb 07 04:21:52 PM PST 24 |
Feb 07 04:22:44 PM PST 24 |
530462349 ps |
| T643 |
/workspace/coverage/cover_reg_top/75.xbar_error_random.1196816767 |
|
|
Feb 07 04:21:15 PM PST 24 |
Feb 07 04:22:34 PM PST 24 |
2086828749 ps |
| T462 |
/workspace/coverage/cover_reg_top/53.xbar_same_source.322460410 |
|
|
Feb 07 04:18:14 PM PST 24 |
Feb 07 04:18:26 PM PST 24 |
108461526 ps |
| T529 |
/workspace/coverage/cover_reg_top/29.xbar_random.129904195 |
|
|
Feb 07 04:14:23 PM PST 24 |
Feb 07 04:14:47 PM PST 24 |
270039796 ps |
| T439 |
/workspace/coverage/cover_reg_top/22.chip_tl_errors.906500546 |
|
|
Feb 07 04:13:39 PM PST 24 |
Feb 07 04:16:40 PM PST 24 |
3244826565 ps |
| T815 |
/workspace/coverage/cover_reg_top/61.xbar_access_same_device.2230905788 |
|
|
Feb 07 04:19:21 PM PST 24 |
Feb 07 04:19:44 PM PST 24 |
509116256 ps |
| T594 |
/workspace/coverage/cover_reg_top/70.xbar_stress_all_with_rand_reset.2280268810 |
|
|
Feb 07 04:20:39 PM PST 24 |
Feb 07 04:24:49 PM PST 24 |
645408233 ps |
| T1332 |
/workspace/coverage/cover_reg_top/48.xbar_smoke.3501743625 |
|
|
Feb 07 04:17:32 PM PST 24 |
Feb 07 04:17:39 PM PST 24 |
41664373 ps |
| T127 |
/workspace/coverage/cover_reg_top/18.chip_same_csr_outstanding.1916340623 |
|
|
Feb 07 04:12:55 PM PST 24 |
Feb 07 04:46:59 PM PST 24 |
17174472392 ps |
| T1333 |
/workspace/coverage/cover_reg_top/98.xbar_unmapped_addr.1731423310 |
|
|
Feb 07 04:25:07 PM PST 24 |
Feb 07 04:25:24 PM PST 24 |
66488444 ps |
| T436 |
/workspace/coverage/cover_reg_top/24.xbar_random_zero_delays.3826080391 |
|
|
Feb 07 04:13:49 PM PST 24 |
Feb 07 04:14:36 PM PST 24 |
482483665 ps |
| T511 |
/workspace/coverage/cover_reg_top/35.xbar_random_large_delays.1006298138 |
|
|
Feb 07 04:15:26 PM PST 24 |
Feb 07 04:31:34 PM PST 24 |
88840901968 ps |
| T1334 |
/workspace/coverage/cover_reg_top/5.xbar_smoke_slow_rsp.3771078732 |
|
|
Feb 07 04:11:54 PM PST 24 |
Feb 07 04:12:59 PM PST 24 |
3696564851 ps |
| T463 |
/workspace/coverage/cover_reg_top/11.xbar_access_same_device.179760236 |
|
|
Feb 07 04:12:26 PM PST 24 |
Feb 07 04:14:20 PM PST 24 |
2414604944 ps |
| T509 |
/workspace/coverage/cover_reg_top/87.xbar_stress_all_with_error.27780197 |
|
|
Feb 07 04:23:13 PM PST 24 |
Feb 07 04:30:00 PM PST 24 |
11570478841 ps |
| T1335 |
/workspace/coverage/cover_reg_top/67.xbar_smoke_large_delays.1492919427 |
|
|
Feb 07 04:20:18 PM PST 24 |
Feb 07 04:21:58 PM PST 24 |
9292299389 ps |
| T1336 |
/workspace/coverage/cover_reg_top/61.xbar_smoke.3693252853 |
|
|
Feb 07 04:19:28 PM PST 24 |
Feb 07 04:19:41 PM PST 24 |
219762384 ps |
| T504 |
/workspace/coverage/cover_reg_top/41.xbar_smoke_large_delays.498534453 |
|
|
Feb 07 04:16:19 PM PST 24 |
Feb 07 04:17:15 PM PST 24 |
5300036435 ps |
| T456 |
/workspace/coverage/cover_reg_top/10.xbar_stress_all.2618091970 |
|
|
Feb 07 04:12:09 PM PST 24 |
Feb 07 04:17:35 PM PST 24 |
3782659122 ps |
| T481 |
/workspace/coverage/cover_reg_top/80.xbar_random_large_delays.3929400805 |
|
|
Feb 07 04:22:00 PM PST 24 |
Feb 07 04:37:44 PM PST 24 |
86057545117 ps |
| T520 |
/workspace/coverage/cover_reg_top/48.xbar_access_same_device_slow_rsp.3469921535 |
|
|
Feb 07 04:17:27 PM PST 24 |
Feb 07 04:51:48 PM PST 24 |
111453208765 ps |
| T437 |
/workspace/coverage/cover_reg_top/21.chip_tl_errors.2809889036 |
|
|
Feb 07 04:13:27 PM PST 24 |
Feb 07 04:17:48 PM PST 24 |
3568001383 ps |
| T510 |
/workspace/coverage/cover_reg_top/81.xbar_random_large_delays.971132107 |
|
|
Feb 07 04:22:08 PM PST 24 |
Feb 07 04:35:58 PM PST 24 |
71777083678 ps |
| T1337 |
/workspace/coverage/cover_reg_top/29.xbar_error_and_unmapped_addr.3152194188 |
|
|
Feb 07 04:14:32 PM PST 24 |
Feb 07 04:14:59 PM PST 24 |
565637133 ps |
| T700 |
/workspace/coverage/cover_reg_top/54.xbar_stress_all_with_error.3259332527 |
|
|
Feb 07 04:18:30 PM PST 24 |
Feb 07 04:21:37 PM PST 24 |
1958087540 ps |
| T464 |
/workspace/coverage/cover_reg_top/90.xbar_smoke_slow_rsp.1711837651 |
|
|
Feb 07 04:23:41 PM PST 24 |
Feb 07 04:25:06 PM PST 24 |
4692293477 ps |
| T573 |
/workspace/coverage/cover_reg_top/30.xbar_random_zero_delays.2211591511 |
|
|
Feb 07 04:14:43 PM PST 24 |
Feb 07 04:15:08 PM PST 24 |
294553566 ps |
| T574 |
/workspace/coverage/cover_reg_top/87.xbar_random_slow_rsp.3886603347 |
|
|
Feb 07 04:23:26 PM PST 24 |
Feb 07 04:39:23 PM PST 24 |
46925562908 ps |
| T506 |
/workspace/coverage/cover_reg_top/76.xbar_random.1507212017 |
|
|
Feb 07 04:21:22 PM PST 24 |
Feb 07 04:22:18 PM PST 24 |
1367023793 ps |
| T1338 |
/workspace/coverage/cover_reg_top/93.xbar_smoke_slow_rsp.48918143 |
|
|
Feb 07 04:23:54 PM PST 24 |
Feb 07 04:25:45 PM PST 24 |
6262499085 ps |
| T459 |
/workspace/coverage/cover_reg_top/76.xbar_stress_all.903852922 |
|
|
Feb 07 04:21:22 PM PST 24 |
Feb 07 04:36:13 PM PST 24 |
20817049418 ps |
| T461 |
/workspace/coverage/cover_reg_top/92.xbar_unmapped_addr.3990329619 |
|
|
Feb 07 04:23:59 PM PST 24 |
Feb 07 04:24:54 PM PST 24 |
1218473439 ps |
| T1339 |
/workspace/coverage/cover_reg_top/73.xbar_smoke_zero_delays.3216487966 |
|
|
Feb 07 04:21:13 PM PST 24 |
Feb 07 04:21:20 PM PST 24 |
46506060 ps |
| T553 |
/workspace/coverage/cover_reg_top/97.xbar_stress_all_with_rand_reset.26468839 |
|
|
Feb 07 04:24:52 PM PST 24 |
Feb 07 04:26:42 PM PST 24 |
286169115 ps |
| T1340 |
/workspace/coverage/cover_reg_top/86.xbar_error_random.569392413 |
|
|
Feb 07 04:23:15 PM PST 24 |
Feb 07 04:24:47 PM PST 24 |
2595226321 ps |
| T583 |
/workspace/coverage/cover_reg_top/98.xbar_same_source.3757491562 |
|
|
Feb 07 04:25:07 PM PST 24 |
Feb 07 04:26:00 PM PST 24 |
1527193942 ps |
| T1341 |
/workspace/coverage/cover_reg_top/23.xbar_smoke_slow_rsp.1555676626 |
|
|
Feb 07 04:13:36 PM PST 24 |
Feb 07 04:14:58 PM PST 24 |
5530745088 ps |
| T1342 |
/workspace/coverage/cover_reg_top/51.xbar_error_random.1328980784 |
|
|
Feb 07 04:18:04 PM PST 24 |
Feb 07 04:18:35 PM PST 24 |
389634010 ps |
| T515 |
/workspace/coverage/cover_reg_top/10.xbar_random_large_delays.2129756676 |
|
|
Feb 07 04:12:07 PM PST 24 |
Feb 07 04:26:45 PM PST 24 |
80390570677 ps |
| T128 |
/workspace/coverage/cover_reg_top/3.chip_same_csr_outstanding.369233569 |
|
|
Feb 07 04:11:43 PM PST 24 |
Feb 07 05:17:38 PM PST 24 |
29338987726 ps |
| T465 |
/workspace/coverage/cover_reg_top/97.xbar_stress_all.526670645 |
|
|
Feb 07 04:24:49 PM PST 24 |
Feb 07 04:27:06 PM PST 24 |
1748183003 ps |
| T1343 |
/workspace/coverage/cover_reg_top/57.xbar_stress_all_with_error.2225317628 |
|
|
Feb 07 04:18:50 PM PST 24 |
Feb 07 04:23:39 PM PST 24 |
6920844709 ps |
| T516 |
/workspace/coverage/cover_reg_top/98.xbar_random_slow_rsp.4033377441 |
|
|
Feb 07 04:24:57 PM PST 24 |
Feb 07 04:34:22 PM PST 24 |
29418522508 ps |
| T512 |
/workspace/coverage/cover_reg_top/22.xbar_stress_all.3041553814 |
|
|
Feb 07 04:13:32 PM PST 24 |
Feb 07 04:20:10 PM PST 24 |
10351187865 ps |
| T1344 |
/workspace/coverage/cover_reg_top/74.xbar_smoke_large_delays.283782003 |
|
|
Feb 07 04:21:00 PM PST 24 |
Feb 07 04:22:56 PM PST 24 |
11515213174 ps |
| T801 |
/workspace/coverage/cover_reg_top/31.xbar_access_same_device_slow_rsp.575773227 |
|
|
Feb 07 04:14:53 PM PST 24 |
Feb 07 04:28:51 PM PST 24 |
51973951278 ps |
| T589 |
/workspace/coverage/cover_reg_top/91.xbar_smoke_slow_rsp.3805590802 |
|
|
Feb 07 04:23:40 PM PST 24 |
Feb 07 04:25:06 PM PST 24 |
4660560543 ps |
| T1345 |
/workspace/coverage/cover_reg_top/56.xbar_error_random.3710546896 |
|
|
Feb 07 04:18:42 PM PST 24 |
Feb 07 04:19:11 PM PST 24 |
312433763 ps |
| T521 |
/workspace/coverage/cover_reg_top/40.xbar_random_slow_rsp.2184368181 |
|
|
Feb 07 04:16:18 PM PST 24 |
Feb 07 04:37:01 PM PST 24 |
65206557846 ps |
| T1346 |
/workspace/coverage/cover_reg_top/62.xbar_error_and_unmapped_addr.4105513131 |
|
|
Feb 07 04:19:36 PM PST 24 |
Feb 07 04:20:38 PM PST 24 |
1376468992 ps |
| T644 |
/workspace/coverage/cover_reg_top/0.chip_csr_bit_bash.3121714571 |
|
|
Feb 07 04:11:23 PM PST 24 |
Feb 07 04:30:01 PM PST 24 |
9550564826 ps |
| T490 |
/workspace/coverage/cover_reg_top/45.xbar_random_zero_delays.3742396522 |
|
|
Feb 07 04:16:56 PM PST 24 |
Feb 07 04:17:12 PM PST 24 |
132094297 ps |
| T809 |
/workspace/coverage/cover_reg_top/16.xbar_access_same_device.3683046687 |
|
|
Feb 07 04:12:27 PM PST 24 |
Feb 07 04:14:05 PM PST 24 |
2155484692 ps |
| T1347 |
/workspace/coverage/cover_reg_top/7.xbar_access_same_device_slow_rsp.4192999994 |
|
|
Feb 07 04:12:06 PM PST 24 |
Feb 07 04:21:43 PM PST 24 |
34700853534 ps |
| T1348 |
/workspace/coverage/cover_reg_top/94.xbar_random_zero_delays.3249601626 |
|
|
Feb 07 04:24:14 PM PST 24 |
Feb 07 04:24:28 PM PST 24 |
132694529 ps |
| T478 |
/workspace/coverage/cover_reg_top/90.xbar_same_source.45467521 |
|
|
Feb 07 04:23:36 PM PST 24 |
Feb 07 04:24:06 PM PST 24 |
385402574 ps |
| T561 |
/workspace/coverage/cover_reg_top/23.xbar_random_zero_delays.1380614534 |
|
|
Feb 07 04:13:38 PM PST 24 |
Feb 07 04:13:58 PM PST 24 |
197393226 ps |
| T470 |
/workspace/coverage/cover_reg_top/44.xbar_random_large_delays.2938567710 |
|
|
Feb 07 04:16:55 PM PST 24 |
Feb 07 04:36:32 PM PST 24 |
93120778830 ps |
| T1349 |
/workspace/coverage/cover_reg_top/92.xbar_smoke.207024020 |
|
|
Feb 07 04:23:47 PM PST 24 |
Feb 07 04:23:57 PM PST 24 |
211693265 ps |
| T802 |
/workspace/coverage/cover_reg_top/14.xbar_access_same_device_slow_rsp.1353247785 |
|
|
Feb 07 04:12:36 PM PST 24 |
Feb 07 04:22:52 PM PST 24 |
35155267264 ps |
| T593 |
/workspace/coverage/cover_reg_top/5.xbar_smoke_large_delays.2244329719 |
|
|
Feb 07 04:11:53 PM PST 24 |
Feb 07 04:13:28 PM PST 24 |
8622805696 ps |
| T479 |
/workspace/coverage/cover_reg_top/8.xbar_same_source.1285505558 |
|
|
Feb 07 04:12:01 PM PST 24 |
Feb 07 04:12:57 PM PST 24 |
1790256775 ps |
| T1350 |
/workspace/coverage/cover_reg_top/0.xbar_smoke_zero_delays.3430386448 |
|
|
Feb 07 04:11:19 PM PST 24 |
Feb 07 04:11:25 PM PST 24 |
39649664 ps |
| T49 |
/workspace/coverage/cover_reg_top/1.chip_csr_hw_reset.1124562656 |
|
|
Feb 07 04:11:40 PM PST 24 |
Feb 07 04:17:06 PM PST 24 |
5810985655 ps |
| T449 |
/workspace/coverage/cover_reg_top/80.xbar_stress_all_with_rand_reset.1766525595 |
|
|
Feb 07 04:22:12 PM PST 24 |
Feb 07 04:39:09 PM PST 24 |
6892476055 ps |
| T534 |
/workspace/coverage/cover_reg_top/2.xbar_random_slow_rsp.602890923 |
|
|
Feb 07 04:11:37 PM PST 24 |
Feb 07 04:28:25 PM PST 24 |
57754880792 ps |
| T555 |
/workspace/coverage/cover_reg_top/1.xbar_random.1521939349 |
|
|
Feb 07 04:11:42 PM PST 24 |
Feb 07 04:12:16 PM PST 24 |
360112823 ps |
| T513 |
/workspace/coverage/cover_reg_top/2.xbar_stress_all_with_rand_reset.619515701 |
|
|
Feb 07 04:11:42 PM PST 24 |
Feb 07 04:15:45 PM PST 24 |
5160239610 ps |
| T807 |
/workspace/coverage/cover_reg_top/6.xbar_stress_all_with_error.3167433059 |
|
|
Feb 07 04:11:51 PM PST 24 |
Feb 07 04:14:03 PM PST 24 |
3608007992 ps |
| T1351 |
/workspace/coverage/cover_reg_top/58.xbar_smoke_slow_rsp.694199129 |
|
|
Feb 07 04:18:55 PM PST 24 |
Feb 07 04:20:29 PM PST 24 |
5557617172 ps |
| T1352 |
/workspace/coverage/cover_reg_top/98.xbar_smoke_zero_delays.1540081147 |
|
|
Feb 07 04:24:55 PM PST 24 |
Feb 07 04:25:02 PM PST 24 |
45113953 ps |
| T313 |
/workspace/coverage/cover_reg_top/2.chip_csr_rw.4262212221 |
|
|
Feb 07 04:11:41 PM PST 24 |
Feb 07 04:17:00 PM PST 24 |
3962935408 ps |
| T1353 |
/workspace/coverage/cover_reg_top/95.xbar_smoke_large_delays.1076178745 |
|
|
Feb 07 04:24:20 PM PST 24 |
Feb 07 04:25:53 PM PST 24 |
9055383065 ps |
| T816 |
/workspace/coverage/cover_reg_top/36.xbar_access_same_device.519983767 |
|
|
Feb 07 04:15:47 PM PST 24 |
Feb 07 04:16:40 PM PST 24 |
1061978986 ps |
| T1354 |
/workspace/coverage/cover_reg_top/30.xbar_error_random.1598717808 |
|
|
Feb 07 04:14:40 PM PST 24 |
Feb 07 04:15:30 PM PST 24 |
1398989550 ps |
| T1355 |
/workspace/coverage/cover_reg_top/70.xbar_smoke.3598305163 |
|
|
Feb 07 04:20:34 PM PST 24 |
Feb 07 04:20:42 PM PST 24 |
168556816 ps |
| T1356 |
/workspace/coverage/cover_reg_top/90.xbar_error_and_unmapped_addr.164089102 |
|
|
Feb 07 04:23:59 PM PST 24 |
Feb 07 04:24:36 PM PST 24 |
949698455 ps |
| T1357 |
/workspace/coverage/cover_reg_top/45.xbar_error_random.401428742 |
|
|
Feb 07 04:16:56 PM PST 24 |
Feb 07 04:17:11 PM PST 24 |
327108409 ps |
| T856 |
/workspace/coverage/cover_reg_top/69.xbar_stress_all_with_reset_error.4233975927 |
|
|
Feb 07 04:20:36 PM PST 24 |
Feb 07 04:22:24 PM PST 24 |
1180901053 ps |
| T1358 |
/workspace/coverage/cover_reg_top/12.xbar_error_random.4190360528 |
|
|
Feb 07 04:12:38 PM PST 24 |
Feb 07 04:13:17 PM PST 24 |
1026380830 ps |
| T838 |
/workspace/coverage/cover_reg_top/46.xbar_stress_all_with_rand_reset.1281970817 |
|
|
Feb 07 04:17:17 PM PST 24 |
Feb 07 04:19:36 PM PST 24 |
317854216 ps |
| T485 |
/workspace/coverage/cover_reg_top/55.xbar_random_large_delays.242718385 |
|
|
Feb 07 04:18:35 PM PST 24 |
Feb 07 04:36:57 PM PST 24 |
97868388419 ps |
| T451 |
/workspace/coverage/cover_reg_top/7.xbar_random_zero_delays.4236306730 |
|
|
Feb 07 04:11:59 PM PST 24 |
Feb 07 04:12:47 PM PST 24 |
495239887 ps |
| T551 |
/workspace/coverage/cover_reg_top/19.xbar_random_slow_rsp.3428866177 |
|
|
Feb 07 04:13:01 PM PST 24 |
Feb 07 04:30:31 PM PST 24 |
54339734243 ps |
| T1359 |
/workspace/coverage/cover_reg_top/1.xbar_error_random.4210477902 |
|
|
Feb 07 04:11:26 PM PST 24 |
Feb 07 04:12:42 PM PST 24 |
2298991826 ps |
| T841 |
/workspace/coverage/cover_reg_top/9.xbar_stress_all_with_reset_error.2141712244 |
|
|
Feb 07 04:12:04 PM PST 24 |
Feb 07 04:14:47 PM PST 24 |
959176641 ps |
| T1360 |
/workspace/coverage/cover_reg_top/94.xbar_smoke_zero_delays.868083489 |
|
|
Feb 07 04:24:06 PM PST 24 |
Feb 07 04:24:13 PM PST 24 |
51915481 ps |
| T1361 |
/workspace/coverage/cover_reg_top/91.xbar_error_random.1064924209 |
|
|
Feb 07 04:23:45 PM PST 24 |
Feb 07 04:24:19 PM PST 24 |
430446128 ps |
| T1362 |
/workspace/coverage/cover_reg_top/21.xbar_smoke.2548675125 |
|
|
Feb 07 04:13:32 PM PST 24 |
Feb 07 04:13:42 PM PST 24 |
213945537 ps |
| T810 |
/workspace/coverage/cover_reg_top/49.xbar_access_same_device_slow_rsp.4042651490 |
|
|
Feb 07 04:17:41 PM PST 24 |
Feb 07 04:44:00 PM PST 24 |
79360850081 ps |
| T476 |
/workspace/coverage/cover_reg_top/53.xbar_stress_all.1871275719 |
|
|
Feb 07 04:18:19 PM PST 24 |
Feb 07 04:24:41 PM PST 24 |
9266997308 ps |
| T1363 |
/workspace/coverage/cover_reg_top/69.xbar_smoke_slow_rsp.3499250731 |
|
|
Feb 07 04:20:21 PM PST 24 |
Feb 07 04:22:03 PM PST 24 |
5805118856 ps |
| T634 |
/workspace/coverage/cover_reg_top/45.xbar_stress_all_with_rand_reset.3436818965 |
|
|
Feb 07 04:17:15 PM PST 24 |
Feb 07 04:20:20 PM PST 24 |
500826457 ps |
| T1364 |
/workspace/coverage/cover_reg_top/87.xbar_smoke_zero_delays.3576499264 |
|
|
Feb 07 04:23:16 PM PST 24 |
Feb 07 04:23:25 PM PST 24 |
47029083 ps |
| T596 |
/workspace/coverage/cover_reg_top/31.xbar_same_source.4018882552 |
|
|
Feb 07 04:14:50 PM PST 24 |
Feb 07 04:15:27 PM PST 24 |
434958686 ps |
| T609 |
/workspace/coverage/cover_reg_top/18.xbar_same_source.2232997124 |
|
|
Feb 07 04:13:01 PM PST 24 |
Feb 07 04:13:41 PM PST 24 |
502712115 ps |
| T818 |
/workspace/coverage/cover_reg_top/98.xbar_stress_all_with_error.2862326839 |
|
|
Feb 07 04:25:02 PM PST 24 |
Feb 07 04:26:46 PM PST 24 |
1198526347 ps |
| T820 |
/workspace/coverage/cover_reg_top/62.xbar_access_same_device.2022115893 |
|
|
Feb 07 04:19:32 PM PST 24 |
Feb 07 04:20:11 PM PST 24 |
574492915 ps |
| T1365 |
/workspace/coverage/cover_reg_top/62.xbar_smoke_zero_delays.829484404 |
|
|
Feb 07 04:19:30 PM PST 24 |
Feb 07 04:19:38 PM PST 24 |
49352785 ps |
| T805 |
/workspace/coverage/cover_reg_top/91.xbar_access_same_device_slow_rsp.2329164370 |
|
|
Feb 07 04:23:47 PM PST 24 |
Feb 07 05:08:39 PM PST 24 |
145104104508 ps |
| T1366 |
/workspace/coverage/cover_reg_top/14.xbar_smoke_large_delays.2508583834 |
|
|
Feb 07 04:12:39 PM PST 24 |
Feb 07 04:13:56 PM PST 24 |
7078739757 ps |
| T847 |
/workspace/coverage/cover_reg_top/33.xbar_stress_all_with_reset_error.2552437816 |
|
|
Feb 07 04:15:05 PM PST 24 |
Feb 07 04:18:18 PM PST 24 |
2627293235 ps |
| T625 |
/workspace/coverage/cover_reg_top/14.xbar_random.399022923 |
|
|
Feb 07 04:12:40 PM PST 24 |
Feb 07 04:13:24 PM PST 24 |
468135665 ps |
| T1367 |
/workspace/coverage/cover_reg_top/36.xbar_smoke_large_delays.1731543495 |
|
|
Feb 07 04:15:36 PM PST 24 |
Feb 07 04:16:52 PM PST 24 |
6623242146 ps |
| T526 |
/workspace/coverage/cover_reg_top/15.xbar_stress_all_with_rand_reset.1662756582 |
|
|
Feb 07 04:12:28 PM PST 24 |
Feb 07 04:24:03 PM PST 24 |
10002850388 ps |
| T614 |
/workspace/coverage/cover_reg_top/23.xbar_smoke_large_delays.381155476 |
|
|
Feb 07 04:13:33 PM PST 24 |
Feb 07 04:14:50 PM PST 24 |
7505181379 ps |
| T1368 |
/workspace/coverage/cover_reg_top/38.xbar_smoke_zero_delays.1676984733 |
|
|
Feb 07 04:15:55 PM PST 24 |
Feb 07 04:16:01 PM PST 24 |
49141067 ps |
| T812 |
/workspace/coverage/cover_reg_top/98.xbar_access_same_device_slow_rsp.46164162 |
|
|
Feb 07 04:24:56 PM PST 24 |
Feb 07 05:05:07 PM PST 24 |
124269454049 ps |
| T1369 |
/workspace/coverage/cover_reg_top/0.xbar_error_and_unmapped_addr.1850752531 |
|
|
Feb 07 04:11:37 PM PST 24 |
Feb 07 04:12:18 PM PST 24 |
1032927297 ps |
| T1370 |
/workspace/coverage/cover_reg_top/25.xbar_access_same_device_slow_rsp.3435608217 |
|
|
Feb 07 04:13:56 PM PST 24 |
Feb 07 04:24:50 PM PST 24 |
37494690953 ps |
| T1371 |
/workspace/coverage/cover_reg_top/36.xbar_random_large_delays.2403079673 |
|
|
Feb 07 04:15:37 PM PST 24 |
Feb 07 04:19:28 PM PST 24 |
18597130721 ps |
| T575 |
/workspace/coverage/cover_reg_top/58.xbar_random.2351667381 |
|
|
Feb 07 04:18:54 PM PST 24 |
Feb 07 04:19:18 PM PST 24 |
228691167 ps |
| T353 |
/workspace/coverage/cover_reg_top/0.chip_same_csr_outstanding.1531072117 |
|
|
Feb 07 04:11:25 PM PST 24 |
Feb 07 05:21:33 PM PST 24 |
31004752860 ps |
| T808 |
/workspace/coverage/cover_reg_top/61.xbar_access_same_device_slow_rsp.57115811 |
|
|
Feb 07 04:19:15 PM PST 24 |
Feb 07 04:26:40 PM PST 24 |
22775132802 ps |
| T804 |
/workspace/coverage/cover_reg_top/56.xbar_stress_all_with_error.3633827630 |
|
|
Feb 07 04:18:48 PM PST 24 |
Feb 07 04:23:19 PM PST 24 |
6398525762 ps |
| T1372 |
/workspace/coverage/cover_reg_top/52.xbar_error_random.188414803 |
|
|
Feb 07 04:18:07 PM PST 24 |
Feb 07 04:19:00 PM PST 24 |
1544215877 ps |
| T524 |
/workspace/coverage/cover_reg_top/26.xbar_random_zero_delays.2531922213 |
|
|
Feb 07 04:14:16 PM PST 24 |
Feb 07 04:15:05 PM PST 24 |
498515873 ps |
| T1373 |
/workspace/coverage/cover_reg_top/9.xbar_random.385326235 |
|
|
Feb 07 04:12:12 PM PST 24 |
Feb 07 04:12:19 PM PST 24 |
85175374 ps |
| T1374 |
/workspace/coverage/cover_reg_top/2.xbar_smoke_zero_delays.722781615 |
|
|
Feb 07 04:11:41 PM PST 24 |
Feb 07 04:11:48 PM PST 24 |
46654697 ps |
| T494 |
/workspace/coverage/cover_reg_top/69.xbar_random_large_delays.2406490553 |
|
|
Feb 07 04:20:20 PM PST 24 |
Feb 07 04:34:19 PM PST 24 |
75434782793 ps |
| T1375 |
/workspace/coverage/cover_reg_top/6.xbar_error_and_unmapped_addr.86235183 |
|
|
Feb 07 04:11:53 PM PST 24 |
Feb 07 04:12:10 PM PST 24 |
385285404 ps |
| T453 |
/workspace/coverage/cover_reg_top/99.xbar_stress_all.4212329285 |
|
|
Feb 07 04:25:03 PM PST 24 |
Feb 07 04:32:25 PM PST 24 |
11639675980 ps |
| T497 |
/workspace/coverage/cover_reg_top/13.xbar_stress_all.2496949667 |
|
|
Feb 07 04:12:25 PM PST 24 |
Feb 07 04:15:16 PM PST 24 |
3740365397 ps |
| T830 |
/workspace/coverage/cover_reg_top/37.xbar_stress_all_with_rand_reset.4204889635 |
|
|
Feb 07 04:15:52 PM PST 24 |
Feb 07 04:18:08 PM PST 24 |
699574189 ps |
| T565 |
/workspace/coverage/cover_reg_top/39.xbar_smoke.3746410276 |
|
|
Feb 07 04:16:02 PM PST 24 |
Feb 07 04:16:15 PM PST 24 |
251215400 ps |
| T1376 |
/workspace/coverage/cover_reg_top/39.xbar_random_slow_rsp.2736135432 |
|
|
Feb 07 04:16:13 PM PST 24 |
Feb 07 04:18:26 PM PST 24 |
7034080129 ps |
| T1377 |
/workspace/coverage/cover_reg_top/25.xbar_error_random.1080930509 |
|
|
Feb 07 04:14:06 PM PST 24 |
Feb 07 04:14:20 PM PST 24 |
293050919 ps |
| T1378 |
/workspace/coverage/cover_reg_top/14.xbar_error_and_unmapped_addr.2141039676 |
|
|
Feb 07 04:12:40 PM PST 24 |
Feb 07 04:12:55 PM PST 24 |
86620512 ps |
| T1379 |
/workspace/coverage/cover_reg_top/78.xbar_smoke_zero_delays.1724839488 |
|
|
Feb 07 04:21:41 PM PST 24 |
Feb 07 04:21:48 PM PST 24 |
43670385 ps |
| T819 |
/workspace/coverage/cover_reg_top/16.xbar_stress_all_with_error.1363887308 |
|
|
Feb 07 04:12:28 PM PST 24 |
Feb 07 04:19:37 PM PST 24 |
11223322261 ps |
| T354 |
/workspace/coverage/cover_reg_top/9.chip_same_csr_outstanding.3054312156 |
|
|
Feb 07 04:12:03 PM PST 24 |
Feb 07 05:12:15 PM PST 24 |
28530611200 ps |
| T1380 |
/workspace/coverage/cover_reg_top/22.xbar_stress_all_with_error.3587723099 |
|
|
Feb 07 04:13:33 PM PST 24 |
Feb 07 04:19:34 PM PST 24 |
10335014430 ps |
| T489 |
/workspace/coverage/cover_reg_top/14.xbar_random_slow_rsp.2142390474 |
|
|
Feb 07 04:12:39 PM PST 24 |
Feb 07 04:25:01 PM PST 24 |
39738080498 ps |
| T1381 |
/workspace/coverage/cover_reg_top/3.xbar_smoke_zero_delays.1713434174 |
|
|
Feb 07 04:11:47 PM PST 24 |
Feb 07 04:11:53 PM PST 24 |
45498373 ps |
| T1382 |
/workspace/coverage/cover_reg_top/35.xbar_smoke_slow_rsp.2866593018 |
|
|
Feb 07 04:15:26 PM PST 24 |
Feb 07 04:17:01 PM PST 24 |
5450825972 ps |
| T530 |
/workspace/coverage/cover_reg_top/21.xbar_stress_all.3640471830 |
|
|
Feb 07 04:13:39 PM PST 24 |
Feb 07 04:18:12 PM PST 24 |
6861132738 ps |
| T1383 |
/workspace/coverage/cover_reg_top/91.xbar_random_slow_rsp.1673529987 |
|
|
Feb 07 04:23:51 PM PST 24 |
Feb 07 04:30:52 PM PST 24 |
22965851251 ps |
| T539 |
/workspace/coverage/cover_reg_top/27.xbar_random_large_delays.289233199 |
|
|
Feb 07 04:14:19 PM PST 24 |
Feb 07 04:25:27 PM PST 24 |
62021441022 ps |
| T824 |
/workspace/coverage/cover_reg_top/70.xbar_access_same_device_slow_rsp.1902389605 |
|
|
Feb 07 04:20:34 PM PST 24 |
Feb 07 04:37:14 PM PST 24 |
57160316445 ps |
| T1384 |
/workspace/coverage/cover_reg_top/88.xbar_stress_all_with_error.1456630164 |
|
|
Feb 07 04:23:38 PM PST 24 |
Feb 07 04:27:30 PM PST 24 |
7045177511 ps |
| T503 |
/workspace/coverage/cover_reg_top/30.xbar_random_large_delays.4018449474 |
|
|
Feb 07 04:14:40 PM PST 24 |
Feb 07 04:33:38 PM PST 24 |
103919824676 ps |
| T527 |
/workspace/coverage/cover_reg_top/47.xbar_same_source.2275356034 |
|
|
Feb 07 04:17:27 PM PST 24 |
Feb 07 04:18:11 PM PST 24 |
1539706029 ps |
| T1385 |
/workspace/coverage/cover_reg_top/45.xbar_smoke_large_delays.267229829 |
|
|
Feb 07 04:17:15 PM PST 24 |
Feb 07 04:18:24 PM PST 24 |
6830397931 ps |
| T1386 |
/workspace/coverage/cover_reg_top/42.xbar_smoke_slow_rsp.3051650760 |
|
|
Feb 07 04:16:27 PM PST 24 |
Feb 07 04:18:01 PM PST 24 |
5068048449 ps |
| T443 |
/workspace/coverage/cover_reg_top/66.xbar_access_same_device.2730996842 |
|
|
Feb 07 04:20:04 PM PST 24 |
Feb 07 04:21:18 PM PST 24 |
906584030 ps |
| T495 |
/workspace/coverage/cover_reg_top/74.xbar_random.1902535885 |
|
|
Feb 07 04:21:00 PM PST 24 |
Feb 07 04:22:04 PM PST 24 |
1737150635 ps |
| T635 |
/workspace/coverage/cover_reg_top/90.xbar_random_large_delays.4238611733 |
|
|
Feb 07 04:24:00 PM PST 24 |
Feb 07 04:35:43 PM PST 24 |
59892155544 ps |
| T1387 |
/workspace/coverage/cover_reg_top/68.xbar_access_same_device.146000688 |
|
|
Feb 07 04:20:15 PM PST 24 |
Feb 07 04:21:00 PM PST 24 |
1228256621 ps |
| T1388 |
/workspace/coverage/cover_reg_top/9.xbar_smoke_zero_delays.851261651 |
|
|
Feb 07 04:12:04 PM PST 24 |
Feb 07 04:12:10 PM PST 24 |
46543303 ps |
| T1389 |
/workspace/coverage/cover_reg_top/32.xbar_access_same_device.2423884459 |
|
|
Feb 07 04:15:05 PM PST 24 |
Feb 07 04:15:22 PM PST 24 |
379899384 ps |
| T1390 |
/workspace/coverage/cover_reg_top/40.xbar_smoke_slow_rsp.36045875 |
|
|
Feb 07 04:16:15 PM PST 24 |
Feb 07 04:18:00 PM PST 24 |
5574769852 ps |
| T557 |
/workspace/coverage/cover_reg_top/49.xbar_smoke_zero_delays.1021836195 |
|
|
Feb 07 04:17:34 PM PST 24 |
Feb 07 04:17:42 PM PST 24 |
56608571 ps |
| T1391 |
/workspace/coverage/cover_reg_top/93.xbar_error_random.1703571842 |
|
|
Feb 07 04:24:07 PM PST 24 |
Feb 07 04:24:21 PM PST 24 |
306079112 ps |
| T1392 |
/workspace/coverage/cover_reg_top/29.xbar_smoke_large_delays.3651843999 |
|
|
Feb 07 04:14:24 PM PST 24 |
Feb 07 04:16:19 PM PST 24 |
9972438329 ps |
| T482 |
/workspace/coverage/cover_reg_top/19.xbar_stress_all.329651745 |
|
|
Feb 07 04:13:13 PM PST 24 |
Feb 07 04:19:06 PM PST 24 |
10670770368 ps |
| T498 |
/workspace/coverage/cover_reg_top/55.xbar_stress_all_with_reset_error.3689760211 |
|
|
Feb 07 04:18:34 PM PST 24 |
Feb 07 04:27:41 PM PST 24 |
11741086602 ps |
| T1393 |
/workspace/coverage/cover_reg_top/10.xbar_stress_all_with_error.1534937717 |
|
|
Feb 07 04:12:12 PM PST 24 |
Feb 07 04:13:20 PM PST 24 |
1977663154 ps |
| T554 |
/workspace/coverage/cover_reg_top/96.xbar_random_slow_rsp.1832146157 |
|
|
Feb 07 04:24:29 PM PST 24 |
Feb 07 04:44:57 PM PST 24 |
63490260214 ps |
| T385 |
/workspace/coverage/cover_reg_top/1.chip_csr_aliasing.3147537699 |
|
|
Feb 07 04:11:38 PM PST 24 |
Feb 07 05:56:15 PM PST 24 |
35923895992 ps |
| T408 |
/workspace/coverage/cover_reg_top/8.chip_csr_rw.303157624 |
|
|
Feb 07 04:12:08 PM PST 24 |
Feb 07 04:18:11 PM PST 24 |
3872213918 ps |
| T1394 |
/workspace/coverage/cover_reg_top/85.xbar_random_large_delays.4166854209 |
|
|
Feb 07 04:23:01 PM PST 24 |
Feb 07 04:27:00 PM PST 24 |
21321230191 ps |
| T471 |
/workspace/coverage/cover_reg_top/28.xbar_random_slow_rsp.1751035372 |
|
|
Feb 07 04:14:26 PM PST 24 |
Feb 07 04:32:41 PM PST 24 |
56136563242 ps |
| T452 |
/workspace/coverage/cover_reg_top/81.xbar_stress_all_with_rand_reset.65817083 |
|
|
Feb 07 04:22:15 PM PST 24 |
Feb 07 04:32:15 PM PST 24 |
4573583162 ps |
| T1395 |
/workspace/coverage/cover_reg_top/10.xbar_smoke.3887602365 |
|
|
Feb 07 04:12:11 PM PST 24 |
Feb 07 04:12:18 PM PST 24 |
47972256 ps |
| T445 |
/workspace/coverage/cover_reg_top/58.xbar_smoke.3878513295 |
|
|
Feb 07 04:18:57 PM PST 24 |
Feb 07 04:19:06 PM PST 24 |
208003061 ps |
| T1396 |
/workspace/coverage/cover_reg_top/0.xbar_stress_all_with_error.1147037349 |
|
|
Feb 07 04:11:36 PM PST 24 |
Feb 07 04:17:23 PM PST 24 |
9665714632 ps |
| T502 |
/workspace/coverage/cover_reg_top/17.xbar_random_large_delays.3063126347 |
|
|
Feb 07 04:12:49 PM PST 24 |
Feb 07 04:26:50 PM PST 24 |
80146024203 ps |
| T421 |
/workspace/coverage/cover_reg_top/3.chip_csr_rw.3934780307 |
|
|
Feb 07 04:11:59 PM PST 24 |
Feb 07 04:20:28 PM PST 24 |
4922688545 ps |
| T454 |
/workspace/coverage/cover_reg_top/9.chip_tl_errors.3041486947 |
|
|
Feb 07 04:12:07 PM PST 24 |
Feb 07 04:14:44 PM PST 24 |
2848890054 ps |
| T1397 |
/workspace/coverage/cover_reg_top/64.xbar_stress_all_with_rand_reset.744381767 |
|
|
Feb 07 04:19:40 PM PST 24 |
Feb 07 04:19:59 PM PST 24 |
38338559 ps |
| T1398 |
/workspace/coverage/cover_reg_top/44.xbar_access_same_device.3707756959 |
|
|
Feb 07 04:16:48 PM PST 24 |
Feb 07 04:18:15 PM PST 24 |
963281922 ps |
| T533 |
/workspace/coverage/cover_reg_top/7.xbar_stress_all.1431771782 |
|
|
Feb 07 04:12:02 PM PST 24 |
Feb 07 04:13:35 PM PST 24 |
1298223884 ps |
| T1399 |
/workspace/coverage/cover_reg_top/87.xbar_error_and_unmapped_addr.762590126 |
|
|
Feb 07 04:23:16 PM PST 24 |
Feb 07 04:23:44 PM PST 24 |
538890580 ps |
| T1400 |
/workspace/coverage/cover_reg_top/13.xbar_access_same_device.2431007598 |
|
|
Feb 07 04:12:16 PM PST 24 |
Feb 07 04:12:40 PM PST 24 |
314899773 ps |
| T1401 |
/workspace/coverage/cover_reg_top/99.xbar_random_large_delays.4043128401 |
|
|
Feb 07 04:24:55 PM PST 24 |
Feb 07 04:41:36 PM PST 24 |
87939932123 ps |
| T1402 |
/workspace/coverage/cover_reg_top/88.xbar_smoke_large_delays.3964497132 |
|
|
Feb 07 04:23:19 PM PST 24 |
Feb 07 04:24:31 PM PST 24 |
7168924944 ps |
| T1403 |
/workspace/coverage/cover_reg_top/42.xbar_smoke_zero_delays.3019382073 |
|
|
Feb 07 04:16:24 PM PST 24 |
Feb 07 04:16:33 PM PST 24 |
44180379 ps |
| T441 |
/workspace/coverage/cover_reg_top/3.chip_tl_errors.2518557783 |
|
|
Feb 07 04:12:01 PM PST 24 |
Feb 07 04:16:37 PM PST 24 |
4026068962 ps |
| T548 |
/workspace/coverage/cover_reg_top/3.xbar_same_source.1220631986 |
|
|
Feb 07 04:11:48 PM PST 24 |
Feb 07 04:13:02 PM PST 24 |
2504263133 ps |
| T586 |
/workspace/coverage/cover_reg_top/50.xbar_same_source.1127936059 |
|
|
Feb 07 04:17:50 PM PST 24 |
Feb 07 04:18:38 PM PST 24 |
547399844 ps |
| T444 |
/workspace/coverage/cover_reg_top/82.xbar_stress_all_with_error.94549338 |
|
|
Feb 07 04:22:20 PM PST 24 |
Feb 07 04:24:15 PM PST 24 |
1747610215 ps |
| T1404 |
/workspace/coverage/cover_reg_top/89.xbar_error_random.1267285310 |
|
|
Feb 07 04:23:34 PM PST 24 |
Feb 07 04:23:45 PM PST 24 |
92677920 ps |
| T545 |
/workspace/coverage/cover_reg_top/85.xbar_unmapped_addr.3653842802 |
|
|
Feb 07 04:22:58 PM PST 24 |
Feb 07 04:23:51 PM PST 24 |
1140825991 ps |
| T1405 |
/workspace/coverage/cover_reg_top/39.xbar_smoke_slow_rsp.2367315372 |
|
|
Feb 07 04:16:09 PM PST 24 |
Feb 07 04:17:48 PM PST 24 |
5399579175 ps |
| T832 |
/workspace/coverage/cover_reg_top/92.xbar_stress_all_with_reset_error.1949049893 |
|
|
Feb 07 04:23:54 PM PST 24 |
Feb 07 04:43:31 PM PST 24 |
8839829041 ps |