| T796 |
/workspace/coverage/default/7.chip_sw_alert_handler_lpg_sleep_mode_alerts.2512335937 |
|
|
Feb 07 05:00:08 PM PST 24 |
Feb 07 05:06:59 PM PST 24 |
3745844848 ps |
| T1136 |
/workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.980156867 |
|
|
Feb 07 04:50:56 PM PST 24 |
Feb 07 05:06:34 PM PST 24 |
10867587185 ps |
| T1137 |
/workspace/coverage/default/1.chip_sw_entropy_src_kat_test.2334437388 |
|
|
Feb 07 04:41:59 PM PST 24 |
Feb 07 04:44:44 PM PST 24 |
3026412104 ps |
| T786 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.2596189522 |
|
|
Feb 07 05:02:22 PM PST 24 |
Feb 07 05:09:43 PM PST 24 |
3975032780 ps |
| T1138 |
/workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.1349709777 |
|
|
Feb 07 04:48:44 PM PST 24 |
Feb 07 05:14:08 PM PST 24 |
10316654151 ps |
| T1139 |
/workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.1003321043 |
|
|
Feb 07 04:42:20 PM PST 24 |
Feb 07 04:51:37 PM PST 24 |
9779852976 ps |
| T1140 |
/workspace/coverage/default/14.chip_sw_lc_ctrl_transition.1117416272 |
|
|
Feb 07 04:58:21 PM PST 24 |
Feb 07 05:10:52 PM PST 24 |
11546593713 ps |
| T1141 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.2101453643 |
|
|
Feb 07 04:33:35 PM PST 24 |
Feb 07 04:40:30 PM PST 24 |
4152053768 ps |
| T1142 |
/workspace/coverage/default/2.chip_sw_power_idle_load.2384276830 |
|
|
Feb 07 04:53:23 PM PST 24 |
Feb 07 05:03:32 PM PST 24 |
4305835080 ps |
| T48 |
/workspace/coverage/default/0.chip_sw_usbdev_pullup.3127129249 |
|
|
Feb 07 04:31:37 PM PST 24 |
Feb 07 04:35:05 PM PST 24 |
3380258114 ps |
| T196 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.526688690 |
|
|
Feb 07 04:49:13 PM PST 24 |
Feb 07 04:58:39 PM PST 24 |
5771306320 ps |
| T29 |
/workspace/coverage/default/0.chip_sw_alert_test.999491635 |
|
|
Feb 07 04:33:32 PM PST 24 |
Feb 07 04:39:39 PM PST 24 |
3493245732 ps |
| T656 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_escalation_reset.3053715954 |
|
|
Feb 07 04:45:03 PM PST 24 |
Feb 07 04:55:47 PM PST 24 |
5512272943 ps |
| T765 |
/workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.579274869 |
|
|
Feb 07 04:57:37 PM PST 24 |
Feb 07 05:04:02 PM PST 24 |
3258674650 ps |
| T1143 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_wakeup.602383414 |
|
|
Feb 07 04:36:30 PM PST 24 |
Feb 07 04:45:25 PM PST 24 |
5512279224 ps |
| T1144 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.555135109 |
|
|
Feb 07 04:39:34 PM PST 24 |
Feb 07 04:43:21 PM PST 24 |
2297771048 ps |
| T1145 |
/workspace/coverage/default/2.chip_sival_flash_info_access.1684075950 |
|
|
Feb 07 04:48:21 PM PST 24 |
Feb 07 04:58:22 PM PST 24 |
4095568300 ps |
| T1146 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.3701721278 |
|
|
Feb 07 04:34:05 PM PST 24 |
Feb 07 04:58:31 PM PST 24 |
11935291980 ps |
| T1147 |
/workspace/coverage/default/1.chip_sw_rv_plic_smoketest.3657951306 |
|
|
Feb 07 04:46:46 PM PST 24 |
Feb 07 04:50:54 PM PST 24 |
2737854800 ps |
| T1148 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.1674895207 |
|
|
Feb 07 04:33:30 PM PST 24 |
Feb 07 04:36:56 PM PST 24 |
2804365400 ps |
| T695 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.323863208 |
|
|
Feb 07 04:50:42 PM PST 24 |
Feb 07 05:04:51 PM PST 24 |
4427003664 ps |
| T1149 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.1706561692 |
|
|
Feb 07 04:41:18 PM PST 24 |
Feb 07 04:51:26 PM PST 24 |
3789641792 ps |
| T1150 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.2106558939 |
|
|
Feb 07 04:48:47 PM PST 24 |
Feb 07 04:55:58 PM PST 24 |
3422806046 ps |
| T166 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.2947710000 |
|
|
Feb 07 04:54:43 PM PST 24 |
Feb 07 04:58:58 PM PST 24 |
2307608916 ps |
| T63 |
/workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.847452163 |
|
|
Feb 07 05:05:06 PM PST 24 |
Feb 07 05:12:03 PM PST 24 |
3603572904 ps |
| T86 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency_reduced_freq.3383535710 |
|
|
Feb 07 04:45:56 PM PST 24 |
Feb 07 05:15:52 PM PST 24 |
10769670113 ps |
| T1151 |
/workspace/coverage/default/1.chip_jtag_mem_access.3899304612 |
|
|
Feb 07 04:36:55 PM PST 24 |
Feb 07 05:02:29 PM PST 24 |
13784820770 ps |
| T1152 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.4147921126 |
|
|
Feb 07 04:41:27 PM PST 24 |
Feb 07 05:14:14 PM PST 24 |
8879440200 ps |
| T249 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.562743690 |
|
|
Feb 07 04:53:42 PM PST 24 |
Feb 07 05:05:17 PM PST 24 |
6674475314 ps |
| T787 |
/workspace/coverage/default/7.chip_sw_all_escalation_resets.956704929 |
|
|
Feb 07 04:57:03 PM PST 24 |
Feb 07 05:06:11 PM PST 24 |
4543785010 ps |
| T1153 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.363912768 |
|
|
Feb 07 04:41:17 PM PST 24 |
Feb 07 05:49:59 PM PST 24 |
15995780720 ps |
| T187 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.3597894691 |
|
|
Feb 07 04:52:07 PM PST 24 |
Feb 07 06:03:21 PM PST 24 |
18510380904 ps |
| T1154 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_timeout.1617502616 |
|
|
Feb 07 04:52:06 PM PST 24 |
Feb 07 04:59:30 PM PST 24 |
4472154620 ps |
| T1155 |
/workspace/coverage/default/3.chip_tap_straps_testunlock0.3413028945 |
|
|
Feb 07 04:56:34 PM PST 24 |
Feb 07 05:00:48 PM PST 24 |
4929654487 ps |
| T1156 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.2257651695 |
|
|
Feb 07 04:34:01 PM PST 24 |
Feb 07 04:51:05 PM PST 24 |
5011990466 ps |
| T1157 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.429691541 |
|
|
Feb 07 04:37:08 PM PST 24 |
Feb 07 05:11:57 PM PST 24 |
12856576600 ps |
| T1158 |
/workspace/coverage/default/1.chip_sw_clkmgr_smoketest.4107966763 |
|
|
Feb 07 04:47:10 PM PST 24 |
Feb 07 04:52:31 PM PST 24 |
2677981500 ps |
| T1159 |
/workspace/coverage/default/1.chip_sw_example_rom.3568570531 |
|
|
Feb 07 04:36:39 PM PST 24 |
Feb 07 04:38:49 PM PST 24 |
1910590924 ps |
| T1160 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac.1307023692 |
|
|
Feb 07 04:42:22 PM PST 24 |
Feb 07 04:47:23 PM PST 24 |
3651673786 ps |
| T1161 |
/workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.4225300657 |
|
|
Feb 07 04:33:54 PM PST 24 |
Feb 07 04:43:11 PM PST 24 |
18509975898 ps |
| T1162 |
/workspace/coverage/default/2.chip_sw_uart_rand_baudrate.1168367881 |
|
|
Feb 07 04:48:40 PM PST 24 |
Feb 07 04:59:42 PM PST 24 |
4922203256 ps |
| T1163 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_otp_hw_cfg0.1331320481 |
|
|
Feb 07 04:49:09 PM PST 24 |
Feb 07 04:55:39 PM PST 24 |
2782433860 ps |
| T724 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.1791772866 |
|
|
Feb 07 05:06:58 PM PST 24 |
Feb 07 05:14:41 PM PST 24 |
4346155434 ps |
| T776 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.4131729060 |
|
|
Feb 07 04:58:51 PM PST 24 |
Feb 07 05:13:28 PM PST 24 |
4604017640 ps |
| T213 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.4217065923 |
|
|
Feb 07 04:33:52 PM PST 24 |
Feb 07 04:57:03 PM PST 24 |
6656278316 ps |
| T234 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.1555641732 |
|
|
Feb 07 04:34:56 PM PST 24 |
Feb 07 04:50:17 PM PST 24 |
4719063716 ps |
| T1164 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.3448425618 |
|
|
Feb 07 04:33:50 PM PST 24 |
Feb 07 04:38:55 PM PST 24 |
3348096601 ps |
| T1165 |
/workspace/coverage/default/12.chip_sw_all_escalation_resets.3665213507 |
|
|
Feb 07 04:58:16 PM PST 24 |
Feb 07 05:11:00 PM PST 24 |
5668557660 ps |
| T1166 |
/workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.1686973071 |
|
|
Feb 07 04:52:32 PM PST 24 |
Feb 07 05:02:03 PM PST 24 |
4787163050 ps |
| T1167 |
/workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.3131496590 |
|
|
Feb 07 05:00:24 PM PST 24 |
Feb 07 05:06:59 PM PST 24 |
3961514338 ps |
| T703 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.1860267446 |
|
|
Feb 07 04:52:19 PM PST 24 |
Feb 07 04:59:36 PM PST 24 |
3805691232 ps |
| T1168 |
/workspace/coverage/default/2.chip_sw_entropy_src_smoketest.2662859722 |
|
|
Feb 07 04:58:01 PM PST 24 |
Feb 07 05:05:20 PM PST 24 |
3431913018 ps |
| T138 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.841093005 |
|
|
Feb 07 04:35:37 PM PST 24 |
Feb 07 04:57:00 PM PST 24 |
9130447852 ps |
| T235 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.118376059 |
|
|
Feb 07 04:48:03 PM PST 24 |
Feb 07 05:03:57 PM PST 24 |
6150419716 ps |
| T648 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.2501011998 |
|
|
Feb 07 04:37:35 PM PST 24 |
Feb 07 05:48:58 PM PST 24 |
24086398513 ps |
| T273 |
/workspace/coverage/default/1.chip_sw_rstmgr_cpu_info.1178134250 |
|
|
Feb 07 04:41:30 PM PST 24 |
Feb 07 04:56:42 PM PST 24 |
7764835986 ps |
| T1169 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_bootstrap.252925803 |
|
|
Feb 07 04:39:28 PM PST 24 |
Feb 07 08:18:16 PM PST 24 |
77640237814 ps |
| T1170 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.245918136 |
|
|
Feb 07 04:50:08 PM PST 24 |
Feb 07 05:05:04 PM PST 24 |
6175149552 ps |
| T771 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.4177668948 |
|
|
Feb 07 05:03:19 PM PST 24 |
Feb 07 05:12:51 PM PST 24 |
5064082080 ps |
| T1171 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.1541922676 |
|
|
Feb 07 04:57:39 PM PST 24 |
Feb 07 05:02:08 PM PST 24 |
3260157824 ps |
| T800 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.64739088 |
|
|
Feb 07 05:00:02 PM PST 24 |
Feb 07 05:12:58 PM PST 24 |
5588795476 ps |
| T310 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.1180364257 |
|
|
Feb 07 04:34:21 PM PST 24 |
Feb 07 04:50:53 PM PST 24 |
7723501076 ps |
| T1172 |
/workspace/coverage/default/0.chip_sw_aes_masking_off.763801715 |
|
|
Feb 07 04:32:59 PM PST 24 |
Feb 07 04:39:33 PM PST 24 |
2941232579 ps |
| T1173 |
/workspace/coverage/default/1.rom_e2e_shutdown_exception_c.106313091 |
|
|
Feb 07 04:49:56 PM PST 24 |
Feb 07 05:23:32 PM PST 24 |
8546152800 ps |
| T742 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.2935582758 |
|
|
Feb 07 04:32:46 PM PST 24 |
Feb 07 04:41:59 PM PST 24 |
4181019304 ps |
| T1174 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.54139464 |
|
|
Feb 07 04:33:32 PM PST 24 |
Feb 07 04:37:33 PM PST 24 |
2757778182 ps |
| T17 |
/workspace/coverage/default/2.chip_sw_sleep_pin_retention.1746729584 |
|
|
Feb 07 04:52:57 PM PST 24 |
Feb 07 04:58:51 PM PST 24 |
3870012588 ps |
| T1175 |
/workspace/coverage/default/4.chip_tap_straps_prod.3171752066 |
|
|
Feb 07 04:56:40 PM PST 24 |
Feb 07 04:58:59 PM PST 24 |
2896587363 ps |
| T1176 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.470006366 |
|
|
Feb 07 04:50:00 PM PST 24 |
Feb 07 05:09:57 PM PST 24 |
7510597240 ps |
| T300 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.3339415461 |
|
|
Feb 07 04:53:27 PM PST 24 |
Feb 07 04:57:35 PM PST 24 |
2431766126 ps |
| T119 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.1135780191 |
|
|
Feb 07 04:44:19 PM PST 24 |
Feb 07 04:51:28 PM PST 24 |
5406191240 ps |
| T708 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.2840460229 |
|
|
Feb 07 05:05:22 PM PST 24 |
Feb 07 05:16:56 PM PST 24 |
5940535000 ps |
| T1177 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.1903164018 |
|
|
Feb 07 04:33:56 PM PST 24 |
Feb 07 04:46:21 PM PST 24 |
10396237494 ps |
| T1178 |
/workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.4186737350 |
|
|
Feb 07 05:04:41 PM PST 24 |
Feb 07 05:12:50 PM PST 24 |
3397199000 ps |
| T1179 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.3201278691 |
|
|
Feb 07 04:46:18 PM PST 24 |
Feb 07 05:03:38 PM PST 24 |
5206235634 ps |
| T301 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.3364029092 |
|
|
Feb 07 04:44:52 PM PST 24 |
Feb 07 04:48:59 PM PST 24 |
2638040816 ps |
| T348 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_lockstep_glitch.3552321271 |
|
|
Feb 07 04:53:35 PM PST 24 |
Feb 07 04:56:29 PM PST 24 |
2867242744 ps |
| T1180 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.426208458 |
|
|
Feb 07 04:38:42 PM PST 24 |
Feb 07 04:52:31 PM PST 24 |
5031401427 ps |
| T1181 |
/workspace/coverage/default/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.1997477001 |
|
|
Feb 07 04:33:41 PM PST 24 |
Feb 07 07:48:39 PM PST 24 |
254679674688 ps |
| T129 |
/workspace/coverage/default/0.chip_sw_usbdev_dpi.503014640 |
|
|
Feb 07 04:31:59 PM PST 24 |
Feb 07 05:17:31 PM PST 24 |
12380191112 ps |
| T1182 |
/workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.1235203558 |
|
|
Feb 07 04:35:18 PM PST 24 |
Feb 07 04:39:51 PM PST 24 |
2738972708 ps |
| T325 |
/workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.606487482 |
|
|
Feb 07 04:57:40 PM PST 24 |
Feb 07 05:07:49 PM PST 24 |
5118757684 ps |
| T1183 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.2357872720 |
|
|
Feb 07 04:36:05 PM PST 24 |
Feb 07 04:39:54 PM PST 24 |
3162355064 ps |
| T188 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.536109198 |
|
|
Feb 07 04:41:56 PM PST 24 |
Feb 07 06:02:34 PM PST 24 |
17904721916 ps |
| T1184 |
/workspace/coverage/default/1.chip_sw_power_sleep_load.449828404 |
|
|
Feb 07 04:45:34 PM PST 24 |
Feb 07 04:54:08 PM PST 24 |
10509244200 ps |
| T265 |
/workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.1524206774 |
|
|
Feb 07 04:52:32 PM PST 24 |
Feb 07 05:01:54 PM PST 24 |
4509274200 ps |
| T1185 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.2082359347 |
|
|
Feb 07 04:34:46 PM PST 24 |
Feb 07 04:53:26 PM PST 24 |
7276935418 ps |
| T20 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.387901403 |
|
|
Feb 07 04:37:54 PM PST 24 |
Feb 07 04:41:42 PM PST 24 |
2805434564 ps |
| T1186 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.4041666294 |
|
|
Feb 07 04:34:13 PM PST 24 |
Feb 07 04:54:40 PM PST 24 |
11316641840 ps |
| T1187 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.1489307750 |
|
|
Feb 07 04:49:14 PM PST 24 |
Feb 07 04:54:28 PM PST 24 |
6059580540 ps |
| T1188 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.3626359742 |
|
|
Feb 07 04:52:44 PM PST 24 |
Feb 07 05:13:17 PM PST 24 |
7259103310 ps |
| T1189 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.1873219594 |
|
|
Feb 07 04:57:11 PM PST 24 |
Feb 07 05:25:54 PM PST 24 |
11531464070 ps |
| T1190 |
/workspace/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.1141551017 |
|
|
Feb 07 04:50:28 PM PST 24 |
Feb 07 05:02:49 PM PST 24 |
19100657676 ps |
| T1191 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.1884281246 |
|
|
Feb 07 04:59:51 PM PST 24 |
Feb 07 05:07:02 PM PST 24 |
3812173440 ps |
| T661 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.1774075837 |
|
|
Feb 07 04:33:08 PM PST 24 |
Feb 07 04:35:24 PM PST 24 |
2357850977 ps |
| T1192 |
/workspace/coverage/default/0.chip_sw_power_sleep_load.3869360746 |
|
|
Feb 07 04:34:24 PM PST 24 |
Feb 07 04:43:38 PM PST 24 |
10375596096 ps |
| T1193 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.3629322477 |
|
|
Feb 07 04:34:49 PM PST 24 |
Feb 07 04:43:50 PM PST 24 |
6614687032 ps |
| T779 |
/workspace/coverage/default/61.chip_sw_all_escalation_resets.936064744 |
|
|
Feb 07 05:04:04 PM PST 24 |
Feb 07 05:12:54 PM PST 24 |
5837822734 ps |
| T1194 |
/workspace/coverage/default/1.chip_tap_straps_prod.4272701217 |
|
|
Feb 07 04:44:06 PM PST 24 |
Feb 07 05:01:16 PM PST 24 |
10124797515 ps |
| T1195 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sysrst_ctrl_reset.4025263620 |
|
|
Feb 07 04:38:36 PM PST 24 |
Feb 07 04:56:55 PM PST 24 |
7504011823 ps |
| T1196 |
/workspace/coverage/default/2.rom_e2e_smoke.1817553735 |
|
|
Feb 07 04:54:36 PM PST 24 |
Feb 07 05:23:31 PM PST 24 |
8844750226 ps |
| T274 |
/workspace/coverage/default/53.chip_sw_all_escalation_resets.3235088814 |
|
|
Feb 07 05:02:33 PM PST 24 |
Feb 07 05:13:56 PM PST 24 |
4328051762 ps |
| T1197 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.991352762 |
|
|
Feb 07 04:39:37 PM PST 24 |
Feb 07 04:44:13 PM PST 24 |
2959078028 ps |
| T269 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.3762950608 |
|
|
Feb 07 04:52:12 PM PST 24 |
Feb 07 05:11:01 PM PST 24 |
10765964994 ps |
| T18 |
/workspace/coverage/default/0.chip_sw_sleep_pin_retention.2373467753 |
|
|
Feb 07 04:33:41 PM PST 24 |
Feb 07 04:39:02 PM PST 24 |
4497713294 ps |
| T1198 |
/workspace/coverage/default/9.chip_sw_lc_ctrl_transition.3350132906 |
|
|
Feb 07 04:58:08 PM PST 24 |
Feb 07 05:18:48 PM PST 24 |
12797343904 ps |
| T777 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.1197538951 |
|
|
Feb 07 04:59:58 PM PST 24 |
Feb 07 05:08:55 PM PST 24 |
4589329520 ps |
| T773 |
/workspace/coverage/default/6.chip_sw_alert_handler_lpg_sleep_mode_alerts.3693066482 |
|
|
Feb 07 05:00:16 PM PST 24 |
Feb 07 05:05:24 PM PST 24 |
3282040192 ps |
| T1199 |
/workspace/coverage/default/2.chip_tap_straps_prod.1361836656 |
|
|
Feb 07 04:52:50 PM PST 24 |
Feb 07 04:55:24 PM PST 24 |
2489489588 ps |
| T733 |
/workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.1813953632 |
|
|
Feb 07 05:00:37 PM PST 24 |
Feb 07 05:07:05 PM PST 24 |
3625019160 ps |
| T1200 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod_end.2810320397 |
|
|
Feb 07 04:58:52 PM PST 24 |
Feb 07 05:30:47 PM PST 24 |
8018731460 ps |
| T1201 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.323994101 |
|
|
Feb 07 04:50:40 PM PST 24 |
Feb 07 04:55:33 PM PST 24 |
2948774596 ps |
| T737 |
/workspace/coverage/default/40.chip_sw_all_escalation_resets.2389503981 |
|
|
Feb 07 05:05:28 PM PST 24 |
Feb 07 05:13:32 PM PST 24 |
4309450700 ps |
| T1202 |
/workspace/coverage/default/2.chip_sw_rom_ctrl_integrity_check.1925879165 |
|
|
Feb 07 04:53:18 PM PST 24 |
Feb 07 05:03:43 PM PST 24 |
9064899911 ps |
| T1203 |
/workspace/coverage/default/1.chip_sw_aon_timer_irq.3048837087 |
|
|
Feb 07 04:40:06 PM PST 24 |
Feb 07 04:47:10 PM PST 24 |
3615903496 ps |
| T1204 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.1800665959 |
|
|
Feb 07 04:49:22 PM PST 24 |
Feb 07 04:53:56 PM PST 24 |
4614731702 ps |
| T1205 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.3400189296 |
|
|
Feb 07 04:52:02 PM PST 24 |
Feb 07 05:01:36 PM PST 24 |
7207107144 ps |
| T275 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.1066749222 |
|
|
Feb 07 05:04:36 PM PST 24 |
Feb 07 05:11:30 PM PST 24 |
5033413284 ps |
| T698 |
/workspace/coverage/default/0.chip_sw_pattgen_ios.1889057389 |
|
|
Feb 07 04:33:20 PM PST 24 |
Feb 07 04:37:13 PM PST 24 |
2861858500 ps |
| T739 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.1119441124 |
|
|
Feb 07 04:58:38 PM PST 24 |
Feb 07 05:07:30 PM PST 24 |
3657789000 ps |
| T1206 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.766517777 |
|
|
Feb 07 04:59:36 PM PST 24 |
Feb 07 05:14:19 PM PST 24 |
5611648846 ps |
| T1207 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.4126926736 |
|
|
Feb 07 05:03:11 PM PST 24 |
Feb 07 05:11:06 PM PST 24 |
3290528776 ps |
| T1208 |
/workspace/coverage/default/2.chip_sw_alert_handler_entropy.2307860643 |
|
|
Feb 07 04:50:26 PM PST 24 |
Feb 07 04:56:03 PM PST 24 |
3010236984 ps |
| T185 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.1266825516 |
|
|
Feb 07 04:33:24 PM PST 24 |
Feb 07 04:44:41 PM PST 24 |
4147580440 ps |
| T1209 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.2329798089 |
|
|
Feb 07 05:00:26 PM PST 24 |
Feb 07 05:06:34 PM PST 24 |
3942372300 ps |
| T1210 |
/workspace/coverage/default/1.chip_sw_entropy_src_smoketest.461168257 |
|
|
Feb 07 04:46:40 PM PST 24 |
Feb 07 04:58:10 PM PST 24 |
3993494096 ps |
| T1211 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.3416862256 |
|
|
Feb 07 04:40:43 PM PST 24 |
Feb 07 05:14:51 PM PST 24 |
8881595080 ps |
| T233 |
/workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.1375877099 |
|
|
Feb 07 04:48:52 PM PST 24 |
Feb 07 05:01:00 PM PST 24 |
4123077802 ps |
| T1212 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.4218400131 |
|
|
Feb 07 04:44:09 PM PST 24 |
Feb 07 04:55:00 PM PST 24 |
3706175442 ps |
| T731 |
/workspace/coverage/default/4.chip_sw_all_escalation_resets.2576745271 |
|
|
Feb 07 04:56:35 PM PST 24 |
Feb 07 05:08:27 PM PST 24 |
5333255364 ps |
| T1213 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_por_reset.2133134814 |
|
|
Feb 07 04:39:58 PM PST 24 |
Feb 07 04:47:23 PM PST 24 |
5121564577 ps |
| T726 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.580729250 |
|
|
Feb 07 04:59:37 PM PST 24 |
Feb 07 05:09:21 PM PST 24 |
4115467150 ps |
| T1214 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.647418861 |
|
|
Feb 07 04:34:30 PM PST 24 |
Feb 07 04:46:51 PM PST 24 |
4191405680 ps |
| T1215 |
/workspace/coverage/default/2.chip_sw_aes_entropy.3311586352 |
|
|
Feb 07 04:51:24 PM PST 24 |
Feb 07 04:55:59 PM PST 24 |
2593704950 ps |
| T1216 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx1.3507608336 |
|
|
Feb 07 04:37:50 PM PST 24 |
Feb 07 04:53:37 PM PST 24 |
5594666144 ps |
| T1217 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.256564983 |
|
|
Feb 07 04:53:01 PM PST 24 |
Feb 07 05:10:30 PM PST 24 |
7463974922 ps |
| T1218 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.1897681459 |
|
|
Feb 07 04:37:37 PM PST 24 |
Feb 07 04:57:52 PM PST 24 |
5587541600 ps |
| T1219 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.2235051985 |
|
|
Feb 07 04:36:14 PM PST 24 |
Feb 07 04:42:56 PM PST 24 |
3881429289 ps |
| T347 |
/workspace/coverage/default/2.chip_sw_plic_sw_irq.1350013273 |
|
|
Feb 07 04:51:33 PM PST 24 |
Feb 07 04:54:54 PM PST 24 |
3222801646 ps |
| T1220 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.2117073503 |
|
|
Feb 07 04:33:04 PM PST 24 |
Feb 07 05:19:40 PM PST 24 |
12673244585 ps |
| T212 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.755106757 |
|
|
Feb 07 04:53:35 PM PST 24 |
Feb 07 05:06:59 PM PST 24 |
4687499814 ps |
| T651 |
/workspace/coverage/default/1.chip_sw_edn_boot_mode.733385840 |
|
|
Feb 07 04:40:30 PM PST 24 |
Feb 07 04:49:38 PM PST 24 |
2520733282 ps |
| T1221 |
/workspace/coverage/default/15.chip_sw_uart_rand_baudrate.339921625 |
|
|
Feb 07 04:58:37 PM PST 24 |
Feb 07 05:32:48 PM PST 24 |
13199187356 ps |
| T1222 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.1857499737 |
|
|
Feb 07 04:32:45 PM PST 24 |
Feb 07 04:48:42 PM PST 24 |
5840443652 ps |
| T1223 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.3656339886 |
|
|
Feb 07 04:52:03 PM PST 24 |
Feb 07 05:07:42 PM PST 24 |
13979775843 ps |
| T1224 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3537954762 |
|
|
Feb 07 04:56:44 PM PST 24 |
Feb 07 05:08:43 PM PST 24 |
5330203471 ps |
| T1225 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_prod.924251829 |
|
|
Feb 07 04:34:07 PM PST 24 |
Feb 07 04:41:42 PM PST 24 |
5243324552 ps |
| T1226 |
/workspace/coverage/default/0.chip_sw_gpio_smoketest.1929993730 |
|
|
Feb 07 04:37:40 PM PST 24 |
Feb 07 04:40:58 PM PST 24 |
2752669860 ps |
| T1227 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.4093486606 |
|
|
Feb 07 04:49:43 PM PST 24 |
Feb 07 05:40:15 PM PST 24 |
33075843190 ps |
| T1228 |
/workspace/coverage/default/2.chip_sw_kmac_app_rom.3211299416 |
|
|
Feb 07 04:51:55 PM PST 24 |
Feb 07 04:55:29 PM PST 24 |
3079809336 ps |
| T729 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.1381823580 |
|
|
Feb 07 05:03:59 PM PST 24 |
Feb 07 05:10:44 PM PST 24 |
3503716370 ps |
| T1229 |
/workspace/coverage/default/2.chip_sw_pwrmgr_smoketest.948638765 |
|
|
Feb 07 04:57:30 PM PST 24 |
Feb 07 05:05:26 PM PST 24 |
5125452248 ps |
| T1230 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.2935322345 |
|
|
Feb 07 04:38:53 PM PST 24 |
Feb 07 04:58:20 PM PST 24 |
4399060040 ps |
| T657 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.4039651993 |
|
|
Feb 07 04:35:00 PM PST 24 |
Feb 07 04:42:29 PM PST 24 |
4361626294 ps |
| T1231 |
/workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.727450738 |
|
|
Feb 07 05:01:19 PM PST 24 |
Feb 07 05:08:01 PM PST 24 |
3602463944 ps |
| T1232 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_rma.300092438 |
|
|
Feb 07 04:42:50 PM PST 24 |
Feb 07 05:15:40 PM PST 24 |
8803704492 ps |
| T256 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.1478970420 |
|
|
Feb 07 05:01:47 PM PST 24 |
Feb 07 05:13:49 PM PST 24 |
6236634332 ps |
| T1233 |
/workspace/coverage/default/97.chip_sw_all_escalation_resets.1205232987 |
|
|
Feb 07 05:04:42 PM PST 24 |
Feb 07 05:15:14 PM PST 24 |
5238862980 ps |
| T1234 |
/workspace/coverage/default/2.chip_sw_ast_clk_outputs.109176516 |
|
|
Feb 07 04:53:32 PM PST 24 |
Feb 07 05:13:21 PM PST 24 |
7507776100 ps |
| T1235 |
/workspace/coverage/default/2.chip_sw_kmac_mode_cshake.498702078 |
|
|
Feb 07 04:51:41 PM PST 24 |
Feb 07 04:55:58 PM PST 24 |
2944741642 ps |
| T1236 |
/workspace/coverage/default/2.chip_sw_edn_sw_mode.4271628202 |
|
|
Feb 07 04:52:37 PM PST 24 |
Feb 07 05:14:31 PM PST 24 |
6697924208 ps |
| T1237 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.3297250581 |
|
|
Feb 07 04:47:52 PM PST 24 |
Feb 07 05:09:51 PM PST 24 |
6368084902 ps |
| T1238 |
/workspace/coverage/default/2.chip_sw_alert_handler_escalation.1487795493 |
|
|
Feb 07 04:50:52 PM PST 24 |
Feb 07 05:01:02 PM PST 24 |
4574304588 ps |
| T1239 |
/workspace/coverage/default/1.rom_e2e_shutdown_output.482064633 |
|
|
Feb 07 04:50:58 PM PST 24 |
Feb 07 05:40:36 PM PST 24 |
26122959832 ps |
| T1240 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.3366456005 |
|
|
Feb 07 04:44:14 PM PST 24 |
Feb 07 04:54:00 PM PST 24 |
4318835888 ps |
| T142 |
/workspace/coverage/default/82.chip_sw_all_escalation_resets.2896097555 |
|
|
Feb 07 05:05:39 PM PST 24 |
Feb 07 05:15:54 PM PST 24 |
5650317000 ps |
| T1241 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.1255611229 |
|
|
Feb 07 04:43:05 PM PST 24 |
Feb 07 05:28:36 PM PST 24 |
10185963513 ps |
| T1242 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.4009392561 |
|
|
Feb 07 04:57:43 PM PST 24 |
Feb 07 05:07:09 PM PST 24 |
5692588200 ps |
| T778 |
/workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.3765433307 |
|
|
Feb 07 05:05:09 PM PST 24 |
Feb 07 05:12:07 PM PST 24 |
4402232332 ps |
| T1243 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_dev.1051373890 |
|
|
Feb 07 04:41:51 PM PST 24 |
Feb 07 05:20:38 PM PST 24 |
8536083009 ps |
| T759 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.295822464 |
|
|
Feb 07 04:57:27 PM PST 24 |
Feb 07 05:10:29 PM PST 24 |
5860225400 ps |
| T1244 |
/workspace/coverage/default/1.chip_sw_kmac_mode_cshake.3096212012 |
|
|
Feb 07 04:42:12 PM PST 24 |
Feb 07 04:45:16 PM PST 24 |
2494190356 ps |
| T1245 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.1513128175 |
|
|
Feb 07 04:38:24 PM PST 24 |
Feb 07 04:59:02 PM PST 24 |
5661293511 ps |
| T193 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.3721733315 |
|
|
Feb 07 04:45:51 PM PST 24 |
Feb 07 05:21:53 PM PST 24 |
26011435509 ps |
| T1246 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.599311485 |
|
|
Feb 07 04:36:30 PM PST 24 |
Feb 07 05:13:26 PM PST 24 |
8631377320 ps |
| T1247 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.1738778170 |
|
|
Feb 07 04:38:35 PM PST 24 |
Feb 07 04:43:05 PM PST 24 |
2405159122 ps |
| T1248 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod.2377743325 |
|
|
Feb 07 04:42:08 PM PST 24 |
Feb 07 05:28:55 PM PST 24 |
11873661393 ps |
| T1249 |
/workspace/coverage/default/0.chip_sw_otbn_randomness.3833558716 |
|
|
Feb 07 04:34:06 PM PST 24 |
Feb 07 04:53:52 PM PST 24 |
6074774174 ps |
| T1250 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.2886607731 |
|
|
Feb 07 04:52:37 PM PST 24 |
Feb 07 05:03:12 PM PST 24 |
4237845440 ps |
| T302 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.233295050 |
|
|
Feb 07 04:45:07 PM PST 24 |
Feb 07 04:49:00 PM PST 24 |
2689623394 ps |
| T1251 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.586858943 |
|
|
Feb 07 04:46:17 PM PST 24 |
Feb 07 04:50:52 PM PST 24 |
2756154706 ps |
| T1252 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.3182561851 |
|
|
Feb 07 04:42:54 PM PST 24 |
Feb 07 04:48:21 PM PST 24 |
2541834920 ps |
| T1253 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.3797787311 |
|
|
Feb 07 04:33:13 PM PST 24 |
Feb 07 05:14:41 PM PST 24 |
19591896788 ps |
| T1254 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.2655391314 |
|
|
Feb 07 04:55:31 PM PST 24 |
Feb 07 05:08:19 PM PST 24 |
4183541456 ps |
| T1255 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.1374284166 |
|
|
Feb 07 05:03:59 PM PST 24 |
Feb 07 05:15:27 PM PST 24 |
5007557460 ps |
| T744 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.1717030396 |
|
|
Feb 07 05:01:52 PM PST 24 |
Feb 07 05:09:05 PM PST 24 |
4362184770 ps |
| T1256 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.2927609170 |
|
|
Feb 07 05:01:46 PM PST 24 |
Feb 07 05:16:55 PM PST 24 |
5353418424 ps |
| T1257 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.3170926296 |
|
|
Feb 07 04:38:38 PM PST 24 |
Feb 07 04:51:34 PM PST 24 |
5695206242 ps |
| T1258 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.2332822307 |
|
|
Feb 07 04:48:48 PM PST 24 |
Feb 07 05:00:09 PM PST 24 |
5189392874 ps |
| T1259 |
/workspace/coverage/default/2.chip_sw_inject_scramble_seed.2471856830 |
|
|
Feb 07 04:48:58 PM PST 24 |
Feb 07 08:06:28 PM PST 24 |
65356387811 ps |
| T1260 |
/workspace/coverage/default/39.chip_sw_all_escalation_resets.728887497 |
|
|
Feb 07 05:01:40 PM PST 24 |
Feb 07 05:13:27 PM PST 24 |
4899805336 ps |
| T1261 |
/workspace/coverage/default/0.rom_keymgr_functest.3993964524 |
|
|
Feb 07 04:36:19 PM PST 24 |
Feb 07 04:44:40 PM PST 24 |
4703004440 ps |
| T711 |
/workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.1019182060 |
|
|
Feb 07 05:05:13 PM PST 24 |
Feb 07 05:11:44 PM PST 24 |
4332757236 ps |
| T317 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.2383884428 |
|
|
Feb 07 05:02:00 PM PST 24 |
Feb 07 05:08:15 PM PST 24 |
3757905172 ps |
| T1262 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ec_rst_l.3541878123 |
|
|
Feb 07 04:50:37 PM PST 24 |
Feb 07 05:43:17 PM PST 24 |
20030055884 ps |
| T788 |
/workspace/coverage/default/46.chip_sw_all_escalation_resets.1321508994 |
|
|
Feb 07 05:01:09 PM PST 24 |
Feb 07 05:13:14 PM PST 24 |
5522506246 ps |
| T1263 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod_end.496902779 |
|
|
Feb 07 04:42:27 PM PST 24 |
Feb 07 05:36:04 PM PST 24 |
11427458560 ps |
| T1264 |
/workspace/coverage/default/0.chip_sw_data_integrity_escalation.326526943 |
|
|
Feb 07 04:33:50 PM PST 24 |
Feb 07 04:48:48 PM PST 24 |
6606156930 ps |
| T1265 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.1953664478 |
|
|
Feb 07 04:32:24 PM PST 24 |
Feb 07 04:49:45 PM PST 24 |
6150486548 ps |
| T1266 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_frequency.2052486721 |
|
|
Feb 07 04:52:55 PM PST 24 |
Feb 07 04:58:04 PM PST 24 |
3397230936 ps |
| T762 |
/workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.2839282573 |
|
|
Feb 07 05:05:28 PM PST 24 |
Feb 07 05:12:23 PM PST 24 |
3754909422 ps |
| T1267 |
/workspace/coverage/default/1.chip_sw_hmac_enc_idle.99772401 |
|
|
Feb 07 04:41:43 PM PST 24 |
Feb 07 04:47:40 PM PST 24 |
3441150496 ps |
| T64 |
/workspace/coverage/default/38.chip_sw_all_escalation_resets.3593668663 |
|
|
Feb 07 05:01:28 PM PST 24 |
Feb 07 05:13:04 PM PST 24 |
4590695514 ps |
| T1268 |
/workspace/coverage/default/2.chip_sw_uart_smoketest.3647361192 |
|
|
Feb 07 04:56:20 PM PST 24 |
Feb 07 05:01:34 PM PST 24 |
2860204728 ps |
| T784 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.2534095272 |
|
|
Feb 07 04:57:49 PM PST 24 |
Feb 07 05:06:37 PM PST 24 |
3579513240 ps |
| T1269 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.2477604604 |
|
|
Feb 07 04:58:13 PM PST 24 |
Feb 07 05:32:02 PM PST 24 |
7964691476 ps |
| T1270 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.1669338632 |
|
|
Feb 07 04:40:57 PM PST 24 |
Feb 07 04:59:02 PM PST 24 |
5766563244 ps |
| T1271 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.1881831634 |
|
|
Feb 07 04:42:41 PM PST 24 |
Feb 07 05:13:17 PM PST 24 |
7160527848 ps |
| T1272 |
/workspace/coverage/default/1.chip_sw_ast_clk_outputs.3518274817 |
|
|
Feb 07 04:43:49 PM PST 24 |
Feb 07 05:02:07 PM PST 24 |
7982777948 ps |
| T1273 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_wakeup.3129972473 |
|
|
Feb 07 04:44:18 PM PST 24 |
Feb 07 04:50:13 PM PST 24 |
5156080496 ps |
| T1274 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops.1450879412 |
|
|
Feb 07 04:47:40 PM PST 24 |
Feb 07 05:04:24 PM PST 24 |
5081981994 ps |
| T1275 |
/workspace/coverage/default/0.chip_sw_edn_sw_mode.1383843539 |
|
|
Feb 07 04:34:33 PM PST 24 |
Feb 07 05:10:16 PM PST 24 |
10323566930 ps |
| T1276 |
/workspace/coverage/default/0.chip_sw_hmac_smoketest.479648165 |
|
|
Feb 07 04:36:05 PM PST 24 |
Feb 07 04:42:24 PM PST 24 |
3045981200 ps |
| T266 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.499097253 |
|
|
Feb 07 04:44:45 PM PST 24 |
Feb 07 04:53:48 PM PST 24 |
5053613072 ps |
| T1277 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.2774495969 |
|
|
Feb 07 04:50:58 PM PST 24 |
Feb 07 04:58:41 PM PST 24 |
7033661025 ps |
| T87 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.724268213 |
|
|
Feb 07 04:38:02 PM PST 24 |
Feb 07 05:34:22 PM PST 24 |
17382367526 ps |
| T1278 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.2739318400 |
|
|
Feb 07 04:39:56 PM PST 24 |
Feb 07 04:43:33 PM PST 24 |
2956589063 ps |
| T326 |
/workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.3264758063 |
|
|
Feb 07 04:55:46 PM PST 24 |
Feb 07 05:05:27 PM PST 24 |
5877090430 ps |
| T1279 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx.4197019677 |
|
|
Feb 07 04:55:59 PM PST 24 |
Feb 07 05:13:09 PM PST 24 |
5474718856 ps |
| T1280 |
/workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.1950884640 |
|
|
Feb 07 04:34:17 PM PST 24 |
Feb 07 04:40:11 PM PST 24 |
5421302232 ps |
| T1281 |
/workspace/coverage/default/1.chip_sw_aon_timer_smoketest.967040385 |
|
|
Feb 07 04:46:29 PM PST 24 |
Feb 07 04:52:30 PM PST 24 |
3577929980 ps |
| T1282 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.2376300263 |
|
|
Feb 07 04:41:47 PM PST 24 |
Feb 07 04:48:08 PM PST 24 |
3796425732 ps |
| T1283 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through.4140132068 |
|
|
Feb 07 04:32:37 PM PST 24 |
Feb 07 04:45:22 PM PST 24 |
7442004855 ps |
| T1284 |
/workspace/coverage/default/1.chip_sw_edn_sw_mode.4151711463 |
|
|
Feb 07 04:40:59 PM PST 24 |
Feb 07 05:02:52 PM PST 24 |
6780963998 ps |
| T701 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.3672612524 |
|
|
Feb 07 04:56:32 PM PST 24 |
Feb 07 05:08:22 PM PST 24 |
4895644260 ps |
| T650 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.2117619806 |
|
|
Feb 07 04:52:15 PM PST 24 |
Feb 07 05:11:01 PM PST 24 |
4947036280 ps |
| T1285 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.843562726 |
|
|
Feb 07 04:41:59 PM PST 24 |
Feb 07 04:59:04 PM PST 24 |
7384481828 ps |
| T1286 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.501172086 |
|
|
Feb 07 04:48:31 PM PST 24 |
Feb 07 05:19:05 PM PST 24 |
25809871070 ps |
| T1287 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.928209991 |
|
|
Feb 07 05:01:06 PM PST 24 |
Feb 07 05:11:05 PM PST 24 |
5108323740 ps |
| T1288 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.132083591 |
|
|
Feb 07 04:59:44 PM PST 24 |
Feb 07 05:08:46 PM PST 24 |
5180274086 ps |
| T143 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_escalation.615653621 |
|
|
Feb 07 04:37:08 PM PST 24 |
Feb 07 04:46:44 PM PST 24 |
6127283488 ps |
| T330 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.2572393311 |
|
|
Feb 07 04:36:15 PM PST 24 |
Feb 07 04:53:19 PM PST 24 |
6276068720 ps |
| T1289 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_aes_trans.3545241219 |
|
|
Feb 07 04:52:11 PM PST 24 |
Feb 07 05:03:22 PM PST 24 |
5759294708 ps |
| T1290 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.3153511912 |
|
|
Feb 07 04:35:44 PM PST 24 |
Feb 07 04:44:53 PM PST 24 |
4936639360 ps |
| T1291 |
/workspace/coverage/default/1.chip_sw_gpio_smoketest.258582281 |
|
|
Feb 07 04:48:52 PM PST 24 |
Feb 07 04:52:58 PM PST 24 |
2902461583 ps |
| T1292 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_timeout.3988983347 |
|
|
Feb 07 04:41:20 PM PST 24 |
Feb 07 04:48:02 PM PST 24 |
3506824420 ps |
| T1293 |
/workspace/coverage/default/2.rom_e2e_asm_init_test_unlocked0.406688422 |
|
|
Feb 07 04:57:35 PM PST 24 |
Feb 07 05:23:38 PM PST 24 |
7007657940 ps |
| T1294 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.1001173994 |
|
|
Feb 07 04:38:52 PM PST 24 |
Feb 07 05:04:33 PM PST 24 |
7766785000 ps |
| T780 |
/workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.4236053412 |
|
|
Feb 07 05:03:32 PM PST 24 |
Feb 07 05:11:27 PM PST 24 |
3494654840 ps |
| T1295 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.1380843507 |
|
|
Feb 07 04:59:23 PM PST 24 |
Feb 07 05:09:10 PM PST 24 |
5302861552 ps |
| T1296 |
/workspace/coverage/default/2.chip_sw_edn_kat.1645954128 |
|
|
Feb 07 04:52:33 PM PST 24 |
Feb 07 05:05:21 PM PST 24 |
3443611368 ps |
| T331 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.1352157576 |
|
|
Feb 07 04:41:49 PM PST 24 |
Feb 07 04:55:19 PM PST 24 |
6048591600 ps |
| T6 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.1406908671 |
|
|
Feb 07 04:32:34 PM PST 24 |
Feb 07 04:38:40 PM PST 24 |
3813622648 ps |
| T1297 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.3580999741 |
|
|
Feb 07 04:49:22 PM PST 24 |
Feb 07 05:25:33 PM PST 24 |
12610851222 ps |
| T1298 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_test_unlocked0.3738854984 |
|
|
Feb 07 04:32:48 PM PST 24 |
Feb 07 04:46:09 PM PST 24 |
8458321646 ps |
| T1299 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_disabled.663237445 |
|
|
Feb 07 04:40:01 PM PST 24 |
Feb 07 04:46:38 PM PST 24 |
3468457976 ps |
| T1300 |
/workspace/coverage/default/16.chip_sw_uart_rand_baudrate.4249665252 |
|
|
Feb 07 04:59:12 PM PST 24 |
Feb 07 05:43:08 PM PST 24 |
14342036840 ps |
| T1301 |
/workspace/coverage/default/0.chip_sw_rv_plic_smoketest.457579032 |
|
|
Feb 07 04:37:28 PM PST 24 |
Feb 07 04:41:10 PM PST 24 |
2822239210 ps |
| T1302 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs.232144878 |
|
|
Feb 07 04:42:09 PM PST 24 |
Feb 07 05:04:41 PM PST 24 |
5762048290 ps |
| T1303 |
/workspace/coverage/default/4.chip_tap_straps_rma.3091373134 |
|
|
Feb 07 04:58:07 PM PST 24 |
Feb 07 05:21:03 PM PST 24 |
12626553580 ps |