T752 |
/workspace/coverage/cover_reg_top/59.xbar_access_same_device_slow_rsp.735577901 |
|
|
Mar 05 03:34:45 PM PST 24 |
Mar 05 03:42:20 PM PST 24 |
26058263856 ps |
T1354 |
/workspace/coverage/cover_reg_top/54.xbar_smoke.3907993296 |
|
|
Mar 05 03:33:36 PM PST 24 |
Mar 05 03:33:44 PM PST 24 |
152529666 ps |
T1355 |
/workspace/coverage/cover_reg_top/57.xbar_smoke_zero_delays.1045474916 |
|
|
Mar 05 03:34:17 PM PST 24 |
Mar 05 03:34:24 PM PST 24 |
49684781 ps |
T369 |
/workspace/coverage/cover_reg_top/2.chip_csr_rw.3926751808 |
|
|
Mar 05 03:16:55 PM PST 24 |
Mar 05 03:22:07 PM PST 24 |
3993495432 ps |
T1356 |
/workspace/coverage/cover_reg_top/63.xbar_smoke_zero_delays.1374257511 |
|
|
Mar 05 03:35:33 PM PST 24 |
Mar 05 03:35:39 PM PST 24 |
39212964 ps |
T375 |
/workspace/coverage/cover_reg_top/10.chip_csr_rw.766737287 |
|
|
Mar 05 03:21:10 PM PST 24 |
Mar 05 03:31:10 PM PST 24 |
6520476000 ps |
T1357 |
/workspace/coverage/cover_reg_top/86.xbar_error_random.3900154757 |
|
|
Mar 05 03:39:37 PM PST 24 |
Mar 05 03:40:40 PM PST 24 |
1804088764 ps |
T1358 |
/workspace/coverage/cover_reg_top/10.xbar_smoke.2164318272 |
|
|
Mar 05 03:20:56 PM PST 24 |
Mar 05 03:21:07 PM PST 24 |
225671443 ps |
T815 |
/workspace/coverage/cover_reg_top/26.xbar_stress_all_with_reset_error.1825309688 |
|
|
Mar 05 03:27:33 PM PST 24 |
Mar 05 03:32:35 PM PST 24 |
2701913678 ps |
T1359 |
/workspace/coverage/cover_reg_top/0.chip_csr_bit_bash.2871367658 |
|
|
Mar 05 03:14:16 PM PST 24 |
Mar 05 03:19:44 PM PST 24 |
3120219525 ps |
T1360 |
/workspace/coverage/cover_reg_top/29.xbar_error_random.44614072 |
|
|
Mar 05 03:28:17 PM PST 24 |
Mar 05 03:29:08 PM PST 24 |
1506664039 ps |
T1361 |
/workspace/coverage/cover_reg_top/29.xbar_smoke_zero_delays.1232167689 |
|
|
Mar 05 03:28:19 PM PST 24 |
Mar 05 03:28:25 PM PST 24 |
48867336 ps |
T776 |
/workspace/coverage/cover_reg_top/5.xbar_access_same_device_slow_rsp.3570873790 |
|
|
Mar 05 03:18:44 PM PST 24 |
Mar 05 03:32:14 PM PST 24 |
47281531864 ps |
T464 |
/workspace/coverage/cover_reg_top/16.xbar_stress_all.1300059961 |
|
|
Mar 05 03:24:06 PM PST 24 |
Mar 05 03:31:13 PM PST 24 |
12230859890 ps |
T1362 |
/workspace/coverage/cover_reg_top/31.xbar_smoke_zero_delays.189300140 |
|
|
Mar 05 03:28:48 PM PST 24 |
Mar 05 03:28:55 PM PST 24 |
39428935 ps |
T1363 |
/workspace/coverage/cover_reg_top/0.xbar_error_random.2904308830 |
|
|
Mar 05 03:14:43 PM PST 24 |
Mar 05 03:15:23 PM PST 24 |
1404618832 ps |
T523 |
/workspace/coverage/cover_reg_top/42.xbar_stress_all_with_rand_reset.1215214178 |
|
|
Mar 05 03:31:19 PM PST 24 |
Mar 05 03:37:23 PM PST 24 |
2440655401 ps |
T1364 |
/workspace/coverage/cover_reg_top/75.xbar_access_same_device.1393035121 |
|
|
Mar 05 03:37:43 PM PST 24 |
Mar 05 03:38:05 PM PST 24 |
545140378 ps |
T1365 |
/workspace/coverage/cover_reg_top/1.xbar_smoke_slow_rsp.455317249 |
|
|
Mar 05 03:15:29 PM PST 24 |
Mar 05 03:16:54 PM PST 24 |
4775480528 ps |
T397 |
/workspace/coverage/cover_reg_top/3.chip_csr_aliasing.3979007521 |
|
|
Mar 05 03:17:08 PM PST 24 |
Mar 05 04:54:38 PM PST 24 |
27908085935 ps |
T439 |
/workspace/coverage/cover_reg_top/90.xbar_access_same_device.2868762186 |
|
|
Mar 05 03:40:17 PM PST 24 |
Mar 05 03:41:03 PM PST 24 |
491841164 ps |
T580 |
/workspace/coverage/cover_reg_top/60.xbar_stress_all_with_rand_reset.2627449696 |
|
|
Mar 05 03:34:59 PM PST 24 |
Mar 05 03:37:47 PM PST 24 |
940985812 ps |
T345 |
/workspace/coverage/cover_reg_top/5.chip_same_csr_outstanding.2815642878 |
|
|
Mar 05 03:18:25 PM PST 24 |
Mar 05 03:49:36 PM PST 24 |
15866593616 ps |
T1366 |
/workspace/coverage/cover_reg_top/16.xbar_stress_all_with_reset_error.2007846659 |
|
|
Mar 05 03:24:05 PM PST 24 |
Mar 05 03:24:09 PM PST 24 |
7568693 ps |
T1367 |
/workspace/coverage/cover_reg_top/88.xbar_unmapped_addr.385091296 |
|
|
Mar 05 03:40:00 PM PST 24 |
Mar 05 03:40:27 PM PST 24 |
612462919 ps |
T1368 |
/workspace/coverage/cover_reg_top/53.xbar_same_source.1685448695 |
|
|
Mar 05 03:33:35 PM PST 24 |
Mar 05 03:34:58 PM PST 24 |
2415548276 ps |
T470 |
/workspace/coverage/cover_reg_top/70.xbar_stress_all_with_rand_reset.828053788 |
|
|
Mar 05 03:36:49 PM PST 24 |
Mar 05 03:40:55 PM PST 24 |
912574571 ps |
T1369 |
/workspace/coverage/cover_reg_top/99.xbar_random.1707394186 |
|
|
Mar 05 03:41:44 PM PST 24 |
Mar 05 03:42:52 PM PST 24 |
2062374621 ps |
T446 |
/workspace/coverage/cover_reg_top/5.xbar_random_zero_delays.2392475839 |
|
|
Mar 05 03:18:39 PM PST 24 |
Mar 05 03:19:26 PM PST 24 |
532381167 ps |
T1370 |
/workspace/coverage/cover_reg_top/96.xbar_smoke_large_delays.2126912933 |
|
|
Mar 05 03:41:17 PM PST 24 |
Mar 05 03:42:45 PM PST 24 |
8401659017 ps |
T1371 |
/workspace/coverage/cover_reg_top/37.xbar_smoke_zero_delays.3654571125 |
|
|
Mar 05 03:30:11 PM PST 24 |
Mar 05 03:30:17 PM PST 24 |
37598708 ps |
T1372 |
/workspace/coverage/cover_reg_top/57.xbar_same_source.2079685965 |
|
|
Mar 05 03:34:21 PM PST 24 |
Mar 05 03:35:07 PM PST 24 |
1553399912 ps |
T1373 |
/workspace/coverage/cover_reg_top/70.xbar_random_zero_delays.3225365839 |
|
|
Mar 05 03:36:50 PM PST 24 |
Mar 05 03:37:33 PM PST 24 |
463188302 ps |
T1374 |
/workspace/coverage/cover_reg_top/80.xbar_error_and_unmapped_addr.3553582983 |
|
|
Mar 05 03:38:40 PM PST 24 |
Mar 05 03:38:58 PM PST 24 |
147108643 ps |
T1375 |
/workspace/coverage/cover_reg_top/35.xbar_random.3713225630 |
|
|
Mar 05 03:29:46 PM PST 24 |
Mar 05 03:30:33 PM PST 24 |
1246816154 ps |
T1376 |
/workspace/coverage/cover_reg_top/79.xbar_stress_all_with_reset_error.2778850897 |
|
|
Mar 05 03:38:36 PM PST 24 |
Mar 05 03:44:20 PM PST 24 |
7648898161 ps |
T427 |
/workspace/coverage/cover_reg_top/1.chip_csr_rw.3949369736 |
|
|
Mar 05 03:15:53 PM PST 24 |
Mar 05 03:21:03 PM PST 24 |
3636297520 ps |
T575 |
/workspace/coverage/cover_reg_top/5.xbar_same_source.24490976 |
|
|
Mar 05 03:18:49 PM PST 24 |
Mar 05 03:19:50 PM PST 24 |
1796065256 ps |
T1377 |
/workspace/coverage/cover_reg_top/87.xbar_random_large_delays.2483907487 |
|
|
Mar 05 03:39:42 PM PST 24 |
Mar 05 04:00:07 PM PST 24 |
107780185228 ps |
T1378 |
/workspace/coverage/cover_reg_top/98.xbar_same_source.1142861649 |
|
|
Mar 05 03:41:43 PM PST 24 |
Mar 05 03:42:40 PM PST 24 |
1949674089 ps |
T1379 |
/workspace/coverage/cover_reg_top/23.xbar_stress_all_with_error.2275202599 |
|
|
Mar 05 03:26:41 PM PST 24 |
Mar 05 03:26:54 PM PST 24 |
326750517 ps |
T1380 |
/workspace/coverage/cover_reg_top/79.xbar_error_and_unmapped_addr.112099471 |
|
|
Mar 05 03:38:38 PM PST 24 |
Mar 05 03:39:25 PM PST 24 |
1107662909 ps |
T1381 |
/workspace/coverage/cover_reg_top/74.xbar_error_random.2916957496 |
|
|
Mar 05 03:37:43 PM PST 24 |
Mar 05 03:38:47 PM PST 24 |
1745639039 ps |
T461 |
/workspace/coverage/cover_reg_top/0.xbar_stress_all.1226702129 |
|
|
Mar 05 03:14:50 PM PST 24 |
Mar 05 03:21:05 PM PST 24 |
9142772452 ps |
T1382 |
/workspace/coverage/cover_reg_top/29.xbar_stress_all_with_error.2585185174 |
|
|
Mar 05 03:28:25 PM PST 24 |
Mar 05 03:35:34 PM PST 24 |
11545812642 ps |
T477 |
/workspace/coverage/cover_reg_top/30.xbar_access_same_device.4039823289 |
|
|
Mar 05 03:28:31 PM PST 24 |
Mar 05 03:30:14 PM PST 24 |
2544383216 ps |
T506 |
/workspace/coverage/cover_reg_top/8.chip_tl_errors.791294240 |
|
|
Mar 05 03:19:53 PM PST 24 |
Mar 05 03:26:34 PM PST 24 |
5319175293 ps |
T1383 |
/workspace/coverage/cover_reg_top/70.xbar_stress_all_with_error.3920993551 |
|
|
Mar 05 03:36:50 PM PST 24 |
Mar 05 03:37:59 PM PST 24 |
874482457 ps |
T1384 |
/workspace/coverage/cover_reg_top/46.xbar_access_same_device.2657221947 |
|
|
Mar 05 03:32:00 PM PST 24 |
Mar 05 03:32:40 PM PST 24 |
773842105 ps |
T814 |
/workspace/coverage/cover_reg_top/97.xbar_stress_all_with_reset_error.2206064902 |
|
|
Mar 05 03:41:37 PM PST 24 |
Mar 05 03:46:19 PM PST 24 |
972519642 ps |
T1385 |
/workspace/coverage/cover_reg_top/38.xbar_same_source.500699792 |
|
|
Mar 05 03:30:23 PM PST 24 |
Mar 05 03:30:34 PM PST 24 |
111656378 ps |
T1386 |
/workspace/coverage/cover_reg_top/49.xbar_random_zero_delays.2384834994 |
|
|
Mar 05 03:32:40 PM PST 24 |
Mar 05 03:33:33 PM PST 24 |
610876742 ps |
T448 |
/workspace/coverage/cover_reg_top/72.xbar_stress_all.3814912019 |
|
|
Mar 05 03:37:16 PM PST 24 |
Mar 05 03:42:22 PM PST 24 |
7753104324 ps |
T1387 |
/workspace/coverage/cover_reg_top/18.xbar_smoke.2700544171 |
|
|
Mar 05 03:24:32 PM PST 24 |
Mar 05 03:24:41 PM PST 24 |
171588588 ps |
T1388 |
/workspace/coverage/cover_reg_top/88.xbar_access_same_device_slow_rsp.3408142930 |
|
|
Mar 05 03:40:03 PM PST 24 |
Mar 05 03:50:25 PM PST 24 |
31964174300 ps |
T1389 |
/workspace/coverage/cover_reg_top/37.xbar_smoke.2184782371 |
|
|
Mar 05 03:30:01 PM PST 24 |
Mar 05 03:30:11 PM PST 24 |
214641927 ps |
T1390 |
/workspace/coverage/cover_reg_top/5.xbar_stress_all_with_error.3913737087 |
|
|
Mar 05 03:18:52 PM PST 24 |
Mar 05 03:22:38 PM PST 24 |
2794168906 ps |
T1391 |
/workspace/coverage/cover_reg_top/1.xbar_error_and_unmapped_addr.678860806 |
|
|
Mar 05 03:15:46 PM PST 24 |
Mar 05 03:16:19 PM PST 24 |
295861307 ps |
T544 |
/workspace/coverage/cover_reg_top/58.xbar_stress_all.4078510527 |
|
|
Mar 05 03:34:39 PM PST 24 |
Mar 05 03:38:14 PM PST 24 |
6107683023 ps |
T1392 |
/workspace/coverage/cover_reg_top/72.xbar_random_zero_delays.2862375928 |
|
|
Mar 05 03:37:13 PM PST 24 |
Mar 05 03:37:26 PM PST 24 |
115223329 ps |
T1393 |
/workspace/coverage/cover_reg_top/21.xbar_random.2602110621 |
|
|
Mar 05 03:25:46 PM PST 24 |
Mar 05 03:25:57 PM PST 24 |
89780521 ps |
T819 |
/workspace/coverage/cover_reg_top/98.xbar_stress_all_with_rand_reset.1276443622 |
|
|
Mar 05 03:41:44 PM PST 24 |
Mar 05 03:48:50 PM PST 24 |
2801414650 ps |
T809 |
/workspace/coverage/cover_reg_top/9.xbar_stress_all_with_reset_error.2005719004 |
|
|
Mar 05 03:20:48 PM PST 24 |
Mar 05 03:22:19 PM PST 24 |
1805117129 ps |
T1394 |
/workspace/coverage/cover_reg_top/57.xbar_unmapped_addr.2176294716 |
|
|
Mar 05 03:34:19 PM PST 24 |
Mar 05 03:35:04 PM PST 24 |
943577918 ps |
T1395 |
/workspace/coverage/cover_reg_top/82.xbar_random_zero_delays.3234933319 |
|
|
Mar 05 03:38:58 PM PST 24 |
Mar 05 03:39:33 PM PST 24 |
394747957 ps |
T1396 |
/workspace/coverage/cover_reg_top/73.xbar_unmapped_addr.2788105855 |
|
|
Mar 05 03:37:19 PM PST 24 |
Mar 05 03:37:30 PM PST 24 |
148238288 ps |
T1397 |
/workspace/coverage/cover_reg_top/39.xbar_error_and_unmapped_addr.4211703334 |
|
|
Mar 05 03:30:42 PM PST 24 |
Mar 05 03:31:19 PM PST 24 |
348533038 ps |
T1398 |
/workspace/coverage/cover_reg_top/31.xbar_smoke_slow_rsp.3428840893 |
|
|
Mar 05 03:28:48 PM PST 24 |
Mar 05 03:30:30 PM PST 24 |
5592138402 ps |
T810 |
/workspace/coverage/cover_reg_top/70.xbar_stress_all_with_reset_error.3017809553 |
|
|
Mar 05 03:36:56 PM PST 24 |
Mar 05 03:43:52 PM PST 24 |
3576667544 ps |
T1399 |
/workspace/coverage/cover_reg_top/5.xbar_smoke_slow_rsp.2842516580 |
|
|
Mar 05 03:18:32 PM PST 24 |
Mar 05 03:19:53 PM PST 24 |
4340686823 ps |
T1400 |
/workspace/coverage/cover_reg_top/44.xbar_smoke_large_delays.1956949343 |
|
|
Mar 05 03:31:32 PM PST 24 |
Mar 05 03:33:14 PM PST 24 |
10104164302 ps |
T1401 |
/workspace/coverage/cover_reg_top/82.xbar_stress_all_with_reset_error.3687660122 |
|
|
Mar 05 03:39:06 PM PST 24 |
Mar 05 03:45:17 PM PST 24 |
2655929703 ps |
T1402 |
/workspace/coverage/cover_reg_top/47.xbar_same_source.528069977 |
|
|
Mar 05 03:32:18 PM PST 24 |
Mar 05 03:32:57 PM PST 24 |
1301485588 ps |
T1403 |
/workspace/coverage/cover_reg_top/60.xbar_stress_all.2063995457 |
|
|
Mar 05 03:35:00 PM PST 24 |
Mar 05 03:35:40 PM PST 24 |
954905758 ps |
T452 |
/workspace/coverage/cover_reg_top/99.xbar_stress_all_with_rand_reset.331945437 |
|
|
Mar 05 03:41:56 PM PST 24 |
Mar 05 03:49:15 PM PST 24 |
4588247856 ps |
T1404 |
/workspace/coverage/cover_reg_top/34.xbar_smoke_zero_delays.729997028 |
|
|
Mar 05 03:29:33 PM PST 24 |
Mar 05 03:29:39 PM PST 24 |
44181236 ps |
T1405 |
/workspace/coverage/cover_reg_top/56.xbar_unmapped_addr.316488811 |
|
|
Mar 05 03:34:12 PM PST 24 |
Mar 05 03:34:45 PM PST 24 |
314450207 ps |
T1406 |
/workspace/coverage/cover_reg_top/35.xbar_same_source.1453416446 |
|
|
Mar 05 03:29:47 PM PST 24 |
Mar 05 03:30:20 PM PST 24 |
964863709 ps |
T1407 |
/workspace/coverage/cover_reg_top/80.xbar_access_same_device.2485214232 |
|
|
Mar 05 03:38:39 PM PST 24 |
Mar 05 03:39:09 PM PST 24 |
690763026 ps |
T443 |
/workspace/coverage/cover_reg_top/20.xbar_stress_all_with_rand_reset.2147947374 |
|
|
Mar 05 03:25:38 PM PST 24 |
Mar 05 03:48:54 PM PST 24 |
14025023475 ps |
T1408 |
/workspace/coverage/cover_reg_top/18.xbar_unmapped_addr.3268542535 |
|
|
Mar 05 03:24:48 PM PST 24 |
Mar 05 03:25:54 PM PST 24 |
1440767665 ps |
T476 |
/workspace/coverage/cover_reg_top/69.xbar_random_slow_rsp.1221274232 |
|
|
Mar 05 03:36:37 PM PST 24 |
Mar 05 03:45:36 PM PST 24 |
29740460869 ps |
T1409 |
/workspace/coverage/cover_reg_top/12.xbar_random_large_delays.285940082 |
|
|
Mar 05 03:22:09 PM PST 24 |
Mar 05 03:29:08 PM PST 24 |
37286909463 ps |
T1410 |
/workspace/coverage/cover_reg_top/10.xbar_random.2572137451 |
|
|
Mar 05 03:20:57 PM PST 24 |
Mar 05 03:21:23 PM PST 24 |
768155857 ps |
T1411 |
/workspace/coverage/cover_reg_top/82.xbar_error_random.1279119028 |
|
|
Mar 05 03:39:00 PM PST 24 |
Mar 05 03:39:20 PM PST 24 |
468421013 ps |
T1412 |
/workspace/coverage/cover_reg_top/58.xbar_random.2730946160 |
|
|
Mar 05 03:34:29 PM PST 24 |
Mar 05 03:35:14 PM PST 24 |
502801831 ps |
T346 |
/workspace/coverage/cover_reg_top/17.chip_same_csr_outstanding.3182076302 |
|
|
Mar 05 03:24:11 PM PST 24 |
Mar 05 04:37:15 PM PST 24 |
32015682825 ps |
T1413 |
/workspace/coverage/cover_reg_top/75.xbar_smoke_large_delays.1606299344 |
|
|
Mar 05 03:37:57 PM PST 24 |
Mar 05 03:39:13 PM PST 24 |
7429030585 ps |
T465 |
/workspace/coverage/cover_reg_top/60.xbar_access_same_device_slow_rsp.1031606190 |
|
|
Mar 05 03:35:03 PM PST 24 |
Mar 05 03:53:47 PM PST 24 |
63688767119 ps |
T1414 |
/workspace/coverage/cover_reg_top/2.xbar_stress_all_with_error.644244788 |
|
|
Mar 05 03:16:48 PM PST 24 |
Mar 05 03:18:46 PM PST 24 |
1630419141 ps |
T1415 |
/workspace/coverage/cover_reg_top/77.xbar_smoke_large_delays.4076610050 |
|
|
Mar 05 03:38:00 PM PST 24 |
Mar 05 03:39:15 PM PST 24 |
7068357330 ps |
T1416 |
/workspace/coverage/cover_reg_top/22.xbar_stress_all_with_error.1697446795 |
|
|
Mar 05 03:26:30 PM PST 24 |
Mar 05 03:30:34 PM PST 24 |
3310082722 ps |
T1417 |
/workspace/coverage/cover_reg_top/2.xbar_stress_all_with_rand_reset.1614517653 |
|
|
Mar 05 03:16:48 PM PST 24 |
Mar 05 03:17:22 PM PST 24 |
107658202 ps |
T1418 |
/workspace/coverage/cover_reg_top/86.xbar_random_large_delays.2190085842 |
|
|
Mar 05 03:39:37 PM PST 24 |
Mar 05 04:00:33 PM PST 24 |
106865260834 ps |
T1419 |
/workspace/coverage/cover_reg_top/6.xbar_access_same_device.2640316787 |
|
|
Mar 05 03:19:06 PM PST 24 |
Mar 05 03:20:14 PM PST 24 |
811883571 ps |
T536 |
/workspace/coverage/cover_reg_top/65.xbar_stress_all.1638647521 |
|
|
Mar 05 03:36:01 PM PST 24 |
Mar 05 03:40:35 PM PST 24 |
3223253049 ps |
T1420 |
/workspace/coverage/cover_reg_top/3.xbar_unmapped_addr.3388957398 |
|
|
Mar 05 03:17:34 PM PST 24 |
Mar 05 03:17:59 PM PST 24 |
511512215 ps |
T1421 |
/workspace/coverage/cover_reg_top/77.xbar_access_same_device.2763649284 |
|
|
Mar 05 03:38:08 PM PST 24 |
Mar 05 03:38:45 PM PST 24 |
338868001 ps |
T1422 |
/workspace/coverage/cover_reg_top/48.xbar_same_source.942253727 |
|
|
Mar 05 03:32:33 PM PST 24 |
Mar 05 03:33:29 PM PST 24 |
1810294903 ps |
T1423 |
/workspace/coverage/cover_reg_top/2.xbar_same_source.2659791667 |
|
|
Mar 05 03:16:40 PM PST 24 |
Mar 05 03:16:59 PM PST 24 |
203716142 ps |
T1424 |
/workspace/coverage/cover_reg_top/56.xbar_smoke.1521021877 |
|
|
Mar 05 03:34:05 PM PST 24 |
Mar 05 03:34:12 PM PST 24 |
54303554 ps |
T1425 |
/workspace/coverage/cover_reg_top/64.xbar_unmapped_addr.3400148260 |
|
|
Mar 05 03:35:57 PM PST 24 |
Mar 05 03:36:09 PM PST 24 |
223201733 ps |
T1426 |
/workspace/coverage/cover_reg_top/32.xbar_stress_all_with_error.2502042300 |
|
|
Mar 05 03:29:08 PM PST 24 |
Mar 05 03:31:35 PM PST 24 |
1929707042 ps |
T1427 |
/workspace/coverage/cover_reg_top/27.xbar_random_zero_delays.3560321867 |
|
|
Mar 05 03:27:40 PM PST 24 |
Mar 05 03:27:47 PM PST 24 |
39770659 ps |
T1428 |
/workspace/coverage/cover_reg_top/55.xbar_random.886804938 |
|
|
Mar 05 03:33:51 PM PST 24 |
Mar 05 03:33:59 PM PST 24 |
126250993 ps |
T1429 |
/workspace/coverage/cover_reg_top/1.xbar_same_source.2448628563 |
|
|
Mar 05 03:15:38 PM PST 24 |
Mar 05 03:16:00 PM PST 24 |
300211276 ps |
T1430 |
/workspace/coverage/cover_reg_top/20.xbar_stress_all_with_error.2348673995 |
|
|
Mar 05 03:25:38 PM PST 24 |
Mar 05 03:26:00 PM PST 24 |
583794716 ps |
T1431 |
/workspace/coverage/cover_reg_top/51.xbar_stress_all_with_error.1470261241 |
|
|
Mar 05 03:33:11 PM PST 24 |
Mar 05 03:37:18 PM PST 24 |
6340816062 ps |
T794 |
/workspace/coverage/cover_reg_top/15.xbar_stress_all_with_rand_reset.2672285772 |
|
|
Mar 05 03:23:38 PM PST 24 |
Mar 05 03:25:46 PM PST 24 |
345109432 ps |
T1432 |
/workspace/coverage/cover_reg_top/43.xbar_stress_all.1109116494 |
|
|
Mar 05 03:31:38 PM PST 24 |
Mar 05 03:36:55 PM PST 24 |
3570113572 ps |
T766 |
/workspace/coverage/cover_reg_top/86.xbar_access_same_device_slow_rsp.3038389626 |
|
|
Mar 05 03:39:36 PM PST 24 |
Mar 05 04:09:18 PM PST 24 |
93930235932 ps |
T1433 |
/workspace/coverage/cover_reg_top/52.xbar_error_random.3640571101 |
|
|
Mar 05 03:33:21 PM PST 24 |
Mar 05 03:34:13 PM PST 24 |
544181299 ps |
T1434 |
/workspace/coverage/cover_reg_top/70.xbar_stress_all.307589863 |
|
|
Mar 05 03:36:52 PM PST 24 |
Mar 05 03:38:13 PM PST 24 |
1113653016 ps |
T1435 |
/workspace/coverage/cover_reg_top/30.xbar_random_large_delays.1993440014 |
|
|
Mar 05 03:28:30 PM PST 24 |
Mar 05 03:38:40 PM PST 24 |
61507408567 ps |
T1436 |
/workspace/coverage/cover_reg_top/17.xbar_smoke_zero_delays.1533092701 |
|
|
Mar 05 03:24:11 PM PST 24 |
Mar 05 03:24:18 PM PST 24 |
40861054 ps |
T1437 |
/workspace/coverage/cover_reg_top/40.xbar_random.2634715413 |
|
|
Mar 05 03:30:56 PM PST 24 |
Mar 05 03:31:36 PM PST 24 |
424887408 ps |
T1438 |
/workspace/coverage/cover_reg_top/79.xbar_random_large_delays.1640983444 |
|
|
Mar 05 03:38:32 PM PST 24 |
Mar 05 03:52:27 PM PST 24 |
73271213018 ps |
T1439 |
/workspace/coverage/cover_reg_top/55.xbar_smoke_slow_rsp.3365140963 |
|
|
Mar 05 03:33:49 PM PST 24 |
Mar 05 03:35:22 PM PST 24 |
5200728365 ps |
T1440 |
/workspace/coverage/cover_reg_top/94.xbar_stress_all_with_reset_error.2526287065 |
|
|
Mar 05 03:41:12 PM PST 24 |
Mar 05 03:42:46 PM PST 24 |
339952674 ps |
T1441 |
/workspace/coverage/cover_reg_top/57.xbar_random.519183513 |
|
|
Mar 05 03:34:18 PM PST 24 |
Mar 05 03:34:28 PM PST 24 |
87982158 ps |
T545 |
/workspace/coverage/cover_reg_top/99.xbar_same_source.3135760485 |
|
|
Mar 05 03:41:48 PM PST 24 |
Mar 05 03:42:21 PM PST 24 |
400737038 ps |
T1442 |
/workspace/coverage/cover_reg_top/44.xbar_unmapped_addr.2789472838 |
|
|
Mar 05 03:31:44 PM PST 24 |
Mar 05 03:31:50 PM PST 24 |
35979010 ps |
T1443 |
/workspace/coverage/cover_reg_top/15.xbar_access_same_device.1305354193 |
|
|
Mar 05 03:23:30 PM PST 24 |
Mar 05 03:25:52 PM PST 24 |
2915859156 ps |
T1444 |
/workspace/coverage/cover_reg_top/32.xbar_access_same_device.3328916585 |
|
|
Mar 05 03:29:07 PM PST 24 |
Mar 05 03:29:18 PM PST 24 |
80703165 ps |
T1445 |
/workspace/coverage/cover_reg_top/13.xbar_stress_all_with_reset_error.1179360800 |
|
|
Mar 05 03:22:44 PM PST 24 |
Mar 05 03:27:26 PM PST 24 |
832227570 ps |
T1446 |
/workspace/coverage/cover_reg_top/42.xbar_smoke_zero_delays.1208508554 |
|
|
Mar 05 03:31:13 PM PST 24 |
Mar 05 03:31:20 PM PST 24 |
48206646 ps |
T1447 |
/workspace/coverage/cover_reg_top/9.xbar_random_zero_delays.3184643546 |
|
|
Mar 05 03:20:36 PM PST 24 |
Mar 05 03:21:22 PM PST 24 |
576313441 ps |
T1448 |
/workspace/coverage/cover_reg_top/91.xbar_unmapped_addr.1013106906 |
|
|
Mar 05 03:40:38 PM PST 24 |
Mar 05 03:41:03 PM PST 24 |
536493683 ps |
T428 |
/workspace/coverage/cover_reg_top/6.chip_csr_rw.2615974815 |
|
|
Mar 05 03:19:22 PM PST 24 |
Mar 05 03:28:47 PM PST 24 |
6280296546 ps |
T1449 |
/workspace/coverage/cover_reg_top/77.xbar_random_slow_rsp.2731790062 |
|
|
Mar 05 03:38:01 PM PST 24 |
Mar 05 03:47:19 PM PST 24 |
29297143844 ps |
T1450 |
/workspace/coverage/cover_reg_top/1.xbar_unmapped_addr.699055560 |
|
|
Mar 05 03:15:45 PM PST 24 |
Mar 05 03:16:17 PM PST 24 |
675028787 ps |
T1451 |
/workspace/coverage/cover_reg_top/15.xbar_smoke_slow_rsp.1040565305 |
|
|
Mar 05 03:23:23 PM PST 24 |
Mar 05 03:25:05 PM PST 24 |
5852040667 ps |
T1452 |
/workspace/coverage/cover_reg_top/5.xbar_access_same_device.3522433496 |
|
|
Mar 05 03:18:46 PM PST 24 |
Mar 05 03:19:04 PM PST 24 |
221289887 ps |
T549 |
/workspace/coverage/cover_reg_top/78.xbar_random.2482617541 |
|
|
Mar 05 03:38:30 PM PST 24 |
Mar 05 03:39:10 PM PST 24 |
1061032865 ps |
T781 |
/workspace/coverage/cover_reg_top/67.xbar_stress_all_with_error.356813776 |
|
|
Mar 05 03:36:27 PM PST 24 |
Mar 05 03:45:05 PM PST 24 |
13027697307 ps |
T771 |
/workspace/coverage/cover_reg_top/57.xbar_access_same_device.637852258 |
|
|
Mar 05 03:34:20 PM PST 24 |
Mar 05 03:36:18 PM PST 24 |
3000485426 ps |
T1453 |
/workspace/coverage/cover_reg_top/79.xbar_stress_all.1788497094 |
|
|
Mar 05 03:38:34 PM PST 24 |
Mar 05 03:38:40 PM PST 24 |
44314455 ps |
T1454 |
/workspace/coverage/cover_reg_top/49.xbar_access_same_device.2341327542 |
|
|
Mar 05 03:32:42 PM PST 24 |
Mar 05 03:33:19 PM PST 24 |
808044636 ps |
T1455 |
/workspace/coverage/cover_reg_top/29.xbar_random_zero_delays.3377885811 |
|
|
Mar 05 03:28:10 PM PST 24 |
Mar 05 03:28:31 PM PST 24 |
207264582 ps |
T1456 |
/workspace/coverage/cover_reg_top/41.xbar_random_slow_rsp.1259424221 |
|
|
Mar 05 03:31:04 PM PST 24 |
Mar 05 03:43:05 PM PST 24 |
39325774889 ps |
T585 |
/workspace/coverage/cover_reg_top/69.xbar_random_zero_delays.1606144723 |
|
|
Mar 05 03:36:39 PM PST 24 |
Mar 05 03:37:32 PM PST 24 |
600267208 ps |
T1457 |
/workspace/coverage/cover_reg_top/29.xbar_stress_all_with_reset_error.2673509776 |
|
|
Mar 05 03:28:24 PM PST 24 |
Mar 05 03:30:01 PM PST 24 |
294356513 ps |
T1458 |
/workspace/coverage/cover_reg_top/0.xbar_random_large_delays.3801029731 |
|
|
Mar 05 03:14:28 PM PST 24 |
Mar 05 03:19:22 PM PST 24 |
28686440750 ps |
T1459 |
/workspace/coverage/cover_reg_top/25.xbar_stress_all_with_reset_error.3595628661 |
|
|
Mar 05 03:27:18 PM PST 24 |
Mar 05 03:33:20 PM PST 24 |
2784553454 ps |
T1460 |
/workspace/coverage/cover_reg_top/17.xbar_error_random.3951380636 |
|
|
Mar 05 03:24:26 PM PST 24 |
Mar 05 03:25:09 PM PST 24 |
1158189916 ps |
T1461 |
/workspace/coverage/cover_reg_top/89.xbar_random.2947934734 |
|
|
Mar 05 03:40:04 PM PST 24 |
Mar 05 03:40:35 PM PST 24 |
313120643 ps |
T1462 |
/workspace/coverage/cover_reg_top/58.xbar_access_same_device.3441487295 |
|
|
Mar 05 03:34:38 PM PST 24 |
Mar 05 03:35:35 PM PST 24 |
894467502 ps |
T579 |
/workspace/coverage/cover_reg_top/51.xbar_random_large_delays.2367924499 |
|
|
Mar 05 03:33:06 PM PST 24 |
Mar 05 03:50:09 PM PST 24 |
79265234308 ps |
T1463 |
/workspace/coverage/cover_reg_top/10.xbar_stress_all_with_error.1700271736 |
|
|
Mar 05 03:21:11 PM PST 24 |
Mar 05 03:23:14 PM PST 24 |
2781999787 ps |
T1464 |
/workspace/coverage/cover_reg_top/72.xbar_smoke.3914800612 |
|
|
Mar 05 03:37:06 PM PST 24 |
Mar 05 03:37:14 PM PST 24 |
48688297 ps |
T1465 |
/workspace/coverage/cover_reg_top/66.xbar_stress_all_with_error.3445999652 |
|
|
Mar 05 03:36:11 PM PST 24 |
Mar 05 03:39:33 PM PST 24 |
5092760340 ps |
T1466 |
/workspace/coverage/cover_reg_top/84.xbar_error_and_unmapped_addr.111340624 |
|
|
Mar 05 03:39:21 PM PST 24 |
Mar 05 03:39:36 PM PST 24 |
328385248 ps |
T1467 |
/workspace/coverage/cover_reg_top/58.xbar_smoke_zero_delays.1018239629 |
|
|
Mar 05 03:34:29 PM PST 24 |
Mar 05 03:34:37 PM PST 24 |
55086746 ps |
T1468 |
/workspace/coverage/cover_reg_top/44.xbar_smoke.2151615728 |
|
|
Mar 05 03:31:34 PM PST 24 |
Mar 05 03:31:40 PM PST 24 |
43005141 ps |
T1469 |
/workspace/coverage/cover_reg_top/23.xbar_access_same_device.3162200697 |
|
|
Mar 05 03:26:34 PM PST 24 |
Mar 05 03:26:51 PM PST 24 |
192543841 ps |
T770 |
/workspace/coverage/cover_reg_top/7.xbar_access_same_device.2429925328 |
|
|
Mar 05 03:19:38 PM PST 24 |
Mar 05 03:21:39 PM PST 24 |
2966163515 ps |
T1470 |
/workspace/coverage/cover_reg_top/41.xbar_smoke_large_delays.97004398 |
|
|
Mar 05 03:30:57 PM PST 24 |
Mar 05 03:32:11 PM PST 24 |
6865466085 ps |
T803 |
/workspace/coverage/cover_reg_top/48.xbar_stress_all_with_reset_error.3719448952 |
|
|
Mar 05 03:32:41 PM PST 24 |
Mar 05 03:36:49 PM PST 24 |
993207835 ps |
T1471 |
/workspace/coverage/cover_reg_top/17.xbar_random.1282692212 |
|
|
Mar 05 03:24:11 PM PST 24 |
Mar 05 03:24:46 PM PST 24 |
764024367 ps |
T413 |
/workspace/coverage/cover_reg_top/12.chip_same_csr_outstanding.3607868710 |
|
|
Mar 05 03:21:57 PM PST 24 |
Mar 05 04:25:43 PM PST 24 |
29905171662 ps |
T1472 |
/workspace/coverage/cover_reg_top/15.xbar_random_slow_rsp.3662749545 |
|
|
Mar 05 03:23:29 PM PST 24 |
Mar 05 03:35:11 PM PST 24 |
39569055562 ps |
T1473 |
/workspace/coverage/cover_reg_top/51.xbar_same_source.3690573210 |
|
|
Mar 05 03:33:11 PM PST 24 |
Mar 05 03:33:22 PM PST 24 |
87354886 ps |
T1474 |
/workspace/coverage/cover_reg_top/75.xbar_error_and_unmapped_addr.3237855543 |
|
|
Mar 05 03:37:54 PM PST 24 |
Mar 05 03:38:33 PM PST 24 |
322007392 ps |
T1475 |
/workspace/coverage/cover_reg_top/49.xbar_error_and_unmapped_addr.3603286377 |
|
|
Mar 05 03:32:55 PM PST 24 |
Mar 05 03:33:13 PM PST 24 |
138764795 ps |
T1476 |
/workspace/coverage/cover_reg_top/1.xbar_smoke_zero_delays.1242320183 |
|
|
Mar 05 03:15:22 PM PST 24 |
Mar 05 03:15:29 PM PST 24 |
47371815 ps |
T459 |
/workspace/coverage/cover_reg_top/95.xbar_random_slow_rsp.282851322 |
|
|
Mar 05 03:41:16 PM PST 24 |
Mar 05 03:45:53 PM PST 24 |
14422594289 ps |
T1477 |
/workspace/coverage/cover_reg_top/7.xbar_error_random.401224921 |
|
|
Mar 05 03:19:43 PM PST 24 |
Mar 05 03:19:59 PM PST 24 |
362395754 ps |
T1478 |
/workspace/coverage/cover_reg_top/56.xbar_stress_all_with_error.3601334450 |
|
|
Mar 05 03:34:12 PM PST 24 |
Mar 05 03:40:01 PM PST 24 |
9099237262 ps |
T758 |
/workspace/coverage/cover_reg_top/21.xbar_access_same_device_slow_rsp.11996203 |
|
|
Mar 05 03:25:54 PM PST 24 |
Mar 05 03:42:05 PM PST 24 |
57504022564 ps |
T784 |
/workspace/coverage/cover_reg_top/14.xbar_access_same_device.1231579339 |
|
|
Mar 05 03:23:07 PM PST 24 |
Mar 05 03:24:29 PM PST 24 |
1823703717 ps |
T1479 |
/workspace/coverage/cover_reg_top/30.xbar_error_random.1748506375 |
|
|
Mar 05 03:28:39 PM PST 24 |
Mar 05 03:28:52 PM PST 24 |
138051174 ps |
T816 |
/workspace/coverage/cover_reg_top/52.xbar_stress_all_with_reset_error.1331979166 |
|
|
Mar 05 03:33:25 PM PST 24 |
Mar 05 03:37:15 PM PST 24 |
729068051 ps |
T1480 |
/workspace/coverage/cover_reg_top/31.xbar_random_zero_delays.3427577577 |
|
|
Mar 05 03:28:46 PM PST 24 |
Mar 05 03:29:01 PM PST 24 |
150971608 ps |
T1481 |
/workspace/coverage/cover_reg_top/27.xbar_error_and_unmapped_addr.3798928888 |
|
|
Mar 05 03:27:56 PM PST 24 |
Mar 05 03:28:03 PM PST 24 |
73497086 ps |
T808 |
/workspace/coverage/cover_reg_top/91.xbar_stress_all_with_reset_error.3853119360 |
|
|
Mar 05 03:40:32 PM PST 24 |
Mar 05 03:43:14 PM PST 24 |
890660105 ps |
T1482 |
/workspace/coverage/cover_reg_top/58.xbar_error_random.896762937 |
|
|
Mar 05 03:34:36 PM PST 24 |
Mar 05 03:35:18 PM PST 24 |
1129002907 ps |
T1483 |
/workspace/coverage/cover_reg_top/59.xbar_random.4006568594 |
|
|
Mar 05 03:34:39 PM PST 24 |
Mar 05 03:35:22 PM PST 24 |
1035667332 ps |
T444 |
/workspace/coverage/cover_reg_top/1.xbar_stress_all.1193640267 |
|
|
Mar 05 03:15:48 PM PST 24 |
Mar 05 03:18:50 PM PST 24 |
2006813223 ps |
T1484 |
/workspace/coverage/cover_reg_top/21.xbar_error_random.1929331660 |
|
|
Mar 05 03:25:54 PM PST 24 |
Mar 05 03:26:05 PM PST 24 |
99554257 ps |
T1485 |
/workspace/coverage/cover_reg_top/8.xbar_error_and_unmapped_addr.2770546877 |
|
|
Mar 05 03:20:11 PM PST 24 |
Mar 05 03:20:32 PM PST 24 |
431453271 ps |
T785 |
/workspace/coverage/cover_reg_top/58.xbar_stress_all_with_error.2573509921 |
|
|
Mar 05 03:34:38 PM PST 24 |
Mar 05 03:41:15 PM PST 24 |
12529419821 ps |
T1486 |
/workspace/coverage/cover_reg_top/23.xbar_smoke_slow_rsp.1609902431 |
|
|
Mar 05 03:26:31 PM PST 24 |
Mar 05 03:28:14 PM PST 24 |
6562207886 ps |
T1487 |
/workspace/coverage/cover_reg_top/8.xbar_stress_all_with_error.1718529431 |
|
|
Mar 05 03:20:19 PM PST 24 |
Mar 05 03:28:01 PM PST 24 |
13043513870 ps |
T759 |
/workspace/coverage/cover_reg_top/11.xbar_access_same_device_slow_rsp.1101282166 |
|
|
Mar 05 03:21:33 PM PST 24 |
Mar 05 03:37:13 PM PST 24 |
59484163880 ps |
T800 |
/workspace/coverage/cover_reg_top/73.xbar_stress_all_with_rand_reset.728777165 |
|
|
Mar 05 03:37:29 PM PST 24 |
Mar 05 03:44:35 PM PST 24 |
3123855658 ps |
T1488 |
/workspace/coverage/cover_reg_top/81.xbar_stress_all_with_reset_error.3569981099 |
|
|
Mar 05 03:38:55 PM PST 24 |
Mar 05 03:39:58 PM PST 24 |
89586098 ps |
T1489 |
/workspace/coverage/cover_reg_top/16.xbar_smoke.103501036 |
|
|
Mar 05 03:23:46 PM PST 24 |
Mar 05 03:23:55 PM PST 24 |
185420765 ps |
T1490 |
/workspace/coverage/cover_reg_top/81.xbar_random.4273437758 |
|
|
Mar 05 03:38:47 PM PST 24 |
Mar 05 03:39:06 PM PST 24 |
425121361 ps |
T1491 |
/workspace/coverage/cover_reg_top/5.xbar_smoke_large_delays.2692797614 |
|
|
Mar 05 03:18:24 PM PST 24 |
Mar 05 03:19:49 PM PST 24 |
8127338705 ps |
T1492 |
/workspace/coverage/cover_reg_top/99.xbar_unmapped_addr.1135483991 |
|
|
Mar 05 03:41:49 PM PST 24 |
Mar 05 03:42:29 PM PST 24 |
984014680 ps |
T1493 |
/workspace/coverage/cover_reg_top/44.xbar_error_random.2366728370 |
|
|
Mar 05 03:31:36 PM PST 24 |
Mar 05 03:31:46 PM PST 24 |
241448410 ps |
T795 |
/workspace/coverage/cover_reg_top/61.xbar_stress_all_with_reset_error.2263760445 |
|
|
Mar 05 03:35:15 PM PST 24 |
Mar 05 03:40:36 PM PST 24 |
4741369012 ps |
T1494 |
/workspace/coverage/cover_reg_top/76.xbar_random_slow_rsp.3548309367 |
|
|
Mar 05 03:37:51 PM PST 24 |
Mar 05 03:40:44 PM PST 24 |
9737074208 ps |
T1495 |
/workspace/coverage/cover_reg_top/52.xbar_random.558284187 |
|
|
Mar 05 03:33:21 PM PST 24 |
Mar 05 03:34:28 PM PST 24 |
1614083771 ps |
T1496 |
/workspace/coverage/cover_reg_top/96.xbar_error_random.75438929 |
|
|
Mar 05 03:41:26 PM PST 24 |
Mar 05 03:41:37 PM PST 24 |
222549644 ps |
T1497 |
/workspace/coverage/cover_reg_top/76.xbar_access_same_device.2332013651 |
|
|
Mar 05 03:37:50 PM PST 24 |
Mar 05 03:39:03 PM PST 24 |
1563877345 ps |
T1498 |
/workspace/coverage/cover_reg_top/25.xbar_access_same_device.1030555105 |
|
|
Mar 05 03:27:09 PM PST 24 |
Mar 05 03:27:57 PM PST 24 |
1222723140 ps |
T1499 |
/workspace/coverage/cover_reg_top/72.xbar_same_source.2828330638 |
|
|
Mar 05 03:37:14 PM PST 24 |
Mar 05 03:38:34 PM PST 24 |
2426210081 ps |
T1500 |
/workspace/coverage/cover_reg_top/99.xbar_stress_all_with_error.584352577 |
|
|
Mar 05 03:42:00 PM PST 24 |
Mar 05 03:42:05 PM PST 24 |
6477947 ps |
T1501 |
/workspace/coverage/cover_reg_top/66.xbar_smoke.1755787123 |
|
|
Mar 05 03:36:06 PM PST 24 |
Mar 05 03:36:11 PM PST 24 |
38811587 ps |
T1502 |
/workspace/coverage/cover_reg_top/39.xbar_random_zero_delays.3034071944 |
|
|
Mar 05 03:30:39 PM PST 24 |
Mar 05 03:30:57 PM PST 24 |
180175195 ps |
T1503 |
/workspace/coverage/cover_reg_top/1.xbar_stress_all_with_rand_reset.3076567468 |
|
|
Mar 05 03:15:46 PM PST 24 |
Mar 05 03:19:38 PM PST 24 |
650912761 ps |
T1504 |
/workspace/coverage/cover_reg_top/60.xbar_smoke.3676597413 |
|
|
Mar 05 03:34:53 PM PST 24 |
Mar 05 03:35:03 PM PST 24 |
169699382 ps |
T1505 |
/workspace/coverage/cover_reg_top/71.xbar_same_source.4098895634 |
|
|
Mar 05 03:37:00 PM PST 24 |
Mar 05 03:37:12 PM PST 24 |
133453883 ps |
T1506 |
/workspace/coverage/cover_reg_top/61.xbar_access_same_device.3910797002 |
|
|
Mar 05 03:35:20 PM PST 24 |
Mar 05 03:35:32 PM PST 24 |
140008067 ps |
T1507 |
/workspace/coverage/cover_reg_top/37.xbar_stress_all_with_rand_reset.1089802449 |
|
|
Mar 05 03:30:18 PM PST 24 |
Mar 05 03:31:02 PM PST 24 |
111087699 ps |
T1508 |
/workspace/coverage/cover_reg_top/59.xbar_random_zero_delays.1244573638 |
|
|
Mar 05 03:34:38 PM PST 24 |
Mar 05 03:35:26 PM PST 24 |
561915222 ps |
T1509 |
/workspace/coverage/cover_reg_top/81.xbar_smoke_zero_delays.3863991974 |
|
|
Mar 05 03:38:48 PM PST 24 |
Mar 05 03:38:54 PM PST 24 |
45615789 ps |
T1510 |
/workspace/coverage/cover_reg_top/24.xbar_same_source.3173713349 |
|
|
Mar 05 03:26:55 PM PST 24 |
Mar 05 03:28:05 PM PST 24 |
2154461157 ps |
T1511 |
/workspace/coverage/cover_reg_top/47.xbar_random_large_delays.714786003 |
|
|
Mar 05 03:32:20 PM PST 24 |
Mar 05 03:34:29 PM PST 24 |
13176238086 ps |
T1512 |
/workspace/coverage/cover_reg_top/70.xbar_access_same_device.4140456035 |
|
|
Mar 05 03:36:51 PM PST 24 |
Mar 05 03:39:09 PM PST 24 |
3198612536 ps |
T1513 |
/workspace/coverage/cover_reg_top/28.xbar_random_zero_delays.320989161 |
|
|
Mar 05 03:28:04 PM PST 24 |
Mar 05 03:28:34 PM PST 24 |
350859720 ps |
T498 |
/workspace/coverage/cover_reg_top/16.chip_tl_errors.961933649 |
|
|
Mar 05 03:23:49 PM PST 24 |
Mar 05 03:28:48 PM PST 24 |
3202197840 ps |
T782 |
/workspace/coverage/cover_reg_top/96.xbar_access_same_device_slow_rsp.3379150104 |
|
|
Mar 05 03:41:19 PM PST 24 |
Mar 05 04:30:26 PM PST 24 |
163124838220 ps |
T1514 |
/workspace/coverage/cover_reg_top/28.xbar_smoke_slow_rsp.3641373989 |
|
|
Mar 05 03:28:02 PM PST 24 |
Mar 05 03:29:56 PM PST 24 |
6223274636 ps |
T517 |
/workspace/coverage/cover_reg_top/1.chip_tl_errors.1790131358 |
|
|
Mar 05 03:15:26 PM PST 24 |
Mar 05 03:18:14 PM PST 24 |
3256362964 ps |
T1515 |
/workspace/coverage/cover_reg_top/15.xbar_random_zero_delays.2603001589 |
|
|
Mar 05 03:23:21 PM PST 24 |
Mar 05 03:23:43 PM PST 24 |
226255818 ps |
T1516 |
/workspace/coverage/cover_reg_top/3.xbar_random_large_delays.1778125101 |
|
|
Mar 05 03:17:25 PM PST 24 |
Mar 05 03:23:28 PM PST 24 |
34166558226 ps |
T1517 |
/workspace/coverage/cover_reg_top/19.xbar_random_zero_delays.2162901995 |
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|
Mar 05 03:25:04 PM PST 24 |
Mar 05 03:25:30 PM PST 24 |
222400860 ps |
T1518 |
/workspace/coverage/cover_reg_top/55.xbar_stress_all.4012205892 |
|
|
Mar 05 03:34:00 PM PST 24 |
Mar 05 03:48:54 PM PST 24 |
20870083011 ps |
T1519 |
/workspace/coverage/cover_reg_top/8.xbar_random_zero_delays.2626246790 |
|
|
Mar 05 03:19:58 PM PST 24 |
Mar 05 03:20:06 PM PST 24 |
36401827 ps |
T1520 |
/workspace/coverage/cover_reg_top/66.xbar_unmapped_addr.2714953908 |
|
|
Mar 05 03:36:12 PM PST 24 |
Mar 05 03:37:11 PM PST 24 |
1317672693 ps |
T1521 |
/workspace/coverage/cover_reg_top/63.xbar_error_and_unmapped_addr.225834295 |
|
|
Mar 05 03:35:45 PM PST 24 |
Mar 05 03:36:19 PM PST 24 |
316989831 ps |
T1522 |
/workspace/coverage/cover_reg_top/31.xbar_error_and_unmapped_addr.990560999 |
|
|
Mar 05 03:29:00 PM PST 24 |
Mar 05 03:29:23 PM PST 24 |
246352304 ps |
T1523 |
/workspace/coverage/cover_reg_top/84.xbar_access_same_device.2395994911 |
|
|
Mar 05 03:39:14 PM PST 24 |
Mar 05 03:41:32 PM PST 24 |
3374235105 ps |
T1524 |
/workspace/coverage/cover_reg_top/48.xbar_random.1341220364 |
|
|
Mar 05 03:32:31 PM PST 24 |
Mar 05 03:33:08 PM PST 24 |
918587429 ps |
T1525 |
/workspace/coverage/cover_reg_top/88.xbar_random_zero_delays.3884029807 |
|
|
Mar 05 03:40:05 PM PST 24 |
Mar 05 03:40:19 PM PST 24 |
138604208 ps |
T1526 |
/workspace/coverage/cover_reg_top/41.xbar_access_same_device_slow_rsp.854587560 |
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|
Mar 05 03:31:07 PM PST 24 |
Mar 05 03:59:33 PM PST 24 |
93727835407 ps |
T1527 |
/workspace/coverage/cover_reg_top/43.xbar_random_zero_delays.4135264312 |
|
|
Mar 05 03:31:29 PM PST 24 |
Mar 05 03:31:38 PM PST 24 |
67199264 ps |
T1528 |
/workspace/coverage/cover_reg_top/83.xbar_random.3776026172 |
|
|
Mar 05 03:39:10 PM PST 24 |
Mar 05 03:39:16 PM PST 24 |
31432079 ps |
T1529 |
/workspace/coverage/cover_reg_top/19.xbar_random_slow_rsp.1670064626 |
|
|
Mar 05 03:25:02 PM PST 24 |
Mar 05 03:41:29 PM PST 24 |
58573053973 ps |
T1530 |
/workspace/coverage/cover_reg_top/6.xbar_unmapped_addr.4039882171 |
|
|
Mar 05 03:19:13 PM PST 24 |
Mar 05 03:19:53 PM PST 24 |
851691959 ps |
T1531 |
/workspace/coverage/cover_reg_top/79.xbar_smoke_large_delays.2745599956 |
|
|
Mar 05 03:38:25 PM PST 24 |
Mar 05 03:39:58 PM PST 24 |
8621501806 ps |
T1532 |
/workspace/coverage/cover_reg_top/27.xbar_stress_all.2891119896 |
|
|
Mar 05 03:27:56 PM PST 24 |
Mar 05 03:30:28 PM PST 24 |
1831239847 ps |
T1533 |
/workspace/coverage/cover_reg_top/12.xbar_smoke_slow_rsp.79332283 |
|
|
Mar 05 03:22:04 PM PST 24 |
Mar 05 03:23:13 PM PST 24 |
4078155773 ps |
T1534 |
/workspace/coverage/cover_reg_top/10.xbar_random_zero_delays.513949477 |
|
|
Mar 05 03:20:55 PM PST 24 |
Mar 05 03:21:43 PM PST 24 |
515129256 ps |
T546 |
/workspace/coverage/cover_reg_top/20.chip_tl_errors.509523710 |
|
|
Mar 05 03:25:19 PM PST 24 |
Mar 05 03:29:01 PM PST 24 |
3099679268 ps |
T1535 |
/workspace/coverage/cover_reg_top/86.xbar_unmapped_addr.2738391952 |
|
|
Mar 05 03:39:36 PM PST 24 |
Mar 05 03:40:08 PM PST 24 |
271372963 ps |
T457 |
/workspace/coverage/cover_reg_top/4.xbar_stress_all.2097871064 |
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|
Mar 05 03:18:21 PM PST 24 |
Mar 05 03:21:18 PM PST 24 |
4547074437 ps |
T1536 |
/workspace/coverage/cover_reg_top/99.xbar_access_same_device.3675020960 |
|
|
Mar 05 03:41:56 PM PST 24 |
Mar 05 03:43:24 PM PST 24 |
2145551469 ps |
T1537 |
/workspace/coverage/cover_reg_top/32.xbar_error_and_unmapped_addr.4129310986 |
|
|
Mar 05 03:29:08 PM PST 24 |
Mar 05 03:30:04 PM PST 24 |
1227519590 ps |
T1538 |
/workspace/coverage/cover_reg_top/93.xbar_access_same_device_slow_rsp.2746332465 |
|
|
Mar 05 03:40:46 PM PST 24 |
Mar 05 03:41:34 PM PST 24 |
2685674016 ps |
T1539 |
/workspace/coverage/cover_reg_top/30.xbar_same_source.2040161734 |
|
|
Mar 05 03:28:31 PM PST 24 |
Mar 05 03:29:34 PM PST 24 |
2050949866 ps |
T799 |
/workspace/coverage/cover_reg_top/19.xbar_stress_all_with_reset_error.3426394868 |
|
|
Mar 05 03:25:10 PM PST 24 |
Mar 05 03:31:53 PM PST 24 |
6049070630 ps |
T426 |
/workspace/coverage/cover_reg_top/1.chip_same_csr_outstanding.1174474943 |
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|
Mar 05 03:15:14 PM PST 24 |
Mar 05 04:19:58 PM PST 24 |
32799153384 ps |
T1540 |
/workspace/coverage/cover_reg_top/21.xbar_random_slow_rsp.2901194799 |
|
|
Mar 05 03:25:43 PM PST 24 |
Mar 05 03:38:54 PM PST 24 |
45950034859 ps |
T1541 |
/workspace/coverage/cover_reg_top/4.xbar_random_large_delays.3740780946 |
|
|
Mar 05 03:18:10 PM PST 24 |
Mar 05 03:24:35 PM PST 24 |
31166376201 ps |
T1542 |
/workspace/coverage/cover_reg_top/2.xbar_random_zero_delays.1370091896 |
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|
Mar 05 03:16:29 PM PST 24 |
Mar 05 03:17:12 PM PST 24 |
420391180 ps |
T804 |
/workspace/coverage/cover_reg_top/5.xbar_stress_all_with_reset_error.1622311108 |
|
|
Mar 05 03:18:54 PM PST 24 |
Mar 05 03:20:04 PM PST 24 |
245081929 ps |
T573 |
/workspace/coverage/cover_reg_top/10.chip_tl_errors.594459319 |
|
|
Mar 05 03:20:56 PM PST 24 |
Mar 05 03:28:50 PM PST 24 |
4919682571 ps |