Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.07 95.45 94.14 95.17 94.70 97.38 99.55


Total test records in report: 2845
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html | tests28.html | tests29.html | tests30.html | tests31.html | tests32.html | tests33.html | tests34.html | tests35.html | tests36.html | tests37.html | tests38.html | tests39.html | tests40.html | tests41.html | tests42.html | tests43.html | tests44.html | tests45.html | tests46.html | tests47.html | tests48.html | tests49.html | tests50.html | tests51.html | tests52.html | tests53.html | tests54.html | tests55.html | tests56.html | tests57.html | tests58.html | tests59.html | tests60.html
T1775 /workspace/coverage/cover_reg_top/7.xbar_smoke_large_delays.1773998386 Mar 05 03:19:26 PM PST 24 Mar 05 03:20:59 PM PST 24 8669370601 ps
T1776 /workspace/coverage/cover_reg_top/9.xbar_same_source.3150628535 Mar 05 03:20:42 PM PST 24 Mar 05 03:21:59 PM PST 24 2393468389 ps
T1777 /workspace/coverage/cover_reg_top/75.xbar_unmapped_addr.1622896169 Mar 05 03:37:51 PM PST 24 Mar 05 03:38:11 PM PST 24 165624024 ps
T1778 /workspace/coverage/cover_reg_top/61.xbar_access_same_device_slow_rsp.1748024532 Mar 05 03:35:17 PM PST 24 Mar 05 04:07:58 PM PST 24 107659408204 ps
T1779 /workspace/coverage/cover_reg_top/11.chip_csr_rw.3667867834 Mar 05 03:21:49 PM PST 24 Mar 05 03:26:31 PM PST 24 4117831624 ps
T1780 /workspace/coverage/cover_reg_top/93.xbar_smoke.2431976765 Mar 05 03:40:47 PM PST 24 Mar 05 03:40:53 PM PST 24 45897334 ps
T1781 /workspace/coverage/cover_reg_top/32.xbar_smoke.629479601 Mar 05 03:29:01 PM PST 24 Mar 05 03:29:09 PM PST 24 179066412 ps
T1782 /workspace/coverage/cover_reg_top/43.xbar_random_slow_rsp.1910050362 Mar 05 03:31:26 PM PST 24 Mar 05 03:45:14 PM PST 24 49562292756 ps
T1783 /workspace/coverage/cover_reg_top/15.xbar_error_and_unmapped_addr.4098157183 Mar 05 03:23:38 PM PST 24 Mar 05 03:24:11 PM PST 24 935744985 ps
T1784 /workspace/coverage/cover_reg_top/82.xbar_access_same_device_slow_rsp.1936327176 Mar 05 03:38:56 PM PST 24 Mar 05 04:02:12 PM PST 24 74107544095 ps
T1785 /workspace/coverage/cover_reg_top/46.xbar_error_and_unmapped_addr.2756548449 Mar 05 03:32:07 PM PST 24 Mar 05 03:32:27 PM PST 24 417325545 ps
T791 /workspace/coverage/cover_reg_top/36.xbar_stress_all_with_rand_reset.2194697595 Mar 05 03:30:02 PM PST 24 Mar 05 03:37:49 PM PST 24 4896262980 ps
T1786 /workspace/coverage/cover_reg_top/21.xbar_access_same_device.877753582 Mar 05 03:25:55 PM PST 24 Mar 05 03:27:53 PM PST 24 2704101522 ps
T627 /workspace/coverage/cover_reg_top/19.chip_tl_errors.3519422692 Mar 05 03:24:57 PM PST 24 Mar 05 03:31:32 PM PST 24 4900171311 ps
T1787 /workspace/coverage/cover_reg_top/51.xbar_access_same_device_slow_rsp.3894994326 Mar 05 03:33:03 PM PST 24 Mar 05 04:09:57 PM PST 24 115015787734 ps
T1788 /workspace/coverage/cover_reg_top/11.xbar_stress_all_with_error.1228488605 Mar 05 03:21:50 PM PST 24 Mar 05 03:28:01 PM PST 24 11475095379 ps
T1789 /workspace/coverage/cover_reg_top/90.xbar_stress_all.3306519733 Mar 05 03:40:22 PM PST 24 Mar 05 03:43:12 PM PST 24 4495270983 ps
T1790 /workspace/coverage/cover_reg_top/20.xbar_smoke.999747698 Mar 05 03:25:19 PM PST 24 Mar 05 03:25:25 PM PST 24 41812135 ps
T1791 /workspace/coverage/cover_reg_top/13.xbar_stress_all.2499989403 Mar 05 03:22:38 PM PST 24 Mar 05 03:31:41 PM PST 24 13576567362 ps
T1792 /workspace/coverage/cover_reg_top/92.xbar_random.3544907457 Mar 05 03:40:45 PM PST 24 Mar 05 03:42:01 PM PST 24 2127006294 ps
T1793 /workspace/coverage/cover_reg_top/11.xbar_error_and_unmapped_addr.2210944437 Mar 05 03:21:32 PM PST 24 Mar 05 03:22:06 PM PST 24 730711155 ps
T1794 /workspace/coverage/cover_reg_top/58.xbar_random_slow_rsp.1483150472 Mar 05 03:34:30 PM PST 24 Mar 05 03:52:10 PM PST 24 56167424231 ps
T1795 /workspace/coverage/cover_reg_top/0.xbar_random_slow_rsp.1992826797 Mar 05 03:14:35 PM PST 24 Mar 05 03:29:02 PM PST 24 53706980703 ps
T626 /workspace/coverage/cover_reg_top/12.chip_tl_errors.2314760231 Mar 05 03:22:05 PM PST 24 Mar 05 03:26:19 PM PST 24 3728119917 ps
T1796 /workspace/coverage/cover_reg_top/70.xbar_random_slow_rsp.100059572 Mar 05 03:36:50 PM PST 24 Mar 05 03:54:44 PM PST 24 58531066662 ps
T1797 /workspace/coverage/cover_reg_top/70.xbar_random_large_delays.712084801 Mar 05 03:36:48 PM PST 24 Mar 05 03:53:35 PM PST 24 90838933364 ps
T1798 /workspace/coverage/cover_reg_top/97.xbar_random.3788958670 Mar 05 03:41:26 PM PST 24 Mar 05 03:42:00 PM PST 24 380967779 ps
T1799 /workspace/coverage/cover_reg_top/50.xbar_smoke_large_delays.4134521587 Mar 05 03:32:49 PM PST 24 Mar 05 03:34:16 PM PST 24 8701962344 ps
T1800 /workspace/coverage/cover_reg_top/72.xbar_error_and_unmapped_addr.2152044260 Mar 05 03:37:11 PM PST 24 Mar 05 03:37:17 PM PST 24 64198678 ps
T1801 /workspace/coverage/cover_reg_top/19.xbar_random_large_delays.2242074028 Mar 05 03:25:00 PM PST 24 Mar 05 03:30:11 PM PST 24 27785508001 ps
T1802 /workspace/coverage/cover_reg_top/75.xbar_random_slow_rsp.2597647675 Mar 05 03:37:44 PM PST 24 Mar 05 03:56:38 PM PST 24 61145177240 ps
T1803 /workspace/coverage/cover_reg_top/14.xbar_error_and_unmapped_addr.384257439 Mar 05 03:23:17 PM PST 24 Mar 05 03:23:42 PM PST 24 197401301 ps
T1804 /workspace/coverage/cover_reg_top/78.xbar_access_same_device.310912530 Mar 05 03:38:14 PM PST 24 Mar 05 03:40:21 PM PST 24 2991519050 ps
T1805 /workspace/coverage/cover_reg_top/94.xbar_stress_all.1788791352 Mar 05 03:41:05 PM PST 24 Mar 05 03:45:12 PM PST 24 2911662678 ps
T1806 /workspace/coverage/cover_reg_top/10.xbar_smoke_slow_rsp.1205032580 Mar 05 03:20:57 PM PST 24 Mar 05 03:22:35 PM PST 24 5592056603 ps
T1807 /workspace/coverage/cover_reg_top/1.chip_prim_tl_access.1199869818 Mar 05 03:15:25 PM PST 24 Mar 05 03:21:36 PM PST 24 8380093200 ps
T1808 /workspace/coverage/cover_reg_top/16.xbar_smoke_zero_delays.2291598781 Mar 05 03:23:46 PM PST 24 Mar 05 03:23:51 PM PST 24 36943190 ps
T1809 /workspace/coverage/cover_reg_top/70.xbar_smoke_zero_delays.2963718223 Mar 05 03:36:42 PM PST 24 Mar 05 03:36:50 PM PST 24 53869939 ps
T1810 /workspace/coverage/cover_reg_top/70.xbar_smoke_large_delays.3475307956 Mar 05 03:36:53 PM PST 24 Mar 05 03:38:04 PM PST 24 6366362122 ps
T1811 /workspace/coverage/cover_reg_top/62.xbar_error_random.3463645928 Mar 05 03:35:25 PM PST 24 Mar 05 03:36:14 PM PST 24 1239297827 ps
T1812 /workspace/coverage/cover_reg_top/31.xbar_random_large_delays.2191318833 Mar 05 03:29:01 PM PST 24 Mar 05 03:38:41 PM PST 24 50206468737 ps
T1813 /workspace/coverage/cover_reg_top/22.xbar_smoke.3289740695 Mar 05 03:26:01 PM PST 24 Mar 05 03:26:11 PM PST 24 221127575 ps
T1814 /workspace/coverage/cover_reg_top/48.xbar_access_same_device_slow_rsp.3222399360 Mar 05 03:32:34 PM PST 24 Mar 05 04:00:26 PM PST 24 95280627339 ps
T1815 /workspace/coverage/cover_reg_top/86.xbar_smoke_zero_delays.2150540462 Mar 05 03:39:35 PM PST 24 Mar 05 03:39:43 PM PST 24 45441454 ps
T1816 /workspace/coverage/cover_reg_top/31.xbar_random.2544022806 Mar 05 03:28:47 PM PST 24 Mar 05 03:29:24 PM PST 24 457178454 ps
T1817 /workspace/coverage/cover_reg_top/3.xbar_random.3650762613 Mar 05 03:17:17 PM PST 24 Mar 05 03:17:56 PM PST 24 952423480 ps
T1818 /workspace/coverage/cover_reg_top/86.xbar_stress_all_with_rand_reset.3335333082 Mar 05 03:39:42 PM PST 24 Mar 05 03:40:33 PM PST 24 155435537 ps
T1819 /workspace/coverage/cover_reg_top/33.xbar_same_source.1268839688 Mar 05 03:29:24 PM PST 24 Mar 05 03:29:46 PM PST 24 701773014 ps
T1820 /workspace/coverage/cover_reg_top/91.xbar_random_zero_delays.2949788018 Mar 05 03:40:23 PM PST 24 Mar 05 03:41:10 PM PST 24 532639244 ps
T1821 /workspace/coverage/cover_reg_top/53.xbar_stress_all_with_error.3053039455 Mar 05 03:33:35 PM PST 24 Mar 05 03:40:43 PM PST 24 11004746017 ps
T1822 /workspace/coverage/cover_reg_top/75.xbar_stress_all_with_reset_error.3733071914 Mar 05 03:37:51 PM PST 24 Mar 05 03:38:53 PM PST 24 90853781 ps
T1823 /workspace/coverage/cover_reg_top/61.xbar_same_source.667704631 Mar 05 03:35:17 PM PST 24 Mar 05 03:35:37 PM PST 24 570720871 ps
T1824 /workspace/coverage/cover_reg_top/9.chip_csr_rw.4001574420 Mar 05 03:21:01 PM PST 24 Mar 05 03:29:34 PM PST 24 5753393520 ps
T1825 /workspace/coverage/cover_reg_top/5.xbar_error_random.2919429318 Mar 05 03:18:45 PM PST 24 Mar 05 03:18:52 PM PST 24 38720519 ps
T1826 /workspace/coverage/cover_reg_top/56.xbar_smoke_slow_rsp.2882085328 Mar 05 03:34:07 PM PST 24 Mar 05 03:35:19 PM PST 24 4337456417 ps
T1827 /workspace/coverage/cover_reg_top/52.xbar_random_zero_delays.2405603126 Mar 05 03:33:22 PM PST 24 Mar 05 03:34:08 PM PST 24 548076366 ps
T1828 /workspace/coverage/cover_reg_top/86.xbar_smoke_large_delays.1711902569 Mar 05 03:39:38 PM PST 24 Mar 05 03:40:55 PM PST 24 7043164588 ps
T802 /workspace/coverage/cover_reg_top/40.xbar_stress_all_with_rand_reset.1791925370 Mar 05 03:30:59 PM PST 24 Mar 05 03:40:13 PM PST 24 8743515590 ps
T1829 /workspace/coverage/cover_reg_top/56.xbar_random_zero_delays.1180512317 Mar 05 03:34:05 PM PST 24 Mar 05 03:34:29 PM PST 24 224015180 ps
T1830 /workspace/coverage/cover_reg_top/1.chip_rv_dm_lc_disabled.655148807 Mar 05 03:15:25 PM PST 24 Mar 05 03:26:52 PM PST 24 16319134616 ps
T1831 /workspace/coverage/cover_reg_top/41.xbar_random_large_delays.428871499 Mar 05 03:30:57 PM PST 24 Mar 05 03:33:46 PM PST 24 16261527573 ps
T1832 /workspace/coverage/cover_reg_top/30.xbar_unmapped_addr.801968937 Mar 05 03:28:39 PM PST 24 Mar 05 03:28:52 PM PST 24 227925830 ps
T1833 /workspace/coverage/cover_reg_top/45.xbar_random_zero_delays.740197869 Mar 05 03:31:54 PM PST 24 Mar 05 03:32:30 PM PST 24 387538125 ps
T1834 /workspace/coverage/cover_reg_top/44.xbar_access_same_device.3848431213 Mar 05 03:31:35 PM PST 24 Mar 05 03:33:30 PM PST 24 2840264114 ps
T1835 /workspace/coverage/cover_reg_top/47.xbar_stress_all_with_error.2131780814 Mar 05 03:32:28 PM PST 24 Mar 05 03:34:54 PM PST 24 2322297397 ps
T1836 /workspace/coverage/cover_reg_top/27.xbar_stress_all_with_error.4014116047 Mar 05 03:27:56 PM PST 24 Mar 05 03:29:03 PM PST 24 865783749 ps
T1837 /workspace/coverage/cover_reg_top/96.xbar_stress_all.3502616463 Mar 05 03:41:25 PM PST 24 Mar 05 03:42:30 PM PST 24 1930034677 ps
T1838 /workspace/coverage/cover_reg_top/48.xbar_smoke_zero_delays.2921751985 Mar 05 03:32:29 PM PST 24 Mar 05 03:32:35 PM PST 24 53524753 ps
T1839 /workspace/coverage/cover_reg_top/28.xbar_stress_all_with_error.4111467092 Mar 05 03:28:18 PM PST 24 Mar 05 03:30:54 PM PST 24 2181671758 ps
T1840 /workspace/coverage/cover_reg_top/9.xbar_error_and_unmapped_addr.2617939234 Mar 05 03:20:41 PM PST 24 Mar 05 03:21:27 PM PST 24 1162015156 ps
T1841 /workspace/coverage/cover_reg_top/15.xbar_unmapped_addr.4029714735 Mar 05 03:23:38 PM PST 24 Mar 05 03:23:57 PM PST 24 413915885 ps
T1842 /workspace/coverage/cover_reg_top/97.xbar_access_same_device_slow_rsp.2395812593 Mar 05 03:41:37 PM PST 24 Mar 05 04:20:42 PM PST 24 124537692208 ps
T1843 /workspace/coverage/cover_reg_top/78.xbar_error_random.1481383090 Mar 05 03:38:24 PM PST 24 Mar 05 03:39:03 PM PST 24 1171247076 ps
T1844 /workspace/coverage/cover_reg_top/85.xbar_random_large_delays.567284839 Mar 05 03:39:20 PM PST 24 Mar 05 03:41:26 PM PST 24 11473496195 ps
T1845 /workspace/coverage/cover_reg_top/13.xbar_smoke.3930733119 Mar 05 03:22:24 PM PST 24 Mar 05 03:22:31 PM PST 24 152897385 ps
T1846 /workspace/coverage/cover_reg_top/43.xbar_smoke_large_delays.890393952 Mar 05 03:31:27 PM PST 24 Mar 05 03:32:33 PM PST 24 6336073809 ps
T1847 /workspace/coverage/cover_reg_top/15.xbar_stress_all_with_error.946451078 Mar 05 03:23:38 PM PST 24 Mar 05 03:25:27 PM PST 24 3535226814 ps
T1848 /workspace/coverage/cover_reg_top/32.xbar_random_large_delays.24719911 Mar 05 03:29:01 PM PST 24 Mar 05 03:39:56 PM PST 24 64261904884 ps
T1849 /workspace/coverage/cover_reg_top/69.xbar_stress_all.2124611749 Mar 05 03:36:41 PM PST 24 Mar 05 03:38:18 PM PST 24 2676655468 ps
T1850 /workspace/coverage/cover_reg_top/85.xbar_stress_all.358028832 Mar 05 03:39:28 PM PST 24 Mar 05 03:50:37 PM PST 24 15697440134 ps
T371 /workspace/coverage/cover_reg_top/13.chip_same_csr_outstanding.4069662250 Mar 05 03:22:23 PM PST 24 Mar 05 03:55:44 PM PST 24 16161040703 ps
T1851 /workspace/coverage/cover_reg_top/86.xbar_error_and_unmapped_addr.3495888716 Mar 05 03:39:36 PM PST 24 Mar 05 03:39:57 PM PST 24 479921324 ps
T1852 /workspace/coverage/cover_reg_top/81.xbar_same_source.2799908140 Mar 05 03:38:46 PM PST 24 Mar 05 03:39:23 PM PST 24 1100990579 ps
T1853 /workspace/coverage/cover_reg_top/92.xbar_access_same_device_slow_rsp.2352722674 Mar 05 03:40:44 PM PST 24 Mar 05 03:42:24 PM PST 24 5440049878 ps
T1854 /workspace/coverage/cover_reg_top/67.xbar_same_source.1556096956 Mar 05 03:36:19 PM PST 24 Mar 05 03:37:21 PM PST 24 1786551758 ps
T1855 /workspace/coverage/cover_reg_top/50.xbar_smoke_zero_delays.1569101201 Mar 05 03:32:48 PM PST 24 Mar 05 03:32:54 PM PST 24 50717992 ps
T1856 /workspace/coverage/cover_reg_top/62.xbar_smoke_large_delays.3719633788 Mar 05 03:35:16 PM PST 24 Mar 05 03:36:53 PM PST 24 9156728375 ps
T1857 /workspace/coverage/cover_reg_top/46.xbar_stress_all_with_rand_reset.4069893681 Mar 05 03:32:08 PM PST 24 Mar 05 03:36:10 PM PST 24 5050309993 ps
T1858 /workspace/coverage/cover_reg_top/45.xbar_smoke_slow_rsp.794568552 Mar 05 03:31:52 PM PST 24 Mar 05 03:33:29 PM PST 24 5541751594 ps
T1859 /workspace/coverage/cover_reg_top/81.xbar_random_large_delays.512996603 Mar 05 03:38:49 PM PST 24 Mar 05 03:57:05 PM PST 24 94060867203 ps
T1860 /workspace/coverage/cover_reg_top/23.xbar_stress_all.838835086 Mar 05 03:26:41 PM PST 24 Mar 05 03:28:56 PM PST 24 1540470565 ps
T1861 /workspace/coverage/cover_reg_top/87.xbar_stress_all_with_error.692062256 Mar 05 03:39:52 PM PST 24 Mar 05 03:40:42 PM PST 24 1338591125 ps
T1862 /workspace/coverage/cover_reg_top/99.xbar_stress_all_with_reset_error.3813348020 Mar 05 03:42:07 PM PST 24 Mar 05 03:44:12 PM PST 24 427318900 ps
T1863 /workspace/coverage/cover_reg_top/99.xbar_smoke.1325961926 Mar 05 03:41:43 PM PST 24 Mar 05 03:41:50 PM PST 24 49638171 ps
T1864 /workspace/coverage/cover_reg_top/41.xbar_access_same_device.439794316 Mar 05 03:31:04 PM PST 24 Mar 05 03:32:55 PM PST 24 2735791914 ps
T1865 /workspace/coverage/cover_reg_top/82.xbar_random_large_delays.2421338856 Mar 05 03:39:09 PM PST 24 Mar 05 03:45:51 PM PST 24 38955501126 ps
T1866 /workspace/coverage/cover_reg_top/71.xbar_random_large_delays.579299851 Mar 05 03:36:57 PM PST 24 Mar 05 03:39:13 PM PST 24 12809148104 ps
T1867 /workspace/coverage/cover_reg_top/41.xbar_smoke_slow_rsp.2317125704 Mar 05 03:30:57 PM PST 24 Mar 05 03:32:08 PM PST 24 4107213254 ps
T1868 /workspace/coverage/cover_reg_top/6.xbar_smoke_large_delays.971966837 Mar 05 03:18:59 PM PST 24 Mar 05 03:20:10 PM PST 24 6700491565 ps
T1869 /workspace/coverage/cover_reg_top/46.xbar_random.389502709 Mar 05 03:32:01 PM PST 24 Mar 05 03:32:23 PM PST 24 514838798 ps
T1870 /workspace/coverage/cover_reg_top/94.xbar_unmapped_addr.3618874219 Mar 05 03:41:06 PM PST 24 Mar 05 03:41:23 PM PST 24 127755647 ps
T1871 /workspace/coverage/cover_reg_top/29.xbar_random_slow_rsp.2730189767 Mar 05 03:28:18 PM PST 24 Mar 05 03:40:27 PM PST 24 44700819046 ps
T1872 /workspace/coverage/cover_reg_top/84.xbar_random_large_delays.2092766394 Mar 05 03:39:14 PM PST 24 Mar 05 03:59:23 PM PST 24 94802760445 ps
T1873 /workspace/coverage/cover_reg_top/32.xbar_stress_all_with_reset_error.2477322147 Mar 05 03:29:07 PM PST 24 Mar 05 03:29:18 PM PST 24 88220571 ps
T1874 /workspace/coverage/cover_reg_top/96.xbar_random_large_delays.458558486 Mar 05 03:41:17 PM PST 24 Mar 05 03:46:06 PM PST 24 24665203392 ps
T1875 /workspace/coverage/cover_reg_top/95.xbar_access_same_device_slow_rsp.2335102727 Mar 05 03:41:12 PM PST 24 Mar 05 04:12:02 PM PST 24 100202146319 ps
T1876 /workspace/coverage/cover_reg_top/64.xbar_stress_all_with_reset_error.1161971192 Mar 05 03:35:55 PM PST 24 Mar 05 03:45:32 PM PST 24 11559661226 ps
T1877 /workspace/coverage/cover_reg_top/33.xbar_access_same_device.1641463309 Mar 05 03:29:22 PM PST 24 Mar 05 03:30:23 PM PST 24 711254890 ps
T1878 /workspace/coverage/cover_reg_top/24.xbar_random_large_delays.2921255078 Mar 05 03:26:47 PM PST 24 Mar 05 03:36:08 PM PST 24 57419639713 ps
T1879 /workspace/coverage/cover_reg_top/24.xbar_smoke_slow_rsp.2580209733 Mar 05 03:26:46 PM PST 24 Mar 05 03:28:33 PM PST 24 5769837433 ps
T1880 /workspace/coverage/cover_reg_top/12.xbar_smoke.4065303678 Mar 05 03:22:04 PM PST 24 Mar 05 03:22:10 PM PST 24 40889741 ps
T1881 /workspace/coverage/cover_reg_top/83.xbar_error_random.1594216098 Mar 05 03:39:04 PM PST 24 Mar 05 03:40:28 PM PST 24 2466778865 ps
T1882 /workspace/coverage/cover_reg_top/10.xbar_error_random.1169215951 Mar 05 03:21:03 PM PST 24 Mar 05 03:22:16 PM PST 24 1979682135 ps
T1883 /workspace/coverage/cover_reg_top/57.xbar_access_same_device_slow_rsp.1567107451 Mar 05 03:34:21 PM PST 24 Mar 05 04:04:35 PM PST 24 97610396791 ps
T1884 /workspace/coverage/cover_reg_top/73.xbar_error_random.4232800624 Mar 05 03:37:20 PM PST 24 Mar 05 03:37:42 PM PST 24 516849324 ps
T1885 /workspace/coverage/cover_reg_top/62.xbar_random.1646892331 Mar 05 03:35:25 PM PST 24 Mar 05 03:36:17 PM PST 24 1381953266 ps
T1886 /workspace/coverage/cover_reg_top/43.xbar_access_same_device.205623066 Mar 05 03:31:27 PM PST 24 Mar 05 03:32:13 PM PST 24 1040266754 ps
T1887 /workspace/coverage/cover_reg_top/45.xbar_smoke_large_delays.3400968258 Mar 05 03:31:45 PM PST 24 Mar 05 03:33:03 PM PST 24 7650686911 ps
T1888 /workspace/coverage/cover_reg_top/66.xbar_same_source.1141338657 Mar 05 03:36:10 PM PST 24 Mar 05 03:36:48 PM PST 24 541691992 ps
T1889 /workspace/coverage/cover_reg_top/77.xbar_unmapped_addr.3630232100 Mar 05 03:38:06 PM PST 24 Mar 05 03:38:31 PM PST 24 225224407 ps
T628 /workspace/coverage/cover_reg_top/4.chip_tl_errors.3972441288 Mar 05 03:17:57 PM PST 24 Mar 05 03:20:02 PM PST 24 2881982152 ps
T1890 /workspace/coverage/cover_reg_top/80.xbar_smoke_slow_rsp.1931472180 Mar 05 03:38:37 PM PST 24 Mar 05 03:40:11 PM PST 24 5276099561 ps
T1891 /workspace/coverage/cover_reg_top/24.xbar_stress_all.2374659023 Mar 05 03:26:53 PM PST 24 Mar 05 03:30:36 PM PST 24 2456121096 ps
T1892 /workspace/coverage/cover_reg_top/14.xbar_smoke_slow_rsp.588796585 Mar 05 03:23:01 PM PST 24 Mar 05 03:24:48 PM PST 24 6160743123 ps
T1893 /workspace/coverage/cover_reg_top/61.xbar_random_zero_delays.33026648 Mar 05 03:35:08 PM PST 24 Mar 05 03:35:18 PM PST 24 69358231 ps
T1894 /workspace/coverage/cover_reg_top/18.xbar_access_same_device.2621053346 Mar 05 03:24:40 PM PST 24 Mar 05 03:25:57 PM PST 24 1099547053 ps
T1895 /workspace/coverage/cover_reg_top/47.xbar_random.1845289766 Mar 05 03:32:07 PM PST 24 Mar 05 03:32:48 PM PST 24 1034506049 ps
T1896 /workspace/coverage/cover_reg_top/54.xbar_same_source.1494779796 Mar 05 03:33:46 PM PST 24 Mar 05 03:34:18 PM PST 24 448161669 ps
T1897 /workspace/coverage/cover_reg_top/89.xbar_access_same_device_slow_rsp.1476491885 Mar 05 03:40:05 PM PST 24 Mar 05 04:03:36 PM PST 24 82786367674 ps
T1898 /workspace/coverage/cover_reg_top/72.xbar_stress_all_with_reset_error.2405646200 Mar 05 03:37:13 PM PST 24 Mar 05 03:37:59 PM PST 24 157586352 ps
T1899 /workspace/coverage/cover_reg_top/69.xbar_access_same_device.2753964345 Mar 05 03:36:36 PM PST 24 Mar 05 03:38:28 PM PST 24 3080754020 ps
T1900 /workspace/coverage/cover_reg_top/79.xbar_random_zero_delays.642183571 Mar 05 03:38:34 PM PST 24 Mar 05 03:39:20 PM PST 24 543358639 ps
T1901 /workspace/coverage/cover_reg_top/99.xbar_smoke_zero_delays.2863084406 Mar 05 03:41:42 PM PST 24 Mar 05 03:41:48 PM PST 24 45802805 ps
T1902 /workspace/coverage/cover_reg_top/85.xbar_smoke_slow_rsp.3984916797 Mar 05 03:39:23 PM PST 24 Mar 05 03:40:22 PM PST 24 3328959381 ps
T1903 /workspace/coverage/cover_reg_top/28.xbar_random_large_delays.676571606 Mar 05 03:28:04 PM PST 24 Mar 05 03:32:12 PM PST 24 21670981547 ps
T1904 /workspace/coverage/cover_reg_top/88.xbar_random_large_delays.3376401284 Mar 05 03:40:06 PM PST 24 Mar 05 04:00:03 PM PST 24 97923987816 ps
T1905 /workspace/coverage/cover_reg_top/54.xbar_unmapped_addr.490083958 Mar 05 03:33:42 PM PST 24 Mar 05 03:34:26 PM PST 24 1050064564 ps
T1906 /workspace/coverage/cover_reg_top/18.xbar_stress_all.1241365294 Mar 05 03:24:53 PM PST 24 Mar 05 03:28:17 PM PST 24 5770527707 ps
T1907 /workspace/coverage/cover_reg_top/39.xbar_random_slow_rsp.809422887 Mar 05 03:30:43 PM PST 24 Mar 05 03:41:03 PM PST 24 34417968525 ps
T1908 /workspace/coverage/cover_reg_top/27.xbar_random_large_delays.761251501 Mar 05 03:27:40 PM PST 24 Mar 05 03:37:45 PM PST 24 49527896727 ps
T1909 /workspace/coverage/cover_reg_top/75.xbar_same_source.2419978714 Mar 05 03:37:52 PM PST 24 Mar 05 03:38:08 PM PST 24 223566872 ps
T1910 /workspace/coverage/cover_reg_top/38.xbar_random_zero_delays.132395456 Mar 05 03:30:17 PM PST 24 Mar 05 03:30:59 PM PST 24 510258156 ps
T1911 /workspace/coverage/cover_reg_top/57.xbar_error_and_unmapped_addr.1007777772 Mar 05 03:34:23 PM PST 24 Mar 05 03:35:06 PM PST 24 916312608 ps
T1912 /workspace/coverage/cover_reg_top/82.xbar_same_source.3365220342 Mar 05 03:38:56 PM PST 24 Mar 05 03:39:05 PM PST 24 66793643 ps
T1913 /workspace/coverage/cover_reg_top/42.xbar_random_slow_rsp.3578011933 Mar 05 03:31:14 PM PST 24 Mar 05 03:42:24 PM PST 24 41962729153 ps
T1914 /workspace/coverage/cover_reg_top/40.xbar_smoke_slow_rsp.2096438189 Mar 05 03:30:53 PM PST 24 Mar 05 03:32:45 PM PST 24 6853404982 ps
T1915 /workspace/coverage/cover_reg_top/23.xbar_random_zero_delays.2143889604 Mar 05 03:26:33 PM PST 24 Mar 05 03:27:06 PM PST 24 293207795 ps
T1916 /workspace/coverage/cover_reg_top/31.xbar_access_same_device.1248470283 Mar 05 03:28:55 PM PST 24 Mar 05 03:29:42 PM PST 24 1203935471 ps
T1917 /workspace/coverage/cover_reg_top/76.xbar_random_zero_delays.1823717072 Mar 05 03:37:50 PM PST 24 Mar 05 03:38:09 PM PST 24 181788978 ps
T1918 /workspace/coverage/cover_reg_top/63.xbar_random_zero_delays.4232012307 Mar 05 03:35:38 PM PST 24 Mar 05 03:35:59 PM PST 24 213440688 ps
T1919 /workspace/coverage/cover_reg_top/70.xbar_access_same_device_slow_rsp.3031577534 Mar 05 03:36:50 PM PST 24 Mar 05 03:57:05 PM PST 24 65916320218 ps
T1920 /workspace/coverage/cover_reg_top/72.xbar_access_same_device_slow_rsp.1323610602 Mar 05 03:37:11 PM PST 24 Mar 05 04:06:51 PM PST 24 97680257318 ps
T1921 /workspace/coverage/cover_reg_top/71.xbar_error_random.925152907 Mar 05 03:36:58 PM PST 24 Mar 05 03:37:18 PM PST 24 516839230 ps
T1922 /workspace/coverage/cover_reg_top/90.xbar_stress_all_with_error.533751777 Mar 05 03:40:24 PM PST 24 Mar 05 03:42:00 PM PST 24 1130926356 ps
T1923 /workspace/coverage/cover_reg_top/35.xbar_unmapped_addr.328441008 Mar 05 03:29:46 PM PST 24 Mar 05 03:30:09 PM PST 24 473456220 ps
T1924 /workspace/coverage/cover_reg_top/22.xbar_random_zero_delays.1381079357 Mar 05 03:26:09 PM PST 24 Mar 05 03:26:45 PM PST 24 367001506 ps
T1925 /workspace/coverage/cover_reg_top/10.xbar_random_slow_rsp.2425681891 Mar 05 03:21:01 PM PST 24 Mar 05 03:29:41 PM PST 24 26581149657 ps
T1926 /workspace/coverage/cover_reg_top/51.xbar_error_and_unmapped_addr.148245404 Mar 05 03:33:11 PM PST 24 Mar 05 03:33:52 PM PST 24 876459496 ps
T1927 /workspace/coverage/cover_reg_top/15.chip_same_csr_outstanding.3707613600 Mar 05 03:23:21 PM PST 24 Mar 05 03:52:33 PM PST 24 17240513259 ps
T1928 /workspace/coverage/cover_reg_top/0.xbar_stress_all_with_rand_reset.1343356348 Mar 05 03:14:50 PM PST 24 Mar 05 03:16:36 PM PST 24 233223392 ps
T1929 /workspace/coverage/cover_reg_top/65.xbar_random_zero_delays.1094675670 Mar 05 03:36:06 PM PST 24 Mar 05 03:36:14 PM PST 24 53026720 ps
T1930 /workspace/coverage/cover_reg_top/2.chip_prim_tl_access.860465239 Mar 05 03:16:10 PM PST 24 Mar 05 03:28:52 PM PST 24 13599460872 ps
T1931 /workspace/coverage/cover_reg_top/18.xbar_stress_all_with_error.2398869959 Mar 05 03:24:55 PM PST 24 Mar 05 03:29:06 PM PST 24 2914890298 ps
T1932 /workspace/coverage/cover_reg_top/10.xbar_same_source.2070557057 Mar 05 03:21:03 PM PST 24 Mar 05 03:21:19 PM PST 24 398093221 ps
T1933 /workspace/coverage/cover_reg_top/34.xbar_access_same_device.3737219990 Mar 05 03:29:31 PM PST 24 Mar 05 03:31:19 PM PST 24 2602035622 ps
T1934 /workspace/coverage/cover_reg_top/85.xbar_unmapped_addr.2649911563 Mar 05 03:39:26 PM PST 24 Mar 05 03:40:08 PM PST 24 953690060 ps
T1935 /workspace/coverage/cover_reg_top/72.xbar_random_large_delays.1180427378 Mar 05 03:37:13 PM PST 24 Mar 05 04:00:10 PM PST 24 110663520523 ps
T1936 /workspace/coverage/cover_reg_top/19.xbar_stress_all_with_rand_reset.1266109403 Mar 05 03:25:10 PM PST 24 Mar 05 03:27:20 PM PST 24 397688504 ps
T1937 /workspace/coverage/cover_reg_top/49.xbar_smoke_large_delays.2290852637 Mar 05 03:32:48 PM PST 24 Mar 05 03:34:42 PM PST 24 10307312223 ps
T1938 /workspace/coverage/cover_reg_top/73.xbar_random_slow_rsp.97690082 Mar 05 03:37:18 PM PST 24 Mar 05 03:51:51 PM PST 24 47839202042 ps
T1939 /workspace/coverage/cover_reg_top/94.xbar_error_and_unmapped_addr.1511948959 Mar 05 03:41:04 PM PST 24 Mar 05 03:42:06 PM PST 24 1425073776 ps
T1940 /workspace/coverage/cover_reg_top/3.chip_csr_rw.820494828 Mar 05 03:17:48 PM PST 24 Mar 05 03:26:24 PM PST 24 5862099109 ps
T1941 /workspace/coverage/cover_reg_top/49.xbar_stress_all.3628865094 Mar 05 03:32:47 PM PST 24 Mar 05 03:36:42 PM PST 24 6568267884 ps
T1942 /workspace/coverage/cover_reg_top/38.xbar_error_random.1427977477 Mar 05 03:30:25 PM PST 24 Mar 05 03:30:37 PM PST 24 139660636 ps
T1943 /workspace/coverage/cover_reg_top/84.xbar_same_source.1364928382 Mar 05 03:39:10 PM PST 24 Mar 05 03:40:08 PM PST 24 1994170244 ps
T1944 /workspace/coverage/cover_reg_top/13.xbar_error_and_unmapped_addr.3679067417 Mar 05 03:22:38 PM PST 24 Mar 05 03:22:49 PM PST 24 200171855 ps
T1945 /workspace/coverage/cover_reg_top/67.xbar_error_random.198744188 Mar 05 03:36:20 PM PST 24 Mar 05 03:37:32 PM PST 24 2118399540 ps
T1946 /workspace/coverage/cover_reg_top/71.xbar_access_same_device_slow_rsp.2106743083 Mar 05 03:36:55 PM PST 24 Mar 05 04:01:24 PM PST 24 77530971043 ps
T1947 /workspace/coverage/cover_reg_top/81.xbar_access_same_device.1096884172 Mar 05 03:38:48 PM PST 24 Mar 05 03:39:10 PM PST 24 406416069 ps
T1948 /workspace/coverage/cover_reg_top/39.xbar_access_same_device.4154101918 Mar 05 03:30:41 PM PST 24 Mar 05 03:32:41 PM PST 24 2696439256 ps
T1949 /workspace/coverage/cover_reg_top/32.xbar_stress_all.2752791538 Mar 05 03:29:05 PM PST 24 Mar 05 03:30:25 PM PST 24 2170323221 ps
T1950 /workspace/coverage/cover_reg_top/99.xbar_random_slow_rsp.1653699848 Mar 05 03:41:49 PM PST 24 Mar 05 03:46:32 PM PST 24 14198324251 ps
T1951 /workspace/coverage/cover_reg_top/14.xbar_same_source.509277913 Mar 05 03:23:07 PM PST 24 Mar 05 03:23:20 PM PST 24 110872299 ps
T1952 /workspace/coverage/cover_reg_top/64.xbar_random_zero_delays.3767508594 Mar 05 03:35:47 PM PST 24 Mar 05 03:36:38 PM PST 24 542635492 ps
T1953 /workspace/coverage/cover_reg_top/74.xbar_stress_all.876811979 Mar 05 03:37:36 PM PST 24 Mar 05 03:40:54 PM PST 24 2071931629 ps
T1954 /workspace/coverage/cover_reg_top/51.xbar_access_same_device.1316431220 Mar 05 03:33:08 PM PST 24 Mar 05 03:34:25 PM PST 24 1656241999 ps
T1955 /workspace/coverage/cover_reg_top/17.xbar_smoke_large_delays.3420539035 Mar 05 03:24:11 PM PST 24 Mar 05 03:25:55 PM PST 24 9019831498 ps
T1956 /workspace/coverage/cover_reg_top/9.xbar_unmapped_addr.2506487677 Mar 05 03:20:41 PM PST 24 Mar 05 03:21:11 PM PST 24 231057024 ps
T1957 /workspace/coverage/cover_reg_top/64.xbar_smoke_slow_rsp.2601555429 Mar 05 03:35:49 PM PST 24 Mar 05 03:37:38 PM PST 24 6494214350 ps
T1958 /workspace/coverage/cover_reg_top/12.xbar_smoke_large_delays.4167830670 Mar 05 03:22:04 PM PST 24 Mar 05 03:23:14 PM PST 24 6088784672 ps
T1959 /workspace/coverage/cover_reg_top/47.xbar_random_zero_delays.2869010404 Mar 05 03:32:16 PM PST 24 Mar 05 03:32:23 PM PST 24 43776248 ps
T1960 /workspace/coverage/cover_reg_top/78.xbar_stress_all_with_error.125305204 Mar 05 03:38:25 PM PST 24 Mar 05 03:41:00 PM PST 24 1905616002 ps
T1961 /workspace/coverage/cover_reg_top/82.xbar_unmapped_addr.30158796 Mar 05 03:38:54 PM PST 24 Mar 05 03:39:04 PM PST 24 164714345 ps
T1962 /workspace/coverage/cover_reg_top/47.xbar_smoke_large_delays.724570992 Mar 05 03:32:08 PM PST 24 Mar 05 03:33:36 PM PST 24 8520674324 ps
T1963 /workspace/coverage/cover_reg_top/7.xbar_stress_all_with_error.2788744218 Mar 05 03:19:45 PM PST 24 Mar 05 03:25:35 PM PST 24 7918814629 ps
T1964 /workspace/coverage/cover_reg_top/9.xbar_random_large_delays.654233439 Mar 05 03:20:33 PM PST 24 Mar 05 03:37:54 PM PST 24 103511235548 ps
T1965 /workspace/coverage/cover_reg_top/6.xbar_access_same_device_slow_rsp.2799344916 Mar 05 03:19:10 PM PST 24 Mar 05 03:22:20 PM PST 24 10967039685 ps
T1966 /workspace/coverage/cover_reg_top/58.xbar_stress_all_with_rand_reset.3860890851 Mar 05 03:34:37 PM PST 24 Mar 05 03:40:34 PM PST 24 1890142611 ps
T1967 /workspace/coverage/cover_reg_top/14.xbar_stress_all_with_error.162626570 Mar 05 03:23:17 PM PST 24 Mar 05 03:28:15 PM PST 24 7754802587 ps
T1968 /workspace/coverage/cover_reg_top/99.xbar_smoke_large_delays.1525548450 Mar 05 03:41:42 PM PST 24 Mar 05 03:42:35 PM PST 24 4847441129 ps
T1969 /workspace/coverage/cover_reg_top/39.xbar_stress_all_with_rand_reset.3146757263 Mar 05 03:30:47 PM PST 24 Mar 05 03:34:23 PM PST 24 569774494 ps
T1970 /workspace/coverage/cover_reg_top/54.xbar_error_random.3124855258 Mar 05 03:33:48 PM PST 24 Mar 05 03:35:21 PM PST 24 2363994494 ps
T1971 /workspace/coverage/cover_reg_top/16.chip_csr_rw.3718928337 Mar 05 03:24:13 PM PST 24 Mar 05 03:29:49 PM PST 24 3726951348 ps
T1972 /workspace/coverage/cover_reg_top/87.xbar_random_slow_rsp.4103366939 Mar 05 03:39:44 PM PST 24 Mar 05 03:40:18 PM PST 24 1839329551 ps
T1973 /workspace/coverage/cover_reg_top/23.xbar_unmapped_addr.2585909554 Mar 05 03:26:43 PM PST 24 Mar 05 03:27:10 PM PST 24 683232457 ps
T1974 /workspace/coverage/cover_reg_top/76.xbar_error_random.2552605109 Mar 05 03:37:52 PM PST 24 Mar 05 03:38:19 PM PST 24 744870136 ps
T1975 /workspace/coverage/cover_reg_top/43.xbar_access_same_device_slow_rsp.3412303388 Mar 05 03:31:28 PM PST 24 Mar 05 03:51:06 PM PST 24 60456750068 ps
T1976 /workspace/coverage/cover_reg_top/95.xbar_random_zero_delays.2734580288 Mar 05 03:41:14 PM PST 24 Mar 05 03:41:49 PM PST 24 410796818 ps
T1977 /workspace/coverage/cover_reg_top/23.xbar_smoke.2459088091 Mar 05 03:26:24 PM PST 24 Mar 05 03:26:32 PM PST 24 121295924 ps
T1978 /workspace/coverage/cover_reg_top/8.xbar_random_slow_rsp.3809052727 Mar 05 03:20:03 PM PST 24 Mar 05 03:29:02 PM PST 24 30599003448 ps
T1979 /workspace/coverage/cover_reg_top/89.xbar_same_source.2490508561 Mar 05 03:40:05 PM PST 24 Mar 05 03:40:20 PM PST 24 374754492 ps
T1980 /workspace/coverage/cover_reg_top/43.xbar_random.1300722603 Mar 05 03:31:30 PM PST 24 Mar 05 03:32:10 PM PST 24 441013158 ps
T1981 /workspace/coverage/cover_reg_top/94.xbar_random_slow_rsp.2654487948 Mar 05 03:41:09 PM PST 24 Mar 05 03:49:28 PM PST 24 25264046275 ps
T1982 /workspace/coverage/cover_reg_top/98.xbar_random_slow_rsp.854039507 Mar 05 03:41:41 PM PST 24 Mar 05 03:47:32 PM PST 24 17377629797 ps
T1983 /workspace/coverage/cover_reg_top/39.xbar_smoke.3006950542 Mar 05 03:30:23 PM PST 24 Mar 05 03:30:33 PM PST 24 234147780 ps
T1984 /workspace/coverage/cover_reg_top/94.xbar_smoke_large_delays.2303024090 Mar 05 03:41:02 PM PST 24 Mar 05 03:42:01 PM PST 24 5540825244 ps
T813 /workspace/coverage/cover_reg_top/86.xbar_stress_all_with_reset_error.1461903594 Mar 05 03:39:45 PM PST 24 Mar 05 03:42:37 PM PST 24 453182920 ps
T1985 /workspace/coverage/cover_reg_top/82.xbar_random.38725244 Mar 05 03:38:54 PM PST 24 Mar 05 03:40:07 PM PST 24 1926625081 ps
T1986 /workspace/coverage/cover_reg_top/9.xbar_access_same_device_slow_rsp.2258368031 Mar 05 03:20:41 PM PST 24 Mar 05 03:27:03 PM PST 24 22884271526 ps
T1987 /workspace/coverage/cover_reg_top/81.xbar_access_same_device_slow_rsp.3049792519 Mar 05 03:38:47 PM PST 24 Mar 05 04:10:24 PM PST 24 93068752641 ps
T1988 /workspace/coverage/cover_reg_top/79.xbar_stress_all_with_error.2765625911 Mar 05 03:38:33 PM PST 24 Mar 05 03:43:45 PM PST 24 4368676414 ps
T1989 /workspace/coverage/cover_reg_top/70.xbar_random.13253726 Mar 05 03:36:51 PM PST 24 Mar 05 03:38:24 PM PST 24 2280312258 ps
T1990 /workspace/coverage/cover_reg_top/95.xbar_smoke_slow_rsp.1842442001 Mar 05 03:41:11 PM PST 24 Mar 05 03:42:53 PM PST 24 5724079706 ps
T1991 /workspace/coverage/cover_reg_top/46.xbar_smoke_large_delays.1558568700 Mar 05 03:31:58 PM PST 24 Mar 05 03:33:16 PM PST 24 7715706523 ps
T1992 /workspace/coverage/cover_reg_top/92.xbar_random_zero_delays.3963225312 Mar 05 03:40:39 PM PST 24 Mar 05 03:41:21 PM PST 24 470985986 ps
T1993 /workspace/coverage/cover_reg_top/37.xbar_stress_all_with_error.3811820955 Mar 05 03:30:17 PM PST 24 Mar 05 03:34:38 PM PST 24 7116439110 ps
T1994 /workspace/coverage/cover_reg_top/16.xbar_same_source.3652388697 Mar 05 03:23:55 PM PST 24 Mar 05 03:24:37 PM PST 24 1247034680 ps
T1995 /workspace/coverage/cover_reg_top/96.xbar_smoke_slow_rsp.3692362724 Mar 05 03:41:23 PM PST 24 Mar 05 03:42:37 PM PST 24 4377602353 ps
T1996 /workspace/coverage/cover_reg_top/15.xbar_stress_all_with_reset_error.2042870675 Mar 05 03:23:38 PM PST 24 Mar 05 03:41:28 PM PST 24 21291783307 ps
T1997 /workspace/coverage/cover_reg_top/83.xbar_smoke_slow_rsp.3382928569 Mar 05 03:39:03 PM PST 24 Mar 05 03:40:44 PM PST 24 5671709686 ps
T1998 /workspace/coverage/cover_reg_top/20.xbar_error_and_unmapped_addr.3727041995 Mar 05 03:25:37 PM PST 24 Mar 05 03:26:24 PM PST 24 1232090463 ps
T1999 /workspace/coverage/cover_reg_top/97.xbar_random_large_delays.4202748353 Mar 05 03:41:31 PM PST 24 Mar 05 03:52:14 PM PST 24 56855770450 ps
T2000 /workspace/coverage/cover_reg_top/83.xbar_same_source.354048666 Mar 05 03:39:04 PM PST 24 Mar 05 03:40:00 PM PST 24 1935290769 ps
T2001 /workspace/coverage/cover_reg_top/46.xbar_unmapped_addr.2133596561 Mar 05 03:32:06 PM PST 24 Mar 05 03:32:37 PM PST 24 654820649 ps
T2002 /workspace/coverage/cover_reg_top/76.xbar_stress_all_with_rand_reset.545384886 Mar 05 03:38:00 PM PST 24 Mar 05 03:42:51 PM PST 24 4675724100 ps
T2003 /workspace/coverage/cover_reg_top/6.xbar_smoke_slow_rsp.3858117767 Mar 05 03:19:07 PM PST 24 Mar 05 03:20:28 PM PST 24 4548939663 ps
T2004 /workspace/coverage/cover_reg_top/26.xbar_random.2533617213 Mar 05 03:27:19 PM PST 24 Mar 05 03:28:04 PM PST 24 544670252 ps
T2005 /workspace/coverage/cover_reg_top/1.chip_csr_aliasing.4051356067 Mar 05 03:15:05 PM PST 24 Mar 05 04:56:03 PM PST 24 34666828833 ps
T2006 /workspace/coverage/cover_reg_top/43.xbar_error_and_unmapped_addr.3338570494 Mar 05 03:31:34 PM PST 24 Mar 05 03:32:39 PM PST 24 1295144567 ps
T2007 /workspace/coverage/cover_reg_top/78.xbar_random_large_delays.3289797816 Mar 05 03:38:15 PM PST 24 Mar 05 03:43:51 PM PST 24 27841917946 ps
T2008 /workspace/coverage/cover_reg_top/90.xbar_stress_all_with_rand_reset.3849794267 Mar 05 03:40:23 PM PST 24 Mar 05 03:49:31 PM PST 24 9078076644 ps
T2009 /workspace/coverage/cover_reg_top/26.xbar_smoke_large_delays.2979214205 Mar 05 03:27:18 PM PST 24 Mar 05 03:29:04 PM PST 24 9788961547 ps
T2010 /workspace/coverage/cover_reg_top/32.xbar_smoke_large_delays.386489425 Mar 05 03:29:01 PM PST 24 Mar 05 03:30:38 PM PST 24 8395248912 ps
T2011 /workspace/coverage/cover_reg_top/50.xbar_random_zero_delays.1268307715 Mar 05 03:32:57 PM PST 24 Mar 05 03:33:48 PM PST 24 568212540 ps
T2012 /workspace/coverage/cover_reg_top/47.xbar_smoke.1353146782 Mar 05 03:32:07 PM PST 24 Mar 05 03:32:17 PM PST 24 219518213 ps
T2013 /workspace/coverage/cover_reg_top/50.xbar_unmapped_addr.2345055285 Mar 05 03:32:59 PM PST 24 Mar 05 03:33:35 PM PST 24 774918397 ps
T2014 /workspace/coverage/cover_reg_top/98.xbar_stress_all_with_reset_error.1717888442 Mar 05 03:41:48 PM PST 24 Mar 05 03:46:17 PM PST 24 1879774658 ps
T2015 /workspace/coverage/cover_reg_top/18.xbar_smoke_slow_rsp.190017185 Mar 05 03:24:32 PM PST 24 Mar 05 03:26:10 PM PST 24 6402825822 ps
T2016 /workspace/coverage/cover_reg_top/21.xbar_smoke.2808426131 Mar 05 03:25:38 PM PST 24 Mar 05 03:25:48 PM PST 24 242269826 ps
T2017 /workspace/coverage/cover_reg_top/94.xbar_random.2746697284 Mar 05 03:41:04 PM PST 24 Mar 05 03:41:42 PM PST 24 510676088 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%