| T366 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_uart_tx_rx_idx3.3213435537 |
|
|
Oct 12 11:15:33 PM UTC 24 |
Oct 12 11:24:16 PM UTC 24 |
4165442182 ps |
| T71 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_spi_device_pinmux_sleep_retention.190048314 |
|
|
Oct 12 11:19:21 PM UTC 24 |
Oct 12 11:24:19 PM UTC 24 |
3453167824 ps |
| T1111 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_uart_rand_baudrate.1477095329 |
|
|
Oct 12 11:15:47 PM UTC 24 |
Oct 12 11:24:52 PM UTC 24 |
4209185850 ps |
| T1112 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_uart_tx_rx_idx1.868156741 |
|
|
Oct 12 11:14:49 PM UTC 24 |
Oct 12 11:25:05 PM UTC 24 |
4605326578 ps |
| T1113 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_uart_tx_rx_idx2.3331740636 |
|
|
Oct 12 11:15:03 PM UTC 24 |
Oct 12 11:25:23 PM UTC 24 |
4226968800 ps |
| T278 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_data_integrity_escalation.1180639618 |
|
|
Oct 12 11:12:00 PM UTC 24 |
Oct 12 11:26:08 PM UTC 24 |
5683895820 ps |
| T50 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_power_virus.688235800 |
|
|
Oct 12 11:03:15 PM UTC 24 |
Oct 12 11:27:06 PM UTC 24 |
5543719156 ps |
| T281 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_uart_tx_rx.1110361599 |
|
|
Oct 12 11:14:38 PM UTC 24 |
Oct 12 11:27:22 PM UTC 24 |
4514395042 ps |
| T282 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.2567032423 |
|
|
Oct 12 11:16:09 PM UTC 24 |
Oct 12 11:27:35 PM UTC 24 |
4354832912 ps |
| T245 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_flash_init_reduced_freq.2241276808 |
|
|
Oct 12 10:58:52 PM UTC 24 |
Oct 12 11:28:34 PM UTC 24 |
16902576136 ps |
| T283 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_i2c_device_tx_rx.3490886083 |
|
|
Oct 12 11:17:25 PM UTC 24 |
Oct 12 11:28:43 PM UTC 24 |
4990487962 ps |
| T284 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.13434460 |
|
|
Oct 12 10:19:26 PM UTC 24 |
Oct 12 11:28:45 PM UTC 24 |
16818101810 ps |
| T285 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_pwrmgr_b2b_sleep_reset_req.2040303475 |
|
|
Oct 12 10:37:33 PM UTC 24 |
Oct 12 11:29:04 PM UTC 24 |
28339459992 ps |
| T95 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_gpio.848102633 |
|
|
Oct 12 11:19:48 PM UTC 24 |
Oct 12 11:29:49 PM UTC 24 |
4730344869 ps |
| T286 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.2858991469 |
|
|
Oct 12 11:16:33 PM UTC 24 |
Oct 12 11:29:49 PM UTC 24 |
4668909090 ps |
| T1114 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_kmac_entropy.904374975 |
|
|
Oct 12 11:25:30 PM UTC 24 |
Oct 12 11:29:58 PM UTC 24 |
3027940250 ps |
| T217 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_spi_device_pass_through_collision.699952624 |
|
|
Oct 12 11:19:42 PM UTC 24 |
Oct 12 11:29:59 PM UTC 24 |
4742016126 ps |
| T1115 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.4285465664 |
|
|
Oct 12 11:24:28 PM UTC 24 |
Oct 12 11:30:05 PM UTC 24 |
3608180440 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_i2c_host_tx_rx.1216739668 |
|
|
Oct 12 11:16:33 PM UTC 24 |
Oct 12 11:30:10 PM UTC 24 |
5412395552 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.2824871104 |
|
|
Oct 12 11:28:13 PM UTC 24 |
Oct 12 11:30:25 PM UTC 24 |
2372394368 ps |
| T1116 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_lc_ctrl_otp_hw_cfg0.2458928056 |
|
|
Oct 12 11:25:43 PM UTC 24 |
Oct 12 11:30:41 PM UTC 24 |
3019882516 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.873283189 |
|
|
Oct 12 11:23:29 PM UTC 24 |
Oct 12 11:30:56 PM UTC 24 |
4363908496 ps |
| T1117 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/0.rom_e2e_self_hash.1701766975 |
|
|
Oct 12 09:28:13 PM UTC 24 |
Oct 12 11:31:06 PM UTC 24 |
26300875910 ps |
| T218 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_spi_device_pass_through.2288656074 |
|
|
Oct 12 11:19:20 PM UTC 24 |
Oct 12 11:31:08 PM UTC 24 |
7509480989 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.2702777274 |
|
|
Oct 12 11:17:26 PM UTC 24 |
Oct 12 11:32:03 PM UTC 24 |
5308275032 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_ops.3008473228 |
|
|
Oct 12 11:19:49 PM UTC 24 |
Oct 12 11:32:09 PM UTC 24 |
4551819896 ps |
| T1118 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.3749371397 |
|
|
Oct 12 11:29:49 PM UTC 24 |
Oct 12 11:32:11 PM UTC 24 |
2989395526 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.401663319 |
|
|
Oct 12 11:23:18 PM UTC 24 |
Oct 12 11:32:35 PM UTC 24 |
4503751464 ps |
| T1119 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.2471067104 |
|
|
Oct 12 11:31:22 PM UTC 24 |
Oct 12 11:33:23 PM UTC 24 |
2362184755 ps |
| T1120 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.1246839015 |
|
|
Oct 12 10:19:27 PM UTC 24 |
Oct 12 11:33:45 PM UTC 24 |
18867355265 ps |
| T1121 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.465855277 |
|
|
Oct 12 11:32:17 PM UTC 24 |
Oct 12 11:34:03 PM UTC 24 |
2352317813 ps |
| T1122 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otp_ctrl_ecc_error_vendor_test.1008239687 |
|
|
Oct 12 11:29:39 PM UTC 24 |
Oct 12 11:35:15 PM UTC 24 |
3345345849 ps |
| T242 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_keymgr_sideload_otbn.507596182 |
|
|
Oct 12 10:35:44 PM UTC 24 |
Oct 12 11:36:21 PM UTC 24 |
13171666918 ps |
| T1123 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sleep_pwm_pulses.3638784605 |
|
|
Oct 12 11:13:19 PM UTC 24 |
Oct 12 11:36:43 PM UTC 24 |
9149480138 ps |
| T1124 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.2471665451 |
|
|
Oct 12 11:26:02 PM UTC 24 |
Oct 12 11:37:06 PM UTC 24 |
4752330936 ps |
| T1125 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rstmgr_sw_rst.2441311594 |
|
|
Oct 12 11:32:16 PM UTC 24 |
Oct 12 11:37:14 PM UTC 24 |
2800328240 ps |
| T1126 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_otbn_smoketest.1654047073 |
|
|
Oct 12 11:06:51 PM UTC 24 |
Oct 12 11:37:24 PM UTC 24 |
8890373680 ps |
| T1127 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_access.350918297 |
|
|
Oct 12 11:23:18 PM UTC 24 |
Oct 12 11:39:03 PM UTC 24 |
5534175240 ps |
| T1128 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otp_ctrl_descrambling.1678924376 |
|
|
Oct 12 11:29:52 PM UTC 24 |
Oct 12 11:39:52 PM UTC 24 |
4708922462 ps |
| T1129 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_full_aon_reset.75078307 |
|
|
Oct 12 11:33:03 PM UTC 24 |
Oct 12 11:40:21 PM UTC 24 |
7652347538 ps |
| T1130 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rstmgr_sw_req.843001230 |
|
|
Oct 12 11:32:00 PM UTC 24 |
Oct 12 11:40:39 PM UTC 24 |
4786335844 ps |
| T1131 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.1605296635 |
|
|
Oct 12 11:23:33 PM UTC 24 |
Oct 12 11:41:19 PM UTC 24 |
5748769342 ps |
| T1132 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.3388660444 |
|
|
Oct 12 11:33:13 PM UTC 24 |
Oct 12 11:41:54 PM UTC 24 |
4066941050 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rstmgr_cpu_info.3475581644 |
|
|
Oct 12 11:32:16 PM UTC 24 |
Oct 12 11:42:02 PM UTC 24 |
6642908440 ps |
| T1133 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.1517904895 |
|
|
Oct 12 11:25:00 PM UTC 24 |
Oct 12 11:42:56 PM UTC 24 |
5246559997 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.2340274238 |
|
|
Oct 12 11:38:03 PM UTC 24 |
Oct 12 11:43:01 PM UTC 24 |
3444827500 ps |
| T1134 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_lc_ctrl_transition.28723035 |
|
|
Oct 12 11:29:45 PM UTC 24 |
Oct 12 11:43:11 PM UTC 24 |
11933144088 ps |
| T1135 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rv_timer_irq.81255356 |
|
|
Oct 12 11:39:40 PM UTC 24 |
Oct 12 11:45:05 PM UTC 24 |
3357894318 ps |
| T1136 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.2747166306 |
|
|
Oct 12 11:28:09 PM UTC 24 |
Oct 12 11:45:07 PM UTC 24 |
7405397838 ps |
| T1137 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.3506399594 |
|
|
Oct 12 11:38:05 PM UTC 24 |
Oct 12 11:45:18 PM UTC 24 |
4312971992 ps |
| T1138 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1299541132 |
|
|
Oct 12 11:37:21 PM UTC 24 |
Oct 12 11:46:43 PM UTC 24 |
7579664676 ps |
| T1139 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.366069440 |
|
|
Oct 12 11:26:47 PM UTC 24 |
Oct 12 11:46:47 PM UTC 24 |
8390564296 ps |
| T1140 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_self_hash.923105554 |
|
|
Oct 12 11:03:48 PM UTC 24 |
Oct 13 01:09:08 AM UTC 24 |
26263554634 ps |
| T1141 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.1224764532 |
|
|
Oct 12 11:35:52 PM UTC 24 |
Oct 12 11:46:55 PM UTC 24 |
7095673609 ps |
| T1142 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sysrst_ctrl_inputs.1805091967 |
|
|
Oct 12 11:40:56 PM UTC 24 |
Oct 12 11:46:56 PM UTC 24 |
3084023260 ps |
| T205 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_flash_rma_unlocked.3821666452 |
|
|
Oct 12 10:01:34 PM UTC 24 |
Oct 12 11:47:39 PM UTC 24 |
43135606614 ps |
| T1143 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.1788725993 |
|
|
Oct 12 11:33:18 PM UTC 24 |
Oct 12 11:47:44 PM UTC 24 |
7639844088 ps |
| T1144 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sysrst_ctrl_outputs.3542786045 |
|
|
Oct 12 11:42:42 PM UTC 24 |
Oct 12 11:48:01 PM UTC 24 |
3387746542 ps |
| T1145 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.1700692130 |
|
|
Oct 12 11:34:41 PM UTC 24 |
Oct 12 11:48:46 PM UTC 24 |
9337089190 ps |
| T1146 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_lc_walkthrough_prodend.1914385051 |
|
|
Oct 12 11:32:28 PM UTC 24 |
Oct 12 11:48:57 PM UTC 24 |
9230777342 ps |
| T1147 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_crash_alert.1213666306 |
|
|
Oct 13 12:24:26 AM UTC 24 |
Oct 13 12:35:30 AM UTC 24 |
5321619336 ps |
| T1148 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aon_timer_sleep_wdog_sleep_pause.1553349568 |
|
|
Oct 12 11:43:52 PM UTC 24 |
Oct 12 11:49:58 PM UTC 24 |
7304977960 ps |
| T1149 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.2118575260 |
|
|
Oct 12 11:27:44 PM UTC 24 |
Oct 12 11:50:16 PM UTC 24 |
7051421952 ps |
| T136 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_ast_clk_rst_inputs.920457447 |
|
|
Oct 12 11:00:11 PM UTC 24 |
Oct 12 11:50:20 PM UTC 24 |
20412344201 ps |
| T1150 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.120122244 |
|
|
Oct 12 11:41:18 PM UTC 24 |
Oct 12 11:51:56 PM UTC 24 |
4789237319 ps |
| T1151 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aon_timer_irq.2689611559 |
|
|
Oct 12 11:43:49 PM UTC 24 |
Oct 12 11:52:02 PM UTC 24 |
4381684648 ps |
| T13 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1517973655 |
|
|
Oct 12 11:41:56 PM UTC 24 |
Oct 12 11:52:45 PM UTC 24 |
6725703288 ps |
| T1152 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aes_enc.2437744071 |
|
|
Oct 12 11:48:38 PM UTC 24 |
Oct 12 11:53:07 PM UTC 24 |
2853143304 ps |
| T1153 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aes_idle.3152367569 |
|
|
Oct 12 11:49:32 PM UTC 24 |
Oct 12 11:53:42 PM UTC 24 |
2489392810 ps |
| T1154 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_lc_walkthrough_dev.295407879 |
|
|
Oct 12 10:04:55 PM UTC 24 |
Oct 12 11:53:57 PM UTC 24 |
47829818042 ps |
| T1155 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.818943554 |
|
|
Oct 12 11:34:23 PM UTC 24 |
Oct 12 11:54:19 PM UTC 24 |
12973730593 ps |
| T1156 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aes_masking_off.3225260384 |
|
|
Oct 12 11:49:51 PM UTC 24 |
Oct 12 11:54:32 PM UTC 24 |
3051807706 ps |
| T1157 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aes_enc_jitter_en.4170428367 |
|
|
Oct 12 11:49:28 PM UTC 24 |
Oct 12 11:54:37 PM UTC 24 |
3059944631 ps |
| T1158 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.192803681 |
|
|
Oct 12 11:46:05 PM UTC 24 |
Oct 12 11:54:48 PM UTC 24 |
18598009220 ps |
| T1159 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.3351095503 |
|
|
Oct 12 11:46:04 PM UTC 24 |
Oct 12 11:55:28 PM UTC 24 |
5289558622 ps |
| T1160 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_asm_init_test_unlocked0.1412355547 |
|
|
Oct 12 11:03:16 PM UTC 24 |
Oct 12 11:56:13 PM UTC 24 |
11674389087 ps |
| T1161 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_wdog_reset.3505429838 |
|
|
Oct 12 11:46:05 PM UTC 24 |
Oct 12 11:56:44 PM UTC 24 |
5455240784 ps |
| T262 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_alert_test.2456011511 |
|
|
Oct 12 11:51:09 PM UTC 24 |
Oct 12 11:57:10 PM UTC 24 |
3143824980 ps |
| T1162 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otbn_mem_scramble.2595363485 |
|
|
Oct 12 11:47:52 PM UTC 24 |
Oct 12 11:57:20 PM UTC 24 |
3667814280 ps |
| T1163 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.3513448484 |
|
|
Oct 12 11:43:53 PM UTC 24 |
Oct 12 11:58:23 PM UTC 24 |
9170242344 ps |
| T1164 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_alert_handler_ping_timeout.2495378700 |
|
|
Oct 12 11:51:11 PM UTC 24 |
Oct 12 11:58:27 PM UTC 24 |
3326286572 ps |
| T1165 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.2294668316 |
|
|
Oct 12 11:33:18 PM UTC 24 |
Oct 12 11:58:30 PM UTC 24 |
12208799659 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.2759515571 |
|
|
Oct 12 11:52:47 PM UTC 24 |
Oct 12 11:58:43 PM UTC 24 |
3153631092 ps |
| T1166 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.770138039 |
|
|
Oct 12 11:34:02 PM UTC 24 |
Oct 12 11:58:59 PM UTC 24 |
13431421337 ps |
| T1167 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_entropy_src_kat_test.4068335527 |
|
|
Oct 12 11:55:28 PM UTC 24 |
Oct 12 11:59:19 PM UTC 24 |
2411504400 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_alert_handler_entropy.3192322058 |
|
|
Oct 12 11:54:33 PM UTC 24 |
Oct 12 11:59:52 PM UTC 24 |
3081906874 ps |
| T1168 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aes_entropy.368718966 |
|
|
Oct 12 11:55:05 PM UTC 24 |
Oct 12 11:59:52 PM UTC 24 |
2922214360 ps |
| T1169 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_init.314143171 |
|
|
Oct 12 11:24:48 PM UTC 24 |
Oct 13 12:00:55 AM UTC 24 |
18935868260 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.2967528763 |
|
|
Oct 12 11:48:25 PM UTC 24 |
Oct 13 12:01:13 AM UTC 24 |
4071045640 ps |
| T1170 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_alert_handler_escalation.2124360961 |
|
|
Oct 12 11:51:02 PM UTC 24 |
Oct 13 12:02:05 AM UTC 24 |
5379650224 ps |
| T1171 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_csrng_kat_test.495265130 |
|
|
Oct 12 11:57:59 PM UTC 24 |
Oct 13 12:02:10 AM UTC 24 |
3482713860 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_shutdown_output.1636711248 |
|
|
Oct 12 11:03:47 PM UTC 24 |
Oct 13 12:02:31 AM UTC 24 |
25466217681 ps |
| T1172 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_lc_walkthrough_prod.3922529649 |
|
|
Oct 12 10:05:00 PM UTC 24 |
Oct 13 12:03:03 AM UTC 24 |
51400186816 ps |
| T1173 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_entropy_src_ast_rng_req.1159276211 |
|
|
Oct 12 11:59:42 PM UTC 24 |
Oct 13 12:03:09 AM UTC 24 |
2588075992 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_hmac_enc.510551715 |
|
|
Oct 13 12:00:00 AM UTC 24 |
Oct 13 12:04:13 AM UTC 24 |
2549648816 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_edn_boot_mode.1540942705 |
|
|
Oct 12 11:55:32 PM UTC 24 |
Oct 13 12:04:33 AM UTC 24 |
2838118248 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rstmgr_alert_info.59156094 |
|
|
Oct 12 11:32:10 PM UTC 24 |
Oct 13 12:05:08 AM UTC 24 |
13005155760 ps |
| T1174 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rv_core_ibex_rnd.3380587177 |
|
|
Oct 12 11:48:25 PM UTC 24 |
Oct 13 12:05:15 AM UTC 24 |
5619296584 ps |
| T1175 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_hmac_enc_jitter_en.3529560445 |
|
|
Oct 13 12:00:40 AM UTC 24 |
Oct 13 12:05:17 AM UTC 24 |
3261870475 ps |
| T1176 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otbn_randomness.4139184739 |
|
|
Oct 12 11:47:53 PM UTC 24 |
Oct 13 12:05:21 AM UTC 24 |
6039475912 ps |
| T1177 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.3154766513 |
|
|
Oct 12 11:59:38 PM UTC 24 |
Oct 13 12:05:40 AM UTC 24 |
3631658658 ps |
| T1178 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_hmac_enc_idle.2121031024 |
|
|
Oct 13 12:00:40 AM UTC 24 |
Oct 13 12:06:15 AM UTC 24 |
2614066646 ps |
| T1179 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_hmac_oneshot.1927289876 |
|
|
Oct 13 12:01:33 AM UTC 24 |
Oct 13 12:07:00 AM UTC 24 |
2575371480 ps |
| T1180 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_lc_walkthrough_rma.1492213989 |
|
|
Oct 12 10:07:16 PM UTC 24 |
Oct 13 12:07:29 AM UTC 24 |
45578050151 ps |
| T1181 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_edn_kat.3886429141 |
|
|
Oct 12 11:56:05 PM UTC 24 |
Oct 13 12:07:44 AM UTC 24 |
3058656584 ps |
| T1182 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_kmac_mode_cshake.4077028063 |
|
|
Oct 13 12:05:10 AM UTC 24 |
Oct 13 12:08:52 AM UTC 24 |
2450124872 ps |
| T1183 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.1112796789 |
|
|
Oct 12 11:57:23 PM UTC 24 |
Oct 13 12:08:53 AM UTC 24 |
5647565075 ps |
| T1184 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.3812921695 |
|
|
Oct 12 11:31:28 PM UTC 24 |
Oct 13 12:09:57 AM UTC 24 |
30302153000 ps |
| T1185 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_asm_init_rma.3999168327 |
|
|
Oct 12 11:04:03 PM UTC 24 |
Oct 13 12:10:23 AM UTC 24 |
15002178584 ps |
| T1186 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_kmac_mode_kmac.591420882 |
|
|
Oct 13 12:06:33 AM UTC 24 |
Oct 13 12:11:32 AM UTC 24 |
2861231000 ps |
| T1187 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_kmac_idle.961407224 |
|
|
Oct 13 12:06:33 AM UTC 24 |
Oct 13 12:11:38 AM UTC 24 |
3460189392 ps |
| T1188 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_kmac_app_rom.788871962 |
|
|
Oct 13 12:06:29 AM UTC 24 |
Oct 13 12:11:39 AM UTC 24 |
2444580600 ps |
| T1189 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sysrst_ctrl_reset.99739602 |
|
|
Oct 12 11:42:42 PM UTC 24 |
Oct 13 12:11:44 AM UTC 24 |
22508310842 ps |
| T1190 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.208930794 |
|
|
Oct 12 11:59:59 PM UTC 24 |
Oct 13 12:12:50 AM UTC 24 |
7175139150 ps |
| T1191 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.571550170 |
|
|
Oct 13 12:06:32 AM UTC 24 |
Oct 13 12:13:08 AM UTC 24 |
3385408347 ps |
| T1192 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sensor_ctrl_status.1981169625 |
|
|
Oct 13 12:09:41 AM UTC 24 |
Oct 13 12:13:32 AM UTC 24 |
2929491731 ps |
| T1193 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.3789241255 |
|
|
Oct 13 12:06:52 AM UTC 24 |
Oct 13 12:13:37 AM UTC 24 |
3237296367 ps |
| T1194 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.1573688300 |
|
|
Oct 12 11:54:32 PM UTC 24 |
Oct 13 12:14:20 AM UTC 24 |
5933381880 ps |
| T1195 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_asm_init_prod.1119308834 |
|
|
Oct 12 11:03:05 PM UTC 24 |
Oct 13 12:14:41 AM UTC 24 |
15820890601 ps |
| T1196 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_keymgr_init_rom_ext_invalid_meas.1135882993 |
|
|
Oct 12 11:04:05 PM UTC 24 |
Oct 13 12:15:08 AM UTC 24 |
15145060976 ps |
| T1197 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.2173171058 |
|
|
Oct 12 11:02:41 PM UTC 24 |
Oct 13 12:15:42 AM UTC 24 |
15417260010 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.4263420524 |
|
|
Oct 12 11:53:24 PM UTC 24 |
Oct 13 12:15:42 AM UTC 24 |
11673445052 ps |
| T1198 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_asm_init_dev.3450376100 |
|
|
Oct 12 11:03:14 PM UTC 24 |
Oct 13 12:15:49 AM UTC 24 |
15332989594 ps |
| T1199 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_alert_handler_ping_ok.986231315 |
|
|
Oct 12 11:51:10 PM UTC 24 |
Oct 13 12:16:25 AM UTC 24 |
8004284394 ps |
| T1200 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.1133464636 |
|
|
Oct 12 11:02:56 PM UTC 24 |
Oct 13 12:16:27 AM UTC 24 |
15534244080 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rom_ctrl_integrity_check.1999531599 |
|
|
Oct 13 12:06:34 AM UTC 24 |
Oct 13 12:16:30 AM UTC 24 |
9658939312 ps |
| T318 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_plic_sw_irq.579310526 |
|
|
Oct 13 12:12:45 AM UTC 24 |
Oct 13 12:17:00 AM UTC 24 |
2965871416 ps |
| T1201 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_shutdown_exception_c.2707014359 |
|
|
Oct 12 11:03:42 PM UTC 24 |
Oct 13 12:17:15 AM UTC 24 |
15041161729 ps |
| T1202 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.4212126902 |
|
|
Oct 13 12:08:22 AM UTC 24 |
Oct 13 12:17:19 AM UTC 24 |
7063372360 ps |
| T1203 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_asm_init_prod_end.718076918 |
|
|
Oct 12 11:04:04 PM UTC 24 |
Oct 13 12:18:10 AM UTC 24 |
15794369614 ps |
| T1204 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_smoke.1372342844 |
|
|
Oct 12 11:04:04 PM UTC 24 |
Oct 13 12:18:17 AM UTC 24 |
14830598252 ps |
| T1205 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.397345064 |
|
|
Oct 13 12:06:32 AM UTC 24 |
Oct 13 12:18:23 AM UTC 24 |
5179369650 ps |
| T1206 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_edn_entropy_reqs.1926229975 |
|
|
Oct 12 11:59:38 PM UTC 24 |
Oct 13 12:19:00 AM UTC 24 |
7156174392 ps |
| T1207 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_edn_auto_mode.2449910549 |
|
|
Oct 12 11:55:33 PM UTC 24 |
Oct 13 12:19:19 AM UTC 24 |
5617431620 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.1733008338 |
|
|
Oct 13 12:10:33 AM UTC 24 |
Oct 13 12:19:29 AM UTC 24 |
5344209560 ps |
| T241 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_keymgr_sideload_aes.605393026 |
|
|
Oct 13 12:03:52 AM UTC 24 |
Oct 13 12:20:20 AM UTC 24 |
6060617906 ps |
| T1208 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.762926165 |
|
|
Oct 13 12:08:18 AM UTC 24 |
Oct 13 12:20:23 AM UTC 24 |
7431862020 ps |
| T1209 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_jitter.342975816 |
|
|
Oct 13 12:17:36 AM UTC 24 |
Oct 13 12:20:59 AM UTC 24 |
2420051112 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_plic_all_irqs_10.3170333436 |
|
|
Oct 13 12:12:39 AM UTC 24 |
Oct 13 12:21:17 AM UTC 24 |
3476419172 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sensor_ctrl_alert.3638159583 |
|
|
Oct 13 12:09:41 AM UTC 24 |
Oct 13 12:21:21 AM UTC 24 |
7072310356 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.2736951722 |
|
|
Oct 12 10:56:52 PM UTC 24 |
Oct 13 12:21:27 AM UTC 24 |
24242182417 ps |
| T1210 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.4161101129 |
|
|
Oct 13 12:14:22 AM UTC 24 |
Oct 13 12:21:36 AM UTC 24 |
4301905560 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_entropy_src_csrng.2933595957 |
|
|
Oct 12 11:59:56 PM UTC 24 |
Oct 13 12:21:53 AM UTC 24 |
6092944884 ps |
| T227 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/0.chip_sw_inject_scramble_seed.2244556499 |
|
|
Oct 12 07:49:09 PM UTC 24 |
Oct 13 12:22:09 AM UTC 24 |
68360483090 ps |
| T137 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_csrng_edn_concurrency_reduced_freq.2078060078 |
|
|
Oct 12 10:59:13 PM UTC 24 |
Oct 13 12:22:33 AM UTC 24 |
22142314946 ps |
| T1211 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.4187842404 |
|
|
Oct 13 12:14:27 AM UTC 24 |
Oct 13 12:22:35 AM UTC 24 |
4990768080 ps |
| T1212 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.1385316081 |
|
|
Oct 13 12:14:23 AM UTC 24 |
Oct 13 12:22:53 AM UTC 24 |
5251258976 ps |
| T1213 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.366090866 |
|
|
Oct 12 11:53:45 PM UTC 24 |
Oct 13 12:23:24 AM UTC 24 |
7570412060 ps |
| T1214 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.3073428267 |
|
|
Oct 13 12:15:19 AM UTC 24 |
Oct 13 12:23:29 AM UTC 24 |
4363101400 ps |
| T1215 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_off_aes_trans.927142961 |
|
|
Oct 13 12:13:46 AM UTC 24 |
Oct 13 12:23:43 AM UTC 24 |
5988291532 ps |
| T1216 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_jitter_frequency.1983034618 |
|
|
Oct 13 12:17:19 AM UTC 24 |
Oct 13 12:24:24 AM UTC 24 |
3645771688 ps |
| T1217 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.1995157384 |
|
|
Oct 12 11:38:01 PM UTC 24 |
Oct 13 12:24:36 AM UTC 24 |
27410445400 ps |
| T1218 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_reset_frequency.11121795 |
|
|
Oct 13 12:17:22 AM UTC 24 |
Oct 13 12:25:23 AM UTC 24 |
3735370152 ps |
| T1219 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_static_critical.607285871 |
|
|
Oct 12 11:03:10 PM UTC 24 |
Oct 13 12:25:41 AM UTC 24 |
17459836430 ps |
| T1220 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_edn_sw_mode.1608450706 |
|
|
Oct 12 11:56:51 PM UTC 24 |
Oct 13 12:25:57 AM UTC 24 |
8538345264 ps |
| T1221 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.6881627 |
|
|
Oct 13 12:15:45 AM UTC 24 |
Oct 13 12:26:02 AM UTC 24 |
3866178172 ps |
| T1222 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_tap_straps_prod.3690018250 |
|
|
Oct 13 12:23:07 AM UTC 24 |
Oct 13 12:26:08 AM UTC 24 |
2048610590 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_plic_all_irqs_20.2981236818 |
|
|
Oct 13 12:12:46 AM UTC 24 |
Oct 13 12:26:32 AM UTC 24 |
5321508716 ps |
| T1223 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.3482570485 |
|
|
Oct 13 12:16:38 AM UTC 24 |
Oct 13 12:26:37 AM UTC 24 |
4124855212 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_lowpower_cancel.3491910259 |
|
|
Oct 13 12:20:04 AM UTC 24 |
Oct 13 12:27:02 AM UTC 24 |
3615004116 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sram_ctrl_execution_main.4205679531 |
|
|
Oct 13 12:07:36 AM UTC 24 |
Oct 13 12:27:07 AM UTC 24 |
10733108524 ps |
| T1224 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.1743526630 |
|
|
Oct 13 12:14:56 AM UTC 24 |
Oct 13 12:27:29 AM UTC 24 |
12034462005 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_wake_ups.254323487 |
|
|
Oct 13 12:19:37 AM UTC 24 |
Oct 13 12:27:30 AM UTC 24 |
7772911904 ps |
| T304 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.672214061 |
|
|
Oct 13 12:24:26 AM UTC 24 |
Oct 13 12:27:45 AM UTC 24 |
2450228715 ps |
| T259 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rv_core_ibex_address_translation.3923575772 |
|
|
Oct 13 12:23:30 AM UTC 24 |
Oct 13 12:27:52 AM UTC 24 |
2870641060 ps |
| T1225 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_sleep_frequency.4213077496 |
|
|
Oct 13 12:17:52 AM UTC 24 |
Oct 13 12:28:02 AM UTC 24 |
4290690408 ps |
| T1226 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.1002412983 |
|
|
Oct 13 12:17:19 AM UTC 24 |
Oct 13 12:28:07 AM UTC 24 |
4292433720 ps |
| T1227 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.2457858364 |
|
|
Oct 13 12:16:41 AM UTC 24 |
Oct 13 12:28:12 AM UTC 24 |
4307937176 ps |
| T191 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_lc_ctrl_program_error.2833341332 |
|
|
Oct 13 12:19:06 AM UTC 24 |
Oct 13 12:28:47 AM UTC 24 |
6047007880 ps |
| T1228 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.2744167853 |
|
|
Oct 13 12:25:12 AM UTC 24 |
Oct 13 12:29:06 AM UTC 24 |
2815846954 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.3996244028 |
|
|
Oct 13 12:21:36 AM UTC 24 |
Oct 13 12:29:25 AM UTC 24 |
5890539372 ps |
| T1229 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2801654959 |
|
|
Oct 13 12:16:38 AM UTC 24 |
Oct 13 12:29:29 AM UTC 24 |
4358112386 ps |
| T1230 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.885020850 |
|
|
Oct 13 12:21:10 AM UTC 24 |
Oct 13 12:29:47 AM UTC 24 |
5560706212 ps |
| T1231 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rv_dm_access_after_wakeup.838184236 |
|
|
Oct 13 12:22:26 AM UTC 24 |
Oct 13 12:30:05 AM UTC 24 |
5840036472 ps |
| T1232 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.2774540005 |
|
|
Oct 13 12:22:32 AM UTC 24 |
Oct 13 12:30:33 AM UTC 24 |
3424232830 ps |
| T1233 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_off_peri.1745406587 |
|
|
Oct 13 12:13:28 AM UTC 24 |
Oct 13 12:30:38 AM UTC 24 |
11886247502 ps |
| T1234 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_write_clear.1501698683 |
|
|
Oct 13 12:25:08 AM UTC 24 |
Oct 13 12:30:48 AM UTC 24 |
3032456230 ps |
| T1235 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.3369029600 |
|
|
Oct 13 12:27:05 AM UTC 24 |
Oct 13 12:30:56 AM UTC 24 |
3170881499 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_tap_straps_dev.366472274 |
|
|
Oct 13 12:22:31 AM UTC 24 |
Oct 13 12:31:00 AM UTC 24 |
6137866823 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_rv_dm_ndm_reset_req.2871695728 |
|
|
Oct 13 12:22:30 AM UTC 24 |
Oct 13 12:31:05 AM UTC 24 |
5376773938 ps |
| T78 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_tap_straps_rma.759598540 |
|
|
Oct 13 12:23:07 AM UTC 24 |
Oct 13 12:31:05 AM UTC 24 |
5361724100 ps |
| T1236 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_hmac_multistream.692655235 |
|
|
Oct 13 12:01:50 AM UTC 24 |
Oct 13 12:31:27 AM UTC 24 |
7636264132 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_plic_all_irqs_0.1297698029 |
|
|
Oct 13 12:12:45 AM UTC 24 |
Oct 13 12:31:38 AM UTC 24 |
6126332018 ps |
| T1237 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_tap_straps_testunlock0.514920940 |
|
|
Oct 13 12:22:39 AM UTC 24 |
Oct 13 12:31:45 AM UTC 24 |
5895389421 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.1396301350 |
|
|
Oct 13 12:22:32 AM UTC 24 |
Oct 13 12:32:01 AM UTC 24 |
5966339559 ps |
| T1238 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.2912976265 |
|
|
Oct 13 12:27:31 AM UTC 24 |
Oct 13 12:32:01 AM UTC 24 |
2794490484 ps |
| T1239 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.508971491 |
|
|
Oct 13 12:27:22 AM UTC 24 |
Oct 13 12:32:58 AM UTC 24 |
3693365344 ps |
| T1240 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_scrambling_smoketest.2859453731 |
|
|
Oct 13 12:30:29 AM UTC 24 |
Oct 13 12:34:23 AM UTC 24 |
3130735694 ps |
| T220 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_jtag_csr_rw.971111922 |
|
|
Oct 13 12:17:42 AM UTC 24 |
Oct 13 12:34:41 AM UTC 24 |
11120045622 ps |
| T1241 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_ast_clk_outputs.549414224 |
|
|
Oct 13 12:19:05 AM UTC 24 |
Oct 13 12:34:43 AM UTC 24 |
7199410552 ps |
| T1242 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.rom_volatile_raw_unlock.2618134837 |
|
|
Oct 13 12:32:50 AM UTC 24 |
Oct 13 12:35:17 AM UTC 24 |
2477801215 ps |
| T1243 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.2958280457 |
|
|
Oct 13 12:26:02 AM UTC 24 |
Oct 13 12:35:57 AM UTC 24 |
4281973004 ps |
| T1244 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.1948054879 |
|
|
Oct 13 12:27:43 AM UTC 24 |
Oct 13 12:36:17 AM UTC 24 |
5200512873 ps |
| T1245 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_csrng_smoketest.385870377 |
|
|
Oct 13 12:33:40 AM UTC 24 |
Oct 13 12:37:39 AM UTC 24 |
3135961672 ps |
| T1246 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.rom_raw_unlock.2216849425 |
|
|
Oct 13 12:32:52 AM UTC 24 |
Oct 13 12:37:46 AM UTC 24 |
5600379652 ps |
| T1247 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aon_timer_smoketest.949273956 |
|
|
Oct 13 12:33:24 AM UTC 24 |
Oct 13 12:38:32 AM UTC 24 |
2681038070 ps |
| T1248 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_smoketest.77916229 |
|
|
Oct 13 12:34:12 AM UTC 24 |
Oct 13 12:38:39 AM UTC 24 |
2549704232 ps |
| T1249 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_power_idle_load.686296073 |
|
|
Oct 13 12:29:28 AM UTC 24 |
Oct 13 12:39:34 AM UTC 24 |
4365031536 ps |
| T221 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_jtag_mem_access.2382740600 |
|
|
Oct 13 12:18:33 AM UTC 24 |
Oct 13 12:39:56 AM UTC 24 |
13274241192 ps |
| T1250 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aes_smoketest.759191435 |
|
|
Oct 13 12:33:58 AM UTC 24 |
Oct 13 12:40:03 AM UTC 24 |
2908361652 ps |
| T1251 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_gpio_smoketest.2530397343 |
|
|
Oct 13 12:35:01 AM UTC 24 |
Oct 13 12:40:32 AM UTC 24 |
2845342795 ps |
| T1252 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.rom_keymgr_functest.4069000041 |
|
|
Oct 13 12:33:18 AM UTC 24 |
Oct 13 12:40:37 AM UTC 24 |
4831220072 ps |
| T1253 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_power_sleep_load.3959697684 |
|
|
Oct 13 12:30:20 AM UTC 24 |
Oct 13 12:40:47 AM UTC 24 |
10258703708 ps |
| T1254 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_hmac_smoketest.573516453 |
|
|
Oct 13 12:35:28 AM UTC 24 |
Oct 13 12:41:16 AM UTC 24 |
2796375642 ps |
| T1255 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_smoketest.3270810541 |
|
|
Oct 13 12:36:06 AM UTC 24 |
Oct 13 12:41:23 AM UTC 24 |
5067906472 ps |
| T1256 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rv_plic_smoketest.3477959891 |
|
|
Oct 13 12:36:40 AM UTC 24 |
Oct 13 12:41:29 AM UTC 24 |
3505438128 ps |
| T1257 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rv_timer_smoketest.1665948643 |
|
|
Oct 13 12:36:54 AM UTC 24 |
Oct 13 12:41:36 AM UTC 24 |
3101195336 ps |
| T1258 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_kmac_smoketest.3716663137 |
|
|
Oct 13 12:35:28 AM UTC 24 |
Oct 13 12:41:38 AM UTC 24 |
2729462192 ps |
| T1259 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_entropy_src_smoketest.3110709569 |
|
|
Oct 13 12:34:11 AM UTC 24 |
Oct 13 12:41:54 AM UTC 24 |
3549997852 ps |
| T1260 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otp_ctrl_smoketest.1264456771 |
|
|
Oct 13 12:35:52 AM UTC 24 |
Oct 13 12:42:07 AM UTC 24 |
3301632700 ps |
| T1261 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rstmgr_smoketest.915031461 |
|
|
Oct 13 12:38:26 AM UTC 24 |
Oct 13 12:42:36 AM UTC 24 |
2714948568 ps |
| T1262 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sram_ctrl_smoketest.4237601690 |
|
|
Oct 13 12:38:26 AM UTC 24 |
Oct 13 12:42:43 AM UTC 24 |
2902488052 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_wake_ups.2413229706 |
|
|
Oct 13 12:20:08 AM UTC 24 |
Oct 13 12:43:19 AM UTC 24 |
20988446004 ps |
| T1263 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.539381738 |
|
|
Oct 13 12:27:20 AM UTC 24 |
Oct 13 12:43:50 AM UTC 24 |
7340772063 ps |
| T1264 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_uart_smoketest.2920231937 |
|
|
Oct 13 12:39:21 AM UTC 24 |
Oct 13 12:44:12 AM UTC 24 |
3731054424 ps |
| T1265 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.806932970 |
|
|
Oct 13 12:36:40 AM UTC 24 |
Oct 13 12:44:16 AM UTC 24 |
5877490720 ps |
| T1266 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_keymgr_sideload_kmac.322342010 |
|
|
Oct 13 12:03:51 AM UTC 24 |
Oct 13 12:45:59 AM UTC 24 |
12761014000 ps |
| T1267 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_mem_protection.2309902387 |
|
|
Oct 13 12:29:50 AM UTC 24 |
Oct 13 12:46:12 AM UTC 24 |
5615652550 ps |
| T120 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.145259596 |
|
|
Oct 13 12:21:10 AM UTC 24 |
Oct 13 12:46:49 AM UTC 24 |
25735429520 ps |
| T1268 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_tap_straps_rma.1661922032 |
|
|
Oct 13 12:43:41 AM UTC 24 |
Oct 13 12:47:52 AM UTC 24 |
3839237330 ps |
| T1269 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_uart_tx_rx.3640990668 |
|
|
Oct 13 12:40:46 AM UTC 24 |
Oct 13 12:50:33 AM UTC 24 |
4613372912 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.1792764779 |
|
|
Oct 13 12:42:56 AM UTC 24 |
Oct 13 12:50:35 AM UTC 24 |
3928150336 ps |
| T1270 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_tap_straps_testunlock0.1017163840 |
|
|
Oct 13 12:43:19 AM UTC 24 |
Oct 13 12:50:59 AM UTC 24 |
5724184566 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_all_escalation_resets.3932491388 |
|
|
Oct 13 12:39:22 AM UTC 24 |
Oct 13 12:51:02 AM UTC 24 |
5241687778 ps |
| T1271 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_uart_tx_rx_idx1.1548786202 |
|
|
Oct 13 12:40:46 AM UTC 24 |
Oct 13 12:51:14 AM UTC 24 |
3860832060 ps |
| T1272 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.1369920905 |
|
|
Oct 13 12:42:51 AM UTC 24 |
Oct 13 12:51:47 AM UTC 24 |
3998512670 ps |
| T279 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_data_integrity_escalation.108986665 |
|
|
Oct 13 12:40:04 AM UTC 24 |
Oct 13 12:51:51 AM UTC 24 |
4620319268 ps |
| T1273 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_aon_timer_sleep_wdog_sleep_pause.3034657988 |
|
|
Oct 13 12:43:12 AM UTC 24 |
Oct 13 12:52:07 AM UTC 24 |
6460587000 ps |
| T1274 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_uart_tx_rx_idx2.1324005985 |
|
|
Oct 13 12:41:34 AM UTC 24 |
Oct 13 12:52:25 AM UTC 24 |
4209961312 ps |
| T1275 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_uart_tx_rx_idx3.3352989738 |
|
|
Oct 13 12:41:35 AM UTC 24 |
Oct 13 12:53:24 AM UTC 24 |
4240662524 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/4.chip_sw_all_escalation_resets.2661241023 |
|
|
Oct 13 12:44:29 AM UTC 24 |
Oct 13 12:54:53 AM UTC 24 |
5426443152 ps |
| T51 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_power_virus.458663812 |
|
|
Oct 13 12:31:11 AM UTC 24 |
Oct 13 12:55:09 AM UTC 24 |
5574288602 ps |
| T1276 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/4.chip_sw_uart_tx_rx.1006406025 |
|
|
Oct 13 12:44:59 AM UTC 24 |
Oct 13 12:55:09 AM UTC 24 |
4027553656 ps |
| T1277 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.312409216 |
|
|
Oct 13 12:11:00 AM UTC 24 |
Oct 13 12:56:01 AM UTC 24 |
29178829513 ps |
| T1278 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/4.chip_sw_uart_tx_rx_idx2.4239600242 |
|
|
Oct 13 12:46:53 AM UTC 24 |
Oct 13 12:57:20 AM UTC 24 |
3792177480 ps |
| T1279 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/4.chip_sw_uart_tx_rx_idx1.1362005930 |
|
|
Oct 13 12:46:48 AM UTC 24 |
Oct 13 12:57:32 AM UTC 24 |
3783822440 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.1085890799 |
|
|
Oct 13 12:51:57 AM UTC 24 |
Oct 13 12:57:58 AM UTC 24 |
3323511700 ps |
| T1280 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_tap_straps_prod.3946679024 |
|
|
Oct 13 12:43:49 AM UTC 24 |
Oct 13 12:58:41 AM UTC 24 |
7935893465 ps |
| T1281 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/4.chip_sw_aon_timer_sleep_wdog_sleep_pause.2067986621 |
|
|
Oct 13 12:51:54 AM UTC 24 |
Oct 13 12:59:00 AM UTC 24 |
6155674840 ps |
| T1282 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/4.chip_sw_uart_tx_rx_idx3.3977091179 |
|
|
Oct 13 12:47:28 AM UTC 24 |
Oct 13 12:59:40 AM UTC 24 |
4380394180 ps |
| T1283 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_lc_ctrl_transition.923468114 |
|
|
Oct 13 12:43:17 AM UTC 24 |
Oct 13 12:59:47 AM UTC 24 |
10122039250 ps |
| T1284 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/4.chip_tap_straps_testunlock0.1038095199 |
|
|
Oct 13 12:52:54 AM UTC 24 |
Oct 13 01:00:01 AM UTC 24 |
5231440185 ps |
| T1285 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.89711181 |
|
|
Oct 13 12:51:24 AM UTC 24 |
Oct 13 01:00:48 AM UTC 24 |
4500790730 ps |
| T1286 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_sensor_ctrl_alert.4122621631 |
|
|
Oct 13 12:43:11 AM UTC 24 |
Oct 13 01:01:22 AM UTC 24 |
9473592408 ps |
| T280 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/4.chip_sw_data_integrity_escalation.2643866460 |
|
|
Oct 13 12:44:59 AM UTC 24 |
Oct 13 01:01:44 AM UTC 24 |
6710558296 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_ast_clk_rst_inputs.2066260974 |
|
|
Oct 13 12:29:33 AM UTC 24 |
Oct 13 01:01:55 AM UTC 24 |
15723974604 ps |
| T1287 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en.3667108377 |
|
|
Oct 12 11:47:51 PM UTC 24 |
Oct 13 01:02:41 AM UTC 24 |
18767961285 ps |
| T1288 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/4.chip_tap_straps_rma.2920989721 |
|
|
Oct 13 12:53:54 AM UTC 24 |
Oct 13 01:02:58 AM UTC 24 |
6209605867 ps |
| T1289 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.2088929924 |
|
|
Oct 12 11:47:47 PM UTC 24 |
Oct 13 01:03:04 AM UTC 24 |
17870604912 ps |
| T1290 |
/workspaces/repo/scratch/os_regression_2024_10_11/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1566756383 |
|
|
Oct 13 12:43:17 AM UTC 24 |
Oct 13 01:03:05 AM UTC 24 |
8670301812 ps |